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-rw-r--r--arch/arm/Kconfig1
-rw-r--r--drivers/serial/Kconfig6
-rw-r--r--include/configs/edb93xx.h1
-rw-r--r--scripts/config_whitelist.txt1
4 files changed, 7 insertions, 2 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0b9eb11ef3..f1591248c7 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -348,6 +348,7 @@ config ARCH_AT91
config TARGET_EDB93XX
bool "Support edb93xx"
select CPU_ARM920T
+ select PL010_SERIAL
config TARGET_ASPENITE
bool "Support aspenite"
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 7b20b47964..2816121dec 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -447,6 +447,12 @@ config INTEL_MID_SERIAL
Select this to enable a UART for Intel MID platforms.
This uses the ns16550 driver as a library.
+config PL010_SERIAL
+ bool "ARM PL010 driver"
+ depends on !DM_SERIAL
+ help
+ Select this to enable a UART for platforms using PL010.
+
config ROCKCHIP_SERIAL
bool "Rockchip on-chip UART support"
depends on DM_SERIAL && SPL_OF_PLATDATA
diff --git a/include/configs/edb93xx.h b/include/configs/edb93xx.h
index 8fcc791ab4..fcad7c46dd 100644
--- a/include/configs/edb93xx.h
+++ b/include/configs/edb93xx.h
@@ -80,7 +80,6 @@
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
/* Serial port hardware configuration */
-#define CONFIG_PL010_SERIAL
#define CONFIG_CONS_INDEX 0
#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, \
115200, 230400}
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 76999ad826..063d03bed2 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1617,7 +1617,6 @@ CONFIG_PIXIS_BRDCFG1_SSI_TDM_MASK
CONFIG_PIXIS_BRDCFG1_SSI_TDM_SSI
CONFIG_PIXIS_BRDCFG1_TDM
CONFIG_PIXIS_SGMII_CMD
-CONFIG_PL010_SERIAL
CONFIG_PL011_CLOCK
CONFIG_PL011_SERIAL
CONFIG_PL011_SERIAL_RLCR