diff options
396 files changed, 7936 insertions, 4481 deletions
diff --git a/.gitignore b/.gitignore index a39bd54d38..3b14c256e1 100644 --- a/.gitignore +++ b/.gitignore @@ -47,8 +47,6 @@ /u-boot.ais /u-boot.dtb /u-boot.sb -/u-boot.bd -/u-boot.geany # # Generated files @@ -59,6 +57,10 @@ /errlog /reloc_off +/spl/ +!/spl/Makefile +/tpl/ + /include/generated/ /include/spl-autoconf.mk /include/tpl-autoconf.mk @@ -88,6 +90,3 @@ GPATH GRTAGS GSYMS GTAGS - -# spl ais files -/spl/*.ais @@ -381,6 +381,12 @@ LIST_ARM11="$(targets_by_cpu arm1136) \ LIST_ARMV7="$(targets_by_cpu armv7)" ######################################################################### +## ARMV8 Systems +######################################################################### + +LIST_ARMV8="$(targets_by_cpu armv8)" + +######################################################################### ## AT91 Systems ######################################################################### @@ -404,7 +410,11 @@ LIST_spear="$(targets_by_soc spear)" ## ARM groups ######################################################################### -LIST_arm="$(targets_by_arch arm)" +LIST_arm="$(targets_by_arch arm | \ + for ARMV8_TARGET in $LIST_ARMV8; \ + do sed "/$ARMV8_TARGET/d"; \ + done) \ +" ######################################################################### ## MIPS Systems (default = big endian) @@ -8,7 +8,7 @@ VERSION = 2014 PATCHLEVEL = 01 SUBLEVEL = -EXTRAVERSION = -rc1 +EXTRAVERSION = -rc2 ifneq "$(SUBLEVEL)" "" U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION) else @@ -109,11 +109,6 @@ export TOPDIR SRCTREE OBJTREE SPLTREE TPLTREE MKCONFIG := $(SRCTREE)/mkconfig export MKCONFIG -ifneq ($(OBJTREE),$(SRCTREE)) -REMOTE_BUILD := 1 -export REMOTE_BUILD -endif - # $(obj) and (src) are defined in config.mk but here in main Makefile # we also need them before config.mk is included which is the case for # some targets like unconfig, clean, clobber, distclean, etc. @@ -168,7 +163,7 @@ endif include $(TOPDIR)/config.mk # Targets which don't build the source code -NON_BUILD_TARGETS = backup clean clobber distclean mkproper tidy unconfig +NON_BUILD_TARGETS = backup clean clobber distclean mrproper tidy unconfig # Only do the generic board check when actually building, not configuring ifeq ($(filter $(NON_BUILD_TARGETS),$(MAKECMDGOALS)),) @@ -187,7 +182,7 @@ ifndef LDSCRIPT #LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot.lds.debug ifdef CONFIG_SYS_LDSCRIPT # need to strip off double quotes - LDSCRIPT := $(subst ",,$(CONFIG_SYS_LDSCRIPT)) + LDSCRIPT := $(CONFIG_SYS_LDSCRIPT:"%"=%) endif endif @@ -218,15 +213,11 @@ endif ######################################################################### # U-Boot objects....order is important (i.e. start must be first) -OBJS = $(CPUDIR)/start.o -ifeq ($(CPU),ppc4xx) -OBJS += $(CPUDIR)/resetvec.o -endif -ifeq ($(CPU),mpc85xx) -OBJS += $(CPUDIR)/resetvec.o -endif +head-y := $(CPUDIR)/start.o +head-$(CONFIG_4xx) += arch/powerpc/cpu/ppc4xx/resetvec.o +head-$(CONFIG_MPC85xx) += arch/powerpc/cpu/mpc85xx/resetvec.o -OBJS := $(addprefix $(obj),$(OBJS)) +OBJS := $(addprefix $(obj),$(head-y)) HAVE_VENDOR_COMMON_LIB = $(if $(wildcard board/$(VENDOR)/common/Makefile),y,n) @@ -249,9 +240,9 @@ LIBS-y += drivers/i2c/ LIBS-y += drivers/input/ LIBS-y += drivers/mmc/ LIBS-y += drivers/mtd/ -LIBS-y += drivers/mtd/nand/ +LIBS-$(CONFIG_CMD_NAND) += drivers/mtd/nand/ LIBS-y += drivers/mtd/onenand/ -LIBS-y += drivers/mtd/ubi/ +LIBS-$(CONFIG_CMD_UBI) += drivers/mtd/ubi/ LIBS-y += drivers/mtd/spi/ LIBS-y += drivers/net/ LIBS-y += drivers/net/phy/ @@ -275,7 +266,7 @@ LIBS-y += drivers/usb/ulpi/ LIBS-y += common/ LIBS-y += lib/libfdt/ LIBS-$(CONFIG_API) += api/ -LIBS-y += post/ +LIBS-$(CONFIG_HAS_POST) += post/ LIBS-y += test/ ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35 mxs vf610)) @@ -334,6 +325,17 @@ else BOARD_SIZE_CHECK = endif +# Statically apply RELA-style relocations (currently arm64 only) +ifneq ($(CONFIG_STATIC_RELA),) +# $(1) is u-boot ELF, $(2) is u-boot bin, $(3) is text base +DO_STATIC_RELA = \ + start=$$($(NM) $(1) | grep __rel_dyn_start | cut -f 1 -d ' '); \ + end=$$($(NM) $(1) | grep __rel_dyn_end | cut -f 1 -d ' '); \ + $(obj)tools/relocate-rela $(2) $(3) $$start $$end +else +DO_STATIC_RELA = +endif + # Always append ALL so that arch config.mk's can add custom ones ALL-y += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map @@ -345,8 +347,9 @@ ALL-$(CONFIG_SPL_FRAMEWORK) += $(obj)u-boot.img ALL-$(CONFIG_TPL) += $(obj)tpl/u-boot-tpl.bin ALL-$(CONFIG_OF_SEPARATE) += $(obj)u-boot.dtb $(obj)u-boot-dtb.bin ifneq ($(CONFIG_SPL_TARGET),) -ALL-$(CONFIG_SPL) += $(obj)$(subst ",,$(CONFIG_SPL_TARGET)) +ALL-$(CONFIG_SPL) += $(obj)$(CONFIG_SPL_TARGET:"%"=%) endif +ALL-$(CONFIG_REMAKE_ELF) += $(obj)u-boot.elf # enable combined SPL/u-boot/dtb rules for tegra ifneq ($(CONFIG_TEGRA),) @@ -378,6 +381,7 @@ $(obj)u-boot.srec: $(obj)u-boot $(obj)u-boot.bin: $(obj)u-boot $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@ + $(call DO_STATIC_RELA,$<,$@,$(CONFIG_SYS_TEXT_BASE)) $(BOARD_SIZE_CHECK) $(obj)u-boot.ldr: $(obj)u-boot @@ -482,12 +486,10 @@ $(obj)u-boot.sb: $(obj)u-boot.bin $(obj)spl/u-boot-spl.bin $(obj)u-boot.spr: $(obj)u-boot.img $(obj)spl/u-boot-spl.bin $(obj)tools/mkimage -A $(ARCH) -T firmware -C none \ -a $(CONFIG_SPL_TEXT_BASE) -e $(CONFIG_SPL_TEXT_BASE) -n XLOADER \ - -d $(obj)spl/u-boot-spl.bin $(obj)spl/u-boot-spl.img - tr "\000" "\377" < /dev/zero | dd ibs=1 count=$(CONFIG_SPL_PAD_TO) \ - of=$(obj)spl/u-boot-spl-pad.img 2>/dev/null - dd if=$(obj)spl/u-boot-spl.img of=$(obj)spl/u-boot-spl-pad.img \ - conv=notrunc 2>/dev/null - cat $(obj)spl/u-boot-spl-pad.img $(obj)u-boot.img > $@ + -d $(obj)spl/u-boot-spl.bin $@ + $(OBJCOPY) -I binary -O binary \ + --pad-to=$(CONFIG_SPL_PAD_TO) --gap-fill=0xff $@ + cat $(obj)u-boot.img >> $@ ifneq ($(CONFIG_TEGRA),) $(obj)u-boot-nodtb-tegra.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin @@ -510,11 +512,21 @@ $(obj)u-boot-img.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.img # at the start padded up to the start of the SPL image. And then concat # the SPL image to the end. $(obj)u-boot-img-spl-at-end.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.img - tr "\000" "\377" < /dev/zero | dd ibs=1 count=$(CONFIG_UBOOT_PAD_TO) \ - of=$(obj)u-boot-pad.img 2>/dev/null - dd if=$(obj)u-boot.img of=$(obj)u-boot-pad.img \ - conv=notrunc 2>/dev/null - cat $(obj)u-boot-pad.img $(obj)spl/u-boot-spl.bin > $@ + $(OBJCOPY) -I binary -O binary --pad-to=$(CONFIG_UBOOT_PAD_TO) \ + --gap-fill=0xff $(obj)u-boot.img $@ + cat $(obj)spl/u-boot-spl.bin >> $@ + +# Create a new ELF from a raw binary file. This is useful for arm64 +# where static relocation needs to be performed on the raw binary, +# but certain simulators only accept an ELF file (but don't do the +# relocation). +# FIXME refactor dts/Makefile to share target/arch detection +$(obj)u-boot.elf: $(obj)u-boot.bin + @$(OBJCOPY) -B aarch64 -I binary -O elf64-littleaarch64 \ + $< $(obj)u-boot-elf.o + @$(LD) $(obj)u-boot-elf.o -o $@ \ + --defsym=_start=$(CONFIG_SYS_TEXT_BASE) \ + -Ttext=$(CONFIG_SYS_TEXT_BASE) ifeq ($(CONFIG_SANDBOX),y) GEN_UBOOT = \ @@ -530,7 +542,7 @@ GEN_UBOOT = \ endif $(obj)u-boot: depend \ - $(SUBDIR_TOOLS) $(OBJS) $(LIBS) $(LDSCRIPT) $(obj)u-boot.lds + $(SUBDIR_TOOLS) $(OBJS) $(LIBS) $(obj)u-boot.lds $(GEN_UBOOT) ifeq ($(CONFIG_KALLSYMS),y) smap=`$(call SYSTEM_MAP,$(obj)u-boot) | \ @@ -551,10 +563,7 @@ $(SUBDIRS): depend $(SUBDIR_EXAMPLES-y): $(obj)u-boot -$(LDSCRIPT): depend - $(MAKE) -C $(dir $@) $(notdir $@) - -$(obj)u-boot.lds: $(LDSCRIPT) +$(obj)u-boot.lds: $(LDSCRIPT) depend $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$< >$@ nand_spl: $(TIMESTAMP_FILE) $(VERSION_FILE) depend @@ -588,7 +597,7 @@ FINDFLAGS := -L checkstack: $(CROSS_COMPILE)objdump -d $(obj)u-boot \ `$(FIND) $(obj) -name u-boot-spl -print` | \ - perl $(src)tools/checkstack.pl $(ARCH) + perl $(src)scripts/checkstack.pl $(ARCH) tags ctags: ctags -w -o $(obj)ctags `$(FIND) $(FINDFLAGS) $(TAG_SUBDIRS) \ @@ -640,63 +649,49 @@ checkdtc: # to regenerate the autoconf.mk file. $(obj)include/autoconf.mk.dep: $(obj)include/config.h include/common.h @$(XECHO) Generating $@ ; \ - set -e ; \ : Generate the dependancies ; \ $(CC) -x c -DDO_DEPS_ONLY -M $(CFLAGS) $(CPPFLAGS) \ - -MQ $(obj)include/autoconf.mk include/common.h > $@ + -MQ $(obj)include/autoconf.mk include/common.h > $@ || \ + rm $@ $(obj)include/autoconf.mk: $(obj)include/config.h @$(XECHO) Generating $@ ; \ - set -e ; \ : Extract the config macros ; \ - $(CPP) $(CFLAGS) -DDO_DEPS_ONLY -dM include/common.h | \ - sed -n -f tools/scripts/define2mk.sed > $@.tmp && \ - mv $@.tmp $@ + $(CPP) $(CFLAGS) -DDO_DEPS_ONLY -dM include/common.h > $@.tmp && \ + sed -n -f tools/scripts/define2mk.sed $@.tmp > $@; \ + rm $@.tmp # Auto-generate the spl-autoconf.mk file (which is included by all makefiles for SPL) $(obj)include/tpl-autoconf.mk: $(obj)include/config.h @$(XECHO) Generating $@ ; \ - set -e ; \ : Extract the config macros ; \ $(CPP) $(CFLAGS) -DCONFIG_TPL_BUILD -DCONFIG_SPL_BUILD\ - -DDO_DEPS_ONLY -dM include/common.h | \ - sed -n -f tools/scripts/define2mk.sed > $@.tmp && \ - mv $@.tmp $@ + -DDO_DEPS_ONLY -dM include/common.h > $@.tmp && \ + sed -n -f tools/scripts/define2mk.sed $@.tmp > $@; \ + rm $@.tmp $(obj)include/spl-autoconf.mk: $(obj)include/config.h @$(XECHO) Generating $@ ; \ - set -e ; \ : Extract the config macros ; \ - $(CPP) $(CFLAGS) -DCONFIG_SPL_BUILD -DDO_DEPS_ONLY -dM include/common.h | \ - sed -n -f tools/scripts/define2mk.sed > $@.tmp && \ - mv $@.tmp $@ - -$(obj)include/generated/generic-asm-offsets.h: $(obj)include/autoconf.mk.dep \ - $(obj)include/spl-autoconf.mk \ - $(obj)include/tpl-autoconf.mk \ - $(obj)lib/asm-offsets.s + $(CPP) $(CFLAGS) -DCONFIG_SPL_BUILD -DDO_DEPS_ONLY -dM include/common.h > $@.tmp && \ + sed -n -f tools/scripts/define2mk.sed $@.tmp > $@; \ + rm $@.tmp + +$(obj)include/generated/generic-asm-offsets.h: $(obj)lib/asm-offsets.s @$(XECHO) Generating $@ tools/scripts/make-asm-offsets $(obj)lib/asm-offsets.s $@ -$(obj)lib/asm-offsets.s: $(obj)include/autoconf.mk.dep \ - $(obj)include/spl-autoconf.mk \ - $(obj)include/tpl-autoconf.mk \ - $(src)lib/asm-offsets.c +$(obj)lib/asm-offsets.s: $(obj)include/config.h $(src)lib/asm-offsets.c @mkdir -p $(obj)lib $(CC) -DDO_DEPS_ONLY \ $(CFLAGS) $(CFLAGS_$(BCURDIR)/$(@F)) $(CFLAGS_$(BCURDIR)) \ -o $@ $(src)lib/asm-offsets.c -c -S -$(obj)include/generated/asm-offsets.h: $(obj)include/autoconf.mk.dep \ - $(obj)include/spl-autoconf.mk \ - $(obj)include/tpl-autoconf.mk \ - $(obj)$(CPUDIR)/$(SOC)/asm-offsets.s +$(obj)include/generated/asm-offsets.h: $(obj)$(CPUDIR)/$(SOC)/asm-offsets.s @$(XECHO) Generating $@ tools/scripts/make-asm-offsets $(obj)$(CPUDIR)/$(SOC)/asm-offsets.s $@ -$(obj)$(CPUDIR)/$(SOC)/asm-offsets.s: $(obj)include/autoconf.mk.dep \ - $(obj)include/spl-autoconf.mk \ - $(obj)include/tpl-autoconf.mk +$(obj)$(CPUDIR)/$(SOC)/asm-offsets.s: $(obj)include/config.h @mkdir -p $(obj)$(CPUDIR)/$(SOC) if [ -f $(src)$(CPUDIR)/$(SOC)/asm-offsets.c ];then \ $(CC) -DDO_DEPS_ONLY \ @@ -719,16 +714,20 @@ tools: $(VERSION_FILE) $(TIMESTAMP_FILE) $(MAKE) -C $@ all endif # config.mk -# ARM relocations should all be R_ARM_RELATIVE. +# ARM relocations should all be R_ARM_RELATIVE (32-bit) or +# R_AARCH64_RELATIVE (64-bit). checkarmreloc: $(obj)u-boot - @if test "R_ARM_RELATIVE" != \ - "`$(CROSS_COMPILE)readelf -r $< | cut -d ' ' -f 4 | grep R_ARM | sort -u`"; \ - then echo "$< contains relocations other than \ - R_ARM_RELATIVE"; false; fi + @RELOC="`$(CROSS_COMPILE)readelf -r -W $< | cut -d ' ' -f 4 | \ + grep R_A | sort -u`"; \ + if test "$$RELOC" != "R_ARM_RELATIVE" -a \ + "$$RELOC" != "R_AARCH64_RELATIVE"; then \ + echo "$< contains unexpected relocations: $$RELOC"; \ + false; \ + fi $(VERSION_FILE): @mkdir -p $(dir $(VERSION_FILE)) - @( localvers='$(shell $(TOPDIR)/tools/setlocalversion $(TOPDIR))' ; \ + @( localvers='$(shell $(TOPDIR)/scripts/setlocalversion $(TOPDIR))' ; \ printf '#define PLAIN_VERSION "%s%s"\n' \ "$(U_BOOT_VERSION)" "$${localvers}" ; \ printf '#define U_BOOT_VERSION "U-Boot %s%s"\n' \ @@ -783,9 +782,7 @@ $(obj).boards.depend: boards.cfg ######################################################################### clean: - @rm -f $(obj)examples/standalone/82559_eeprom \ - $(obj)examples/standalone/atmel_df_pow2 \ - $(obj)examples/standalone/eepro100_eeprom \ + @rm -f $(obj)examples/standalone/atmel_df_pow2 \ $(obj)examples/standalone/hello_world \ $(obj)examples/standalone/interrupt \ $(obj)examples/standalone/mem_to_mem_idma2intr \ @@ -795,10 +792,11 @@ clean: $(obj)examples/standalone/timer @rm -f $(obj)examples/api/demo{,.bin} @rm -f $(obj)tools/bmp_logo $(obj)tools/easylogo/easylogo \ - $(obj)tools/env/{fw_printenv,fw_setenv} \ + $(obj)tools/env/fw_printenv \ $(obj)tools/envcrc \ - $(obj)tools/gdb/{astest,gdbcont,gdbsend} \ + $(obj)tools/gdb/{gdbcont,gdbsend} \ $(obj)tools/gen_eth_addr $(obj)tools/img2srec \ + $(obj)tools/dump{env,}image \ $(obj)tools/mk{env,}image $(obj)tools/mpc86x_clk \ $(obj)tools/mk{$(BOARD),}spl \ $(obj)tools/mxsboot \ @@ -807,7 +805,6 @@ clean: $(obj)tools/proftool @rm -f $(obj)board/cray/L1/{bootscript.c,bootscript.image} \ $(obj)board/matrix_vision/*/bootscript.img \ - $(obj)board/voiceblue/eeprom \ $(obj)u-boot.lds \ $(obj)arch/blackfin/cpu/init.{lds,elf} @rm -f $(obj)include/bmp_logo.h @@ -843,7 +840,6 @@ clobber: tidy @rm -f $(obj)u-boot.ais @rm -f $(obj)u-boot.dtb @rm -f $(obj)u-boot.sb - @rm -f $(obj)u-boot.bd @rm -f $(obj)u-boot.spr @rm -f $(obj)nand_spl/{u-boot.{lds,lst},System.map} @rm -f $(obj)nand_spl/{u-boot-nand_spl.lds,u-boot-spl,u-boot-spl.map} @@ -423,6 +423,11 @@ The following options need to be configured: CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT This value denotes start offset of DSP CCSR space. + CONFIG_SYS_FSL_SINGLE_SOURCE_CLK + Single Source Clock is clocking mode present in some of FSL SoC's. + In this mode, a single differential clock is used to supply + clocks to the sysclock, ddrclock and usbclock. + - Generic CPU options: CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN @@ -3267,6 +3272,9 @@ FIT uImage format: Defines the size and behavior of the NAND that SPL uses to read U-Boot + CONFIG_SPL_NAND_BOOT + Add support NAND boot + CONFIG_SYS_NAND_U_BOOT_OFFS Location in NAND to read U-Boot from @@ -5252,6 +5260,15 @@ when your kernel is intended to use an initial ramdisk: Load Address: 0x00000000 Entry Point: 0x00000000 +The "dumpimage" is a tool to disassemble images built by mkimage. Its "-i" +option performs the converse operation of the mkimage's second form (the "-d" +option). Given an image built by mkimage, the dumpimage extracts a "data file" +from the image: + + tools/dumpimage -i image -p position data_file + -i ==> extract from the 'image' a specific 'data_file', \ + indexed by 'position' + Installing a Linux Image: ------------------------- diff --git a/arch/arm/config.mk b/arch/arm/config.mk index fd3e5fb661..cfa42094ca 100644 --- a/arch/arm/config.mk +++ b/arch/arm/config.mk @@ -17,7 +17,8 @@ endif LDFLAGS_FINAL += --gc-sections PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections \ - -fno-common -ffixed-r9 -msoft-float + -fno-common -ffixed-r9 +PLATFORM_RELFLAGS += $(call cc-option, -msoft-float) # Support generic board on ARM __HAVE_ARCH_GENERIC_BOARD := y @@ -105,4 +106,8 @@ PLATFORM_CPPFLAGS += $(call cc-option, -mword-relocations) endif # limit ourselves to the sections we want in the .bin. -OBJCFLAGS += -j .text -j .rodata -j .data -j .u_boot_list -j .rel.dyn +ifdef CONFIG_ARM64 +OBJCFLAGS += -j .text -j .rodata -j .data -j .u_boot_list -j .rela.dyn +else +OBJCFLAGS += -j .text -j .rodata -j .hash -j .data -j .got.plt -j .u_boot_list -j .rel.dyn +endif diff --git a/arch/arm/cpu/armv7/exynos/config.mk b/arch/arm/cpu/armv7/exynos/config.mk new file mode 100644 index 0000000000..ee0d2dab7b --- /dev/null +++ b/arch/arm/cpu/armv7/exynos/config.mk @@ -0,0 +1,7 @@ +# +# Copyright (C) Albert ARIBAUD <albert.u.boot@aribaud.net> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +SPL_OBJCFLAGS += -j .machine_param diff --git a/arch/arm/cpu/armv7/lowlevel_init.S b/arch/arm/cpu/armv7/lowlevel_init.S index 69e3053a42..f1aea05c90 100644 --- a/arch/arm/cpu/armv7/lowlevel_init.S +++ b/arch/arm/cpu/armv7/lowlevel_init.S @@ -24,7 +24,7 @@ ENTRY(lowlevel_init) #ifdef CONFIG_SPL_BUILD ldr r9, =gdata #else - sub sp, #GD_SIZE + sub sp, sp, #GD_SIZE bic sp, sp, #7 mov r9, sp #endif diff --git a/arch/arm/cpu/armv7/zynq/slcr.c b/arch/arm/cpu/armv7/zynq/slcr.c index 717ec65aee..b4c11c324c 100644 --- a/arch/arm/cpu/armv7/zynq/slcr.c +++ b/arch/arm/cpu/armv7/zynq/slcr.c @@ -101,6 +101,12 @@ void zynq_slcr_devcfg_enable(void) zynq_slcr_lock(); } +u32 zynq_slcr_get_boot_mode(void) +{ + /* Get the bootmode register value */ + return readl(&slcr_base->boot_mode); +} + u32 zynq_slcr_get_idcode(void) { return (readl(&slcr_base->pss_idcode) & SLCR_IDCODE_MASK) >> diff --git a/arch/arm/cpu/armv7/zynq/timer.c b/arch/arm/cpu/armv7/zynq/timer.c index 636322a8e5..2be253c2c3 100644 --- a/arch/arm/cpu/armv7/zynq/timer.c +++ b/arch/arm/cpu/armv7/zynq/timer.c @@ -107,8 +107,7 @@ void __udelay(unsigned long usec) if (usec == 0) return; - countticks = (u32) (((unsigned long long) TIMER_TICK_HZ * usec) / - 1000000); + countticks = lldiv(TIMER_TICK_HZ * usec, 1000000); /* decrementing timer */ timeend = readl(&timer_base->counter) - countticks; diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile new file mode 100644 index 0000000000..b6eb6de5e3 --- /dev/null +++ b/arch/arm/cpu/armv8/Makefile @@ -0,0 +1,17 @@ +# +# (C) Copyright 2000-2003 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +extra-y := start.o + +obj-y += cpu.o +obj-y += generic_timer.o +obj-y += cache_v8.o +obj-y += exceptions.o +obj-y += cache.o +obj-y += tlb.o +obj-y += gic.o +obj-y += transition.o diff --git a/arch/arm/cpu/armv8/cache.S b/arch/arm/cpu/armv8/cache.S new file mode 100644 index 0000000000..546a83e8f8 --- /dev/null +++ b/arch/arm/cpu/armv8/cache.S @@ -0,0 +1,136 @@ +/* + * (C) Copyright 2013 + * David Feng <fenghua@phytium.com.cn> + * + * This file is based on sample code from ARMv8 ARM. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm-offsets.h> +#include <config.h> +#include <version.h> +#include <asm/macro.h> +#include <linux/linkage.h> + +/* + * void __asm_flush_dcache_level(level) + * + * clean and invalidate one level cache. + * + * x0: cache level + * x1~x9: clobbered + */ +ENTRY(__asm_flush_dcache_level) + lsl x1, x0, #1 + msr csselr_el1, x1 /* select cache level */ + isb /* sync change of cssidr_el1 */ + mrs x6, ccsidr_el1 /* read the new cssidr_el1 */ + and x2, x6, #7 /* x2 <- log2(cache line size)-4 */ + add x2, x2, #4 /* x2 <- log2(cache line size) */ + mov x3, #0x3ff + and x3, x3, x6, lsr #3 /* x3 <- max number of #ways */ + add w4, w3, w3 + sub w4, w4, 1 /* round up log2(#ways + 1) */ + clz w5, w4 /* bit position of #ways */ + mov x4, #0x7fff + and x4, x4, x6, lsr #13 /* x4 <- max number of #sets */ + /* x1 <- cache level << 1 */ + /* x2 <- line length offset */ + /* x3 <- number of cache ways - 1 */ + /* x4 <- number of cache sets - 1 */ + /* x5 <- bit position of #ways */ + +loop_set: + mov x6, x3 /* x6 <- working copy of #ways */ +loop_way: + lsl x7, x6, x5 + orr x9, x1, x7 /* map way and level to cisw value */ + lsl x7, x4, x2 + orr x9, x9, x7 /* map set number to cisw value */ + dc cisw, x9 /* clean & invalidate by set/way */ + subs x6, x6, #1 /* decrement the way */ + b.ge loop_way + subs x4, x4, #1 /* decrement the set */ + b.ge loop_set + + ret +ENDPROC(__asm_flush_dcache_level) + +/* + * void __asm_flush_dcache_all(void) + * + * clean and invalidate all data cache by SET/WAY. + */ +ENTRY(__asm_flush_dcache_all) + dsb sy + mrs x10, clidr_el1 /* read clidr_el1 */ + lsr x11, x10, #24 + and x11, x11, #0x7 /* x11 <- loc */ + cbz x11, finished /* if loc is 0, exit */ + mov x15, lr + mov x0, #0 /* start flush at cache level 0 */ + /* x0 <- cache level */ + /* x10 <- clidr_el1 */ + /* x11 <- loc */ + /* x15 <- return address */ + +loop_level: + lsl x1, x0, #1 + add x1, x1, x0 /* x0 <- tripled cache level */ + lsr x1, x10, x1 + and x1, x1, #7 /* x1 <- cache type */ + cmp x1, #2 + b.lt skip /* skip if no cache or icache */ + bl __asm_flush_dcache_level +skip: + add x0, x0, #1 /* increment cache level */ + cmp x11, x0 + b.gt loop_level + + mov x0, #0 + msr csselr_el1, x0 /* resotre csselr_el1 */ + dsb sy + isb + mov lr, x15 + +finished: + ret +ENDPROC(__asm_flush_dcache_all) + +/* + * void __asm_flush_dcache_range(start, end) + * + * clean & invalidate data cache in the range + * + * x0: start address + * x1: end address + */ +ENTRY(__asm_flush_dcache_range) + mrs x3, ctr_el0 + lsr x3, x3, #16 + and x3, x3, #0xf + mov x2, #4 + lsl x2, x2, x3 /* cache line size */ + + /* x2 <- minimal cache line size in cache system */ + sub x3, x2, #1 + bic x0, x0, x3 +1: dc civac, x0 /* clean & invalidate data or unified cache */ + add x0, x0, x2 + cmp x0, x1 + b.lo 1b + dsb sy + ret +ENDPROC(__asm_flush_dcache_range) + +/* + * void __asm_invalidate_icache_all(void) + * + * invalidate all tlb entries. + */ +ENTRY(__asm_invalidate_icache_all) + ic ialluis + isb sy + ret +ENDPROC(__asm_invalidate_icache_all) diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c new file mode 100644 index 0000000000..131fdaba3f --- /dev/null +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -0,0 +1,219 @@ +/* + * (C) Copyright 2013 + * David Feng <fenghua@phytium.com.cn> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/system.h> +#include <asm/armv8/mmu.h> + +DECLARE_GLOBAL_DATA_PTR; + +#ifndef CONFIG_SYS_DCACHE_OFF + +static void set_pgtable_section(u64 section, u64 memory_type) +{ + u64 *page_table = (u64 *)gd->arch.tlb_addr; + u64 value; + + value = (section << SECTION_SHIFT) | PMD_TYPE_SECT | PMD_SECT_AF; + value |= PMD_ATTRINDX(memory_type); + page_table[section] = value; +} + +/* to activate the MMU we need to set up virtual memory */ +static void mmu_setup(void) +{ + int i, j, el; + bd_t *bd = gd->bd; + + /* Setup an identity-mapping for all spaces */ + for (i = 0; i < (PGTABLE_SIZE >> 3); i++) + set_pgtable_section(i, MT_DEVICE_NGNRNE); + + /* Setup an identity-mapping for all RAM space */ + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { + ulong start = bd->bi_dram[i].start; + ulong end = bd->bi_dram[i].start + bd->bi_dram[i].size; + for (j = start >> SECTION_SHIFT; + j < end >> SECTION_SHIFT; j++) { + set_pgtable_section(j, MT_NORMAL); + } + } + + /* load TTBR0 */ + el = current_el(); + if (el == 1) + asm volatile("msr ttbr0_el1, %0" + : : "r" (gd->arch.tlb_addr) : "memory"); + else if (el == 2) + asm volatile("msr ttbr0_el2, %0" + : : "r" (gd->arch.tlb_addr) : "memory"); + else + asm volatile("msr ttbr0_el3, %0" + : : "r" (gd->arch.tlb_addr) : "memory"); + + /* enable the mmu */ + set_sctlr(get_sctlr() | CR_M); +} + +/* + * Performs a invalidation of the entire data cache at all levels + */ +void invalidate_dcache_all(void) +{ + __asm_flush_dcache_all(); +} + +/* + * Performs a clean & invalidation of the entire data cache at all levels + */ +void flush_dcache_all(void) +{ + __asm_flush_dcache_all(); +} + +/* + * Invalidates range in all levels of D-cache/unified cache + */ +void invalidate_dcache_range(unsigned long start, unsigned long stop) +{ + __asm_flush_dcache_range(start, stop); +} + +/* + * Flush range(clean & invalidate) from all levels of D-cache/unified cache + */ +void flush_dcache_range(unsigned long start, unsigned long stop) +{ + __asm_flush_dcache_range(start, stop); +} + +void dcache_enable(void) +{ + /* The data cache is not active unless the mmu is enabled */ + if (!(get_sctlr() & CR_M)) { + invalidate_dcache_all(); + __asm_invalidate_tlb_all(); + mmu_setup(); + } + + set_sctlr(get_sctlr() | CR_C); +} + +void dcache_disable(void) +{ + uint32_t sctlr; + + sctlr = get_sctlr(); + + /* if cache isn't enabled no need to disable */ + if (!(sctlr & CR_C)) + return; + + set_sctlr(sctlr & ~(CR_C|CR_M)); + + flush_dcache_all(); + __asm_invalidate_tlb_all(); +} + +int dcache_status(void) +{ + return (get_sctlr() & CR_C) != 0; +} + +#else /* CONFIG_SYS_DCACHE_OFF */ + +void invalidate_dcache_all(void) +{ +} + +void flush_dcache_all(void) +{ +} + +void invalidate_dcache_range(unsigned long start, unsigned long stop) +{ +} + +void flush_dcache_range(unsigned long start, unsigned long stop) +{ +} + +void dcache_enable(void) +{ +} + +void dcache_disable(void) +{ +} + +int dcache_status(void) +{ + return 0; +} + +#endif /* CONFIG_SYS_DCACHE_OFF */ + +#ifndef CONFIG_SYS_ICACHE_OFF + +void icache_enable(void) +{ + set_sctlr(get_sctlr() | CR_I); +} + +void icache_disable(void) +{ + set_sctlr(get_sctlr() & ~CR_I); +} + +int icache_status(void) +{ + return (get_sctlr() & CR_I) != 0; +} + +void invalidate_icache_all(void) +{ + __asm_invalidate_icache_all(); +} + +#else /* CONFIG_SYS_ICACHE_OFF */ + +void icache_enable(void) +{ +} + +void icache_disable(void) +{ +} + +int icache_status(void) +{ + return 0; +} + +void invalidate_icache_all(void) +{ +} + +#endif /* CONFIG_SYS_ICACHE_OFF */ + +/* + * Enable dCache & iCache, whether cache is actually enabled + * depend on CONFIG_SYS_DCACHE_OFF and CONFIG_SYS_ICACHE_OFF + */ +void enable_caches(void) +{ + icache_enable(); + dcache_enable(); +} + +/* + * Flush range from all levels of d-cache/unified-cache + */ +void flush_cache(unsigned long start, unsigned long size) +{ + flush_dcache_range(start, start + size); +} diff --git a/arch/arm/cpu/armv8/config.mk b/arch/arm/cpu/armv8/config.mk new file mode 100644 index 0000000000..027a68ca57 --- /dev/null +++ b/arch/arm/cpu/armv8/config.mk @@ -0,0 +1,15 @@ +# +# (C) Copyright 2002 +# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> +# +# SPDX-License-Identifier: GPL-2.0+ +# +PLATFORM_RELFLAGS += -fno-common -ffixed-x18 + +# SEE README.arm-unaligned-accesses +PF_NO_UNALIGNED := $(call cc-option, -mstrict-align) +PLATFORM_NO_UNALIGNED := $(PF_NO_UNALIGNED) + +PF_CPPFLAGS_ARMV8 := $(call cc-option, -march=armv8-a) +PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_ARMV8) +PLATFORM_CPPFLAGS += $(PF_NO_UNALIGNED) diff --git a/arch/arm/cpu/armv8/cpu.c b/arch/arm/cpu/armv8/cpu.c new file mode 100644 index 0000000000..e06c3cc04d --- /dev/null +++ b/arch/arm/cpu/armv8/cpu.c @@ -0,0 +1,43 @@ +/* + * (C) Copyright 2008 Texas Insturments + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger@sysgo.de> + * + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <command.h> +#include <asm/system.h> +#include <linux/compiler.h> + +int cleanup_before_linux(void) +{ + /* + * this function is called just before we call linux + * it prepares the processor for linux + * + * disable interrupt and turn off caches etc ... + */ + disable_interrupts(); + + /* + * Turn off I-cache and invalidate it + */ + icache_disable(); + invalidate_icache_all(); + + /* + * turn off D-cache + * dcache_disable() in turn flushes the d-cache and disables MMU + */ + dcache_disable(); + invalidate_dcache_all(); + + return 0; +} diff --git a/arch/arm/cpu/armv8/exceptions.S b/arch/arm/cpu/armv8/exceptions.S new file mode 100644 index 0000000000..b91a1b662f --- /dev/null +++ b/arch/arm/cpu/armv8/exceptions.S @@ -0,0 +1,113 @@ +/* + * (C) Copyright 2013 + * David Feng <fenghua@phytium.com.cn> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm-offsets.h> +#include <config.h> +#include <version.h> +#include <asm/ptrace.h> +#include <asm/macro.h> +#include <linux/linkage.h> + +/* + * Enter Exception. + * This will save the processor state that is ELR/X0~X30 + * to the stack frame. + */ +.macro exception_entry + stp x29, x30, [sp, #-16]! + stp x27, x28, [sp, #-16]! + stp x25, x26, [sp, #-16]! + stp x23, x24, [sp, #-16]! + stp x21, x22, [sp, #-16]! + stp x19, x20, [sp, #-16]! + stp x17, x18, [sp, #-16]! + stp x15, x16, [sp, #-16]! + stp x13, x14, [sp, #-16]! + stp x11, x12, [sp, #-16]! + stp x9, x10, [sp, #-16]! + stp x7, x8, [sp, #-16]! + stp x5, x6, [sp, #-16]! + stp x3, x4, [sp, #-16]! + stp x1, x2, [sp, #-16]! + + /* Could be running at EL3/EL2/EL1 */ + switch_el x11, 3f, 2f, 1f +3: mrs x1, esr_el3 + mrs x2, elr_el3 + b 0f +2: mrs x1, esr_el2 + mrs x2, elr_el2 + b 0f +1: mrs x1, esr_el1 + mrs x2, elr_el1 +0: + stp x2, x0, [sp, #-16]! + mov x0, sp +.endm + +/* + * Exception vectors. + */ + .align 11 + .globl vectors +vectors: + .align 7 + b _do_bad_sync /* Current EL Synchronous Thread */ + + .align 7 + b _do_bad_irq /* Current EL IRQ Thread */ + + .align 7 + b _do_bad_fiq /* Current EL FIQ Thread */ + + .align 7 + b _do_bad_error /* Current EL Error Thread */ + + .align 7 + b _do_sync /* Current EL Synchronous Handler */ + + .align 7 + b _do_irq /* Current EL IRQ Handler */ + + .align 7 + b _do_fiq /* Current EL FIQ Handler */ + + .align 7 + b _do_error /* Current EL Error Handler */ + + +_do_bad_sync: + exception_entry + bl do_bad_sync + +_do_bad_irq: + exception_entry + bl do_bad_irq + +_do_bad_fiq: + exception_entry + bl do_bad_fiq + +_do_bad_error: + exception_entry + bl do_bad_error + +_do_sync: + exception_entry + bl do_sync + +_do_irq: + exception_entry + bl do_irq + +_do_fiq: + exception_entry + bl do_fiq + +_do_error: + exception_entry + bl do_error diff --git a/arch/arm/cpu/armv8/generic_timer.c b/arch/arm/cpu/armv8/generic_timer.c new file mode 100644 index 0000000000..223b95e210 --- /dev/null +++ b/arch/arm/cpu/armv8/generic_timer.c @@ -0,0 +1,31 @@ +/* + * (C) Copyright 2013 + * David Feng <fenghua@phytium.com.cn> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <command.h> +#include <asm/system.h> + +/* + * Generic timer implementation of get_tbclk() + */ +unsigned long get_tbclk(void) +{ + unsigned long cntfrq; + asm volatile("mrs %0, cntfrq_el0" : "=r" (cntfrq)); + return cntfrq; +} + +/* + * Generic timer implementation of timer_read_counter() + */ +unsigned long timer_read_counter(void) +{ + unsigned long cntpct; + isb(); + asm volatile("mrs %0, cntpct_el0" : "=r" (cntpct)); + return cntpct; +} diff --git a/arch/arm/cpu/armv8/gic.S b/arch/arm/cpu/armv8/gic.S new file mode 100644 index 0000000000..599aa8f2ba --- /dev/null +++ b/arch/arm/cpu/armv8/gic.S @@ -0,0 +1,106 @@ +/* + * GIC Initialization Routines. + * + * (C) Copyright 2013 + * David Feng <fenghua@phytium.com.cn> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm-offsets.h> +#include <config.h> +#include <linux/linkage.h> +#include <asm/macro.h> +#include <asm/gic.h> + + +/************************************************************************* + * + * void gic_init(void) __attribute__((weak)); + * + * Currently, this routine only initialize secure copy of GIC + * with Security Extensions at EL3. + * + *************************************************************************/ +WEAK(gic_init) + branch_if_slave x0, 2f + + /* Initialize Distributor and SPIs */ + ldr x1, =GICD_BASE + mov w0, #0x3 /* EnableGrp0 | EnableGrp1 */ + str w0, [x1, GICD_CTLR] /* Secure GICD_CTLR */ + ldr w0, [x1, GICD_TYPER] + and w2, w0, #0x1f /* ITLinesNumber */ + cbz w2, 2f /* No SPIs */ + add x1, x1, (GICD_IGROUPRn + 4) + mov w0, #~0 /* Config SPIs as Grp1 */ +1: str w0, [x1], #0x4 + sub w2, w2, #0x1 + cbnz w2, 1b + + /* Initialize SGIs and PPIs */ +2: ldr x1, =GICD_BASE + mov w0, #~0 /* Config SGIs and PPIs as Grp1 */ + str w0, [x1, GICD_IGROUPRn] /* GICD_IGROUPR0 */ + mov w0, #0x1 /* Enable SGI 0 */ + str w0, [x1, GICD_ISENABLERn] + + /* Initialize Cpu Interface */ + ldr x1, =GICC_BASE + mov w0, #0x1e7 /* Disable IRQ/FIQ Bypass & */ + /* Enable Ack Group1 Interrupt & */ + /* EnableGrp0 & EnableGrp1 */ + str w0, [x1, GICC_CTLR] /* Secure GICC_CTLR */ + + mov w0, #0x1 << 7 /* Non-Secure access to GICC_PMR */ + str w0, [x1, GICC_PMR] + + ret +ENDPROC(gic_init) + + +/************************************************************************* + * + * void gic_send_sgi(u64 sgi) __attribute__((weak)); + * + *************************************************************************/ +WEAK(gic_send_sgi) + ldr x1, =GICD_BASE + mov w2, #0x8000 + movk w2, #0x100, lsl #16 + orr w2, w2, w0 + str w2, [x1, GICD_SGIR] + ret +ENDPROC(gic_send_sgi) + + +/************************************************************************* + * + * void wait_for_wakeup(void) __attribute__((weak)); + * + * Wait for SGI 0 from master. + * + *************************************************************************/ +WEAK(wait_for_wakeup) + ldr x1, =GICC_BASE +0: wfi + ldr w0, [x1, GICC_AIAR] + str w0, [x1, GICC_AEOIR] + cbnz w0, 0b + ret +ENDPROC(wait_for_wakeup) + + +/************************************************************************* + * + * void smp_kick_all_cpus(void) __attribute__((weak)); + * + *************************************************************************/ +WEAK(smp_kick_all_cpus) + /* Kick secondary cpus up by SGI 0 interrupt */ + mov x0, xzr /* SGI 0 */ + mov x29, lr /* Save LR */ + bl gic_send_sgi + mov lr, x29 /* Restore LR */ + ret +ENDPROC(smp_kick_all_cpus) diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S new file mode 100644 index 0000000000..bcc2603098 --- /dev/null +++ b/arch/arm/cpu/armv8/start.S @@ -0,0 +1,164 @@ +/* + * (C) Copyright 2013 + * David Feng <fenghua@phytium.com.cn> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm-offsets.h> +#include <config.h> +#include <version.h> +#include <linux/linkage.h> +#include <asm/macro.h> +#include <asm/armv8/mmu.h> + +/************************************************************************* + * + * Startup Code (reset vector) + * + *************************************************************************/ + +.globl _start +_start: + b reset + + .align 3 + +.globl _TEXT_BASE +_TEXT_BASE: + .quad CONFIG_SYS_TEXT_BASE + +/* + * These are defined in the linker script. + */ +.globl _end_ofs +_end_ofs: + .quad _end - _start + +.globl _bss_start_ofs +_bss_start_ofs: + .quad __bss_start - _start + +.globl _bss_end_ofs +_bss_end_ofs: + .quad __bss_end - _start + +reset: + /* + * Could be EL3/EL2/EL1, Initial State: + * Little Endian, MMU Disabled, i/dCache Disabled + */ + adr x0, vectors + switch_el x1, 3f, 2f, 1f +3: msr vbar_el3, x0 + msr cptr_el3, xzr /* Enable FP/SIMD */ + ldr x0, =COUNTER_FREQUENCY + msr cntfrq_el0, x0 /* Initialize CNTFRQ */ + b 0f +2: msr vbar_el2, x0 + mov x0, #0x33ff + msr cptr_el2, x0 /* Enable FP/SIMD */ + b 0f +1: msr vbar_el1, x0 + mov x0, #3 << 20 + msr cpacr_el1, x0 /* Enable FP/SIMD */ +0: + + /* Cache/BPB/TLB Invalidate */ + bl __asm_flush_dcache_all /* dCache clean&invalidate */ + bl __asm_invalidate_icache_all /* iCache invalidate */ + bl __asm_invalidate_tlb_all /* invalidate TLBs */ + + /* Processor specific initialization */ + bl lowlevel_init + + branch_if_master x0, x1, master_cpu + + /* + * Slave CPUs + */ +slave_cpu: + wfe + ldr x1, =CPU_RELEASE_ADDR + ldr x0, [x1] + cbz x0, slave_cpu + br x0 /* branch to the given address */ + + /* + * Master CPU + */ +master_cpu: + bl _main + +/*-----------------------------------------------------------------------*/ + +WEAK(lowlevel_init) + /* Initialize GIC Secure Bank Status */ + mov x29, lr /* Save LR */ + bl gic_init + + branch_if_master x0, x1, 1f + + /* + * Slave should wait for master clearing spin table. + * This sync prevent salves observing incorrect + * value of spin table and jumping to wrong place. + */ + bl wait_for_wakeup + + /* + * All processors will enter EL2 and optionally EL1. + */ + bl armv8_switch_to_el2 +#ifdef CONFIG_ARMV8_SWITCH_TO_EL1 + bl armv8_switch_to_el1 +#endif + +1: + mov lr, x29 /* Restore LR */ + ret +ENDPROC(lowlevel_init) + +/*-----------------------------------------------------------------------*/ + +ENTRY(c_runtime_cpu_setup) + /* If I-cache is enabled invalidate it */ +#ifndef CONFIG_SYS_ICACHE_OFF + ic iallu /* I+BTB cache invalidate */ + isb sy +#endif + +#ifndef CONFIG_SYS_DCACHE_OFF + /* + * Setup MAIR and TCR. + */ + ldr x0, =MEMORY_ATTRIBUTES + ldr x1, =TCR_FLAGS + + switch_el x2, 3f, 2f, 1f +3: orr x1, x1, TCR_EL3_IPS_BITS + msr mair_el3, x0 + msr tcr_el3, x1 + b 0f +2: orr x1, x1, TCR_EL2_IPS_BITS + msr mair_el2, x0 + msr tcr_el2, x1 + b 0f +1: orr x1, x1, TCR_EL1_IPS_BITS + msr mair_el1, x0 + msr tcr_el1, x1 +0: +#endif + + /* Relocate vBAR */ + adr x0, vectors + switch_el x1, 3f, 2f, 1f +3: msr vbar_el3, x0 + b 0f +2: msr vbar_el2, x0 + b 0f +1: msr vbar_el1, x0 +0: + + ret +ENDPROC(c_runtime_cpu_setup) diff --git a/arch/arm/cpu/armv8/tlb.S b/arch/arm/cpu/armv8/tlb.S new file mode 100644 index 0000000000..f840b04df5 --- /dev/null +++ b/arch/arm/cpu/armv8/tlb.S @@ -0,0 +1,34 @@ +/* + * (C) Copyright 2013 + * David Feng <fenghua@phytium.com.cn> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm-offsets.h> +#include <config.h> +#include <version.h> +#include <linux/linkage.h> +#include <asm/macro.h> + +/* + * void __asm_invalidate_tlb_all(void) + * + * invalidate all tlb entries. + */ +ENTRY(__asm_invalidate_tlb_all) + switch_el x9, 3f, 2f, 1f +3: tlbi alle3 + dsb sy + isb + b 0f +2: tlbi alle2 + dsb sy + isb + b 0f +1: tlbi vmalle1 + dsb sy + isb +0: + ret +ENDPROC(__asm_invalidate_tlb_all) diff --git a/arch/arm/cpu/armv8/transition.S b/arch/arm/cpu/armv8/transition.S new file mode 100644 index 0000000000..e0a5946009 --- /dev/null +++ b/arch/arm/cpu/armv8/transition.S @@ -0,0 +1,83 @@ +/* + * (C) Copyright 2013 + * David Feng <fenghua@phytium.com.cn> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm-offsets.h> +#include <config.h> +#include <version.h> +#include <linux/linkage.h> +#include <asm/macro.h> + +ENTRY(armv8_switch_to_el2) + switch_el x0, 1f, 0f, 0f +0: ret +1: + mov x0, #0x5b1 /* Non-secure EL0/EL1 | HVC | 64bit EL2 */ + msr scr_el3, x0 + msr cptr_el3, xzr /* Disable coprocessor traps to EL3 */ + mov x0, #0x33ff + msr cptr_el2, x0 /* Disable coprocessor traps to EL2 */ + + /* Initialize SCTLR_EL2 */ + msr sctlr_el2, xzr + + /* Return to the EL2_SP2 mode from EL3 */ + mov x0, sp + msr sp_el2, x0 /* Migrate SP */ + mrs x0, vbar_el3 + msr vbar_el2, x0 /* Migrate VBAR */ + mov x0, #0x3c9 + msr spsr_el3, x0 /* EL2_SP2 | D | A | I | F */ + msr elr_el3, lr + eret +ENDPROC(armv8_switch_to_el2) + +ENTRY(armv8_switch_to_el1) + switch_el x0, 0f, 1f, 0f +0: ret +1: + /* Initialize Generic Timers */ + mrs x0, cnthctl_el2 + orr x0, x0, #0x3 /* Enable EL1 access to timers */ + msr cnthctl_el2, x0 + msr cntvoff_el2, x0 + mrs x0, cntkctl_el1 + orr x0, x0, #0x3 /* Enable EL0 access to timers */ + msr cntkctl_el1, x0 + + /* Initilize MPID/MPIDR registers */ + mrs x0, midr_el1 + mrs x1, mpidr_el1 + msr vpidr_el2, x0 + msr vmpidr_el2, x1 + + /* Disable coprocessor traps */ + mov x0, #0x33ff + msr cptr_el2, x0 /* Disable coprocessor traps to EL2 */ + msr hstr_el2, xzr /* Disable coprocessor traps to EL2 */ + mov x0, #3 << 20 + msr cpacr_el1, x0 /* Enable FP/SIMD at EL1 */ + + /* Initialize HCR_EL2 */ + mov x0, #(1 << 31) /* 64bit EL1 */ + orr x0, x0, #(1 << 29) /* Disable HVC */ + msr hcr_el2, x0 + + /* SCTLR_EL1 initialization */ + mov x0, #0x0800 + movk x0, #0x30d0, lsl #16 + msr sctlr_el1, x0 + + /* Return to the EL1_SP1 mode from EL2 */ + mov x0, sp + msr sp_el1, x0 /* Migrate SP */ + mrs x0, vbar_el2 + msr vbar_el1, x0 /* Migrate VBAR */ + mov x0, #0x3c5 + msr spsr_el2, x0 /* EL1_SP1 | D | A | I | F */ + msr elr_el2, lr + eret +ENDPROC(armv8_switch_to_el1) diff --git a/arch/arm/cpu/armv8/u-boot.lds b/arch/arm/cpu/armv8/u-boot.lds new file mode 100644 index 0000000000..4c12222370 --- /dev/null +++ b/arch/arm/cpu/armv8/u-boot.lds @@ -0,0 +1,89 @@ +/* + * (C) Copyright 2013 + * David Feng <fenghua@phytium.com.cn> + * + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +OUTPUT_FORMAT("elf64-littleaarch64", "elf64-littleaarch64", "elf64-littleaarch64") +OUTPUT_ARCH(aarch64) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(8); + .text : + { + *(.__image_copy_start) + CPUDIR/start.o (.text*) + *(.text*) + } + + . = ALIGN(8); + .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } + + . = ALIGN(8); + .data : { + *(.data*) + } + + . = ALIGN(8); + + . = .; + + . = ALIGN(8); + .u_boot_list : { + KEEP(*(SORT(.u_boot_list*))); + } + + . = ALIGN(8); + + .image_copy_end : + { + *(.__image_copy_end) + } + + . = ALIGN(8); + + .rel_dyn_start : + { + *(.__rel_dyn_start) + } + + .rela.dyn : { + *(.rela*) + } + + .rel_dyn_end : + { + *(.__rel_dyn_end) + } + + _end = .; + + . = ALIGN(8); + + .bss_start : { + KEEP(*(.__bss_start)); + } + + .bss : { + *(.bss*) + . = ALIGN(8); + } + + .bss_end : { + KEEP(*(.__bss_end)); + } + + /DISCARD/ : { *(.dynsym) } + /DISCARD/ : { *(.dynstr*) } + /DISCARD/ : { *(.dynamic*) } + /DISCARD/ : { *(.plt*) } + /DISCARD/ : { *(.interp*) } + /DISCARD/ : { *(.gnu*) } +} diff --git a/arch/arm/cpu/pxa/config.mk b/arch/arm/cpu/pxa/config.mk index d8d263d404..f2befbe515 100644 --- a/arch/arm/cpu/pxa/config.mk +++ b/arch/arm/cpu/pxa/config.mk @@ -14,3 +14,16 @@ PLATFORM_CPPFLAGS += -mcpu=xscale # ======================================================================== PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT) + +# +# !WARNING! +# The PXA's OneNAND SPL uses .text.0 and .text.1 segments to allow booting from +# really small OneNAND memories where the mmap'd window is only 1KiB big. The +# .text.0 contains only the bare minimum needed to load the real SPL into SRAM. +# Add .text.0 and .text.1 into OBJFLAGS, so when the SPL is being objcopy'd, +# they are not discarded. +# + +#ifdef CONFIG_SPL_BUILD +OBJCFLAGS += -j .text.0 -j .text.1 +#endif diff --git a/arch/arm/cpu/pxa/timer.c b/arch/arm/cpu/pxa/timer.c index 78d9f32745..c4717de6a9 100644 --- a/arch/arm/cpu/pxa/timer.c +++ b/arch/arm/cpu/pxa/timer.c @@ -28,12 +28,12 @@ DECLARE_GLOBAL_DATA_PTR; static unsigned long long tick_to_time(unsigned long long tick) { - return tick * CONFIG_SYS_HZ / TIMER_FREQ_HZ; + return lldiv(tick * CONFIG_SYS_HZ, TIMER_FREQ_HZ); } static unsigned long long us_to_tick(unsigned long long us) { - return (us * TIMER_FREQ_HZ) / 1000000; + return lldiv(us * TIMER_FREQ_HZ, 1000000); } int timer_init(void) diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds index 9463a33dcb..4da5d246e0 100644 --- a/arch/arm/cpu/u-boot.lds +++ b/arch/arm/cpu/u-boot.lds @@ -92,8 +92,6 @@ SECTIONS } .dynsym _end : { *(.dynsym) } - .hash : { *(.hash) } - .got.plt : { *(.got.plt) } .dynbss : { *(.dynbss) } .dynstr : { *(.dynstr*) } .dynamic : { *(.dynamic*) } @@ -101,4 +99,5 @@ SECTIONS .interp : { *(.interp*) } .gnu : { *(.gnu*) } .ARM.exidx : { *(.ARM.exidx*) } + .gnu.linkonce.armexidx : { *(.gnu.linkonce.armexidx.*) } } diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi new file mode 100644 index 0000000000..f20b8bd604 --- /dev/null +++ b/arch/arm/dts/zynq-7000.dtsi @@ -0,0 +1,13 @@ +/* + * Xilinx Zynq 7000 DTSI + * Describes the hardware common to all Zynq 7000-based boards. + * + * Copyright (C) 2013 Xilinx, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/include/ "skeleton.dtsi" + +/ { + compatible = "xlnx,zynq-7000"; +}; diff --git a/arch/arm/include/asm/arch-socfpga/dwmmc.h b/arch/arm/include/asm/arch-socfpga/dwmmc.h new file mode 100644 index 0000000000..945eb646ce --- /dev/null +++ b/arch/arm/include/asm/arch-socfpga/dwmmc.h @@ -0,0 +1,12 @@ +/* + * (C) Copyright 2013 Altera Corporation <www.altera.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _SOCFPGA_DWMMC_H_ +#define _SOCFPGA_DWMMC_H_ + +extern int socfpga_dwmmc_init(u32 regbase, int bus_width, int index); + +#endif /* _SOCFPGA_SDMMC_H_ */ diff --git a/arch/arm/include/asm/arch-socfpga/system_manager.h b/arch/arm/include/asm/arch-socfpga/system_manager.h index d965d25eff..838d21053e 100644 --- a/arch/arm/include/asm/arch-socfpga/system_manager.h +++ b/arch/arm/include/asm/arch-socfpga/system_manager.h @@ -19,4 +19,69 @@ extern unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM]; #define CONFIG_SYSMGR_PINMUXGRP_OFFSET (0x400) +#define SYSMGR_SDMMC_CTRL_SET(smplsel, drvsel) \ + ((((drvsel) << 0) & 0x7) | (((smplsel) << 3) & 0x38)) + +struct socfpga_system_manager { + u32 siliconid1; + u32 siliconid2; + u32 _pad_0x8_0xf[2]; + u32 wddbg; + u32 bootinfo; + u32 hpsinfo; + u32 parityinj; + u32 fpgaintfgrp_gbl; + u32 fpgaintfgrp_indiv; + u32 fpgaintfgrp_module; + u32 _pad_0x2c_0x2f; + u32 scanmgrgrp_ctrl; + u32 _pad_0x34_0x3f[3]; + u32 frzctrl_vioctrl; + u32 _pad_0x44_0x4f[3]; + u32 frzctrl_hioctrl; + u32 frzctrl_src; + u32 frzctrl_hwctrl; + u32 _pad_0x5c_0x5f; + u32 emacgrp_ctrl; + u32 emacgrp_l3master; + u32 _pad_0x68_0x6f[2]; + u32 dmagrp_ctrl; + u32 dmagrp_persecurity; + u32 _pad_0x78_0x7f[2]; + u32 iswgrp_handoff[8]; + u32 _pad_0xa0_0xbf[8]; + u32 romcodegrp_ctrl; + u32 romcodegrp_cpu1startaddr; + u32 romcodegrp_initswstate; + u32 romcodegrp_initswlastld; + u32 romcodegrp_bootromswstate; + u32 __pad_0xd4_0xdf[3]; + u32 romcodegrp_warmramgrp_enable; + u32 romcodegrp_warmramgrp_datastart; + u32 romcodegrp_warmramgrp_length; + u32 romcodegrp_warmramgrp_execution; + u32 romcodegrp_warmramgrp_crc; + u32 __pad_0xf4_0xff[3]; + u32 romhwgrp_ctrl; + u32 _pad_0x104_0x107; + u32 sdmmcgrp_ctrl; + u32 sdmmcgrp_l3master; + u32 nandgrp_bootstrap; + u32 nandgrp_l3master; + u32 usbgrp_l3master; + u32 _pad_0x11c_0x13f[9]; + u32 eccgrp_l2; + u32 eccgrp_ocram; + u32 eccgrp_usb0; + u32 eccgrp_usb1; + u32 eccgrp_emac0; + u32 eccgrp_emac1; + u32 eccgrp_dma; + u32 eccgrp_can0; + u32 eccgrp_can1; + u32 eccgrp_nand; + u32 eccgrp_qspi; + u32 eccgrp_sdmmc; +}; + #endif /* _SYSTEM_MANAGER_H_ */ diff --git a/arch/arm/include/asm/arch-zynq/gpio.h b/arch/arm/include/asm/arch-zynq/gpio.h new file mode 100644 index 0000000000..2dbba756d7 --- /dev/null +++ b/arch/arm/include/asm/arch-zynq/gpio.h @@ -0,0 +1,25 @@ +/* + * Copyright (c) 2013 Xilinx, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _ZYNQ_GPIO_H +#define _ZYNQ_GPIO_H + +inline int gpio_get_value(unsigned gpio) +{ + return 0; +} + +inline int gpio_set_value(unsigned gpio, int val) +{ + return 0; +} + +inline int gpio_request(unsigned gpio, const char *label) +{ + return 0; +} + +#endif /* _ZYNQ_GPIO_H */ diff --git a/arch/arm/include/asm/arch-zynq/sys_proto.h b/arch/arm/include/asm/arch-zynq/sys_proto.h index 110de90922..8f925af8a4 100644 --- a/arch/arm/include/asm/arch-zynq/sys_proto.h +++ b/arch/arm/include/asm/arch-zynq/sys_proto.h @@ -13,6 +13,7 @@ extern void zynq_slcr_cpu_reset(void); extern void zynq_slcr_gem_clk_setup(u32 gem_id, u32 rclk, u32 clk); extern void zynq_slcr_devcfg_disable(void); extern void zynq_slcr_devcfg_enable(void); +extern u32 zynq_slcr_get_boot_mode(void); extern u32 zynq_slcr_get_idcode(void); extern void zynq_ddrc_init(void); diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h new file mode 100644 index 0000000000..1193e76a82 --- /dev/null +++ b/arch/arm/include/asm/armv8/mmu.h @@ -0,0 +1,111 @@ +/* + * (C) Copyright 2013 + * David Feng <fenghua@phytium.com.cn> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _ASM_ARMV8_MMU_H_ +#define _ASM_ARMV8_MMU_H_ + +#ifdef __ASSEMBLY__ +#define _AC(X, Y) X +#else +#define _AC(X, Y) (X##Y) +#endif + +#define UL(x) _AC(x, UL) + +/***************************************************************/ +/* + * The following definitions are related each other, shoud be + * calculated specifically. + */ +#define VA_BITS (42) /* 42 bits virtual address */ + +/* PAGE_SHIFT determines the page size */ +#undef PAGE_SIZE +#define PAGE_SHIFT 16 +#define PAGE_SIZE (1 << PAGE_SHIFT) +#define PAGE_MASK (~(PAGE_SIZE-1)) + +/* + * section address mask and size definitions. + */ +#define SECTION_SHIFT 29 +#define SECTION_SIZE (UL(1) << SECTION_SHIFT) +#define SECTION_MASK (~(SECTION_SIZE-1)) +/***************************************************************/ + +/* + * Memory types + */ +#define MT_DEVICE_NGNRNE 0 +#define MT_DEVICE_NGNRE 1 +#define MT_DEVICE_GRE 2 +#define MT_NORMAL_NC 3 +#define MT_NORMAL 4 + +#define MEMORY_ATTRIBUTES ((0x00 << (MT_DEVICE_NGNRNE*8)) | \ + (0x04 << (MT_DEVICE_NGNRE*8)) | \ + (0x0c << (MT_DEVICE_GRE*8)) | \ + (0x44 << (MT_NORMAL_NC*8)) | \ + (UL(0xff) << (MT_NORMAL*8))) + +/* + * Hardware page table definitions. + * + * Level 2 descriptor (PMD). + */ +#define PMD_TYPE_MASK (3 << 0) +#define PMD_TYPE_FAULT (0 << 0) +#define PMD_TYPE_TABLE (3 << 0) +#define PMD_TYPE_SECT (1 << 0) + +/* + * Section + */ +#define PMD_SECT_S (3 << 8) +#define PMD_SECT_AF (1 << 10) +#define PMD_SECT_NG (1 << 11) +#define PMD_SECT_PXN (UL(1) << 53) +#define PMD_SECT_UXN (UL(1) << 54) + +/* + * AttrIndx[2:0] + */ +#define PMD_ATTRINDX(t) ((t) << 2) +#define PMD_ATTRINDX_MASK (7 << 2) + +/* + * TCR flags. + */ +#define TCR_T0SZ(x) ((64 - (x)) << 0) +#define TCR_IRGN_NC (0 << 8) +#define TCR_IRGN_WBWA (1 << 8) +#define TCR_IRGN_WT (2 << 8) +#define TCR_IRGN_WBNWA (3 << 8) +#define TCR_IRGN_MASK (3 << 8) +#define TCR_ORGN_NC (0 << 10) +#define TCR_ORGN_WBWA (1 << 10) +#define TCR_ORGN_WT (2 << 10) +#define TCR_ORGN_WBNWA (3 << 10) +#define TCR_ORGN_MASK (3 << 10) +#define TCR_SHARED_NON (0 << 12) +#define TCR_SHARED_OUTER (1 << 12) +#define TCR_SHARED_INNER (2 << 12) +#define TCR_TG0_4K (0 << 14) +#define TCR_TG0_64K (1 << 14) +#define TCR_TG0_16K (2 << 14) +#define TCR_EL1_IPS_BITS (UL(3) << 32) /* 42 bits physical address */ +#define TCR_EL2_IPS_BITS (3 << 16) /* 42 bits physical address */ +#define TCR_EL3_IPS_BITS (3 << 16) /* 42 bits physical address */ + +/* PTWs cacheable, inner/outer WBWA and non-shareable */ +#define TCR_FLAGS (TCR_TG0_64K | \ + TCR_SHARED_NON | \ + TCR_ORGN_WBWA | \ + TCR_IRGN_WBWA | \ + TCR_T0SZ(VA_BITS)) + +#endif /* _ASM_ARMV8_MMU_H_ */ diff --git a/arch/arm/include/asm/byteorder.h b/arch/arm/include/asm/byteorder.h index c3489f1e1f..20cce7657e 100644 --- a/arch/arm/include/asm/byteorder.h +++ b/arch/arm/include/asm/byteorder.h @@ -23,7 +23,7 @@ # define __SWAB_64_THRU_32__ #endif -#ifdef __ARMEB__ +#if defined(__ARMEB__) || defined(__AARCH64EB__) #include <linux/byteorder/big_endian.h> #else #include <linux/byteorder/little_endian.h> diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h index 6d60a4a6d9..ddebbc8fcd 100644 --- a/arch/arm/include/asm/cache.h +++ b/arch/arm/include/asm/cache.h @@ -11,6 +11,8 @@ #include <asm/system.h> +#ifndef CONFIG_ARM64 + /* * Invalidate L2 Cache using co-proc instruction */ @@ -28,6 +30,9 @@ void l2_cache_disable(void); void set_section_dcache(int section, enum dcache_option option); void dram_bank_mmu_setup(int bank); + +#endif + /* * The current upper bound for ARM L1 data cache line sizes is 64 bytes. We * use that value for aligning DMA buffers unless the board config has specified diff --git a/arch/arm/include/asm/config.h b/arch/arm/include/asm/config.h index 99b703e1e4..abf79e5c9e 100644 --- a/arch/arm/include/asm/config.h +++ b/arch/arm/include/asm/config.h @@ -9,4 +9,10 @@ #define CONFIG_LMB #define CONFIG_SYS_BOOT_RAMDISK_HIGH + +#ifdef CONFIG_ARM64 +#define CONFIG_PHYS_64BIT +#define CONFIG_STATIC_RELA +#endif + #endif diff --git a/arch/arm/include/asm/gic.h b/arch/arm/include/asm/gic.h index a0891cc09c..ac2b2bfbed 100644 --- a/arch/arm/include/asm/gic.h +++ b/arch/arm/include/asm/gic.h @@ -1,19 +1,54 @@ -#ifndef __GIC_V2_H__ -#define __GIC_V2_H__ +#ifndef __GIC_H__ +#define __GIC_H__ -/* register offsets for the ARM generic interrupt controller (GIC) */ +/* Register offsets for the ARM generic interrupt controller (GIC) */ #define GIC_DIST_OFFSET 0x1000 +#define GIC_CPU_OFFSET_A9 0x0100 +#define GIC_CPU_OFFSET_A15 0x2000 + +/* Distributor Registers */ #define GICD_CTLR 0x0000 #define GICD_TYPER 0x0004 +#define GICD_IIDR 0x0008 +#define GICD_STATUSR 0x0010 +#define GICD_SETSPI_NSR 0x0040 +#define GICD_CLRSPI_NSR 0x0048 +#define GICD_SETSPI_SR 0x0050 +#define GICD_CLRSPI_SR 0x0058 +#define GICD_SEIR 0x0068 #define GICD_IGROUPRn 0x0080 -#define GICD_SGIR 0x0F00 +#define GICD_ISENABLERn 0x0100 +#define GICD_ICENABLERn 0x0180 +#define GICD_ISPENDRn 0x0200 +#define GICD_ICPENDRn 0x0280 +#define GICD_ISACTIVERn 0x0300 +#define GICD_ICACTIVERn 0x0380 +#define GICD_IPRIORITYRn 0x0400 +#define GICD_ITARGETSRn 0x0800 +#define GICD_ICFGR 0x0c00 +#define GICD_IGROUPMODRn 0x0d00 +#define GICD_NSACRn 0x0e00 +#define GICD_SGIR 0x0f00 +#define GICD_CPENDSGIRn 0x0f10 +#define GICD_SPENDSGIRn 0x0f20 +#define GICD_IROUTERn 0x6000 -#define GIC_CPU_OFFSET_A9 0x0100 -#define GIC_CPU_OFFSET_A15 0x2000 +/* Cpu Interface Memory Mapped Registers */ #define GICC_CTLR 0x0000 #define GICC_PMR 0x0004 +#define GICC_BPR 0x0008 #define GICC_IAR 0x000C #define GICC_EOIR 0x0010 +#define GICC_RPR 0x0014 +#define GICC_HPPIR 0x0018 +#define GICC_ABPR 0x001c +#define GICC_AIAR 0x0020 +#define GICC_AEOIR 0x0024 +#define GICC_AHPPIR 0x0028 +#define GICC_APRn 0x00d0 +#define GICC_NSAPRn 0x00e0 +#define GICC_IIDR 0x00fc +#define GICC_DIR 0x1000 -#endif +#endif /* __GIC_H__ */ diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index e126436093..60e872637f 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -47,6 +47,10 @@ struct arch_global_data { #include <asm-generic/global_data.h> -#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r9") +#ifdef CONFIG_ARM64 +#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("x18") +#else +#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r9") +#endif #endif /* __ASM_GBL_DATA_H */ diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index 1fbc531a08..6a1f05ac3e 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -75,42 +75,45 @@ static inline phys_addr_t virt_to_phys(void * vaddr) #define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v)) #define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v)) -extern inline void __raw_writesb(unsigned int addr, const void *data, int bytelen) +extern inline void __raw_writesb(unsigned long addr, const void *data, + int bytelen) { uint8_t *buf = (uint8_t *)data; while(bytelen--) __arch_putb(*buf++, addr); } -extern inline void __raw_writesw(unsigned int addr, const void *data, int wordlen) +extern inline void __raw_writesw(unsigned long addr, const void *data, + int wordlen) { uint16_t *buf = (uint16_t *)data; while(wordlen--) __arch_putw(*buf++, addr); } -extern inline void __raw_writesl(unsigned int addr, const void *data, int longlen) +extern inline void __raw_writesl(unsigned long addr, const void *data, + int longlen) { uint32_t *buf = (uint32_t *)data; while(longlen--) __arch_putl(*buf++, addr); } -extern inline void __raw_readsb(unsigned int addr, void *data, int bytelen) +extern inline void __raw_readsb(unsigned long addr, void *data, int bytelen) { uint8_t *buf = (uint8_t *)data; while(bytelen--) *buf++ = __arch_getb(addr); } -extern inline void __raw_readsw(unsigned int addr, void *data, int wordlen) +extern inline void __raw_readsw(unsigned long addr, void *data, int wordlen) { uint16_t *buf = (uint16_t *)data; while(wordlen--) *buf++ = __arch_getw(addr); } -extern inline void __raw_readsl(unsigned int addr, void *data, int longlen) +extern inline void __raw_readsl(unsigned long addr, void *data, int longlen) { uint32_t *buf = (uint32_t *)data; while(longlen--) diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h index ff13f36ba0..f77e4b880e 100644 --- a/arch/arm/include/asm/macro.h +++ b/arch/arm/include/asm/macro.h @@ -54,5 +54,58 @@ bcs 1b .endm +#ifdef CONFIG_ARM64 +/* + * Register aliases. + */ +lr .req x30 + +/* + * Branch according to exception level + */ +.macro switch_el, xreg, el3_label, el2_label, el1_label + mrs \xreg, CurrentEL + cmp \xreg, 0xc + b.eq \el3_label + cmp \xreg, 0x8 + b.eq \el2_label + cmp \xreg, 0x4 + b.eq \el1_label +.endm + +/* + * Branch if current processor is a slave, + * choose processor with all zero affinity value as the master. + */ +.macro branch_if_slave, xreg, slave_label + mrs \xreg, mpidr_el1 + tst \xreg, #0xff /* Test Affinity 0 */ + b.ne \slave_label + lsr \xreg, \xreg, #8 + tst \xreg, #0xff /* Test Affinity 1 */ + b.ne \slave_label + lsr \xreg, \xreg, #8 + tst \xreg, #0xff /* Test Affinity 2 */ + b.ne \slave_label + lsr \xreg, \xreg, #16 + tst \xreg, #0xff /* Test Affinity 3 */ + b.ne \slave_label +.endm + +/* + * Branch if current processor is a master, + * choose processor with all zero affinity value as the master. + */ +.macro branch_if_master, xreg1, xreg2, master_label + mrs \xreg1, mpidr_el1 + lsr \xreg2, \xreg1, #32 + lsl \xreg1, \xreg1, #40 + lsr \xreg1, \xreg1, #40 + orr \xreg1, \xreg1, \xreg2 + cbz \xreg1, \master_label +.endm + +#endif /* CONFIG_ARM64 */ + #endif /* __ASSEMBLY__ */ #endif /* __ASM_ARM_MACRO_H__ */ diff --git a/arch/arm/include/asm/posix_types.h b/arch/arm/include/asm/posix_types.h index c412486db5..d254b95b2a 100644 --- a/arch/arm/include/asm/posix_types.h +++ b/arch/arm/include/asm/posix_types.h @@ -28,9 +28,17 @@ typedef int __kernel_pid_t; typedef unsigned short __kernel_ipc_pid_t; typedef unsigned short __kernel_uid_t; typedef unsigned short __kernel_gid_t; + +#ifdef __aarch64__ +typedef unsigned long __kernel_size_t; +typedef long __kernel_ssize_t; +typedef long __kernel_ptrdiff_t; +#else typedef unsigned int __kernel_size_t; typedef int __kernel_ssize_t; typedef int __kernel_ptrdiff_t; +#endif + typedef long __kernel_time_t; typedef long __kernel_suseconds_t; typedef long __kernel_clock_t; diff --git a/arch/arm/include/asm/proc-armv/ptrace.h b/arch/arm/include/asm/proc-armv/ptrace.h index a060ee67e3..21aef58b7b 100644 --- a/arch/arm/include/asm/proc-armv/ptrace.h +++ b/arch/arm/include/asm/proc-armv/ptrace.h @@ -10,6 +10,25 @@ #ifndef __ASM_PROC_PTRACE_H #define __ASM_PROC_PTRACE_H +#ifdef CONFIG_ARM64 + +#define PCMASK 0 + +#ifndef __ASSEMBLY__ + +/* + * This struct defines the way the registers are stored + * on the stack during an exception. + */ +struct pt_regs { + unsigned long elr; + unsigned long regs[31]; +}; + +#endif /* __ASSEMBLY__ */ + +#else /* CONFIG_ARM64 */ + #define USR26_MODE 0x00 #define FIQ26_MODE 0x01 #define IRQ26_MODE 0x02 @@ -104,4 +123,6 @@ static inline int valid_user_regs(struct pt_regs *regs) #endif /* __ASSEMBLY__ */ +#endif /* CONFIG_ARM64 */ + #endif diff --git a/arch/arm/include/asm/proc-armv/system.h b/arch/arm/include/asm/proc-armv/system.h index cda8976b6a..693d1f4921 100644 --- a/arch/arm/include/asm/proc-armv/system.h +++ b/arch/arm/include/asm/proc-armv/system.h @@ -13,6 +13,60 @@ /* * Save the current interrupt enable state & disable IRQs */ +#ifdef CONFIG_ARM64 + +/* + * Save the current interrupt enable state + * and disable IRQs/FIQs + */ +#define local_irq_save(flags) \ + ({ \ + asm volatile( \ + "mrs %0, daif" \ + "msr daifset, #3" \ + : "=r" (flags) \ + : \ + : "memory"); \ + }) + +/* + * restore saved IRQ & FIQ state + */ +#define local_irq_restore(flags) \ + ({ \ + asm volatile( \ + "msr daif, %0" \ + : \ + : "r" (flags) \ + : "memory"); \ + }) + +/* + * Enable IRQs/FIQs + */ +#define local_irq_enable() \ + ({ \ + asm volatile( \ + "msr daifclr, #3" \ + : \ + : \ + : "memory"); \ + }) + +/* + * Disable IRQs/FIQs + */ +#define local_irq_disable() \ + ({ \ + asm volatile( \ + "msr daifset, #3" \ + : \ + : \ + : "memory"); \ + }) + +#else /* CONFIG_ARM64 */ + #define local_irq_save(x) \ ({ \ unsigned long temp; \ @@ -107,7 +161,10 @@ : "r" (x) \ : "memory") -#if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110) +#endif /* CONFIG_ARM64 */ + +#if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110) || \ + defined(CONFIG_ARM64) /* * On the StrongARM, "swp" is terminally broken since it bypasses the * cache totally. This means that the cache becomes inconsistent, and, diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 760345f847..4178f8cf7e 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -1,6 +1,86 @@ #ifndef __ASM_ARM_SYSTEM_H #define __ASM_ARM_SYSTEM_H +#ifdef CONFIG_ARM64 + +/* + * SCTLR_EL1/SCTLR_EL2/SCTLR_EL3 bits definitions + */ +#define CR_M (1 << 0) /* MMU enable */ +#define CR_A (1 << 1) /* Alignment abort enable */ +#define CR_C (1 << 2) /* Dcache enable */ +#define CR_SA (1 << 3) /* Stack Alignment Check Enable */ +#define CR_I (1 << 12) /* Icache enable */ +#define CR_WXN (1 << 19) /* Write Permision Imply XN */ +#define CR_EE (1 << 25) /* Exception (Big) Endian */ + +#define PGTABLE_SIZE (0x10000) + +#ifndef __ASSEMBLY__ + +#define isb() \ + ({asm volatile( \ + "isb" : : : "memory"); \ + }) + +#define wfi() \ + ({asm volatile( \ + "wfi" : : : "memory"); \ + }) + +static inline unsigned int current_el(void) +{ + unsigned int el; + asm volatile("mrs %0, CurrentEL" : "=r" (el) : : "cc"); + return el >> 2; +} + +static inline unsigned int get_sctlr(void) +{ + unsigned int el, val; + + el = current_el(); + if (el == 1) + asm volatile("mrs %0, sctlr_el1" : "=r" (val) : : "cc"); + else if (el == 2) + asm volatile("mrs %0, sctlr_el2" : "=r" (val) : : "cc"); + else + asm volatile("mrs %0, sctlr_el3" : "=r" (val) : : "cc"); + + return val; +} + +static inline void set_sctlr(unsigned int val) +{ + unsigned int el; + + el = current_el(); + if (el == 1) + asm volatile("msr sctlr_el1, %0" : : "r" (val) : "cc"); + else if (el == 2) + asm volatile("msr sctlr_el2, %0" : : "r" (val) : "cc"); + else + asm volatile("msr sctlr_el3, %0" : : "r" (val) : "cc"); + + asm volatile("isb"); +} + +void __asm_flush_dcache_all(void); +void __asm_flush_dcache_range(u64 start, u64 end); +void __asm_invalidate_tlb_all(void); +void __asm_invalidate_icache_all(void); + +void armv8_switch_to_el2(void); +void armv8_switch_to_el1(void); +void gic_init(void); +void gic_send_sgi(unsigned long sgino); +void wait_for_wakeup(void); +void smp_kick_all_cpus(void); + +#endif /* __ASSEMBLY__ */ + +#else /* CONFIG_ARM64 */ + #ifdef __KERNEL__ #define CPU_ARCH_UNKNOWN 0 @@ -45,6 +125,8 @@ #define CR_AFE (1 << 29) /* Access flag enable */ #define CR_TE (1 << 30) /* Thumb exception enable */ +#define PGTABLE_SIZE (4096 * 4) + /* * This is used to ensure the compiler did actually allocate the register we * asked it for some inline assembly sequences. Apparently we can't trust @@ -132,4 +214,6 @@ void mmu_page_table_flush(unsigned long start, unsigned long stop); #endif /* __KERNEL__ */ +#endif /* CONFIG_ARM64 */ + #endif diff --git a/arch/arm/include/asm/types.h b/arch/arm/include/asm/types.h index 71dc049da6..2326420a7f 100644 --- a/arch/arm/include/asm/types.h +++ b/arch/arm/include/asm/types.h @@ -39,7 +39,11 @@ typedef unsigned int u32; typedef signed long long s64; typedef unsigned long long u64; +#ifdef CONFIG_ARM64 +#define BITS_PER_LONG 64 +#else /* CONFIG_ARM64 */ #define BITS_PER_LONG 32 +#endif /* CONFIG_ARM64 */ /* Dma addresses are 32-bits wide. */ diff --git a/arch/arm/include/asm/u-boot.h b/arch/arm/include/asm/u-boot.h index 2b5fce86ab..cb81232b83 100644 --- a/arch/arm/include/asm/u-boot.h +++ b/arch/arm/include/asm/u-boot.h @@ -44,6 +44,10 @@ typedef struct bd_info { #endif /* !CONFIG_SYS_GENERIC_BOARD */ /* For image.h:image_check_target_arch() */ +#ifndef CONFIG_ARM64 #define IH_ARCH_DEFAULT IH_ARCH_ARM +#else +#define IH_ARCH_DEFAULT IH_ARCH_ARM64 +#endif #endif /* _U_BOOT_H_ */ diff --git a/arch/arm/include/asm/unaligned.h b/arch/arm/include/asm/unaligned.h index 44593a8949..0a228fb8ee 100644 --- a/arch/arm/include/asm/unaligned.h +++ b/arch/arm/include/asm/unaligned.h @@ -8,7 +8,7 @@ /* * Select endianness */ -#ifndef __ARMEB__ +#if __BYTE_ORDER == __LITTLE_ENDIAN #define get_unaligned __get_unaligned_le #define put_unaligned __put_unaligned_le #else diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index 679f19a233..321997c332 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -17,14 +17,22 @@ lib-y += _umodsi3.o lib-y += div0.o endif -obj-y += crt0.o +ifdef CONFIG_ARM64 +obj-y += crt0_64.o +else +obj-y += crt0.o +endif ifndef CONFIG_SPL_BUILD -obj-y += relocate.o +ifdef CONFIG_ARM64 +obj-y += relocate_64.o +else +obj-y += relocate.o +endif ifndef CONFIG_SYS_GENERIC_BOARD obj-y += board.o endif -obj-y += sections.o +obj-y += sections.o obj-$(CONFIG_OF_LIBFDT) += bootm-fdt.o obj-$(CONFIG_CMD_BOOTM) += bootm.o @@ -35,11 +43,17 @@ else obj-$(CONFIG_SPL_FRAMEWORK) += spl.o endif +ifdef CONFIG_ARM64 +obj-y += interrupts_64.o +else obj-y += interrupts.o +endif obj-y += reset.o obj-y += cache.o +ifndef CONFIG_ARM64 obj-y += cache-cp15.o +endif # For EABI conformant tool chains, provide eabi_compat() ifneq (,$(findstring -mabi=aapcs-linux,$(PLATFORM_CPPFLAGS))) diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c index 9c72a5353f..b770e25d87 100644 --- a/arch/arm/lib/board.c +++ b/arch/arm/lib/board.c @@ -344,7 +344,7 @@ void board_init_f(ulong bootflag) #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) /* reserve TLB table */ - gd->arch.tlb_size = 4096 * 4; + gd->arch.tlb_size = PGTABLE_SIZE; addr -= gd->arch.tlb_size; /* round down to next 64 kB limit */ @@ -419,6 +419,7 @@ void board_init_f(ulong bootflag) } #endif +#ifndef CONFIG_ARM64 /* setup stackpointer for exeptions */ gd->irq_sp = addr_sp; #ifdef CONFIG_USE_IRQ @@ -431,6 +432,10 @@ void board_init_f(ulong bootflag) /* 8-byte alignment for ABI compliance */ addr_sp &= ~0x07; +#else /* CONFIG_ARM64 */ + /* 16-byte alignment for ABI compliance */ + addr_sp &= ~0x0f; +#endif /* CONFIG_ARM64 */ #else addr_sp += 128; /* leave 32 words for abort-stack */ gd->irq_sp = addr_sp; diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c index f476a89702..a8295bf1f1 100644 --- a/arch/arm/lib/bootm.c +++ b/arch/arm/lib/bootm.c @@ -196,6 +196,14 @@ static void do_nonsec_virt_switch(void) debug("entered non-secure state\n"); #endif #endif + +#ifdef CONFIG_ARM64 + smp_kick_all_cpus(); + armv8_switch_to_el2(); +#ifdef CONFIG_ARMV8_SWITCH_TO_EL1 + armv8_switch_to_el1(); +#endif +#endif } /* Subcommand: PREP */ @@ -240,6 +248,21 @@ static void boot_prep_linux(bootm_headers_t *images) /* Subcommand: GO */ static void boot_jump_linux(bootm_headers_t *images, int flag) { +#ifdef CONFIG_ARM64 + void (*kernel_entry)(void *fdt_addr); + int fake = (flag & BOOTM_STATE_OS_FAKE_GO); + + kernel_entry = (void (*)(void *fdt_addr))images->ep; + + debug("## Transferring control to Linux (at address %lx)...\n", + (ulong) kernel_entry); + bootstage_mark(BOOTSTAGE_ID_RUN_OS); + + announce_and_cleanup(fake); + + if (!fake) + kernel_entry(images->ft_addr); +#else unsigned long machid = gd->bd->bi_arch_number; char *s; void (*kernel_entry)(int zero, int arch, uint params); @@ -266,6 +289,7 @@ static void boot_jump_linux(bootm_headers_t *images, int flag) if (!fake) kernel_entry(0, machid, r2); +#endif } /* Main Entry point for arm bootm implementation @@ -326,3 +350,26 @@ int bootz_setup(ulong image, ulong *start, ulong *end) } #endif /* CONFIG_CMD_BOOTZ */ + +#if defined(CONFIG_BOOTM_VXWORKS) +void boot_prep_vxworks(bootm_headers_t *images) +{ +#if defined(CONFIG_OF_LIBFDT) + int off; + + if (images->ft_addr) { + off = fdt_path_offset(images->ft_addr, "/memory"); + if (off < 0) { + if (arch_fixup_memory_node(images->ft_addr)) + puts("## WARNING: fixup memory failed!\n"); + } + } +#endif + cleanup_before_linux(); +} +void boot_jump_vxworks(bootm_headers_t *images) +{ + /* ARM VxWorks requires device tree physical address to be passed */ + ((void (*)(void *))images->ep)(images->ft_addr); +} +#endif diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S index ac54b9359a..dfc2de9a61 100644 --- a/arch/arm/lib/crt0.S +++ b/arch/arm/lib/crt0.S @@ -67,7 +67,7 @@ ENTRY(_main) ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) #endif bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - sub sp, #GD_SIZE /* allocate one GD above SP */ + sub sp, sp, #GD_SIZE /* allocate one GD above SP */ bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ mov r9, sp /* GD is above SP */ mov r0, #0 diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S new file mode 100644 index 0000000000..77563967e5 --- /dev/null +++ b/arch/arm/lib/crt0_64.S @@ -0,0 +1,113 @@ +/* + * crt0 - C-runtime startup Code for AArch64 U-Boot + * + * (C) Copyright 2013 + * David Feng <fenghua@phytium.com.cn> + * + * (C) Copyright 2012 + * Albert ARIBAUD <albert.u.boot@aribaud.net> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <config.h> +#include <asm-offsets.h> +#include <asm/macro.h> +#include <linux/linkage.h> + +/* + * This file handles the target-independent stages of the U-Boot + * start-up where a C runtime environment is needed. Its entry point + * is _main and is branched into from the target's start.S file. + * + * _main execution sequence is: + * + * 1. Set up initial environment for calling board_init_f(). + * This environment only provides a stack and a place to store + * the GD ('global data') structure, both located in some readily + * available RAM (SRAM, locked cache...). In this context, VARIABLE + * global data, initialized or not (BSS), are UNAVAILABLE; only + * CONSTANT initialized data are available. + * + * 2. Call board_init_f(). This function prepares the hardware for + * execution from system RAM (DRAM, DDR...) As system RAM may not + * be available yet, , board_init_f() must use the current GD to + * store any data which must be passed on to later stages. These + * data include the relocation destination, the future stack, and + * the future GD location. + * + * (the following applies only to non-SPL builds) + * + * 3. Set up intermediate environment where the stack and GD are the + * ones allocated by board_init_f() in system RAM, but BSS and + * initialized non-const data are still not available. + * + * 4. Call relocate_code(). This function relocates U-Boot from its + * current location into the relocation destination computed by + * board_init_f(). + * + * 5. Set up final environment for calling board_init_r(). This + * environment has BSS (initialized to 0), initialized non-const + * data (initialized to their intended value), and stack in system + * RAM. GD has retained values set by board_init_f(). Some CPUs + * have some work left to do at this point regarding memory, so + * call c_runtime_cpu_setup. + * + * 6. Branch to board_init_r(). + */ + +ENTRY(_main) + +/* + * Set up initial C runtime environment and call board_init_f(0). + */ + ldr x0, =(CONFIG_SYS_INIT_SP_ADDR) + sub x0, x0, #GD_SIZE /* allocate one GD above SP */ + bic sp, x0, #0xf /* 16-byte alignment for ABI compliance */ + mov x18, sp /* GD is above SP */ + mov x0, #0 + bl board_init_f + +/* + * Set up intermediate environment (new sp and gd) and call + * relocate_code(addr_moni). Trick here is that we'll return + * 'here' but relocated. + */ + ldr x0, [x18, #GD_START_ADDR_SP] /* x0 <- gd->start_addr_sp */ + bic sp, x0, #0xf /* 16-byte alignment for ABI compliance */ + ldr x18, [x18, #GD_BD] /* x18 <- gd->bd */ + sub x18, x18, #GD_SIZE /* new GD is below bd */ + + adr lr, relocation_return + ldr x9, [x18, #GD_RELOC_OFF] /* x9 <- gd->reloc_off */ + add lr, lr, x9 /* new return address after relocation */ + ldr x0, [x18, #GD_RELOCADDR] /* x0 <- gd->relocaddr */ + b relocate_code + +relocation_return: + +/* + * Set up final (full) environment + */ + bl c_runtime_cpu_setup /* still call old routine */ + +/* + * Clear BSS section + */ + ldr x0, =__bss_start /* this is auto-relocated! */ + ldr x1, =__bss_end /* this is auto-relocated! */ + mov x2, #0 +clear_loop: + str x2, [x0] + add x0, x0, #8 + cmp x0, x1 + b.lo clear_loop + + /* call board_init_r(gd_t *id, ulong dest_addr) */ + mov x0, x18 /* gd_t */ + ldr x1, [x18, #GD_RELOCADDR] /* dest_addr */ + b board_init_r /* PC relative jump */ + + /* NOTREACHED - board_init_r() does not return */ + +ENDPROC(_main) diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c new file mode 100644 index 0000000000..b476722556 --- /dev/null +++ b/arch/arm/lib/interrupts_64.c @@ -0,0 +1,120 @@ +/* + * (C) Copyright 2013 + * David Feng <fenghua@phytium.com.cn> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <linux/compiler.h> + + +int interrupt_init(void) +{ + return 0; +} + +void enable_interrupts(void) +{ + return; +} + +int disable_interrupts(void) +{ + return 0; +} + +void show_regs(struct pt_regs *regs) +{ + int i; + + printf("ELR: %lx\n", regs->elr); + printf("LR: %lx\n", regs->regs[30]); + for (i = 0; i < 29; i += 2) + printf("x%-2d: %016lx x%-2d: %016lx\n", + i, regs->regs[i], i+1, regs->regs[i+1]); + printf("\n"); +} + +/* + * do_bad_sync handles the impossible case in the Synchronous Abort vector. + */ +void do_bad_sync(struct pt_regs *pt_regs, unsigned int esr) +{ + printf("Bad mode in \"Synchronous Abort\" handler, esr 0x%08x\n", esr); + show_regs(pt_regs); + panic("Resetting CPU ...\n"); +} + +/* + * do_bad_irq handles the impossible case in the Irq vector. + */ +void do_bad_irq(struct pt_regs *pt_regs, unsigned int esr) +{ + printf("Bad mode in \"Irq\" handler, esr 0x%08x\n", esr); + show_regs(pt_regs); + panic("Resetting CPU ...\n"); +} + +/* + * do_bad_fiq handles the impossible case in the Fiq vector. + */ +void do_bad_fiq(struct pt_regs *pt_regs, unsigned int esr) +{ + printf("Bad mode in \"Fiq\" handler, esr 0x%08x\n", esr); + show_regs(pt_regs); + panic("Resetting CPU ...\n"); +} + +/* + * do_bad_error handles the impossible case in the Error vector. + */ +void do_bad_error(struct pt_regs *pt_regs, unsigned int esr) +{ + printf("Bad mode in \"Error\" handler, esr 0x%08x\n", esr); + show_regs(pt_regs); + panic("Resetting CPU ...\n"); +} + +/* + * do_sync handles the Synchronous Abort exception. + */ +void do_sync(struct pt_regs *pt_regs, unsigned int esr) +{ + printf("\"Synchronous Abort\" handler, esr 0x%08x\n", esr); + show_regs(pt_regs); + panic("Resetting CPU ...\n"); +} + +/* + * do_irq handles the Irq exception. + */ +void do_irq(struct pt_regs *pt_regs, unsigned int esr) +{ + printf("\"Irq\" handler, esr 0x%08x\n", esr); + show_regs(pt_regs); + panic("Resetting CPU ...\n"); +} + +/* + * do_fiq handles the Fiq exception. + */ +void do_fiq(struct pt_regs *pt_regs, unsigned int esr) +{ + printf("\"Fiq\" handler, esr 0x%08x\n", esr); + show_regs(pt_regs); + panic("Resetting CPU ...\n"); +} + +/* + * do_error handles the Error exception. + * Errors are more likely to be processor specific, + * it is defined with weak attribute and can be redefined + * in processor specific code. + */ +void __weak do_error(struct pt_regs *pt_regs, unsigned int esr) +{ + printf("\"Error\" handler, esr 0x%08x\n", esr); + show_regs(pt_regs); + panic("Resetting CPU ...\n"); +} diff --git a/arch/arm/lib/relocate_64.S b/arch/arm/lib/relocate_64.S new file mode 100644 index 0000000000..7fba9e2780 --- /dev/null +++ b/arch/arm/lib/relocate_64.S @@ -0,0 +1,58 @@ +/* + * relocate - common relocation function for AArch64 U-Boot + * + * (C) Copyright 2013 + * Albert ARIBAUD <albert.u.boot@aribaud.net> + * David Feng <fenghua@phytium.com.cn> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm-offsets.h> +#include <config.h> +#include <linux/linkage.h> + +/* + * void relocate_code (addr_moni) + * + * This function relocates the monitor code. + * x0 holds the destination address. + */ +ENTRY(relocate_code) + /* + * Copy u-boot from flash to RAM + */ + ldr x1, =__image_copy_start /* x1 <- SRC &__image_copy_start */ + subs x9, x0, x1 /* x9 <- relocation offset */ + b.eq relocate_done /* skip relocation */ + ldr x2, =__image_copy_end /* x2 <- SRC &__image_copy_end */ + +copy_loop: + ldp x10, x11, [x1], #16 /* copy from source address [x1] */ + stp x10, x11, [x0], #16 /* copy to target address [x0] */ + cmp x1, x2 /* until source end address [x2] */ + b.lo copy_loop + + /* + * Fix .rela.dyn relocations + */ + ldr x2, =__rel_dyn_start /* x2 <- SRC &__rel_dyn_start */ + ldr x3, =__rel_dyn_end /* x3 <- SRC &__rel_dyn_end */ +fixloop: + ldp x0, x1, [x2], #16 /* (x0,x1) <- (SRC location, fixup) */ + ldr x4, [x2], #8 /* x4 <- addend */ + and x1, x1, #0xffffffff + cmp x1, #1027 /* relative fixup? */ + bne fixnext + + /* relative fix: store addend plus offset at dest location */ + add x0, x0, x9 + add x4, x4, x9 + str x4, [x0] +fixnext: + cmp x2, x3 + b.lo fixloop + +relocate_done: + ret +ENDPROC(relocate_code) diff --git a/arch/blackfin/config.mk b/arch/blackfin/config.mk index 35f871662d..73fa79855f 100644 --- a/arch/blackfin/config.mk +++ b/arch/blackfin/config.mk @@ -14,9 +14,9 @@ CONFIG_BFIN_CPU := \ $(shell awk '$$2 == "CONFIG_BFIN_CPU" { print $$3 }' \ $(src)include/configs/$(BOARD).h) else -CONFIG_BFIN_CPU := $(strip $(subst ",,$(CONFIG_BFIN_CPU))) +CONFIG_BFIN_CPU := $(strip $(CONFIG_BFIN_CPU:"%"=%)) endif -CONFIG_BFIN_BOOT_MODE := $(strip $(subst ",,$(CONFIG_BFIN_BOOT_MODE))) +CONFIG_BFIN_BOOT_MODE := $(strip $(CONFIG_BFIN_BOOT_MODE:"%"=%)) PLATFORM_RELFLAGS += -ffixed-P3 -fomit-frame-pointer -mno-fdpic PLATFORM_CPPFLAGS += -DCONFIG_BLACKFIN diff --git a/arch/blackfin/cpu/initcode.c b/arch/blackfin/cpu/initcode.c index ffaf1017d7..2e640afc45 100644 --- a/arch/blackfin/cpu/initcode.c +++ b/arch/blackfin/cpu/initcode.c @@ -18,8 +18,6 @@ #include <asm/mach-common/bits/core.h> #include <asm/serial.h> -#define BUG() while (1) asm volatile("emuexcpt;"); - #ifndef __ADSPBF60x__ #include <asm/mach-common/bits/ebiu.h> #include <asm/mach-common/bits/pll.h> @@ -147,8 +145,6 @@ static struct ddr_config ddr_config_table[] = { __attribute__((always_inline)) static inline void serial_init(void) { - uint32_t uart_base = UART_BASE; - #if defined(__ADSPBF54x__) || defined(__ADSPBF60x__) # ifdef BFIN_BOOT_UART_USE_RTS # define BFIN_UART_USE_RTS 1 @@ -156,6 +152,7 @@ static inline void serial_init(void) # define BFIN_UART_USE_RTS 0 # endif if (BFIN_UART_USE_RTS && CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_UART) { + uint32_t uart_base = UART_BASE; size_t i; /* force RTS rather than relying on auto RTS */ @@ -195,8 +192,8 @@ static inline void serial_init(void) #if CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_BYPASS if (BFIN_DEBUG_EARLY_SERIAL) { - serial_early_init(uart_base); - serial_early_set_baud(uart_base, CONFIG_BAUDRATE); + serial_early_init(UART_BASE); + serial_early_set_baud(UART_BASE, CONFIG_BAUDRATE); } #endif } @@ -547,7 +544,7 @@ maybe_self_refresh(ADI_BOOT_DATA *bs) __attribute__((always_inline)) static inline u16 program_clocks(ADI_BOOT_DATA *bs, bool put_into_srfs) { - u16 vr_ctl; + u16 vr_ctl = 0; serial_putc('a'); @@ -731,6 +728,8 @@ update_serial_clocks(ADI_BOOT_DATA *bs, uint sdivB, uint divB, uint vcoB) serial_putc('a'); + if (BFIN_DEBUG_EARLY_SERIAL || + CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_UART) { #ifdef __ADSPBF60x__ sdivR = bfin_read_CGU_DIV(); sdivR = ((sdivR >> 8) & 0x1f) * ((sdivR >> 5) & 0x7); @@ -744,6 +743,8 @@ update_serial_clocks(ADI_BOOT_DATA *bs, uint sdivB, uint divB, uint vcoB) divisor = vcoB * sdivR; quotient = early_division(dividend, divisor); serial_early_put_div(quotient - ANOMALY_05000230); + } + serial_putc('c'); } @@ -913,7 +914,8 @@ check_hibernation(ADI_BOOT_DATA *bs, u16 vr_ctl, bool put_into_srfs) continue; serial_putc('z'); - uint32_t *hibernate_magic = bfin_read32(DPM0_RESTORE4); + uint32_t *hibernate_magic = + (uint32_t *)bfin_read32(DPM0_RESTORE4); SSYNC(); /* make sure memory controller is done */ if (hibernate_magic[0] == 0xDEADBEEF) { serial_putc('c'); diff --git a/arch/blackfin/include/asm/blackfin_local.h b/arch/blackfin/include/asm/blackfin_local.h index 8ea8cde691..4d6eeab0ec 100644 --- a/arch/blackfin/include/asm/blackfin_local.h +++ b/arch/blackfin/include/asm/blackfin_local.h @@ -81,6 +81,8 @@ extern void blackfin_dcache_flush_invalidate_range(const void *, const void *); # define NOP_PAD_ANOMALY_05000198 #endif +#define BFIN_BUG() while (1) asm volatile("emuexcpt;"); + #define _bfin_readX(addr, size, asm_size, asm_ext) ({ \ u32 __v; \ __asm__ __volatile__( \ @@ -111,7 +113,7 @@ extern void blackfin_dcache_flush_invalidate_range(const void *, const void *); sizeof(*(addr)) == 1 ? bfin_read8(addr) : \ sizeof(*(addr)) == 2 ? bfin_read16(addr) : \ sizeof(*(addr)) == 4 ? bfin_read32(addr) : \ - ({ BUG(); 0; }); \ + ({ BFIN_BUG(); 0; }); \ }) #define bfin_write(addr, val) \ do { \ @@ -119,7 +121,8 @@ do { \ case 1: bfin_write8(addr, val); break; \ case 2: bfin_write16(addr, val); break; \ case 4: bfin_write32(addr, val); break; \ - default: BUG(); \ + default: \ + BFIN_BUG(); \ } \ } while (0) diff --git a/arch/blackfin/lib/board.c b/arch/blackfin/lib/board.c index 17d1f468dd..392d72d232 100644 --- a/arch/blackfin/lib/board.c +++ b/arch/blackfin/lib/board.c @@ -19,6 +19,7 @@ #include <net.h> #include <status_led.h> #include <version.h> +#include <watchdog.h> #include <asm/cplb.h> #include <asm/mach-common/bits/mpu.h> diff --git a/arch/blackfin/lib/clocks.c b/arch/blackfin/lib/clocks.c index 97795e11ac..7ed56a7274 100644 --- a/arch/blackfin/lib/clocks.c +++ b/arch/blackfin/lib/clocks.c @@ -36,7 +36,10 @@ u_long get_vco(void) u_long get_cclk(void) { static u_long cached_cclk_pll_div, cached_cclk; - u_long div, csel, ssel; + u_long div, csel; +#ifndef CGU_DIV + u_long ssel; +#endif if (pll_is_bypassed()) return CONFIG_CLKIN_HZ; diff --git a/arch/powerpc/config.mk b/arch/powerpc/config.mk index e6bb935729..f75c3bf187 100644 --- a/arch/powerpc/config.mk +++ b/arch/powerpc/config.mk @@ -9,8 +9,9 @@ CROSS_COMPILE ?= ppc_8xx- CONFIG_STANDALONE_LOAD_ADDR ?= 0x40000 LDFLAGS_FINAL += --gc-sections -PLATFORM_RELFLAGS += -fpic -mrelocatable -ffunction-sections -fdata-sections -PLATFORM_CPPFLAGS += -DCONFIG_PPC -D__powerpc__ +PLATFORM_RELFLAGS += -fpic -mrelocatable -ffunction-sections -fdata-sections \ + -meabi +PLATFORM_CPPFLAGS += -DCONFIG_PPC -D__powerpc__ -ffixed-r2 PLATFORM_LDFLAGS += -n # Support generic board on PPC diff --git a/arch/powerpc/cpu/74xx_7xx/config.mk b/arch/powerpc/cpu/74xx_7xx/config.mk index 9053191602..96812a02d8 100644 --- a/arch/powerpc/cpu/74xx_7xx/config.mk +++ b/arch/powerpc/cpu/74xx_7xx/config.mk @@ -5,6 +5,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -PLATFORM_RELFLAGS += -meabi - -PLATFORM_CPPFLAGS += -DCONFIG_74xx_7xx -ffixed-r2 -mstring +PLATFORM_CPPFLAGS += -DCONFIG_74xx_7xx -mstring diff --git a/arch/powerpc/cpu/Makefile b/arch/powerpc/cpu/Makefile index d630abe1da..88b5298be0 100644 --- a/arch/powerpc/cpu/Makefile +++ b/arch/powerpc/cpu/Makefile @@ -1,3 +1,3 @@ -ifneq ($(filter mpc83xx mpc85xx mpc86xx,$(CPU)),) -obj-y += mpc8xxx/ -endif +obj-$(CONFIG_MPC83xx) += mpc8xxx/ +obj-$(CONFIG_MPC85xx) += mpc8xxx/ +obj-$(CONFIG_MPC86xx) += mpc8xxx/ diff --git a/arch/powerpc/cpu/mpc512x/config.mk b/arch/powerpc/cpu/mpc512x/config.mk index 04717a485e..03759e6625 100644 --- a/arch/powerpc/cpu/mpc512x/config.mk +++ b/arch/powerpc/cpu/mpc512x/config.mk @@ -4,7 +4,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -PLATFORM_RELFLAGS += -meabi - -PLATFORM_CPPFLAGS += -DCONFIG_MPC512X -DCONFIG_E300 \ - -ffixed-r2 -msoft-float -mcpu=603e +PLATFORM_CPPFLAGS += -DCONFIG_MPC512X -DCONFIG_E300 -msoft-float -mcpu=603e diff --git a/arch/powerpc/cpu/mpc5xx/config.mk b/arch/powerpc/cpu/mpc5xx/config.mk index b33f17a1ba..31e2dc9873 100644 --- a/arch/powerpc/cpu/mpc5xx/config.mk +++ b/arch/powerpc/cpu/mpc5xx/config.mk @@ -5,6 +5,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -PLATFORM_RELFLAGS += -meabi - -PLATFORM_CPPFLAGS += -DCONFIG_5xx -ffixed-r2 -mpowerpc -msoft-float +PLATFORM_CPPFLAGS += -DCONFIG_5xx -mpowerpc -msoft-float diff --git a/arch/powerpc/cpu/mpc5xxx/config.mk b/arch/powerpc/cpu/mpc5xxx/config.mk index 57bdd2d252..3384f6ffcc 100644 --- a/arch/powerpc/cpu/mpc5xxx/config.mk +++ b/arch/powerpc/cpu/mpc5xxx/config.mk @@ -5,7 +5,5 @@ # SPDX-License-Identifier: GPL-2.0+ # -PLATFORM_RELFLAGS += -meabi - -PLATFORM_CPPFLAGS += -DCONFIG_MPC5xxx -ffixed-r2 \ +PLATFORM_CPPFLAGS += -DCONFIG_MPC5xxx \ -mstring -mcpu=603e -mmultiple diff --git a/arch/powerpc/cpu/mpc824x/config.mk b/arch/powerpc/cpu/mpc824x/config.mk index ef605f0797..a224bc8e73 100644 --- a/arch/powerpc/cpu/mpc824x/config.mk +++ b/arch/powerpc/cpu/mpc824x/config.mk @@ -5,6 +5,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -PLATFORM_RELFLAGS += -meabi - -PLATFORM_CPPFLAGS += -DCONFIG_MPC824X -ffixed-r2 -mstring -mcpu=603e -msoft-float +PLATFORM_CPPFLAGS += -DCONFIG_MPC824X -mstring -mcpu=603e -msoft-float diff --git a/arch/powerpc/cpu/mpc8260/config.mk b/arch/powerpc/cpu/mpc8260/config.mk index 91b0497ccb..dfac710e63 100644 --- a/arch/powerpc/cpu/mpc8260/config.mk +++ b/arch/powerpc/cpu/mpc8260/config.mk @@ -5,7 +5,5 @@ # SPDX-License-Identifier: GPL-2.0+ # -PLATFORM_RELFLAGS += -meabi - -PLATFORM_CPPFLAGS += -DCONFIG_8260 -DCONFIG_CPM2 -ffixed-r2 \ +PLATFORM_CPPFLAGS += -DCONFIG_8260 -DCONFIG_CPM2 \ -mstring -mcpu=603e -mmultiple diff --git a/arch/powerpc/cpu/mpc83xx/config.mk b/arch/powerpc/cpu/mpc83xx/config.mk index c16a00376f..dfce4d53b4 100644 --- a/arch/powerpc/cpu/mpc83xx/config.mk +++ b/arch/powerpc/cpu/mpc83xx/config.mk @@ -4,7 +4,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -PLATFORM_RELFLAGS += -meabi - -PLATFORM_CPPFLAGS += -DCONFIG_MPC83xx -DCONFIG_E300 \ - -ffixed-r2 -msoft-float +PLATFORM_CPPFLAGS += -DCONFIG_MPC83xx -DCONFIG_E300 -msoft-float diff --git a/arch/powerpc/cpu/mpc85xx/config.mk b/arch/powerpc/cpu/mpc85xx/config.mk index 9eef539e5e..72c964cd15 100644 --- a/arch/powerpc/cpu/mpc85xx/config.mk +++ b/arch/powerpc/cpu/mpc85xx/config.mk @@ -5,13 +5,10 @@ # SPDX-License-Identifier: GPL-2.0+ # -PLATFORM_RELFLAGS += -meabi - -PLATFORM_CPPFLAGS += -ffixed-r2 -Wa,-me500 -msoft-float -mno-string +PLATFORM_CPPFLAGS += -Wa,-me500 -msoft-float -mno-string # -mspe=yes is needed to have -mno-spe accepted by a buggy GCC; # see "[PATCH,rs6000] make -mno-spe work as expected" on # http://gcc.gnu.org/ml/gcc-patches/2008-04/msg00311.html -PF_CPPFLAGS_SPE := $(call cc-option,-mspe=yes) \ +PLATFORM_CPPFLAGS += $(call cc-option,-mspe=yes) \ $(call cc-option,-mno-spe) -PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_SPE) diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index 46ae80c4d8..35867dffdd 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -74,12 +74,33 @@ void get_sys_info(sys_info_t *sys_info) uint ratio[CONFIG_SYS_FSL_NUM_CC_PLLS]; unsigned long sysclk = CONFIG_SYS_CLK_FREQ; uint mem_pll_rat; +#ifdef CONFIG_SYS_FSL_SINGLE_SOURCE_CLK + uint single_src; +#endif sys_info->freq_systembus = sysclk; +#ifdef CONFIG_SYS_FSL_SINGLE_SOURCE_CLK + /* + * DDR_REFCLK_SEL rcw bit is used to determine if DDR PLLS + * are driven by separate DDR Refclock or single source + * differential clock. + */ + single_src = (in_be32(&gur->rcwsr[5]) >> + FSL_CORENET2_RCWSR5_DDR_REFCLK_SEL_SHIFT) & + FSL_CORENET2_RCWSR5_DDR_REFCLK_SEL_MASK; + /* + * For single source clocking, both ddrclock and syclock + * are driven by differential sysclock. + */ + if (single_src == FSL_CORENET2_RCWSR5_DDR_REFCLK_SINGLE_CLK) { + printf("Single Source Clock Configuration\n"); + sys_info->freq_ddrbus = CONFIG_SYS_CLK_FREQ; + } else +#endif #ifdef CONFIG_DDR_CLK_FREQ - sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ; + sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ; #else - sys_info->freq_ddrbus = sysclk; + sys_info->freq_ddrbus = sysclk; #endif sys_info->freq_systembus *= (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f; @@ -229,6 +250,9 @@ void get_sys_info(sys_info_t *sys_info) case 4: sys_info->freq_fman[1] = freq_c_pll[CONFIG_SYS_FM2_CLK + 1] / 4; break; + case 5: + sys_info->freq_fman[1] = sys_info->freq_systembus; + break; case 6: sys_info->freq_fman[1] = freq_c_pll[CONFIG_SYS_FM2_CLK] / 2; break; diff --git a/arch/powerpc/cpu/mpc86xx/config.mk b/arch/powerpc/cpu/mpc86xx/config.mk index 5dbf6a8472..69a0b96ead 100644 --- a/arch/powerpc/cpu/mpc86xx/config.mk +++ b/arch/powerpc/cpu/mpc86xx/config.mk @@ -5,7 +5,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -PLATFORM_RELFLAGS += -meabi - -PLATFORM_CPPFLAGS += -ffixed-r2 -mstring -PLATFORM_CPPFLAGS += -maltivec -mabi=altivec -msoft-float +PLATFORM_CPPFLAGS += -mstring -maltivec -mabi=altivec -msoft-float diff --git a/arch/powerpc/cpu/mpc8xx/config.mk b/arch/powerpc/cpu/mpc8xx/config.mk index c04e7338c8..ee2c883665 100644 --- a/arch/powerpc/cpu/mpc8xx/config.mk +++ b/arch/powerpc/cpu/mpc8xx/config.mk @@ -5,6 +5,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -PLATFORM_RELFLAGS += -meabi - -PLATFORM_CPPFLAGS += -DCONFIG_8xx -ffixed-r2 -mstring -mcpu=860 -msoft-float +PLATFORM_CPPFLAGS += -DCONFIG_8xx -mstring -mcpu=860 -msoft-float diff --git a/arch/powerpc/cpu/mpc8xxx/Makefile b/arch/powerpc/cpu/mpc8xxx/Makefile index f66ee2e423..e95539e0a3 100644 --- a/arch/powerpc/cpu/mpc8xxx/Makefile +++ b/arch/powerpc/cpu/mpc8xxx/Makefile @@ -19,10 +19,8 @@ ifdef MINIMAL obj-$(CONFIG_FSL_LAW) += law.o else - -ifneq ($(CPU),mpc83xx) -obj-y += cpu.o -endif +obj-$(CONFIG_MPC85xx) += cpu.o +obj-$(CONFIG_MPC86xx) += cpu.o obj-$(CONFIG_OF_LIBFDT) += fdt.o obj-$(CONFIG_FSL_LBC) += fsl_lbc.o diff --git a/arch/powerpc/cpu/ppc4xx/config.mk b/arch/powerpc/cpu/ppc4xx/config.mk index c2b0f9aab6..71c2a6c729 100644 --- a/arch/powerpc/cpu/ppc4xx/config.mk +++ b/arch/powerpc/cpu/ppc4xx/config.mk @@ -5,8 +5,7 @@ # SPDX-License-Identifier: GPL-2.0+ # -PLATFORM_RELFLAGS += -meabi -PLATFORM_CPPFLAGS += -DCONFIG_4xx -ffixed-r2 -mstring -msoft-float +PLATFORM_CPPFLAGS += -DCONFIG_4xx -mstring -msoft-float cfg=$(shell grep configs $(OBJTREE)/include/config.h | sed 's/.*<\(configs.*\)>/\1/') is440:=$(shell grep CONFIG_440 $(TOPDIR)/include/$(cfg)) diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 99e16bdf63..54ce2f053c 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -711,7 +711,8 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022) #define CONFIG_FM_PLAT_CLK_DIV 1 #define CONFIG_SYS_FM1_CLK CONFIG_FM_PLAT_CLK_DIV #define CONFIG_SYS_FM_MURAM_SIZE 0x30000 -#define CONFIG_SYS_FSL_TBCLK_DIV 32 +#define CONFIG_SYS_FSL_SINGLE_SOURCE_CLK +#define CONFIG_SYS_FSL_TBCLK_DIV 16 #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4" #define CONFIG_SYS_FSL_USB1_PHY_ENABLE #define CONFIG_SYS_FSL_USB2_PHY_ENABLE @@ -745,7 +746,7 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022) #define CONFIG_SYS_NUM_FM1_DTSEC 6 #define CONFIG_SYS_NUM_FM1_10GEC 2 #endif -#define CONFIG_SYS_FSL_NUM_USB_CTRLS 2 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_PME_PLAT_CLK_DIV 1 #define CONFIG_SYS_PME_CLK CONFIG_PME_PLAT_CLK_DIV diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 672e8c6650..68c3c82453 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -1774,6 +1774,9 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022) #define FSL_CORENET2_RCWSR5_SRDS_PLL_PD_S3_PLL2 0x00040000 #define FSL_CORENET2_RCWSR5_SRDS_PLL_PD_S4_PLL1 0x00020000 #define FSL_CORENET2_RCWSR5_SRDS_PLL_PD_S4_PLL2 0x00010000 +#define FSL_CORENET2_RCWSR5_DDR_REFCLK_SEL_SHIFT 4 +#define FSL_CORENET2_RCWSR5_DDR_REFCLK_SEL_MASK 0x00000011 +#define FSL_CORENET2_RCWSR5_DDR_REFCLK_SINGLE_CLK 1 #else /* CONFIG_SYS_FSL_QORIQ_CHASSIS2 */ #define FSL_CORENET_RCWSR0_MEM_PLL_RAT_SHIFT 17 diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c index e7153b0480..41fc8f7ff7 100644 --- a/arch/powerpc/lib/bootm.c +++ b/arch/powerpc/lib/bootm.c @@ -32,6 +32,7 @@ DECLARE_GLOBAL_DATA_PTR; extern ulong get_effective_memsize(void); static ulong get_sp (void); +extern void ft_fixup_num_cores(void *blob); static void set_clocks_in_mhz (bd_t *kbd); #ifndef CONFIG_SYS_LINUX_LOWMEM_MAX_SIZE @@ -277,3 +278,58 @@ static void set_clocks_in_mhz (bd_t *kbd) #endif /* CONFIG_MPC5xxx */ } } + +#if defined(CONFIG_BOOTM_VXWORKS) +void boot_prep_vxworks(bootm_headers_t *images) +{ +#if defined(CONFIG_OF_LIBFDT) + int off; + u64 base, size; + + if (!images->ft_addr) + return; + + base = (u64)gd->bd->bi_memstart; + size = (u64)gd->bd->bi_memsize; + + off = fdt_path_offset(images->ft_addr, "/memory"); + if (off < 0) + fdt_fixup_memory(images->ft_addr, base, size); + +#if defined(CONFIG_MP) +#if defined(CONFIG_MPC85xx) + ft_fixup_cpu(images->ft_addr, base + size); + ft_fixup_num_cores(images->ft_addr); +#elif defined(CONFIG_MPC86xx) + off = fdt_add_mem_rsv(images->ft_addr, + determine_mp_bootpg(NULL), (u64)4096); + if (off < 0) + printf("## WARNING %s: %s\n", __func__, fdt_strerror(off)); + ft_fixup_num_cores(images->ft_addr); +#endif + flush_cache((unsigned long)images->ft_addr, images->ft_len); +#endif +#endif +} + +void boot_jump_vxworks(bootm_headers_t *images) +{ + /* PowerPC VxWorks boot interface conforms to the ePAPR standard + * general purpuse registers: + * + * r3: Effective address of the device tree image + * r4: 0 + * r5: 0 + * r6: ePAPR magic value + * r7: shall be the size of the boot IMA in bytes + * r8: 0 + * r9: 0 + * TCR: WRC = 0, no watchdog timer reset will occur + */ + WATCHDOG_RESET(); + + ((void (*)(void *, ulong, ulong, ulong, + ulong, ulong, ulong))images->ep)(images->ft_addr, + 0, 0, EPAPR_MAGIC, getenv_bootm_mapsize(), 0, 0); +} +#endif diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c index cfc1fda1e1..38019e0b48 100644 --- a/arch/sandbox/cpu/cpu.c +++ b/arch/sandbox/cpu/cpu.c @@ -5,13 +5,23 @@ #include <common.h> #include <os.h> +#include <asm/state.h> DECLARE_GLOBAL_DATA_PTR; -int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +void reset_cpu(ulong ignored) { + if (state_uninit()) + os_exit(2); + /* This is considered normal termination for now */ os_exit(0); +} + +int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + reset_cpu(0); + return 0; } @@ -28,7 +38,14 @@ unsigned long __attribute__((no_instrument_function)) timer_get_us(void) int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images) { - return -1; + if (flag & (BOOTM_STATE_OS_GO | BOOTM_STATE_OS_FAKE_GO)) { + bootstage_mark(BOOTSTAGE_ID_RUN_OS); + printf("## Transferring control to Linux (at address %08lx)...\n", + images->ep); + reset_cpu(0); + } + + return 0; } int cleanup_before_linux(void) diff --git a/arch/sandbox/cpu/os.c b/arch/sandbox/cpu/os.c index 26f44cb597..725b505177 100644 --- a/arch/sandbox/cpu/os.c +++ b/arch/sandbox/cpu/os.c @@ -27,6 +27,10 @@ /* Operating System Interface */ +struct os_mem_hdr { + size_t length; /* number of bytes in the block */ +}; + ssize_t os_read(int fd, void *buf, size_t count) { return read(fd, buf, count); @@ -128,8 +132,45 @@ void os_tty_raw(int fd) void *os_malloc(size_t length) { - return mmap(NULL, length, PROT_READ | PROT_WRITE, - MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); + struct os_mem_hdr *hdr; + + hdr = mmap(NULL, length + sizeof(*hdr), PROT_READ | PROT_WRITE, + MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); + if (hdr == MAP_FAILED) + return NULL; + hdr->length = length; + + return hdr + 1; +} + +void *os_free(void *ptr) +{ + struct os_mem_hdr *hdr = ptr; + + hdr--; + if (ptr) + munmap(hdr, hdr->length + sizeof(*hdr)); +} + +void *os_realloc(void *ptr, size_t length) +{ + struct os_mem_hdr *hdr = ptr; + void *buf = NULL; + + hdr--; + if (length != 0) { + buf = os_malloc(length); + if (!buf) + return buf; + if (ptr) { + if (length > hdr->length) + length = hdr->length; + memcpy(buf, ptr, length); + } + } + os_free(ptr); + + return buf; } void os_usleep(unsigned long usec) @@ -347,3 +388,53 @@ ssize_t os_get_filesize(const char *fname) return ret; return buf.st_size; } + +void os_putc(int ch) +{ + putchar(ch); +} + +void os_puts(const char *str) +{ + while (*str) + os_putc(*str++); +} + +int os_write_ram_buf(const char *fname) +{ + struct sandbox_state *state = state_get_current(); + int fd, ret; + + fd = open(fname, O_CREAT | O_WRONLY, 0777); + if (fd < 0) + return -ENOENT; + ret = write(fd, state->ram_buf, state->ram_size); + close(fd); + if (ret != state->ram_size) + return -EIO; + + return 0; +} + +int os_read_ram_buf(const char *fname) +{ + struct sandbox_state *state = state_get_current(); + int fd, ret; + int size; + + size = os_get_filesize(fname); + if (size < 0) + return -ENOENT; + if (size != state->ram_size) + return -ENOSPC; + fd = open(fname, O_RDONLY); + if (fd < 0) + return -ENOENT; + + ret = read(fd, state->ram_buf, state->ram_size); + close(fd); + if (ret != state->ram_size) + return -EIO; + + return 0; +} diff --git a/arch/sandbox/cpu/start.c b/arch/sandbox/cpu/start.c index 1b15454784..1df21d49fa 100644 --- a/arch/sandbox/cpu/start.c +++ b/arch/sandbox/cpu/start.c @@ -4,11 +4,12 @@ */ #include <common.h> +#include <os.h> #include <asm/getopt.h> #include <asm/sections.h> #include <asm/state.h> -#include <os.h> +DECLARE_GLOBAL_DATA_PTR; int sandbox_early_getopt_check(void) { @@ -50,9 +51,9 @@ int sandbox_early_getopt_check(void) /* then the long flag */ if (opt->has_arg) - printf("--%-*s", max_noarg_len, opt->flag); - else printf("--%-*s <arg> ", max_arg_len, opt->flag); + else + printf("--%-*s", max_noarg_len, opt->flag); /* finally the help text */ printf(" %s\n", opt->help); @@ -75,7 +76,8 @@ int sandbox_main_loop_init(void) /* Execute command if required */ if (state->cmd) { run_command_list(state->cmd, -1, 0); - os_exit(state->exit_type); + if (!state->interactive) + os_exit(state->exit_type); } return 0; @@ -96,25 +98,93 @@ static int sandbox_cmdline_cb_fdt(struct sandbox_state *state, const char *arg) } SANDBOX_CMDLINE_OPT_SHORT(fdt, 'd', 1, "Specify U-Boot's control FDT"); -int main(int argc, char *argv[]) +static int sandbox_cmdline_cb_interactive(struct sandbox_state *state, + const char *arg) +{ + state->interactive = true; + return 0; +} + +SANDBOX_CMDLINE_OPT_SHORT(interactive, 'i', 0, "Enter interactive mode"); + +static int sandbox_cmdline_cb_memory(struct sandbox_state *state, + const char *arg) { - struct sandbox_state *state; int err; - err = state_init(); - if (err) + /* For now assume we always want to write it */ + state->write_ram_buf = true; + state->ram_buf_fname = arg; + + if (os_read_ram_buf(arg)) { + printf("Failed to read RAM buffer\n"); return err; + } + + return 0; +} +SANDBOX_CMDLINE_OPT_SHORT(memory, 'm', 1, + "Read/write ram_buf memory contents from file"); + +static int sandbox_cmdline_cb_state(struct sandbox_state *state, + const char *arg) +{ + state->state_fname = arg; + return 0; +} +SANDBOX_CMDLINE_OPT_SHORT(state, 's', 1, "Specify the sandbox state FDT"); + +static int sandbox_cmdline_cb_read(struct sandbox_state *state, + const char *arg) +{ + state->read_state = true; + return 0; +} +SANDBOX_CMDLINE_OPT_SHORT(read, 'r', 0, "Read the state FDT on startup"); + +static int sandbox_cmdline_cb_write(struct sandbox_state *state, + const char *arg) +{ + state->write_state = true; + return 0; +} +SANDBOX_CMDLINE_OPT_SHORT(write, 'w', 0, "Write state FDT on exit"); + +static int sandbox_cmdline_cb_ignore_missing(struct sandbox_state *state, + const char *arg) +{ + state->ignore_missing_state_on_read = true; + return 0; +} +SANDBOX_CMDLINE_OPT_SHORT(ignore_missing, 'n', 0, + "Ignore missing state on read"); + +int main(int argc, char *argv[]) +{ + struct sandbox_state *state; + int ret; + + ret = state_init(); + if (ret) + goto err; state = state_get_current(); if (os_parse_args(state, argc, argv)) return 1; - /* - * Do pre- and post-relocation init, then start up U-Boot. This will - * never return. - */ + ret = sandbox_read_state(state, state->state_fname); + if (ret) + goto err; + + /* Do pre- and post-relocation init */ board_init_f(0); - /* NOTREACHED - board_init_f() does not return */ + board_init_r(gd->new_gd, 0); + + /* NOTREACHED - board_init_r() does not return */ return 0; + +err: + printf("Error %d\n", ret); + return 1; } diff --git a/arch/sandbox/cpu/state.c b/arch/sandbox/cpu/state.c index 56d5041411..a145808a52 100644 --- a/arch/sandbox/cpu/state.c +++ b/arch/sandbox/cpu/state.c @@ -4,6 +4,9 @@ */ #include <common.h> +#include <errno.h> +#include <fdtdec.h> +#include <os.h> #include <asm/state.h> /* Main state record for the sandbox */ @@ -15,6 +18,324 @@ void state_record_exit(enum exit_type_id exit_type) state->exit_type = exit_type; } +static int state_ensure_space(int extra_size) +{ + void *blob = state->state_fdt; + int used, size, free; + void *buf; + int ret; + + used = fdt_off_dt_strings(blob) + fdt_size_dt_strings(blob); + size = fdt_totalsize(blob); + free = size - used; + if (free > extra_size) + return 0; + + size = used + extra_size; + buf = os_malloc(size); + if (!buf) + return -ENOMEM; + + ret = fdt_open_into(blob, buf, size); + if (ret) { + os_free(buf); + return -EIO; + } + + os_free(blob); + state->state_fdt = buf; + return 0; +} + +static int state_read_file(struct sandbox_state *state, const char *fname) +{ + int size; + int ret; + int fd; + + size = os_get_filesize(fname); + if (size < 0) { + printf("Cannot find sandbox state file '%s'\n", fname); + return -ENOENT; + } + state->state_fdt = os_malloc(size); + if (!state->state_fdt) { + puts("No memory to read sandbox state\n"); + return -ENOMEM; + } + fd = os_open(fname, OS_O_RDONLY); + if (fd < 0) { + printf("Cannot open sandbox state file '%s'\n", fname); + ret = -EPERM; + goto err_open; + } + if (os_read(fd, state->state_fdt, size) != size) { + printf("Cannot read sandbox state file '%s'\n", fname); + ret = -EIO; + goto err_read; + } + os_close(fd); + + return 0; +err_read: + os_close(fd); +err_open: + os_free(state->state_fdt); + state->state_fdt = NULL; + + return ret; +} + +/*** + * sandbox_read_state_nodes() - Read state associated with a driver + * + * This looks through all compatible nodes and calls the read function on + * each one, to read in the state. + * + * If nothing is found, it still calls the read function once, to set up a + * single global state for that driver. + * + * @state: Sandbox state + * @io: Method to use for reading state + * @blob: FDT containing state + * @return 0 if OK, -EINVAL if the read function returned failure + */ +int sandbox_read_state_nodes(struct sandbox_state *state, + struct sandbox_state_io *io, const void *blob) +{ + int count; + int node; + int ret; + + debug(" - read %s\n", io->name); + if (!io->read) + return 0; + + node = -1; + count = 0; + while (blob) { + node = fdt_node_offset_by_compatible(blob, node, io->compat); + if (node < 0) + return 0; /* No more */ + debug(" - read node '%s'\n", fdt_get_name(blob, node, NULL)); + ret = io->read(blob, node); + if (ret) { + printf("Unable to read state for '%s'\n", io->compat); + return -EINVAL; + } + count++; + } + + /* + * If we got no saved state, call the read function once without a + * node, to set up the global state. + */ + if (count == 0) { + debug(" - read global\n"); + ret = io->read(NULL, -1); + if (ret) { + printf("Unable to read global state for '%s'\n", + io->name); + return -EINVAL; + } + } + + return 0; +} + +int sandbox_read_state(struct sandbox_state *state, const char *fname) +{ + struct sandbox_state_io *io; + const void *blob; + bool got_err; + int ret; + + if (state->read_state && fname) { + ret = state_read_file(state, fname); + if (ret == -ENOENT && state->ignore_missing_state_on_read) + ret = 0; + if (ret) + return ret; + } + + /* Call all the state read funtcions */ + got_err = false; + blob = state->state_fdt; + io = ll_entry_start(struct sandbox_state_io, state_io); + for (; io < ll_entry_end(struct sandbox_state_io, state_io); io++) { + ret = sandbox_read_state_nodes(state, io, blob); + if (ret < 0) + got_err = true; + } + + if (state->read_state && fname) { + debug("Read sandbox state from '%s'%s\n", fname, + got_err ? " (with errors)" : ""); + } + + return got_err ? -1 : 0; +} + +/*** + * sandbox_write_state_node() - Write state associated with a driver + * + * This calls the write function to write out global state for that driver. + * + * TODO(sjg@chromium.org): Support writing out state from multiple drivers + * of the same time. We don't need this yet,and it will be much easier to + * do when driver model is available. + * + * @state: Sandbox state + * @io: Method to use for writing state + * @return 0 if OK, -EIO if there is a fatal error (such as out of space + * for adding the data), -EINVAL if the write function failed. + */ +int sandbox_write_state_node(struct sandbox_state *state, + struct sandbox_state_io *io) +{ + void *blob; + int node; + int ret; + + if (!io->write) + return 0; + + ret = state_ensure_space(SANDBOX_STATE_MIN_SPACE); + if (ret) { + printf("Failed to add more space for state\n"); + return -EIO; + } + + /* The blob location can change when the size increases */ + blob = state->state_fdt; + node = fdt_node_offset_by_compatible(blob, -1, io->compat); + if (node == -FDT_ERR_NOTFOUND) { + node = fdt_add_subnode(blob, 0, io->name); + if (node < 0) { + printf("Cannot create node '%s': %s\n", io->name, + fdt_strerror(node)); + return -EIO; + } + + if (fdt_setprop_string(blob, node, "compatible", io->compat)) { + puts("Cannot set compatible\n"); + return -EIO; + } + } else if (node < 0) { + printf("Cannot access node '%s': %s\n", io->name, + fdt_strerror(node)); + return -EIO; + } + debug("Write state for '%s' to node %d\n", io->compat, node); + ret = io->write(blob, node); + if (ret) { + printf("Unable to write state for '%s'\n", io->compat); + return -EINVAL; + } + + return 0; +} + +int sandbox_write_state(struct sandbox_state *state, const char *fname) +{ + struct sandbox_state_io *io; + bool got_err; + int size; + int ret; + int fd; + + /* Create a state FDT if we don't have one */ + if (!state->state_fdt) { + size = 0x4000; + state->state_fdt = os_malloc(size); + if (!state->state_fdt) { + puts("No memory to create FDT\n"); + return -ENOMEM; + } + ret = fdt_create_empty_tree(state->state_fdt, size); + if (ret < 0) { + printf("Cannot create empty state FDT: %s\n", + fdt_strerror(ret)); + ret = -EIO; + goto err_create; + } + } + + /* Call all the state write funtcions */ + got_err = false; + io = ll_entry_start(struct sandbox_state_io, state_io); + ret = 0; + for (; io < ll_entry_end(struct sandbox_state_io, state_io); io++) { + ret = sandbox_write_state_node(state, io); + if (ret == -EIO) + break; + else if (ret) + got_err = true; + } + + if (ret == -EIO) { + printf("Could not write sandbox state\n"); + goto err_create; + } + + ret = fdt_pack(state->state_fdt); + if (ret < 0) { + printf("Cannot pack state FDT: %s\n", fdt_strerror(ret)); + ret = -EINVAL; + goto err_create; + } + size = fdt_totalsize(state->state_fdt); + fd = os_open(fname, OS_O_WRONLY | OS_O_CREAT); + if (fd < 0) { + printf("Cannot open sandbox state file '%s'\n", fname); + ret = -EIO; + goto err_create; + } + if (os_write(fd, state->state_fdt, size) != size) { + printf("Cannot write sandbox state file '%s'\n", fname); + ret = -EIO; + goto err_write; + } + os_close(fd); + + debug("Wrote sandbox state to '%s'%s\n", fname, + got_err ? " (with errors)" : ""); + + return 0; +err_write: + os_close(fd); +err_create: + os_free(state->state_fdt); + + return ret; +} + +int state_setprop(int node, const char *prop_name, const void *data, int size) +{ + void *blob; + int len; + int ret; + + fdt_getprop(state->state_fdt, node, prop_name, &len); + + /* Add space for the new property, its name and some overhead */ + ret = state_ensure_space(size - len + strlen(prop_name) + 32); + if (ret) + return ret; + + /* This should succeed, barring a mutiny */ + blob = state->state_fdt; + ret = fdt_setprop(blob, node, prop_name, data, size); + if (ret) { + printf("%s: Unable to set property '%s' in node '%s': %s\n", + __func__, prop_name, fdt_get_name(blob, node, NULL), + fdt_strerror(ret)); + return -ENOSPC; + } + + return 0; +} + struct sandbox_state *state_get_current(void) { assert(state); @@ -25,6 +346,10 @@ int state_init(void) { state = &main_state; + state->ram_size = CONFIG_SYS_SDRAM_SIZE; + state->ram_buf = os_malloc(state->ram_size); + assert(state->ram_buf); + /* * Example of how to use GPIOs: * @@ -33,3 +358,31 @@ int state_init(void) */ return 0; } + +int state_uninit(void) +{ + int err; + + state = &main_state; + + if (state->write_ram_buf) { + err = os_write_ram_buf(state->ram_buf_fname); + if (err) { + printf("Failed to write RAM buffer\n"); + return err; + } + } + + if (state->write_state) { + if (sandbox_write_state(state, state->state_fname)) { + printf("Failed to write sandbox state\n"); + return -1; + } + } + + if (state->state_fdt) + os_free(state->state_fdt); + memset(state, '\0', sizeof(*state)); + + return 0; +} diff --git a/arch/sandbox/include/asm/global_data.h b/arch/sandbox/include/asm/global_data.h index d70532aa4d..b2e9b488f1 100644 --- a/arch/sandbox/include/asm/global_data.h +++ b/arch/sandbox/include/asm/global_data.h @@ -12,7 +12,7 @@ /* Architecture-specific global data */ struct arch_global_data { - u8 *ram_buf; /* emulated RAM buffer */ + uint8_t *ram_buf; /* emulated RAM buffer */ }; #include <asm-generic/global_data.h> diff --git a/arch/sandbox/include/asm/state.h b/arch/sandbox/include/asm/state.h index a38820bdee..e8e4fea1b5 100644 --- a/arch/sandbox/include/asm/state.h +++ b/arch/sandbox/include/asm/state.h @@ -7,6 +7,8 @@ #define __SANDBOX_STATE_H #include <config.h> +#include <stdbool.h> +#include <linux/stringify.h> /* How we exited U-Boot */ enum exit_type_id { @@ -23,17 +25,92 @@ struct sandbox_spi_info { /* The complete state of the test system */ struct sandbox_state { const char *cmd; /* Command to execute */ + bool interactive; /* Enable cmdline after execute */ const char *fdt_fname; /* Filename of FDT binary */ enum exit_type_id exit_type; /* How we exited U-Boot */ const char *parse_err; /* Error to report from parsing */ int argc; /* Program arguments */ char **argv; + uint8_t *ram_buf; /* Emulated RAM buffer */ + unsigned int ram_size; /* Size of RAM buffer */ + const char *ram_buf_fname; /* Filename to use for RAM buffer */ + bool write_ram_buf; /* Write RAM buffer on exit */ + const char *state_fname; /* File containing sandbox state */ + void *state_fdt; /* Holds saved state for sandbox */ + bool read_state; /* Read sandbox state on startup */ + bool write_state; /* Write sandbox state on exit */ + bool ignore_missing_state_on_read; /* No error if state missing */ /* Pointer to information for each SPI bus/cs */ struct sandbox_spi_info spi[CONFIG_SANDBOX_SPI_MAX_BUS] [CONFIG_SANDBOX_SPI_MAX_CS]; }; +/* Minimum space we guarantee in the state FDT when calling read/write*/ +#define SANDBOX_STATE_MIN_SPACE 0x1000 + +/** + * struct sandbox_state_io - methods to saved/restore sandbox state + * @name: Name of of the device tree node, also the name of the variable + * holding this data so it should be an identifier (use underscore + * instead of minus) + * @compat: Compatible string for the node containing this state + * + * @read: Function to read state from FDT + * If data is available, then blob and node will provide access to it. If + * not (blob == NULL and node == -1) this function should set up an empty + * data set for start-of-day. + * @param blob: Pointer to device tree blob, or NULL if no data to read + * @param node: Node offset to read from + * @return 0 if OK, -ve on error + * + * @write: Function to write state to FDT + * The caller will ensure that there is a node ready for the state. The + * node may already contain the old state, in which case it should be + * overridden. There is guaranteed to be SANDBOX_STATE_MIN_SPACE bytes + * of free space, so error checking is not required for fdt_setprop...() + * calls which add up to less than this much space. + * + * For adding larger properties, use state_setprop(). + * + * @param blob: Device tree blob holding state + * @param node: Node to write our state into + * + * Note that it is possible to save data as large blobs or as individual + * hierarchical properties. However, unless you intend to keep state files + * around for a long time and be able to run an old state file on a new + * sandbox, it might not be worth using individual properties for everything. + * This is certainly supported, it is just a matter of the effort you wish + * to put into the state read/write feature. + */ +struct sandbox_state_io { + const char *name; + const char *compat; + int (*write)(void *blob, int node); + int (*read)(const void *blob, int node); +}; + +/** + * SANDBOX_STATE_IO - Declare sandbox state to read/write + * + * Sandbox permits saving state from one run and restoring it in another. This + * allows the test system to retain state between runs and thus better + * emulate a real system. Examples of state that might be useful to save are + * the emulated GPIOs pin settings, flash memory contents and TPM private + * data. U-Boot memory contents is dealth with separately since it is large + * and it is not normally useful to save it (since a normal system does not + * preserve DRAM between runs). See the '-m' option for this. + * + * See struct sandbox_state_io above for member documentation. + */ +#define SANDBOX_STATE_IO(_name, _compat, _read, _write) \ + ll_entry_declare(struct sandbox_state_io, _name, state_io) = { \ + .name = __stringify(_name), \ + .read = _read, \ + .write = _write, \ + .compat = _compat, \ + } + /** * Record the exit type to be reported by the test program. * @@ -49,8 +126,59 @@ void state_record_exit(enum exit_type_id exit_type); struct sandbox_state *state_get_current(void); /** + * Read the sandbox state from the supplied device tree file + * + * This calls all registered state handlers to read in the sandbox state + * from a previous test run. + * + * @param state Sandbox state to update + * @param fname Filename of device tree file to read from + * @return 0 if OK, -ve on error + */ +int sandbox_read_state(struct sandbox_state *state, const char *fname); + +/** + * Write the sandbox state to the supplied device tree file + * + * This calls all registered state handlers to write out the sandbox state + * so that it can be preserved for a future test run. + * + * If the file exists it is overwritten. + * + * @param state Sandbox state to update + * @param fname Filename of device tree file to write to + * @return 0 if OK, -ve on error + */ +int sandbox_write_state(struct sandbox_state *state, const char *fname); + +/** + * Add a property to a sandbox state node + * + * This is equivalent to fdt_setprop except that it automatically enlarges + * the device tree if necessary. That means it is safe to write any amount + * of data here. + * + * This function can only be called from within struct sandbox_state_io's + * ->write method, i.e. within state I/O drivers. + * + * @param node Device tree node to write to + * @param prop_name Property to write + * @param data Data to write into property + * @param size Size of data to write into property + */ +int state_setprop(int node, const char *prop_name, const void *data, int size); + +/** * Initialize the test system state */ int state_init(void); +/** + * Uninitialize the test system state, writing out state if configured to + * do so. + * + * @return 0 if OK, -ve on error + */ +int state_uninit(void); + #endif diff --git a/arch/sandbox/include/asm/u-boot-sandbox.h b/arch/sandbox/include/asm/u-boot-sandbox.h index bed720cf81..5707c2710d 100644 --- a/arch/sandbox/include/asm/u-boot-sandbox.h +++ b/arch/sandbox/include/asm/u-boot-sandbox.h @@ -23,4 +23,6 @@ int dram_init(void); int sandbox_early_getopt_check(void); int sandbox_main_loop_init(void); +int cleanup_before_linux(void); + #endif /* _U_BOOT_SANDBOX_H_ */ diff --git a/arch/sh/cpu/sh2/config.mk b/arch/sh/cpu/sh2/config.mk index 8a0de96714..69273b4f38 100644 --- a/arch/sh/cpu/sh2/config.mk +++ b/arch/sh/cpu/sh2/config.mk @@ -12,7 +12,7 @@ PLATFORM_CPPFLAGS += -m2a -m2a-nofpu -mb -ffreestanding else # SH2 PLATFORM_CPPFLAGS += -m3e -mb endif -PLATFORM_CPPFLAGS += $(call cc-option,-mno-fdpic) +PLATFORM_CPPFLAGS += -DCONFIG_SH2 $(call cc-option,-mno-fdpic) PLATFORM_RELFLAGS += -ffixed-r13 PLATFORM_LDFLAGS += $(ENDIANNESS) diff --git a/arch/sh/cpu/sh2/cpu.c b/arch/sh/cpu/sh2/cpu.c index 18479a4c40..a2f856f459 100644 --- a/arch/sh/cpu/sh2/cpu.c +++ b/arch/sh/cpu/sh2/cpu.c @@ -23,11 +23,7 @@ int checkcpu(void) { -#if defined(CONFIG_SH2A) - puts("CPU: SH2A\n"); -#else puts("CPU: SH2\n"); -#endif return 0; } diff --git a/arch/sh/cpu/sh3/config.mk b/arch/sh/cpu/sh3/config.mk index 5c77e5c32d..abd4b8d2bd 100644 --- a/arch/sh/cpu/sh3/config.mk +++ b/arch/sh/cpu/sh3/config.mk @@ -11,5 +11,5 @@ # SPDX-License-Identifier: GPL-2.0+ # # -PLATFORM_CPPFLAGS += -m3 +PLATFORM_CPPFLAGS += -DCONFIG_SH3 -m3 PLATFORM_RELFLAGS += -ffixed-r13 diff --git a/arch/sh/cpu/sh4/config.mk b/arch/sh/cpu/sh4/config.mk index c3575570e7..753580beb1 100644 --- a/arch/sh/cpu/sh4/config.mk +++ b/arch/sh/cpu/sh4/config.mk @@ -8,5 +8,5 @@ # SPDX-License-Identifier: GPL-2.0+ # # -PLATFORM_CPPFLAGS += -m4-nofpu +PLATFORM_CPPFLAGS += -DCONFIG_SH4 -m4-nofpu PLATFORM_RELFLAGS += -ffixed-r13 diff --git a/arch/sh/cpu/sh4/cpu.c b/arch/sh/cpu/sh4/cpu.c index 91133a38ae..e8ee0a45ab 100644 --- a/arch/sh/cpu/sh4/cpu.c +++ b/arch/sh/cpu/sh4/cpu.c @@ -13,11 +13,7 @@ int checkcpu(void) { -#ifdef CONFIG_SH4A - puts("CPU: SH-4A\n"); -#else puts("CPU: SH4\n"); -#endif return 0; } diff --git a/arch/sh/include/asm/cache.h b/arch/sh/include/asm/cache.h index b21dc4422e..0698a37759 100644 --- a/arch/sh/include/asm/cache.h +++ b/arch/sh/include/asm/cache.h @@ -1,7 +1,7 @@ #ifndef __ASM_SH_CACHE_H #define __ASM_SH_CACHE_H -#if defined(CONFIG_SH4) || defined(CONFIG_SH4A) +#if defined(CONFIG_SH4) int cache_control(unsigned int cmd); @@ -18,7 +18,7 @@ struct __large_struct { unsigned long buf[100]; }; */ #define ARCH_DMA_MINALIGN 32 -#endif /* CONFIG_SH4 || CONFIG_SH4A */ +#endif /* CONFIG_SH4 */ /* * Use the L1 data cache line size value for the minimum DMA buffer alignment diff --git a/arch/sh/include/asm/cpu_sh4.h b/arch/sh/include/asm/cpu_sh4.h index 9181d59a94..9f48e4fe04 100644 --- a/arch/sh/include/asm/cpu_sh4.h +++ b/arch/sh/include/asm/cpu_sh4.h @@ -37,6 +37,8 @@ # include <asm/cpu_sh7734.h> #elif defined (CONFIG_CPU_SH7752) # include <asm/cpu_sh7752.h> +#elif defined (CONFIG_CPU_SH7753) +# include <asm/cpu_sh7753.h> #elif defined (CONFIG_CPU_SH7757) # include <asm/cpu_sh7757.h> #elif defined (CONFIG_CPU_SH7763) diff --git a/arch/sh/include/asm/cpu_sh7753.h b/arch/sh/include/asm/cpu_sh7753.h new file mode 100644 index 0000000000..cd0e0bba6c --- /dev/null +++ b/arch/sh/include/asm/cpu_sh7753.h @@ -0,0 +1,197 @@ +/* + * Copyright (C) 2012 Renesas Solutions Corp. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _ASM_CPU_SH7753_H_ +#define _ASM_CPU_SH7753_H_ + +#define CCR 0xFF00001C +#define WTCNT 0xFFCC0000 +#define CCR_CACHE_INIT 0x0000090b +#define CACHE_OC_NUM_WAYS 1 + +#ifndef __ASSEMBLY__ /* put C only stuff in this section */ +/* MMU */ +struct mmu_regs { + unsigned int reserved[4]; + unsigned int mmucr; +}; +#define MMU_BASE ((struct mmu_regs *)0xff000000) + +/* Watchdog */ +#define WTCSR0 0xffcc0002 +#define WRSTCSR_R 0xffcc0003 +#define WRSTCSR_W 0xffcc0002 +#define WTCSR_PREFIX 0xa500 +#define WRSTCSR_PREFIX 0x6900 +#define WRSTCSR_WOVF_PREFIX 0x9600 + +/* SCIF */ +#define SCIF0_BASE 0xfe4b0000 /* The real name is SCIF2 */ +#define SCIF1_BASE 0xfe4c0000 /* The real name is SCIF3 */ +#define SCIF2_BASE 0xfe4d0000 /* The real name is SCIF4 */ + +/* TMU0 */ +#define TMU_BASE 0xFE430000 + +/* ETHER, GETHER MAC address */ +struct ether_mac_regs { + unsigned int reserved[114]; + unsigned int mahr; + unsigned int reserved2; + unsigned int malr; +}; +#define GETHER0_MAC_BASE ((struct ether_mac_regs *)0xfee0400) +#define GETHER1_MAC_BASE ((struct ether_mac_regs *)0xfee0c00) +#define ETHER0_MAC_BASE ((struct ether_mac_regs *)0xfef0000) +#define ETHER1_MAC_BASE ((struct ether_mac_regs *)0xfef0800) + +/* GETHER */ +struct gether_control_regs { + unsigned int gbecont; +}; +#define GETHER_CONTROL_BASE ((struct gether_control_regs *)0xffc10100) +#define GBECONT_RMII1 0x00020000 +#define GBECONT_RMII0 0x00010000 + +/* SerMux */ +struct sermux_regs { + unsigned char smr0; + unsigned char smr1; + unsigned char smr2; + unsigned char smr3; + unsigned char smr4; + unsigned char smr5; +}; +#define SERMUX_BASE ((struct sermux_regs *)0xfe470000) + + +/* USB0/1 */ +struct usb_common_regs { + unsigned short reserved[129]; + unsigned short suspmode; +}; +#define USB0_COMMON_BASE ((struct usb_common_regs *)0xfe450000) +#define USB1_COMMON_BASE ((struct usb_common_regs *)0xfe4f0000) + +struct usb0_phy_regs { + unsigned short reset; + unsigned short reserved[4]; + unsigned short portsel; +}; +#define USB0_PHY_BASE ((struct usb0_phy_regs *)0xfe5f0000) + +struct usb1_port_regs { + unsigned int port1sel; + unsigned int reserved; + unsigned int usb1intsts; +}; +#define USB1_PORT_BASE ((struct usb1_port_regs *)0xfe4f2000) + +struct usb1_alignment_regs { + unsigned int ehcidatac; /* 0xfe4fe018 */ + unsigned int reserved[63]; + unsigned int ohcidatac; +}; +#define USB1_ALIGNMENT_BASE ((struct usb1_alignment_regs *)0xfe4fe018) + +/* GPIO */ +struct gpio_regs { + unsigned short pacr; + unsigned short pbcr; + unsigned short pccr; + unsigned short pdcr; + unsigned short pecr; + unsigned short pfcr; + unsigned short pgcr; + unsigned short phcr; + unsigned short picr; + unsigned short pjcr; + unsigned short pkcr; + unsigned short plcr; + unsigned short pmcr; + unsigned short pncr; + unsigned short pocr; + unsigned short reserved; + unsigned short pqcr; + unsigned short prcr; + unsigned short pscr; + unsigned short ptcr; + unsigned short pucr; + unsigned short pvcr; + unsigned short pwcr; + unsigned short pxcr; + unsigned short pycr; + unsigned short pzcr; + unsigned char padr; + unsigned char reserved_a; + unsigned char pbdr; + unsigned char reserved_b; + unsigned char pcdr; + unsigned char reserved_c; + unsigned char pddr; + unsigned char reserved_d; + unsigned char pedr; + unsigned char reserved_e; + unsigned char pfdr; + unsigned char reserved_f; + unsigned char pgdr; + unsigned char reserved_g; + unsigned char phdr; + unsigned char reserved_h; + unsigned char pidr; + unsigned char reserved_i; + unsigned char pjdr; + unsigned char reserved_j; + unsigned char pkdr; + unsigned char reserved_k; + unsigned char pldr; + unsigned char reserved_l; + unsigned char pmdr; + unsigned char reserved_m; + unsigned char pndr; + unsigned char reserved_n; + unsigned char podr; + unsigned char reserved_o; + unsigned char ppdr; + unsigned char reserved_p; + unsigned char pqdr; + unsigned char reserved_q; + unsigned char prdr; + unsigned char reserved_r; + unsigned char psdr; + unsigned char reserved_s; + unsigned char ptdr; + unsigned char reserved_t; + unsigned char pudr; + unsigned char reserved_u; + unsigned char pvdr; + unsigned char reserved_v; + unsigned char pwdr; + unsigned char reserved_w; + unsigned char pxdr; + unsigned char reserved_x; + unsigned char pydr; + unsigned char reserved_y; + unsigned char pzdr; + unsigned char reserved_z; + unsigned short ncer; + unsigned short ncmcr; + unsigned short nccsr; + unsigned char reserved2[2]; + unsigned short psel0; /* +0x70 */ + unsigned short psel1; + unsigned short psel2; + unsigned short psel3; + unsigned short psel4; + unsigned short psel5; + unsigned short psel6; + unsigned short reserved3[2]; + unsigned short psel7; +}; +#define GPIO_BASE ((struct gpio_regs *)0xffec0000) + +#endif /* ifndef __ASSEMBLY__ */ +#endif /* _ASM_CPU_SH7753_H_ */ diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h index 938a89cff5..b8677da959 100644 --- a/arch/sh/include/asm/processor.h +++ b/arch/sh/include/asm/processor.h @@ -1,12 +1,10 @@ #ifndef _ASM_SH_PROCESSOR_H_ #define _ASM_SH_PROCESSOR_H_ -#if defined(CONFIG_SH2) || \ - defined (CONFIG_SH2A) +#if defined(CONFIG_SH2) # include <asm/cpu_sh2.h> -#elif defined (CONFIG_SH3) +#elif defined(CONFIG_SH3) # include <asm/cpu_sh3.h> -#elif defined (CONFIG_SH4) || \ - defined (CONFIG_SH4A) +#elif defined(CONFIG_SH4) # include <asm/cpu_sh4.h> #endif #endif diff --git a/arch/sh/lib/time_sh2.c b/arch/sh/lib/time_sh2.c index be3896c3ed..4b1f47b6ad 100644 --- a/arch/sh/lib/time_sh2.c +++ b/arch/sh/lib/time_sh2.c @@ -84,5 +84,5 @@ void __udelay(unsigned long usec) unsigned long get_tbclk(void) { - return CONFIG_SYS_HZ; + return CONFIG_SH_CMT_CLK_FREQ; } diff --git a/board/friendlyarm/mini2440/Makefile b/board/armltd/vexpress64/Makefile index f3671071b5..e009141a42 100644 --- a/board/friendlyarm/mini2440/Makefile +++ b/board/armltd/vexpress64/Makefile @@ -1,8 +1,8 @@ # -# (C) Copyright 2012 +# (C) Copyright 2000-2004 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # # SPDX-License-Identifier: GPL-2.0+ # -obj-y := mini2440.o +obj-y := vexpress64.o diff --git a/board/armltd/vexpress64/vexpress64.c b/board/armltd/vexpress64/vexpress64.c new file mode 100644 index 0000000000..2ec3bc9835 --- /dev/null +++ b/board/armltd/vexpress64/vexpress64.c @@ -0,0 +1,56 @@ +/* + * (C) Copyright 2013 + * David Feng <fenghua@phytium.com.cn> + * Sharma Bhupesh <bhupesh.sharma@freescale.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <common.h> +#include <malloc.h> +#include <errno.h> +#include <netdev.h> +#include <asm/io.h> +#include <linux/compiler.h> + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ + /* + * Clear spin table so that secondary processors + * observe the correct value after waken up from wfe. + */ + *(unsigned long *)CPU_RELEASE_ADDR = 0; + + gd->ram_size = PHYS_SDRAM_1_SIZE; + return 0; +} + +int timer_init(void) +{ + return 0; +} + +/* + * Board specific reset that is system reset. + */ +void reset_cpu(ulong addr) +{ +} + +/* + * Board specific ethernet initialization routine. + */ +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif + return rc; +} diff --git a/board/bf609-ezkit/bf609-ezkit.c b/board/bf609-ezkit/bf609-ezkit.c index 0388226db4..cfc64fe51d 100644 --- a/board/bf609-ezkit/bf609-ezkit.c +++ b/board/bf609-ezkit/bf609-ezkit.c @@ -10,6 +10,7 @@ #include <netdev.h> #include <asm/blackfin.h> #include <asm/io.h> +#include <asm/sdh.h> #include <asm/portmux.h> #include "soft_switch.h" diff --git a/board/freescale/b4860qds/b4_rcw.cfg b/board/freescale/b4860qds/b4_rcw.cfg index 577dabf1d2..597d3914ca 100644 --- a/board/freescale/b4860qds/b4_rcw.cfg +++ b/board/freescale/b4860qds/b4_rcw.cfg @@ -2,6 +2,6 @@ aa55aa55 010e0100 # serdes protocol 0x2A_0x98 140e0018 0f001218 00000000 00000000 -54980000 9000a000 f8025000 a9000000 +54980000 9000a000 e8104000 a9000000 01000000 00000000 00000000 0001b1f8 00000000 14000020 00000000 00000011 diff --git a/board/freescale/bsc9131rdb/tlb.c b/board/freescale/bsc9131rdb/tlb.c index 669fe8ad32..c8ecf5de59 100644 --- a/board/freescale/bsc9131rdb/tlb.c +++ b/board/freescale/bsc9131rdb/tlb.c @@ -30,7 +30,7 @@ struct fsl_e_tlb_entry tlb_table[] = { SET_TLB_ENTRY(1, 0xfffff000, 0xfffff000, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 0, BOOKE_PAGESZ_4K, 1), -#ifdef CONFIG_SPL_NAND_MINIMAL +#ifdef CONFIG_SPL_NAND_BOOT SET_TLB_ENTRY(1, 0xffffe000, 0xffffe000, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 10, BOOKE_PAGESZ_4K, 1), diff --git a/board/freescale/bsc9132qds/tlb.c b/board/freescale/bsc9132qds/tlb.c index 02655e9baf..07febc2b37 100644 --- a/board/freescale/bsc9132qds/tlb.c +++ b/board/freescale/bsc9132qds/tlb.c @@ -30,7 +30,7 @@ struct fsl_e_tlb_entry tlb_table[] = { SET_TLB_ENTRY(1, 0xfffff000, 0xfffff000, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 0, BOOKE_PAGESZ_4K, 1), -#ifdef CONFIG_SPL_NAND_MINIMAL +#ifdef CONFIG_SPL_NAND_BOOT SET_TLB_ENTRY(1, 0xffffe000, 0xffffe000, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 10, BOOKE_PAGESZ_4K, 1), diff --git a/board/freescale/common/p_corenet/Makefile b/board/freescale/common/p_corenet/Makefile index 889c4938c0..1f399d2496 100644 --- a/board/freescale/common/p_corenet/Makefile +++ b/board/freescale/common/p_corenet/Makefile @@ -5,8 +5,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -CPPFLAGS += -I$(TOPDIR) - obj-y += law.o obj-$(CONFIG_PCI) += pci.o obj-y += tlb.o diff --git a/board/freescale/p1010rdb/tlb.c b/board/freescale/p1010rdb/tlb.c index a7af0f6756..a3d36b35d5 100644 --- a/board/freescale/p1010rdb/tlb.c +++ b/board/freescale/p1010rdb/tlb.c @@ -30,7 +30,7 @@ struct fsl_e_tlb_entry tlb_table[] = { SET_TLB_ENTRY(1, 0xfffff000, 0xfffff000, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 0, BOOKE_PAGESZ_4K, 1), -#ifdef CONFIG_SPL_NAND_MINIMAL +#ifdef CONFIG_SPL_NAND_BOOT SET_TLB_ENTRY(1, 0xffffe000, 0xffffe000, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 10, BOOKE_PAGESZ_4K, 1), diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c index 966abb24a6..5f3d6fd28b 100644 --- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c +++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c @@ -1,5 +1,5 @@ /* - * Copyright 2010-2011 Freescale Semiconductor, Inc. + * Copyright 2010-2011, 2013 Freescale Semiconductor, Inc. * * SPDX-License-Identifier: GPL-2.0+ */ @@ -354,7 +354,7 @@ int board_eth_init(bd_t *bis) puts("No address specified for VSC7385 microcode.\n"); #endif - mdio_info.regs = (struct tsec_mii_mng *)CONFIG_SYS_MDIO_BASE_ADDR; + mdio_info.regs = TSEC_GET_MDIO_REGS_BASE(1); mdio_info.name = DEFAULT_MII_NAME; fsl_pq_mdio_init(bis, &mdio_info); diff --git a/board/freescale/t1040qds/t1040_pbi.cfg b/board/freescale/t1040qds/t1040_pbi.cfg index 624398a25d..10b1a6d179 100644 --- a/board/freescale/t1040qds/t1040_pbi.cfg +++ b/board/freescale/t1040qds/t1040_pbi.cfg @@ -3,7 +3,7 @@ 09010000 00200400 09138000 00000000 091380c0 00000100 -#Configure CPC1 as 512KB SRAM +#Configure CPC1 as 256KB SRAM 09010100 00000000 09010104 fffc0007 09010f00 08000000 diff --git a/board/freescale/t1040qds/t1040qds.c b/board/freescale/t1040qds/t1040qds.c index 2aa176c7a2..de3ea5c2aa 100644 --- a/board/freescale/t1040qds/t1040qds.c +++ b/board/freescale/t1040qds/t1040qds.c @@ -239,3 +239,8 @@ void qixis_dump_switch(void) printf("SW%d = (0x%02x)\n", i, QIXIS_READ(cms[1])); } } + +int board_need_mem_reset(void) +{ + return 1; +} diff --git a/board/friendlyarm/mini2440/mini2440.c b/board/friendlyarm/mini2440/mini2440.c deleted file mode 100644 index 59ed0548e7..0000000000 --- a/board/friendlyarm/mini2440/mini2440.c +++ /dev/null @@ -1,118 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * (C) Copyright 2002 - * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch> - * - * (C) Copyright 2009 - * Michel Pollet <buserror@gmail.com> - * - * (C) Copyright 2012 - * Gabriel Huau <contact@huau-gabriel.fr> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <asm/arch/s3c2440.h> -#include <asm/arch/iomux.h> -#include <asm/arch/gpio.h> -#include <asm/io.h> -#include <asm/gpio.h> -#include <netdev.h> -#include "mini2440.h" - -DECLARE_GLOBAL_DATA_PTR; - -static inline void pll_delay(unsigned long loops) -{ - __asm__ volatile ("1:\n" - "subs %0, %1, #1\n" - "bne 1b" : "=r" (loops) : "0" (loops)); -} - -int board_early_init_f(void) -{ - struct s3c24x0_clock_power * const clk_power = - s3c24x0_get_base_clock_power(); - - /* to reduce PLL lock time, adjust the LOCKTIME register */ - clk_power->locktime = 0xFFFFFF; /* Max PLL Lock time count */ - clk_power->clkdivn = CLKDIVN_VAL; - - /* configure UPLL */ - clk_power->upllcon = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV); - /* some delay between MPLL and UPLL */ - pll_delay(100); - - /* configure MPLL */ - clk_power->mpllcon = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV); - - /* some delay between MPLL and UPLL */ - pll_delay(10000); - - return 0; -} - -/* - * Miscellaneous platform dependent initialisations - */ -int board_init(void) -{ - struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio(); - - /* IOMUX Port H : UART Configuration */ - gpio->gphcon = IOMUXH_nCTS0 | IOMUXH_nRTS0 | IOMUXH_TXD0 | IOMUXH_RXD0 | - IOMUXH_TXD1 | IOMUXH_RXD1 | IOMUXH_TXD2 | IOMUXH_RXD2; - - gpio_direction_output(GPH8, 0); - gpio_direction_output(GPH9, 0); - gpio_direction_output(GPH10, 0); - - /* adress of boot parameters */ - gd->bd->bi_boot_params = CONFIG_BOOT_PARAM_ADDR; - - return 0; -} - -int dram_init(void) -{ - struct s3c24x0_memctl *memctl = s3c24x0_get_base_memctl(); - - /* - * Configuring bus width and timing - * Initialize clocks for each bank 0..5 - * Bank 3 and 4 are used for DM9000 - */ - writel(BANK_CONF, &memctl->bwscon); - writel(B0_CONF, &memctl->bankcon[0]); - writel(B1_CONF, &memctl->bankcon[1]); - writel(B2_CONF, &memctl->bankcon[2]); - writel(B3_CONF, &memctl->bankcon[3]); - writel(B4_CONF, &memctl->bankcon[4]); - writel(B5_CONF, &memctl->bankcon[5]); - - /* Bank 6 and 7 are used for DRAM */ - writel(SDRAM_64MB, &memctl->bankcon[6]); - writel(SDRAM_64MB, &memctl->bankcon[7]); - - writel(MEM_TIMING, &memctl->refresh); - writel(BANKSIZE_CONF, &memctl->banksize); - writel(B6_MRSR, &memctl->mrsrb6); - writel(B7_MRSR, &memctl->mrsrb7); - - gd->ram_size = get_ram_size((void *) CONFIG_SYS_SDRAM_BASE, - PHYS_SDRAM_SIZE); - return 0; -} - -int board_eth_init(bd_t *bis) -{ -#ifdef CONFIG_DRIVER_DM9000 - return dm9000_initialize(bis); -#else - return 0; -#endif -} diff --git a/board/friendlyarm/mini2440/mini2440.h b/board/friendlyarm/mini2440/mini2440.h deleted file mode 100644 index db386eac01..0000000000 --- a/board/friendlyarm/mini2440/mini2440.h +++ /dev/null @@ -1,144 +0,0 @@ -#ifndef __MINI2440_BOARD_CONF_H__ -#define __MINI2440_BOARD_CONF_H__ - -/* PLL Parameters */ -#define CLKDIVN_VAL 7 -#define M_MDIV 0x7f -#define M_PDIV 0x2 -#define M_SDIV 0x1 - -#define U_M_MDIV 0x38 -#define U_M_PDIV 0x2 -#define U_M_SDIV 0x2 - -/* BWSCON */ -#define DW8 0x0 -#define DW16 0x1 -#define DW32 0x2 -#define WAIT (0x1<<2) -#define UBLB (0x1<<3) - -#define B1_BWSCON (DW32) -#define B2_BWSCON (DW16) -#define B3_BWSCON (DW16 + WAIT + UBLB) -#define B4_BWSCON (DW16 + WAIT + UBLB) -#define B5_BWSCON (DW16) -#define B6_BWSCON (DW32) -#define B7_BWSCON (DW32) - -/* - * Bank Configuration - */ -#define B0_Tacs 0x0 /* 0clk */ -#define B0_Tcos 0x0 /* 0clk */ -#define B0_Tacc 0x7 /* 14clk */ -#define B0_Tcoh 0x0 /* 0clk */ -#define B0_Tah 0x0 /* 0clk */ -#define B0_Tacp 0x0 /* 0clk */ -#define B0_PMC 0x0 /* normal */ - -#define B1_Tacs 0x0 -#define B1_Tcos 0x0 -#define B1_Tacc 0x7 -#define B1_Tcoh 0x0 -#define B1_Tah 0x0 -#define B1_Tacp 0x0 -#define B1_PMC 0x0 - -#define B2_Tacs 0x0 -#define B2_Tcos 0x0 -#define B2_Tacc 0x7 -#define B2_Tcoh 0x0 -#define B2_Tah 0x0 -#define B2_Tacp 0x0 -#define B2_PMC 0x0 - -#define B3_Tacs 0x0 -#define B3_Tcos 0x3 /* 4clk */ -#define B3_Tacc 0x7 -#define B3_Tcoh 0x1 /* 1clk */ -#define B3_Tah 0x3 /* 4clk */ -#define B3_Tacp 0x0 -#define B3_PMC 0x0 - -#define B4_Tacs 0x0 -#define B4_Tcos 0x3 -#define B4_Tacc 0x7 -#define B4_Tcoh 0x1 -#define B4_Tah 0x3 -#define B4_Tacp 0x0 -#define B4_PMC 0x0 - -#define B5_Tacs 0x0 -#define B5_Tcos 0x0 -#define B5_Tacc 0x7 -#define B5_Tcoh 0x0 -#define B5_Tah 0x0 -#define B5_Tacp 0x0 -#define B5_PMC 0x0 - -/* - * SDRAM Configuration - */ -#define SDRAM_MT 0x3 /* SDRAM */ -#define SDRAM_Trcd 0x0 /* 2clk */ -#define SDRAM_SCAN_9 0x1 /* 9bit */ -#define SDRAM_SCAN_10 0x2 /* 10bit */ - -#define SDRAM_64MB ((SDRAM_MT<<15) + (SDRAM_Trcd<<2) + (SDRAM_SCAN_9)) - -/* - * Refresh Parameter - */ -#define REFEN 0x1 /* Refresh enable */ -#define TREFMD 0x0 /* CBR(CAS before RAS)/Auto refresh */ -#define Trp 0x1 /* 3clk */ -#define Trc 0x3 /* 7clk */ -#define Tchr 0x0 /* unused */ -#define REFCNT 1012 /* period=10.37us, HCLK=100Mhz, (2048 + 1-10.37*100) */ - -/* - * MRSR Parameter - */ -#define BL 0x0 -#define BT 0x0 -#define CL 0x3 /* 3 clocks */ -#define TM 0x0 -#define WBL 0x0 - -/* - * BankSize Parameter - */ -#define BK76MAP 0x2 /* 128MB/128MB */ -#define SCLK_EN 0x1 /* SCLK active */ -#define SCKE_EN 0x1 /* SDRAM power down mode enable */ -#define BURST_EN 0x1 /* Burst enable */ - -/* - * Register values - */ -#define BANK_CONF ((0 + (B1_BWSCON<<4) + (B2_BWSCON<<8) + (B3_BWSCON<<12) + \ - (B4_BWSCON<<16) + (B5_BWSCON<<20) + (B6_BWSCON<<24) + \ - (B7_BWSCON<<28))) - -#define B0_CONF ((B0_Tacs<<13) + (B0_Tcos<<11) + (B0_Tacc<<8) + \ - (B0_Tcoh<<6) + (B0_Tah<<4) + (B0_Tacp<<2) + (B0_PMC)) -#define B1_CONF ((B1_Tacs<<13) + (B1_Tcos<<11) + (B1_Tacc<<8) + \ - (B1_Tcoh<<6) + (B1_Tah<<4) + (B1_Tacp<<2) + (B1_PMC)) -#define B2_CONF ((B2_Tacs<<13) + (B2_Tcos<<11) + (B2_Tacc<<8) + \ - (B2_Tcoh<<6) + (B2_Tah<<4) + (B2_Tacp<<2) + (B2_PMC)) -#define B3_CONF ((B3_Tacs<<13) + (B3_Tcos<<11) + (B3_Tacc<<8) + \ - (B3_Tcoh<<6) + (B3_Tah<<4) + (B3_Tacp<<2) + (B3_PMC)) -#define B4_CONF ((B4_Tacs<<13) + (B4_Tcos<<11) + (B4_Tacc<<8) + \ - (B4_Tcoh<<6) + (B4_Tah<<4) + (B4_Tacp<<2) + (B4_PMC)) -#define B5_CONF ((B5_Tacs<<13) + (B5_Tcos<<11) + (B5_Tacc<<8) + \ - (B5_Tcoh<<6) + (B5_Tah<<4) + (B5_Tacp<<2) + (B5_PMC)) - -#define MEM_TIMING (REFEN<<23) + (TREFMD<<22) + (Trp<<20) + \ - (Trc<<18) + (Tchr<<16) + REFCNT - -#define BANKSIZE_CONF (BK76MAP) + (SCLK_EN<<4) + (SCKE_EN<<5) + (BURST_EN<<7) -#define B6_MRSR (CL<<4) -#define B7_MRSR (CL<<4) - -#endif diff --git a/board/linkstation/Makefile b/board/linkstation/Makefile deleted file mode 100644 index 3eeba7dcaa..0000000000 --- a/board/linkstation/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# -# (C) Copyright 2001 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y = linkstation.o ide.o hwctl.o avr.o diff --git a/board/linkstation/avr.c b/board/linkstation/avr.c deleted file mode 100644 index 62e586ba09..0000000000 --- a/board/linkstation/avr.c +++ /dev/null @@ -1,280 +0,0 @@ -/* - * avr.c - * - * AVR functions - * - * Copyright (C) 2006 Mihai Georgian <u-boot@linuxnotincluded.org.uk> - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#include <common.h> -#include <ns16550.h> -#include <stdio_dev.h> - -/* Button codes from the AVR */ -#define PWRR 0x20 /* Power button release */ -#define PWRP 0x21 /* Power button push */ -#define RESR 0x22 /* Reset button release */ -#define RESP 0x23 /* Reset button push */ -#define AVRINIT 0x33 /* Init complete */ -#define AVRRESET 0x31 /* Reset request */ - -/* LED commands */ -#define PWRBLINKSTRT '[' /* Blink power LED */ -#define PWRBLINKSTOP 'Z' /* Solid power LED */ -#define HDDLEDON 'W' /* HDD LED on */ -#define HDDLEDOFF 'V' /* HDD LED off */ -#define HDDBLINKSTRT 'Y' /* HDD LED start blink */ -#define HDDBLINKSTOP 'X' /* HDD LED stop blink */ - -/* Timings for LEDs blinking to show choice */ -#define PULSETIME 250 /* msecs */ -#define LONGPAUSE (5 * PULSETIME) - -/* Button press times */ -#define PUSHHOLD 1000 /* msecs */ -#define NOBUTTON (6 * (LONGPAUSE+PULSETIME)) - -/* Boot and console choices */ -#define MAX_BOOT_CHOICE 3 - -static char *consoles[] = { - "serial", -#if defined(CONFIG_NETCONSOLE) - "nc", -#endif -}; -#define MAX_CONS_CHOICE (sizeof(consoles)/sizeof(char *)) - -#if !defined(CONFIG_NETCONSOLE) -#define DEF_CONS_CHOICE 0 -#else -#define DEF_CONS_CHOICE 1 -#endif - -#define perror(fmt, args...) printf("%s: " fmt, __FUNCTION__ , ##args) - -extern void miconCntl_SendCmd(unsigned char dat); -extern void miconCntl_DisWDT(void); - -static int boot_stop; - -static int boot_choice = 1; -static int cons_choice = DEF_CONS_CHOICE; - -static char envbuffer[16]; - -void init_AVR_DUART (void) -{ - NS16550_t AVR_port = (NS16550_t) CONFIG_SYS_NS16550_COM2; - int clock_divisor = CONFIG_SYS_NS16550_CLK / 16 / 9600; - - /* - * AVR port init sequence taken from - * the original Linkstation init code - * Normal U-Boot serial reinit doesn't - * work because the AVR uses even parity - */ - AVR_port->lcr = 0x00; - AVR_port->ier = 0x00; - AVR_port->lcr = UART_LCR_BKSE; - AVR_port->dll = clock_divisor & 0xff; - AVR_port->dlm = (clock_divisor >> 8) & 0xff; - AVR_port->lcr = UART_LCR_WLS_8 | UART_LCR_PEN | UART_LCR_EPS; - AVR_port->mcr = 0x00; - AVR_port->fcr = UART_FCR_FIFO_EN | UART_FCR_RXSR | UART_FCR_TXSR; - - miconCntl_DisWDT(); - - boot_stop = 0; - miconCntl_SendCmd(PWRBLINKSTRT); -} - -static inline int avr_tstc(void) -{ - return (NS16550_tstc((NS16550_t)CONFIG_SYS_NS16550_COM2)); -} - -static inline char avr_getc(void) -{ - return (NS16550_getc((NS16550_t)CONFIG_SYS_NS16550_COM2)); -} - -static int push_timeout(char button_code) -{ - ulong push_start = get_timer(0); - while (get_timer(push_start) <= PUSHHOLD) - if (avr_tstc() && avr_getc() == button_code) - return 0; - return 1; -} - -static void next_boot_choice(void) -{ - ulong return_start; - ulong pulse_start; - int on_times; - int button_on; - int led_state; - char c; - - button_on = 0; - return_start = get_timer(0); - - on_times = boot_choice; - led_state = 0; - miconCntl_SendCmd(HDDLEDOFF); - pulse_start = get_timer(0); - - while (get_timer(return_start) <= NOBUTTON || button_on) { - if (avr_tstc()) { - c = avr_getc(); - if (c == PWRP) - button_on = 1; - else if (c == PWRR) { - button_on = 0; - return_start = get_timer(0); - if (++boot_choice > MAX_BOOT_CHOICE) - boot_choice = 1; - sprintf(envbuffer, "bootcmd%d", boot_choice); - if (getenv(envbuffer)) { - sprintf(envbuffer, "run bootcmd%d", boot_choice); - setenv("bootcmd", envbuffer); - } - on_times = boot_choice; - led_state = 1; - miconCntl_SendCmd(HDDLEDON); - pulse_start = get_timer(0); - } else { - perror("Unexpected code: 0x%02X\n", c); - } - } - if (on_times && get_timer(pulse_start) > PULSETIME) { - if (led_state == 1) { - --on_times; - led_state = 0; - miconCntl_SendCmd(HDDLEDOFF); - } else { - led_state = 1; - miconCntl_SendCmd(HDDLEDON); - } - pulse_start = get_timer(0); - } - if (!on_times && get_timer(pulse_start) > LONGPAUSE) { - on_times = boot_choice; - led_state = 1; - miconCntl_SendCmd(HDDLEDON); - pulse_start = get_timer(0); - } - } - if (led_state) - miconCntl_SendCmd(HDDLEDOFF); -} - -void next_cons_choice(int console) -{ - ulong return_start; - ulong pulse_start; - int on_times; - int button_on; - int led_state; - char c; - - button_on = 0; - cons_choice = console; - return_start = get_timer(0); - - on_times = cons_choice+1; - led_state = 1; - miconCntl_SendCmd(HDDLEDON); - pulse_start = get_timer(0); - - while (get_timer(return_start) <= NOBUTTON || button_on) { - if (avr_tstc()) { - c = avr_getc(); - if (c == RESP) - button_on = 1; - else if (c == RESR) { - button_on = 0; - return_start = get_timer(0); - cons_choice = (cons_choice + 1) % MAX_CONS_CHOICE; - console_assign(stdin, consoles[cons_choice]); - console_assign(stdout, consoles[cons_choice]); - console_assign(stderr, consoles[cons_choice]); - on_times = cons_choice+1; - led_state = 0; - miconCntl_SendCmd(HDDLEDOFF); - pulse_start = get_timer(0); - } else { - perror("Unexpected code: 0x%02X\n", c); - } - } - if (on_times && get_timer(pulse_start) > PULSETIME) { - if (led_state == 0) { - --on_times; - led_state = 1; - miconCntl_SendCmd(HDDLEDON); - } else { - led_state = 0; - miconCntl_SendCmd(HDDLEDOFF); - } - pulse_start = get_timer(0); - } - if (!on_times && get_timer(pulse_start) > LONGPAUSE) { - on_times = cons_choice+1; - led_state = 0; - miconCntl_SendCmd(HDDLEDOFF); - pulse_start = get_timer(0); - } - } - if (led_state); - miconCntl_SendCmd(HDDLEDOFF); -} - -int avr_input(void) -{ - char avr_button; - - if (!avr_tstc()) - return 0; - - avr_button = avr_getc(); - switch (avr_button) { - case PWRP: - if (push_timeout(PWRR)) { - /* Timeout before power button release */ - boot_stop = ~boot_stop; - if (boot_stop) - miconCntl_SendCmd(PWRBLINKSTOP); - else - miconCntl_SendCmd(PWRBLINKSTRT); - /* Wait for power button release */ - while (avr_getc() != PWRR) - ; - } else - /* Power button released */ - next_boot_choice(); - break; - case RESP: - /* Wait for Reset button release */ - while (avr_getc() != RESR) - ; - next_cons_choice(cons_choice); - break; - case AVRINIT: - return 0; - default: - perror("Unexpected code: 0x%02X\n", avr_button); - return 0; - } - if (boot_stop) - return (-3); - else - return (-2); -} - -void avr_StopBoot(void) -{ - boot_stop = ~0; - miconCntl_SendCmd(PWRBLINKSTOP); -} diff --git a/board/linkstation/hwctl.c b/board/linkstation/hwctl.c deleted file mode 100644 index d2090be1ad..0000000000 --- a/board/linkstation/hwctl.c +++ /dev/null @@ -1,133 +0,0 @@ -/* - * hwctl.c - * - * LinkStation HW Control Driver - * - * Copyright (C) 2001-2004 BUFFALO INC. - * - * This software may be used and distributed according to the terms of - * the GNU General Public License (GPL), incorporated herein by reference. - * Drivers based on or derived from this code fall under the GPL and must - * retain the authorship, copyright and license notice. This file is not - * a complete program and may only be used when the entire operating - * system is licensed under the GPL. - * - */ - -#include <config.h> -#include <common.h> -#include <command.h> -#include <asm/io.h> - -#define AVR_PORT CONFIG_SYS_NS16550_COM2 - -/* 2005.5.10 BUFFALO add */ -/*--------------------------------------------------------------*/ -static inline void miconCntl_SendUart(unsigned char dat) -{ - out_8((unsigned char *)AVR_PORT, dat); - mdelay(1); -} - -/*--------------------------------------------------------------*/ -void miconCntl_SendCmd(unsigned char dat) -{ - int i; - - for (i=0; i<4; i++){ - miconCntl_SendUart(dat); - } -} - -/*--------------------------------------------------------------*/ -void miconCntl_FanLow(void) -{ -#ifdef CONFIG_HTGL - miconCntl_SendCmd(0x5C); -#endif -} - -/*--------------------------------------------------------------*/ -void miconCntl_FanHigh(void) -{ -#ifdef CONFIG_HTGL - miconCntl_SendCmd(0x5D); -#endif -} - -/*--------------------------------------------------------------*/ -/* 1000Mbps */ -void miconCntl_Eth1000M(int up) -{ -#ifdef CONFIG_HTGL - if (up) - miconCntl_SendCmd(0x93); - else - miconCntl_SendCmd(0x92); -#else - if (up) - miconCntl_SendCmd(0x5D); - else - miconCntl_SendCmd(0x5C); -#endif -} - -/*--------------------------------------------------------------*/ -/* 100Mbps */ -void miconCntl_Eth100M(int up) -{ -#ifdef CONFIG_HTGL - if (up) - miconCntl_SendCmd(0x91); - else - miconCntl_SendCmd(0x90); -#else - if (up) - miconCntl_SendCmd(0x5C); -#endif -} - -/*--------------------------------------------------------------*/ -/* 10Mbps */ -void miconCntl_Eth10M(int up) -{ -#ifdef CONFIG_HTGL - if (up) - miconCntl_SendCmd(0x8F); - else - miconCntl_SendCmd(0x8E); -#else - if (up) - miconCntl_SendCmd(0x5C); -#endif -} - -/*--------------------------------------------------------------*/ -/* */ -void miconCntl_5f(void) -{ - miconCntl_SendCmd(0x5F); - mdelay(100); -} - -/*--------------------------------------------------------------*/ -/* "reboot start" signal */ -void miconCntl_Reboot(void) -{ - miconCntl_SendCmd(0x43); -} - -/*--------------------------------------------------------------*/ -/* Disable watchdog timer */ -void miconCntl_DisWDT(void) -{ - miconCntl_SendCmd(0x41); /* A */ - miconCntl_SendCmd(0x46); /* F */ - miconCntl_SendCmd(0x4A); /* J */ - miconCntl_SendCmd(0x3E); /* > */ - miconCntl_SendCmd(0x56); /* V */ - miconCntl_SendCmd(0x3E); /* > */ - miconCntl_SendCmd(0x5A); /* Z */ - miconCntl_SendCmd(0x56); /* V */ - miconCntl_SendCmd(0x4B); /* K */ -} diff --git a/board/linkstation/ide.c b/board/linkstation/ide.c deleted file mode 100644 index 7b3fe65cff..0000000000 --- a/board/linkstation/ide.c +++ /dev/null @@ -1,85 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ -/* ide.c - ide support functions */ - - -#include <common.h> - -#ifdef CONFIG_CMD_IDE -#include <ata.h> -#include <ide.h> -#include <pci.h> - -#define IT8212_PCI_CpuCONTROL 0x5e -#define IT8212_PCI_PciModeCONTROL 0x50 -#define IT8212_PCI_IdeIoCONFIG 0x40 -#define IT8212_PCI_IdeBusSkewCONTROL 0x4c -#define IT8212_PCI_IdeDrivingCURRENT 0x42 - -extern struct pci_controller hose; - -int ide_preinit (void) -{ - int status; - pci_dev_t devbusfn; - int l; - - status = 1; - for (l = 0; l < CONFIG_SYS_IDE_MAXBUS; l++) { - ide_bus_offset[l] = -ATA_STATUS; - } - devbusfn = pci_find_device(PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_680, 0); - if (devbusfn == -1) - devbusfn = pci_find_device(PCI_VENDOR_ID_ITE,PCI_DEVICE_ID_ITE_8212,0); - if (devbusfn != -1) { - u32 ide_bus_offset32; - - status = 0; - - pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0, - &ide_bus_offset32); - ide_bus_offset[0] = ide_bus_offset32 & 0xfffffffe; - ide_bus_offset[0] = pci_hose_bus_to_phys(&hose, - ide_bus_offset[0] & 0xfffffffe, - PCI_REGION_IO); - if (CONFIG_SYS_IDE_MAXBUS > 1) { - pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_2, - (u32 *) &ide_bus_offset[1]); - ide_bus_offset[1] &= 0xfffffffe; - ide_bus_offset[1] = pci_hose_bus_to_phys(&hose, - ide_bus_offset[1] & 0xfffffffe, - PCI_REGION_IO); - } - } - - if (pci_find_device (PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_8212, 0) != -1) { - pci_write_config_byte(devbusfn, IT8212_PCI_CpuCONTROL, 0x01); - pci_write_config_byte(devbusfn, IT8212_PCI_PciModeCONTROL, 0x00); - pci_write_config_word(devbusfn, PCI_COMMAND, 0x0047); -#ifdef CONFIG_IT8212_SECONDARY_ENABLE - pci_write_config_word(devbusfn, IT8212_PCI_IdeIoCONFIG, 0xA0F3); -#else - pci_write_config_word(devbusfn, IT8212_PCI_IdeIoCONFIG, 0x8031); -#endif - pci_write_config_dword(devbusfn, IT8212_PCI_IdeBusSkewCONTROL, 0x02040204); -/* __LS_COMMENT__ BUFFALO changed 2004.11.10 changed for EMI */ - pci_write_config_byte(devbusfn, IT8212_PCI_IdeDrivingCURRENT, 0x36); /* 10mA */ -/* pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x09); */ /* 4mA */ -/* pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x12); */ /* 6mA */ -/* pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x24); */ /* 6mA,2mA */ -/* pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x2D); */ /* 8mA,4mA */ - pci_write_config_byte(devbusfn, PCI_LATENCY_TIMER, 0x00); - } - - return (status); -} - -void ide_set_reset (int flag) { - return; -} - -#endif /* CONFIG_CMD_IDE */ diff --git a/board/linkstation/linkstation.c b/board/linkstation/linkstation.c deleted file mode 100644 index 75cda8681f..0000000000 --- a/board/linkstation/linkstation.c +++ /dev/null @@ -1,124 +0,0 @@ -/* - * linkstation.c - * - * Misc LinkStation specific functions - * - * Copyright (C) 2006 Mihai Georgian <u-boot@linuxnotincluded.org.uk> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <version.h> -#include <mpc824x.h> -#include <asm/io.h> -#include <ns16550.h> -#include <netdev.h> - -#ifdef CONFIG_PCI -#include <pci.h> -#endif - -DECLARE_GLOBAL_DATA_PTR; - -extern void init_AVR_DUART(void); - -int checkboard (void) -{ - char *p; - bd_t *bd = gd->bd; - - init_AVR_DUART(); - - if ((p = getenv ("console_nr")) != NULL) { - unsigned long con_nr = simple_strtoul (p, NULL, 10) & 3; - - bd->bi_baudrate &= ~3; - bd->bi_baudrate |= con_nr & 3; - } - return 0; -} - -phys_size_t initdram (int board_type) -{ - return (get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE)); -} - -/* - * Initialize PCI Devices - */ -#ifdef CONFIG_PCI - -#ifndef CONFIG_PCI_PNP - -static struct pci_config_table pci_linkstation_config_table[] = { - /* vendor, device, class */ - /* bus, dev, func */ - { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, - PCI_ANY_ID, 0x0b, 0, /* AN983B or RTL8110S */ - /* ethernet controller */ - pci_cfgfunc_config_device, { PCI_ETH_IOADDR, - PCI_ETH_MEMADDR, - PCI_COMMAND_IO | - PCI_COMMAND_MEMORY | - PCI_COMMAND_MASTER }}, - { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, - PCI_ANY_ID, 0x0c, 0, /* SII680 or IT8211AF */ - /* ide controller */ - pci_cfgfunc_config_device, { PCI_IDE_IOADDR, - PCI_IDE_MEMADDR, - PCI_COMMAND_IO | - PCI_COMMAND_MEMORY | - PCI_COMMAND_MASTER }}, - { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, - PCI_ANY_ID, 0x0e, 0, /* D720101 USB controller, 1st USB 1.1 */ - pci_cfgfunc_config_device, { PCI_USB0_IOADDR, - PCI_USB0_MEMADDR, - PCI_COMMAND_MEMORY | - PCI_COMMAND_MASTER }}, - { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, - PCI_ANY_ID, 0x0e, 1, /* D720101 USB controller, 2nd USB 1.1 */ - pci_cfgfunc_config_device, { PCI_USB1_IOADDR, - PCI_USB1_MEMADDR, - PCI_COMMAND_MEMORY | - PCI_COMMAND_MASTER }}, - { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, - PCI_ANY_ID, 0x0e, 2, /* D720101 USB controller, USB 2.0 */ - pci_cfgfunc_config_device, { PCI_USB2_IOADDR, - PCI_USB2_MEMADDR, - PCI_COMMAND_MEMORY | - PCI_COMMAND_MASTER }}, - { } -}; -#endif - -struct pci_controller hose = { -#ifndef CONFIG_PCI_PNP - config_table:pci_linkstation_config_table, -#endif -}; - -void pci_init_board (void) -{ - pci_mpc824x_init (&hose); - - /* Reset USB 1.1 */ - /* Haven't seen any change without these on a HG, maybe it is - * needed on other models */ - out_le32((volatile unsigned*)(PCI_USB0_MEMADDR + 8), 1); - out_le32((volatile unsigned*)(PCI_USB1_MEMADDR + 8), 1); -} -#endif /* CONFIG_PCI */ - -#define UART_DCR 0x80004511 -int board_early_init_f (void) -{ - /* set DUART mode */ - out_8((volatile u8*)UART_DCR, 1); - return 0; -} - -int board_eth_init(bd_t *bis) -{ - return pci_eth_init(bis); -} diff --git a/board/logicpd/zoom2/Makefile b/board/logicpd/zoom2/Makefile deleted file mode 100644 index 8ec5f25613..0000000000 --- a/board/logicpd/zoom2/Makefile +++ /dev/null @@ -1,11 +0,0 @@ -# -# (C) Copyright 2000, 2001, 2002 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := zoom2.o -obj-y += debug_board.o -obj-y += zoom2_serial.o -obj-$(CONFIG_STATUS_LED) += led.o diff --git a/board/logicpd/zoom2/config.mk b/board/logicpd/zoom2/config.mk deleted file mode 100644 index 1c382f7189..0000000000 --- a/board/logicpd/zoom2/config.mk +++ /dev/null @@ -1,17 +0,0 @@ -# -# (C) Copyright 2009 -# Texas Instruments, <www.ti.com> -# -# Zoom II uses OMAP3 (ARM-CortexA8) CPU -# see http://www.ti.com/ for more information on Texas Instruments -# -# SPDX-License-Identifier: GPL-2.0+ -# -# Physical Address: -# 0x80000000 (bank0) -# 0xA0000000 (bank1) -# Linux-Kernel is expected to be at 0x80008000, entry 0x80008000 -# (mem base + reserved) - -# For use with external or internal boots. -CONFIG_SYS_TEXT_BASE = 0x80008000 diff --git a/board/logicpd/zoom2/debug_board.c b/board/logicpd/zoom2/debug_board.c deleted file mode 100644 index 071f41074b..0000000000 --- a/board/logicpd/zoom2/debug_board.c +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Copyright (c) 2009 Wind River Systems, Inc. - * Tom Rix <Tom.Rix@windriver.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#include <common.h> -#include <asm/arch/cpu.h> -#include <asm/io.h> -#include <asm/arch/mux.h> -#include <asm/gpio.h> - -#define DEBUG_BOARD_CONNECTED 1 -#define DEBUG_BOARD_NOT_CONNECTED 0 - -static int debug_board_connected = DEBUG_BOARD_CONNECTED; - -static void zoom2_debug_board_detect (void) -{ - int val = 0; - - if (!gpio_request(158, "")) { - /* - * GPIO to query for debug board - * 158 db board query - */ - gpio_direction_input(158); - val = gpio_get_value(158); - } - - if (!val) - debug_board_connected = DEBUG_BOARD_NOT_CONNECTED; -} - -int zoom2_debug_board_connected (void) -{ - static int first_time = 1; - - if (first_time) { - zoom2_debug_board_detect (); - first_time = 0; - } - return debug_board_connected; -} diff --git a/board/logicpd/zoom2/led.c b/board/logicpd/zoom2/led.c deleted file mode 100644 index 5d37ac15f2..0000000000 --- a/board/logicpd/zoom2/led.c +++ /dev/null @@ -1,116 +0,0 @@ -/* - * Copyright (c) 2009 Wind River Systems, Inc. - * Tom Rix <Tom.Rix@windriver.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#include <common.h> -#include <status_led.h> -#include <asm/arch/cpu.h> -#include <asm/io.h> -#include <asm/arch/sys_proto.h> -#include <asm/gpio.h> - -static unsigned int saved_state[2] = {STATUS_LED_OFF, STATUS_LED_OFF}; - -/* - * GPIO LEDs - * 173 red - * 154 blue - * 61 blue2 - */ -#define ZOOM2_LED_RED 173 -#define ZOOM2_LED_BLUE 154 -#define ZOOM2_LED_BLUE2 61 - -void red_led_off(void) -{ - /* red */ - if (!gpio_request(ZOOM2_LED_RED, "")) { - gpio_direction_output(ZOOM2_LED_RED, 0); - gpio_set_value(ZOOM2_LED_RED, 0); - } - saved_state[STATUS_LED_RED] = STATUS_LED_OFF; -} - -void blue_led_off(void) -{ - /* blue */ - if (!gpio_request(ZOOM2_LED_BLUE, "")) { - gpio_direction_output(ZOOM2_LED_BLUE, 0); - gpio_set_value(ZOOM2_LED_BLUE, 0); - } - - /* blue 2 */ - if (!gpio_request(ZOOM2_LED_BLUE2, "")) { - gpio_direction_output(ZOOM2_LED_BLUE2, 0); - gpio_set_value(ZOOM2_LED_BLUE2, 0); - } - saved_state[STATUS_LED_BLUE] = STATUS_LED_OFF; -} - -void red_led_on(void) -{ - blue_led_off(); - - /* red */ - if (!gpio_request(ZOOM2_LED_RED, "")) { - gpio_direction_output(ZOOM2_LED_RED, 0); - gpio_set_value(ZOOM2_LED_RED, 1); - } - saved_state[STATUS_LED_RED] = STATUS_LED_ON; -} - -void blue_led_on(void) -{ - red_led_off(); - - /* blue */ - if (!gpio_request(ZOOM2_LED_BLUE, "")) { - gpio_direction_output(ZOOM2_LED_BLUE, 0); - gpio_set_value(ZOOM2_LED_BLUE, 1); - } - - /* blue 2 */ - if (!gpio_request(ZOOM2_LED_BLUE2, "")) { - gpio_direction_output(ZOOM2_LED_BLUE2, 0); - gpio_set_value(ZOOM2_LED_BLUE2, 1); - } - - saved_state[STATUS_LED_BLUE] = STATUS_LED_ON; -} - -void __led_init (led_id_t mask, int state) -{ - __led_set (mask, state); -} - -void __led_toggle (led_id_t mask) -{ - if (STATUS_LED_BLUE == mask) { - if (STATUS_LED_ON == saved_state[STATUS_LED_BLUE]) - blue_led_off(); - else - blue_led_on(); - } else if (STATUS_LED_RED == mask) { - if (STATUS_LED_ON == saved_state[STATUS_LED_RED]) - red_led_off(); - else - red_led_on(); - } -} - -void __led_set (led_id_t mask, int state) -{ - if (STATUS_LED_BLUE == mask) { - if (STATUS_LED_ON == state) - blue_led_on(); - else - blue_led_off(); - } else if (STATUS_LED_RED == mask) { - if (STATUS_LED_ON == state) - red_led_on(); - else - red_led_off(); - } -} diff --git a/board/logicpd/zoom2/zoom2.c b/board/logicpd/zoom2/zoom2.c deleted file mode 100644 index e14de04695..0000000000 --- a/board/logicpd/zoom2/zoom2.c +++ /dev/null @@ -1,183 +0,0 @@ -/* - * Copyright (c) 2009 Wind River Systems, Inc. - * Tom Rix <Tom.Rix@windriver.com> - * - * Derived from Zoom1 code by - * Nishanth Menon <nm@ti.com> - * Sunil Kumar <sunilsaini05@gmail.com> - * Shashi Ranjan <shashiranjanmca05@gmail.com> - * Richard Woodruff <r-woodruff2@ti.com> - * Syed Mohammed Khasim <khasim@ti.com> - * - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#include <common.h> -#include <netdev.h> -#ifdef CONFIG_STATUS_LED -#include <status_led.h> -#endif -#include <twl4030.h> -#include <asm/io.h> -#include <asm/arch/mmc_host_def.h> -#include <asm/gpio.h> -#include <asm/arch/mem.h> -#include <asm/arch/mux.h> -#include <asm/arch/sys_proto.h> -#include <asm/mach-types.h> -#include "zoom2.h" -#include "zoom2_serial.h" - -DECLARE_GLOBAL_DATA_PTR; - -/* - * This the the zoom2, board specific, gpmc configuration for the - * quad uart on the debug board. The more general gpmc configurations - * are setup at the cpu level in arch/arm/cpu/armv7/omap3/mem.c - * - * The details of the setting of the serial gpmc setup are not available. - * The values were provided by another party. - */ -static u32 gpmc_serial_TL16CP754C[GPMC_MAX_REG] = { - 0x00011000, - 0x001F1F01, - 0x00080803, - 0x1D091D09, - 0x041D1F1F, - 0x1D0904C4, 0 -}; - -/* Used to track the revision of the board */ -static zoom2_revision revision = ZOOM2_REVISION_UNKNOWN; - -/* - * Routine: zoom2_get_revision - * Description: Return the revision of the Zoom2 this code is running on. - */ -zoom2_revision zoom2_get_revision(void) -{ - return revision; -} - -/* - * Routine: zoom2_identify - * Description: Detect which version of Zoom2 we are running on. - */ -void zoom2_identify(void) -{ - /* - * To check for production board vs beta board, - * check if gpio 94 is clear. - * - * No way yet to check for alpha board identity. - * Alpha boards were produced in very limited quantities - * and they are not commonly used. They are mentioned here - * only for completeness. - */ - if (!gpio_request(94, "")) { - unsigned int val; - - gpio_direction_input(94); - val = gpio_get_value(94); - - if (val) - revision = ZOOM2_REVISION_BETA; - else - revision = ZOOM2_REVISION_PRODUCTION; - } - - printf("Board revision "); - switch (revision) { - case ZOOM2_REVISION_PRODUCTION: - printf("Production\n"); - break; - case ZOOM2_REVISION_BETA: - printf("Beta\n"); - break; - default: - printf("Unknown\n"); - break; - } -} - -/* - * Routine: board_init - * Description: Early hardware init. - */ -int board_init (void) -{ - u32 *gpmc_config; - - gpmc_init (); /* in SRAM or SDRAM, finish GPMC */ - - /* Configure console support on zoom2 */ - gpmc_config = gpmc_serial_TL16CP754C; - enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[3], - SERIAL_TL16CP754C_BASE, GPMC_SIZE_16M); - - /* board id for Linux */ - gd->bd->bi_arch_number = MACH_TYPE_OMAP_ZOOM2; - /* boot param addr */ - gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); - -#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT) - status_led_set (STATUS_LED_BOOT, STATUS_LED_ON); -#endif - return 0; -} - -/* - * Routine: misc_init_r - * Description: Configure zoom board specific configurations - */ -int misc_init_r(void) -{ - zoom2_identify(); - twl4030_power_init(); - twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON); - dieid_num_r(); - - /* - * Board Reset - * The board is reset by holding the the large button - * on the top right side of the main board for - * eight seconds. - * - * There are reported problems of some beta boards - * continously resetting. For those boards, disable resetting. - */ - if (ZOOM2_REVISION_PRODUCTION <= zoom2_get_revision()) - twl4030_power_reset_init(); - - return 0; -} - -/* - * Routine: set_muxconf_regs - * Description: Setting up the configuration Mux registers specific to the - * hardware. Many pins need to be moved from protect to primary - * mode. - */ -void set_muxconf_regs (void) -{ - /* platform specific muxes */ - MUX_ZOOM2 (); -} - -#ifdef CONFIG_GENERIC_MMC -int board_mmc_init(bd_t *bis) -{ - return omap_mmc_init(0, 0, 0, -1, -1); -} -#endif - -#ifdef CONFIG_CMD_NET -int board_eth_init(bd_t *bis) -{ - int rc = 0; -#ifdef CONFIG_LAN91C96 - rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE); -#endif - return rc; -} -#endif diff --git a/board/logicpd/zoom2/zoom2.h b/board/logicpd/zoom2/zoom2.h deleted file mode 100644 index 850c790a08..0000000000 --- a/board/logicpd/zoom2/zoom2.h +++ /dev/null @@ -1,142 +0,0 @@ -/* - * Copyright (c) 2009 Wind River Systems, Inc. - * Tom Rix <Tom.Rix@windriver.com> - * - * Derived from: board/omap3/zoom1/zoom1.h - * Nishanth Menon <nm@ti.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef _BOARD_ZOOM2_H_ -#define _BOARD_ZOOM2_H_ - -const omap3_sysinfo sysinfo = { - DDR_STACKED, - "OMAP3 Zoom2 ", - "NAND", -}; - -typedef enum { - ZOOM2_REVISION_UNKNOWN = 0, - ZOOM2_REVISION_ALPHA, - ZOOM2_REVISION_BETA, - ZOOM2_REVISION_PRODUCTION -} zoom2_revision; - -zoom2_revision zoom2_get_revision(void); - -/* - * IEN - Input Enable - * IDIS - Input Disable - * PTD - Pull type Down - * PTU - Pull type Up - * DIS - Pull type selection is inactive - * EN - Pull type selection is active - * M0 - Mode 0 - * The commented string gives the final mux configuration for that pin - */ -#define MUX_ZOOM2() \ - /* SDRC*/\ - MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)) /* SDRC_D0 */\ - MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)) /* SDRC_D1 */\ - MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)) /* SDRC_D2 */\ - MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)) /* SDRC_D3 */\ - MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)) /* SDRC_D4 */\ - MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)) /* SDRC_D5 */\ - MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)) /* SDRC_D6 */\ - MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)) /* SDRC_D7 */\ - MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)) /* SDRC_D8 */\ - MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)) /* SDRC_D9 */\ - MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)) /* SDRC_D10 */\ - MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)) /* SDRC_D11 */\ - MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)) /* SDRC_D12 */\ - MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)) /* SDRC_D13 */\ - MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)) /* SDRC_D14 */\ - MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)) /* SDRC_D15 */\ - MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)) /* SDRC_D16 */\ - MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)) /* SDRC_D17 */\ - MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)) /* SDRC_D18 */\ - MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)) /* SDRC_D19 */\ - MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)) /* SDRC_D20 */\ - MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)) /* SDRC_D21 */\ - MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)) /* SDRC_D22 */\ - MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)) /* SDRC_D23 */\ - MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)) /* SDRC_D24 */\ - MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)) /* SDRC_D25 */\ - MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)) /* SDRC_D26 */\ - MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)) /* SDRC_D27 */\ - MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)) /* SDRC_D28 */\ - MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)) /* SDRC_D29 */\ - MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)) /* SDRC_D30 */\ - MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)) /* SDRC_D31 */\ - MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)) /* SDRC_CLK */\ - MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)) /* SDRC_DQS0 */\ - MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)) /* SDRC_DQS1 */\ - MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)) /* SDRC_DQS2 */\ - MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)) /* SDRC_DQS3 */\ -/* GPMC */\ - MUX_VAL(CP(GPMC_A1), (IDIS | PTD | DIS | M0)) /* GPMC_A1 */\ - MUX_VAL(CP(GPMC_A2), (IDIS | PTD | DIS | M0)) /* GPMC_A2 */\ - MUX_VAL(CP(GPMC_A3), (IDIS | PTD | DIS | M0)) /* GPMC_A3 */\ - MUX_VAL(CP(GPMC_A4), (IDIS | PTD | DIS | M0)) /* GPMC_A4 */\ - MUX_VAL(CP(GPMC_A5), (IDIS | PTD | DIS | M0)) /* GPMC_A5 */\ - MUX_VAL(CP(GPMC_A6), (IDIS | PTD | DIS | M0)) /* GPMC_A6 */\ - MUX_VAL(CP(GPMC_A7), (IDIS | PTD | DIS | M0)) /* GPMC_A7 */\ - MUX_VAL(CP(GPMC_A8), (IDIS | PTD | DIS | M0)) /* GPMC_A8 */\ - MUX_VAL(CP(GPMC_A9), (IDIS | PTD | DIS | M0)) /* GPMC_A9 */\ - MUX_VAL(CP(GPMC_A10), (IDIS | PTD | DIS | M0)) /* GPMC_A10 */\ - MUX_VAL(CP(GPMC_D0), (IEN | PTD | DIS | M0)) /* GPMC_D0 */\ - MUX_VAL(CP(GPMC_D1), (IEN | PTD | DIS | M0)) /* GPMC_D1 */\ - MUX_VAL(CP(GPMC_D2), (IEN | PTD | DIS | M0)) /* GPMC_D2 */\ - MUX_VAL(CP(GPMC_D3), (IEN | PTD | DIS | M0)) /* GPMC_D3 */\ - MUX_VAL(CP(GPMC_D4), (IEN | PTD | DIS | M0)) /* GPMC_D4 */\ - MUX_VAL(CP(GPMC_D5), (IEN | PTD | DIS | M0)) /* GPMC_D5 */\ - MUX_VAL(CP(GPMC_D6), (IEN | PTD | DIS | M0)) /* GPMC_D6 */\ - MUX_VAL(CP(GPMC_D7), (IEN | PTD | DIS | M0)) /* GPMC_D7 */\ - MUX_VAL(CP(GPMC_D8), (IEN | PTD | DIS | M0)) /* GPMC_D8 */\ - MUX_VAL(CP(GPMC_D9), (IEN | PTD | DIS | M0)) /* GPMC_D9 */\ - MUX_VAL(CP(GPMC_D10), (IEN | PTD | DIS | M0)) /* GPMC_D10 */\ - MUX_VAL(CP(GPMC_D11), (IEN | PTD | DIS | M0)) /* GPMC_D11 */\ - MUX_VAL(CP(GPMC_D12), (IEN | PTD | DIS | M0)) /* GPMC_D12 */\ - MUX_VAL(CP(GPMC_D13), (IEN | PTD | DIS | M0)) /* GPMC_D13 */\ - MUX_VAL(CP(GPMC_D14), (IEN | PTD | DIS | M0)) /* GPMC_D14 */\ - MUX_VAL(CP(GPMC_D15), (IEN | PTD | DIS | M0)) /* GPMC_D15 */\ - MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)) /* GPMC_nCS0 */\ - MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M7)) /* GPMC_nCS1 */\ - MUX_VAL(CP(GPMC_NCS2), (IDIS | PTU | EN | M7)) /* GPMC_nCS2 */\ - MUX_VAL(CP(GPMC_NCS3), (IDIS | PTU | EN | M7)) /* GPMC_nCS3 */\ - MUX_VAL(CP(GPMC_NCS4), (IDIS | PTU | EN | M7)) /* GPMC_nCS4 */\ - MUX_VAL(CP(GPMC_NCS5), (IDIS | PTD | DIS | M7)) /* GPMC_nCS5 */\ - MUX_VAL(CP(GPMC_NCS6), (IEN | PTD | DIS | M7)) /* GPMC_nCS6 */\ - MUX_VAL(CP(GPMC_NCS7), (IEN | PTU | EN | M7)) /* GPMC_nCS7 */\ - MUX_VAL(CP(GPMC_CLK), (IDIS | PTD | DIS | M0)) /* GPMC_CLK */\ - MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) /* GPMC_nADV_ALE */\ - MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)) /* GPMC_nOE */\ - MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)) /* GPMC_nWE */\ - MUX_VAL(CP(GPMC_NWP), (IDIS | PTU | DIS | M0)) /* GPMC_nWP */\ - MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTD | DIS | M0)) /* GPMC_nBE0_CLE */\ - MUX_VAL(CP(GPMC_NBE1), (IEN | PTD | DIS | M0)) /* GPMC_nBE1 */\ - MUX_VAL(CP(GPMC_WAIT0), (IEN | PTD | EN | M0)) /* GPMC_WAIT0 */\ - MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)) /* GPMC_WAIT1 */\ - MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M0)) /* GPMC_WAIT2 */\ - MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0)) /* GPMC_WAIT3 */\ -/* IDCC modem Power On */\ - MUX_VAL(CP(CAM_D11), (IEN | PTU | EN | M4)) /* GPIO_110 */\ - MUX_VAL(CP(CAM_D4), (IEN | PTU | EN | M4)) /* GPIO_103 */\ -/* GPMC CS7 has LAN9211 device */\ - MUX_VAL(CP(GPMC_NCS7), (IDIS | PTU | EN | M0)) /* GPMC_nCS7 */\ - MUX_VAL(CP(MCBSP1_DX), (IEN | PTD | DIS | M4)) /* LAN9221 */\ - MUX_VAL(CP(MCSPI1_CS2), (IEN | PTD | EN | M0)) /* MCSPI1_CS2 */\ -/* GPMC CS3 has Serial TL16CP754C device */\ - MUX_VAL(CP(GPMC_NCS3), (IDIS | PTU | EN | M0)) /* GPMC_nCS3 */\ -/* Toggle Reset pin of TL16CP754C device */\ - MUX_VAL(CP(MCBSP4_CLKX), (IEN | PTU | EN | M4)) /* GPIO_152 */\ - udelay(10);\ - MUX_VAL(CP(MCBSP4_CLKX), (IEN | PTD | EN | M4)) /* GPIO_152 */\ - MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | EN | M0)) /* SDRC_CKE1 */\ -/* LEDS */\ - MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | EN | M4)) /* GPIO_173 red */\ - MUX_VAL(CP(MCBSP4_DX), (IEN | PTD | EN | M4)) /* GPIO_154 blue */\ - MUX_VAL(CP(GPMC_NBE1), (IEN | PTD | EN | M4)) /* GPIO_61 blue2 */ - -#endif /* _BOARD_ZOOM2_H_ */ diff --git a/board/logicpd/zoom2/zoom2_serial.c b/board/logicpd/zoom2/zoom2_serial.c deleted file mode 100644 index 2959276116..0000000000 --- a/board/logicpd/zoom2/zoom2_serial.c +++ /dev/null @@ -1,130 +0,0 @@ -/* - * Copyright (c) 2009 Wind River Systems, Inc. - * Tom Rix <Tom.Rix@windriver.com> - * - * SPDX-License-Identifier: GPL-2.0+ - * - * This file was adapted from arch/powerpc/cpu/mpc5xxx/serial.c - */ - -#include <common.h> -#include <serial.h> -#include <ns16550.h> -#include <asm/arch/cpu.h> -#include "zoom2_serial.h" - -int quad_init_dev (unsigned long base) -{ - /* - * The Quad UART is on the debug board. - * Check if the debug board is attached before using the UART - */ - if (zoom2_debug_board_connected ()) { - NS16550_t com_port = (NS16550_t) base; - int baud_divisor = CONFIG_SYS_NS16550_CLK / 16 / - CONFIG_BAUDRATE; - - /* - * Zoom2 has a board specific initialization of its UART. - * This generic initialization has been copied from - * drivers/serial/ns16550.c. The macros have been expanded. - * - * Do the following instead of - * - * NS16550_init (com_port, clock_divisor); - */ - com_port->ier = 0x00; - - /* - * On Zoom2 board Set pre-scalar to 1 - * CLKSEL is GND => MCR[7] is 1 => preslr is 4 - * So change the prescl to 1 - */ - com_port->lcr = 0xBF; - com_port->fcr |= 0x10; - com_port->mcr &= 0x7F; - - /* This is generic ns16550.c setup */ - com_port->lcr = UART_LCR_BKSE | UART_LCR_8N1; - com_port->dll = 0; - com_port->dlm = 0; - com_port->lcr = UART_LCR_8N1; - com_port->mcr = UART_MCR_DTR | UART_MCR_RTS; - com_port->fcr = UART_FCR_FIFO_EN | UART_FCR_RXSR | - UART_FCR_TXSR; - com_port->lcr = UART_LCR_BKSE | UART_LCR_8N1; - com_port->dll = baud_divisor & 0xff; - com_port->dlm = (baud_divisor >> 8) & 0xff; - com_port->lcr = UART_LCR_8N1; - } - /* - * We have to lie here, otherwise the board init code will hang - * on the check - */ - return 0; -} - -void quad_putc_dev (unsigned long base, const char c) -{ - if (zoom2_debug_board_connected ()) { - - if (c == '\n') - quad_putc_dev (base, '\r'); - - NS16550_putc ((NS16550_t) base, c); - } else { - usbtty_putc(c); - } -} - -void quad_puts_dev (unsigned long base, const char *s) -{ - if (zoom2_debug_board_connected ()) { - while ((s != NULL) && (*s != '\0')) - quad_putc_dev (base, *s++); - } else { - usbtty_puts(s); - } -} - -int quad_getc_dev (unsigned long base) -{ - if (zoom2_debug_board_connected ()) - return NS16550_getc ((NS16550_t) base); - - return usbtty_getc(); -} - -int quad_tstc_dev (unsigned long base) -{ - if (zoom2_debug_board_connected ()) - return NS16550_tstc ((NS16550_t) base); - - return usbtty_tstc(); -} - -void quad_setbrg_dev (unsigned long base) -{ - if (zoom2_debug_board_connected ()) { - - int clock_divisor = CONFIG_SYS_NS16550_CLK / 16 / - CONFIG_BAUDRATE; - - NS16550_reinit ((NS16550_t) base, clock_divisor); - } -} - -QUAD_INIT (0) -QUAD_INIT (1) -QUAD_INIT (2) -QUAD_INIT (3) - -struct serial_device *default_serial_console(void) -{ - switch (ZOOM2_DEFAULT_SERIAL_DEVICE) { - case 0: return &zoom2_serial_device0; - case 1: return &zoom2_serial_device1; - case 2: return &zoom2_serial_device2; - case 3: return &zoom2_serial_device3; - } -} diff --git a/board/logicpd/zoom2/zoom2_serial.h b/board/logicpd/zoom2/zoom2_serial.h deleted file mode 100644 index 82244521ac..0000000000 --- a/board/logicpd/zoom2/zoom2_serial.h +++ /dev/null @@ -1,59 +0,0 @@ -/* - * Copyright (c) 2009 Wind River Systems, Inc. - * Tom Rix <Tom.Rix@windriver.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef ZOOM2_SERIAL_H -#define ZOOM2_SERIAL_H - -#include <linux/stringify.h> - -extern int zoom2_debug_board_connected (void); - -#define SERIAL_TL16CP754C_BASE 0x10000000 /* Zoom2 Serial chip address */ - -#define QUAD_BASE_0 SERIAL_TL16CP754C_BASE -#define QUAD_BASE_1 (SERIAL_TL16CP754C_BASE + 0x100) -#define QUAD_BASE_2 (SERIAL_TL16CP754C_BASE + 0x200) -#define QUAD_BASE_3 (SERIAL_TL16CP754C_BASE + 0x300) - -#define QUAD_INIT(n) \ -int quad_init_##n(void) \ -{ \ - return quad_init_dev(QUAD_BASE_##n); \ -} \ -void quad_setbrg_##n(void) \ -{ \ - quad_setbrg_dev(QUAD_BASE_##n); \ -} \ -void quad_putc_##n(const char c) \ -{ \ - quad_putc_dev(QUAD_BASE_##n, c); \ -} \ -void quad_puts_##n(const char *s) \ -{ \ - quad_puts_dev(QUAD_BASE_##n, s); \ -} \ -int quad_getc_##n(void) \ -{ \ - return quad_getc_dev(QUAD_BASE_##n); \ -} \ -int quad_tstc_##n(void) \ -{ \ - return quad_tstc_dev(QUAD_BASE_##n); \ -} \ -struct serial_device zoom2_serial_device##n = \ -{ \ - .name = __stringify(n), \ - .start = quad_init_##n, \ - .stop = NULL, \ - .setbrg = quad_setbrg_##n, \ - .getc = quad_getc_##n, \ - .tstc = quad_tstc_##n, \ - .putc = quad_putc_##n, \ - .puts = quad_puts_##n, \ -}; - -#endif /* ZOOM2_SERIAL_H */ diff --git a/board/mx1ads/Makefile b/board/mx1ads/Makefile deleted file mode 100644 index 6dfd18e202..0000000000 --- a/board/mx1ads/Makefile +++ /dev/null @@ -1,16 +0,0 @@ -# -# board/mx1ads/Makefile -# -# (C) Copyright 2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# (c) Copyright 2004 -# Techware Information Technology, Inc. -# http://www.techware.com.tw/ -# -# Ming-Len Wu <minglen_wu@techware.com.tw> -# -# SPDX-License-Identifier: GPL-2.0+ - -obj-y := mx1ads.o syncflash.o -obj-y += lowlevel_init.o diff --git a/board/mx1ads/lowlevel_init.S b/board/mx1ads/lowlevel_init.S deleted file mode 100644 index d1e472a933..0000000000 --- a/board/mx1ads/lowlevel_init.S +++ /dev/null @@ -1,68 +0,0 @@ -/* - * board/mx1ads/lowlevel_init.S - * - * (c) Copyright 2004 - * Techware Information Technology, Inc. - * http://www.techware.com.tw/ - * - * Ming-Len Wu <minglen_wu@techware.com.tw> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <config.h> -#include <version.h> - -#define SDCTL0 0x221000 -#define SDCTL1 0x221004 - - -_TEXT_BASE: - .word CONFIG_SYS_TEXT_BASE - -.globl lowlevel_init -lowlevel_init: -/* memory controller init */ - - ldr r1, =SDCTL0 - -/* Set Precharge Command */ - - ldr r3, =0x92120200 -/* ldr r3, =0x92120251 -*/ - str r3, [r1] - -/* Issue Precharge All Commad */ - ldr r3, =0x8200000 - ldr r2, [r3] - -/* Set AutoRefresh Command */ - ldr r3, =0xA2120200 - str r3, [r1] - -/* Issue AutoRefresh Command */ - ldr r3, =0x8000000 - ldr r2, [r3] - ldr r2, [r3] - ldr r2, [r3] - ldr r2, [r3] - ldr r2, [r3] - ldr r2, [r3] - ldr r2, [r3] - ldr r2, [r3] - -/* Set Mode Register */ - ldr r3, =0xB2120200 - str r3, [r1] - -/* Issue Mode Register Command */ - ldr r3, =0x08111800 /* Mode Register Value */ - ldr r2, [r3] - -/* Set Normal Mode */ - ldr r3, =0x82124200 - str r3, [r1] - -/* everything is fine now */ - mov pc, lr diff --git a/board/mx1ads/mx1ads.c b/board/mx1ads/mx1ads.c deleted file mode 100644 index 4266048981..0000000000 --- a/board/mx1ads/mx1ads.c +++ /dev/null @@ -1,178 +0,0 @@ -/* - * board/mx1ads/mx1ads.c - * - * (c) Copyright 2004 - * Techware Information Technology, Inc. - * http://www.techware.com.tw/ - * - * Ming-Len Wu <minglen_wu@techware.com.tw> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <netdev.h> -/*#include <mc9328.h>*/ -#include <asm/arch/imx-regs.h> -#include <asm/io.h> - -DECLARE_GLOBAL_DATA_PTR; - -#define FCLK_SPEED 1 - -#if FCLK_SPEED==0 /* Fout = 203MHz, Fin = 12MHz for Audio */ -#define M_MDIV 0xC3 -#define M_PDIV 0x4 -#define M_SDIV 0x1 -#elif FCLK_SPEED==1 /* Fout = 202.8MHz */ -#define M_MDIV 0xA1 -#define M_PDIV 0x3 -#define M_SDIV 0x1 -#endif - -#define USB_CLOCK 1 - -#if USB_CLOCK==0 -#define U_M_MDIV 0xA1 -#define U_M_PDIV 0x3 -#define U_M_SDIV 0x1 -#elif USB_CLOCK==1 -#define U_M_MDIV 0x48 -#define U_M_PDIV 0x3 -#define U_M_SDIV 0x2 -#endif - -#if 0 - -static inline void delay (unsigned long loops) -{ - __asm__ volatile ("1:\n" - "subs %0, %1, #1\n" - "bne 1b":"=r" (loops):"0" (loops)); -} - -#endif - -/* - * Miscellaneous platform dependent initialisations - */ - -void SetAsynchMode (void) -{ - __asm__ ("mrc p15,0,r0,c1,c0,0 \n" - "mov r2, #0xC0000000 \n" - "orr r0,r2,r0 \n" "mcr p15,0,r0,c1,c0,0 \n"); -} - -static u32 mc9328sid; - -int board_early_init_f(void) -{ - mc9328sid = SIDR; - - GPCR = 0x000003AB; /* I/O pad driving strength */ - - /* MX1_CS1U = 0x00000A00; */ /* SRAM initialization */ -/* MX1_CS1L = 0x11110601; */ - - MPCTL0 = 0x04632410; /* setting for 150 MHz MCU PLL CLK */ - -/* set FCLK divider 1 (i.e. FCLK to MCU PLL CLK) and - * BCLK divider to 2 (i.e. BCLK to 48 MHz) - */ - CSCR = 0xAF000403; - - CSCR |= 0x00200000; /* Trigger the restart bit(bit 21) */ - CSCR &= 0xFFFF7FFF; /* Program PRESC bit(bit 15) to 0 to divide-by-1 */ - -/* setup cs4 for cs8900 ethernet */ - - CS4U = 0x00000F00; /* Initialize CS4 for CS8900 ethernet */ - CS4L = 0x00001501; - - GIUS (0) &= 0xFF3FFFFF; - GPR (0) &= 0xFF3FFFFF; - - readl(0x1500000C); - readl(0x1500000C); - - SetAsynchMode (); - - icache_enable (); - dcache_enable (); - -/* set PERCLKs */ - PCDR = 0x00000055; /* set PERCLKS */ - -/* PERCLK3 is only used by SSI so the SSI driver can set it any value it likes - * PERCLK1 and PERCLK2 are shared so DO NOT change it in any other place - * all sources selected as normal interrupt - */ - -/* MX1_INTTYPEH = 0; - MX1_INTTYPEL = 0; -*/ - return 0; -} - -int board_init(void) -{ - gd->bd->bi_arch_number = MACH_TYPE_MX1ADS; - - gd->bd->bi_boot_params = 0x08000100; /* adress of boot parameters */ - - return 0; -} - -int board_late_init (void) -{ - - setenv ("stdout", "serial"); - setenv ("stderr", "serial"); - - switch (mc9328sid) { - case 0x0005901d: - printf ("MX1ADS board with MC9328 MX1 (0L44N), Silicon ID 0x%08x \n\n", - mc9328sid); - break; - case 0x04d4c01d: - printf ("MX1ADS board with MC9328 MXL (1L45N), Silicon ID 0x%08x \n\n", - mc9328sid); - break; - case 0x00d4c01d: - printf ("MX1ADS board with MC9328 MXL (2L45N), Silicon ID 0x%08x \n\n", - mc9328sid); - break; - - default: - printf ("MX1ADS board with UNKNOWN MC9328 cpu, Silicon ID 0x%08x \n", - mc9328sid); - break; - } - return 0; -} - -int dram_init(void) -{ - /* dram_init must store complete ramsize in gd->ram_size */ - gd->ram_size = get_ram_size((void *)PHYS_SDRAM_1, - PHYS_SDRAM_1_SIZE); - return 0; -} - -void dram_init_banksize(void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; -} - -#ifdef CONFIG_CMD_NET -int board_eth_init(bd_t *bis) -{ - int rc = 0; -#ifdef CONFIG_CS8900 - rc = cs8900_initialize(0, CONFIG_CS8900_BASE); -#endif - return rc; -} -#endif diff --git a/board/mx1ads/syncflash.c b/board/mx1ads/syncflash.c deleted file mode 100644 index 5d685338fb..0000000000 --- a/board/mx1ads/syncflash.c +++ /dev/null @@ -1,307 +0,0 @@ -/* - * board/mx1ads/syncflash.c - * - * (c) Copyright 2004 - * Techware Information Technology, Inc. - * http://www.techware.com.tw/ - * - * Ming-Len Wu <minglen_wu@techware.com.tw> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -/*#include <mc9328.h>*/ -#include <asm/arch/imx-regs.h> - -typedef unsigned long * p_u32; - -/* 4Mx16x2 IAM=0 CSD1 */ - -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ - -/* Following Setting is for CSD1 */ -#define SFCTL 0x00221004 -#define reg_SFCTL __REG(SFCTL) - -#define SYNCFLASH_A10 (0x00100000) - -#define CMD_NORMAL (0x81020300) /* Normal Mode */ -#define CMD_PREC (CMD_NORMAL + 0x10000000) /* Precharge Command */ -#define CMD_AUTO (CMD_NORMAL + 0x20000000) /* Auto Refresh Command */ -#define CMD_LMR (CMD_NORMAL + 0x30000000) /* Load Mode Register Command */ -#define CMD_LCR (CMD_NORMAL + 0x60000000) /* LCR Command */ -#define CMD_PROGRAM (CMD_NORMAL + 0x70000000) - -#define MODE_REG_VAL (CONFIG_SYS_FLASH_BASE+0x0008CC00) /* Cas Latency 3 */ - -/* LCR Command */ -#define LCR_READSTATUS (0x0001C000) /* 0x70 */ -#define LCR_ERASE_CONFIRM (0x00008000) /* 0x20 */ -#define LCR_ERASE_NVMODE (0x0000C000) /* 0x30 */ -#define LCR_PROG_NVMODE (0x00028000) /* 0xA0 */ -#define LCR_SR_CLEAR (0x00014000) /* 0x50 */ - -/* Get Status register */ -u32 SF_SR(void) { - u32 tmp; - - reg_SFCTL = CMD_PROGRAM; - tmp = __REG(CONFIG_SYS_FLASH_BASE); - - reg_SFCTL = CMD_NORMAL; - - reg_SFCTL = CMD_LCR; /* Activate LCR Mode */ - __REG(CONFIG_SYS_FLASH_BASE + LCR_SR_CLEAR); - - return tmp; -} - -/* check if SyncFlash is ready */ -u8 SF_Ready(void) { - u32 tmp; - - tmp = SF_SR(); - - if ((tmp & 0x00800000) && (tmp & 0x001C0000)) { - printf ("SyncFlash Error code %08x\n",tmp); - }; - - if ((tmp & 0x00000080) && (tmp & 0x0000001C)) { - printf ("SyncFlash Error code %08x\n",tmp); - }; - - if (tmp == 0x00800080) /* Test Bit 7 of SR */ - return 1; - else - return 0; -} - -/* Issue the precharge all command */ -void SF_PrechargeAll(void) { - - /* Set Precharge Command */ - reg_SFCTL = CMD_PREC; - /* Issue Precharge All Command */ - __REG(CONFIG_SYS_FLASH_BASE + SYNCFLASH_A10); -} - -/* set SyncFlash to normal mode */ -void SF_Normal(void) { - - SF_PrechargeAll(); - - reg_SFCTL = CMD_NORMAL; -} - -/* Erase SyncFlash */ -void SF_Erase(u32 RowAddress) { - - reg_SFCTL = CMD_NORMAL; - __REG(RowAddress); - - reg_SFCTL = CMD_PREC; - __REG(RowAddress); - - reg_SFCTL = CMD_LCR; /* Set LCR mode */ - __REG(RowAddress + LCR_ERASE_CONFIRM) = 0; /* Issue Erase Setup Command */ - - reg_SFCTL = CMD_NORMAL; /* return to Normal mode */ - __REG(RowAddress) = 0xD0D0D0D0; /* Confirm */ - - while(!SF_Ready()); -} - -void SF_NvmodeErase(void) { - SF_PrechargeAll(); - - reg_SFCTL = CMD_LCR; /* Set to LCR mode */ - __REG(CONFIG_SYS_FLASH_BASE + LCR_ERASE_NVMODE) = 0; /* Issue Erase Nvmode Reg Command */ - - reg_SFCTL = CMD_NORMAL; /* Return to Normal mode */ - __REG(CONFIG_SYS_FLASH_BASE + LCR_ERASE_NVMODE) = 0xC0C0C0C0; /* Confirm */ - - while(!SF_Ready()); -} - -void SF_NvmodeWrite(void) { - SF_PrechargeAll(); - - reg_SFCTL = CMD_LCR; /* Set to LCR mode */ - __REG(CONFIG_SYS_FLASH_BASE+LCR_PROG_NVMODE) = 0; /* Issue Program Nvmode reg command */ - - reg_SFCTL = CMD_NORMAL; /* Return to Normal mode */ - __REG(CONFIG_SYS_FLASH_BASE+LCR_PROG_NVMODE) = 0xC0C0C0C0; /* Confirm not needed */ -} - -/****************************************************************************************/ - -ulong flash_init(void) { - int i, j; - -/* Turn on CSD1 for negating RESETSF of SyncFLash */ - - reg_SFCTL |= 0x80000000; /* enable CSD1 for SyncFlash */ - udelay(200); - - reg_SFCTL = CMD_LMR; /* Set Load Mode Register Command */ - __REG(MODE_REG_VAL); /* Issue Load Mode Register Command */ - - SF_Normal(); - - i = 0; - - flash_info[i].flash_id = FLASH_MAN_MT | FLASH_MT28S4M16LC; - - flash_info[i].size = FLASH_BANK_SIZE; - flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT; - - memset(flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT); - - for (j = 0; j < flash_info[i].sector_count; j++) { - flash_info[i].start[j] = CONFIG_SYS_FLASH_BASE + j * 0x00100000; - } - - flash_protect(FLAG_PROTECT_SET, - CONFIG_SYS_FLASH_BASE, - CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, - &flash_info[0]); - - flash_protect(FLAG_PROTECT_SET, - CONFIG_ENV_ADDR, - CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, - &flash_info[0]); - - return FLASH_BANK_SIZE; -} - -void flash_print_info (flash_info_t *info) { - - int i; - - switch (info->flash_id & FLASH_VENDMASK) { - case (FLASH_MAN_MT & FLASH_VENDMASK): - printf("Micron: "); - break; - default: - printf("Unknown Vendor "); - break; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case (FLASH_MT28S4M16LC & FLASH_TYPEMASK): - printf("2x FLASH_MT28S4M16LC (16MB Total)\n"); - break; - default: - printf("Unknown Chip Type\n"); - return; - break; - } - - printf(" Size: %ld MB in %d Sectors\n", - info->size >> 20, info->sector_count); - - printf(" Sector Start Addresses: "); - - for (i = 0; i < info->sector_count; i++) { - if ((i % 5) == 0) - printf ("\n "); - - printf (" %08lX%s", info->start[i], - info->protect[i] ? " (RO)" : " "); - } - - printf ("\n"); -} - -/*-----------------------------------------------------------------------*/ - -int flash_erase (flash_info_t *info, int s_first, int s_last) { - int iflag, cflag, prot, sect; - int rc = ERR_OK; - -/* first look for protection bits */ - - if (info->flash_id == FLASH_UNKNOWN) - return ERR_UNKNOWN_FLASH_TYPE; - - if ((s_first < 0) || (s_first > s_last)) - return ERR_INVAL; - - if ((info->flash_id & FLASH_VENDMASK) != (FLASH_MAN_MT & FLASH_VENDMASK)) - return ERR_UNKNOWN_FLASH_VENDOR; - - prot = 0; - - for (sect = s_first; sect <= s_last; ++sect) { - if (info->protect[sect]) - prot++; - } - - if (prot) { - printf("protected!\n"); - return ERR_PROTECTED; - } -/* - * Disable interrupts which might cause a timeout - * here. Remember that our exception vectors are - * at address 0 in the flash, and we don't want a - * (ticker) exception to happen while the flash - * chip is in programming mode. - */ - - cflag = icache_status(); - icache_disable(); - iflag = disable_interrupts(); - -/* Start erase on unprotected sectors */ - for (sect = s_first; sect <= s_last && !ctrlc(); sect++) { - - printf("Erasing sector %2d ... ", sect); - -/* arm simple, non interrupt dependent timer */ - - get_timer(0); - - SF_NvmodeErase(); - SF_NvmodeWrite(); - - SF_Erase(CONFIG_SYS_FLASH_BASE + (0x0100000 * sect)); - SF_Normal(); - - printf("ok.\n"); - } - - if (ctrlc()) - printf("User Interrupt!\n"); - - if (iflag) - enable_interrupts(); - - if (cflag) - icache_enable(); - - return rc; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash. - */ - -int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) { - int i; - - for(i = 0; i < cnt; i += 4) { - - SF_PrechargeAll(); - - reg_SFCTL = CMD_PROGRAM; /* Enter SyncFlash Program mode */ - __REG(addr + i) = __REG((u32)src + i); - - while(!SF_Ready()); - } - - SF_Normal(); - - return ERR_OK; -} diff --git a/board/renesas/sh7753evb/Makefile b/board/renesas/sh7753evb/Makefile new file mode 100644 index 0000000000..f7c8e949f9 --- /dev/null +++ b/board/renesas/sh7753evb/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (C) 2012 Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> +# +# SPDX-License-Identifier: GPL-2.0+ + +obj-y := sh7753evb.o spi-boot.o +obj-y += lowlevel_init.o diff --git a/board/renesas/sh7753evb/lowlevel_init.S b/board/renesas/sh7753evb/lowlevel_init.S new file mode 100644 index 0000000000..21987a51e8 --- /dev/null +++ b/board/renesas/sh7753evb/lowlevel_init.S @@ -0,0 +1,416 @@ +/* + * Copyright (C) 2013 Renesas Solutions Corp. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <config.h> +#include <version.h> +#include <asm/processor.h> +#include <asm/macro.h> + +.macro or32, addr, data + mov.l \addr, r1 + mov.l \data, r0 + mov.l @r1, r2 + or r2, r0 + mov.l r0, @r1 +.endm + +.macro wait_DBCMD + mov.l DBWAIT_A, r0 + mov.l @r0, r1 +.endm + + .global lowlevel_init + .section .spiboot1.text + .align 2 + +lowlevel_init: + mov #0, r14 + mova 2f, r0 + mov.l PC_MASK, r1 + tst r0, r1 + bf 2f + + bra exit_pmb + nop + + .align 2 + +/* If CPU runs on SDRAM (PC=0x5???????) or not. */ +PC_MASK: .long 0x20000000 + +2: + mov #1, r14 + + mov.l EXPEVT_A, r0 + mov.l @r0, r0 + mov.l EXPEVT_POWER_ON_RESET, r1 + cmp/eq r0, r1 + bt 1f + + /* + * If EXPEVT value is manual reset or tlb multipul-hit, + * initialization of DBSC3 is not necessary. + */ + bra exit_ddr + nop + +1: + /*------- Reset -------*/ + write32 MRSTCR0_A, MRSTCR0_D + write32 MRSTCR1_A, MRSTCR1_D + + /* For Core Reset */ + mov.l DBACEN_A, r0 + mov.l @r0, r0 + cmp/eq #0, r0 + bt 3f + + /* + * If DBACEN == 1(DBSC was already enabled), we have to avoid the + * initialization of DDR3-SDRAM. + */ + bra exit_ddr + nop + +3: + /*------- DBSC3 -------*/ + /* oscillation stabilization time */ + wait_timer WAIT_OSC_TIME + + /* step 3 */ + write32 DBKIND_A, DBKIND_D + + /* step 4 */ + write32 DBCONF_A, DBCONF_D + write32 DBTR0_A, DBTR0_D + write32 DBTR1_A, DBTR1_D + write32 DBTR2_A, DBTR2_D + write32 DBTR3_A, DBTR3_D + write32 DBTR4_A, DBTR4_D + write32 DBTR5_A, DBTR5_D + write32 DBTR6_A, DBTR6_D + write32 DBTR7_A, DBTR7_D + write32 DBTR8_A, DBTR8_D + write32 DBTR9_A, DBTR9_D + write32 DBTR10_A, DBTR10_D + write32 DBTR11_A, DBTR11_D + write32 DBTR12_A, DBTR12_D + write32 DBTR13_A, DBTR13_D + write32 DBTR14_A, DBTR14_D + write32 DBTR15_A, DBTR15_D + write32 DBTR16_A, DBTR16_D + write32 DBTR17_A, DBTR17_D + write32 DBTR18_A, DBTR18_D + write32 DBTR19_A, DBTR19_D + write32 DBRNK0_A, DBRNK0_D + write32 DBADJ0_A, DBADJ0_D + write32 DBADJ2_A, DBADJ2_D + + /* step 5 */ + write32 DBCMD_A, DBCMD_RSTL_VAL + wait_timer WAIT_30US + + /* step 6 */ + write32 DBCMD_A, DBCMD_PDEN_VAL + + /* step 7 */ + write32 DBPDCNT3_A, DBPDCNT3_D + + /* step 8 */ + write32 DBPDCNT1_A, DBPDCNT1_D + write32 DBPDCNT2_A, DBPDCNT2_D + write32 DBPDLCK_A, DBPDLCK_D + write32 DBPDRGA_A, DBPDRGA_D + write32 DBPDRGD_A, DBPDRGD_D + + /* step 9 */ + wait_timer WAIT_30US + + /* step 10 */ + write32 DBPDCNT0_A, DBPDCNT0_D + + /* step 11 */ + wait_timer WAIT_30US + wait_timer WAIT_30US + + /* step 12 */ + write32 DBCMD_A, DBCMD_WAIT_VAL + wait_DBCMD + + /* step 13 */ + write32 DBCMD_A, DBCMD_RSTH_VAL + wait_DBCMD + + /* step 14 */ + write32 DBCMD_A, DBCMD_WAIT_VAL + write32 DBCMD_A, DBCMD_WAIT_VAL + write32 DBCMD_A, DBCMD_WAIT_VAL + write32 DBCMD_A, DBCMD_WAIT_VAL + + /* step 15 */ + write32 DBCMD_A, DBCMD_PDXT_VAL + + /* step 16 */ + write32 DBCMD_A, DBCMD_MRS2_VAL + + /* step 17 */ + write32 DBCMD_A, DBCMD_MRS3_VAL + + /* step 18 */ + write32 DBCMD_A, DBCMD_MRS1_VAL + + /* step 19 */ + write32 DBCMD_A, DBCMD_MRS0_VAL + write32 DBPDNCNF_A, DBPDNCNF_D + + /* step 20 */ + write32 DBCMD_A, DBCMD_ZQCL_VAL + + write32 DBCMD_A, DBCMD_REF_VAL + write32 DBCMD_A, DBCMD_REF_VAL + wait_DBCMD + + /* step 21 */ + write32 DBCALTR_A, DBCALTR_D + + /* step 22 */ + write32 DBRFCNF0_A, DBRFCNF0_D + write32 DBRFCNF1_A, DBRFCNF1_D + write32 DBRFCNF2_A, DBRFCNF2_D + + /* step 23 */ + write32 DBCALCNF_A, DBCALCNF_D + + /* step 24 */ + write32 DBRFEN_A, DBRFEN_D + write32 DBCMD_A, DBCMD_SRXT_VAL + + /* step 25 */ + write32 DBACEN_A, DBACEN_D + + /* step 26 */ + wait_DBCMD + + bra exit_ddr + nop + + .align 2 + +EXPEVT_A: .long 0xff000024 +EXPEVT_POWER_ON_RESET: .long 0x00000000 + +/*------- Reset -------*/ +MRSTCR0_A: .long 0xffd50030 +MRSTCR0_D: .long 0xfe1ffe7f +MRSTCR1_A: .long 0xffd50034 +MRSTCR1_D: .long 0xfff3ffff + +/*------- DBSC3 -------*/ +DBCMD_A: .long 0xfe800018 +DBKIND_A: .long 0xfe800020 +DBCONF_A: .long 0xfe800024 +DBTR0_A: .long 0xfe800040 +DBTR1_A: .long 0xfe800044 +DBTR2_A: .long 0xfe800048 +DBTR3_A: .long 0xfe800050 +DBTR4_A: .long 0xfe800054 +DBTR5_A: .long 0xfe800058 +DBTR6_A: .long 0xfe80005c +DBTR7_A: .long 0xfe800060 +DBTR8_A: .long 0xfe800064 +DBTR9_A: .long 0xfe800068 +DBTR10_A: .long 0xfe80006c +DBTR11_A: .long 0xfe800070 +DBTR12_A: .long 0xfe800074 +DBTR13_A: .long 0xfe800078 +DBTR14_A: .long 0xfe80007c +DBTR15_A: .long 0xfe800080 +DBTR16_A: .long 0xfe800084 +DBTR17_A: .long 0xfe800088 +DBTR18_A: .long 0xfe80008c +DBTR19_A: .long 0xfe800090 +DBRNK0_A: .long 0xfe800100 +DBPDCNT0_A: .long 0xfe800200 +DBPDCNT1_A: .long 0xfe800204 +DBPDCNT2_A: .long 0xfe800208 +DBPDCNT3_A: .long 0xfe80020c +DBPDLCK_A: .long 0xfe800280 +DBPDRGA_A: .long 0xfe800290 +DBPDRGD_A: .long 0xfe8002a0 +DBADJ0_A: .long 0xfe8000c0 +DBADJ2_A: .long 0xfe8000c8 +DBRFCNF0_A: .long 0xfe8000e0 +DBRFCNF1_A: .long 0xfe8000e4 +DBRFCNF2_A: .long 0xfe8000e8 +DBCALCNF_A: .long 0xfe8000f4 +DBRFEN_A: .long 0xfe800014 +DBACEN_A: .long 0xfe800010 +DBWAIT_A: .long 0xfe80001c +DBCALTR_A: .long 0xfe8000f8 +DBPDNCNF_A: .long 0xfe800180 + +WAIT_OSC_TIME: .long 6000 +WAIT_30US: .long 13333 + +DBCMD_RSTL_VAL: .long 0x20000000 +DBCMD_PDEN_VAL: .long 0x1000d73c +DBCMD_WAIT_VAL: .long 0x0000d73c +DBCMD_RSTH_VAL: .long 0x2100d73c +DBCMD_PDXT_VAL: .long 0x110000c8 +DBCMD_MRS0_VAL: .long 0x28000930 +DBCMD_MRS1_VAL: .long 0x29000004 +DBCMD_MRS2_VAL: .long 0x2a000008 +DBCMD_MRS3_VAL: .long 0x2b000000 +DBCMD_ZQCL_VAL: .long 0x03000200 +DBCMD_REF_VAL: .long 0x0c000000 +DBCMD_SRXT_VAL: .long 0x19000000 +DBKIND_D: .long 0x00000007 +DBCONF_D: .long 0x0f030a01 +DBTR0_D: .long 0x00000007 +DBTR1_D: .long 0x00000006 +DBTR2_D: .long 0x00000000 +DBTR3_D: .long 0x00000007 +DBTR4_D: .long 0x00070007 +DBTR5_D: .long 0x0000001b +DBTR6_D: .long 0x00000014 +DBTR7_D: .long 0x00000004 +DBTR8_D: .long 0x00000014 +DBTR9_D: .long 0x00000004 +DBTR10_D: .long 0x00000008 +DBTR11_D: .long 0x00000007 +DBTR12_D: .long 0x0000000e +DBTR13_D: .long 0x000000a0 +DBTR14_D: .long 0x00060006 +DBTR15_D: .long 0x00000003 +DBTR16_D: .long 0x00160002 +DBTR17_D: .long 0x000c0000 +DBTR18_D: .long 0x00000200 +DBTR19_D: .long 0x00000040 +DBRNK0_D: .long 0x00000001 +DBPDCNT0_D: .long 0x00000001 +DBPDCNT1_D: .long 0x00000001 +DBPDCNT2_D: .long 0x00000000 +DBPDCNT3_D: .long 0x00004010 +DBPDLCK_D: .long 0x0000a55a +DBPDRGA_D: .long 0x00000028 +DBPDRGD_D: .long 0x00017100 + +DBADJ0_D: .long 0x00010000 +DBADJ2_D: .long 0x18061806 +DBRFCNF0_D: .long 0x000001ff +DBRFCNF1_D: .long 0x00081040 +DBRFCNF2_D: .long 0x00000000 +DBCALCNF_D: .long 0x0000ffff +DBRFEN_D: .long 0x00000001 +DBACEN_D: .long 0x00000001 +DBCALTR_D: .long 0x08200820 +DBPDNCNF_D: .long 0x00000001 + + .align 2 +exit_ddr: +#if defined(CONFIG_SH_32BIT) + /*------- set PMB -------*/ + write32 PASCR_A, PASCR_29BIT_D + write32 MMUCR_A, MMUCR_D + + /***************************************************************** + * ent virt phys v sz c wt + * 0 0xa0000000 0x00000000 1 128M 0 1 + * 1 0xa8000000 0x48000000 1 128M 0 1 + * 5 0x88000000 0x48000000 1 128M 1 1 + */ + write32 PMB_ADDR_SPIBOOT_A, PMB_ADDR_SPIBOOT_D + write32 PMB_DATA_SPIBOOT_A, PMB_DATA_SPIBOOT_D + write32 PMB_ADDR_DDR_C1_A, PMB_ADDR_DDR_C1_D + write32 PMB_DATA_DDR_C1_A, PMB_DATA_DDR_C1_D + write32 PMB_ADDR_DDR_N1_A, PMB_ADDR_DDR_N1_D + write32 PMB_DATA_DDR_N1_A, PMB_DATA_DDR_N1_D + + write32 PMB_ADDR_ENTRY2, PMB_ADDR_NOT_USE_D + write32 PMB_ADDR_ENTRY3, PMB_ADDR_NOT_USE_D + write32 PMB_ADDR_ENTRY4, PMB_ADDR_NOT_USE_D + write32 PMB_ADDR_ENTRY6, PMB_ADDR_NOT_USE_D + write32 PMB_ADDR_ENTRY7, PMB_ADDR_NOT_USE_D + write32 PMB_ADDR_ENTRY8, PMB_ADDR_NOT_USE_D + write32 PMB_ADDR_ENTRY9, PMB_ADDR_NOT_USE_D + write32 PMB_ADDR_ENTRY10, PMB_ADDR_NOT_USE_D + write32 PMB_ADDR_ENTRY11, PMB_ADDR_NOT_USE_D + write32 PMB_ADDR_ENTRY12, PMB_ADDR_NOT_USE_D + write32 PMB_ADDR_ENTRY13, PMB_ADDR_NOT_USE_D + write32 PMB_ADDR_ENTRY14, PMB_ADDR_NOT_USE_D + write32 PMB_ADDR_ENTRY15, PMB_ADDR_NOT_USE_D + + write32 PASCR_A, PASCR_INIT + mov.l DUMMY_ADDR, r0 + icbi @r0 +#endif /* if defined(CONFIG_SH_32BIT) */ + +exit_pmb: + /* CPU is running on ILRAM? */ + mov r14, r0 + tst #1, r0 + bt 1f + + mov.l _stack_ilram, r15 + mov.l _spiboot_main, r0 +100: bsrf r0 + nop + + .align 2 +_spiboot_main: .long (spiboot_main - (100b + 4)) +_stack_ilram: .long 0xe5204000 + +1: + write32 CCR_A, CCR_D + + rts + nop + + .align 2 + +#if defined(CONFIG_SH_32BIT) +/*------- set PMB -------*/ +PMB_ADDR_SPIBOOT_A: .long PMB_ADDR_BASE(0) +PMB_ADDR_DDR_N1_A: .long PMB_ADDR_BASE(1) +PMB_ADDR_DDR_C1_A: .long PMB_ADDR_BASE(5) +PMB_ADDR_ENTRY2: .long PMB_ADDR_BASE(2) +PMB_ADDR_ENTRY3: .long PMB_ADDR_BASE(3) +PMB_ADDR_ENTRY4: .long PMB_ADDR_BASE(4) +PMB_ADDR_ENTRY6: .long PMB_ADDR_BASE(6) +PMB_ADDR_ENTRY7: .long PMB_ADDR_BASE(7) +PMB_ADDR_ENTRY8: .long PMB_ADDR_BASE(8) +PMB_ADDR_ENTRY9: .long PMB_ADDR_BASE(9) +PMB_ADDR_ENTRY10: .long PMB_ADDR_BASE(10) +PMB_ADDR_ENTRY11: .long PMB_ADDR_BASE(11) +PMB_ADDR_ENTRY12: .long PMB_ADDR_BASE(12) +PMB_ADDR_ENTRY13: .long PMB_ADDR_BASE(13) +PMB_ADDR_ENTRY14: .long PMB_ADDR_BASE(14) +PMB_ADDR_ENTRY15: .long PMB_ADDR_BASE(15) + +PMB_ADDR_SPIBOOT_D: .long mk_pmb_addr_val(0xa0) +PMB_ADDR_DDR_C1_D: .long mk_pmb_addr_val(0x88) +PMB_ADDR_DDR_N1_D: .long mk_pmb_addr_val(0xa8) +PMB_ADDR_NOT_USE_D: .long 0x00000000 + +PMB_DATA_SPIBOOT_A: .long PMB_DATA_BASE(0) +PMB_DATA_DDR_N1_A: .long PMB_DATA_BASE(1) +PMB_DATA_DDR_C1_A: .long PMB_DATA_BASE(5) + +/* ppn ub v s1 s0 c wt */ +PMB_DATA_SPIBOOT_D: .long mk_pmb_data_val(0x00, 0, 1, 1, 0, 0, 1) +PMB_DATA_DDR_C1_D: .long mk_pmb_data_val(0x48, 0, 1, 1, 0, 1, 1) +PMB_DATA_DDR_N1_D: .long mk_pmb_data_val(0x48, 1, 1, 1, 0, 0, 1) + +PASCR_A: .long 0xff000070 +DUMMY_ADDR: .long 0xa0000000 +PASCR_29BIT_D: .long 0x00000000 +PASCR_INIT: .long 0x80000080 +MMUCR_A: .long 0xff000010 +MMUCR_D: .long 0x00000004 /* clear ITLB */ +#endif /* CONFIG_SH_32BIT */ + +CCR_A: .long CCR +CCR_D: .long CCR_CACHE_INIT diff --git a/board/renesas/sh7753evb/sh7753evb.c b/board/renesas/sh7753evb/sh7753evb.c new file mode 100644 index 0000000000..42b920fb33 --- /dev/null +++ b/board/renesas/sh7753evb/sh7753evb.c @@ -0,0 +1,326 @@ +/* + * Copyright (C) 2012 Renesas Solutions Corp. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <malloc.h> +#include <asm/processor.h> +#include <asm/io.h> +#include <asm/mmc.h> +#include <spi_flash.h> + +int checkboard(void) +{ + puts("BOARD: SH7753 EVB\n"); + + return 0; +} + +static void init_gpio(void) +{ + struct gpio_regs *gpio = GPIO_BASE; + struct sermux_regs *sermux = SERMUX_BASE; + + /* GPIO */ + writew(0x0000, &gpio->pacr); /* GETHER */ + writew(0x0001, &gpio->pbcr); /* INTC */ + writew(0x0000, &gpio->pccr); /* PWMU, INTC */ + writew(0x0000, &gpio->pdcr); /* SPI0 */ + writew(0xeaff, &gpio->pecr); /* GPIO */ + writew(0x0000, &gpio->pfcr); /* WDT */ + writew(0x0004, &gpio->pgcr); /* SPI0, GETHER MDIO gate(PTG1) */ + writew(0x0000, &gpio->phcr); /* SPI1 */ + writew(0x0000, &gpio->picr); /* SDHI */ + writew(0x0000, &gpio->pjcr); /* SCIF4 */ + writew(0x0003, &gpio->pkcr); /* SerMux */ + writew(0x0000, &gpio->plcr); /* SerMux */ + writew(0x0000, &gpio->pmcr); /* RIIC */ + writew(0x0000, &gpio->pncr); /* USB, SGPIO */ + writew(0x0000, &gpio->pocr); /* SGPIO */ + writew(0xd555, &gpio->pqcr); /* GPIO */ + writew(0x0000, &gpio->prcr); /* RIIC */ + writew(0x0000, &gpio->pscr); /* RIIC */ + writew(0x0000, &gpio->ptcr); /* STATUS */ + writeb(0x00, &gpio->pudr); + writew(0x5555, &gpio->pucr); /* Debug LED */ + writew(0x0000, &gpio->pvcr); /* RSPI */ + writew(0x0000, &gpio->pwcr); /* EVC */ + writew(0x0000, &gpio->pxcr); /* LBSC */ + writew(0x0000, &gpio->pycr); /* LBSC */ + writew(0x0000, &gpio->pzcr); /* eMMC */ + writew(0xfe00, &gpio->psel0); + writew(0x0000, &gpio->psel1); + writew(0x3000, &gpio->psel2); + writew(0xff00, &gpio->psel3); + writew(0x771f, &gpio->psel4); + writew(0x0ffc, &gpio->psel5); + writew(0x00ff, &gpio->psel6); + writew(0xfc00, &gpio->psel7); + + writeb(0x10, &sermux->smr0); /* SMR0: SerMux mode 0 */ +} + +static void init_usb_phy(void) +{ + struct usb_common_regs *common0 = USB0_COMMON_BASE; + struct usb_common_regs *common1 = USB1_COMMON_BASE; + struct usb0_phy_regs *phy = USB0_PHY_BASE; + struct usb1_port_regs *port = USB1_PORT_BASE; + struct usb1_alignment_regs *align = USB1_ALIGNMENT_BASE; + + writew(0x0100, &phy->reset); /* set reset */ + /* port0 = USB0, port1 = USB1 */ + writew(0x0002, &phy->portsel); + writel(0x0001, &port->port1sel); /* port1 = Host */ + writew(0x0111, &phy->reset); /* clear reset */ + + writew(0x4000, &common0->suspmode); + writew(0x4000, &common1->suspmode); + +#if defined(__LITTLE_ENDIAN) + writel(0x00000000, &align->ehcidatac); + writel(0x00000000, &align->ohcidatac); +#endif +} + +static void init_gether_mdio(void) +{ + struct gpio_regs *gpio = GPIO_BASE; + + writew(readw(&gpio->pgcr) | 0x0004, &gpio->pgcr); + writeb(readb(&gpio->pgdr) | 0x02, &gpio->pgdr); /* Use ET0-MDIO */ +} + +static void set_mac_to_sh_giga_eth_register(int channel, char *mac_string) +{ + struct ether_mac_regs *ether; + unsigned char mac[6]; + unsigned long val; + + eth_parse_enetaddr(mac_string, mac); + + if (!channel) + ether = GETHER0_MAC_BASE; + else + ether = GETHER1_MAC_BASE; + + val = (mac[0] << 24) | (mac[1] << 16) | (mac[2] << 8) | mac[3]; + writel(val, ðer->mahr); + val = (mac[4] << 8) | mac[5]; + writel(val, ðer->malr); +} + +/***************************************************************** + * This PMB must be set on this timing. The lowlevel_init is run on + * Area 0(phys 0x00000000), so we have to map it. + * + * The new PMB table is following: + * ent virt phys v sz c wt + * 0 0xa0000000 0x40000000 1 128M 0 1 + * 1 0xa8000000 0x48000000 1 128M 0 1 + * 2 0xb0000000 0x50000000 1 128M 0 1 + * 3 0xb8000000 0x58000000 1 128M 0 1 + * 4 0x80000000 0x40000000 1 128M 1 1 + * 5 0x88000000 0x48000000 1 128M 1 1 + * 6 0x90000000 0x50000000 1 128M 1 1 + * 7 0x98000000 0x58000000 1 128M 1 1 + */ +static void set_pmb_on_board_init(void) +{ + struct mmu_regs *mmu = MMU_BASE; + + /* clear ITLB */ + writel(0x00000004, &mmu->mmucr); + + /* delete PMB for SPIBOOT */ + writel(0, PMB_ADDR_BASE(0)); + writel(0, PMB_DATA_BASE(0)); + + /* add PMB for SDRAM(0x40000000 - 0x47ffffff) */ + /* ppn ub v s1 s0 c wt */ + writel(mk_pmb_addr_val(0xa0), PMB_ADDR_BASE(0)); + writel(mk_pmb_data_val(0x40, 1, 1, 1, 0, 0, 1), PMB_DATA_BASE(0)); + writel(mk_pmb_addr_val(0xb0), PMB_ADDR_BASE(2)); + writel(mk_pmb_data_val(0x50, 1, 1, 1, 0, 0, 1), PMB_DATA_BASE(2)); + writel(mk_pmb_addr_val(0xb8), PMB_ADDR_BASE(3)); + writel(mk_pmb_data_val(0x58, 1, 1, 1, 0, 0, 1), PMB_DATA_BASE(3)); + writel(mk_pmb_addr_val(0x80), PMB_ADDR_BASE(4)); + writel(mk_pmb_data_val(0x40, 0, 1, 1, 0, 1, 1), PMB_DATA_BASE(4)); + writel(mk_pmb_addr_val(0x90), PMB_ADDR_BASE(6)); + writel(mk_pmb_data_val(0x50, 0, 1, 1, 0, 1, 1), PMB_DATA_BASE(6)); + writel(mk_pmb_addr_val(0x98), PMB_ADDR_BASE(7)); + writel(mk_pmb_data_val(0x58, 0, 1, 1, 0, 1, 1), PMB_DATA_BASE(7)); +} + +int board_init(void) +{ + struct gether_control_regs *gether = GETHER_CONTROL_BASE; + + init_gpio(); + set_pmb_on_board_init(); + + /* Sets TXnDLY to B'010 */ + writel(0x00000202, &gether->gbecont); + + init_usb_phy(); + init_gether_mdio(); + + return 0; +} + +int dram_init(void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; + printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024)); + + return 0; +} + +int board_mmc_init(bd_t *bis) +{ + struct gpio_regs *gpio = GPIO_BASE; + + writew(readw(&gpio->pgcr) | 0x0040, &gpio->pgcr); + writeb(readb(&gpio->pgdr) & ~0x08, &gpio->pgdr); /* Reset */ + udelay(1); + writeb(readb(&gpio->pgdr) | 0x08, &gpio->pgdr); /* Release reset */ + udelay(200); + + return mmcif_mmc_init(); +} + +static int get_sh_eth_mac_raw(unsigned char *buf, int size) +{ + struct spi_flash *spi; + int ret; + + spi = spi_flash_probe(0, 0, 1000000, SPI_MODE_3); + if (spi == NULL) { + printf("%s: spi_flash probe failed.\n", __func__); + return 1; + } + + ret = spi_flash_read(spi, SH7753EVB_ETHERNET_MAC_BASE, size, buf); + if (ret) { + printf("%s: spi_flash read failed.\n", __func__); + spi_flash_free(spi); + return 1; + } + spi_flash_free(spi); + + return 0; +} + +static int get_sh_eth_mac(int channel, char *mac_string, unsigned char *buf) +{ + memcpy(mac_string, &buf[channel * (SH7753EVB_ETHERNET_MAC_SIZE + 1)], + SH7753EVB_ETHERNET_MAC_SIZE); + mac_string[SH7753EVB_ETHERNET_MAC_SIZE] = 0x00; /* terminate */ + + return 0; +} + +static void init_ethernet_mac(void) +{ + char mac_string[64]; + char env_string[64]; + int i; + unsigned char *buf; + + buf = malloc(256); + if (!buf) { + printf("%s: malloc failed.\n", __func__); + return; + } + get_sh_eth_mac_raw(buf, 256); + + /* Gigabit Ethernet */ + for (i = 0; i < SH7753EVB_ETHERNET_NUM_CH; i++) { + get_sh_eth_mac(i, mac_string, buf); + if (i == 0) + setenv("ethaddr", mac_string); + else { + sprintf(env_string, "eth%daddr", i); + setenv(env_string, mac_string); + } + set_mac_to_sh_giga_eth_register(i, mac_string); + } + + free(buf); +} + +int board_late_init(void) +{ + init_ethernet_mac(); + + return 0; +} + +int do_write_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + int i, ret; + char mac_string[256]; + struct spi_flash *spi; + unsigned char *buf; + + if (argc != 3) { + buf = malloc(256); + if (!buf) { + printf("%s: malloc failed.\n", __func__); + return 1; + } + + get_sh_eth_mac_raw(buf, 256); + + /* print current MAC address */ + for (i = 0; i < SH7753EVB_ETHERNET_NUM_CH; i++) { + get_sh_eth_mac(i, mac_string, buf); + printf("GETHERC ch%d = %s\n", i, mac_string); + } + free(buf); + return 0; + } + + /* new setting */ + memset(mac_string, 0xff, sizeof(mac_string)); + sprintf(mac_string, "%s\t%s", + argv[1], argv[2]); + + /* write MAC data to SPI rom */ + spi = spi_flash_probe(0, 0, 1000000, SPI_MODE_3); + if (!spi) { + printf("%s: spi_flash probe failed.\n", __func__); + return 1; + } + + ret = spi_flash_erase(spi, SH7753EVB_ETHERNET_MAC_BASE_SPI, + SH7753EVB_SPI_SECTOR_SIZE); + if (ret) { + printf("%s: spi_flash erase failed.\n", __func__); + return 1; + } + + ret = spi_flash_write(spi, SH7753EVB_ETHERNET_MAC_BASE_SPI, + sizeof(mac_string), mac_string); + if (ret) { + printf("%s: spi_flash write failed.\n", __func__); + spi_flash_free(spi); + return 1; + } + spi_flash_free(spi); + + puts("The writing of the MAC address to SPI ROM was completed.\n"); + + return 0; +} + +U_BOOT_CMD( + write_mac, 3, 1, do_write_mac, + "write MAC address for GETHERC", + "[GETHERC ch0] [GETHERC ch1]\n" +); diff --git a/board/renesas/sh7753evb/spi-boot.c b/board/renesas/sh7753evb/spi-boot.c new file mode 100644 index 0000000000..21903d9c7b --- /dev/null +++ b/board/renesas/sh7753evb/spi-boot.c @@ -0,0 +1,134 @@ +/* + * Copyright (C) 2013 Renesas Solutions Corp. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> + +#define CONFIG_SPI_ADDR 0x00000000 +#define PHYADDR(_addr) ((_addr & 0x1fffffff) | 0x40000000) +#define CONFIG_RAM_BOOT_PHYS PHYADDR(CONFIG_SYS_TEXT_BASE) + +#define SPIWDMADR 0xFE001018 +#define SPIWDMCNTR 0xFE001020 +#define SPIDMCOR 0xFE001028 +#define SPIDMINTSR 0xFE001188 +#define SPIDMINTMR 0xFE001190 + +#define SPIDMINTSR_DMEND 0x00000004 + +#define TBR 0xFE002000 +#define RBR 0xFE002000 + +#define CR1 0xFE002008 +#define CR2 0xFE002010 +#define CR3 0xFE002018 +#define CR4 0xFE002020 +#define CR7 0xFE002038 +#define CR8 0xFE002040 + +/* CR1 */ +#define SPI_TBE 0x80 +#define SPI_TBF 0x40 +#define SPI_RBE 0x20 +#define SPI_RBF 0x10 +#define SPI_PFONRD 0x08 +#define SPI_SSDB 0x04 +#define SPI_SSD 0x02 +#define SPI_SSA 0x01 + +/* CR2 */ +#define SPI_RSTF 0x80 +#define SPI_LOOPBK 0x40 +#define SPI_CPOL 0x20 +#define SPI_CPHA 0x10 +#define SPI_L1M0 0x08 + +/* CR4 */ +#define SPI_TBEI 0x80 +#define SPI_TBFI 0x40 +#define SPI_RBEI 0x20 +#define SPI_RBFI 0x10 +#define SPI_SpiS0 0x02 +#define SPI_SSS 0x01 + +/* CR7 */ +#define CR7_IDX_OR12 0x12 +#define OR12_ADDR32 0x00000001 + +#define spi_write(val, addr) (*(volatile unsigned long *)(addr)) = val +#define spi_read(addr) (*(volatile unsigned long *)(addr)) + +/* M25P80 */ +#define M25_READ 0x03 +#define M25_READ_4BYTE 0x13 + +extern void bss_start(void); + +#define __uses_spiboot2 __attribute__((section(".spiboot2.text"))) +static void __uses_spiboot2 spi_reset(void) +{ + int timeout = 0x00100000; + + /* Make sure the last transaction is finalized */ + spi_write(0x00, CR3); + spi_write(0x02, CR1); + while (!(spi_read(CR4) & SPI_SpiS0)) { + if (timeout-- < 0) + break; + } + spi_write(0x00, CR1); + + spi_write(spi_read(CR2) | SPI_RSTF, CR2); /* fifo reset */ + spi_write(spi_read(CR2) & ~SPI_RSTF, CR2); + + spi_write(0, SPIDMCOR); +} + +static void __uses_spiboot2 spi_read_flash(void *buf, unsigned long addr, + unsigned long len) +{ + spi_write(CR7_IDX_OR12, CR7); + if (spi_read(CR8) & OR12_ADDR32) { + /* 4-bytes address mode */ + spi_write(M25_READ_4BYTE, TBR); + spi_write((addr >> 24) & 0xFF, TBR); /* ADDR31-24 */ + } else { + /* 3-bytes address mode */ + spi_write(M25_READ, TBR); + } + spi_write((addr >> 16) & 0xFF, TBR); /* ADDR23-16 */ + spi_write((addr >> 8) & 0xFF, TBR); /* ADDR15-8 */ + spi_write(addr & 0xFF, TBR); /* ADDR7-0 */ + + spi_write(SPIDMINTSR_DMEND, SPIDMINTSR); + spi_write((unsigned long)buf, SPIWDMADR); + spi_write(len & 0xFFFFFFE0, SPIWDMCNTR); + spi_write(1, SPIDMCOR); + + spi_write(0xff, CR3); + spi_write(spi_read(CR1) | SPI_SSDB, CR1); + spi_write(spi_read(CR1) | SPI_SSA, CR1); + + while (!(spi_read(SPIDMINTSR) & SPIDMINTSR_DMEND)) + ; + + /* Nagate SP0-SS0 */ + spi_write(0, CR1); +} + +void __uses_spiboot2 spiboot_main(void) +{ + /* + * This code rounds len up for SPIWDMCNTR. We should set it to 0 in + * lower 5-bits. + */ + void (*_start)(void) = (void *)CONFIG_SYS_TEXT_BASE; + volatile unsigned long len = (bss_start - _start + 31) & 0xffffffe0; + + spi_reset(); + spi_read_flash((void *)CONFIG_RAM_BOOT_PHYS, CONFIG_SPI_ADDR, len); + + _start(); +} diff --git a/board/renesas/sh7753evb/u-boot.lds b/board/renesas/sh7753evb/u-boot.lds new file mode 100644 index 0000000000..053df642ea --- /dev/null +++ b/board/renesas/sh7753evb/u-boot.lds @@ -0,0 +1,81 @@ +/* + * Copyright (C) 2007 + * Nobuhiro Iwamatsu <iwamatsu@nigauri.org> + * + * Copyright (C) 2012 + * Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux") +OUTPUT_ARCH(sh) +ENTRY(_start) + +SECTIONS +{ + /* + * entry and reloct_dst will be provided via ldflags + */ + . = .; + + PROVIDE (_ftext = .); + PROVIDE (_fcode = .); + PROVIDE (_start = .); + + .text : + { + KEEP(arch/sh/cpu/sh4/start.o (.text)) + *(.spiboot1.text) + *(.spiboot2.text) + . = ALIGN(8192); + common/env_embedded.o (.ppcenv) + . = ALIGN(8192); + common/env_embedded.o (.ppcenvr) + . = ALIGN(8192); + *(.text) + . = ALIGN(4); + } =0xFF + PROVIDE (_ecode = .); + .rodata : + { + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) + . = ALIGN(4); + } + PROVIDE (_etext = .); + + + PROVIDE (_fdata = .); + .data : + { + *(.data) + . = ALIGN(4); + } + PROVIDE (_edata = .); + + PROVIDE (_fgot = .); + .got : + { + *(.got) + . = ALIGN(4); + } + PROVIDE (_egot = .); + + .u_boot_list : { + KEEP(*(SORT(.u_boot_list*))); + } + + PROVIDE (reloc_dst_end = .); + /* _reloc_dst_end = .; */ + + PROVIDE (bss_start = .); + PROVIDE (__bss_start = .); + .bss (NOLOAD) : + { + *(.bss) + . = ALIGN(4); + } + PROVIDE (bss_end = .); + + PROVIDE (__bss_end = .); +} diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c index 9ae88c57a4..1b60b8f672 100644 --- a/board/ti/dra7xx/evm.c +++ b/board/ti/dra7xx/evm.c @@ -202,12 +202,12 @@ int board_eth_init(bd_t *bis) /* try reading mac address from efuse */ mac_lo = readl((*ctrl)->control_core_mac_id_0_lo); mac_hi = readl((*ctrl)->control_core_mac_id_0_hi); - mac_addr[0] = mac_hi & 0xFF; + mac_addr[0] = (mac_hi & 0xFF0000) >> 16; mac_addr[1] = (mac_hi & 0xFF00) >> 8; - mac_addr[2] = (mac_hi & 0xFF0000) >> 16; - mac_addr[3] = mac_lo & 0xFF; + mac_addr[2] = mac_hi & 0xFF; + mac_addr[3] = (mac_lo & 0xFF0000) >> 16; mac_addr[4] = (mac_lo & 0xFF00) >> 8; - mac_addr[5] = (mac_lo & 0xFF0000) >> 16; + mac_addr[5] = mac_lo & 0xFF; if (!getenv("ethaddr")) { printf("<ethaddr> not set. Validating first E-fuse MAC\n"); diff --git a/board/vpac270/u-boot-spl.lds b/board/vpac270/u-boot-spl.lds index 02d107c4b9..b6fdde4d1b 100644 --- a/board/vpac270/u-boot-spl.lds +++ b/board/vpac270/u-boot-spl.lds @@ -20,6 +20,7 @@ SECTIONS .text.0 : { arch/arm/cpu/pxa/start.o (.text*) + arch/arm/lib/built-in.o (.text*) board/vpac270/built-in.o (.text*) drivers/mtd/onenand/built-in.o (.text*) } diff --git a/board/xilinx/dts/zynq-microzed.dts b/board/xilinx/dts/zynq-microzed.dts new file mode 100644 index 0000000000..6da71c116d --- /dev/null +++ b/board/xilinx/dts/zynq-microzed.dts @@ -0,0 +1,14 @@ +/* + * Xilinx MicroZED board DTS + * + * Copyright (C) 2013 Xilinx, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + model = "Zynq MicroZED Board"; + compatible = "xlnx,zynq-microzed", "xlnx,zynq-7000"; +}; diff --git a/board/xilinx/dts/zynq-zc702.dts b/board/xilinx/dts/zynq-zc702.dts new file mode 100644 index 0000000000..667dc28256 --- /dev/null +++ b/board/xilinx/dts/zynq-zc702.dts @@ -0,0 +1,14 @@ +/* + * Xilinx ZC702 board DTS + * + * Copyright (C) 2013 Xilinx, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + model = "Zynq ZC702 Board"; + compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000"; +}; diff --git a/board/xilinx/dts/zynq-zc706.dts b/board/xilinx/dts/zynq-zc706.dts new file mode 100644 index 0000000000..526fc8888b --- /dev/null +++ b/board/xilinx/dts/zynq-zc706.dts @@ -0,0 +1,14 @@ +/* + * Xilinx ZC706 board DTS + * + * Copyright (C) 2013 Xilinx, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + model = "Zynq ZC706 Board"; + compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000"; +}; diff --git a/board/xilinx/dts/zynq-zc770-xm010.dts b/board/xilinx/dts/zynq-zc770-xm010.dts new file mode 100644 index 0000000000..8b542a109b --- /dev/null +++ b/board/xilinx/dts/zynq-zc770-xm010.dts @@ -0,0 +1,14 @@ +/* + * Xilinx ZC770 XM010 board DTS + * + * Copyright (C) 2013 Xilinx, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + model = "Zynq ZC770 XM010 Board"; + compatible = "xlnx,zynq-zc770-xm010", "xlnx,zynq-7000"; +}; diff --git a/board/xilinx/dts/zynq-zc770-xm012.dts b/board/xilinx/dts/zynq-zc770-xm012.dts new file mode 100644 index 0000000000..0379a07068 --- /dev/null +++ b/board/xilinx/dts/zynq-zc770-xm012.dts @@ -0,0 +1,14 @@ +/* + * Xilinx ZC770 XM012 board DTS + * + * Copyright (C) 2013 Xilinx, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + model = "Zynq ZC770 XM012 Board"; + compatible = "xlnx,zynq-zc770-xm012", "xlnx,zynq-7000"; +}; diff --git a/board/xilinx/dts/zynq-zc770-xm013.dts b/board/xilinx/dts/zynq-zc770-xm013.dts new file mode 100644 index 0000000000..a4f9e05fc0 --- /dev/null +++ b/board/xilinx/dts/zynq-zc770-xm013.dts @@ -0,0 +1,14 @@ +/* + * Xilinx ZC770 XM013 board DTS + * + * Copyright (C) 2013 Xilinx, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + model = "Zynq ZC770 XM013 Board"; + compatible = "xlnx,zynq-zc770-xm013", "xlnx,zynq-7000"; +}; diff --git a/board/xilinx/dts/zynq-zed.dts b/board/xilinx/dts/zynq-zed.dts new file mode 100644 index 0000000000..91a5deba4a --- /dev/null +++ b/board/xilinx/dts/zynq-zed.dts @@ -0,0 +1,14 @@ +/* + * Xilinx ZED board DTS + * + * Copyright (C) 2013 Xilinx, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + model = "Zynq ZED Board"; + compatible = "xlnx,zynq-zed", "xlnx,zynq-7000"; +}; diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c index 5119c09037..a5b9bdef46 100644 --- a/board/xilinx/zynq/board.c +++ b/board/xilinx/zynq/board.c @@ -12,6 +12,12 @@ DECLARE_GLOBAL_DATA_PTR; +/* Bootmode setting values */ +#define ZYNQ_BM_MASK 0x0F +#define ZYNQ_BM_NOR 0x02 +#define ZYNQ_BM_SD 0x05 +#define ZYNQ_BM_JTAG 0x0 + #ifdef CONFIG_FPGA Xilinx_desc fpga; @@ -59,6 +65,25 @@ int board_init(void) return 0; } +int board_late_init(void) +{ + switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) { + case ZYNQ_BM_NOR: + setenv("modeboot", "norboot"); + break; + case ZYNQ_BM_SD: + setenv("modeboot", "sdboot"); + break; + case ZYNQ_BM_JTAG: + setenv("modeboot", "jtagboot"); + break; + default: + setenv("modeboot", ""); + break; + } + + return 0; +} #ifdef CONFIG_CMD_NET int board_eth_init(bd_t *bis) diff --git a/boards.cfg b/boards.cfg index 1ac90030ae..a8336cc7a9 100644 --- a/boards.cfg +++ b/boards.cfg @@ -65,11 +65,9 @@ Active arm arm920t at91 BuS eb_cpux9k2 Active arm arm920t at91 BuS eb_cpux9k2 eb_cpux9k2_ram eb_cpux9k2:RAMBOOT Jens Scharsig <esw@bus-elektronik.de> Active arm arm920t at91 eukrea cpuat91 cpuat91 cpuat91 Eric Benard <eric@eukrea.com> Active arm arm920t at91 eukrea cpuat91 cpuat91_ram cpuat91:RAMBOOT Eric Benard <eric@eukrea.com> -Active arm arm920t imx - - mx1ads - - Active arm arm920t imx - - scb9328 - Torsten Koschorrek <koschorrek@synertronixx.de> Active arm arm920t ks8695 - - cm4008 - Greg Ungerer <greg.ungerer@opengear.com> Active arm arm920t ks8695 - - cm41xx - - -Active arm arm920t s3c24x0 friendlyarm mini2440 mini2440 - Gabriel Huau <contact@huau-gabriel.fr> Active arm arm920t s3c24x0 mpl vcma9 VCMA9 - David Müller <d.mueller@elsoft.ch> Active arm arm920t s3c24x0 samsung - smdk2410 - David Müller <d.mueller@elsoft.ch> Active arm arm926ejs - armltd integrator integratorap_cm926ejs integratorap:CM926EJ_S Linus Walleij <linus.walleij@linaro.org> @@ -171,6 +169,7 @@ Active arm arm926ejs kirkwood iomega - Active arm arm926ejs kirkwood karo tk71 tk71 - - Active arm arm926ejs kirkwood keymile km_arm km_kirkwood km_kirkwood:KM_KIRKWOOD Valentin Longchamp <valentin.longchamp@keymile.com> Active arm arm926ejs kirkwood keymile km_arm km_kirkwood_pci km_kirkwood:KM_KIRKWOOD_PCI Valentin Longchamp <valentin.longchamp@keymile.com> +Active arm arm926ejs kirkwood keymile km_arm km_kirkwood_128m16 km_kirkwood:KM_KIRKWOOD_128M16 Valentin Longchamp <valentin.longchamp@keymile.com> Active arm arm926ejs kirkwood keymile km_arm kmcoge5un km_kirkwood:KM_COGE5UN Valentin Longchamp <valentin.longchamp@keymile.com> Active arm arm926ejs kirkwood keymile km_arm kmnusa km_kirkwood:KM_NUSA Valentin Longchamp <valentin.longchamp@keymile.com> Active arm arm926ejs kirkwood keymile km_arm kmsuv31 km_kirkwood:KM_SUV31 Valentin Longchamp <valentin.longchamp@keymile.com> @@ -280,7 +279,7 @@ Active arm armv7 exynos samsung smdk5420 Active arm armv7 exynos samsung smdkv310 smdkv310 - Chander Kashyap <k.chander@samsung.com> Active arm armv7 exynos samsung trats trats - Lukasz Majewski <l.majewski@samsung.com> Active arm armv7 exynos samsung trats2 trats2 - Piotr Wilczek <p.wilczek@samsung.com> -Active arm armv7 exynos samsung universal_c210 s5pc210_universal - Minkyu Kang <mk7.kang@samsung.com> +Active arm armv7 exynos samsung universal_c210 s5pc210_universal - Przemyslaw Marczak <p.marczak@samsung.com> Active arm armv7 highbank - highbank highbank - Rob Herring <rob.herring@calxeda.com> Active arm armv7 mx5 denx m53evk m53evk m53evk:IMX_CONFIG=board/denx/m53evk/imximage.cfg Marek Vasut <marek.vasut@gmail.com> Active arm armv7 mx5 esg ima3-mx53 ima3-mx53 ima3-mx53:IMX_CONFIG=board/esg/ima3-mx53/imximage.cfg - @@ -327,7 +326,6 @@ Active arm armv7 omap3 isee igep00x0 Active arm armv7 omap3 logicpd am3517evm am3517_evm - Vaibhav Hiremath <hvaibhav@ti.com> Active arm armv7 omap3 logicpd omap3som omap3_logic - Peter Barada <peter.barada@logicpd.com> Active arm armv7 omap3 logicpd zoom1 omap3_zoom1 - Nishanth Menon <nm@ti.com> -Active arm armv7 omap3 logicpd zoom2 omap3_zoom2 - Tom Rix <Tom.Rix@windriver.com> Active arm armv7 omap3 matrix_vision mvblx omap3_mvblx - Michael Jones <michael.jones@matrix-vision.de> Active arm armv7 omap3 nokia rx51 nokia_rx51 - Pali Rohár <pali.rohar@gmail.com> Active arm armv7 omap3 technexion tao3530 omap3_ha tao3530:SYS_BOARD_OMAP3_HA Stefan Roese <sr@denx.de> @@ -352,14 +350,18 @@ Active arm armv7 rmobile renesas lager Active arm armv7 rmobile renesas lager lager_nor lager:NORFLASH Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Active arm armv7 rmobile renesas koelsch koelsch - Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Active arm armv7 rmobile renesas koelsch koelsch_nor koelsch:NORFLASH Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> -Active arm armv7 s5pc1xx samsung goni s5p_goni - Minkyu Kang <mk7.kang@samsung.com> +Active arm armv7 s5pc1xx samsung goni s5p_goni - Mateusz Zalega <m.zalega@samsung.com> Active arm armv7 s5pc1xx samsung smdkc100 smdkc100 - Minkyu Kang <mk7.kang@samsung.com> Active arm armv7 socfpga altera socfpga socfpga_cyclone5 - - Active arm armv7 u8500 st-ericsson snowball snowball - Mathieu Poirier <mathieu.poirier@linaro.org> Active arm armv7 u8500 st-ericsson u8500 u8500_href - - Active arm armv7 vf610 freescale vf610twr vf610twr vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg Alison Wang <b18965@freescale.com> -Active arm armv7 zynq xilinx zynq zynq - Michal Simek <monstr@monstr.eu> -Active arm armv7 zynq xilinx zynq zynq_dcc zynq:ZYNQ_DCC Michal Simek <monstr@monstr.eu> +Active arm armv7 zynq xilinx zynq zynq_zc70x - Michal Simek <monstr@monstr.eu>:Jagannadha Sutradharudu Teki <jaganna@xilinx.com> +Active arm armv7 zynq xilinx zynq zynq_zed - Michal Simek <monstr@monstr.eu>:Jagannadha Sutradharudu Teki <jaganna@xilinx.com> +Active arm armv7 zynq xilinx zynq zynq_microzed - Michal Simek <monstr@monstr.eu>:Jagannadha Sutradharudu Teki <jaganna@xilinx.com> +Active arm armv7 zynq xilinx zynq zynq_zc770_xm010 zynq_zc770:ZC770_XM010 Michal Simek <monstr@monstr.eu>:Jagannadha Sutradharudu Teki <jaganna@xilinx.com> +Active arm armv7 zynq xilinx zynq zynq_zc770_xm012 zynq_zc770:ZC770_XM012 Michal Simek <monstr@monstr.eu>:Jagannadha Sutradharudu Teki <jaganna@xilinx.com> +Active arm armv7 zynq xilinx zynq zynq_zc770_xm013 zynq_zc770:ZC770_XM013 Michal Simek <monstr@monstr.eu>:Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Active arm armv7:arm720t tegra114 nvidia dalmore dalmore - Tom Warren <twarren@nvidia.com> Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Alban Bedel <alban.bedel@avionic-design.de> Active arm armv7:arm720t tegra20 avionic-design plutux plutux - Alban Bedel <alban.bedel@avionic-design.de> @@ -398,6 +400,7 @@ Active arm pxa - - vpac270 Active arm pxa - icpdas lp8x4x lp8x4x - Sergey Yanovich <ynvich@gmail.com> Active arm pxa - toradex - colibri_pxa270 - Marek Vasut <marek.vasut@gmail.com> Active arm sa1100 - - - jornada - Kristoffer Ericson <kristoffer.ericson@gmail.com> +Active aarch64 armv8 - armltd vexpress64 vexpress_aemv8a vexpress_aemv8a:ARM64 David Feng <fenghua@phytium.com.cn> Active avr32 at32ap at32ap700x atmel - atngw100 - Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Active avr32 at32ap at32ap700x atmel - atngw100mkii - Andreas Bießmann <andreas.devel@googlemail.com> Active avr32 at32ap at32ap700x atmel atstk1000 atstk1002 - Haavard Skinnemoen <haavard.skinnemoen@atmel.com> @@ -641,7 +644,6 @@ Active powerpc mpc824x - - cpc45 Active powerpc mpc824x - - cu824 CU824 - Wolfgang Denk <wd@denx.de> Active powerpc mpc824x - - eXalion eXalion - Torsten Demke <torsten.demke@fci.com> Active powerpc mpc824x - - hidden_dragon HIDDEN_DRAGON - Yusdi Santoso <yusdi_santoso@adaptec.com> -Active powerpc mpc824x - - linkstation linkstation_HGLAN linkstation:HGLAN=1 Guennadi Liakhovetski <g.liakhovetski@gmx.de> Active powerpc mpc824x - - musenki MUSENKI - Jim Thompson <jim@musenki.com> Active powerpc mpc824x - - mvblue MVBLUE - - Active powerpc mpc824x - - sandpoint Sandpoint8240 - Wolfgang Denk <wd@denx.de> @@ -971,6 +973,7 @@ Active powerpc mpc85xx - freescale t4qds Active powerpc mpc85xx - freescale t4qds T4160QDS_SPIFLASH T4240QDS:PPC_T4160,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000 - Active powerpc mpc85xx - freescale t4qds T4240EMU T4240EMU:PPC_T4240 York Sun <yorksun@freescale.com> Active powerpc mpc85xx - freescale t4qds T4240QDS T4240QDS:PPC_T4240 - +Active powerpc mpc85xx - freescale t4qds T4240QDS_NAND T4240QDS:PPC_T4240,RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF80000 - Active powerpc mpc85xx - freescale t4qds T4240QDS_SDCARD T4240QDS:PPC_T4240,RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000 - Active powerpc mpc85xx - freescale t4qds T4240QDS_SPIFLASH T4240QDS:PPC_T4240,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000 - Active powerpc mpc85xx - freescale t4qds T4240QDS_SRIO_PCIE_BOOT T4240QDS:PPC_T4240,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF80000 - @@ -1214,6 +1217,7 @@ Active sh sh4 - renesas r0p7734 Active sh sh4 - renesas r2dplus r2dplus - Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>:Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Active sh sh4 - renesas r7780mp r7780mp - Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>:Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Active sh sh4 - renesas sh7752evb sh7752evb - - +Active sh sh4 - renesas sh7753evb sh7753evb - - Active sh sh4 - renesas sh7757lcr sh7757lcr - - Active sh sh4 - renesas sh7763rdp sh7763rdp - Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>:Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Active sh sh4 - renesas sh7785lcr sh7785lcr - - @@ -1242,4 +1246,3 @@ Orphan powerpc mpc8xx - - genietv Orphan powerpc mpc8xx - - mbx8xx MBX - - Orphan powerpc mpc8xx - - mbx8xx MBX860T - - Orphan powerpc mpc8xx - - nx823 NX823 - - - diff --git a/common/Makefile b/common/Makefile index 74404beb36..d12cba5bf0 100644 --- a/common/Makefile +++ b/common/Makefile @@ -230,8 +230,6 @@ obj-$(CONFIG_FIT_SIGNATURE) += image-sig.o obj-y += memsize.o obj-y += stdio.o -CPPFLAGS += -I.. - $(obj)env_embedded.o: $(src)env_embedded.c $(CC) $(AFLAGS) -Wa,--no-warn \ -DENV_CRC=$(shell $(obj)../tools/envcrc) \ diff --git a/common/board_f.c b/common/board_f.c index f0664bc2b2..aa70c3e57d 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -347,9 +347,10 @@ done: #ifdef CONFIG_SANDBOX static int setup_ram_buf(void) { - gd->arch.ram_buf = os_malloc(CONFIG_SYS_SDRAM_SIZE); - assert(gd->arch.ram_buf); - gd->ram_size = CONFIG_SYS_SDRAM_SIZE; + struct sandbox_state *state = state_get_current(); + + gd->arch.ram_buf = state->ram_buf; + gd->ram_size = state->ram_size; return 0; } @@ -462,7 +463,7 @@ static int reserve_round_4k(void) static int reserve_mmu(void) { /* reserve TLB table */ - gd->arch.tlb_size = 4096 * 4; + gd->arch.tlb_size = PGTABLE_SIZE; gd->relocaddr -= gd->arch.tlb_size; /* round down to next 64 kB limit */ @@ -614,7 +615,7 @@ static int reserve_stacks(void) * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack() * to handle this and put in arch/xxx/lib/stack.c */ -# ifdef CONFIG_ARM +# if defined(CONFIG_ARM) && !defined(CONFIG_ARM64) # ifdef CONFIG_USE_IRQ gd->start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ); debug("Reserving %zu Bytes for IRQ stack at: %08lx\n", @@ -772,7 +773,7 @@ static int setup_reloc(void) } /* ARM calls relocate_code from its crt0.S */ -#if !defined(CONFIG_ARM) +#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) static int jump_to_copy(void) { @@ -792,8 +793,6 @@ static int jump_to_copy(void) * (CPU cache) */ board_init_f_r_trampoline(gd->start_addr_sp); -#elif defined(CONFIG_SANDBOX) - board_init_r(gd->new_gd, 0); #else relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr); #endif @@ -811,11 +810,6 @@ static int mark_bootstage(void) } static init_fnc_t init_sequence_f[] = { -#if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \ - !defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \ - !defined(CONFIG_MPC86xx) && !defined(CONFIG_X86) - zero_global_data, -#endif #ifdef CONFIG_SANDBOX setup_ram_buf, #endif @@ -995,7 +989,7 @@ static init_fnc_t init_sequence_f[] = { INIT_FUNC_WATCHDOG_RESET reloc_fdt, setup_reloc, -#ifndef CONFIG_ARM +#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) jump_to_copy, #endif NULL, @@ -1009,12 +1003,24 @@ void board_init_f(ulong boot_flags) gd = &data; #endif + /* + * Clear global data before it is accessed at debug print + * in initcall_run_list. Otherwise the debug print probably + * get the wrong vaule of gd->have_console. + */ +#if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \ + !defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \ + !defined(CONFIG_MPC86xx) && !defined(CONFIG_X86) + zero_global_data(); +#endif + gd->flags = boot_flags; + gd->have_console = 0; if (initcall_run_list(init_sequence_f)) hang(); -#ifndef CONFIG_ARM +#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) /* NOTREACHED - jump_to_copy() does not return */ hang(); #endif diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index ba73f5781a..3f576594d1 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -23,6 +23,11 @@ #include <asm/io.h> #include <linux/compiler.h> +#if defined(CONFIG_BOOTM_VXWORKS) && \ + (defined(CONFIG_PPC) || defined(CONFIG_ARM)) +#include <vxworks.h> +#endif + #if defined(CONFIG_CMD_USB) #include <usb.h> #endif @@ -120,8 +125,11 @@ static boot_os_fn do_bootm_ose; #if defined(CONFIG_BOOTM_PLAN9) static boot_os_fn do_bootm_plan9; #endif -#if defined(CONFIG_CMD_ELF) +#if defined(CONFIG_BOOTM_VXWORKS) && \ + (defined(CONFIG_PPC) || defined(CONFIG_ARM)) static boot_os_fn do_bootm_vxworks; +#endif +#if defined(CONFIG_CMD_ELF) static boot_os_fn do_bootm_qnxelf; int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); int do_bootelf(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); @@ -149,8 +157,11 @@ static boot_os_fn *boot_os[] = { #if defined(CONFIG_BOOTM_PLAN9) [IH_OS_PLAN9] = do_bootm_plan9, #endif -#if defined(CONFIG_CMD_ELF) +#if defined(CONFIG_BOOTM_VXWORKS) && \ + (defined(CONFIG_PPC) || defined(CONFIG_ARM)) [IH_OS_VXWORKS] = do_bootm_vxworks, +#endif +#if defined(CONFIG_CMD_ELF) [IH_OS_QNX] = do_bootm_qnxelf, #endif #ifdef CONFIG_INTEGRITY @@ -333,7 +344,8 @@ static int bootm_find_other(cmd_tbl_t *cmdtp, int flag, int argc, if (((images.os.type == IH_TYPE_KERNEL) || (images.os.type == IH_TYPE_KERNEL_NOLOAD) || (images.os.type == IH_TYPE_MULTI)) && - (images.os.os == IH_OS_LINUX)) { + (images.os.os == IH_OS_LINUX || + images.os.os == IH_OS_VXWORKS)) { if (bootm_find_ramdisk(flag, argc, argv)) return 1; @@ -1531,10 +1543,10 @@ static int do_bootm_netbsd(int flag, int argc, char * const argv[], /* * NetBSD Stage-2 Loader Parameters: - * r3: ptr to board info data - * r4: image address - * r5: console device - * r6: boot args string + * arg[0]: pointer to board info data + * arg[1]: image load address + * arg[2]: char pointer to the console device to use + * arg[3]: char pointer to the boot arguments */ (*loader)(gd->bd, os_hdr, consdev, cmdline); @@ -1678,12 +1690,66 @@ static int do_bootm_plan9(int flag, int argc, char * const argv[], } #endif /* CONFIG_BOOTM_PLAN9 */ -#if defined(CONFIG_CMD_ELF) +#if defined(CONFIG_BOOTM_VXWORKS) && \ + (defined(CONFIG_PPC) || defined(CONFIG_ARM)) + +void do_bootvx_fdt(bootm_headers_t *images) +{ +#if defined(CONFIG_OF_LIBFDT) + int ret; + char *bootline; + ulong of_size = images->ft_len; + char **of_flat_tree = &images->ft_addr; + struct lmb *lmb = &images->lmb; + + if (*of_flat_tree) { + boot_fdt_add_mem_rsv_regions(lmb, *of_flat_tree); + + ret = boot_relocate_fdt(lmb, of_flat_tree, &of_size); + if (ret) + return; + + ret = fdt_add_subnode(*of_flat_tree, 0, "chosen"); + if ((ret >= 0 || ret == -FDT_ERR_EXISTS)) { + bootline = getenv("bootargs"); + if (bootline) { + ret = fdt_find_and_setprop(*of_flat_tree, + "/chosen", "bootargs", + bootline, + strlen(bootline) + 1, 1); + if (ret < 0) { + printf("## ERROR: %s : %s\n", __func__, + fdt_strerror(ret)); + return; + } + } + } else { + printf("## ERROR: %s : %s\n", __func__, + fdt_strerror(ret)); + return; + } + } +#endif + + boot_prep_vxworks(images); + + bootstage_mark(BOOTSTAGE_ID_RUN_OS); + +#if defined(CONFIG_OF_LIBFDT) + printf("## Starting vxWorks at 0x%08lx, device tree at 0x%08lx ...\n", + (ulong)images->ep, (ulong)*of_flat_tree); +#else + printf("## Starting vxWorks at 0x%08lx\n", (ulong)images->ep); +#endif + + boot_jump_vxworks(images); + + puts("## vxWorks terminated\n"); +} + static int do_bootm_vxworks(int flag, int argc, char * const argv[], bootm_headers_t *images) { - char str[80]; - if (flag != BOOTM_STATE_OS_GO) return 0; @@ -1694,13 +1760,13 @@ static int do_bootm_vxworks(int flag, int argc, char * const argv[], } #endif - sprintf(str, "%lx", images->ep); /* write entry-point into string */ - setenv("loadaddr", str); - do_bootvx(NULL, 0, 0, NULL); + do_bootvx_fdt(images); return 1; } +#endif +#if defined(CONFIG_CMD_ELF) static int do_bootm_qnxelf(int flag, int argc, char * const argv[], bootm_headers_t *images) { diff --git a/common/cmd_elf.c b/common/cmd_elf.c index f741f6b83f..ab9c7e332d 100644 --- a/common/cmd_elf.c +++ b/common/cmd_elf.c @@ -156,16 +156,16 @@ int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) * If we don't know where the image is then we're done. */ - if (argc < 1) + if (argc < 2) addr = load_addr; else - addr = simple_strtoul(argv[0], NULL, 16); + addr = simple_strtoul(argv[1], NULL, 16); #if defined(CONFIG_CMD_NET) /* * Check to see if we need to tftp the image ourselves before starting */ - if ((argc == 1) && (strcmp(argv[0], "tftp") == 0)) { + if ((argc == 2) && (strcmp(argv[1], "tftp") == 0)) { if (NetLoop(TFTPGET) <= 0) return 1; printf("Automatic boot of VxWorks image at address 0x%08lx ...\n", diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c index 67a94a7468..da5fef9db9 100644 --- a/common/cmd_mmc.c +++ b/common/cmd_mmc.c @@ -340,6 +340,28 @@ static int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) } #endif /* CONFIG_SUPPORT_EMMC_BOOT */ } + + else if (argc == 3 && strcmp(argv[1], "setdsr") == 0) { + struct mmc *mmc = find_mmc_device(curr_device); + u32 val = simple_strtoul(argv[2], NULL, 16); + int ret; + + if (!mmc) { + printf("no mmc device at slot %x\n", curr_device); + return 1; + } + ret = mmc_set_dsr(mmc, val); + printf("set dsr %s\n", (!ret) ? "OK, force rescan" : "ERROR"); + if (!ret) { + mmc->has_init = 0; + if (mmc_init(mmc)) + return 1; + else + return 0; + } + return ret; + } + state = MMC_INVALID; if (argc == 5 && strcmp(argv[1], "read") == 0) state = MMC_READ; @@ -423,5 +445,6 @@ U_BOOT_CMD( "mmc bootpart <device num> <boot part size MB> <RPMB part size MB>\n" " - change sizes of boot and RPMB partitions of specified device\n" #endif + "mmc setdsr - set DSR register value\n" ); #endif /* !CONFIG_GENERIC_MMC */ diff --git a/common/cmd_pxe.c b/common/cmd_pxe.c index db6b156985..c27ec354cc 100644 --- a/common/cmd_pxe.c +++ b/common/cmd_pxe.c @@ -59,7 +59,7 @@ static int format_mac_pxe(char *outbuf, size_t outbuf_len) uchar ethaddr[6]; if (outbuf_len < 21) { - printf("outbuf is too small (%d < 21)\n", outbuf_len); + printf("outbuf is too small (%zd < 21)\n", outbuf_len); return -EINVAL; } @@ -103,7 +103,7 @@ static int get_bootfile_path(const char *file_path, char *bootfile_path, path_len = (last_slash - bootfile) + 1; if (bootfile_path_size < path_len) { - printf("bootfile_path too small. (%d < %d)\n", + printf("bootfile_path too small. (%zd < %zd)\n", bootfile_path_size, path_len); return -1; diff --git a/common/cmd_sandbox.c b/common/cmd_sandbox.c index 8d59364b63..00982b164d 100644 --- a/common/cmd_sandbox.c +++ b/common/cmd_sandbox.c @@ -6,6 +6,9 @@ #include <common.h> #include <fs.h> +#include <part.h> +#include <sandboxblockdev.h> +#include <asm/errno.h> static int do_sandbox_load(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) @@ -25,10 +28,69 @@ static int do_sandbox_save(cmd_tbl_t *cmdtp, int flag, int argc, return do_save(cmdtp, flag, argc, argv, FS_TYPE_SANDBOX); } +static int do_sandbox_bind(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + if (argc < 2 || argc > 3) + return CMD_RET_USAGE; + char *ep; + char *dev_str = argv[1]; + char *file = argc >= 3 ? argv[2] : NULL; + int dev = simple_strtoul(dev_str, &ep, 16); + if (*ep) { + printf("** Bad device specification %s **\n", dev_str); + return CMD_RET_USAGE; + } + return host_dev_bind(dev, file); +} + +static int do_sandbox_info(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + if (argc < 1 || argc > 2) + return CMD_RET_USAGE; + int min_dev = 0; + int max_dev = CONFIG_HOST_MAX_DEVICES - 1; + if (argc >= 2) { + char *ep; + char *dev_str = argv[1]; + int dev = simple_strtoul(dev_str, &ep, 16); + if (*ep) { + printf("** Bad device specification %s **\n", dev_str); + return CMD_RET_USAGE; + } + min_dev = dev; + max_dev = dev; + } + int dev; + printf("%3s %12s %s\n", "dev", "blocks", "path"); + for (dev = min_dev; dev <= max_dev; dev++) { + block_dev_desc_t *blk_dev; + int ret; + + printf("%3d ", dev); + ret = host_get_dev_err(dev, &blk_dev); + if (ret) { + if (ret == -ENOENT) + puts("Not bound to a backing file\n"); + else if (ret == -ENODEV) + puts("Invalid host device number\n"); + + continue; + } + struct host_block_dev *host_dev = blk_dev->priv; + printf("%12lu %s\n", (unsigned long)blk_dev->lba, + host_dev->filename); + } + return 0; +} + static cmd_tbl_t cmd_sandbox_sub[] = { U_BOOT_CMD_MKENT(load, 7, 0, do_sandbox_load, "", ""), U_BOOT_CMD_MKENT(ls, 3, 0, do_sandbox_ls, "", ""), U_BOOT_CMD_MKENT(save, 6, 0, do_sandbox_save, "", ""), + U_BOOT_CMD_MKENT(bind, 3, 0, do_sandbox_bind, "", ""), + U_BOOT_CMD_MKENT(info, 3, 0, do_sandbox_info, "", ""), }; static int do_sandbox(cmd_tbl_t *cmdtp, int flag, int argc, @@ -57,4 +119,6 @@ U_BOOT_CMD( "sb ls host <filename> - list files on host\n" "sb save host <dev> <filename> <addr> <bytes> [<offset>] - " "save a file to host\n" + "sb bind <dev> [<filename>] - bind \"host\" device to file\n" + "sb info [<dev>] - show device binding & info" ); diff --git a/common/console.c b/common/console.c index cc55068c7c..2dfb788885 100644 --- a/common/console.c +++ b/common/console.c @@ -8,6 +8,7 @@ #include <common.h> #include <stdarg.h> #include <malloc.h> +#include <os.h> #include <serial.h> #include <stdio_dev.h> #include <exports.h> @@ -415,6 +416,12 @@ static inline void print_pre_console_buffer(void) {} void putc(const char c) { +#ifdef CONFIG_SANDBOX + if (!gd) { + os_putc(c); + return; + } +#endif #ifdef CONFIG_SILENT_CONSOLE if (gd->flags & GD_FLG_SILENT) return; @@ -439,6 +446,13 @@ void putc(const char c) void puts(const char *s) { +#ifdef CONFIG_SANDBOX + if (!gd) { + os_puts(s); + return; + } +#endif + #ifdef CONFIG_SILENT_CONSOLE if (gd->flags & GD_FLG_SILENT) return; @@ -467,7 +481,7 @@ int printf(const char *fmt, ...) uint i; char printbuffer[CONFIG_SYS_PBSIZE]; -#ifndef CONFIG_PRE_CONSOLE_BUFFER +#if !defined(CONFIG_SANDBOX) && !defined(CONFIG_PRE_CONSOLE_BUFFER) if (!gd->have_console) return 0; #endif diff --git a/common/fdt_support.c b/common/fdt_support.c index 1f0d8f5fe9..b9dce99462 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -21,6 +21,34 @@ */ DECLARE_GLOBAL_DATA_PTR; +/* + * Get cells len in bytes + * if #NNNN-cells property is 2 then len is 8 + * otherwise len is 4 + */ +static int get_cells_len(void *blob, char *nr_cells_name) +{ + const fdt32_t *cell; + + cell = fdt_getprop(blob, 0, nr_cells_name, NULL); + if (cell && fdt32_to_cpu(*cell) == 2) + return 8; + + return 4; +} + +/* + * Write a 4 or 8 byte big endian cell + */ +static void write_cell(u8 *addr, u64 val, int size) +{ + int shift = (size - 1) * 8; + while (size-- > 0) { + *addr++ = (val >> shift) & 0xff; + shift -= 8; + } +} + /** * fdt_getprop_u32_default - Find a node and return it's property or a default * @@ -131,9 +159,9 @@ static int fdt_fixup_stdout(void *fdt, int chosenoff) int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end, int force) { - int nodeoffset; + int nodeoffset, addr_cell_len; int err, j, total; - fdt32_t tmp; + fdt64_t tmp; const char *path; uint64_t addr, size; @@ -170,9 +198,11 @@ int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end, int force) return err; } + addr_cell_len = get_cells_len(fdt, "#address-cells"); + path = fdt_getprop(fdt, nodeoffset, "linux,initrd-start", NULL); if ((path == NULL) || force) { - tmp = cpu_to_fdt32(initrd_start); + write_cell((u8 *)&tmp, initrd_start, addr_cell_len); err = fdt_setprop(fdt, nodeoffset, "linux,initrd-start", &tmp, sizeof(tmp)); if (err < 0) { @@ -181,7 +211,7 @@ int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end, int force) fdt_strerror(err)); return err; } - tmp = cpu_to_fdt32(initrd_end); + write_cell((u8 *)&tmp, initrd_end, addr_cell_len); err = fdt_setprop(fdt, nodeoffset, "linux,initrd-end", &tmp, sizeof(tmp)); if (err < 0) { @@ -343,34 +373,6 @@ void do_fixup_by_compat_u32(void *fdt, const char *compat, do_fixup_by_compat(fdt, compat, prop, &tmp, 4, create); } -/* - * Get cells len in bytes - * if #NNNN-cells property is 2 then len is 8 - * otherwise len is 4 - */ -static int get_cells_len(void *blob, char *nr_cells_name) -{ - const fdt32_t *cell; - - cell = fdt_getprop(blob, 0, nr_cells_name, NULL); - if (cell && fdt32_to_cpu(*cell) == 2) - return 8; - - return 4; -} - -/* - * Write a 4 or 8 byte big endian cell - */ -static void write_cell(u8 *addr, u64 val, int size) -{ - int shift = (size - 1) * 8; - while (size-- > 0) { - *addr++ = (val >> shift) & 0xff; - shift -= 8; - } -} - #ifdef CONFIG_NR_DRAM_BANKS #define MEMORY_BANKS_MAX CONFIG_NR_DRAM_BANKS #else @@ -400,10 +402,11 @@ int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks) nodeoffset = fdt_path_offset(blob, "/memory"); if (nodeoffset < 0) { nodeoffset = fdt_add_subnode(blob, 0, "memory"); - if (nodeoffset < 0) + if (nodeoffset < 0) { printf("WARNING: could not create /memory: %s.\n", fdt_strerror(nodeoffset)); - return nodeoffset; + return nodeoffset; + } } err = fdt_setprop(blob, nodeoffset, "device_type", "memory", sizeof("memory")); diff --git a/common/image.c b/common/image.c index b0ae58ff3e..41453540f2 100644 --- a/common/image.c +++ b/common/image.c @@ -81,6 +81,7 @@ static const table_entry_t uimage_arch[] = { { IH_ARCH_NDS32, "nds32", "NDS32", }, { IH_ARCH_OPENRISC, "or1k", "OpenRISC 1000",}, { IH_ARCH_SANDBOX, "sandbox", "Sandbox", }, + { IH_ARCH_ARM64, "arm64", "AArch64", }, { -1, "", "", }, }; @@ -125,9 +125,9 @@ endif # cc-version # Usage gcc-ver := $(call cc-version) -cc-version = $(shell $(SHELL) $(SRCTREE)/tools/gcc-version.sh $(CC)) -binutils-version = $(shell $(SHELL) $(SRCTREE)/tools/binutils-version.sh $(AS)) -dtc-version = $(shell $(SHELL) $(SRCTREE)/tools/dtc-version.sh $(DTC)) +cc-version = $(shell $(SHELL) $(SRCTREE)/scripts/gcc-version.sh $(CC)) +binutils-version = $(shell $(SHELL) $(SRCTREE)/scripts/binutils-version.sh $(AS)) +dtc-version = $(shell $(SHELL) $(SRCTREE)/scripts/dtc-version.sh $(DTC)) # # Include the make variables (CC, etc...) diff --git a/disk/part.c b/disk/part.c index d2e34cfcfa..6941033d8d 100644 --- a/disk/part.c +++ b/disk/part.c @@ -43,6 +43,9 @@ static const struct block_drvr block_drvr[] = { #if defined(CONFIG_SYSTEMACE) { .name = "ace", .get_dev = systemace_get_dev, }, #endif +#if defined(CONFIG_SANDBOX) + { .name = "host", .get_dev = host_get_dev, }, +#endif { }, }; @@ -286,6 +289,9 @@ static void print_part_header (const char *type, block_dev_desc_t * dev_desc) case IF_TYPE_MMC: puts ("MMC"); break; + case IF_TYPE_HOST: + puts("HOST"); + break; default: puts ("UNKNOWN"); break; diff --git a/doc/README.arm64 b/doc/README.arm64 new file mode 100644 index 0000000000..75586dbaa7 --- /dev/null +++ b/doc/README.arm64 @@ -0,0 +1,46 @@ +U-boot for arm64 + +Summary +======= +No hardware platform of arm64 is available now. The u-boot is +simulated on Foundation Model and Fast Model for ARMv8. + +Notes +===== + +1. Currenly, u-boot run at the highest exception level processor + supported and jump to EL2 or optionally EL1 before enter OS. + +2. U-boot for arm64 is compiled with AArch64-gcc. AArch64-gcc + use rela relocation format, a tool(tools/relocate-rela) by Scott Wood + is used to encode the initial addend of rela to u-boot.bin. After running, + the u-boot will be relocated to destination again. + +3. Fdt should be placed at a 2-megabyte boundary and within the first 512 + megabytes from the start of the kernel image. So, fdt_high should be + defined specially. + Please reference linux/Documentation/arm64/booting.txt for detail. + +4. Spin-table is used to wake up secondary processors. One location + (or per processor location) is defined to hold the kernel entry point + for secondary processors. It must be ensured that the location is + accessible and zero immediately after secondary processor + enter slave_cpu branch execution in start.S. The location address + is encoded in cpu node of DTS. Linux kernel store the entry point + of secondary processors to it and send event to wakeup secondary + processors. + Please reference linux/Documentation/arm64/booting.txt for detail. + +5. Generic board is supported. + +6. CONFIG_ARM64 instead of CONFIG_ARMV8 is used to distinguish aarch64 and + aarch32 specific codes. + +Contributor +=========== + Tom Rini <trini@ti.com> + Scott Wood <scottwood@freescale.com> + York Sun <yorksun@freescale.com> + Simon Glass <sjg@chromium.org> + Sharma Bhupesh <bhupesh.sharma@freescale.com> + Rob Herring <robherring2@gmail.com> diff --git a/doc/README.mini2440 b/doc/README.mini2440 deleted file mode 100644 index 311ca52862..0000000000 --- a/doc/README.mini2440 +++ /dev/null @@ -1,28 +0,0 @@ -U-Boot for FriendlyARM Mini2440 (s3c2440) - -This file contains information for the port of U-Boot to FriendlyARM -mini2440 - -All information about the board can be found on : -http://www.friendlyarm.net/products/mini2440 - -To build u-boot : ./MAKEALL mini2440 - -Overview : --------- -FriendlyARM Mini 2440 SBC (Single-Board Computer) with 400 MHz Samsung S3C2440 -ARM9 processor. The board measures 100 x 100 mm, ideal for learning about ARM9 -systems. It's a low cost board. - -Boot Methods : ------------- -Mini2440 can boot from NOR or NAND. - -Build : ------ -./MAKEALL mini2440 - -or - -make mini2440_config -make diff --git a/doc/README.scrapyard b/doc/README.scrapyard index 604de0c8a7..2aed855993 100644 --- a/doc/README.scrapyard +++ b/doc/README.scrapyard @@ -11,8 +11,10 @@ easily if here is something they might want to dig for... Board Arch CPU Commit Removed Last known maintainer/contact ================================================================================================= -omap730p2 arm arm926ejs - 2013-11-11 -pn62 powerpc mpc824x - 2013-11-11 Wolfgang Grandegger <wg@grandegger.com> +mx1ads arm arm920t - 2014-01-13 +mini2440 arm arm920t - 2014-01-13 Gabriel Huau <contact@huau-gabriel.fr> +omap730p2 arm arm926ejs 79c5c08d 2013-11-11 +pn62 powerpc mpc824x 649acfe1 2013-11-11 Wolfgang Grandegger <wg@grandegger.com> pdnb3 arm ixp 304db0b 2013-09-24 Stefan Roese <sr@denx.de> scpu arm ixp 304db0b 2013-09-24 Stefan Roese <sr@denx.de> omap1510inn arm arm925t 0610a16 2013-09-23 Kshitij Gupta <kshitij@ti.com> diff --git a/doc/README.sh7753evb b/doc/README.sh7753evb new file mode 100644 index 0000000000..5fe178c53f --- /dev/null +++ b/doc/README.sh7753evb @@ -0,0 +1,67 @@ +======================================== +Renesas SH7753 EVB board +======================================== + +This board specification: +========================= + +The SH7753 EVB (board config name:sh7753evb) has the following device: + + - SH7753 (SH-4A) + - DDR3-SDRAM 512MB + - SPI ROM 8MB + - Gigabit Ethernet controllers + - eMMC 4GB + + +Configuration for This board: +============================= + +You can select the configuration as follows: + + - make sh7753evb_config + + +This board specific command: +============================ + +This board has the following its specific command: + + - write_mac + + +1. write_mac + +You can write MAC address to SPI ROM. + + Usage 1) Write MAC address + + write_mac [GETHERC ch0] [GETHERC ch1] + + For example) + => write_mac 74:90:50:00:33:9e 74:90:50:00:33:9f + *) We have to input the command as a single line + (without carriage return) + *) We have to reset after input the command. + + Usage 2) Show current data + + write_mac + + For example) + => write_mac + GETHERC ch0 = 74:90:50:00:33:9e + GETHERC ch1 = 74:90:50:00:33:9f + + +Update SPI ROM: +============================ + +1. Copy u-boot image to RAM area. +2. Probe SPI device. + => sf probe 0 + SF: Detected MX25L6405D with page size 64KiB, total 8 MiB +3. Erase SPI ROM. + => sf erase 0 80000 +4. Write u-boot image to SPI ROM. + => sf write 0x48000000 0 80000 diff --git a/doc/README.socfpga b/doc/README.socfpga new file mode 100644 index 0000000000..cfcbbfe379 --- /dev/null +++ b/doc/README.socfpga @@ -0,0 +1,53 @@ + +-------------------------------------------- +SOCFPGA Documentation for U-Boot and SPL +-------------------------------------------- + +This README is about U-Boot and SPL support for Altera's ARM Cortex-A9MPCore +based SOCFPGA. To know more about the hardware itself, please refer to +www.altera.com. + + +-------------------------------------------- +socfpga_dw_mmc +-------------------------------------------- +Here are macro and detailed configuration required to enable DesignWare SDMMC +controller support within SOCFPGA + +#define CONFIG_MMC +-> To enable the SD MMC framework support + +#define CONFIG_SDMMC_BASE (SOCFPGA_SDMMC_ADDRESS) +-> The base address of CSR register for DesignWare SDMMC controller + +#define CONFIG_GENERIC_MMC +-> Enable the generic MMC driver + +#define CONFIG_SYS_MMC_MAX_BLK_COUNT 256 +-> Using smaller max blk cnt to avoid flooding the limited stack in OCRAM + +#define CONFIG_DWMMC +-> Enable the common DesignWare SDMMC controller framework + +#define CONFIG_SOCFPGA_DWMMC +-> Enable the SOCFPGA specific driver for DesignWare SDMMC controller + +#define CONFIG_SOCFPGA_DWMMC_FIFO_DEPTH 1024 +-> The FIFO depth for SOCFPGA DesignWare SDMMC controller + +#define CONFIG_SOCFPGA_DWMMC_DRVSEL 3 +-> Phase-shifted clock of sdmmc_clk for controller to drive command and data to +the card to meet hold time requirements. SD clock is running at 50MHz and +drvsel is set to shift 135 degrees (3 * 45 degrees). With that, the hold time +is 135 / 360 * 20ns = 7.5ns. + +#define CONFIG_SOCFPGA_DWMMC_SMPSEL 0 +-> Phase-shifted clock of sdmmc_clk used to sample the command and data from +the card + +#define CONFIG_SOCFPGA_DWMMC_BUS_WIDTH 4 +-> Bus width of data line which either 1, 4 or 8 and based on board routing. + +#define CONFIG_SOCFPGA_DWMMC_BUS_HZ 50000000 +-> The clock rate to controller. Do note the controller have a wrapper which +divide the clock from PLL by 4. diff --git a/doc/README.vxworks b/doc/README.vxworks new file mode 100644 index 0000000000..4cb302e7f4 --- /dev/null +++ b/doc/README.vxworks @@ -0,0 +1,19 @@ +From VxWorks 6.9+ (not include 6.9), VxWorks starts adopting device tree as its hardware +decription mechansim (for PowerPC and ARM), thus requiring boot interface changes. +This section will describe the new interface. + +For PowerPC, the calling convention of the new VxWorks entry point conforms to the ePAPR standard, +which is shown below (see ePAPR for more details): + + void (*kernel_entry)(fdt_addr, + 0, 0, EPAPR_MAGIC, boot_IMA, 0, 0) + +For ARM, the calling convention is show below: + + void (*kernel_entry)(void *fdt_addr) + +When booting new VxWorks kernel (uImage format), the parameters passed to bootm is like below: + + bootm <kernel image address> - <device tree address> + +The do_bootvx command still works as it was for older VxWorks kernels. diff --git a/doc/README.zynq b/doc/README.zynq new file mode 100644 index 0000000000..043c970140 --- /dev/null +++ b/doc/README.zynq @@ -0,0 +1,94 @@ +# +# Xilinx ZYNQ U-Boot +# +# (C) Copyright 2013 Xilinx, Inc. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +1. About this + +This document describes the information about Xilinx Zynq U-Boot - +like supported boards, ML status and TODO list. + +2. Zynq boards + +Xilinx Zynq-7000 All Programmable SoCs enable extensive system level +differentiation, integration, and flexibility through hardware, software, +and I/O programmability. + +* zc70x + - zc702 (single qspi, gem0, mmc) [1] + - zc706 (dual parallel qspi, gem0, mmc) [2] +* zed (single qspi, gem0, mmc) [3] +* microzed (single qspi, gem0, mmc) [4] +* zc770 + - zc770-xm010 (single qspi, gem0, mmc) + - zc770-xm011 (8 or 16 bit nand) + - zc770-xm012 (nor) + - zc770-xm013 (dual parallel qspi, gem1) + +3. Building + + # Configure for zc70x board + $ make zynq_zc70x_config + Configuring for zynq_zc70x board... + + # Building default dts for zc702 board + $ make + + # Building specified dts for zc706 board + $ make DEVICE_TREE=zynq-zc706 + +4. Bootmode + +Zynq has a facility to read the bootmode from the slcr bootmode register +once user is setting through jumpers on the board - see page no:1546 on [5] + +All possible bootmode values are defined in Table 6-2:Boot_Mode MIO Pins +on [5]. + +board_late_init() will read the bootmode values using slcr bootmode register +at runtime and assign the modeboot variable to specific bootmode string which +is intern used in autoboot. + +SLCR bootmode register Bit[3:0] values +#define ZYNQ_BM_NOR 0x02 +#define ZYNQ_BM_SD 0x05 +#define ZYNQ_BM_JTAG 0x0 + +"modeboot" variable can assign any of "norboot", "sdboot" or "jtagboot" +bootmode strings at runtime. + +5. Mainline status + +- Added basic board configurations support. +- Added zynq u-boot bsp code - arch/arm/cpu/armv7/zynq +- Added zynq boards named - zc70x, zed, microzed, zc770_xm010, zc770_xm012, zc770_xm013 +- Added zynq drivers: + serial - drivers/serial/serial_zynq.c + net - drivers/net/zynq_gem.c + mmc - drivers/mmc/zynq_sdhci.c + mmc - drivers/mmc/zynq_sdhci.c + spi- drivers/spi/zynq_spi.c + i2c - drivers/i2c/zynq_i2c.c +- Done proper cleanups on board configurations +- Added basic FDT support for zynq boards +- d-cache support for zynq_gem.c + +6. TODO + +- Add zynq boards support - zc770_xm011 +- Add zynq qspi controller driver +- Add zynq nand controller driver +- Add FDT support on individual drivers + +[1] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm +[2] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm +[3] http://zedboard.org/product/zedboard +[4] http://zedboard.org/product/microzed +[5] http://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf + +-- +Jagannadha Sutradharudu Teki <jaganna@xilinx.com> +Sun Dec 15 14:52:41 IST 2013 diff --git a/doc/SPI/README.sh_qspi_test b/doc/SPI/README.sh_qspi_test new file mode 100644 index 0000000000..8a33fec32f --- /dev/null +++ b/doc/SPI/README.sh_qspi_test @@ -0,0 +1,38 @@ +------------------------------------------------- + Simple steps used to test the SH-QSPI at U-Boot +------------------------------------------------- + +#0, Currently, SH-QSPI is used by lager board (Renesas ARM SoC R8A7790) + and koelsch board (Renesas ARM SoC R8A7791). These boot from SPI ROM + basically. Thus, U-Boot start, SH-QSPI will is operating normally. + +#1, build U-Boot and load u-boot.bin + + => tftpboot 40000000 u-boot.bin + sh_eth Waiting for PHY auto negotiation to complete.. done + sh_eth: 100Base/Half + Using sh_eth device + TFTP from server 192.168.169.1; our IP address is 192.168.169.79 + Filename 'u-boot.bin'. + Load address: 0x40000000 + Loading: ############ + 2.5 MiB/s + done + Bytes transferred = 175364 (2ad04 hex) + +#2, Commands to erase/write u-boot to flash device + + Note: This method is description of the lager board. If you want to use the + other boards, please change the value according to each environment. + + => sf probe 0 + SF: Detected S25FL512S_256K with page size 512 Bytes, erase size 64 KiB, total 64 MiB + => sf erase 80000 40000 + SF: 262144 bytes @ 0x80000 Erased: OK + => sf write 40000000 80000 175364 + SF: 1528676 bytes @ 0x80000 Written: OK + => + +#3, Push reset button. + + If you're written correctly and driver works properly, U-Boot starts. diff --git a/drivers/block/Makefile b/drivers/block/Makefile index 4e94378388..8697da4262 100644 --- a/drivers/block/Makefile +++ b/drivers/block/Makefile @@ -18,5 +18,6 @@ obj-$(CONFIG_SATA_DWC) += sata_dwc.o obj-$(CONFIG_SATA_SIL3114) += sata_sil3114.o obj-$(CONFIG_SATA_SIL) += sata_sil.o obj-$(CONFIG_IDE_SIL680) += sil680.o +obj-$(CONFIG_SANDBOX) += sandbox.o obj-$(CONFIG_SCSI_SYM53C8XX) += sym53c8xx.o obj-$(CONFIG_SYSTEMACE) += systemace.o diff --git a/drivers/block/sandbox.c b/drivers/block/sandbox.c new file mode 100644 index 0000000000..73f4c4a9e9 --- /dev/null +++ b/drivers/block/sandbox.c @@ -0,0 +1,124 @@ +/* + * Copyright (C) 2013 Henrik Nordstrom <henrik@henriknordstrom.net> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <config.h> +#include <common.h> +#include <part.h> +#include <os.h> +#include <malloc.h> +#include <sandboxblockdev.h> +#include <asm/errno.h> + +static struct host_block_dev host_devices[CONFIG_HOST_MAX_DEVICES]; + +static struct host_block_dev *find_host_device(int dev) +{ + if (dev >= 0 && dev < CONFIG_HOST_MAX_DEVICES) + return &host_devices[dev]; + + return NULL; +} + +static unsigned long host_block_read(int dev, unsigned long start, + lbaint_t blkcnt, void *buffer) +{ + struct host_block_dev *host_dev = find_host_device(dev); + + if (!host_dev) + return -1; + if (os_lseek(host_dev->fd, + start * host_dev->blk_dev.blksz, + OS_SEEK_SET) == -1) { + printf("ERROR: Invalid position\n"); + return -1; + } + ssize_t len = os_read(host_dev->fd, buffer, + blkcnt * host_dev->blk_dev.blksz); + if (len >= 0) + return len / host_dev->blk_dev.blksz; + return -1; +} + +static unsigned long host_block_write(int dev, unsigned long start, + lbaint_t blkcnt, const void *buffer) +{ + struct host_block_dev *host_dev = find_host_device(dev); + if (os_lseek(host_dev->fd, + start * host_dev->blk_dev.blksz, + OS_SEEK_SET) == -1) { + printf("ERROR: Invalid position\n"); + return -1; + } + ssize_t len = os_write(host_dev->fd, buffer, blkcnt * + host_dev->blk_dev.blksz); + if (len >= 0) + return len / host_dev->blk_dev.blksz; + return -1; +} + +int host_dev_bind(int dev, char *filename) +{ + struct host_block_dev *host_dev = find_host_device(dev); + + if (!host_dev) + return -1; + if (host_dev->blk_dev.priv) { + os_close(host_dev->fd); + host_dev->blk_dev.priv = NULL; + } + if (host_dev->filename) + free(host_dev->filename); + if (filename && *filename) { + host_dev->filename = strdup(filename); + } else { + host_dev->filename = NULL; + return 0; + } + + host_dev->fd = os_open(host_dev->filename, OS_O_RDWR); + if (host_dev->fd == -1) { + printf("Failed to access host backing file '%s'\n", + host_dev->filename); + return 1; + } + + block_dev_desc_t *blk_dev = &host_dev->blk_dev; + blk_dev->if_type = IF_TYPE_HOST; + blk_dev->priv = host_dev; + blk_dev->blksz = 512; + blk_dev->lba = os_lseek(host_dev->fd, 0, OS_SEEK_END) / blk_dev->blksz; + blk_dev->block_read = host_block_read; + blk_dev->block_write = host_block_write; + blk_dev->dev = dev; + blk_dev->part_type = PART_TYPE_UNKNOWN; + init_part(blk_dev); + + return 0; +} + +int host_get_dev_err(int dev, block_dev_desc_t **blk_devp) +{ + struct host_block_dev *host_dev = find_host_device(dev); + + if (!host_dev) + return -ENODEV; + + if (!host_dev->blk_dev.priv) + return -ENOENT; + + *blk_devp = &host_dev->blk_dev; + return 0; +} + +block_dev_desc_t *host_get_dev(int dev) +{ + block_dev_desc_t *blk_dev; + + if (host_get_dev_err(dev, &blk_dev)) + return NULL; + + return blk_dev; +} diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c index 1eb92e5417..07011e99a8 100644 --- a/drivers/dfu/dfu.c +++ b/drivers/dfu/dfu.c @@ -74,6 +74,11 @@ unsigned char *dfu_free_buf(void) return dfu_buf; } +unsigned long dfu_get_buf_size(void) +{ + return dfu_buf_size; +} + unsigned char *dfu_get_buf(void) { char *s; diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 1ed26cab34..e793ed994e 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -28,6 +28,7 @@ obj-$(CONFIG_TEGRA_MMC) += tegra_mmc.o obj-$(CONFIG_DWMMC) += dw_mmc.o obj-$(CONFIG_EXYNOS_DWMMC) += exynos_dw_mmc.o obj-$(CONFIG_ZYNQ_SDHCI) += zynq_sdhci.o +obj-$(CONFIG_SOCFPGA_DWMMC) += socfpga_dw_mmc.o ifdef CONFIG_SPL_BUILD obj-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o else diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 19d9b0b899..4cec5aaa60 100644..100755 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -6,6 +6,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include <bouncebuf.h> #include <common.h> #include <malloc.h> #include <mmc.h> @@ -41,11 +42,13 @@ static void dwmci_set_idma_desc(struct dwmci_idmac *idmac, } static void dwmci_prepare_data(struct dwmci_host *host, - struct mmc_data *data, struct dwmci_idmac *cur_idmac) + struct mmc_data *data, + struct dwmci_idmac *cur_idmac, + void *bounce_buffer) { unsigned long ctrl; unsigned int i = 0, flags, cnt, blk_cnt; - ulong data_start, data_end, start_addr; + ulong data_start, data_end; blk_cnt = data->blocks; @@ -55,11 +58,6 @@ static void dwmci_prepare_data(struct dwmci_host *host, data_start = (ulong)cur_idmac; dwmci_writel(host, DWMCI_DBADDR, (unsigned int)cur_idmac); - if (data->flags == MMC_DATA_READ) - start_addr = (unsigned int)data->dest; - else - start_addr = (unsigned int)data->src; - do { flags = DWMCI_IDMAC_OWN | DWMCI_IDMAC_CH ; flags |= (i == 0) ? DWMCI_IDMAC_FS : 0; @@ -70,7 +68,7 @@ static void dwmci_prepare_data(struct dwmci_host *host, cnt = data->blocksize * 8; dwmci_set_idma_desc(cur_idmac, flags, cnt, - start_addr + (i * PAGE_SIZE)); + (u32)bounce_buffer + (i * PAGE_SIZE)); if (blk_cnt <= 8) break; @@ -117,6 +115,7 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, u32 retry = 10000; u32 mask, ctrl; ulong start = get_timer(0); + struct bounce_buffer bbstate; while (dwmci_readl(host, DWMCI_STATUS) & DWMCI_BUSY) { if (get_timer(start) > timeout) { @@ -127,8 +126,19 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_ALL); - if (data) - dwmci_prepare_data(host, data, cur_idmac); + if (data) { + if (data->flags == MMC_DATA_READ) { + bounce_buffer_start(&bbstate, (void*)data->dest, + data->blocksize * + data->blocks, GEN_BB_WRITE); + } else { + bounce_buffer_start(&bbstate, (void*)data->src, + data->blocksize * + data->blocks, GEN_BB_READ); + } + dwmci_prepare_data(host, data, cur_idmac, + bbstate.bounce_buffer); + } dwmci_writel(host, DWMCI_CMDARG, cmd->cmdarg); @@ -204,6 +214,8 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, ctrl = dwmci_readl(host, DWMCI_CTRL); ctrl &= ~(DWMCI_DMA_EN); dwmci_writel(host, DWMCI_CTRL, ctrl); + + bounce_buffer_stop(&bbstate); } udelay(100); @@ -336,9 +348,9 @@ int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk) struct mmc *mmc; int err = 0; - mmc = malloc(sizeof(struct mmc)); + mmc = calloc(sizeof(struct mmc), 1); if (!mmc) { - printf("mmc malloc fail!\n"); + printf("mmc calloc fail!\n"); return -1; } diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index e1461a98dd..c6a1c23fbf 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -877,6 +877,7 @@ static int mmc_startup(struct mmc *mmc) mmc->tran_speed = freq * mult; + mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1); mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf); if (IS_SD(mmc)) @@ -907,6 +908,14 @@ static int mmc_startup(struct mmc *mmc) if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN) mmc->write_bl_len = MMC_MAX_BLOCK_LEN; + if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) { + cmd.cmdidx = MMC_CMD_SET_DSR; + cmd.cmdarg = (mmc->dsr & 0xffff) << 16; + cmd.resp_type = MMC_RSP_NONE; + if (mmc_send_cmd(mmc, &cmd, NULL)) + printf("MMC: SET_DSR failed\n"); + } + /* Select the card, and put it into Transfer Mode */ if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ cmd.cmdidx = MMC_CMD_SELECT_CARD; @@ -1163,6 +1172,9 @@ static int mmc_send_if_cond(struct mmc *mmc) int mmc_register(struct mmc *mmc) { + /* Setup dsr related values */ + mmc->dsr_imp = 0; + mmc->dsr = 0xffffffff; /* Setup the universal parts of the block interface just once */ mmc->block_dev.if_type = IF_TYPE_MMC; mmc->block_dev.dev = cur_dev_num++; @@ -1280,6 +1292,12 @@ int mmc_init(struct mmc *mmc) return err; } +int mmc_set_dsr(struct mmc *mmc, u16 val) +{ + mmc->dsr = val; + return 0; +} + /* * CPU and board-specific MMC initializations. Aliased function * signals caller to move on diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 46ae9cb52d..1e86b92bee 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -24,7 +24,8 @@ static void sdhci_reset(struct sdhci_host *host, u8 mask) sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET); while (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) { if (timeout == 0) { - printf("Reset 0x%x never completed.\n", (int)mask); + printf("%s: Reset 0x%x never completed.\n", + __func__, (int)mask); return; } timeout--; @@ -79,7 +80,8 @@ static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data, do { stat = sdhci_readl(host, SDHCI_INT_STATUS); if (stat & SDHCI_INT_ERROR) { - printf("Error detected in status(0x%X)!\n", stat); + printf("%s: Error detected in status(0x%X)!\n", + __func__, stat); return -1; } if (stat & rdy) { @@ -102,7 +104,7 @@ static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data, if (timeout-- > 0) udelay(10); else { - printf("Transfer data timeout\n"); + printf("%s: Transfer data timeout\n", __func__); return -1; } } while (!(stat & SDHCI_INT_DATA_END)); @@ -147,7 +149,7 @@ int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) { if (time >= cmd_timeout) { - printf("MMC: %d busy ", mmc_dev); + printf("%s: MMC: %d busy ", __func__, mmc_dev); if (2 * cmd_timeout <= CONFIG_SDHCI_CMD_MAX_TIMEOUT) { cmd_timeout += cmd_timeout; printf("timeout increasing to: %u ms.\n", @@ -179,7 +181,7 @@ int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, if (data) flags |= SDHCI_CMD_DATA; - /*Set Transfer mode regarding to data flag*/ + /* Set Transfer mode regarding to data flag */ if (data != 0) { sdhci_writeb(host, 0xe, SDHCI_TIMEOUT_CONTROL); mode = SDHCI_TRNS_BLK_CNT_EN; @@ -230,7 +232,7 @@ int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, if (host->quirks & SDHCI_QUIRK_BROKEN_R1B) return 0; else { - printf("Timeout for status update!\n"); + printf("%s: Timeout for status update!\n", __func__); return TIMEOUT; } } @@ -307,7 +309,8 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock) while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) & SDHCI_CLOCK_INT_STABLE)) { if (timeout == 0) { - printf("Internal clock never stabilised.\n"); + printf("%s: Internal clock never stabilised.\n", + __func__); return -1; } timeout--; @@ -397,7 +400,8 @@ int sdhci_init(struct mmc *mmc) if ((host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) && !aligned_buffer) { aligned_buffer = memalign(8, 512*1024); if (!aligned_buffer) { - printf("Aligned buffer alloc failed!!!"); + printf("%s: Aligned buffer alloc failed!!!\n", + __func__); return -1; } } @@ -418,8 +422,8 @@ int sdhci_init(struct mmc *mmc) } /* Enable only interrupts served by the SD controller */ - sdhci_writel(host, SDHCI_INT_DATA_MASK | SDHCI_INT_CMD_MASK - , SDHCI_INT_ENABLE); + sdhci_writel(host, SDHCI_INT_DATA_MASK | SDHCI_INT_CMD_MASK, + SDHCI_INT_ENABLE); /* Mask all sdhci interrupt sources */ sdhci_writel(host, 0x0, SDHCI_SIGNAL_ENABLE); @@ -433,7 +437,7 @@ int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk) mmc = malloc(sizeof(struct mmc)); if (!mmc) { - printf("mmc malloc fail!\n"); + printf("%s: mmc malloc fail!\n", __func__); return -1; } @@ -450,7 +454,8 @@ int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk) caps = sdhci_readl(host, SDHCI_CAPABILITIES); #ifdef CONFIG_MMC_SDMA if (!(caps & SDHCI_CAN_DO_SDMA)) { - printf("Your controller don't support sdma!!\n"); + printf("%s: Your controller doesn't support SDMA!!\n", + __func__); return -1; } #endif @@ -467,7 +472,8 @@ int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk) mmc->f_max *= 1000000; } if (mmc->f_max == 0) { - printf("Hardware doesn't specify base clock frequency\n"); + printf("%s: Hardware doesn't specify base clock frequency\n", + __func__); return -1; } if (min_clk) diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c new file mode 100644 index 0000000000..bc53a5da27 --- /dev/null +++ b/drivers/mmc/socfpga_dw_mmc.c @@ -0,0 +1,68 @@ +/* + * (C) Copyright 2013 Altera Corporation <www.altera.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <malloc.h> +#include <dwmmc.h> +#include <asm/arch/dwmmc.h> +#include <asm/arch/clock_manager.h> +#include <asm/arch/system_manager.h> + +static const struct socfpga_clock_manager *clock_manager_base = + (void *)SOCFPGA_CLKMGR_ADDRESS; +static const struct socfpga_system_manager *system_manager_base = + (void *)SOCFPGA_SYSMGR_ADDRESS; + +static char *SOCFPGA_NAME = "SOCFPGA DWMMC"; + +static void socfpga_dwmci_clksel(struct dwmci_host *host) +{ + unsigned int drvsel; + unsigned int smplsel; + + /* Disable SDMMC clock. */ + clrbits_le32(&clock_manager_base->per_pll_en, + CLKMGR_PERPLLGRP_EN_SDMMCCLK_MASK); + + /* Configures drv_sel and smpl_sel */ + drvsel = CONFIG_SOCFPGA_DWMMC_DRVSEL; + smplsel = CONFIG_SOCFPGA_DWMMC_SMPSEL; + + debug("%s: drvsel %d smplsel %d\n", __func__, drvsel, smplsel); + writel(SYSMGR_SDMMC_CTRL_SET(smplsel, drvsel), + &system_manager_base->sdmmcgrp_ctrl); + + debug("%s: SYSMGR_SDMMCGRP_CTRL_REG = 0x%x\n", __func__, + readl(&system_manager_base->sdmmcgrp_ctrl)); + + /* Enable SDMMC clock */ + setbits_le32(&clock_manager_base->per_pll_en, + CLKMGR_PERPLLGRP_EN_SDMMCCLK_MASK); +} + +int socfpga_dwmmc_init(u32 regbase, int bus_width, int index) +{ + struct dwmci_host *host = NULL; + host = calloc(sizeof(struct dwmci_host), 1); + if (!host) { + printf("dwmci_host calloc fail!\n"); + return -1; + } + + host->name = SOCFPGA_NAME; + host->ioaddr = (void *)regbase; + host->buswidth = bus_width; + host->clksel = socfpga_dwmci_clksel; + host->dev_index = index; + /* fixed clock divide by 4 which due to the SDMMC wrapper */ + host->bus_hz = CONFIG_SOCFPGA_DWMMC_BUS_HZ; + host->fifoth_val = MSIZE(0x2) | + RX_WMARK(CONFIG_SOCFPGA_DWMMC_FIFO_DEPTH / 2 - 1) | + TX_WMARK(CONFIG_SOCFPGA_DWMMC_FIFO_DEPTH / 2); + + return add_dwmci(host, host->bus_hz, 400000); +} + diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile index e145cd1842..02b149cacc 100644 --- a/drivers/mtd/nand/Makefile +++ b/drivers/mtd/nand/Makefile @@ -5,8 +5,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -ifdef CONFIG_CMD_NAND - ifdef CONFIG_SPL_BUILD ifdef CONFIG_SPL_NAND_DRIVERS @@ -69,4 +67,3 @@ obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_spl.o obj-$(CONFIG_NAND_MXC) += mxc_nand_spl.o endif # drivers -endif # nand diff --git a/drivers/mtd/nand/nand_util.c b/drivers/mtd/nand/nand_util.c index eeaa7e8a48..b292826034 100644 --- a/drivers/mtd/nand/nand_util.c +++ b/drivers/mtd/nand/nand_util.c @@ -315,7 +315,7 @@ int nand_unlock(struct mtd_info *mtd, loff_t start, size_t length, int page; struct nand_chip *chip = mtd->priv; - debug("nand_unlock%s: start: %08llx, length: %d!\n", + debug("nand_unlock%s: start: %08llx, length: %zd!\n", allexcept ? " (allexcept)" : "", start, length); /* select the NAND device */ diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c index 5e7e6b3375..790d5385e0 100644 --- a/drivers/mtd/nand/omap_gpmc.c +++ b/drivers/mtd/nand/omap_gpmc.c @@ -283,53 +283,55 @@ static void omap_hwecc_init_bch(struct nand_chip *chip, int32_t mode) if (bch->ecc_scheme == OMAP_ECC_BCH8_CODE_HW) { wr_mode = BCH_WRAPMODE_1; - switch (bch->nibbles) { - case ECC_BCH4_NIBBLES: - unused_length = 3; - break; - case ECC_BCH8_NIBBLES: - unused_length = 2; - break; - case ECC_BCH16_NIBBLES: - unused_length = 0; - break; - } - - /* - * This is ecc_size_config for ELM mode. - * Here we are using different settings for read and write access and - * also depending on BCH strength. - */ - switch (mode) { - case NAND_ECC_WRITE: - /* write access only setup eccsize1 config */ - val = ((unused_length + bch->nibbles) << 22); - break; + switch (bch->nibbles) { + case ECC_BCH4_NIBBLES: + unused_length = 3; + break; + case ECC_BCH8_NIBBLES: + unused_length = 2; + break; + case ECC_BCH16_NIBBLES: + unused_length = 0; + break; + } - case NAND_ECC_READ: - default: /* - * by default eccsize0 selected for ecc1resultsize - * eccsize0 config. + * This is ecc_size_config for ELM mode. Here we are using + * different settings for read and write access and also + * depending on BCH strength. */ - val = (bch->nibbles << 12); - /* eccsize1 config */ - val |= (unused_length << 22); - break; - } + switch (mode) { + case NAND_ECC_WRITE: + /* write access only setup eccsize1 config */ + val = ((unused_length + bch->nibbles) << 22); + break; + + case NAND_ECC_READ: + default: + /* + * by default eccsize0 selected for ecc1resultsize + * eccsize0 config. + */ + val = (bch->nibbles << 12); + /* eccsize1 config */ + val |= (unused_length << 22); + break; + } } else { - /* - * This ecc_size_config setting is for BCH sw library. - * - * Note: we only support BCH8 currently with BCH sw library! - * Should be really easy to adobt to BCH4, however some omap3 have - * flaws with BCH4. - * - * Here we are using wrapping mode 6 both for reading and writing, with: - * size0 = 0 (no additional protected byte in spare area) - * size1 = 32 (skip 32 nibbles = 16 bytes per sector in spare area) - */ - val = (32 << 22) | (0 << 12); + /* + * This ecc_size_config setting is for BCH sw library. + * + * Note: we only support BCH8 currently with BCH sw library! + * Should be really easy to adobt to BCH4, however some omap3 + * have flaws with BCH4. + * + * Here we are using wrapping mode 6 both for reading and + * writing, with: + * size0 = 0 (no additional protected byte in spare area) + * size1 = 32 (skip 32 nibbles = 16 bytes per sector in + * spare area) + */ + val = (32 << 22) | (0 << 12); } /* ecc size configuration */ writel(val, &gpmc_cfg->ecc_size_config); @@ -761,7 +763,7 @@ static void __maybe_unused omap_free_bch(struct mtd_info *mtd) static int omap_select_ecc_scheme(struct nand_chip *nand, enum omap_ecc ecc_scheme, unsigned int pagesize, unsigned int oobsize) { struct nand_bch_priv *bch = nand->priv; - struct nand_ecclayout *ecclayout = nand->ecc.layout; + struct nand_ecclayout *ecclayout = &omap_ecclayout; int eccsteps = pagesize / SECTOR_BYTES; int i; @@ -774,7 +776,7 @@ static int omap_select_ecc_scheme(struct nand_chip *nand, bch_priv.type = 0; nand->ecc.mode = NAND_ECC_SOFT; nand->ecc.layout = NULL; - nand->ecc.size = pagesize; + nand->ecc.size = 0; bch->ecc_scheme = OMAP_ECC_HAM1_CODE_SW; break; @@ -789,6 +791,7 @@ static int omap_select_ecc_scheme(struct nand_chip *nand, bch_priv.control = NULL; bch_priv.type = 0; /* populate ecc specific fields */ + memset(&nand->ecc, 0, sizeof(struct nand_ecc_ctrl)); nand->ecc.mode = NAND_ECC_HW; nand->ecc.strength = 1; nand->ecc.size = SECTOR_BYTES; @@ -798,8 +801,12 @@ static int omap_select_ecc_scheme(struct nand_chip *nand, nand->ecc.calculate = omap_calculate_ecc; /* define ecc-layout */ ecclayout->eccbytes = nand->ecc.bytes * eccsteps; - for (i = 0; i < ecclayout->eccbytes; i++) - ecclayout->eccpos[i] = i + BADBLOCK_MARKER_LENGTH; + for (i = 0; i < ecclayout->eccbytes; i++) { + if (nand->options & NAND_BUSWIDTH_16) + ecclayout->eccpos[i] = i + 2; + else + ecclayout->eccpos[i] = i + 1; + } ecclayout->oobfree[0].offset = i + BADBLOCK_MARKER_LENGTH; ecclayout->oobfree[0].length = oobsize - ecclayout->eccbytes - BADBLOCK_MARKER_LENGTH; @@ -823,6 +830,7 @@ static int omap_select_ecc_scheme(struct nand_chip *nand, } bch_priv.type = ECC_BCH8; /* populate ecc specific fields */ + memset(&nand->ecc, 0, sizeof(struct nand_ecc_ctrl)); nand->ecc.mode = NAND_ECC_HW; nand->ecc.strength = 8; nand->ecc.size = SECTOR_BYTES; @@ -865,6 +873,7 @@ static int omap_select_ecc_scheme(struct nand_chip *nand, elm_init(); bch_priv.type = ECC_BCH8; /* populate ecc specific fields */ + memset(&nand->ecc, 0, sizeof(struct nand_ecc_ctrl)); nand->ecc.mode = NAND_ECC_HW; nand->ecc.strength = 8; nand->ecc.size = SECTOR_BYTES; @@ -891,6 +900,11 @@ static int omap_select_ecc_scheme(struct nand_chip *nand, debug("nand: error: ecc scheme not enabled or supported\n"); return -EINVAL; } + + /* nand_scan_tail() sets ham1 sw ecc; hw ecc layout is set by driver */ + if (ecc_scheme != OMAP_ECC_HAM1_CODE_SW) + nand->ecc.layout = ecclayout; + return 0; } diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c index 979e4af7c5..e33e8d38e7 100644 --- a/drivers/mtd/onenand/onenand_base.c +++ b/drivers/mtd/onenand/onenand_base.c @@ -91,7 +91,13 @@ static struct nand_ecclayout onenand_oob_32 = { .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} } }; -static const unsigned char ffchars[] = { +/* + * Warning! This array is used with the memcpy_16() function, thus + * it must be aligned to 2 bytes. GCC can make this array unaligned + * as the array is made of unsigned char, which memcpy16() doesn't + * like and will cause unaligned access. + */ +static const unsigned char __aligned(2) ffchars[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c index 108665f441..e316a692a8 100644 --- a/drivers/mtd/spi/sf_ops.c +++ b/drivers/mtd/spi/sf_ops.c @@ -273,9 +273,15 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset, /* Handle memory-mapped SPI */ if (flash->memory_map) { + ret = spi_claim_bus(flash->spi); + if (ret) { + debug("SF: unable to claim SPI bus\n"); + return ret; + } spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MMAP); memcpy(data, flash->memory_map + offset, len); spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MMAP_END); + spi_release_bus(flash->spi); return 0; } diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c index c1eb754898..b863a98283 100644 --- a/drivers/mtd/spi/sf_probe.c +++ b/drivers/mtd/spi/sf_probe.c @@ -60,6 +60,7 @@ static const struct spi_flash_params spi_flash_params_table[] = { {"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, SECT_4K}, #endif #ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */ + {"MX25L2006E", 0xc22012, 0x0, 64 * 1024, 4, 0}, {"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, 0}, {"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16, 0}, {"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32, 0}, @@ -67,7 +68,7 @@ static const struct spi_flash_params spi_flash_params_table[] = { {"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128, 0}, {"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256, 0}, {"MX25L25635F", 0xc22019, 0x0, 64 * 1024, 512, 0}, - {"MX25L51235F", 0xc2201A, 0x0, 64 * 1024, 1024, 0}, + {"MX25L51235F", 0xc2201a, 0x0, 64 * 1024, 1024, 0}, {"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256, 0}, #endif #ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */ diff --git a/drivers/mtd/ubi/Makefile b/drivers/mtd/ubi/Makefile index e1f3a241a2..56c2823477 100644 --- a/drivers/mtd/ubi/Makefile +++ b/drivers/mtd/ubi/Makefile @@ -5,9 +5,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -ifdef CONFIG_CMD_UBI obj-y += build.o vtbl.o vmt.o upd.o kapi.o eba.o io.o wl.o scan.o crc32.o - obj-y += misc.o obj-y += debug.o -endif diff --git a/drivers/net/fm/init.c b/drivers/net/fm/init.c index cd787f4eed..74c72d3ff7 100644 --- a/drivers/net/fm/init.c +++ b/drivers/net/fm/init.c @@ -276,13 +276,64 @@ static void ft_fixup_port(void *blob, struct fm_eth_info *info, char *prop) "status", "disabled", strlen("disabled") + 1, 1); } +#ifdef CONFIG_SYS_FMAN_V3 +static int ft_fixup_xgec(void *blob, struct fm_eth_info *info) +{ + int off, i, ci; +#define FM1_10GEC3_RX_PORT_ADDR (CONFIG_SYS_CCSRBAR_PHYS + 0x488000) +#define FM1_10GEC3_TX_PORT_ADDR (CONFIG_SYS_CCSRBAR_PHYS + 0x4a8000) +#define FM1_10GEC3_MAC_ADDR (CONFIG_SYS_CCSRBAR_PHYS + 0x4e0000) + + if ((info->port == FM1_10GEC3) || (info->port == FM1_10GEC4)) { + ci = (info->port == FM1_10GEC3) ? 2 : 3; + i = (info->port == FM1_10GEC3) ? 0 : 1; + + off = fdt_node_offset_by_compat_reg(blob, "fsl,fman-port-1g-rx", + FM1_10GEC3_RX_PORT_ADDR + + i * 0x1000); + if (off > 0) { + fdt_setprop(blob, off, "cell-index", &ci, sizeof(int)); + fdt_setprop(blob, off, "compatible", + "fsl,fman-port-10g-rx", 20); + } else { + goto err; + } + + off = fdt_node_offset_by_compat_reg(blob, "fsl,fman-port-1g-tx", + FM1_10GEC3_TX_PORT_ADDR + + i * 0x1000); + if (off > 0) { + fdt_setprop(blob, off, "cell-index", &ci, sizeof(int)); + fdt_setprop(blob, off, "compatible", + "fsl,fman-port-10g-tx", 20); + } else { + goto err; + } + + off = fdt_node_offset_by_compat_reg(blob, "fsl,fman-memac", + FM1_10GEC3_MAC_ADDR + + i * 0x2000); + if (off > 0) + fdt_setprop(blob, off, "cell-index", &ci, sizeof(int)); + else + goto err; + } + return 0; +err: + printf("WARNING: Fail to find the node\n"); + return -1; +} +#endif + void fdt_fixup_fman_ethernet(void *blob) { int i; #ifdef CONFIG_SYS_FMAN_V3 - for (i = 0; i < ARRAY_SIZE(fm_info); i++) + for (i = 0; i < ARRAY_SIZE(fm_info); i++) { ft_fixup_port(blob, &fm_info[i], "fsl,fman-memac"); + ft_fixup_xgec(blob, &fm_info[i]); + } #else for (i = 0; i < ARRAY_SIZE(fm_info); i++) { if (fm_info[i].type == FM_ETH_1G_E) diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h index 8aa71098cb..331c07cb59 100644 --- a/drivers/net/sh_eth.h +++ b/drivers/net/sh_eth.h @@ -287,7 +287,9 @@ static const u16 sh_eth_offset_fast_sh4[SH_ETH_MAX_REGISTER_OFFSET] = { #if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734) #define SH_ETH_TYPE_GETHER #define BASE_IO_ADDR 0xfee00000 -#elif defined(CONFIG_CPU_SH7757) || defined(CONFIG_CPU_SH7752) +#elif defined(CONFIG_CPU_SH7757) || \ + defined(CONFIG_CPU_SH7752) || \ + defined(CONFIG_CPU_SH7753) #if defined(CONFIG_SH_ETHER_USE_GETHER) #define SH_ETH_TYPE_GETHER #define BASE_IO_ADDR 0xfee00000 @@ -356,7 +358,9 @@ enum DMAC_T_BIT { /* GECMR */ enum GECMR_BIT { -#if defined(CONFIG_CPU_SH7757) || defined(CONFIG_CPU_SH7752) +#if defined(CONFIG_CPU_SH7757) || \ + defined(CONFIG_CPU_SH7752) || \ + defined(CONFIG_CPU_SH7753) GECMR_1000B = 0x20, GECMR_100B = 0x01, GECMR_10B = 0x00, #else GECMR_1000B = 0x01, GECMR_100B = 0x04, GECMR_10B = 0x00, diff --git a/drivers/serial/lpc32xx_hsuart.c b/drivers/serial/lpc32xx_hsuart.c index 9c7c6213a5..c8926a8945 100644 --- a/drivers/serial/lpc32xx_hsuart.c +++ b/drivers/serial/lpc32xx_hsuart.c @@ -38,6 +38,9 @@ static int lpc32xx_serial_getc(void) static void lpc32xx_serial_putc(const char c) { + if (c == '\n') + serial_putc('\r'); + writel(c, &hsuart->tx); /* Wait for character to be sent */ diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 181c81815a..fbc37b27e8 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -56,9 +56,8 @@ void NS16550_init(NS16550_t com_port, int baud_divisor) ; serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier); -#if (defined(CONFIG_OMAP) && !defined(CONFIG_OMAP3_ZOOM2)) || \ - defined(CONFIG_AM33XX) || defined(CONFIG_TI81XX) || \ - defined(CONFIG_AM43XX) +#if defined(CONFIG_OMAP) || defined(CONFIG_AM33XX) || \ + defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX) serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/ #endif serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr); diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h index 556b868150..f5e9854d13 100644 --- a/drivers/serial/serial_sh.h +++ b/drivers/serial/serial_sh.h @@ -143,7 +143,9 @@ struct uart_port { #elif defined(CONFIG_H8S2678) # define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ # define H8300_SCI_DR(ch) (*(volatile char *)(P1DR + h8300_sci_pins[ch].port)) -#elif defined(CONFIG_CPU_SH7757) || defined(CONFIG_CPU_SH7752) +#elif defined(CONFIG_CPU_SH7757) || \ + defined(CONFIG_CPU_SH7752) || \ + defined(CONFIG_CPU_SH7753) # define SCSPTR0 0xfe4b0020 # define SCSPTR1 0xfe4b0020 # define SCSPTR2 0xfe4b0020 diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index ed4ecd754b..d5a7143b50 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -30,6 +30,7 @@ obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o obj-$(CONFIG_SANDBOX_SPI) += sandbox_spi.o obj-$(CONFIG_SOFT_SPI) += soft_spi.o obj-$(CONFIG_SH_SPI) += sh_spi.o +obj-$(CONFIG_SH_QSPI) += sh_qspi.o obj-$(CONFIG_FSL_ESPI) += fsl_espi.o obj-$(CONFIG_FDT_SPI) += fdt_spi.o obj-$(CONFIG_TEGRA20_SFLASH) += tegra20_sflash.o diff --git a/drivers/spi/sh_qspi.c b/drivers/spi/sh_qspi.c new file mode 100644 index 0000000000..edeb42d038 --- /dev/null +++ b/drivers/spi/sh_qspi.c @@ -0,0 +1,277 @@ +/* + * SH QSPI (Quad SPI) driver + * + * Copyright (C) 2013 Renesas Electronics Corporation + * Copyright (C) 2013 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include <common.h> +#include <malloc.h> +#include <spi.h> +#include <asm/io.h> + +/* SH QSPI register bit masks <REG>_<BIT> */ +#define SPCR_MSTR 0x08 +#define SPCR_SPE 0x40 +#define SPSR_SPRFF 0x80 +#define SPSR_SPTEF 0x20 +#define SPPCR_IO3FV 0x04 +#define SPPCR_IO2FV 0x02 +#define SPPCR_IO1FV 0x01 +#define SPBDCR_RXBC0 (1 << 0) +#define SPCMD_SCKDEN (1 << 15) +#define SPCMD_SLNDEN (1 << 14) +#define SPCMD_SPNDEN (1 << 13) +#define SPCMD_SSLKP (1 << 7) +#define SPCMD_BRDV0 (1 << 2) +#define SPCMD_INIT1 SPCMD_SCKDEN | SPCMD_SLNDEN | \ + SPCMD_SPNDEN | SPCMD_SSLKP | \ + SPCMD_BRDV0 +#define SPCMD_INIT2 SPCMD_SPNDEN | SPCMD_SSLKP | \ + SPCMD_BRDV0 +#define SPBFCR_TXRST (1 << 7) +#define SPBFCR_RXRST (1 << 6) + +/* SH QSPI register set */ +struct sh_qspi_regs { + unsigned char spcr; + unsigned char sslp; + unsigned char sppcr; + unsigned char spsr; + unsigned long spdr; + unsigned char spscr; + unsigned char spssr; + unsigned char spbr; + unsigned char spdcr; + unsigned char spckd; + unsigned char sslnd; + unsigned char spnd; + unsigned char dummy0; + unsigned short spcmd0; + unsigned short spcmd1; + unsigned short spcmd2; + unsigned short spcmd3; + unsigned char spbfcr; + unsigned char dummy1; + unsigned short spbdcr; + unsigned long spbmul0; + unsigned long spbmul1; + unsigned long spbmul2; + unsigned long spbmul3; +}; + +struct sh_qspi_slave { + struct spi_slave slave; + struct sh_qspi_regs *regs; +}; + +static inline struct sh_qspi_slave *to_sh_qspi(struct spi_slave *slave) +{ + return container_of(slave, struct sh_qspi_slave, slave); +} + +static void sh_qspi_init(struct sh_qspi_slave *ss) +{ + /* QSPI initialize */ + /* Set master mode only */ + writeb(SPCR_MSTR, &ss->regs->spcr); + + /* Set SSL signal level */ + writeb(0x00, &ss->regs->sslp); + + /* Set MOSI signal value when transfer is in idle state */ + writeb(SPPCR_IO3FV|SPPCR_IO2FV, &ss->regs->sppcr); + + /* Set bit rate. See 58.3.8 Quad Serial Peripheral Interface */ + writeb(0x01, &ss->regs->spbr); + + /* Disable Dummy Data Transmission */ + writeb(0x00, &ss->regs->spdcr); + + /* Set clock delay value */ + writeb(0x00, &ss->regs->spckd); + + /* Set SSL negation delay value */ + writeb(0x00, &ss->regs->sslnd); + + /* Set next-access delay value */ + writeb(0x00, &ss->regs->spnd); + + /* Set equence command */ + writew(SPCMD_INIT2, &ss->regs->spcmd0); + + /* Reset transfer and receive Buffer */ + setbits_8(&ss->regs->spbfcr, SPBFCR_TXRST|SPBFCR_RXRST); + + /* Clear transfer and receive Buffer control bit */ + clrbits_8(&ss->regs->spbfcr, SPBFCR_TXRST|SPBFCR_RXRST); + + /* Set equence control method. Use equence0 only */ + writeb(0x00, &ss->regs->spscr); + + /* Enable SPI function */ + setbits_8(&ss->regs->spcr, SPCR_SPE); +} + +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + return 1; +} + +void spi_cs_activate(struct spi_slave *slave) +{ + struct sh_qspi_slave *ss = to_sh_qspi(slave); + + /* Set master mode only */ + writeb(SPCR_MSTR, &ss->regs->spcr); + + /* Set command */ + writew(SPCMD_INIT1, &ss->regs->spcmd0); + + /* Reset transfer and receive Buffer */ + setbits_8(&ss->regs->spbfcr, SPBFCR_TXRST|SPBFCR_RXRST); + + /* Clear transfer and receive Buffer control bit */ + clrbits_8(&ss->regs->spbfcr, SPBFCR_TXRST|SPBFCR_RXRST); + + /* Set equence control method. Use equence0 only */ + writeb(0x00, &ss->regs->spscr); + + /* Enable SPI function */ + setbits_8(&ss->regs->spcr, SPCR_SPE); +} + +void spi_cs_deactivate(struct spi_slave *slave) +{ + struct sh_qspi_slave *ss = to_sh_qspi(slave); + + /* Disable SPI Function */ + clrbits_8(&ss->regs->spcr, SPCR_SPE); +} + +void spi_init(void) +{ + /* nothing to do */ +} + +struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode) +{ + struct sh_qspi_slave *ss; + + if (!spi_cs_is_valid(bus, cs)) + return NULL; + + ss = spi_alloc_slave(struct sh_qspi_slave, bus, cs); + if (!ss) { + printf("SPI_error: Fail to allocate sh_qspi_slave\n"); + return NULL; + } + + ss->regs = (struct sh_qspi_regs *)CONFIG_SH_QSPI_BASE; + + /* Init SH QSPI */ + sh_qspi_init(ss); + + return &ss->slave; +} + +void spi_free_slave(struct spi_slave *slave) +{ + struct sh_qspi_slave *spi = to_sh_qspi(slave); + + free(spi); +} + +int spi_claim_bus(struct spi_slave *slave) +{ + return 0; +} + +void spi_release_bus(struct spi_slave *slave) +{ +} + +int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, + void *din, unsigned long flags) +{ + struct sh_qspi_slave *ss = to_sh_qspi(slave); + unsigned long nbyte; + int ret = 0; + unsigned char dtdata = 0, drdata; + unsigned char *tdata = &dtdata, *rdata = &drdata; + unsigned long *spbmul0 = &ss->regs->spbmul0; + + if (dout == NULL && din == NULL) { + if (flags & SPI_XFER_END) + spi_cs_deactivate(slave); + return 0; + } + + if (bitlen % 8) { + printf("%s: bitlen is not 8bit alined %d", __func__, bitlen); + return 1; + } + + nbyte = bitlen / 8; + + if (flags & SPI_XFER_BEGIN) { + spi_cs_activate(slave); + + /* Set 1048576 byte */ + writel(0x100000, spbmul0); + } + + if (flags & SPI_XFER_END) + writel(nbyte, spbmul0); + + if (dout != NULL) + tdata = (unsigned char *)dout; + + if (din != NULL) + rdata = din; + + while (nbyte > 0) { + while (!(readb(&ss->regs->spsr) & SPSR_SPTEF)) { + if (ctrlc()) { + puts("abort\n"); + return 1; + } + udelay(10); + } + + writeb(*tdata, (unsigned char *)(&ss->regs->spdr)); + + while ((readw(&ss->regs->spbdcr) != SPBDCR_RXBC0)) { + if (ctrlc()) { + puts("abort\n"); + return 1; + } + udelay(1); + } + + while (!(readb(&ss->regs->spsr) & SPSR_SPRFF)) { + if (ctrlc()) { + puts("abort\n"); + return 1; + } + udelay(10); + } + + *rdata = readb((unsigned char *)(&ss->regs->spdr)); + + if (dout != NULL) + tdata++; + if (din != NULL) + rdata++; + + nbyte--; + } + + if (flags & SPI_XFER_END) + spi_cs_deactivate(slave); + + return ret; +} diff --git a/drivers/spi/tegra114_spi.c b/drivers/spi/tegra114_spi.c index 4d2af483d7..810fa4718c 100644 --- a/drivers/spi/tegra114_spi.c +++ b/drivers/spi/tegra114_spi.c @@ -289,9 +289,6 @@ int tegra114_spi_xfer(struct spi_slave *slave, unsigned int bitlen, reg = readl(®s->fifo_status); writel(reg, ®s->fifo_status); - /* clear ready bit */ - setbits_le32(®s->xfer_status, SPI_XFER_STS_RDY); - clrsetbits_le32(®s->command1, SPI_CMD1_CS_SW_VAL, SPI_CMD1_RX_EN | SPI_CMD1_TX_EN | SPI_CMD1_LSBY_FE | (slave->cs << SPI_CMD1_CS_SEL_SHIFT)); @@ -305,7 +302,6 @@ int tegra114_spi_xfer(struct spi_slave *slave, unsigned int bitlen, /* handle data in 32-bit chunks */ while (num_bytes > 0) { int bytes; - int is_read = 0; int tm, i; tmpdout = 0; @@ -319,6 +315,9 @@ int tegra114_spi_xfer(struct spi_slave *slave, unsigned int bitlen, num_bytes -= bytes; + /* clear ready bit */ + setbits_le32(®s->xfer_status, SPI_XFER_STS_RDY); + clrsetbits_le32(®s->command1, SPI_CMD1_BIT_LEN_MASK << SPI_CMD1_BIT_LEN_SHIFT, (bytes * 8 - 1) << SPI_CMD1_BIT_LEN_SHIFT); @@ -329,20 +328,14 @@ int tegra114_spi_xfer(struct spi_slave *slave, unsigned int bitlen, * Wait for SPI transmit FIFO to empty, or to time out. * The RX FIFO status will be read and cleared last */ - for (tm = 0, is_read = 0; tm < SPI_TIMEOUT; ++tm) { + for (tm = 0; tm < SPI_TIMEOUT; ++tm) { u32 fifo_status, xfer_status; - fifo_status = readl(®s->fifo_status); - - /* We can exit when we've had both RX and TX activity */ - if (is_read && - (fifo_status & SPI_FIFO_STS_TX_FIFO_EMPTY)) - break; - xfer_status = readl(®s->xfer_status); if (!(xfer_status & SPI_XFER_STS_RDY)) continue; + fifo_status = readl(®s->fifo_status); if (fifo_status & SPI_FIFO_STS_ERR) { debug("%s: got a fifo error: ", __func__); if (fifo_status & SPI_FIFO_STS_TX_FIFO_OVF) @@ -367,7 +360,6 @@ int tegra114_spi_xfer(struct spi_slave *slave, unsigned int bitlen, if (!(fifo_status & SPI_FIFO_STS_RX_FIFO_EMPTY)) { tmpdin = readl(®s->rx_fifo); - is_read = 1; /* swap bytes read in */ if (din != NULL) { @@ -377,6 +369,9 @@ int tegra114_spi_xfer(struct spi_slave *slave, unsigned int bitlen, } din += bytes; } + + /* We can exit when we've had both RX and TX */ + break; } } diff --git a/drivers/tpm/Makefile b/drivers/tpm/Makefile index 2f2353f809..150570ee7e 100644 --- a/drivers/tpm/Makefile +++ b/drivers/tpm/Makefile @@ -8,3 +8,4 @@ obj-$(CONFIG_TPM_ATMEL_TWI) += tpm_atmel_twi.o obj-$(CONFIG_TPM_TIS_I2C) += tpm.o obj-$(CONFIG_TPM_TIS_I2C) += tpm_tis_i2c.o obj-$(CONFIG_TPM_TIS_LPC) += tpm_tis_lpc.o +obj-$(CONFIG_TPM_TIS_SANDBOX) += tpm_tis_sandbox.o diff --git a/drivers/tpm/tpm_tis_sandbox.c b/drivers/tpm/tpm_tis_sandbox.c new file mode 100644 index 0000000000..ed4b039127 --- /dev/null +++ b/drivers/tpm/tpm_tis_sandbox.c @@ -0,0 +1,260 @@ +/* + * Copyright (c) 2013 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/state.h> +#include <asm/unaligned.h> +#include <linux/crc8.h> + +/* TPM NVRAM location indices. */ +#define FIRMWARE_NV_INDEX 0x1007 +#define KERNEL_NV_INDEX 0x1008 + +#define NV_DATA_PUBLIC_PERMISSIONS_OFFSET 60 + +/* Kernel TPM space - KERNEL_NV_INDEX, locked with physical presence */ +#define ROLLBACK_SPACE_KERNEL_VERSION 2 +#define ROLLBACK_SPACE_KERNEL_UID 0x4752574C /* 'GRWL' */ + +struct rollback_space_kernel { + /* Struct version, for backwards compatibility */ + uint8_t struct_version; + /* Unique ID to detect space redefinition */ + uint32_t uid; + /* Kernel versions */ + uint32_t kernel_versions; + /* Reserved for future expansion */ + uint8_t reserved[3]; + /* Checksum (v2 and later only) */ + uint8_t crc8; +} __packed rollback_space_kernel; + +/* + * These numbers derive from adding the sizes of command fields as shown in + * the TPM commands manual. + */ +#define TPM_REQUEST_HEADER_LENGTH 10 +#define TPM_RESPONSE_HEADER_LENGTH 10 + +/* These are the different non-volatile spaces that we emulate */ +enum { + NV_GLOBAL_LOCK, + NV_SEQ_FIRMWARE, + NV_SEQ_KERNEL, + NV_SEQ_COUNT, +}; + +/* Size of each non-volatile space */ +#define NV_DATA_SIZE 0x20 + +/* + * Information about our TPM emulation. This is preserved in the sandbox + * state file if enabled. + */ +static struct tpm_state { + uint8_t nvdata[NV_SEQ_COUNT][NV_DATA_SIZE]; +} state; + +/** + * sandbox_tpm_read_state() - read the sandbox EC state from the state file + * + * If data is available, then blob and node will provide access to it. If + * not this function sets up an empty TPM. + * + * @blob: Pointer to device tree blob, or NULL if no data to read + * @node: Node offset to read from + */ +static int sandbox_tpm_read_state(const void *blob, int node) +{ + const char *prop; + int len; + int i; + + if (!blob) + return 0; + + for (i = 0; i < NV_SEQ_COUNT; i++) { + char prop_name[20]; + + sprintf(prop_name, "nvdata%d", i); + prop = fdt_getprop(blob, node, prop_name, &len); + if (prop && len == NV_DATA_SIZE) + memcpy(state.nvdata[i], prop, NV_DATA_SIZE); + } + + return 0; +} + +/** + * cros_ec_write_state() - Write out our state to the state file + * + * The caller will ensure that there is a node ready for the state. The node + * may already contain the old state, in which case it is overridden. + * + * @blob: Device tree blob holding state + * @node: Node to write our state into + */ +static int sandbox_tpm_write_state(void *blob, int node) +{ + int i; + + /* + * We are guaranteed enough space to write basic properties. + * We could use fdt_add_subnode() to put each set of data in its + * own node - perhaps useful if we add access informaiton to each. + */ + for (i = 0; i < NV_SEQ_COUNT; i++) { + char prop_name[20]; + + sprintf(prop_name, "nvdata%d", i); + fdt_setprop(blob, node, prop_name, state.nvdata[i], + NV_DATA_SIZE); + } + + return 0; +} + +SANDBOX_STATE_IO(sandbox_tpm, "google,sandbox-tpm", sandbox_tpm_read_state, + sandbox_tpm_write_state); + +static int index_to_seq(uint32_t index) +{ + switch (index) { + case FIRMWARE_NV_INDEX: + return NV_SEQ_FIRMWARE; + case KERNEL_NV_INDEX: + return NV_SEQ_KERNEL; + case 0: + return NV_GLOBAL_LOCK; + } + + printf("Invalid nv index %#x\n", index); + return -1; +} + +int tis_sendrecv(const u8 *sendbuf, size_t send_size, + u8 *recvbuf, size_t *recv_len) +{ + struct tpm_state *tpm = &state; + uint32_t code, index, length, type; + uint8_t *data; + int seq; + + code = get_unaligned_be32(sendbuf + sizeof(uint16_t) + + sizeof(uint32_t)); + printf("tpm: %zd bytes, recv_len %zd, cmd = %x\n", send_size, + *recv_len, code); + print_buffer(0, sendbuf, 1, send_size, 0); + switch (code) { + case 0x65: /* get flags */ + type = get_unaligned_be32(sendbuf + 14); + switch (type) { + case 4: + index = get_unaligned_be32(sendbuf + 18); + printf("Get flags index %#02x\n", index); + *recv_len = 22; + memset(recvbuf, '\0', *recv_len); + put_unaligned_be32(22, recvbuf + + TPM_RESPONSE_HEADER_LENGTH); + data = recvbuf + TPM_RESPONSE_HEADER_LENGTH + + sizeof(uint32_t); + switch (index) { + case FIRMWARE_NV_INDEX: + break; + case KERNEL_NV_INDEX: + /* TPM_NV_PER_PPWRITE */ + put_unaligned_be32(1, data + + NV_DATA_PUBLIC_PERMISSIONS_OFFSET); + break; + } + break; + case 0x11: /* TPM_CAP_NV_INDEX */ + index = get_unaligned_be32(sendbuf + 18); + printf("Get cap nv index %#02x\n", index); + put_unaligned_be32(22, recvbuf + + TPM_RESPONSE_HEADER_LENGTH); + break; + default: + printf(" ** Unknown 0x65 command type %#02x\n", + type); + return -1; + } + break; + case 0xcd: /* nvwrite */ + index = get_unaligned_be32(sendbuf + 10); + length = get_unaligned_be32(sendbuf + 18); + seq = index_to_seq(index); + if (seq < 0) + return -1; + printf("tpm: nvwrite index=%#02x, len=%#02x\n", index, length); + memcpy(&tpm->nvdata[seq], sendbuf + 22, length); + *recv_len = 12; + memset(recvbuf, '\0', *recv_len); + break; + case 0xcf: /* nvread */ + index = get_unaligned_be32(sendbuf + 10); + length = get_unaligned_be32(sendbuf + 18); + seq = index_to_seq(index); + if (seq < 0) + return -1; + printf("tpm: nvread index=%#02x, len=%#02x\n", index, length); + *recv_len = TPM_RESPONSE_HEADER_LENGTH + sizeof(uint32_t) + + length; + memset(recvbuf, '\0', *recv_len); + put_unaligned_be32(length, recvbuf + + TPM_RESPONSE_HEADER_LENGTH); + if (seq == NV_SEQ_KERNEL) { + struct rollback_space_kernel rsk; + + data = recvbuf + TPM_RESPONSE_HEADER_LENGTH + + sizeof(uint32_t); + rsk.struct_version = 2; + rsk.uid = ROLLBACK_SPACE_KERNEL_UID; + rsk.kernel_versions = 0; + rsk.crc8 = crc8((unsigned char *)&rsk, + offsetof(struct rollback_space_kernel, + crc8)); + memcpy(data, &rsk, sizeof(rsk)); + } else { + memcpy(recvbuf + TPM_RESPONSE_HEADER_LENGTH + + sizeof(uint32_t), &tpm->nvdata[seq], length); + } + break; + case 0x14: /* tpm extend */ + case 0x15: /* pcr read */ + case 0x5d: /* force clear */ + case 0x6f: /* physical enable */ + case 0x72: /* physical set deactivated */ + case 0x99: /* startup */ + case 0x4000000a: /* assert physical presence */ + *recv_len = 12; + memset(recvbuf, '\0', *recv_len); + break; + default: + printf("Unknown tpm command %02x\n", code); + return -1; + } + + return 0; +} + +int tis_open(void) +{ + printf("%s\n", __func__); + return 0; +} + +int tis_close(void) +{ + printf("%s\n", __func__); + return 0; +} + +int tis_init(void) +{ + printf("%s\n", __func__); + return 0; +} diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile index f52d3f4500..f13b172a66 100644 --- a/drivers/usb/gadget/Makefile +++ b/drivers/usb/gadget/Makefile @@ -5,12 +5,8 @@ # SPDX-License-Identifier: GPL-2.0+ # -# if defined(CONFIG_USB_GADGET) || defined(CONFIG_USB_ETHER) -# Everytime you forget how crufty makefiles can get things like -# this remind you... -ifneq (,$(CONFIG_USB_GADGET)$(CONFIG_USB_ETHER)) -obj-y += epautoconf.o config.o usbstring.o -endif +obj-$(CONFIG_USB_GADGET) += epautoconf.o config.o usbstring.o +obj-$(CONFIG_USB_ETHER) += epautoconf.o config.o usbstring.o # new USB gadget layer dependencies ifdef CONFIG_USB_GADGET diff --git a/drivers/usb/gadget/f_dfu.c b/drivers/usb/gadget/f_dfu.c index 37d04a1928..a045864d73 100644 --- a/drivers/usb/gadget/f_dfu.c +++ b/drivers/usb/gadget/f_dfu.c @@ -40,6 +40,7 @@ struct f_dfu { /* Send/received block number is handy for data integrity check */ int blk_seq_num; + unsigned int poll_timeout; }; typedef int (*dfu_state_fn) (struct f_dfu *, @@ -128,6 +129,33 @@ static struct usb_gadget_strings *dfu_strings[] = { NULL, }; +static void dfu_set_poll_timeout(struct dfu_status *dstat, unsigned int ms) +{ + /* + * The bwPollTimeout DFU_GETSTATUS request payload provides information + * about minimum time, in milliseconds, that the host should wait before + * sending a subsequent DFU_GETSTATUS request + * + * This permits the device to vary the delay depending on its need to + * erase or program the memory + * + */ + + unsigned char *p = (unsigned char *)&ms; + + if (!ms || (ms & ~DFU_POLL_TIMEOUT_MASK)) { + dstat->bwPollTimeout[0] = 0; + dstat->bwPollTimeout[1] = 0; + dstat->bwPollTimeout[2] = 0; + + return; + } + + dstat->bwPollTimeout[0] = *p++; + dstat->bwPollTimeout[1] = *p++; + dstat->bwPollTimeout[2] = *p; +} + /*-------------------------------------------------------------------------*/ static void dnload_request_complete(struct usb_ep *ep, struct usb_request *req) @@ -157,11 +185,15 @@ static void handle_getstatus(struct usb_request *req) break; } + dfu_set_poll_timeout(dstat, 0); + + if (f_dfu->poll_timeout) + if (!(f_dfu->blk_seq_num % + (dfu_get_buf_size() / DFU_USB_BUFSIZ))) + dfu_set_poll_timeout(dstat, f_dfu->poll_timeout); + /* send status response */ dstat->bStatus = f_dfu->dfu_status; - dstat->bwPollTimeout[0] = 0; - dstat->bwPollTimeout[1] = 0; - dstat->bwPollTimeout[2] = 0; dstat->bState = f_dfu->dfu_state; dstat->iString = 0; } @@ -723,8 +755,9 @@ static int dfu_bind_config(struct usb_configuration *c) f_dfu->usb_function.unbind = dfu_unbind; f_dfu->usb_function.set_alt = dfu_set_alt; f_dfu->usb_function.disable = dfu_disable; - f_dfu->usb_function.strings = dfu_generic_strings, - f_dfu->usb_function.setup = dfu_handle, + f_dfu->usb_function.strings = dfu_generic_strings; + f_dfu->usb_function.setup = dfu_handle; + f_dfu->poll_timeout = DFU_DEFAULT_POLL_TIMEOUT; status = usb_add_function(c, &f_dfu->usb_function); if (status) diff --git a/drivers/usb/gadget/f_dfu.h b/drivers/usb/gadget/f_dfu.h index cc2c45567b..0c29954add 100644 --- a/drivers/usb/gadget/f_dfu.h +++ b/drivers/usb/gadget/f_dfu.h @@ -82,4 +82,6 @@ struct dfu_function_descriptor { __le16 wTransferSize; __le16 bcdDFUVersion; } __packed; + +#define DFU_POLL_TIMEOUT_MASK (0xFFFFFFUL) #endif /* __F_DFU_H_ */ diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index 8bd1eb8a99..17187caed4 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -201,6 +201,9 @@ static int ehci_shutdown(struct ehci_ctrl *ctrl) int i, ret = 0; uint32_t cmd, reg; + if (!ctrl || !ctrl->hcor) + return -EINVAL; + cmd = ehci_readl(&ctrl->hcor->or_usbcmd); cmd &= ~(CMD_PSE | CMD_ASE); ehci_writel(&ctrl->hcor->or_usbcmd, cmd); @@ -945,7 +948,7 @@ int usb_lowlevel_init(int index, enum usb_init_type init, void **controller) #endif /* Set the high address word (aka segment) for 64-bit controller */ if (ehci_readl(&ehcic[index].hccr->cr_hccparams) & 1) - ehci_writel(ehcic[index].hcor->or_ctrldssegment, 0); + ehci_writel(&ehcic[index].hcor->or_ctrldssegment, 0); qh_list = &ehcic[index].qh_list; diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c index 7a1ffe5e28..991b19998b 100644 --- a/drivers/usb/host/ehci-pci.c +++ b/drivers/usb/host/ehci-pci.c @@ -54,9 +54,31 @@ static pci_dev_t ehci_find_class(int index) bdf += PCI_BDF(0, 0, 1)) { pci_read_config_dword(bdf, PCI_CLASS_REVISION, &class); - if ((class >> 8 == PCI_CLASS_SERIAL_USB_EHCI) - && !index--) - return bdf; + class >>= 8; + /* + * Here be dragons! In case we have multiple + * PCI EHCI controllers, this function will + * be called multiple times as well. This + * function will scan the PCI busses, always + * starting from bus 0, device 0, function 0, + * until it finds an USB controller. The USB + * stack gives us an 'index' of a controller + * that is currently being registered, which + * is a number, starting from 0 and growing + * in ascending order as controllers are added. + * To avoid probing the same controller in tne + * subsequent runs of this function, we will + * skip 'index - 1' detected controllers and + * report the index'th controller. + */ + if (class != PCI_CLASS_SERIAL_USB_EHCI) + continue; + if (index) { + index--; + continue; + } + /* Return index'th controller. */ + return bdf; } } } diff --git a/drivers/video/ipu_disp.c b/drivers/video/ipu_disp.c index 22ac1429ba..cefd2dc14a 100644 --- a/drivers/video/ipu_disp.c +++ b/drivers/video/ipu_disp.c @@ -889,7 +889,7 @@ int32_t ipu_init_sync_panel(int disp, uint32_t pixel_clk, debug("panel size = %d x %d\n", width, height); if ((v_sync_width == 0) || (h_sync_width == 0)) - return EINVAL; + return -EINVAL; adapt_panel_to_ipu_restricitions(&pixel_clk, width, height, h_start_width, h_end_width, diff --git a/dts/Makefile b/dts/Makefile index 140c8bc5e7..6c7198f65f 100644 --- a/dts/Makefile +++ b/dts/Makefile @@ -10,7 +10,7 @@ ifeq ($(DEVICE_TREE),) $(if $(CONFIG_DEFAULT_DEVICE_TREE),,\ $(error Please define CONFIG_DEFAULT_DEVICE_TREE in your board header file)) -DEVICE_TREE = $(subst ",,$(CONFIG_DEFAULT_DEVICE_TREE)) +DEVICE_TREE = $(CONFIG_DEFAULT_DEVICE_TREE:"%"=%) endif DTS_INCDIRS = $(SRCTREE)/board/$(VENDOR)/$(BOARD)/dts diff --git a/examples/standalone/.gitignore b/examples/standalone/.gitignore index 4d9ce66402..6d3a6166d2 100644 --- a/examples/standalone/.gitignore +++ b/examples/standalone/.gitignore @@ -1,6 +1,4 @@ -/82559_eeprom /atmel_df_pow2 -/eepro100_eeprom /hello_world /interrupt /mem_to_mem_idma2intr diff --git a/examples/standalone/82559_eeprom.c b/examples/standalone/82559_eeprom.c deleted file mode 100644 index c253055c0f..0000000000 --- a/examples/standalone/82559_eeprom.c +++ /dev/null @@ -1,356 +0,0 @@ -/* - * Copyright 1998-2001 by Donald Becker. - * This software may be used and distributed according to the terms of - * the GNU General Public License (GPL), incorporated herein by reference. - * Contact the author for use under other terms. - * - * This program must be compiled with "-O"! - * See the bottom of this file for the suggested compile-command. - * - * The author may be reached as becker@scyld.com, or C/O - * Scyld Computing Corporation - * 410 Severn Ave., Suite 210 - * Annapolis MD 21403 - * - * Common-sense licensing statement: Using any portion of this program in - * your own program means that you must give credit to the original author - * and release the resulting code under the GPL. - */ - -#define _PPC_STRING_H_ /* avoid unnecessary str/mem functions */ - -#include <common.h> -#include <exports.h> -#include <asm/io.h> - - -/* Default EEPROM for i82559 */ -static unsigned short default_eeprom[64] = { - 0x0100, 0x0302, 0x0504, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, - 0xffff, 0xffff, 0x40c0, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, - 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, - 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, - 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, - 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, - 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, - 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff -}; - -static unsigned short eeprom[256]; - -static int eeprom_size = 64; -static int eeprom_addr_size = 6; - -static int debug = 0; - -static inline unsigned short swap16(unsigned short x) -{ - return (((x & 0xff) << 8) | ((x & 0xff00) >> 8)); -} - - -void * memcpy(void * dest,const void *src,size_t count) -{ - char *tmp = (char *) dest, *s = (char *) src; - - while (count--) - *tmp++ = *s++; - - return dest; -} - - -/* The EEPROM commands include the alway-set leading bit. */ -#define EE_WRITE_CMD (5) -#define EE_READ_CMD (6) -#define EE_ERASE_CMD (7) - -/* Serial EEPROM section. */ -#define EE_SHIFT_CLK 0x01 /* EEPROM shift clock. */ -#define EE_CS 0x02 /* EEPROM chip select. */ -#define EE_DATA_WRITE 0x04 /* EEPROM chip data in. */ -#define EE_DATA_READ 0x08 /* EEPROM chip data out. */ -#define EE_ENB (0x4800 | EE_CS) -#define EE_WRITE_0 0x4802 -#define EE_WRITE_1 0x4806 -#define EE_OFFSET 14 - -/* Delay between EEPROM clock transitions. */ -#define eeprom_delay(ee_addr) inw(ee_addr) - -/* Wait for the EEPROM to finish the previous operation. */ -static int eeprom_busy_poll(long ee_ioaddr) -{ - int i; - outw(EE_ENB, ee_ioaddr); - for (i = 0; i < 10000; i++) /* Typical 2000 ticks */ - if (inw(ee_ioaddr) & EE_DATA_READ) - break; - return i; -} - -/* This executes a generic EEPROM command, typically a write or write enable. - It returns the data output from the EEPROM, and thus may also be used for - reads. */ -static int do_eeprom_cmd(long ioaddr, int cmd, int cmd_len) -{ - unsigned retval = 0; - long ee_addr = ioaddr + EE_OFFSET; - - if (debug > 1) - printf(" EEPROM op 0x%x: ", cmd); - - outw(EE_ENB | EE_SHIFT_CLK, ee_addr); - - /* Shift the command bits out. */ - do { - short dataval = (cmd & (1 << cmd_len)) ? EE_WRITE_1 : EE_WRITE_0; - outw(dataval, ee_addr); - eeprom_delay(ee_addr); - if (debug > 2) - printf("%X", inw(ee_addr) & 15); - outw(dataval | EE_SHIFT_CLK, ee_addr); - eeprom_delay(ee_addr); - retval = (retval << 1) | ((inw(ee_addr) & EE_DATA_READ) ? 1 : 0); - } while (--cmd_len >= 0); -#if 0 - outw(EE_ENB, ee_addr); -#endif - /* Terminate the EEPROM access. */ - outw(EE_ENB & ~EE_CS, ee_addr); - if (debug > 1) - printf(" EEPROM result is 0x%5.5x.\n", retval); - return retval; -} - -static int read_eeprom(long ioaddr, int location, int addr_len) -{ - return do_eeprom_cmd(ioaddr, ((EE_READ_CMD << addr_len) | location) - << 16 , 3 + addr_len + 16) & 0xffff; -} - -static void write_eeprom(long ioaddr, int index, int value, int addr_len) -{ - long ee_ioaddr = ioaddr + EE_OFFSET; - int i; - - /* Poll for previous op finished. */ - eeprom_busy_poll(ee_ioaddr); /* Typical 0 ticks */ - /* Enable programming modes. */ - do_eeprom_cmd(ioaddr, (0x4f << (addr_len-4)), 3 + addr_len); - /* Do the actual write. */ - do_eeprom_cmd(ioaddr, - (((EE_WRITE_CMD<<addr_len) | index)<<16) | (value & 0xffff), - 3 + addr_len + 16); - /* Poll for write finished. */ - i = eeprom_busy_poll(ee_ioaddr); /* Typical 2000 ticks */ - if (debug) - printf(" Write finished after %d ticks.\n", i); - /* Disable programming. This command is not instantaneous, so we check - for busy before the next op. */ - do_eeprom_cmd(ioaddr, (0x40 << (addr_len-4)), 3 + addr_len); - eeprom_busy_poll(ee_ioaddr); -} - -static int reset_eeprom(unsigned long ioaddr, unsigned char *hwaddr) -{ - unsigned short checksum = 0; - int size_test; - int i; - - printf("Resetting i82559 EEPROM @ 0x%08lx ... ", ioaddr); - - size_test = do_eeprom_cmd(ioaddr, (EE_READ_CMD << 8) << 16, 27); - eeprom_addr_size = (size_test & 0xffe0000) == 0xffe0000 ? 8 : 6; - eeprom_size = 1 << eeprom_addr_size; - - memcpy(eeprom, default_eeprom, sizeof default_eeprom); - - for (i = 0; i < 3; i++) - eeprom[i] = (hwaddr[i*2+1]<<8) + hwaddr[i*2]; - - /* Recalculate the checksum. */ - for (i = 0; i < eeprom_size - 1; i++) - checksum += eeprom[i]; - eeprom[i] = 0xBABA - checksum; - - for (i = 0; i < eeprom_size; i++) - write_eeprom(ioaddr, i, eeprom[i], eeprom_addr_size); - - for (i = 0; i < eeprom_size; i++) - if (read_eeprom(ioaddr, i, eeprom_addr_size) != eeprom[i]) { - printf("failed\n"); - return 1; - } - - printf("done\n"); - return 0; -} - -static unsigned int hatoi(char *p, char **errp) -{ - unsigned int res = 0; - - while (1) { - switch (*p) { - case 'a': - case 'b': - case 'c': - case 'd': - case 'e': - case 'f': - res |= (*p - 'a' + 10); - break; - case 'A': - case 'B': - case 'C': - case 'D': - case 'E': - case 'F': - res |= (*p - 'A' + 10); - break; - case '0': - case '1': - case '2': - case '3': - case '4': - case '5': - case '6': - case '7': - case '8': - case '9': - res |= (*p - '0'); - break; - default: - if (errp) { - *errp = p; - } - return res; - } - p++; - if (*p == 0) { - break; - } - res <<= 4; - } - - if (errp) { - *errp = NULL; - } - - return res; -} - -static unsigned char *gethwaddr(char *in, unsigned char *out) -{ - char tmp[3]; - int i; - char *err; - - for (i=0;i<6;i++) { - if (in[i*3+2] == 0 && i == 5) { - out[i] = hatoi(&in[i*3], &err); - if (err) { - return NULL; - } - } else if (in[i*3+2] == ':' && i < 5) { - tmp[0] = in[i*3]; - tmp[1] = in[i*3+1]; - tmp[2] = 0; - out[i] = hatoi(tmp, &err); - if (err) { - return NULL; - } - } else { - return NULL; - } - } - - return out; -} - -static u32 -read_config_dword(int bus, int dev, int func, int reg) -{ - u32 res; - - outl(0x80000000|(bus&0xff)<<16|(dev&0x1f)<<11|(func&7)<<8|(reg&0xfc), - 0xcf8); - res = inl(0xcfc); - outl(0, 0xcf8); - return res; -} - -static u16 -read_config_word(int bus, int dev, int func, int reg) -{ - u32 res; - - outl(0x80000000|(bus&0xff)<<16|(dev&0x1f)<<11|(func&7)<<8|(reg&0xfc), - 0xcf8); - res = inw(0xcfc + (reg & 2)); - outl(0, 0xcf8); - return res; -} - -static void -write_config_word(int bus, int dev, int func, int reg, u16 data) -{ - - outl(0x80000000|(bus&0xff)<<16|(dev&0x1f)<<11|(func&7)<<8|(reg&0xfc), - 0xcf8); - outw(data, 0xcfc + (reg & 2)); - outl(0, 0xcf8); -} - - -int main (int argc, char * const argv[]) -{ - unsigned char *eth_addr; - uchar buf[6]; - int instance; - - app_startup(argv); - if (argc != 2) { - printf ("call with base Ethernet address\n"); - return 1; - } - - - eth_addr = gethwaddr(argv[1], buf); - if (NULL == eth_addr) { - printf ("Can not parse ethernet address\n"); - return 1; - } - if (eth_addr[5] & 0x01) { - printf("Base Ethernet address must be even\n"); - } - - - for (instance = 0; instance < 2; instance ++) { - unsigned int io_addr; - unsigned char mac[6]; - int bar1 = read_config_dword(0, 6+instance, 0, 0x14); - if (! (bar1 & 1)) { - printf("ETH%d is disabled %x\n", instance, bar1); - } else { - printf("ETH%d IO=0x%04x\n", instance, bar1 & ~3); - } - io_addr = (bar1 & (~3L)); - - - write_config_word(0, 6+instance, 0, 4, - read_config_word(0, 6+instance, 0, 4) | 1); - printf("ETH%d CMD %04x\n", instance, - read_config_word(0, 6+instance, 0, 4)); - - memcpy(mac, eth_addr, 6); - mac[5] += instance; - - printf("got io=%04x, ha=%02x:%02x:%02x:%02x:%02x:%02x\n", - io_addr, mac[0], mac[1], mac[2], - mac[3], mac[4], mac[5]); - reset_eeprom(io_addr, mac); - } - return 0; -} diff --git a/examples/standalone/Makefile b/examples/standalone/Makefile index f4f102b3e1..0841c758ff 100644 --- a/examples/standalone/Makefile +++ b/examples/standalone/Makefile @@ -7,25 +7,22 @@ include $(TOPDIR)/config.mk -ELF-$(ARCH) := -ELF-$(CPU) := ELF-y := hello_world ELF-$(CONFIG_SMC91111) += smc91111_eeprom ELF-$(CONFIG_SMC911X) += smc911x_eeprom ELF-$(CONFIG_SPI_FLASH_ATMEL) += atmel_df_pow2 -ELF-i386 += 82559_eeprom -ELF-mpc5xxx += interrupt -ELF-mpc8xx += test_burst timer -ELF-mpc8260 += mem_to_mem_idma2intr -ELF-ppc += sched +ELF-$(CONFIG_MPC5xxx) += interrupt +ELF-$(CONFIG_8xx) += test_burst timer +ELF-$(CONFIG_8260) += mem_to_mem_idma2intr +ELF-$(CONFIG_PPC) += sched # # Some versions of make do not handle trailing white spaces properly; # leading to build failures. The problem was found with GNU Make 3.80. # Using 'strip' as a workaround for the problem. # -ELF := $(strip $(ELF-y) $(ELF-$(ARCH)) $(ELF-$(CPU))) +ELF := $(strip $(ELF-y)) SREC := $(addsuffix .srec,$(ELF)) BIN := $(addsuffix .bin,$(ELF)) @@ -34,11 +31,9 @@ COBJS := $(ELF:=.o) LIB = $(obj)libstubs.o -LIBAOBJS-$(ARCH) := -LIBAOBJS-$(CPU) := -LIBAOBJS-ppc += $(ARCH)_longjmp.o $(ARCH)_setjmp.o -LIBAOBJS-mpc8xx += test_burst_lib.o -LIBAOBJS := $(LIBAOBJS-$(ARCH)) $(LIBAOBJS-$(CPU)) +LIBAOBJS-$(CONFIG_PPC) += ppc_longjmp.o ppc_setjmp.o +LIBAOBJS-$(CONFIG_8xx) += test_burst_lib.o +LIBAOBJS := $(LIBAOBJS-y) LIBCOBJS = stubs.o diff --git a/examples/standalone/stubs.c b/examples/standalone/stubs.c index 5d2ab56995..32a19ce354 100644 --- a/examples/standalone/stubs.c +++ b/examples/standalone/stubs.c @@ -39,6 +39,20 @@ gd_t *global_data; " bctr\n" \ : : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x * sizeof(void *)) : "r11"); #elif defined(CONFIG_ARM) +#ifdef CONFIG_ARM64 +/* + * x18 holds the pointer to the global_data, x9 is a call-clobbered + * register + */ +#define EXPORT_FUNC(x) \ + asm volatile ( \ +" .globl " #x "\n" \ +#x ":\n" \ +" ldr x9, [x18, %0]\n" \ +" ldr x9, [x9, %1]\n" \ +" br x9\n" \ + : : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x * sizeof(void *)) : "x9"); +#else /* * r9 holds the pointer to the global_data, ip is a call-clobbered * register @@ -50,6 +64,7 @@ gd_t *global_data; " ldr ip, [r9, %0]\n" \ " ldr pc, [ip, %1]\n" \ : : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x * sizeof(void *)) : "ip"); +#endif #elif defined(CONFIG_MIPS) /* * k0 ($26) holds the pointer to the global_data; t9 ($25) is a call- diff --git a/fs/jffs2/jffs2_1pass.c b/fs/jffs2/jffs2_1pass.c index c856983ef4..3fb5db383e 100644 --- a/fs/jffs2/jffs2_1pass.c +++ b/fs/jffs2/jffs2_1pass.c @@ -114,6 +114,7 @@ #include <common.h> #include <config.h> #include <malloc.h> +#include <div64.h> #include <linux/stat.h> #include <linux/time.h> #include <watchdog.h> @@ -1438,7 +1439,7 @@ jffs2_1pass_build_lists(struct part_info * part) { struct b_lists *pL; struct jffs2_unknown_node *node; - u32 nr_sectors = part->size/part->sector_size; + u32 nr_sectors; u32 i; u32 counter4 = 0; u32 counterF = 0; @@ -1447,6 +1448,7 @@ jffs2_1pass_build_lists(struct part_info * part) u32 buf_size = DEFAULT_EMPTY_SCAN_SIZE; char *buf; + nr_sectors = lldiv(part->size, part->sector_size); /* turn off the lcd. Refreshing the lcd adds 50% overhead to the */ /* jffs2 list building enterprise nope. in newer versions the overhead is */ /* only about 5 %. not enough to inconvenience people for. */ diff --git a/fs/yaffs2/yaffs_uboot_glue.c b/fs/yaffs2/yaffs_uboot_glue.c index e113e4039e..50000a135b 100644 --- a/fs/yaffs2/yaffs_uboot_glue.c +++ b/fs/yaffs2/yaffs_uboot_glue.c @@ -20,6 +20,7 @@ */ #include <common.h> +#include <div64.h> #include <config.h> #include "nand.h" @@ -184,7 +185,7 @@ void cmd_yaffs_devconfig(char *_mp, int flash_dev, } if (end_block == 0) - end_block = mtd->size / mtd->erasesize - 1; + end_block = lldiv(mtd->size, mtd->erasesize - 1); if (end_block < start_block) { printf("Bad start/end\n"); diff --git a/fs/yaffs2/yaffsfs.c b/fs/yaffs2/yaffsfs.c index ac4a010bdf..334598eedf 100644 --- a/fs/yaffs2/yaffsfs.c +++ b/fs/yaffs2/yaffsfs.c @@ -11,6 +11,7 @@ * published by the Free Software Foundation. */ +#include <div64.h> #include "yaffsfs.h" #include "yaffs_guts.h" #include "yaffscfg.h" @@ -1603,8 +1604,8 @@ static int yaffsfs_DoStat(struct yaffs_obj *obj, struct yaffs_stat *buf) buf->st_rdev = obj->yst_rdev; buf->st_size = yaffs_get_obj_length(obj); buf->st_blksize = obj->my_dev->data_bytes_per_chunk; - buf->st_blocks = (buf->st_size + buf->st_blksize - 1) / - buf->st_blksize; + buf->st_blocks = lldiv(buf->st_size + buf->st_blksize - 1, + buf->st_blksize); #if CONFIG_YAFFS_WINCE buf->yst_wince_atime[0] = obj->win_atime[0]; buf->yst_wince_atime[1] = obj->win_atime[1]; diff --git a/include/common.h b/include/common.h index 8ca67f64fa..d49c51464d 100644 --- a/include/common.h +++ b/include/common.h @@ -698,6 +698,10 @@ ulong get_ddr_freq(ulong); #if defined(CONFIG_MPC85xx) typedef MPC85xx_SYS_INFO sys_info_t; void get_sys_info ( sys_info_t * ); +# if defined(CONFIG_OF_LIBFDT) + void ft_fixup_cpu(void *, u64); + void ft_fixup_num_cores(void *); +# endif #endif #if defined(CONFIG_MPC86xx) typedef MPC86xx_SYS_INFO sys_info_t; diff --git a/include/config_defaults.h b/include/config_defaults.h index 567b46c87a..ad08c1d335 100644 --- a/include/config_defaults.h +++ b/include/config_defaults.h @@ -14,6 +14,7 @@ #define CONFIG_BOOTM_NETBSD 1 #define CONFIG_BOOTM_PLAN9 1 #define CONFIG_BOOTM_RTEMS 1 +#define CONFIG_BOOTM_VXWORKS 1 #define CONFIG_GZIP 1 #define CONFIG_ZLIB 1 diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h index 3633b09aa9..d8339b26cc 100644 --- a/include/config_fallbacks.h +++ b/include/config_fallbacks.h @@ -50,7 +50,8 @@ defined(CONFIG_CMD_PART) || \ defined(CONFIG_CMD_GPT) || \ defined(CONFIG_MMC) || \ - defined(CONFIG_SYSTEMACE) + defined(CONFIG_SYSTEMACE) || \ + defined(CONFIG_SANDBOX) #define HAVE_BLOCK_DEVICE #endif diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index b2a5c19e0e..c182158be4 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -289,6 +289,8 @@ unsigned long get_board_ddr_clk(void); /* NAND Flash on IFC */ #define CONFIG_NAND_FSL_IFC +#define CONFIG_SYS_NAND_MAX_ECCPOS 256 +#define CONFIG_SYS_NAND_MAX_OOBFREE 2 #define CONFIG_SYS_NAND_BASE 0xff800000 #ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_NAND_BASE_PHYS (0xf00000000ull | CONFIG_SYS_NAND_BASE) @@ -737,7 +739,6 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h index 499d8c2054..584aba8d0e 100644 --- a/include/configs/BSC9131RDB.h +++ b/include/configs/BSC9131RDB.h @@ -29,7 +29,7 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SPL_NAND_MINIMAL +#define CONFIG_SPL_NAND_BOOT #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" @@ -382,7 +382,6 @@ extern unsigned long get_sdram_size(void); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif #define CONFIG_USB_EHCI diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index a6601fee86..6170cbc81f 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -38,7 +38,7 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SPL_NAND_MINIMAL +#define CONFIG_SPL_NAND_BOOT #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" @@ -625,7 +625,6 @@ combinations. this should be removed later #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/CMS700.h b/include/configs/CMS700.h index 4a5fc864a6..0bb22be9f3 100644 --- a/include/configs/CMS700.h +++ b/include/configs/CMS700.h @@ -149,6 +149,9 @@ #define CONFIG_SYS_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ #define CONFIG_SYS_NAND_QUIET 1 +#define CONFIG_SYS_NAND_MAX_OOBFREE 2 +#define CONFIG_SYS_NAND_MAX_ECCPOS 48 + /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is diff --git a/include/configs/DU440.h b/include/configs/DU440.h index 2d7fc59ea2..71be1224f1 100644 --- a/include/configs/DU440.h +++ b/include/configs/DU440.h @@ -406,7 +406,6 @@ int du440_phy_addr(int devnum); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif #define CONFIG_SOURCE 1 diff --git a/include/configs/EXBITGEN.h b/include/configs/EXBITGEN.h index f366308f45..208b599f6d 100644 --- a/include/configs/EXBITGEN.h +++ b/include/configs/EXBITGEN.h @@ -186,6 +186,5 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif #endif /* __CONFIG_H */ diff --git a/include/configs/JSE.h b/include/configs/JSE.h index 4284d6a3a9..5738ea97ad 100644 --- a/include/configs/JSE.h +++ b/include/configs/JSE.h @@ -274,6 +274,5 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif #endif /* __CONFIG_H */ diff --git a/include/configs/KAREF.h b/include/configs/KAREF.h index 71e90d77d7..39eb2ef133 100644 --- a/include/configs/KAREF.h +++ b/include/configs/KAREF.h @@ -273,7 +273,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port baud */ -#define CONFIG_KGDB_SER_INDEX 2 /* kgdb serial port */ #endif /*----------------------------------------------------------------------- diff --git a/include/configs/METROBOX.h b/include/configs/METROBOX.h index 32ec0bf065..67154353d3 100644 --- a/include/configs/METROBOX.h +++ b/include/configs/METROBOX.h @@ -338,7 +338,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port baud */ -#define CONFIG_KGDB_SER_INDEX 2 /* kgdb serial port */ #endif /*----------------------------------------------------------------------- diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h index f248a56421..6042a1e3c4 100644 --- a/include/configs/MIP405.h +++ b/include/configs/MIP405.h @@ -396,7 +396,6 @@ ************************************************************/ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /************************************************************ diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h index 0f9f436e33..aedb529f86 100644 --- a/include/configs/MPC8315ERDB.h +++ b/include/configs/MPC8315ERDB.h @@ -634,7 +634,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h index a1e5f3b2b2..c4c771b502 100644 --- a/include/configs/MPC8323ERDB.h +++ b/include/configs/MPC8323ERDB.h @@ -481,7 +481,6 @@ #if (CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h index 71fc497e78..f5b62025d6 100644 --- a/include/configs/MPC832XEMDS.h +++ b/include/configs/MPC832XEMDS.h @@ -574,7 +574,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index 037484104f..7640d06ee7 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -737,7 +737,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index e2ae596323..ffb9a158ae 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -730,7 +730,6 @@ boards, we say we have two, but don't display a message if we find only one. */ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h index ed780f17ff..d4c82cd669 100644 --- a/include/configs/MPC8360EMDS.h +++ b/include/configs/MPC8360EMDS.h @@ -683,7 +683,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC8360ERDK.h b/include/configs/MPC8360ERDK.h index d31be19735..01e7ac7681 100644 --- a/include/configs/MPC8360ERDK.h +++ b/include/configs/MPC8360ERDK.h @@ -544,7 +544,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index 98ffb9c29e..f52e77a3a7 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -662,7 +662,6 @@ extern int board_pci_host_broken(void); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index ca28c0eb24..938f7ab3c4 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -678,7 +678,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 9ab1bc106b..9b7cc6474c 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -740,7 +740,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index 046b14bdda..2d42b25121 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -397,7 +397,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index eca3b537b4..b9ad034225 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -410,7 +410,6 @@ extern unsigned long get_clock_freq(void); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 8132ec055b..90fc2da34b 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -441,7 +441,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 6acd54db85..5fff1e2cac 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -535,7 +535,6 @@ extern unsigned long get_clock_freq(void); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index 5ffdd01629..23c6b07c35 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -408,7 +408,6 @@ extern unsigned long get_clock_freq(void); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index bb9ae2dcb5..44b767919e 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -438,7 +438,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index 7406ac3be8..4f438a8075 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -430,7 +430,6 @@ extern unsigned long get_clock_freq(void); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index df5572b3a8..d877e8bbd1 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -566,7 +566,6 @@ extern unsigned long get_clock_freq(void); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 63480ecb0d..44d83a236e 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -682,7 +682,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 41ebe31dd4..f930fcde34 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -517,7 +517,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 0e666bac01..65d61c28d1 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -670,7 +670,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ - #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/MigoR.h b/include/configs/MigoR.h index 9fd4551426..88df94f112 100644 --- a/include/configs/MigoR.h +++ b/include/configs/MigoR.h @@ -10,8 +10,6 @@ #define __MIGO_R_H #undef DEBUG -#define CONFIG_SH 1 -#define CONFIG_SH4 1 #define CONFIG_CPU_SH7722 1 #define CONFIG_MIGO_R 1 diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 1ed5e1df21..ea5cb6501b 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -37,7 +37,7 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SPL_NAND_MINIMAL +#define CONFIG_SPL_NAND_BOOT #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" @@ -739,7 +739,6 @@ extern unsigned long get_sdram_size(void); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 262c3e5f1f..934a6cb7a6 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -75,6 +75,8 @@ #endif #define CONFIG_NAND_FSL_ELBC +#define CONFIG_SYS_NAND_MAX_ECCPOS 56 +#define CONFIG_SYS_NAND_MAX_OOBFREE 5 #ifdef CONFIG_NAND #define CONFIG_SPL @@ -725,7 +727,6 @@ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/P1023RDS.h b/include/configs/P1023RDS.h index 2aa1f59ea7..11c74ff5f5 100644 --- a/include/configs/P1023RDS.h +++ b/include/configs/P1023RDS.h @@ -469,7 +469,6 @@ extern unsigned long get_clock_freq(void); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index b592c1966a..85cb0767ef 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -606,7 +606,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/P2020COME.h b/include/configs/P2020COME.h index 15d2a43cd0..ce3c762559 100644 --- a/include/configs/P2020COME.h +++ b/include/configs/P2020COME.h @@ -432,7 +432,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h index 9d3d9b33e5..ada6c7b871 100644 --- a/include/configs/P2020DS.h +++ b/include/configs/P2020DS.h @@ -670,7 +670,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index b238574b5d..ee71252b00 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -677,7 +677,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h index 1180724862..29888b4e1c 100644 --- a/include/configs/PIP405.h +++ b/include/configs/PIP405.h @@ -353,7 +353,6 @@ ************************************************************/ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /************************************************************ diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h index 5ab9315b1d..efe69601f3 100644 --- a/include/configs/PMC440.h +++ b/include/configs/PMC440.h @@ -492,7 +492,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* pass open firmware flat tree */ diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 43a5778004..7d0bc043f9 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -233,6 +233,7 @@ unsigned long get_board_ddr_clk(void); #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 #define QIXIS_RCFG_CTL_RECONFIG_START 0x21 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 +#define QIXIS_RST_FORCE_MEM 0x01 #define CONFIG_SYS_CSPR3_EXT (0xf) #define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \ @@ -248,7 +249,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0xff) | \ FTIM1_GPCM_TRAD(0x3f)) #define CONFIG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \ - FTIM2_GPCM_TCH(0x0) | \ + FTIM2_GPCM_TCH(0x8) | \ FTIM2_GPCM_TWP(0x1f)) #define CONFIG_SYS_CS3_FTIM3 0x0 @@ -682,7 +683,6 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/T1040RDB.h b/include/configs/T1040RDB.h index 79312311d8..d721139a1f 100644 --- a/include/configs/T1040RDB.h +++ b/include/configs/T1040RDB.h @@ -609,7 +609,6 @@ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/T1042RDB_PI.h b/include/configs/T1042RDB_PI.h index eff08e3804..2c02d9da58 100644 --- a/include/configs/T1042RDB_PI.h +++ b/include/configs/T1042RDB_PI.h @@ -613,7 +613,6 @@ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index fc254256a0..15cf2bd793 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -495,7 +495,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h index 57b620d481..d40185e1e2 100644 --- a/include/configs/VCMA9.h +++ b/include/configs/VCMA9.h @@ -138,8 +138,6 @@ #if defined(CONFIG_CMD_KGDB) /* speed to run kgdb serial port */ #define CONFIG_KGDB_BAUDRATE 115200 -/* what's this ? it's not used anywhere */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* Miscellaneous configurable options */ diff --git a/include/configs/W7OLMC.h b/include/configs/W7OLMC.h index 8fda1b1ea5..00a24ab846 100644 --- a/include/configs/W7OLMC.h +++ b/include/configs/W7OLMC.h @@ -301,7 +301,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/W7OLMG.h b/include/configs/W7OLMG.h index 6836fc7b5f..8ed2fa2d87 100644 --- a/include/configs/W7OLMG.h +++ b/include/configs/W7OLMG.h @@ -304,7 +304,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/ac14xx.h b/include/configs/ac14xx.h index 1205557d88..d6cef888c6 100644 --- a/include/configs/ac14xx.h +++ b/include/configs/ac14xx.h @@ -471,7 +471,6 @@ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/actux1.h b/include/configs/actux1.h index 3315f54f38..9b8bd78943 100644 --- a/include/configs/actux1.h +++ b/include/configs/actux1.h @@ -58,8 +58,6 @@ #if defined(CONFIG_CMD_KGDB) # define CONFIG_KGDB_BAUDRATE 230400 -/* which serial port to use */ -# define CONFIG_KGDB_SER_INDEX 1 #endif /* Miscellaneous configurable options */ diff --git a/include/configs/actux2.h b/include/configs/actux2.h index fb391ecd59..f0cbff79ca 100644 --- a/include/configs/actux2.h +++ b/include/configs/actux2.h @@ -51,8 +51,6 @@ #if defined(CONFIG_CMD_KGDB) # define CONFIG_KGDB_BAUDRATE 230400 -/* which serial port to use */ -# define CONFIG_KGDB_SER_INDEX 1 #endif /* Miscellaneous configurable options */ diff --git a/include/configs/actux3.h b/include/configs/actux3.h index 61d96f5ed0..763910745c 100644 --- a/include/configs/actux3.h +++ b/include/configs/actux3.h @@ -49,8 +49,6 @@ #if defined(CONFIG_CMD_KGDB) # define CONFIG_KGDB_BAUDRATE 230400 -/* which serial port to use */ -# define CONFIG_KGDB_SER_INDEX 1 #endif /* Miscellaneous configurable options */ diff --git a/include/configs/actux4.h b/include/configs/actux4.h index 23872794e3..12bd98a7e1 100644 --- a/include/configs/actux4.h +++ b/include/configs/actux4.h @@ -56,8 +56,6 @@ #if defined(CONFIG_CMD_KGDB) # define CONFIG_KGDB_BAUDRATE 230400 -/* which serial port to use */ -# define CONFIG_KGDB_SER_INDEX 1 #endif /* Miscellaneous configurable options */ diff --git a/include/configs/alpr.h b/include/configs/alpr.h index 61fdebac3f..08bba36095 100644 --- a/include/configs/alpr.h +++ b/include/configs/alpr.h @@ -349,7 +349,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* pass open firmware flat tree */ diff --git a/include/configs/amcc-common.h b/include/configs/amcc-common.h index c9e9a038d4..0f38c92fa0 100644 --- a/include/configs/amcc-common.h +++ b/include/configs/amcc-common.h @@ -125,7 +125,6 @@ */ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port*/ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/ap325rxa.h b/include/configs/ap325rxa.h index 933de52c56..462b2e2910 100644 --- a/include/configs/ap325rxa.h +++ b/include/configs/ap325rxa.h @@ -11,8 +11,6 @@ #define __AP325RXA_H #undef DEBUG -#define CONFIG_SH 1 -#define CONFIG_SH4 1 #define CONFIG_CPU_SH7723 1 #define CONFIG_AP325RXA 1 diff --git a/include/configs/ap_sh4a_4a.h b/include/configs/ap_sh4a_4a.h index 83a5c37e43..bb39491f8b 100644 --- a/include/configs/ap_sh4a_4a.h +++ b/include/configs/ap_sh4a_4a.h @@ -10,9 +10,6 @@ #define __AP_SH4A_4A_H #undef DEBUG -#define CONFIG_SH 1 -#define CONFIG_SH4 1 -#define CONFIG_SH4A 1 #define CONFIG_CPU_SH7734 1 #define CONFIG_AP_SH4A_4A 1 #define CONFIG_400MHZ_MODE 1 diff --git a/include/configs/aria.h b/include/configs/aria.h index 32216cd50e..b8d955abd0 100644 --- a/include/configs/aria.h +++ b/include/configs/aria.h @@ -507,7 +507,6 @@ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/arndale.h b/include/configs/arndale.h index b7fb29ea72..7e367f39b2 100644 --- a/include/configs/arndale.h +++ b/include/configs/arndale.h @@ -85,6 +85,7 @@ #define CONFIG_DWMMC #define CONFIG_EXYNOS_DWMMC #define CONFIG_SUPPORT_EMMC_BOOT +#define CONFIG_BOUNCE_BUFFER #define CONFIG_BOARD_EARLY_INIT_F diff --git a/include/configs/balloon3.h b/include/configs/balloon3.h index d3d62744fa..b41a823600 100644 --- a/include/configs/balloon3.h +++ b/include/configs/balloon3.h @@ -61,7 +61,6 @@ */ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/bf506f-ezkit.h b/include/configs/bf506f-ezkit.h index 5ad3ee70d4..eed2d5bcef 100644 --- a/include/configs/bf506f-ezkit.h +++ b/include/configs/bf506f-ezkit.h @@ -56,6 +56,7 @@ /* * Flash Settings */ + #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_BASE 0x20000000 #define CONFIG_SYS_FLASH_CFI @@ -63,7 +64,9 @@ #define CONFIG_SYS_MAX_FLASH_SECT 71 #define CONFIG_CMD_FLASH #define CONFIG_MONITOR_IS_IN_RAM - +/* +#define CONFIG_SYS_NO_FLASH +*/ /* * SPI Settings @@ -71,11 +74,12 @@ #define CONFIG_BFIN_SPI #define CONFIG_ENV_SPI_MAX_HZ 30000000 #define CONFIG_SF_DEFAULT_SPEED 30000000 +/* #define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_CMD_SF #define CONFIG_CMD_SPI - +*/ /* * Env Storage Settings diff --git a/include/configs/bf561-acvilon.h b/include/configs/bf561-acvilon.h index ee585c0ffd..15ca1af230 100644 --- a/include/configs/bf561-acvilon.h +++ b/include/configs/bf561-acvilon.h @@ -53,7 +53,7 @@ #define CONFIG_EBIU_AMBCTL0_VAL 0xffc2ffc2 #define CONFIG_EBIU_AMBCTL1_VAL 0x99b35554 -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) +#define CONFIG_SYS_MONITOR_LEN (384 * 1024) #define CONFIG_SYS_MALLOC_LEN (128 * 1024) diff --git a/include/configs/bf561-ezkit.h b/include/configs/bf561-ezkit.h index 404039ac23..fb6f94873a 100644 --- a/include/configs/bf561-ezkit.h +++ b/include/configs/bf561-ezkit.h @@ -90,6 +90,7 @@ */ #define CONFIG_SYS_I2C_SOFT #ifdef CONFIG_SYS_I2C_SOFT +#define CONFIG_SYS_I2C #define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF0 #define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF1 #define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */ diff --git a/include/configs/blackvme.h b/include/configs/blackvme.h index cd37f9adb9..6e5774c6ba 100644 --- a/include/configs/blackvme.h +++ b/include/configs/blackvme.h @@ -177,6 +177,7 @@ #define CONFIG_BAUDRATE 57600 #define CONFIG_LOADS_ECHO 1 #define CONFIG_UART_CONSOLE 0 +#define CONFIG_BFIN_SERIAL /* * U-Boot environment variables. Use "printenv" to examine. diff --git a/include/configs/cam_enc_4xx.h b/include/configs/cam_enc_4xx.h index c1042aecbf..8182a7577b 100644 --- a/include/configs/cam_enc_4xx.h +++ b/include/configs/cam_enc_4xx.h @@ -236,6 +236,8 @@ #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 #define CONFIG_SYS_NAND_ECCSIZE 0x200 #define CONFIG_SYS_NAND_ECCBYTES 10 +#define CONFIG_SYS_NAND_MAX_OOBFREE 2 +#define CONFIG_SYS_NAND_MAX_ECCPOS 56 #define CONFIG_SYS_NAND_OOBSIZE 64 #define CONFIG_SYS_NAND_5_ADDR_CYCLE diff --git a/include/configs/cm-bf537e.h b/include/configs/cm-bf537e.h index 8f10eba467..2838012e20 100644 --- a/include/configs/cm-bf537e.h +++ b/include/configs/cm-bf537e.h @@ -55,7 +55,7 @@ #define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3) #define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3) -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) +#define CONFIG_SYS_MONITOR_LEN (768 * 1024) #define CONFIG_SYS_MALLOC_LEN (128 * 1024) @@ -145,7 +145,7 @@ #define FLASHBOOT_ENV_SETTINGS \ "flashboot=flread 20040000 1000000 3c0000;" \ "bootm 0x1000000\0" - +#define CONFIG_BOARD_SIZE_LIMIT $$((384 * 1024)) /* * Pull in common ADI header for remaining command/environment setup diff --git a/include/configs/cm-bf537u.h b/include/configs/cm-bf537u.h index a1c8e8a856..da4cc6718d 100644 --- a/include/configs/cm-bf537u.h +++ b/include/configs/cm-bf537u.h @@ -54,7 +54,7 @@ #define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3) #define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3) -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) +#define CONFIG_SYS_MONITOR_LEN (768 * 1024) #define CONFIG_SYS_MALLOC_LEN (128 * 1024) @@ -142,6 +142,7 @@ #define FLASHBOOT_ENV_SETTINGS \ "flashboot=flread 20040000 1000000 300000;" \ "bootm 0x1000000\0" +#define CONFIG_BOARD_SIZE_LIMIT $$((384 * 1024)) /* diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index 4640c431dc..7729a02ab6 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -316,6 +316,7 @@ /* Display Configuration */ #define CONFIG_OMAP3_GPIO_2 +#define CONFIG_OMAP3_GPIO_5 #define CONFIG_VIDEO_OMAP3 #define LCD_BPP LCD_COLOR16 diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 556b42a38b..d1d732f211 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -204,7 +204,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 115200 -#define CONFIG_KGDB_SER_INDEX 2 #endif /* diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 665295c1a2..969b9903fb 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -672,7 +672,6 @@ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/csb272.h b/include/configs/csb272.h index ca0bffa72e..8a848bea8b 100644 --- a/include/configs/csb272.h +++ b/include/configs/csb272.h @@ -99,7 +99,6 @@ */ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/csb472.h b/include/configs/csb472.h index 596095d21f..5c034175ce 100644 --- a/include/configs/csb472.h +++ b/include/configs/csb472.h @@ -98,7 +98,6 @@ */ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index 48b47cbd0b..f210ed8b92 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -60,6 +60,7 @@ #define CONFIG_SPI_FLASH_SPANSION #define CONFIG_CMD_SF #define CONFIG_CMD_SPI +#define CONFIG_SPI_FLASH_BAR #define CONFIG_TI_SPI_MMAP #define CONFIG_SF_DEFAULT_SPEED 48000000 #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3 diff --git a/include/configs/dvlhost.h b/include/configs/dvlhost.h index 87b3314841..1af7f16989 100644 --- a/include/configs/dvlhost.h +++ b/include/configs/dvlhost.h @@ -57,8 +57,6 @@ #if defined(CONFIG_CMD_KGDB) # define CONFIG_KGDB_BAUDRATE 230400 -/* which serial port to use */ -# define CONFIG_KGDB_SER_INDEX 1 #endif /* Miscellaneous configurable options */ diff --git a/include/configs/ecovec.h b/include/configs/ecovec.h index 3483cf1f58..3a5cc74829 100644 --- a/include/configs/ecovec.h +++ b/include/configs/ecovec.h @@ -23,9 +23,6 @@ */ #undef DEBUG -#define CONFIG_SH 1 -#define CONFIG_SH4 1 -#define CONFIG_SH4A 1 #define CONFIG_CPU_SH7724 1 #define CONFIG_BOARD_LATE_INIT 1 #define CONFIG_ECOVEC 1 diff --git a/include/configs/espt.h b/include/configs/espt.h index 1bd7eeceb9..de16be70b2 100644 --- a/include/configs/espt.h +++ b/include/configs/espt.h @@ -10,8 +10,6 @@ #ifndef __ESPT_H #define __ESPT_H -#define CONFIG_SH 1 -#define CONFIG_SH4 1 #define CONFIG_CPU_SH7763 1 #define CONFIG_ESPT 1 #define __LITTLE_ENDIAN 1 diff --git a/include/configs/exynos5-dt.h b/include/configs/exynos5-dt.h index d684790f8e..414db420dc 100644 --- a/include/configs/exynos5-dt.h +++ b/include/configs/exynos5-dt.h @@ -98,6 +98,7 @@ #define CONFIG_DWMMC #define CONFIG_EXYNOS_DWMMC #define CONFIG_SUPPORT_EMMC_BOOT +#define CONFIG_BOUNCE_BUFFER #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_SKIP_LOWLEVEL_INIT diff --git a/include/configs/ib62x0.h b/include/configs/ib62x0.h index 7fa0c5356c..186fd35fdb 100644 --- a/include/configs/ib62x0.h +++ b/include/configs/ib62x0.h @@ -28,6 +28,11 @@ #define CONFIG_MACH_TYPE MACH_TYPE_NAS6210 /* + * Enable device tree support + */ +#define CONFIG_OF_LIBFDT + +/* * Compression configuration */ #define CONFIG_BZIP2 @@ -41,6 +46,7 @@ #define CONFIG_SYS_MVFS #include <config_cmd_default.h> #define CONFIG_CMD_ENV +#define CONFIG_CMD_BOOTZ #define CONFIG_CMD_IDE #define CONFIG_CMD_MII #define CONFIG_CMD_NAND @@ -66,7 +72,7 @@ #define CONFIG_ENV_IS_NOWHERE #endif #define CONFIG_ENV_SIZE 0x20000 -#define CONFIG_ENV_OFFSET 0x80000 +#define CONFIG_ENV_OFFSET 0xe0000 /* * Default environment variables @@ -74,24 +80,26 @@ #define CONFIG_BOOTCOMMAND \ "setenv bootargs ${console} ${mtdparts} ${bootargs_root}; " \ "ubi part root; " \ - "ubifsmount ubi:root; " \ + "ubifsmount ubi:rootfs; " \ "ubifsload 0x800000 ${kernel}; " \ - "ubifsload 0x1100000 ${initrd}; " \ - "bootm 0x800000 0x1100000" - -#define CONFIG_MTDPARTS \ - "mtdparts=orion_nand:" \ - "0x80000@0x0(uboot)," \ - "0x20000@0x80000(uboot_env)," \ - "-@0xa0000(root)\0" - -#define CONFIG_EXTRA_ENV_SETTINGS \ + "ubifsload 0x700000 ${fdt}; " \ + "ubifsumount; " \ + "fdt addr 0x700000; fdt resize; fdt chosen; " \ + "bootz 0x800000 - 0x700000" + +#define CONFIG_MTDPARTS \ + "mtdparts=orion_nand:" \ + "0xe0000@0x0(uboot)," \ + "0x20000@0xe0000(uboot_env)," \ + "-@0x100000(root)\0" + +#define CONFIG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ "mtdids=nand0=orion_nand\0" \ "mtdparts="CONFIG_MTDPARTS \ - "kernel=/boot/uImage\0" \ - "initrd=/boot/uInitrd\0" \ - "bootargs_root=ubi.mtd=2 root=ubi0:root rootfstype=ubifs\0" + "kernel=/boot/zImage\0" \ + "fdt=/boot/ib62x0.dtb\0" \ + "bootargs_root=ubi.mtd=2 root=ubi0:rootfs rootfstype=ubifs rw\0" /* * Ethernet driver configuration diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index 7700b38c2d..50330ccf6e 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -385,7 +385,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif #define __USB_PHY_TYPE utmi diff --git a/include/configs/km_kirkwood.h b/include/configs/km_kirkwood.h index 0e6073c642..74c72325f6 100644 --- a/include/configs/km_kirkwood.h +++ b/include/configs/km_kirkwood.h @@ -35,6 +35,16 @@ #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ #define CONFIG_KM_FPGA_CONFIG +/* KM_KIRKWOOD_128M16 */ +#elif defined(CONFIG_KM_KIRKWOOD_128M16) +#define CONFIG_IDENT_STRING "\nKeymile Kirkwood 128M16" +#define CONFIG_HOSTNAME km_kirkwood_128m16 +#undef CONFIG_SYS_KWD_CONFIG +#define CONFIG_SYS_KWD_CONFIG \ + $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg +#define CONFIG_KM_DISABLE_PCIE +#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ + /* KM_NUSA */ #elif defined(CONFIG_KM_NUSA) #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ diff --git a/include/configs/korat.h b/include/configs/korat.h index b09af199c8..811ff995e2 100644 --- a/include/configs/korat.h +++ b/include/configs/korat.h @@ -542,7 +542,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* Pass open firmware flat tree */ diff --git a/include/configs/linkstation.h b/include/configs/linkstation.h deleted file mode 100644 index fcd809dfbf..0000000000 --- a/include/configs/linkstation.h +++ /dev/null @@ -1,504 +0,0 @@ -/* - * Copyright (C) 2006 Mihai Georgian <u-boot@linuxnotincluded.org.uk> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * Valid values for CONFIG_SYS_TEXT_BASE are: - * - * Standard configuration - all models - * 0xFFF00000 boot from flash - * - * Test configuration (boot from RAM using uloader.o) - * LinkStation HD-HLAN and KuroBox Standard - * 0x03F00000 boot from RAM - * LinkStation HD-HGLAN and KuroBox HG - * 0x07F00000 boot from RAM - */ -#ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xFFF00000 -#endif - -#if 0 -#define DEBUG -#endif - -#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ - -/*----------------------------------------------------------------------- - * User configurable settings: - * Mandatory settings: - * CONFIG_IPADDR_LS - the IP address of the LinkStation - * CONFIG_SERVERIP_LS - the address of the server for NFS/TFTP/DHCP/BOOTP - * Optional settins: - * CONFIG_NCIP_LS - the adress of the computer running net console - * if not configured, it will be set to - * CONFIG_SERVERIP_LS - */ - - -#define CONFIG_IPADDR_LS 192.168.11.150 -#define CONFIG_SERVERIP_LS 192.168.11.149 - -#if !defined(CONFIG_IPADDR_LS) || !defined(CONFIG_SERVERIP_LS) -#error Both CONFIG_IPADDR_LS and CONFIG_SERVERIP_LS must be defined -#endif - -#if !defined(CONFIG_NCIP_LS) -#define CONFIG_NCIP_LS CONFIG_SERVERIP_LS -#endif - -/*---------------------------------------------------------------------- - * DO NOT CHANGE ANYTHING BELOW, UNLESS YOU KNOW WHAT YOU ARE DOING - *---------------------------------------------------------------------*/ - -#define CONFIG_MPC8245 1 -#define CONFIG_LINKSTATION 1 - -/*--------------------------------------- - * Supported models - * - * LinkStation HDLAN /KuroBox Standard (CONFIG_HLAN) - * LinkStation old model (CONFIG_LAN) - totally untested - * LinkStation HGLAN / KuroBox HG (CONFIG_HGLAN) - * - * Models not supported yet - * TeraStatin (CONFIG_HTGL) - */ - -#if defined(CONFIG_HLAN) || defined(CONFIG_LAN) -#define CONFIG_IDENT_STRING " LinkStation / KuroBox" -#elif defined(CONFIG_HGLAN) -#define CONFIG_IDENT_STRING " LinkStation HG / KuroBox HG" -#elif defined(CONFIG_HTGL) -#define CONFIG_IDENT_STRING " TeraStation" -#else -#error No LinkStation model defined -#endif - -#define CONFIG_BOOTDELAY 5 -#define CONFIG_ZERO_BOOTDELAY_CHECK -#undef CONFIG_BOOT_RETRY_TIME - -#define CONFIG_AUTOBOOT_KEYED -#define CONFIG_AUTOBOOT_PROMPT \ - "Boot in %02d seconds ('s' to stop)...", bootdelay -#define CONFIG_AUTOBOOT_STOP_STR "s" - -#define CONFIG_CMD_IDE -#define CONFIG_CMD_PCI -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_PING -#define CONFIG_CMD_EXT2 - -#define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME -#define CONFIG_BOOTP_NISDOMAIN -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_DNS -#define CONFIG_BOOTP_DNS2 -#define CONFIG_BOOTP_SEND_HOSTNAME -#define CONFIG_BOOTP_NTPSERVER -#define CONFIG_BOOTP_TIMEOFFSET - -#define CONFIG_OF_LIBFDT 1 - -#define OF_STDOUT_PATH "/soc10x/serial@80004600" - -/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ -#include <config_cmd_default.h> - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ - -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 /* Max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ -#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* Default load address: 8 MB */ - -#define CONFIG_BOOTCOMMAND "run bootcmd1" -#define CONFIG_BOOTARGS "root=/dev/sda1 console=ttyS1,57600 netconsole=@192.168.1.7/eth0,@192.168.1.1/00:50:BF:A4:59:71 rtc-rs5c372.probe=0,0x32 debug" -#define CONFIG_NFSBOOTCOMMAND "bootp;run nfsargs;bootm" - -#define CONFIG_SYS_CONSOLE_IS_IN_ENV - -#if defined(CONFIG_HLAN) || defined(CONFIG_LAN) -#define UBFILE "share/u-boot/u-boot-hd.flash.bin" -#elif defined(CONFIG_HGLAN) -#define UBFILE "share/u-boot/u-boot-hg.flash.bin" -#elif defined(CONFIG_HTGL) -#define UBFILE "share/u-boot/u-boot-ht.flash.bin" -#else -#error No LinkStation model defined -#endif - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "autoload=no\0" \ - "stdin=nc\0" \ - "stdout=nc\0" \ - "stderr=nc\0" \ - "ipaddr="__stringify(CONFIG_IPADDR_LS)"\0" \ - "netmask=255.255.255.0\0" \ - "serverip="__stringify(CONFIG_SERVERIP_LS)"\0" \ - "ncip="__stringify(CONFIG_NCIP_LS)"\0" \ - "netretry=no\0" \ - "nc=setenv stdin nc;setenv stdout nc;setenv stderr nc\0" \ - "ser=setenv stdin serial;setenv stdout serial;setenv stderr serial\0" \ - "ldaddr=800000\0" \ - "hdpart=0:1\0" \ - "hdfile=boot/uImage\0" \ - "hdload=echo Loading ${hdpart}:${hdfile};ext2load ide ${hdpart} ${ldaddr} ${hdfile};ext2load ide ${hdpart} 7f0000 boot/kuroboxHG.dtb\0" \ - "boothd=setenv bootargs " CONFIG_BOOTARGS ";bootm ${ldaddr} - 7f0000\0" \ - "hdboot=run hdload;run boothd\0" \ - "flboot=setenv bootargs root=/dev/hda1;bootm ffc00000\0" \ - "emboot=setenv bootargs root=/dev/ram0;bootm ffc00000\0" \ - "nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \ - "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off\0" \ - "bootretry=30\0" \ - "bootcmd1=run hdboot;run flboot\0" \ - "bootcmd2=run flboot\0" \ - "bootcmd3=run emboot\0" \ - "writeng=protect off fff70000 fff7ffff;era fff70000 fff7ffff;mw.l 800000 4e474e47 1;cp.b 800000 fff70000 4\0" \ - "writeok=protect off fff70000 fff7ffff;era fff70000 fff7ffff;mw.l 800000 4f4b4f4b 1;cp.b 800000 fff70000 4\0" \ - "ubpart=0:3\0" \ - "ubfile="UBFILE"\0" \ - "ubload=echo Loading ${ubpart}:${ubfile};ext2load ide ${ubpart} ${ldaddr} ${ubfile}\0" \ - "ubsaddr=fff00000\0" \ - "ubeaddr=fff2ffff\0" \ - "ubflash=protect off ${ubsaddr} ${ubeaddr};era ${ubsaddr} ${ubeaddr};cp.b ${ldaddr} ${ubsaddr} ${filesize};cmp.b ${ldaddr} ${ubsaddr} ${filesize}\0" \ - "upgrade=run ubload ubflash\0" - -/*----------------------------------------------------------------------- - * PCI stuff - */ -#define CONFIG_PCI -#define CONFIG_PCI_INDIRECT_BRIDGE -/* Verified: CONFIG_PCI_PNP doesn't work */ -#undef CONFIG_PCI_PNP -#define CONFIG_PCI_SCAN_SHOW - -#ifndef CONFIG_PCI_PNP -/* Keep the following defines in sync with the BAT mappings */ - -#define PCI_ETH_IOADDR 0xbfff00 -#define PCI_ETH_MEMADDR 0xbffffc00 -#define PCI_IDE_IOADDR 0xbffed0 -#define PCI_IDE_MEMADDR 0xbffffb00 -#define PCI_USB0_IOADDR 0 -#define PCI_USB0_MEMADDR 0xbfffe000 -#define PCI_USB1_IOADDR 0 -#define PCI_USB1_MEMADDR 0xbfffd000 -#define PCI_USB2_IOADDR 0 -#define PCI_USB2_MEMADDR 0xbfffcf00 - -#endif - -/*----------------------------------------------------------------------- - * Ethernet stuff - */ - -#if defined(CONFIG_LAN) || defined(CONFIG_HLAN) -#define CONFIG_TULIP -#define CONFIG_TULIP_USE_IO -#elif defined(CONFIG_HGLAN) || defined(CONFIG_HTGL) -#define CONFIG_RTL8169 -#endif - -#define CONFIG_NET_RETRY_COUNT 5 - -#define CONFIG_NETCONSOLE - -/*----------------------------------------------------------------------- - * Start addresses for the final memory configuration - * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 - */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 - -#define CONFIG_SYS_FLASH_BASE 0xFFC00000 -#define CONFIG_SYS_FLASH_SIZE 0x00400000 -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE - -#define CONFIG_SYS_RESET_ADDRESS 0xFFF00100 -#define CONFIG_SYS_EUMB_ADDR 0x80000000 -#define CONFIG_SYS_PCI_MEM_ADDR 0xB0000000 -#define CONFIG_SYS_MISC_REGION_ADDR 0xFE000000 - -#define CONFIG_SYS_MONITOR_LEN 0x00040000 /* 256 kB */ -#define CONFIG_SYS_MALLOC_LEN (512 << 10) /* Reserve some kB for malloc() */ - -#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00800000 /* 1M ... 8M in DRAM */ - -/* Maximum amount of RAM */ -#if defined(CONFIG_HLAN) || defined(CONFIG_LAN) -#define CONFIG_SYS_MAX_RAM_SIZE 0x04000000 /* 64MB of SDRAM */ -#elif defined(CONFIG_HGLAN) || defined(CONFIG_HTGL) -#define CONFIG_SYS_MAX_RAM_SIZE 0x08000000 /* 128MB of SDRAM */ -#else -#error Unknown LinkStation type -#endif - -/*----------------------------------------------------------------------- - * Change CONFIG_SYS_TEXT_BASE in bord/linkstation/config.mk to get a RAM build - * - * RAM based builds are for testing purposes. A Linux module, uloader.o, - * exists to load U-Boot and pass control to it - * - * Always do "make clean" after changing the build type - */ -#if CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_RAMBOOT -#endif - -/*----------------------------------------------------------------------- - * Definitions for initial stack pointer and data area - */ -#if 1 /* RAM is available when the first C function is called */ -#define CONFIG_SYS_INIT_RAM_ADDR (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_MAX_RAM_SIZE - 0x1000) -#else -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#endif -#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - -/*---------------------------------------------------------------------- - * Serial configuration - */ -#define CONFIG_CONS_INDEX 1 -#define CONFIG_BAUDRATE 57600 - -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL - -#define CONFIG_SYS_NS16550_REG_SIZE 1 - -#define CONFIG_SYS_NS16550_CLK get_bus_freq(0) - -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_EUMB_ADDR + 0x4600) /* Console port */ -#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_EUMB_ADDR + 0x4500) /* AVR port */ - -/* - * Low Level Configuration Settings - * (address mappings, register initial values, etc.) - * You should know what you are doing if you make changes here. - * For the detail description refer to the MPC8245 user's manual. - * - * Unless indicated otherwise, the values are - * taken from the orignal Linkstation boot code - * - * Most of the low level configuration setttings are normally used - * in arch/powerpc/cpu/mpc824x/cpu_init.c which is NOT used by this implementation. - * Low level initialisation is done in board/linkstation/early_init.S - * The values below are included for reference purpose only - */ - -/* FIXME: 32.768 MHz is the crystal frequency but */ -/* the real frequency is lower by about 0.75% */ -#define CONFIG_SYS_CLK_FREQ 32768000 - -/* Bit-field values for MCCR1. */ -#define CONFIG_SYS_ROMNAL 0 -#define CONFIG_SYS_ROMFAL 11 - -#define CONFIG_SYS_BANK0_ROW 2 /* Only bank 0 used: 13 x n x 4 */ -#define CONFIG_SYS_BANK1_ROW 0 -#define CONFIG_SYS_BANK2_ROW 0 -#define CONFIG_SYS_BANK3_ROW 0 -#define CONFIG_SYS_BANK4_ROW 0 -#define CONFIG_SYS_BANK5_ROW 0 -#define CONFIG_SYS_BANK6_ROW 0 -#define CONFIG_SYS_BANK7_ROW 0 - -/* Bit-field values for MCCR2. */ -#define CONFIG_SYS_TSWAIT 0 -#if defined(CONFIG_LAN) || defined(CONFIG_HLAN) -#define CONFIG_SYS_REFINT 0x15e0 -#elif defined(CONFIG_HGLAN) || defined(CONFIG_HTGL) -#define CONFIG_SYS_REFINT 0x1580 -#endif - -/* Burst To Precharge. Bits of this value go to MCCR3 and MCCR4. */ -#define CONFIG_SYS_BSTOPRE 0x91c - -/* Bit-field values for MCCR3. */ -#define CONFIG_SYS_REFREC 7 - -/* Bit-field values for MCCR4. */ -#define CONFIG_SYS_PRETOACT 2 -#define CONFIG_SYS_ACTTOPRE 2 /* Original value was 2 */ -#define CONFIG_SYS_ACTORW 2 -#if defined(CONFIG_LAN) || defined(CONFIG_HLAN) -#define CONFIG_SYS_SDMODE_CAS_LAT 2 /* For 100MHz bus */ -/*#define CONFIG_SYS_SDMODE_BURSTLEN 3*/ -#elif defined(CONFIG_HGLAN) || defined(CONFIG_HTGL) -#define CONFIG_SYS_SDMODE_CAS_LAT 3 /* For 133MHz bus */ -/*#define CONFIG_SYS_SDMODE_BURSTLEN 2*/ -#endif -#define CONFIG_SYS_REGISTERD_TYPE_BUFFER 1 -#define CONFIG_SYS_EXTROM 1 /* Original setting but there is no EXTROM */ -#define CONFIG_SYS_REGDIMM 0 -#define CONFIG_SYS_DBUS_SIZE2 1 -#define CONFIG_SYS_SDMODE_WRAP 0 - -#define CONFIG_SYS_PGMAX 0x32 /* All boards use this setting. Original 0x92 */ -#define CONFIG_SYS_SDRAM_DSCD 0x30 - -/* Memory bank settings. - * Only bits 20-29 are actually used from these vales to set the - * start/end addresses. The upper two bits will always be 0, and the lower - * 20 bits will be 0x00000 for a start address, or 0xfffff for an end - * address. Refer to the MPC8240 book. - */ - -#define CONFIG_SYS_BANK0_START 0x00000000 -#define CONFIG_SYS_BANK0_END (CONFIG_SYS_MAX_RAM_SIZE - 1) -#define CONFIG_SYS_BANK0_ENABLE 1 -#define CONFIG_SYS_BANK1_START 0x3ff00000 -#define CONFIG_SYS_BANK1_END 0x3fffffff -#define CONFIG_SYS_BANK1_ENABLE 0 -#define CONFIG_SYS_BANK2_START 0x3ff00000 -#define CONFIG_SYS_BANK2_END 0x3fffffff -#define CONFIG_SYS_BANK2_ENABLE 0 -#define CONFIG_SYS_BANK3_START 0x3ff00000 -#define CONFIG_SYS_BANK3_END 0x3fffffff -#define CONFIG_SYS_BANK3_ENABLE 0 -#define CONFIG_SYS_BANK4_START 0x3ff00000 -#define CONFIG_SYS_BANK4_END 0x3fffffff -#define CONFIG_SYS_BANK4_ENABLE 0 -#define CONFIG_SYS_BANK5_START 0x3ff00000 -#define CONFIG_SYS_BANK5_END 0x3fffffff -#define CONFIG_SYS_BANK5_ENABLE 0 -#define CONFIG_SYS_BANK6_START 0x3ff00000 -#define CONFIG_SYS_BANK6_END 0x3fffffff -#define CONFIG_SYS_BANK6_ENABLE 0 -#define CONFIG_SYS_BANK7_START 0x3ff00000 -#define CONFIG_SYS_BANK7_END 0x3fffffff -#define CONFIG_SYS_BANK7_ENABLE 0 - -#define CONFIG_SYS_ODCR 0x15 - -/*---------------------------------------------------------------------- - * Initial BAT mappings - */ - -/* NOTES: - * 1) GUARDED and WRITETHROUGH not allowed in IBATS - * 2) CACHEINHIBIT and WRITETHROUGH not allowed together in same BAT - */ - -/* SDRAM */ -#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE) -#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_128M | BATU_VS | BATU_VP) - -#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L -#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U - -/* EUMB: 1MB of address space */ -#define CONFIG_SYS_IBAT1L (CONFIG_SYS_EUMB_ADDR | BATL_PP_10 | BATL_CACHEINHIBIT) -#define CONFIG_SYS_IBAT1U (CONFIG_SYS_EUMB_ADDR | BATU_BL_1M | BATU_VS | BATU_VP) - -#define CONFIG_SYS_DBAT1L (CONFIG_SYS_IBAT1L | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U - -/* PCI Mem: 256MB of address space */ -#define CONFIG_SYS_IBAT2L (CONFIG_SYS_PCI_MEM_ADDR | BATL_PP_10 | BATL_CACHEINHIBIT) -#define CONFIG_SYS_IBAT2U (CONFIG_SYS_PCI_MEM_ADDR | BATU_BL_256M | BATU_VS | BATU_VP) - -#define CONFIG_SYS_DBAT2L (CONFIG_SYS_IBAT2L | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U - -/* PCI and local ROM/Flash: last 32MB of address space */ -#define CONFIG_SYS_IBAT3L (CONFIG_SYS_MISC_REGION_ADDR | BATL_PP_10 | BATL_CACHEINHIBIT) -#define CONFIG_SYS_IBAT3U (CONFIG_SYS_MISC_REGION_ADDR | BATU_BL_32M | BATU_VS | BATU_VP) - -#define CONFIG_SYS_DBAT3L (CONFIG_SYS_IBAT3L | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U - -/* - * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - * - * FIXME: This doesn't appear to be true for the newer kernels - * which map more that 8 MB - */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ - -/*----------------------------------------------------------------------- - * FLASH organization - */ -#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */ -#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */ - -#undef CONFIG_SYS_FLASH_PROTECTION -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max number of flash banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 72 /* Max number of sectors per flash */ - -#define CONFIG_SYS_FLASH_ERASE_TOUT 12000 -#define CONFIG_SYS_FLASH_WRITE_TOUT 1000 - -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */ - -#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ -#define CONFIG_SYS_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */ - -#define CONFIG_ENV_IS_IN_FLASH -/* - * The original LinkStation flash organisation uses - * 448 kB (0xFFF00000 - 0xFFF6FFFF) for the boot loader - * We use the last sector of this area to store the environment - * which leaves max. 384 kB for the U-Boot itself - */ -#define CONFIG_ENV_ADDR 0xFFF60000 -#define CONFIG_ENV_SIZE 0x00010000 -#define CONFIG_ENV_SECT_SIZE 0x00010000 - -/*----------------------------------------------------------------------- - * Cache Configuration - */ -#define CONFIG_SYS_CACHELINE_SIZE 32 -#ifdef CONFIG_CMD_KGDB -#define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */ -#endif - -/*----------------------------------------------------------------------- - * IDE/ATA definitions - */ -#undef CONFIG_IDE_LED /* No IDE LED */ -#define CONFIG_IDE_RESET /* no reset for ide supported */ -#define CONFIG_IDE_PREINIT /* check for units */ -#define CONFIG_LBA48 /* 48 bit LBA supported */ - -#if defined(CONFIG_LAN) || defined(CONFIG_HLAN) || defined(CONFIG_HGLAN) -#define CONFIG_SYS_IDE_MAXBUS 1 /* Scan only 1 IDE bus */ -#define CONFIG_SYS_IDE_MAXDEVICE 1 /* Only 1 drive per IDE bus */ -#elif defined(CONFIG_HGTL) -#define CONFIG_SYS_IDE_MAXBUS 2 /* Max. 2 IDE busses */ -#define CONFIG_SYS_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */ -#else -#error Config IDE: Unknown LinkStation type -#endif - -#define CONFIG_SYS_ATA_BASE_ADDR 0 - -#define CONFIG_SYS_ATA_DATA_OFFSET 0 /* Offset for data I/O */ -#define CONFIG_SYS_ATA_REG_OFFSET 0 /* Offset for normal registers */ -#define CONFIG_SYS_ATA_ALT_OFFSET 0 /* Offset for alternate registers */ - -/*----------------------------------------------------------------------- - * Partitions and file system - */ -#define CONFIG_DOS_PARTITION - -#endif /* __CONFIG_H */ diff --git a/include/configs/lp8x4x.h b/include/configs/lp8x4x.h index 8e58fea3b3..a26937265a 100644 --- a/include/configs/lp8x4x.h +++ b/include/configs/lp8x4x.h @@ -93,7 +93,6 @@ */ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/lubbock.h b/include/configs/lubbock.h index b87df5479d..4ffe165dec 100644 --- a/include/configs/lubbock.h +++ b/include/configs/lubbock.h @@ -86,7 +86,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index c348329cb1..e9c8d8fd55 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -660,7 +660,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/mecp5123.h b/include/configs/mecp5123.h index 6501ea40e1..d415ecdb5a 100644 --- a/include/configs/mecp5123.h +++ b/include/configs/mecp5123.h @@ -364,7 +364,6 @@ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/mpc5121ads.h b/include/configs/mpc5121ads.h index 4a8adf6f33..38337b4564 100644 --- a/include/configs/mpc5121ads.h +++ b/include/configs/mpc5121ads.h @@ -520,7 +520,6 @@ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/mpq101.h b/include/configs/mpq101.h index ec09e15dbf..4cac8ee46a 100644 --- a/include/configs/mpq101.h +++ b/include/configs/mpq101.h @@ -345,7 +345,6 @@ #ifdef CONFIG_CMD_KGDB # define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -# define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/mpr2.h b/include/configs/mpr2.h index fcf237edb9..8ae497c6d5 100644 --- a/include/configs/mpr2.h +++ b/include/configs/mpr2.h @@ -24,8 +24,6 @@ #define CONFIG_VERSION_VARIABLE /* CPU and platform */ -#define CONFIG_SH 1 -#define CONFIG_SH3 1 #define CONFIG_CPU_SH7720 1 #define CONFIG_MPR2 1 diff --git a/include/configs/ms7720se.h b/include/configs/ms7720se.h index ec8523eb95..585d68f208 100644 --- a/include/configs/ms7720se.h +++ b/include/configs/ms7720se.h @@ -9,8 +9,6 @@ #ifndef __MS7720SE_H #define __MS7720SE_H -#define CONFIG_SH 1 -#define CONFIG_SH3 1 #define CONFIG_CPU_SH7720 1 #define CONFIG_MS7720SE 1 diff --git a/include/configs/ms7722se.h b/include/configs/ms7722se.h index 54fb7c3e86..1c8ada6c03 100644 --- a/include/configs/ms7722se.h +++ b/include/configs/ms7722se.h @@ -9,8 +9,6 @@ #ifndef __MS7722SE_H #define __MS7722SE_H -#define CONFIG_SH 1 -#define CONFIG_SH4 1 #define CONFIG_CPU_SH7722 1 #define CONFIG_MS7722SE 1 diff --git a/include/configs/ms7750se.h b/include/configs/ms7750se.h index eea3bd1f2c..4cf8efeca0 100644 --- a/include/configs/ms7750se.h +++ b/include/configs/ms7750se.h @@ -9,8 +9,6 @@ #ifndef __MS7750SE_H #define __MS7750SE_H -#define CONFIG_SH 1 -#define CONFIG_SH4 1 #define CONFIG_CPU_SH7750 1 /* #define CONFIG_CPU_SH7751 1 */ /* #define CONFIG_CPU_TYPE_R 1 */ diff --git a/include/configs/mx1ads.h b/include/configs/mx1ads.h deleted file mode 100644 index c15d54631a..0000000000 --- a/include/configs/mx1ads.h +++ /dev/null @@ -1,165 +0,0 @@ -/* - * include/configs/mx1ads.h - * - * (c) Copyright 2004 - * Techware Information Technology, Inc. - * http://www.techware.com.tw/ - * - * Ming-Len Wu <minglen_wu@techware.com.tw> - * - * This is the Configuration setting for Motorola MX1ADS board - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_ARM920T 1 /* This is an ARM920T Core */ -#define CONFIG_IMX 1 /* It's a Motorola MC9328 SoC */ -#define CONFIG_MX1ADS 1 /* on a Motorola MX1ADS Board */ - -/* - * Select serial console configuration - */ -#define CONFIG_IMX_SERIAL -#define CONFIG_IMX_SERIAL1 /* internal uart 1 */ -/* #define _CONFIG_UART2 */ /* internal uart 2 */ -/* #define CONFIG_SILENT_CONSOLE */ /* use this to disable output */ - -#define CONFIG_BOARD_LATE_INIT -#define USE_920T_MMU 1 - -#if 0 -#define CONFIG_SYS_MX1_GPCR 0x000003AB /* for MX1ADS 0L44N */ -#define CONFIG_SYS_MX1_GPCR 0x000003AB /* for MX1ADS 0L44N */ -#define CONFIG_SYS_MX1_GPCR 0x000003AB /* for MX1ADS 0L44N */ -#endif - -/* - * Size of malloc() pool - */ - -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -/* - * CS8900 Ethernet drivers - */ -#define CONFIG_CS8900 /* we have a CS8900 on-board */ -#define CONFIG_CS8900_BASE 0x15000300 -#define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */ - -/* - * select serial console configuration - */ - -/* #define CONFIG_UART1 */ -/* #define CONFIG_UART2 1 */ - -#define CONFIG_BAUDRATE 115200 - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_REGINFO -#define CONFIG_CMD_ELF - -#define CONFIG_BOOTDELAY 3 -#define CONFIG_BOOTARGS "root=/dev/msdk mem=48M" -#define CONFIG_BOOTFILE "mx1ads" -#define CONFIG_BOOTCOMMAND "tftp; bootm" - -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ - /* what's this ? it's not used anywhere */ -#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ -#endif - -/* - * Miscellaneous configurable options - */ - -#define CONFIG_SYS_HUSH_PARSER 1 - -#define CONFIG_SYS_LONGHELP /* undef to save memory */ - -#ifdef CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT "MX1ADS$ " /* Monitor Command Prompt */ -#else -#define CONFIG_SYS_PROMPT "MX1ADS=> " /* Monitor Command Prompt */ -#endif - -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) - /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START 0x09000000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x0AF00000 /* 63 MB in DRAM */ - -#define CONFIG_SYS_LOAD_ADDR 0x08800000 /* default load address */ -#define CONFIG_SYS_HZ 3686400 -#define CONFIG_SYS_CPUSPEED 0x141 - -/*----------------------------------------------------------------------- - * Physical Memory Map - */ - -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of SDRAM */ -#define PHYS_SDRAM_1 0x08000000 /* SDRAM on CSD0 */ -#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ - -#define CONFIG_SYS_TEXT_BASE 0x10000000 - -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_RAM_ADDR 0x00300000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x000FFFFF -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_GBL_DATA_OFFSET) - -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* 1 bank of SyncFlash */ -#define CONFIG_SYS_FLASH_BASE 0x0C000000 /* SyncFlash on CSD1 */ -#define FLASH_BANK_SIZE 0x01000000 /* 16 MB Total */ - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ - -#define CONFIG_SYNCFLASH 1 -#define PHYS_FLASH_SIZE 0x01000000 -#define CONFIG_SYS_MAX_FLASH_SECT (16) -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+0x00ff8000) - -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_SIZE 0x04000 /* Total Size of Environment Sector */ -#define CONFIG_ENV_SECT_SIZE 0x100000 - -/*----------------------------------------------------------------------- - * Enable passing ATAGS - */ - -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 - -#define CONFIG_SYS_CLK_FREQ 16780000 -#define CONFIG_SYSPLL_CLK_FREQ 16000000 - -#endif /* __CONFIG_H */ diff --git a/include/configs/omap3_zoom2.h b/include/configs/omap3_zoom2.h deleted file mode 100644 index f749740815..0000000000 --- a/include/configs/omap3_zoom2.h +++ /dev/null @@ -1,237 +0,0 @@ -/* - * (C) Copyright 2006-2009 - * Texas Instruments. - * Richard Woodruff <r-woodruff2@ti.com> - * Syed Mohammed Khasim <x0khasim@ti.com> - * Nishanth Menon <nm@ti.com> - * Tom Rix <Tom.Rix@windriver.com> - * - * Configuration settings for the TI OMAP3430 Zoom II board. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - */ -#define CONFIG_OMAP 1 /* in a TI OMAP core */ -#define CONFIG_OMAP34XX 1 /* which is a 34XX */ -#define CONFIG_OMAP3_ZOOM2 1 /* working with Zoom II */ -#define CONFIG_OMAP_GPIO -#define CONFIG_OMAP_COMMON - -#define CONFIG_SDRC /* The chip has SDRC controller */ - -#include <asm/arch/cpu.h> /* get chip and board defs */ -#include <asm/arch/omap3.h> - -/* - * Display CPU and Board information - */ -#define CONFIG_DISPLAY_CPUINFO 1 -#define CONFIG_DISPLAY_BOARDINFO 1 - -/* Clock Defines */ -#define V_OSCK 26000000 /* Clock output from T2 */ -#define V_SCLK (V_OSCK >> 1) - -#define CONFIG_MISC_INIT_R - -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 -#define CONFIG_REVISION_TAG 1 - -#define CONFIG_OF_LIBFDT 1 - -/* - * Size of malloc() pool - */ -#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ - /* Sector */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) -/* - * Hardware drivers - */ - -/* - * NS16550 Configuration - * Zoom2 uses the TL16CP754C on the debug board - */ -/* - * 0 - 1 : first USB with respect to the left edge of the debug board - * 2 - 3 : second USB with respect to the left edge of the debug board - */ -#define ZOOM2_DEFAULT_SERIAL_DEVICE 0 - -#define V_NS16550_CLK (1843200) /* 1.8432 Mhz */ - -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_REG_SIZE (-2) -#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK -#define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE {115200} - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -#define CONFIG_GENERIC_MMC 1 -#define CONFIG_MMC 1 -#define CONFIG_OMAP_HSMMC 1 -#define CONFIG_DOS_PARTITION 1 - -/* Status LED */ -#define CONFIG_STATUS_LED 1 /* Status LED enabled */ -#define CONFIG_BOARD_SPECIFIC_LED 1 -#define STATUS_LED_BLUE 0 -#define STATUS_LED_RED 1 -/* Blue */ -#define STATUS_LED_BIT STATUS_LED_BLUE -#define STATUS_LED_STATE STATUS_LED_ON -#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) -/* Red */ -#define STATUS_LED_BIT1 STATUS_LED_RED -#define STATUS_LED_STATE1 STATUS_LED_OFF -#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2) -/* Optional value */ -#define STATUS_LED_BOOT STATUS_LED_BIT - -/* GPIO banks */ -#ifdef CONFIG_STATUS_LED -#define CONFIG_OMAP3_GPIO_2 /* ZOOM2_LED_BLUE2 */ -#define CONFIG_OMAP3_GPIO_6 /* ZOOM2_LED_RED */ -#endif -#define CONFIG_OMAP3_GPIO_3 /* board revision */ -#define CONFIG_OMAP3_GPIO_5 /* debug board detection, ZOOM2_LED_BLUE */ - -/* USB */ -#define CONFIG_MUSB_UDC 1 -#define CONFIG_USB_OMAP3 1 -#define CONFIG_TWL4030_USB 1 - -/* USB device configuration */ -#define CONFIG_USB_DEVICE 1 -#define CONFIG_USB_TTY 1 -/* Change these to suit your needs */ -#define CONFIG_USBD_VENDORID 0x0451 -#define CONFIG_USBD_PRODUCTID 0x5678 -#define CONFIG_USBD_MANUFACTURER "Texas Instruments" -#define CONFIG_USBD_PRODUCT_NAME "Zoom2" - -/* commands to include */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_FAT /* FAT support */ -#define CONFIG_CMD_I2C /* I2C serial bus support */ -#define CONFIG_CMD_MMC /* MMC support */ -#define CONFIG_CMD_NAND /* NAND support */ -#define CONFIG_CMD_NAND_LOCK_UNLOCK /* Enable lock/unlock support */ - -#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ -#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ -#undef CONFIG_CMD_IMI /* iminfo */ -#undef CONFIG_CMD_IMLS /* List all found images */ -#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ -#undef CONFIG_CMD_NFS /* NFS support */ - -#define CONFIG_SYS_NO_FLASH -#define CONFIG_SYS_I2C -#define CONFIG_SYS_OMAP24_I2C_SPEED 100000 -#define CONFIG_SYS_OMAP24_I2C_SLAVE 1 -#define CONFIG_SYS_I2C_OMAP34XX - -/* - * TWL4030 - */ -#define CONFIG_TWL4030_POWER 1 -#define CONFIG_TWL4030_LED 1 - -/* - * Board NAND Info. - */ -#define CONFIG_NAND_OMAP_GPMC -#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ - /* to access nand */ -#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ - /* to access nand at */ - /* CS0 */ -#define GPMC_NAND_ECC_LP_x16_LAYOUT 1 -#define CONFIG_SYS_MAX_NAND_DEVICE 1 - -/* Environment information */ -#define CONFIG_BOOTDELAY 10 - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "usbtty=cdc_acm\0" \ - -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 -#define CONFIG_SYS_INIT_RAM_SIZE 0x800 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -/* - * Miscellaneous configurable options - */ - -#define CONFIG_SYS_PROMPT "OMAP3 Zoom2 # " -#define CONFIG_SYS_LONGHELP -#define CONFIG_SYS_CBSIZE 512 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) -/* Memtest from start of memory to 31MB */ -#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) -#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + 0x01F00000) -/* The default load address is the start of memory */ -#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) -/* everything, incl board info, in Hz */ -#undef CONFIG_SYS_CLKS_IN_HZ -/* - * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by - * 32KHz clk, or from external sig. This rate is divided by a local divisor. - */ -#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) -#define CONFIG_SYS_PTV 7 /* 2^(PTV+1) */ -#define CONFIG_SYS_HZ ((V_SCLK) / (2 << CONFIG_SYS_PTV)) - -/*----------------------------------------------------------------------- - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ -#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 -#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ - -/* **** PISMO SUPPORT *** */ - -/* Configure the PISMO */ -#define PISMO1_NAND_SIZE GPMC_SIZE_128M -#define PISMO1_ONEN_SIZE GPMC_SIZE_128M - -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ - -#if defined(CONFIG_CMD_NAND) -#define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE -#endif - -/* Monitor at start of flash */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE - -#define CONFIG_ENV_IS_IN_NAND 1 -#define SMNAND_ENV_OFFSET 0x0c0000 /* environment starts here */ - -#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ -#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET -#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET - -#define CONFIG_SYS_CACHELINE_SIZE 64 - -#endif /* __CONFIG_H */ diff --git a/include/configs/omap5912osk.h b/include/configs/omap5912osk.h index c48790d2ae..376dfdb14c 100644 --- a/include/configs/omap5912osk.h +++ b/include/configs/omap5912osk.h @@ -94,7 +94,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ #endif /* diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h index 2f128b8a69..76c5106b45 100644 --- a/include/configs/omap5_uevm.h +++ b/include/configs/omap5_uevm.h @@ -36,6 +36,7 @@ #define CONFIG_EFI_PARTITION #define CONFIG_PARTITION_UUIDS #define CONFIG_CMD_PART +#define CONFIG_HSMMC2_8BIT /* Required support for the TCA642X GPIO we have on the uEVM */ #define CONFIG_TCA642X diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 57ed019952..c6df11b8f1 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -928,7 +928,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/p3p440.h b/include/configs/p3p440.h index 3fde7ca3a3..1fdd602f5b 100644 --- a/include/configs/p3p440.h +++ b/include/configs/p3p440.h @@ -303,6 +303,5 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif #endif /* __CONFIG_H */ diff --git a/include/configs/palmld.h b/include/configs/palmld.h index a5b6e3aa95..2a9fd22dd6 100644 --- a/include/configs/palmld.h +++ b/include/configs/palmld.h @@ -93,7 +93,6 @@ */ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/palmtc.h b/include/configs/palmtc.h index 7303e1c31f..de254076f2 100644 --- a/include/configs/palmtc.h +++ b/include/configs/palmtc.h @@ -95,7 +95,6 @@ */ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/palmtreo680.h b/include/configs/palmtreo680.h index adf85190d1..36626639d3 100644 --- a/include/configs/palmtreo680.h +++ b/include/configs/palmtreo680.h @@ -94,7 +94,6 @@ */ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/pcs440ep.h b/include/configs/pcs440ep.h index 400cb3e826..5a5fe7ff00 100644 --- a/include/configs/pcs440ep.h +++ b/include/configs/pcs440ep.h @@ -427,7 +427,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /*----------------------------------------------------------------------- diff --git a/include/configs/pdm360ng.h b/include/configs/pdm360ng.h index 266d107e44..2a54e5cea0 100644 --- a/include/configs/pdm360ng.h +++ b/include/configs/pdm360ng.h @@ -441,7 +441,6 @@ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* POST support */ diff --git a/include/configs/pxa-common.h b/include/configs/pxa-common.h index 5856ee180b..f0ecc34587 100644 --- a/include/configs/pxa-common.h +++ b/include/configs/pxa-common.h @@ -16,7 +16,6 @@ */ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 -#define CONFIG_KGDB_SER_INDEX 2 #endif /* diff --git a/include/configs/pxa255_idp.h b/include/configs/pxa255_idp.h index 84ad006acd..af7c076df0 100644 --- a/include/configs/pxa255_idp.h +++ b/include/configs/pxa255_idp.h @@ -199,7 +199,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/quad100hd.h b/include/configs/quad100hd.h index 7b04e0c3e3..20d6178dc1 100644 --- a/include/configs/quad100hd.h +++ b/include/configs/quad100hd.h @@ -265,7 +265,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* ENVIRONMENT VARS */ diff --git a/include/configs/r0p7734.h b/include/configs/r0p7734.h index dd26a71bcb..53128ecc12 100644 --- a/include/configs/r0p7734.h +++ b/include/configs/r0p7734.h @@ -10,9 +10,6 @@ #define __R0P7734_H #undef DEBUG -#define CONFIG_SH 1 -#define CONFIG_SH4 1 -#define CONFIG_SH4A 1 #define CONFIG_CPU_SH7734 1 #define CONFIG_R0P7734 1 #define CONFIG_400MHZ_MODE 1 diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index ddcc975874..24d0c34db6 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -3,8 +3,6 @@ #undef DEBUG -#define CONFIG_SH 1 -#define CONFIG_SH4 1 #define CONFIG_CPU_SH7751 1 #define CONFIG_CPU_SH_TYPE_R 1 #define CONFIG_R2DPLUS 1 diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h index f5e4daab8f..8156724f7f 100644 --- a/include/configs/r7780mp.h +++ b/include/configs/r7780mp.h @@ -11,8 +11,6 @@ #define __R7780RP_H #undef DEBUG -#define CONFIG_SH 1 -#define CONFIG_SH4A 1 #define CONFIG_CPU_SH7780 1 #define CONFIG_R7780MP 1 #define CONFIG_SYS_R7780MP_OLD_FLASH 1 diff --git a/include/configs/rsdproto.h b/include/configs/rsdproto.h index f144f84320..92318c3394 100644 --- a/include/configs/rsdproto.h +++ b/include/configs/rsdproto.h @@ -121,7 +121,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/rsk7203.h b/include/configs/rsk7203.h index acee4e8985..5436324580 100644 --- a/include/configs/rsk7203.h +++ b/include/configs/rsk7203.h @@ -11,8 +11,6 @@ #define __RSK7203_H #undef DEBUG -#define CONFIG_SH 1 -#define CONFIG_SH2 1 #define CONFIG_SH2A 1 #define CONFIG_CPU_SH7203 1 #define CONFIG_RSK7203 1 @@ -87,7 +85,7 @@ #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ -#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) +#define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) /* Network interface */ #define CONFIG_SMC911X diff --git a/include/configs/rsk7264.h b/include/configs/rsk7264.h index a5dbb64f48..4aaa3ef74b 100644 --- a/include/configs/rsk7264.h +++ b/include/configs/rsk7264.h @@ -12,8 +12,6 @@ #define __RSK7264_H #undef DEBUG -#define CONFIG_SH 1 -#define CONFIG_SH2 1 #define CONFIG_SH2A 1 #define CONFIG_CPU_SH7264 1 #define CONFIG_RSK7264 1 @@ -67,7 +65,7 @@ #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ -#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) +#define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) /* Network interface */ #define CONFIG_SMC911X diff --git a/include/configs/rsk7269.h b/include/configs/rsk7269.h index 9f54160afb..11fc231fa6 100644 --- a/include/configs/rsk7269.h +++ b/include/configs/rsk7269.h @@ -11,8 +11,6 @@ #define __RSK7269_H #undef DEBUG -#define CONFIG_SH 1 -#define CONFIG_SH2 1 #define CONFIG_SH2A 1 #define CONFIG_CPU_SH7269 1 #define CONFIG_RSK7269 1 @@ -66,7 +64,7 @@ #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ -#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) +#define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) /* Network interface */ #define CONFIG_SMC911X diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index 7e78a231d7..a6d55822b8 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -39,6 +39,9 @@ #define CONFIG_CMD_FAT #define CONFIG_CMD_EXT4 #define CONFIG_CMD_EXT4_WRITE +#define CONFIG_CMD_PART +#define CONFIG_DOS_PARTITION +#define CONFIG_HOST_MAX_DEVICES 4 #define CONFIG_SYS_VSNPRINTF @@ -126,4 +129,6 @@ #define CONFIG_LZO #define CONFIG_LZMA +#define CONFIG_TPM_TIS_SANDBOX + #endif diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index a258fe83dd..b7f83e0105 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -643,7 +643,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index bdb8eb529d..4912d69dcf 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -575,7 +575,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index dba948a5ce..78f8219c5f 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -523,7 +523,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/sh7752evb.h b/include/configs/sh7752evb.h index ebdc5c8b05..f06abbca0c 100644 --- a/include/configs/sh7752evb.h +++ b/include/configs/sh7752evb.h @@ -10,8 +10,6 @@ #define __SH7752EVB_H #undef DEBUG -#define CONFIG_SH 1 -#define CONFIG_SH4A 1 #define CONFIG_SH_32BIT 1 #define CONFIG_CPU_SH7752 1 #define CONFIG_SH7752EVB 1 diff --git a/include/configs/sh7753evb.h b/include/configs/sh7753evb.h new file mode 100644 index 0000000000..e400db08ad --- /dev/null +++ b/include/configs/sh7753evb.h @@ -0,0 +1,135 @@ +/* + * Configuation settings for the sh7753evb board + * + * Copyright (C) 2012 Renesas Solutions Corp. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __SH7753EVB_H +#define __SH7753EVB_H + +#undef DEBUG +#define CONFIG_SH_32BIT 1 +#define CONFIG_CPU_SH7753 1 +#define CONFIG_SH7753EVB 1 + +#define CONFIG_SYS_TEXT_BASE 0x5ff80000 +#define CONFIG_SYS_LDSCRIPT "board/renesas/sh7753evb/u-boot.lds" + +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_NET +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_NFS +#define CONFIG_CMD_DFL +#define CONFIG_CMD_SDRAM +#define CONFIG_CMD_SF +#define CONFIG_CMD_RUN +#define CONFIG_CMD_SAVEENV +#define CONFIG_CMD_MD5SUM +#define CONFIG_MD5 +#define CONFIG_CMD_LOADS +#define CONFIG_CMD_MMC +#define CONFIG_CMD_EXT2 +#define CONFIG_DOS_PARTITION +#define CONFIG_MAC_PARTITION + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTARGS "console=ttySC2,115200 root=/dev/nfs ip=dhcp" + +#define CONFIG_VERSION_VARIABLE +#undef CONFIG_SHOW_BOOT_PROGRESS +#define CONFIG_CMDLINE_EDITING +#define CONFIG_AUTO_COMPLETE + +/* MEMORY */ +#define SH7753EVB_SDRAM_BASE (0x40000000) +#define SH7753EVB_SDRAM_SIZE (512 * 1024 * 1024) + +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_PBSIZE 256 +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_BARGSIZE 512 +#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } + +/* SCIF */ +#define CONFIG_SCIF_CONSOLE 1 +#define CONFIG_CONS_SCIF2 1 +#undef CONFIG_SYS_CONSOLE_INFO_QUIET +#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE + +#define CONFIG_SYS_MEMTEST_START (SH7753EVB_SDRAM_BASE) +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ + 480 * 1024 * 1024) +#undef CONFIG_SYS_ALT_MEMTEST +#undef CONFIG_SYS_MEMTEST_SCRATCH +#undef CONFIG_SYS_LOADS_BAUD_CHANGE + +#define CONFIG_SYS_SDRAM_BASE (SH7753EVB_SDRAM_BASE) +#define CONFIG_SYS_SDRAM_SIZE (SH7753EVB_SDRAM_SIZE) +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \ + 128 * 1024 * 1024) + +#define CONFIG_SYS_MONITOR_BASE 0x00000000 +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) +#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) +#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) + +/* FLASH */ +#define CONFIG_SYS_NO_FLASH + +/* Ether */ +#define CONFIG_SH_ETHER 1 +#define CONFIG_SH_ETHER_USE_PORT 0 +#define CONFIG_SH_ETHER_PHY_ADDR 18 +#define CONFIG_SH_ETHER_CACHE_WRITEBACK 1 +#define CONFIG_SH_ETHER_USE_GETHER 1 +#define CONFIG_PHYLIB +#define CONFIG_BITBANGMII +#define CONFIG_BITBANGMII_MULTI +#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII +#define CONFIG_PHY_VITESSE + +#define SH7753EVB_ETHERNET_MAC_BASE_SPI 0x00090000 +#define SH7753EVB_SPI_SECTOR_SIZE (64 * 1024) +#define SH7753EVB_ETHERNET_MAC_BASE SH7753EVB_ETHERNET_MAC_BASE_SPI +#define SH7753EVB_ETHERNET_MAC_SIZE 17 +#define SH7753EVB_ETHERNET_NUM_CH 2 +#define CONFIG_BOARD_LATE_INIT + +/* SPI */ +#define CONFIG_SH_SPI 1 +#define CONFIG_SH_SPI_BASE 0xfe002000 +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO 1 +#define CONFIG_SPI_FLASH_MACRONIX 1 + +/* MMCIF */ +#define CONFIG_MMC 1 +#define CONFIG_GENERIC_MMC 1 +#define CONFIG_SH_MMCIF 1 +#define CONFIG_SH_MMCIF_ADDR 0xffcb0000 +#define CONFIG_SH_MMCIF_CLK 48000000 + +/* ENV setting */ +#define CONFIG_ENV_IS_EMBEDDED +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_SECT_SIZE (64 * 1024) +#define CONFIG_ENV_ADDR (0x00080000) +#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR) +#define CONFIG_ENV_OVERWRITE 1 +#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) +#define CONFIG_EXTRA_ENV_SETTINGS \ + "netboot=bootp; bootm\0" + +/* Board Clock */ +#define CONFIG_SYS_CLK_FREQ 48000000 +#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ +#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ +#define CONFIG_SYS_TMU_CLK_DIV 4 +#endif /* __SH7753EVB_H */ diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h index ce1add2689..08bff1da3f 100644 --- a/include/configs/sh7757lcr.h +++ b/include/configs/sh7757lcr.h @@ -10,8 +10,6 @@ #define __SH7757LCR_H #undef DEBUG -#define CONFIG_SH 1 -#define CONFIG_SH4A 1 #define CONFIG_SH_32BIT 1 #define CONFIG_CPU_SH7757 1 #define CONFIG_SH7757LCR 1 diff --git a/include/configs/sh7763rdp.h b/include/configs/sh7763rdp.h index a13778830a..2438318fca 100644 --- a/include/configs/sh7763rdp.h +++ b/include/configs/sh7763rdp.h @@ -10,8 +10,6 @@ #ifndef __SH7763RDP_H #define __SH7763RDP_H -#define CONFIG_SH 1 -#define CONFIG_SH4 1 #define CONFIG_CPU_SH7763 1 #define CONFIG_SH7763RDP 1 #define __LITTLE_ENDIAN 1 diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h index 4acbcab1b2..2723eaf2d3 100644 --- a/include/configs/sh7785lcr.h +++ b/include/configs/sh7785lcr.h @@ -10,8 +10,6 @@ #define __SH7785LCR_H #undef DEBUG -#define CONFIG_SH 1 -#define CONFIG_SH4A 1 #define CONFIG_CPU_SH7785 1 #define CONFIG_SH7785LCR 1 diff --git a/include/configs/shmin.h b/include/configs/shmin.h index 5c990fc96d..f8155efbc9 100644 --- a/include/configs/shmin.h +++ b/include/configs/shmin.h @@ -9,8 +9,6 @@ #ifndef __SHMIN_H #define __SHMIN_H -#define CONFIG_SH 1 -#define CONFIG_SH3 1 #define CONFIG_CPU_SH7706 1 /* T-SH7706LAN */ #define CONFIG_SHMIN 1 diff --git a/include/configs/smdk2410.h b/include/configs/smdk2410.h index a87444e0b1..d4ae19f96c 100644 --- a/include/configs/smdk2410.h +++ b/include/configs/smdk2410.h @@ -101,8 +101,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ -/* what's this ? it's not used anywhere */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 0e6b86412d..fd590e4e12 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -363,7 +363,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port*/ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h index ee1f1f3ed0..2a9c9a349c 100644 --- a/include/configs/stxgp3.h +++ b/include/configs/stxgp3.h @@ -341,7 +341,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /*Note: change below for your network setting!!! */ diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h index 63dd767047..d0cb68a0ed 100644 --- a/include/configs/stxssa.h +++ b/include/configs/stxssa.h @@ -376,7 +376,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /*Note: change below for your network setting!!! */ diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h index d9b0ed07d6..54a5e3e260 100644 --- a/include/configs/t4qds.h +++ b/include/configs/t4qds.h @@ -303,7 +303,6 @@ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h index 439fc47eb8..d44b5c036d 100644 --- a/include/configs/tam3517-common.h +++ b/include/configs/tam3517-common.h @@ -224,6 +224,7 @@ #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_CONSOLE #define CONFIG_SPL_NAND_SIMPLE +#define CONFIG_SPL_NAND_SOFTECC #define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */ #define CONFIG_SPL_LIBCOMMON_SUPPORT diff --git a/include/configs/tcm-bf537.h b/include/configs/tcm-bf537.h index 627836a7e8..58bcdc8f47 100644 --- a/include/configs/tcm-bf537.h +++ b/include/configs/tcm-bf537.h @@ -55,7 +55,7 @@ #define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3) #define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3) -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) +#define CONFIG_SYS_MONITOR_LEN (768 * 1024) #define CONFIG_SYS_MALLOC_LEN (128 * 1024) @@ -144,6 +144,7 @@ #define FLASHBOOT_ENV_SETTINGS \ "flashboot=flread 20040000 1000000 300000;" \ "bootm 0x1000000\0" +#define CONFIG_BOARD_SIZE_LIMIT $$((384 * 1024)) /* diff --git a/include/configs/trats.h b/include/configs/trats.h index 08771422ec..6cd15c25bd 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -99,6 +99,7 @@ #define CONFIG_THOR_FUNCTION #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M +#define DFU_DEFAULT_POLL_TIMEOUT 300 #define CONFIG_DFU_FUNCTION #define CONFIG_DFU_MMC diff --git a/include/configs/trizepsiv.h b/include/configs/trizepsiv.h index 0615117773..b7804d2872 100644 --- a/include/configs/trizepsiv.h +++ b/include/configs/trizepsiv.h @@ -125,7 +125,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/twister.h b/include/configs/twister.h index b6ca59c33c..f24dc136ca 100644 --- a/include/configs/twister.h +++ b/include/configs/twister.h @@ -50,4 +50,7 @@ #define CONFIG_SYS_SPL_ARGS_ADDR (PHYS_SDRAM_1 + 0x100) #define CONFIG_SPL_BOARD_INIT +/* gpio 55 is used as SPL_OS_BOOT_KEY */ +#define CONFIG_OMAP3_GPIO_2 + #endif /* __CONFIG_H */ diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h new file mode 100644 index 0000000000..ce5f384776 --- /dev/null +++ b/include/configs/vexpress_aemv8a.h @@ -0,0 +1,189 @@ +/* + * Configuration for Versatile Express. Parts were derived from other ARM + * configurations. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __VEXPRESS_AEMV8A_H +#define __VEXPRESS_AEMV8A_H + +#define DEBUG + +#define CONFIG_REMAKE_ELF + +/*#define CONFIG_ARMV8_SWITCH_TO_EL1*/ + +/*#define CONFIG_SYS_GENERIC_BOARD*/ + +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_SUPPORT_RAW_INITRD + +/* Cache Definitions */ +#define CONFIG_SYS_DCACHE_OFF +#define CONFIG_SYS_ICACHE_OFF + +#define CONFIG_IDENT_STRING " vexpress_aemv8a" +#define CONFIG_BOOTP_VCI_STRING "U-boot.armv8.vexpress_aemv8a" + +/* Link Definitions */ +#define CONFIG_SYS_TEXT_BASE 0x80000000 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) + +/* Flat Device Tree Definitions */ +#define CONFIG_OF_LIBFDT + +#define CONFIG_DEFAULT_DEVICE_TREE vexpress64 + +/* SMP Spin Table Definitions */ +#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) + +/* CS register bases for the original memory map. */ +#define V2M_PA_CS0 0x00000000 +#define V2M_PA_CS1 0x14000000 +#define V2M_PA_CS2 0x18000000 +#define V2M_PA_CS3 0x1c000000 +#define V2M_PA_CS4 0x0c000000 +#define V2M_PA_CS5 0x10000000 + +#define V2M_PERIPH_OFFSET(x) (x << 16) +#define V2M_SYSREGS (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1)) +#define V2M_SYSCTL (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2)) +#define V2M_SERIAL_BUS_PCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3)) + +#define V2M_BASE 0x80000000 + +/* + * Physical addresses, offset from V2M_PA_CS0-3 + */ +#define V2M_NOR0 (V2M_PA_CS0) +#define V2M_NOR1 (V2M_PA_CS4) +#define V2M_SRAM (V2M_PA_CS1) + +/* Common peripherals relative to CS7. */ +#define V2M_AACI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4)) +#define V2M_MMCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5)) +#define V2M_KMI0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6)) +#define V2M_KMI1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7)) + +#define V2M_UART0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9)) +#define V2M_UART1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10)) +#define V2M_UART2 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11)) +#define V2M_UART3 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12)) + +#define V2M_WDT (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15)) + +#define V2M_TIMER01 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(17)) +#define V2M_TIMER23 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(18)) + +#define V2M_SERIAL_BUS_DVI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(22)) +#define V2M_RTC (V2M_PA_CS3 + V2M_PERIPH_OFFSET(23)) + +#define V2M_CF (V2M_PA_CS3 + V2M_PERIPH_OFFSET(26)) + +#define V2M_CLCD (V2M_PA_CS3 + V2M_PERIPH_OFFSET(31)) + +/* System register offsets. */ +#define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0) +#define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4) +#define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8) + +/* Generic Timer Definitions */ +#define COUNTER_FREQUENCY (0x1800000) /* 24MHz */ + +/* Generic Interrupt Controller Definitions */ +#define GICD_BASE (0x2C001000) +#define GICC_BASE (0x2C002000) + +#define CONFIG_SYS_MEMTEST_START V2M_BASE +#define CONFIG_SYS_MEMTEST_END (V2M_BASE + 0x80000000) + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) + +/* SMSC9115 Ethernet from SMSC9118 family */ +#define CONFIG_SMC9111 1 +#define CONFIG_SMC9111_BASE (0x1a000000) + +/* PL011 Serial Configuration */ +#define CONFIG_PL011_SERIAL +#define CONFIG_PL011_CLOCK 24000000 +#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \ + (void *)CONFIG_SYS_SERIAL1} +#define CONFIG_CONS_INDEX 0 + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +#define CONFIG_SYS_SERIAL0 V2M_UART0 +#define CONFIG_SYS_SERIAL1 V2M_UART1 + +/* Command line configuration */ +#define CONFIG_MENU +/*#define CONFIG_MENU_SHOW*/ +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_BDI +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_PXE +#define CONFIG_CMD_ENV +#define CONFIG_CMD_FLASH +#define CONFIG_CMD_IMI +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_CMD_PING +#define CONFIG_CMD_SAVEENV +#define CONFIG_CMD_RUN +#define CONFIG_CMD_BOOTD +#define CONFIG_CMD_ECHO +#define CONFIG_CMD_SOURCE +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION + +/* BOOTP options */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME +#define CONFIG_BOOTP_PXE +#define CONFIG_BOOTP_PXE_CLIENTARCH 0x100 + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x10000000) + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */ +#define PHYS_SDRAM_1_SIZE 0x80000000 /* 2048 MB */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 + +/* Initial environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "kernel_addr=0x200000\0" \ + "initrd_addr=0xa00000\0" \ + "initrd_size=0x2000000\0" \ + "fdt_addr=0x100000\0" \ + "fdt_high=0xa0000000\0" + +#define CONFIG_BOOTARGS "console=ttyAMA0 root=/dev/ram0" +#define CONFIG_BOOTCOMMAND "bootm $kernel_addr " \ + "$initrd_addr:$initrd_size $fdt_addr" +#define CONFIG_BOOTDELAY -1 + +/* Do not preserve environment */ +#define CONFIG_ENV_IS_NOWHERE 1 +#define CONFIG_ENV_SIZE 0x1000 + +/* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PROMPT "VExpress64# " +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_LONGHELP +#define CONFIG_CMDLINE_EDITING 1 +#define CONFIG_SYS_MAXARGS 64 /* max command args */ + +#endif /* __VEXPRESS_AEMV8A_H */ diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h index 734d13f005..7ecbafe2e5 100644 --- a/include/configs/vme8349.h +++ b/include/configs/vme8349.h @@ -539,7 +539,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h index c3ac612a8c..c6d47635b3 100644 --- a/include/configs/vpac270.h +++ b/include/configs/vpac270.h @@ -124,7 +124,6 @@ */ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* @@ -287,7 +286,7 @@ /* * Memory settings */ -#define CONFIG_SYS_MSC0_VAL 0x3ffc95fa +#define CONFIG_SYS_MSC0_VAL 0x3ffc95f9 #define CONFIG_SYS_MSC1_VAL 0x02ccf974 #define CONFIG_SYS_MSC2_VAL 0x00000000 #ifdef CONFIG_RAM_256M diff --git a/include/configs/xaeniax.h b/include/configs/xaeniax.h index 431ed96e29..2999d1b0f5 100644 --- a/include/configs/xaeniax.h +++ b/include/configs/xaeniax.h @@ -84,7 +84,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ #endif /* diff --git a/include/configs/zeus.h b/include/configs/zeus.h index 9d58738ce8..d8aeb3794e 100644 --- a/include/configs/zeus.h +++ b/include/configs/zeus.h @@ -283,7 +283,6 @@ #if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h index 904f3b0fb1..e38fa89fda 100644 --- a/include/configs/zipitz2.h +++ b/include/configs/zipitz2.h @@ -117,7 +117,6 @@ unsigned char zipitz2_spi_read(void); */ #ifdef CONFIG_CMD_KGDB #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif /* diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h new file mode 100644 index 0000000000..e7a8e9fb11 --- /dev/null +++ b/include/configs/zynq-common.h @@ -0,0 +1,238 @@ +/* + * (C) Copyright 2012 Michal Simek <monstr@monstr.eu> + * (C) Copyright 2013 Xilinx, Inc. + * + * Common configuration options for all Zynq boards. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQ_COMMON_H +#define __CONFIG_ZYNQ_COMMON_H + +/* High Level configuration Options */ +#define CONFIG_ARMV7 +#define CONFIG_ZYNQ + +/* CPU clock */ +#ifndef CONFIG_CPU_FREQ_HZ +# define CONFIG_CPU_FREQ_HZ 800000000 +#endif + +/* Cache options */ +#define CONFIG_CMD_CACHE +#define CONFIG_SYS_CACHELINE_SIZE 32 + +#define CONFIG_SYS_L2CACHE_OFF +#ifndef CONFIG_SYS_L2CACHE_OFF +# define CONFIG_SYS_L2_PL310 +# define CONFIG_SYS_PL310_BASE 0xf8f02000 +#endif + +/* Serial drivers */ +#define CONFIG_BAUDRATE 115200 +/* The following table includes the supported baudrates */ +#define CONFIG_SYS_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} + +/* Zynq Serial driver */ +#ifdef CONFIG_ZYNQ_SERIAL_UART0 +# define CONFIG_ZYNQ_SERIAL_BASEADDR0 0xE0000000 +# define CONFIG_ZYNQ_SERIAL_BAUDRATE0 CONFIG_BAUDRATE +# define CONFIG_ZYNQ_SERIAL_CLOCK0 50000000 +#endif + +#ifdef CONFIG_ZYNQ_SERIAL_UART1 +# define CONFIG_ZYNQ_SERIAL_BASEADDR1 0xE0001000 +# define CONFIG_ZYNQ_SERIAL_BAUDRATE1 CONFIG_BAUDRATE +# define CONFIG_ZYNQ_SERIAL_CLOCK1 50000000 +#endif + +#if defined(CONFIG_ZYNQ_SERIAL_UART0) || defined(CONFIG_ZYNQ_SERIAL_UART1) +# define CONFIG_ZYNQ_SERIAL +#endif + +/* DCC driver */ +#if defined(CONFIG_ZYNQ_DCC) +# define CONFIG_ARM_DCC +# define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */ +#endif + +/* Ethernet driver */ +#if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1) +# define CONFIG_NET_MULTI +# define CONFIG_ZYNQ_GEM +# define CONFIG_MII +# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN +# define CONFIG_PHYLIB +# define CONFIG_PHY_MARVELL +#endif + +/* SPI */ +#ifdef CONFIG_ZYNQ_SPI +# define CONFIG_SPI_FLASH +# define CONFIG_SPI_FLASH_SST +# define CONFIG_CMD_SF +#endif + +/* NOR */ +#ifndef CONFIG_SYS_NO_FLASH +# define CONFIG_SYS_FLASH_BASE 0xE2000000 +# define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024) +# define CONFIG_SYS_MAX_FLASH_BANKS 1 +# define CONFIG_SYS_MAX_FLASH_SECT 512 +# define CONFIG_SYS_FLASH_ERASE_TOUT 1000 +# define CONFIG_SYS_FLASH_WRITE_TOUT 5000 +# define CONFIG_FLASH_SHOW_PROGRESS 10 +# define CONFIG_SYS_FLASH_CFI +# undef CONFIG_SYS_FLASH_EMPTY_INFO +# define CONFIG_FLASH_CFI_DRIVER +# undef CONFIG_SYS_FLASH_PROTECTION +# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE +#endif + +/* MMC */ +#if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1) +# define CONFIG_MMC +# define CONFIG_GENERIC_MMC +# define CONFIG_SDHCI +# define CONFIG_ZYNQ_SDHCI +# define CONFIG_CMD_MMC +# define CONFIG_CMD_FAT +# define CONFIG_SUPPORT_VFAT +# define CONFIG_CMD_EXT2 +# define CONFIG_DOS_PARTITION +#endif + +/* I2C */ +#if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1) +# define CONFIG_CMD_I2C +# define CONFIG_SYS_I2C +# define CONFIG_SYS_I2C_ZYNQ +# define CONFIG_SYS_I2C_ZYNQ_SPEED 100000 +# define CONFIG_SYS_I2C_ZYNQ_SLAVE 1 +#endif + +/* EEPROM */ +#ifdef CONFIG_ZYNQ_EEPROM +# define CONFIG_CMD_EEPROM +# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +# define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 +# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 +# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 +# define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */ +#endif + +#define CONFIG_BOOTP_SERVERIP +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME +#define CONFIG_BOOTP_MAY_FAIL + +/* Total Size of Environment Sector */ +#define CONFIG_ENV_SIZE (128 << 10) + +/* Allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +/* Environment */ +#ifndef CONFIG_ENV_IS_NOWHERE +# ifndef CONFIG_SYS_NO_FLASH +# define CONFIG_ENV_IS_IN_FLASH +# elif defined(CONFIG_SYS_NO_FLASH) +# define CONFIG_ENV_IS_NOWHERE +# endif + +# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE +# define CONFIG_ENV_OFFSET 0xE0000 +# define CONFIG_CMD_SAVEENV +#endif + +/* Default environment */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "fit_image=fit.itb\0" \ + "load_addr=0x2000000\0" \ + "fit_size=0x800000\0" \ + "flash_off=0x100000\0" \ + "nor_flash_off=0xE2100000\0" \ + "fdt_high=0x20000000\0" \ + "initrd_high=0x20000000\0" \ + "norboot=echo Copying FIT from NOR flash to RAM... && " \ + "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \ + "bootm ${load_addr}\0" \ + "sdboot=echo Copying FIT from SD to RAM... && " \ + "fatload mmc 0 ${load_addr} ${fit_image} && " \ + "bootm ${load_addr}\0" \ + "jtagboot=echo TFTPing FIT to RAM... && " \ + "tftp ${load_addr} ${fit_image} && " \ + "bootm ${load_addr}\0" +#define CONFIG_BOOTCOMMAND "run $modeboot" +#define CONFIG_BOOTDELAY 3 /* -1 to Disable autoboot */ +#define CONFIG_SYS_LOAD_ADDR 0 /* default? */ + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_PROMPT "zynq-uboot> " +#define CONFIG_SYS_HUSH_PARSER + +#define CONFIG_CMDLINE_EDITING +#define CONFIG_AUTO_COMPLETE +#define CONFIG_BOARD_LATE_INIT +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_MAXARGS 15 /* max number of command args */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) + +/* Physical Memory map */ +#define CONFIG_SYS_TEXT_BASE 0x4000000 + +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0 + +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) + +#define CONFIG_SYS_MALLOC_LEN 0x400000 +#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) + +/* Enable the PL to be downloaded */ +#define CONFIG_FPGA +#define CONFIG_FPGA_XILINX +#define CONFIG_FPGA_ZYNQPL +#define CONFIG_CMD_FPGA + +/* Open Firmware flat tree */ +#define CONFIG_OF_LIBFDT + +/* FIT support */ +#define CONFIG_FIT +#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */ + +/* FDT support */ +#define CONFIG_OF_CONTROL +#define CONFIG_OF_SEPARATE +#define CONFIG_DISPLAY_BOARDINFO_LATE + +/* RSA support */ +#define CONFIG_FIT_SIGNATURE +#define CONFIG_RSA + +/* Boot FreeBSD/vxWorks from an ELF image */ +#if defined(CONFIG_ZYNQ_BOOT_FREEBSD) +# define CONFIG_API +# define CONFIG_CMD_ELF +# define CONFIG_SYS_MMC_MAX_DEVICE 1 +#endif + +/* Commands */ +#include <config_cmd_default.h> + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII + +#endif /* __CONFIG_ZYNQ_COMMON_H */ diff --git a/include/configs/zynq.h b/include/configs/zynq.h deleted file mode 100644 index 82ec826f73..0000000000 --- a/include/configs/zynq.h +++ /dev/null @@ -1,139 +0,0 @@ -/* - * (C) Copyright 2012 Michal Simek <monstr@monstr.eu> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_ZYNQ_H -#define __CONFIG_ZYNQ_H - -#define CONFIG_ARMV7 /* This is an ARM V7 CPU core */ -#define CONFIG_ZYNQ - -/* CPU clock */ -#define CONFIG_CPU_FREQ_HZ 800000000 - -/* Ram */ -#define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_SYS_TEXT_BASE 0 -#define CONFIG_SYS_SDRAM_BASE 0 -#define CONFIG_SYS_SDRAM_SIZE 0x40000000 -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) - -/* The following table includes the supported baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} - -#define CONFIG_BAUDRATE 115200 - -/* XPSS Serial driver */ -#define CONFIG_ZYNQ_SERIAL -#define CONFIG_ZYNQ_SERIAL_BASEADDR0 0xE0001000 -#define CONFIG_ZYNQ_SERIAL_BAUDRATE0 CONFIG_BAUDRATE -#define CONFIG_ZYNQ_SERIAL_CLOCK0 50000000 - -/* Ethernet driver */ -#define CONFIG_NET_MULTI -#define CONFIG_ZYNQ_GEM -#define CONFIG_ZYNQ_GEM0 -#define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 - -#define CONFIG_ZYNQ_SDHCI -#define CONFIG_ZYNQ_SDHCI0 - -/* MMC */ -#if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1) -# define CONFIG_MMC -# define CONFIG_GENERIC_MMC -# define CONFIG_SDHCI -# define CONFIG_ZYNQ_SDHCI -# define CONFIG_CMD_MMC -# define CONFIG_CMD_FAT -# define CONFIG_SUPPORT_VFAT -# define CONFIG_CMD_EXT2 -# define CONFIG_DOS_PARTITION -#endif - -#define CONFIG_ZYNQ_I2C0 - -/* I2C */ -#if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1) -# define CONFIG_CMD_I2C -# define CONFIG_SYS_I2C -# define CONFIG_SYS_I2C_ZYNQ -# define CONFIG_SYS_I2C_ZYNQ_SPEED 100000 -# define CONFIG_SYS_I2C_ZYNQ_SLAVE 1 -#endif - -#if defined(CONFIG_ZYNQ_DCC) -# define CONFIG_ARM_DCC -# define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */ -#endif - -#define CONFIG_ZYNQ_SPI - -/* SPI */ -#ifdef CONFIG_ZYNQ_SPI -# define CONFIG_SPI_FLASH -# define CONFIG_SPI_FLASH_SST -# define CONFIG_CMD_SF -#endif - -/* Enable the PL to be downloaded */ -#define CONFIG_FPGA -#define CONFIG_FPGA_XILINX -#define CONFIG_FPGA_ZYNQPL -#define CONFIG_CMD_FPGA - -#define CONFIG_BOOTP_SERVERIP -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME -#define CONFIG_BOOTP_MAY_FAIL - -/* MII and Phylib */ -#define CONFIG_MII -#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -#define CONFIG_PHYLIB -#define CONFIG_PHY_MARVELL - -/* Environment */ -#define CONFIG_ENV_IS_NOWHERE -#define CONFIG_ENV_SIZE 0x10000 - -#define CONFIG_SYS_NO_FLASH - -#define CONFIG_SYS_MALLOC_LEN 0x400000 -#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) - -#define CONFIG_SYS_PROMPT "U-Boot> " -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) - -#define CONFIG_SYS_LOAD_ADDR 0 -#define CONFIG_SYS_MAXARGS 15 /* max number of command args */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING - -#define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " - -/* OF */ -#define CONFIG_FIT -#define CONFIG_OF_LIBFDT - -/* Commands */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_PING -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_MII - -#endif /* __CONFIG_ZYNQ_H */ diff --git a/include/configs/zynq_microzed.h b/include/configs/zynq_microzed.h new file mode 100644 index 0000000000..b0328a2cc1 --- /dev/null +++ b/include/configs/zynq_microzed.h @@ -0,0 +1,26 @@ +/* + * (C) Copyright 2013 Xilinx, Inc. + * + * Configuration for Micro Zynq Evaluation and Development Board - MicroZedBoard + * See zynq-common.h for Zynq common configs + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQ_MICROZED_H +#define __CONFIG_ZYNQ_MICROZED_H + +#define CONFIG_SYS_SDRAM_SIZE (1024 * 1024 * 1024) + +#define CONFIG_ZYNQ_SERIAL_UART1 +#define CONFIG_ZYNQ_GEM0 +#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0 + +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ZYNQ_SDHCI0 +#define CONFIG_DEFAULT_DEVICE_TREE zynq-microzed + +#include <configs/zynq-common.h> + +#endif /* __CONFIG_ZYNQ_MICROZED_H */ diff --git a/include/configs/zynq_zc70x.h b/include/configs/zynq_zc70x.h new file mode 100644 index 0000000000..673660e659 --- /dev/null +++ b/include/configs/zynq_zc70x.h @@ -0,0 +1,29 @@ +/* + * (C) Copyright 2013 Xilinx, Inc. + * + * Configuration settings for the Xilinx Zynq ZC702 and ZC706 boards + * See zynq_common.h for Zynq common configs + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQ_ZC70X_H +#define __CONFIG_ZYNQ_ZC70X_H + +#define CONFIG_SYS_SDRAM_SIZE (1024 * 1024 * 1024) + +#define CONFIG_ZYNQ_SERIAL_UART1 +#define CONFIG_ZYNQ_GEM0 +#define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 + +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ZYNQ_SDHCI0 +#define CONFIG_ZYNQ_I2C0 +#define CONFIG_ZYNQ_EEPROM +#define CONFIG_ZYNQ_BOOT_FREEBSD +#define CONFIG_DEFAULT_DEVICE_TREE zynq-zc702 + +#include <configs/zynq-common.h> + +#endif /* __CONFIG_ZYNQ_ZC70X_H */ diff --git a/include/configs/zynq_zc770.h b/include/configs/zynq_zc770.h new file mode 100644 index 0000000000..8aa96e7121 --- /dev/null +++ b/include/configs/zynq_zc770.h @@ -0,0 +1,42 @@ +/* + * (C) Copyright 2013 Xilinx, Inc. + * + * Configuration settings for the Xilinx Zynq ZC770 board. + * See zynq-common.h for Zynq common configs + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQ_ZC770_H +#define __CONFIG_ZYNQ_ZC770_H + +#define CONFIG_SYS_SDRAM_SIZE (1024 * 1024 * 1024) + +#define CONFIG_SYS_NO_FLASH + +#if defined(CONFIG_ZC770_XM010) +# define CONFIG_ZYNQ_SERIAL_UART1 +# define CONFIG_ZYNQ_GEM0 +# define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 +# define CONFIG_ZYNQ_SDHCI0 +# define CONFIG_ZYNQ_SPI +# define CONFIG_DEFAULT_DEVICE_TREE zynq-zc770-xm010 + +#elif defined(CONFIG_ZC770_XM012) +# define CONFIG_ZYNQ_SERIAL_UART1 +# undef CONFIG_SYS_NO_FLASH +# define CONFIG_DEFAULT_DEVICE_TREE zynq-zc770-xm012 + +#elif defined(CONFIG_ZC770_XM013) +# define CONFIG_ZYNQ_SERIAL_UART0 +# define CONFIG_ZYNQ_GEM1 +# define CONFIG_ZYNQ_GEM_PHY_ADDR1 7 +# define CONFIG_DEFAULT_DEVICE_TREE zynq-zc770-xm013 + +#else +# define CONFIG_ZYNQ_SERIAL_UART0 +#endif + +#include <configs/zynq-common.h> + +#endif /* __CONFIG_ZYNQ_ZC770_H */ diff --git a/include/configs/zynq_zed.h b/include/configs/zynq_zed.h new file mode 100644 index 0000000000..412dede533 --- /dev/null +++ b/include/configs/zynq_zed.h @@ -0,0 +1,27 @@ +/* + * (C) Copyright 2013 Xilinx, Inc. + * + * Configuration for Zynq Evaluation and Development Board - ZedBoard + * See zynq_common.h for Zynq common configs + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQ_ZED_H +#define __CONFIG_ZYNQ_ZED_H + +#define CONFIG_SYS_SDRAM_SIZE (512 * 1024 * 1024) + +#define CONFIG_ZYNQ_SERIAL_UART1 +#define CONFIG_ZYNQ_GEM0 +#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0 + +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ZYNQ_SDHCI0 +#define CONFIG_ZYNQ_BOOT_FREEBSD +#define CONFIG_DEFAULT_DEVICE_TREE zynq-zed + +#include <configs/zynq-common.h> + +#endif /* __CONFIG_ZYNQ_ZED_H */ diff --git a/include/dfu.h b/include/dfu.h index cc14044927..f973426aa9 100644 --- a/include/dfu.h +++ b/include/dfu.h @@ -77,6 +77,9 @@ static inline unsigned int get_mmc_blk_size(int dev) #ifndef CONFIG_SYS_DFU_MAX_FILE_SIZE #define CONFIG_SYS_DFU_MAX_FILE_SIZE CONFIG_SYS_DFU_DATA_BUF_SIZE #endif +#ifndef DFU_DEFAULT_POLL_TIMEOUT +#define DFU_DEFAULT_POLL_TIMEOUT 0 +#endif struct dfu_entity { char name[DFU_NAME_SIZE]; @@ -131,6 +134,7 @@ bool dfu_reset(void); int dfu_init_env_entities(char *interface, int dev); unsigned char *dfu_get_buf(void); unsigned char *dfu_free_buf(void); +unsigned long dfu_get_buf_size(void); int dfu_read(struct dfu_entity *de, void *buf, int size, int blk_seq_num); int dfu_write(struct dfu_entity *de, void *buf, int size, int blk_seq_num); diff --git a/include/image.h b/include/image.h index ee6eb8d246..7de2bb2f81 100644 --- a/include/image.h +++ b/include/image.h @@ -156,6 +156,7 @@ struct lmb; #define IH_ARCH_SANDBOX 19 /* Sandbox architecture (test only) */ #define IH_ARCH_NDS32 20 /* ANDES Technology - NDS32 */ #define IH_ARCH_OPENRISC 21 /* OpenRISC 1000 */ +#define IH_ARCH_ARM64 22 /* ARM64 */ /* * Image Types diff --git a/include/linux/crc8.h b/include/linux/crc8.h new file mode 100644 index 0000000000..b5fd2ac9d6 --- /dev/null +++ b/include/linux/crc8.h @@ -0,0 +1,23 @@ +/* + * Copyright (c) 2013 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + + +#ifndef __linux_crc8_h +#define __linux_crc8_h + +/** + * crc8() - Calculate and return CRC-8 of the data + * + * This uses an x^8 + x^2 + x + 1 polynomial. A table-based algorithm would + * be faster, but for only a few bytes it isn't worth the code size + * + * @vptr: Buffer to checksum + * @len: Length of buffer in bytes + * @return CRC8 checksum + */ +unsigned int crc8(const unsigned char *vptr, int len); + +#endif diff --git a/include/linux/linkage.h b/include/linux/linkage.h index 39c712eac5..7435fcd026 100644 --- a/include/linux/linkage.h +++ b/include/linux/linkage.h @@ -48,6 +48,10 @@ .globl SYMBOL_NAME(name); \ LENTRY(name) +#define WEAK(name) \ + .weak SYMBOL_NAME(name); \ + LENTRY(name) + #ifndef END #define END(name) \ .size name, .-name diff --git a/include/mmc.h b/include/mmc.h index cb558da63d..e1060b9ff2 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -262,6 +262,8 @@ struct mmc { uint card_caps; uint host_caps; uint ocr; + uint dsr; + uint dsr_imp; uint scr[2]; uint csd[4]; uint cid[4]; @@ -304,7 +306,7 @@ int board_mmc_getcd(struct mmc *mmc); int mmc_switch_part(int dev_num, unsigned int part_num); int mmc_getcd(struct mmc *mmc); int mmc_getwp(struct mmc *mmc); -void spl_mmc_load(void) __noreturn; +int mmc_set_dsr(struct mmc *mmc, u16 val); /* Function to change the size of boot partition and rpmb partitions */ int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize, unsigned long rpmbsize); diff --git a/include/os.h b/include/os.h index 950433daa3..b65fba4301 100644 --- a/include/os.h +++ b/include/os.h @@ -107,6 +107,35 @@ void os_tty_raw(int fd); void *os_malloc(size_t length); /** + * Free memory previous allocated with os_malloc()/os_realloc() + * + * This returns the memory to the OS. + * + * \param ptr Pointer to memory block to free + */ +void *os_free(void *ptr); + +/** + * Reallocate previously-allocated memory to increase/decrease space + * + * This works in a similar way to the C library realloc() function. If + * length is 0, then ptr is freed. Otherwise the space used by ptr is + * expanded or reduced depending on whether length is larger or smaller + * than before. + * + * If ptr is NULL, then this is similar to calling os_malloc(). + * + * This function may need to move the memory block to make room for any + * extra space, in which case the new pointer is returned. + * + * \param ptr Pointer to memory block to reallocate + * \param length New length for memory block + * \return pointer to new memory block, or NULL on failure or if length + * is 0. + */ +void *os_realloc(void *ptr, size_t length); + +/** * Access to the usleep function of the os * * \param usec Time to sleep in micro seconds @@ -180,4 +209,40 @@ const char *os_dirent_get_typename(enum os_dirent_t type); */ ssize_t os_get_filesize(const char *fname); +/** + * Write a character to the controlling OS terminal + * + * This bypasses the U-Boot console support and writes directly to the OS + * stdout file descriptor. + * + * @param ch Character to write + */ +void os_putc(int ch); + +/** + * Write a string to the controlling OS terminal + * + * This bypasses the U-Boot console support and writes directly to the OS + * stdout file descriptor. + * + * @param str String to write (note that \n is not appended) + */ +void os_puts(const char *str); + +/** + * Write the sandbox RAM buffer to a existing file + * + * @param fname Filename to write memory to (simple binary format) + * @return 0 if OK, -ve on error + */ +int os_write_ram_buf(const char *fname); + +/** + * Read the sandbox RAM buffer from an existing file + * + * @param fname Filename containing memory (simple binary format) + * @return 0 if OK, -ve on error + */ +int os_read_ram_buf(const char *fname); + #endif diff --git a/include/part.h b/include/part.h index ce840bd841..4beb6db89b 100644 --- a/include/part.h +++ b/include/part.h @@ -58,6 +58,8 @@ typedef struct block_dev_desc { #define IF_TYPE_MMC 6 #define IF_TYPE_SD 7 #define IF_TYPE_SATA 8 +#define IF_TYPE_HOST 9 +#define IF_TYPE_MAX 10 /* Max number of IF_TYPE_* supported */ /* Part types */ #define PART_TYPE_UNKNOWN 0x00 @@ -102,6 +104,8 @@ block_dev_desc_t* usb_stor_get_dev(int dev); block_dev_desc_t* mmc_get_dev(int dev); block_dev_desc_t* systemace_get_dev(int dev); block_dev_desc_t* mg_disk_get_dev(int dev); +block_dev_desc_t *host_get_dev(int dev); +int host_get_dev_err(int dev, block_dev_desc_t **blk_devp); /* disk/part.c */ int get_partition_info (block_dev_desc_t * dev_desc, int part, disk_partition_t *info); @@ -123,6 +127,7 @@ static inline block_dev_desc_t* usb_stor_get_dev(int dev) { return NULL; } static inline block_dev_desc_t* mmc_get_dev(int dev) { return NULL; } static inline block_dev_desc_t* systemace_get_dev(int dev) { return NULL; } static inline block_dev_desc_t* mg_disk_get_dev(int dev) { return NULL; } +static inline block_dev_desc_t *host_get_dev(int dev) { return NULL; } static inline int get_partition_info (block_dev_desc_t * dev_desc, int part, disk_partition_t *info) { return -1; } diff --git a/include/sandboxblockdev.h b/include/sandboxblockdev.h new file mode 100644 index 0000000000..627787aa32 --- /dev/null +++ b/include/sandboxblockdev.h @@ -0,0 +1,18 @@ +/* + * Copyright (c) 2013, Henrik Nordstrom <henrik@henriknordstrom.net> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __SANDBOX_BLOCK_DEV__ +#define __SANDBOX_BLOCK_DEV__ + +struct host_block_dev { + block_dev_desc_t blk_dev; + char *filename; + int fd; +}; + +int host_dev_bind(int dev, char *filename); + +#endif diff --git a/include/sh_tmu.h b/include/sh_tmu.h index f5b42faea4..61afc7136d 100644 --- a/include/sh_tmu.h +++ b/include/sh_tmu.h @@ -47,7 +47,7 @@ struct tmu_regs { }; #endif /* CONFIG_SH3 */ -#if defined(CONFIG_SH4) || defined(CONFIG_SH4A) || defined(CONFIG_RMOBILE) +#if defined(CONFIG_SH4) || defined(CONFIG_RMOBILE) struct tmu_regs { u32 reserved; u8 tstr; diff --git a/include/vxworks.h b/include/vxworks.h index c5d1577f9c..122043c941 100644 --- a/include/vxworks.h +++ b/include/vxworks.h @@ -9,6 +9,9 @@ #define _VXWORKS_H_ int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); +void boot_prep_vxworks(bootm_headers_t *images); +void boot_jump_vxworks(bootm_headers_t *images); +void do_bootvx_fdt(bootm_headers_t *images); /* * Use bootaddr to find the location in memory that VxWorks diff --git a/lib/Makefile b/lib/Makefile index e787f77be8..760340fbde 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -21,6 +21,7 @@ obj-$(CONFIG_BZIP2) += bzlib_randtable.o obj-$(CONFIG_BZIP2) += bzlib_huffman.o obj-$(CONFIG_USB_TTY) += circbuf.o obj-y += crc7.o +obj-y += crc8.o obj-y += crc16.o obj-$(CONFIG_OF_CONTROL) += fdtdec.o obj-$(CONFIG_TEST_FDTDEC) += fdtdec_test.o diff --git a/lib/crc8.c b/lib/crc8.c new file mode 100644 index 0000000000..8b68a29e40 --- /dev/null +++ b/lib/crc8.c @@ -0,0 +1,25 @@ +/* + * Copyright (c) 2013 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "linux/crc8.h" + +unsigned int crc8(const unsigned char *vptr, int len) +{ + const unsigned char *data = vptr; + unsigned int crc = 0; + int i, j; + + for (j = len; j; j--, data++) { + crc ^= (*data << 8); + for (i = 8; i; i--) { + if (crc & 0x8000) + crc ^= (0x1070 << 3); + crc <<= 1; + } + } + + return (crc >> 8) & 0xff; +} diff --git a/lib/time.c b/lib/time.c index 09bb05a24d..8085aa40d1 100644 --- a/lib/time.c +++ b/lib/time.c @@ -71,8 +71,8 @@ unsigned long __weak notrace timer_get_us(void) } static unsigned long long usec_to_tick(unsigned long usec) { - uint64_t tick = usec * get_tbclk(); - usec *= get_tbclk(); + uint64_t tick = usec; + tick *= get_tbclk(); do_div(tick, 1000000); return tick; } @@ -85,6 +85,13 @@ if [ "${ARCH}" -a "${ARCH}" != "${arch}" ]; then exit 1 fi +# +# Test above needed aarch64, now we need arm +# +if [ "${arch}" = "aarch64" ]; then + arch="arm" +fi + if [ "$options" ] ; then echo "Configuring for ${BOARD_NAME} - Board: ${CONFIG_NAME}, Options: ${options}" else diff --git a/post/Makefile b/post/Makefile index 143924482f..2fa6f8a295 100644 --- a/post/Makefile +++ b/post/Makefile @@ -5,16 +5,14 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_HAS_POST) += post.o +obj-y += post.o obj-$(CONFIG_POST_STD_LIST) += tests.o -obj-$(CONFIG_HAS_POST) += drivers/ -ifeq ($(ARCH),powerpc) -obj-$(CONFIG_HAS_POST) += lib_powerpc/ -endif -ifneq ($(filter mpc83xx mpc8xx ppc4xx,$(CPU)),) -obj-$(CONFIG_HAS_POST) += cpu/$(CPU)/ -endif +obj-y += drivers/ +obj-$(CONFIG_PPC) += lib_powerpc/ +obj-$(CONFIG_MPC83xx) += cpu/mpc83xx/ +obj-$(CONFIG_8xx) += cpu/mpc8xx/ +obj-$(CONFIG_4xx) += cpu/ppc4xx/ ifneq ($(filter lwmon lwmon5 netta pdm360ng,$(BOARD)),) -obj-$(CONFIG_HAS_POST) += board/$(BOARD)/ +obj-y += board/$(BOARD)/ endif diff --git a/post/board/lwmon/Makefile b/post/board/lwmon/Makefile index b23debcabe..7f6d5a084e 100644 --- a/post/board/lwmon/Makefile +++ b/post/board/lwmon/Makefile @@ -5,4 +5,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_HAS_POST) += sysmon.o +obj-y += sysmon.o diff --git a/post/board/lwmon5/Makefile b/post/board/lwmon5/Makefile index a50ce67cde..76262c76bc 100644 --- a/post/board/lwmon5/Makefile +++ b/post/board/lwmon5/Makefile @@ -5,4 +5,4 @@ # # SPDX-License-Identifier: GPL-2.0+ -obj-$(CONFIG_HAS_POST) += sysmon.o watchdog.o dspic.o fpga.o dsp.o gdc.o +obj-y += sysmon.o watchdog.o dspic.o fpga.o dsp.o gdc.o diff --git a/post/board/netta/Makefile b/post/board/netta/Makefile index 5c37f497cc..8fc1945b07 100644 --- a/post/board/netta/Makefile +++ b/post/board/netta/Makefile @@ -5,4 +5,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_HAS_POST) += codec.o dsp.o +obj-y += codec.o dsp.o diff --git a/post/board/pdm360ng/Makefile b/post/board/pdm360ng/Makefile index b43b77b2d3..9aa96a1f6a 100644 --- a/post/board/pdm360ng/Makefile +++ b/post/board/pdm360ng/Makefile @@ -5,4 +5,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_HAS_POST) += coproc_com.o +obj-y += coproc_com.o diff --git a/post/cpu/mpc83xx/Makefile b/post/cpu/mpc83xx/Makefile index 4b3c50e6af..d57b66757e 100644 --- a/post/cpu/mpc83xx/Makefile +++ b/post/cpu/mpc83xx/Makefile @@ -5,4 +5,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_HAS_POST) += ecc.o +obj-y += ecc.o diff --git a/post/cpu/ppc4xx/Makefile b/post/cpu/ppc4xx/Makefile index ed3e8e87fd..e9ec286c7c 100644 --- a/post/cpu/ppc4xx/Makefile +++ b/post/cpu/ppc4xx/Makefile @@ -5,12 +5,12 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_HAS_POST) += cache_4xx.o -obj-$(CONFIG_HAS_POST) += cache.o -obj-$(CONFIG_HAS_POST) += denali_ecc.o -obj-$(CONFIG_HAS_POST) += ether.o -obj-$(CONFIG_HAS_POST) += fpu.o -obj-$(CONFIG_HAS_POST) += ocm.o -obj-$(CONFIG_HAS_POST) += spr.o -obj-$(CONFIG_HAS_POST) += uart.o -obj-$(CONFIG_HAS_POST) += watchdog.o +obj-y += cache_4xx.o +obj-y += cache.o +obj-y += denali_ecc.o +obj-y += ether.o +obj-y += fpu.o +obj-y += ocm.o +obj-y += spr.o +obj-y += uart.o +obj-y += watchdog.o diff --git a/post/drivers/Makefile b/post/drivers/Makefile index 328f880b1d..1abfb1ffe6 100644 --- a/post/drivers/Makefile +++ b/post/drivers/Makefile @@ -5,4 +5,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_HAS_POST) += flash.o i2c.o memory.o rtc.o +obj-y += flash.o i2c.o memory.o rtc.o diff --git a/post/lib_powerpc/Makefile b/post/lib_powerpc/Makefile index d2b8a940df..0cbb6b6bd2 100644 --- a/post/lib_powerpc/Makefile +++ b/post/lib_powerpc/Makefile @@ -5,9 +5,9 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_HAS_POST) += asm.o -obj-$(CONFIG_HAS_POST) += cpu.o cmp.o cmpi.o two.o twox.o three.o threex.o -obj-$(CONFIG_HAS_POST) += threei.o andi.o srawi.o rlwnm.o rlwinm.o rlwimi.o -obj-$(CONFIG_HAS_POST) += store.o load.o cr.o b.o multi.o string.o complex.o +obj-y += asm.o +obj-y += cpu.o cmp.o cmpi.o two.o twox.o three.o threex.o +obj-y += threei.o andi.o srawi.o rlwnm.o rlwinm.o rlwimi.o +obj-y += store.o load.o cr.o b.o multi.o string.o complex.o -obj-$(CONFIG_HAS_POST) += fpu/ +obj-y += fpu/ diff --git a/post/lib_powerpc/fpu/Makefile b/post/lib_powerpc/fpu/Makefile index ee01a313f1..ae56a82af3 100644 --- a/post/lib_powerpc/fpu/Makefile +++ b/post/lib_powerpc/fpu/Makefile @@ -5,15 +5,15 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_HAS_POST) += 20001122-1.o -obj-$(CONFIG_HAS_POST) += 20010114-2.o -obj-$(CONFIG_HAS_POST) += 20010226-1.o -obj-$(CONFIG_HAS_POST) += 980619-1.o -obj-$(CONFIG_HAS_POST) += acc1.o -obj-$(CONFIG_HAS_POST) += compare-fp-1.o -obj-$(CONFIG_HAS_POST) += fpu.o -obj-$(CONFIG_HAS_POST) += mul-subnormal-single-1.o -obj-$(CONFIG_HAS_POST) += darwin-ldouble.o +obj-y += 20001122-1.o +obj-y += 20010114-2.o +obj-y += 20010226-1.o +obj-y += 980619-1.o +obj-y += acc1.o +obj-y += compare-fp-1.o +obj-y += fpu.o +obj-y += mul-subnormal-single-1.o +obj-y += darwin-ldouble.o CFLAGS := $(shell echo $(CFLAGS) | sed s/-msoft-float//) CFLAGS += -mhard-float -fkeep-inline-functions diff --git a/tools/binutils-version.sh b/scripts/binutils-version.sh index d4d9eb4361..d4d9eb4361 100755..100644 --- a/tools/binutils-version.sh +++ b/scripts/binutils-version.sh diff --git a/tools/checkpatch.pl b/scripts/checkpatch.pl index 88c5bc7735..88c5bc7735 100755 --- a/tools/checkpatch.pl +++ b/scripts/checkpatch.pl diff --git a/tools/checkstack.pl b/scripts/checkstack.pl index c1cdc0a92a..c1cdc0a92a 100755 --- a/tools/checkstack.pl +++ b/scripts/checkstack.pl diff --git a/tools/cleanpatch b/scripts/cleanpatch index 9680d03ad2..9680d03ad2 100755 --- a/tools/cleanpatch +++ b/scripts/cleanpatch diff --git a/tools/dtc-version.sh b/scripts/dtc-version.sh index e8c94d390b..e8c94d390b 100755..100644 --- a/tools/dtc-version.sh +++ b/scripts/dtc-version.sh diff --git a/tools/gcc-version.sh b/scripts/gcc-version.sh index debecb5561..debecb5561 100755..100644 --- a/tools/gcc-version.sh +++ b/scripts/gcc-version.sh diff --git a/tools/setlocalversion b/scripts/setlocalversion index f551b4c4f4..f551b4c4f4 100755 --- a/tools/setlocalversion +++ b/scripts/setlocalversion diff --git a/spl/.gitignore b/spl/.gitignore deleted file mode 100644 index 7c8814709f..0000000000 --- a/spl/.gitignore +++ /dev/null @@ -1,4 +0,0 @@ -u-boot-spl -u-boot-spl.bin -u-boot-spl.lds -u-boot-spl.map diff --git a/spl/Makefile b/spl/Makefile index 0caa982470..5e5472d97c 100644 --- a/spl/Makefile +++ b/spl/Makefile @@ -37,22 +37,15 @@ endif HAVE_VENDOR_COMMON_LIB = $(if $(wildcard $(SRCTREE)/board/$(VENDOR)/common/Makefile),y,n) ifdef CONFIG_SPL_START_S_PATH -START_PATH := $(subst ",,$(CONFIG_SPL_START_S_PATH)) +START_PATH := $(CONFIG_SPL_START_S_PATH:"%"=%) else START_PATH := $(CPUDIR) endif -START := $(START_PATH)/start.o -ifeq ($(CPU),x86) -START += $(START_PATH)/start16.o -START += $(START_PATH)/resetvec.o -endif -ifeq ($(CPU),ppc4xx) -START += $(START_PATH)/resetvec.o -endif -ifeq ($(CPU),mpc85xx) -START += $(START_PATH)/resetvec.o -endif +head-y := $(START_PATH)/start.o +head-$(CONFIG_X86) += $(START_PATH)/start16.o $(START_PATH)/resetvec.o +head-$(CONFIG_4xx) += $(START_PATH)/resetvec.o +head-$(CONFIG_MPC85xx) += $(START_PATH)/resetvec.o LIBS-y += arch/$(ARCH)/lib/ @@ -78,7 +71,7 @@ LIBS-y += fs/ LIBS-$(CONFIG_SPL_LIBGENERIC_SUPPORT) += lib/ LIBS-$(CONFIG_SPL_POWER_SUPPORT) += drivers/power/ \ drivers/power/pmic/ -LIBS-$(CONFIG_SPL_NAND_SUPPORT) += drivers/mtd/nand/ +LIBS-$(if $(CONFIG_CMD_NAND),$(CONFIG_SPL_NAND_SUPPORT)) += drivers/mtd/nand/ LIBS-$(CONFIG_SPL_ONENAND_SUPPORT) += drivers/mtd/onenand/ LIBS-$(CONFIG_SPL_DMA_SUPPORT) += drivers/dma/ LIBS-$(CONFIG_SPL_POST_MEM_SUPPORT) += post/drivers/ @@ -90,17 +83,13 @@ LIBS-$(CONFIG_SPL_MUSB_NEW_SUPPORT) += drivers/usb/musb-new/ LIBS-$(CONFIG_SPL_USBETH_SUPPORT) += drivers/usb/gadget/ LIBS-$(CONFIG_SPL_WATCHDOG_SUPPORT) += drivers/watchdog/ -ifneq (,$(CONFIG_MX23)$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35)) +ifneq (,$(CONFIG_MX23)$(CONFIG_MX35)$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35)) LIBS-y += arch/$(ARCH)/imx-common/ endif LIBS-$(CONFIG_ARM) += arch/arm/cpu/ LIBS-$(CONFIG_PPC) += arch/powerpc/cpu/ -ifneq ($(CONFIG_MX23)$(CONFIG_MX35),) -LIBS-y += arch/$(ARCH)/imx-common/ -endif - LIBS-y := $(patsubst %/, %/built-in.o, $(LIBS-y)) # Add GCC lib @@ -109,7 +98,7 @@ PLATFORM_LIBGCC = $(SPLTREE)/arch/$(ARCH)/lib/libgcc.o PLATFORM_LIBS := $(filter-out %/libgcc.o, $(filter-out -lgcc, $(PLATFORM_LIBS))) $(PLATFORM_LIBGCC) endif -START := $(addprefix $(SPLTREE)/,$(START)) +START := $(addprefix $(SPLTREE)/,$(head-y)) LIBS := $(addprefix $(SPLTREE)/,$(sort $(LIBS-y))) __START := $(subst $(obj),,$(START)) @@ -118,7 +107,7 @@ __LIBS := $(subst $(obj),,$(LIBS)) # Linker Script ifdef CONFIG_SPL_LDSCRIPT # need to strip off double quotes -LDSCRIPT := $(addprefix $(SRCTREE)/,$(subst ",,$(CONFIG_SPL_LDSCRIPT))) +LDSCRIPT := $(addprefix $(SRCTREE)/,$(CONFIG_SPL_LDSCRIPT:"%"=%)) endif ifeq ($(wildcard $(LDSCRIPT)),) @@ -176,7 +165,7 @@ $(obj)$(BOARD)-spl.bin: $(obj)u-boot-spl.bin endif $(obj)$(SPL_BIN).bin: $(obj)$(SPL_BIN) - $(OBJCOPY) $(OBJCFLAGS) -O binary $< $@ + $(OBJCOPY) $(OBJCFLAGS) $(SPL_OBJCFLAGS) -O binary $< $@ GEN_UBOOT = \ cd $(obj) && $(LD) $(LDFLAGS) $(LDFLAGS_$(@F)) $(__START) \ diff --git a/test/image/test-imagetools.sh b/test/image/test-imagetools.sh new file mode 100755 index 0000000000..9e299e1e57 --- /dev/null +++ b/test/image/test-imagetools.sh @@ -0,0 +1,141 @@ +#!/bin/bash +# +# Written by Guilherme Maciel Ferreira <guilherme.maciel.ferreira@gmail.com> +# +# Sanity check for mkimage and dumpimage tools +# +# SPDX-License-Identifier: GPL-2.0+ +# +# To run this: +# +# make O=sandbox sandbox_config +# make O=sandbox +# ./test/image/test-imagetools.sh + +BASEDIR=sandbox +SRCDIR=sandbox/boot +IMAGE_NAME="v1.0-test" +IMAGE=linux.img +DATAFILE0=vmlinuz +DATAFILE1=initrd.img +DATAFILE2=System.map +DATAFILES="${DATAFILE0} ${DATAFILE1} ${DATAFILE2}" +TEST_OUT=test_output +MKIMAGE=${BASEDIR}/tools/mkimage +DUMPIMAGE=${BASEDIR}/tools/dumpimage +MKIMAGE_LIST=mkimage.list +DUMPIMAGE_LIST=dumpimage.list + +# Remove all the files we created +cleanup() +{ + local file + + for file in ${DATAFILES}; do + rm -f ${file} ${SRCDIR}/${file} + done + rm -f ${IMAGE} ${DUMPIMAGE_LIST} ${MKIMAGE_LIST} ${TEST_OUT} + rmdir ${SRCDIR} +} + +# Check that two files are the same +assert_equal() +{ + if ! diff $1 $2; then + echo "Failed." + cleanup + exit 1 + fi +} + +# Create some test files +create_files() +{ + local file + + mkdir -p ${SRCDIR} + for file in ${DATAFILES}; do + head -c $RANDOM /dev/urandom >${SRCDIR}/${file} + done +} + +# Run a command, echoing it first +do_cmd() +{ + local cmd="$@" + + echo "# ${cmd}" + ${cmd} 2>&1 +} + +# Run a command, redirecting output +# Args: +# redirect_file +# command... +do_cmd_redir() +{ + local redir="$1" + shift + local cmd="$@" + + echo "# ${cmd}" + ${cmd} >${redir} +} + +# Write files into an image +create_image() +{ + local files="${SRCDIR}/${DATAFILE0}:${SRCDIR}/${DATAFILE1}" + files+=":${SRCDIR}/${DATAFILE2}" + + echo -e "\nBuilding image..." + do_cmd ${MKIMAGE} -A x86 -O linux -T multi -n \"${IMAGE_NAME}\" \ + -d ${files} ${IMAGE} + echo "done." +} + +# Extract files from an image +extract_image() +{ + echo -e "\nExtracting image contents..." + do_cmd ${DUMPIMAGE} -i ${IMAGE} -p 0 ${DATAFILE0} + do_cmd ${DUMPIMAGE} -i ${IMAGE} -p 1 ${DATAFILE1} + do_cmd ${DUMPIMAGE} -i ${IMAGE} -p 2 ${DATAFILE2} + do_cmd ${DUMPIMAGE} -i ${IMAGE} -p 2 ${DATAFILE2} -o ${TEST_OUT} + echo "done." +} + +# List the contents of a file +list_image() +{ + echo -e "\nListing image contents..." + do_cmd_redir ${MKIMAGE_LIST} ${MKIMAGE} -l ${IMAGE} + do_cmd_redir ${DUMPIMAGE_LIST} ${DUMPIMAGE} -l ${IMAGE} + echo "done." +} + +main() +{ + local file + + create_files + + # Compress and extract multifile images, compare the result + create_image + extract_image + for file in ${DATAFILES}; do + assert_equal ${file} ${SRCDIR}/${file} + done + assert_equal ${TEST_OUT} ${DATAFILE2} + + # List contents and compares output fro tools + list_image + assert_equal ${DUMPIMAGE_LIST} ${MKIMAGE_LIST} + + # Remove files created + cleanup + + echo "Tests passed." +} + +main diff --git a/tools/.gitignore b/tools/.gitignore index a7fee26cdd..930fa2e8a0 100644 --- a/tools/.gitignore +++ b/tools/.gitignore @@ -3,12 +3,12 @@ /gen_eth_addr /img2srec /kwboot +/dumpimage /mkenvimage /mkimage /mpc86x_clk /mxsboot /ncb -/ncp /proftool /ubsha1 /xway-swap-bytes diff --git a/tools/Makefile b/tools/Makefile index d4bc84d278..328cea319e 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -50,6 +50,7 @@ BIN_FILES-$(CONFIG_BUILD_ENVCRC) += envcrc$(SFX) BIN_FILES-$(CONFIG_CMD_NET) += gen_eth_addr$(SFX) BIN_FILES-$(CONFIG_CMD_LOADS) += img2srec$(SFX) BIN_FILES-$(CONFIG_XWAY_SWAP_BYTES) += xway-swap-bytes$(SFX) +BIN_FILES-y += dumpimage$(SFX) BIN_FILES-y += mkenvimage$(SFX) BIN_FILES-y += mkimage$(SFX) BIN_FILES-$(CONFIG_EXYNOS5250) += mk$(BOARD)spl$(SFX) @@ -60,6 +61,7 @@ BIN_FILES-$(CONFIG_NETCONSOLE) += ncb$(SFX) BIN_FILES-$(CONFIG_SHA1_CHECK_UB_IMG) += ubsha1$(SFX) BIN_FILES-$(CONFIG_KIRKWOOD) += kwboot$(SFX) BIN_FILES-y += proftool(SFX) +BIN_FILES-$(CONFIG_STATIC_RELA) += relocate-rela$(SFX) # Source files which exist outside the tools directory EXT_OBJ_FILES-$(CONFIG_BUILD_ENVCRC) += common/env_embedded.o @@ -73,10 +75,12 @@ EXT_OBJ_FILES-y += lib/sha1.o # Source files located in the tools directory NOPED_OBJ_FILES-y += aisimage.o NOPED_OBJ_FILES-y += default_image.o +NOPED_OBJ_FILES-y += dumpimage.o NOPED_OBJ_FILES-y += fit_image.o NOPED_OBJ_FILES-y += image-host.o NOPED_OBJ_FILES-y += imximage.o NOPED_OBJ_FILES-y += kwbimage.o +NOPED_OBJ_FILES-y += imagetool.o NOPED_OBJ_FILES-y += mkenvimage.o NOPED_OBJ_FILES-y += mkimage.o NOPED_OBJ_FILES-y += mxsimage.o @@ -85,6 +89,7 @@ NOPED_OBJ_FILES-y += os_support.o NOPED_OBJ_FILES-y += pblimage.o NOPED_OBJ_FILES-y += proftool.o NOPED_OBJ_FILES-y += ublimage.o +NOPED_OBJ_FILES-y += relocate-rela.o OBJ_FILES-$(CONFIG_BUILD_ENVCRC) += envcrc.o OBJ_FILES-$(CONFIG_CMD_LOADS) += img2srec.o OBJ_FILES-$(CONFIG_CMD_NET) += gen_eth_addr.o @@ -200,6 +205,30 @@ $(obj)xway-swap-bytes$(SFX): $(obj)xway-swap-bytes.o $(HOSTCC) $(HOSTCFLAGS) $(HOSTLDFLAGS) -o $@ $^ $(HOSTSTRIP) $@ +$(obj)dumpimage$(SFX): $(obj)aisimage.o \ + $(FIT_SIG_OBJS) \ + $(obj)crc32.o \ + $(obj)default_image.o \ + $(obj)fit_image.o \ + $(obj)image-fit.o \ + $(obj)image.o \ + $(obj)image-host.o \ + $(obj)imagetool.o \ + $(obj)imximage.o \ + $(obj)kwbimage.o \ + $(obj)dumpimage.o \ + $(obj)md5.o \ + $(obj)mxsimage.o \ + $(obj)omapimage.o \ + $(obj)os_support.o \ + $(obj)pblimage.o \ + $(obj)sha1.o \ + $(obj)ublimage.o \ + $(LIBFDT_OBJS) \ + $(RSA_OBJS) + $(HOSTCC) $(HOSTCFLAGS) $(HOSTLDFLAGS) -o $@ $^ $(HOSTLIBS) + $(HOSTSTRIP) $@ + $(obj)mkenvimage$(SFX): $(obj)crc32.o $(obj)mkenvimage.o \ $(obj)os_support.o $(HOSTCC) $(HOSTCFLAGS) $(HOSTLDFLAGS) -o $@ $^ @@ -213,6 +242,7 @@ $(obj)mkimage$(SFX): $(obj)aisimage.o \ $(obj)image-fit.o \ $(obj)image-host.o \ $(obj)image.o \ + $(obj)imagetool.o \ $(obj)imximage.o \ $(obj)kwbimage.o \ $(obj)md5.o \ @@ -251,6 +281,10 @@ $(obj)kwboot$(SFX): $(obj)kwboot.o $(HOSTCC) $(HOSTCFLAGS) $(HOSTLDFLAGS) -o $@ $^ $(HOSTSTRIP) $@ +$(obj)relocate-rela$(SFX): $(obj)relocate-rela.o + $(HOSTCC) $(HOSTCFLAGS) $(HOSTLDFLAGS) -o $@ $^ + $(HOSTSTRIP) $@ + # Some of the tool objects need to be accessed from outside the tools directory $(obj)%.o: $(SRCTREE)/common/%.c $(HOSTCC) -g $(HOSTCFLAGS_NOPED) -c -o $@ $< diff --git a/tools/aisimage.c b/tools/aisimage.c index 04fb649899..8de370a2e0 100644 --- a/tools/aisimage.c +++ b/tools/aisimage.c @@ -5,7 +5,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include "mkimage.h" +#include "imagetool.h" #include "aisimage.h" #include <image.h> @@ -176,7 +176,7 @@ static uint32_t *ais_insert_cmd_header(uint32_t cmd, uint32_t nargs, } -static uint32_t *ais_alloc_buffer(struct mkimage_params *params) +static uint32_t *ais_alloc_buffer(struct image_tool_params *params) { int dfd; struct stat sbuf; @@ -216,7 +216,7 @@ static uint32_t *ais_alloc_buffer(struct mkimage_params *params) return ptr; } -static uint32_t *ais_copy_image(struct mkimage_params *params, +static uint32_t *ais_copy_image(struct image_tool_params *params, uint32_t *aisptr) { @@ -252,7 +252,7 @@ static uint32_t *ais_copy_image(struct mkimage_params *params, } -static int aisimage_generate(struct mkimage_params *params, +static int aisimage_generate(struct image_tool_params *params, struct image_type_params *tparams) { FILE *fd = NULL; @@ -370,7 +370,7 @@ static int aisimage_check_image_types(uint8_t type) } static int aisimage_verify_header(unsigned char *ptr, int image_size, - struct mkimage_params *params) + struct image_tool_params *params) { struct ais_header *ais_hdr = (struct ais_header *)ptr; @@ -384,11 +384,11 @@ static int aisimage_verify_header(unsigned char *ptr, int image_size, } static void aisimage_set_header(void *ptr, struct stat *sbuf, int ifd, - struct mkimage_params *params) + struct image_tool_params *params) { } -int aisimage_check_params(struct mkimage_params *params) +int aisimage_check_params(struct image_tool_params *params) { if (!params) return CFG_INVALID; @@ -427,5 +427,5 @@ static struct image_type_params aisimage_params = { void init_ais_image_type(void) { - mkimage_register(&aisimage_params); + register_image_type(&aisimage_params); } diff --git a/tools/default_image.c b/tools/default_image.c index fd8b9f5f15..0a0792e503 100644 --- a/tools/default_image.c +++ b/tools/default_image.c @@ -14,7 +14,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include "mkimage.h" +#include "imagetool.h" #include <image.h> #include <u-boot/crc.h> @@ -29,7 +29,7 @@ static int image_check_image_types(uint8_t type) return EXIT_FAILURE; } -static int image_check_params(struct mkimage_params *params) +static int image_check_params(struct image_tool_params *params) { return ((params->dflag && (params->fflag || params->lflag)) || (params->fflag && (params->dflag || params->lflag)) || @@ -37,7 +37,7 @@ static int image_check_params(struct mkimage_params *params) } static int image_verify_header(unsigned char *ptr, int image_size, - struct mkimage_params *params) + struct image_tool_params *params) { uint32_t len; const unsigned char *data; @@ -86,7 +86,7 @@ static int image_verify_header(unsigned char *ptr, int image_size, } static void image_set_header(void *ptr, struct stat *sbuf, int ifd, - struct mkimage_params *params) + struct image_tool_params *params) { uint32_t checksum; @@ -117,6 +117,62 @@ static void image_set_header(void *ptr, struct stat *sbuf, int ifd, image_set_hcrc(hdr, checksum); } +static int image_save_datafile(struct image_tool_params *params, + ulong file_data, ulong file_len) +{ + int dfd; + const char *datafile = params->outfile; + + dfd = open(datafile, O_RDWR | O_CREAT | O_TRUNC | O_BINARY, + S_IRUSR | S_IWUSR); + if (dfd < 0) { + fprintf(stderr, "%s: Can't open \"%s\": %s\n", + params->cmdname, datafile, strerror(errno)); + return -1; + } + + if (write(dfd, (void *)file_data, file_len) != (ssize_t)file_len) { + fprintf(stderr, "%s: Write error on \"%s\": %s\n", + params->cmdname, datafile, strerror(errno)); + close(dfd); + return -1; + } + + close(dfd); + + return 0; +} + +static int image_extract_datafile(void *ptr, struct image_tool_params *params) +{ + const image_header_t *hdr = (const image_header_t *)ptr; + ulong file_data; + ulong file_len; + + if (image_check_type(hdr, IH_TYPE_MULTI)) { + ulong idx = params->pflag; + ulong count; + + /* get the number of data files present in the image */ + count = image_multi_count(hdr); + + /* retrieve the "data file" at the idx position */ + image_multi_getimg(hdr, idx, &file_data, &file_len); + + if ((file_len == 0) || (idx >= count)) { + fprintf(stderr, "%s: No such data file %ld in \"%s\"\n", + params->cmdname, idx, params->imagefile); + return -1; + } + } else { + file_data = image_get_data(hdr); + file_len = image_get_size(hdr); + } + + /* save the "data file" into the file system */ + return image_save_datafile(params, file_data, file_len); +} + /* * Default image type parameters definition */ @@ -128,10 +184,11 @@ static struct image_type_params defimage_params = { .verify_header = image_verify_header, .print_header = image_print_contents, .set_header = image_set_header, + .extract_datafile = image_extract_datafile, .check_params = image_check_params, }; void init_default_image_type(void) { - mkimage_register(&defimage_params); + register_image_type(&defimage_params); } diff --git a/tools/dumpimage.c b/tools/dumpimage.c new file mode 100644 index 0000000000..542ee28210 --- /dev/null +++ b/tools/dumpimage.c @@ -0,0 +1,305 @@ +/* + * Based on mkimage.c. + * + * Written by Guilherme Maciel Ferreira <guilherme.maciel.ferreira@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "dumpimage.h" +#include <image.h> +#include <version.h> + +static void usage(void); + +/* image_type_params linked list to maintain registered image types supports */ +static struct image_type_params *dumpimage_tparams; + +/* parameters initialized by core will be used by the image type code */ +static struct image_tool_params params = { + .type = IH_TYPE_KERNEL, +}; + +/** + * dumpimage_register() - register respective image generation/list support + * + * the input struct image_type_params is checked and appended to the link + * list, if the input structure is already registered, issue an error + * + * @tparams: Image type parameters + */ +static void dumpimage_register(struct image_type_params *tparams) +{ + struct image_type_params **tp; + + if (!tparams) { + fprintf(stderr, "%s: %s: Null input\n", params.cmdname, + __func__); + exit(EXIT_FAILURE); + } + + /* scan the linked list, check for registry and point the last one */ + for (tp = &dumpimage_tparams; *tp != NULL; tp = &(*tp)->next) { + if (!strcmp((*tp)->name, tparams->name)) { + fprintf(stderr, "%s: %s already registered\n", + params.cmdname, tparams->name); + return; + } + } + + /* add input struct entry at the end of link list */ + *tp = tparams; + /* mark input entry as last entry in the link list */ + tparams->next = NULL; + + debug("Registered %s\n", tparams->name); +} + +/** + * dumpimage_get_type() - find the image type params for a given image type + * + * Scan all registered image types and check the input type_id for each + * supported image type + * + * @return respective image_type_params pointer. If the input type is not + * supported by any of registered image types, returns NULL + */ +static struct image_type_params *dumpimage_get_type(int type) +{ + struct image_type_params *curr; + + for (curr = dumpimage_tparams; curr != NULL; curr = curr->next) { + if (curr->check_image_type) { + if (!curr->check_image_type(type)) + return curr; + } + } + return NULL; +} + +/* + * dumpimage_verify_print_header() - verifies the image header + * + * Scan registered image types and verify the image_header for each + * supported image type. If verification is successful, this prints + * the respective header. + * + * @return 0 on success, negative if input image format does not match with + * any of supported image types + */ +static int dumpimage_verify_print_header(void *ptr, struct stat *sbuf) +{ + int retval = -1; + struct image_type_params *curr; + + for (curr = dumpimage_tparams; curr != NULL; curr = curr->next) { + if (curr->verify_header) { + retval = curr->verify_header((unsigned char *)ptr, + sbuf->st_size, ¶ms); + if (retval != 0) + continue; + /* + * Print the image information if verify is + * successful + */ + if (curr->print_header) { + curr->print_header(ptr); + } else { + fprintf(stderr, + "%s: print_header undefined for %s\n", + params.cmdname, curr->name); + } + break; + } + } + + return retval; +} + +/* + * dumpimage_extract_datafile - + * + * It scans all registered image types, + * verifies image_header for each supported image type + * if verification is successful, it extracts the desired file, + * indexed by pflag, from the image + * + * returns negative if input image format does not match with any of + * supported image types + */ +static int dumpimage_extract_datafile(void *ptr, struct stat *sbuf) +{ + int retval = -1; + struct image_type_params *curr; + + for (curr = dumpimage_tparams; curr != NULL; curr = curr->next) { + if (curr->verify_header) { + retval = curr->verify_header((unsigned char *)ptr, + sbuf->st_size, ¶ms); + if (retval != 0) + continue; + /* + * Extract the file from the image + * if verify is successful + */ + if (curr->extract_datafile) { + curr->extract_datafile(ptr, ¶ms); + } else { + fprintf(stderr, + "%s: extract_datafile undefined for %s\n", + params.cmdname, curr->name); + break; + } + } + } + + return retval; +} + +int main(int argc, char **argv) +{ + int opt; + int ifd = -1; + struct stat sbuf; + char *ptr; + int retval = 0; + struct image_type_params *tparams = NULL; + + /* Init all image generation/list support */ + register_image_tool(dumpimage_register); + + params.cmdname = *argv; + + while ((opt = getopt(argc, argv, "li:o:p:V")) != -1) { + switch (opt) { + case 'l': + params.lflag = 1; + break; + case 'i': + params.imagefile = optarg; + params.iflag = 1; + break; + case 'o': + params.outfile = optarg; + break; + case 'p': + params.pflag = strtoul(optarg, &ptr, 10); + if (*ptr) { + fprintf(stderr, + "%s: invalid file position %s\n", + params.cmdname, *argv); + exit(EXIT_FAILURE); + } + break; + case 'V': + printf("dumpimage version %s\n", PLAIN_VERSION); + exit(EXIT_SUCCESS); + default: + usage(); + } + } + + if (optind >= argc) + usage(); + + /* set tparams as per input type_id */ + tparams = dumpimage_get_type(params.type); + if (tparams == NULL) { + fprintf(stderr, "%s: unsupported type %s\n", + params.cmdname, genimg_get_type_name(params.type)); + exit(EXIT_FAILURE); + } + + /* + * check the passed arguments parameters meets the requirements + * as per image type to be generated/listed + */ + if (tparams->check_params) { + if (tparams->check_params(¶ms)) + usage(); + } + + if (params.iflag) + params.datafile = argv[optind]; + else + params.imagefile = argv[optind]; + if (!params.outfile) + params.outfile = params.datafile; + + ifd = open(params.imagefile, O_RDONLY|O_BINARY); + if (ifd < 0) { + fprintf(stderr, "%s: Can't open \"%s\": %s\n", + params.cmdname, params.imagefile, + strerror(errno)); + exit(EXIT_FAILURE); + } + + if (params.lflag || params.iflag) { + if (fstat(ifd, &sbuf) < 0) { + fprintf(stderr, "%s: Can't stat \"%s\": %s\n", + params.cmdname, params.imagefile, + strerror(errno)); + exit(EXIT_FAILURE); + } + + if ((unsigned)sbuf.st_size < tparams->header_size) { + fprintf(stderr, + "%s: Bad size: \"%s\" is not valid image\n", + params.cmdname, params.imagefile); + exit(EXIT_FAILURE); + } + + ptr = mmap(0, sbuf.st_size, PROT_READ, MAP_SHARED, ifd, 0); + if (ptr == MAP_FAILED) { + fprintf(stderr, "%s: Can't read \"%s\": %s\n", + params.cmdname, params.imagefile, + strerror(errno)); + exit(EXIT_FAILURE); + } + + /* + * Both calls bellow scan through dumpimage registry for all + * supported image types and verify the input image file + * header for match + */ + if (params.iflag) { + /* + * Extract the data files from within the matched + * image type. Returns the error code if not matched + */ + retval = dumpimage_extract_datafile(ptr, &sbuf); + } else { + /* + * Print the image information for matched image type + * Returns the error code if not matched + */ + retval = dumpimage_verify_print_header(ptr, &sbuf); + } + + (void)munmap((void *)ptr, sbuf.st_size); + (void)close(ifd); + + return retval; + } + + (void)close(ifd); + + return EXIT_SUCCESS; +} + +static void usage(void) +{ + fprintf(stderr, "Usage: %s -l image\n" + " -l ==> list image header information\n", + params.cmdname); + fprintf(stderr, + " %s -i image [-p position] [-o outfile] data_file\n" + " -i ==> extract from the 'image' a specific 'data_file'" + ", indexed by 'position' (starting at 0)\n", + params.cmdname); + fprintf(stderr, + " %s -V ==> print version information and exit\n", + params.cmdname); + + exit(EXIT_FAILURE); +} diff --git a/tools/dumpimage.h b/tools/dumpimage.h new file mode 100644 index 0000000000..d78523ded7 --- /dev/null +++ b/tools/dumpimage.h @@ -0,0 +1,33 @@ +/* + * Based on mkimage.c. + * + * Written by Guilherme Maciel Ferreira <guilherme.maciel.ferreira@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _DUMPIMAGE_H_ +#define _DUMPIMAGE_H_ + +#include "os_support.h" +#include <errno.h> +#include <fcntl.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <sys/stat.h> +#include <time.h> +#include <unistd.h> +#include <sha1.h> +#include "fdt_host.h" +#include "imagetool.h" + +#undef DUMPIMAGE_DEBUG + +#ifdef DUMPIMAGE_DEBUG +#define debug(fmt, args...) printf(fmt, ##args) +#else +#define debug(fmt, args...) +#endif /* DUMPIMAGE_DEBUG */ + +#endif /* _DUMPIMAGE_H_ */ diff --git a/tools/fit_image.c b/tools/fit_image.c index 0400a60678..1466164f0a 100644 --- a/tools/fit_image.c +++ b/tools/fit_image.c @@ -14,6 +14,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include "imagetool.h" #include "mkimage.h" #include <image.h> #include <u-boot/crc.h> @@ -21,7 +22,7 @@ static image_header_t header; static int fit_verify_header (unsigned char *ptr, int image_size, - struct mkimage_params *params) + struct image_tool_params *params) { return fdt_check_header(ptr); } @@ -34,7 +35,7 @@ static int fit_check_image_types (uint8_t type) return EXIT_FAILURE; } -int mmap_fdt(struct mkimage_params *params, const char *fname, void **blobp, +int mmap_fdt(struct image_tool_params *params, const char *fname, void **blobp, struct stat *sbuf) { void *ptr; @@ -88,7 +89,7 @@ int mmap_fdt(struct mkimage_params *params, const char *fname, void **blobp, * returns: * only on success, otherwise calls exit (EXIT_FAILURE); */ -static int fit_handle_file (struct mkimage_params *params) +static int fit_handle_file(struct image_tool_params *params) { char tmpfile[MKIMAGE_MAX_TMPFILE_LEN]; char cmd[MKIMAGE_MAX_DTC_CMDLINE_LEN]; @@ -184,7 +185,7 @@ err_system: return -1; } -static int fit_check_params (struct mkimage_params *params) +static int fit_check_params(struct image_tool_params *params) { return ((params->dflag && (params->fflag || params->lflag)) || (params->fflag && (params->dflag || params->lflag)) || @@ -205,5 +206,5 @@ static struct image_type_params fitimage_params = { void init_fit_image_type (void) { - mkimage_register (&fitimage_params); + register_image_type(&fitimage_params); } diff --git a/tools/imagetool.c b/tools/imagetool.c new file mode 100644 index 0000000000..29d2189097 --- /dev/null +++ b/tools/imagetool.c @@ -0,0 +1,58 @@ +/* + * (C) Copyright 2013 + * + * Written by Guilherme Maciel Ferreira <guilherme.maciel.ferreira@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "imagetool.h" + +/* + * Callback function to register a image type within a tool + */ +static imagetool_register_t register_func; + +/* + * register_image_tool - + * + * The tool provides its own registration function in order to all image + * types initialize themselves. + */ +void register_image_tool(imagetool_register_t image_register) +{ + /* + * Save the image tool callback function. It will be used to register + * image types within that tool + */ + register_func = image_register; + + /* Init Freescale PBL Boot image generation/list support */ + init_pbl_image_type(); + /* Init Kirkwood Boot image generation/list support */ + init_kwb_image_type(); + /* Init Freescale imx Boot image generation/list support */ + init_imx_image_type(); + /* Init Freescale mxs Boot image generation/list support */ + init_mxs_image_type(); + /* Init FIT image generation/list support */ + init_fit_image_type(); + /* Init TI OMAP Boot image generation/list support */ + init_omap_image_type(); + /* Init Default image generation/list support */ + init_default_image_type(); + /* Init Davinci UBL support */ + init_ubl_image_type(); + /* Init Davinci AIS support */ + init_ais_image_type(); +} + +/* + * register_image_type - + * + * Register a image type within a tool + */ +void register_image_type(struct image_type_params *tparams) +{ + register_func(tparams); +} diff --git a/tools/imagetool.h b/tools/imagetool.h new file mode 100644 index 0000000000..c2c9aea60e --- /dev/null +++ b/tools/imagetool.h @@ -0,0 +1,173 @@ +/* + * (C) Copyright 2013 + * + * Written by Guilherme Maciel Ferreira <guilherme.maciel.ferreira@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _IMAGETOOL_H_ +#define _IMAGETOOL_H_ + +#include "os_support.h" +#include <errno.h> +#include <fcntl.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <sys/stat.h> +#include <time.h> +#include <unistd.h> +#include <sha1.h> +#include "fdt_host.h" + +#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) + +#define IH_ARCH_DEFAULT IH_ARCH_INVALID + +/* + * This structure defines all such variables those are initialized by + * mkimage and dumpimage main core and need to be referred by image + * type specific functions + */ +struct image_tool_params { + int dflag; + int eflag; + int fflag; + int iflag; + int lflag; + int pflag; + int vflag; + int xflag; + int skipcpy; + int os; + int arch; + int type; + int comp; + char *dtc; + unsigned int addr; + unsigned int ep; + char *imagename; + char *imagename2; + char *datafile; + char *imagefile; + char *cmdname; + const char *outfile; /* Output filename */ + const char *keydir; /* Directory holding private keys */ + const char *keydest; /* Destination .dtb for public key */ + const char *comment; /* Comment to add to signature node */ + int require_keys; /* 1 to mark signing keys as 'required' */ +}; + +/* + * image type specific variables and callback functions + */ +struct image_type_params { + /* name is an identification tag string for added support */ + char *name; + /* + * header size is local to the specific image type to be supported, + * mkimage core treats this as number of bytes + */ + uint32_t header_size; + /* Image type header pointer */ + void *hdr; + /* + * There are several arguments that are passed on the command line + * and are registered as flags in image_tool_params structure. + * This callback function can be used to check the passed arguments + * are in-lined with the image type to be supported + * + * Returns 1 if parameter check is successful + */ + int (*check_params) (struct image_tool_params *); + /* + * This function is used by list command (i.e. mkimage -l <filename>) + * image type verification code must be put here + * + * Returns 0 if image header verification is successful + * otherwise, returns respective negative error codes + */ + int (*verify_header) (unsigned char *, int, struct image_tool_params *); + /* Prints image information abstracting from image header */ + void (*print_header) (const void *); + /* + * The header or image contents need to be set as per image type to + * be generated using this callback function. + * further output file post processing (for ex. checksum calculation, + * padding bytes etc..) can also be done in this callback function. + */ + void (*set_header) (void *, struct stat *, int, + struct image_tool_params *); + /* + * This function is used by the command to retrieve a data file from + * the image (i.e. dumpimage -i <image> -p <position> <data_file>). + * Thus the code to extract a file from an image must be put here. + * + * Returns 0 if the file was successfully retrieved from the image, + * or a negative value on error. + */ + int (*extract_datafile) (void *, struct image_tool_params *); + /* + * Some image generation support for ex (default image type) supports + * more than one type_ids, this callback function is used to check + * whether input (-T <image_type>) is supported by registered image + * generation/list low level code + */ + int (*check_image_type) (uint8_t); + /* This callback function will be executed if fflag is defined */ + int (*fflag_handle) (struct image_tool_params *); + /* + * This callback function will be executed for variable size record + * It is expected to build this header in memory and return its length + * and a pointer to it by using image_type_params.header_size and + * image_type_params.hdr. The return value shall indicate if an + * additional padding should be used when copying the data image + * by returning the padding length. + */ + int (*vrec_header) (struct image_tool_params *, + struct image_type_params *); + /* pointer to the next registered entry in linked list */ + struct image_type_params *next; +}; + +/* + * Tool registration function. + */ +typedef void (*imagetool_register_t)(struct image_type_params *); + +/* + * Initializes all image types with the given registration callback + * function. + * An image tool uses this function to initialize all image types. + */ +void register_image_tool(imagetool_register_t image_register); + +/* + * Register a image type within a tool. + * An image type uses this function to register itself within + * all tools. + */ +void register_image_type(struct image_type_params *tparams); + +/* + * There is a c file associated with supported image type low level code + * for ex. default_image.c, fit_image.c + * init_xxx_type() is the only function referred by image tool core to avoid + * a single lined header file, you can define them here + * + * Supported image types init functions + */ +void init_default_image_type(void); +void init_pbl_image_type(void); +void init_ais_image_type(void); +void init_kwb_image_type(void); +void init_imx_image_type(void); +void init_mxs_image_type(void); +void init_fit_image_type(void); +void init_ubl_image_type(void); +void init_omap_image_type(void); + +void pbl_load_uboot(int fd, struct image_tool_params *mparams); + +#endif /* _IMAGETOOL_H_ */ diff --git a/tools/imximage.c b/tools/imximage.c index 511e3f2038..18dc051c5e 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -9,7 +9,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include "mkimage.h" +#include "imagetool.h" #include <image.h> #include "imximage.h" @@ -520,7 +520,7 @@ static int imximage_check_image_types(uint8_t type) } static int imximage_verify_header(unsigned char *ptr, int image_size, - struct mkimage_params *params) + struct image_tool_params *params) { struct imx_header *imx_hdr = (struct imx_header *) ptr; @@ -549,7 +549,7 @@ static void imximage_print_header(const void *ptr) } static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, - struct mkimage_params *params) + struct image_tool_params *params) { struct imx_header *imxhdr = (struct imx_header *)ptr; uint32_t dcd_len; @@ -589,7 +589,7 @@ static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, } } -int imximage_check_params(struct mkimage_params *params) +int imximage_check_params(struct image_tool_params *params) { if (!params) return CFG_INVALID; @@ -611,7 +611,7 @@ int imximage_check_params(struct mkimage_params *params) (params->xflag) || !(strlen(params->imagename)); } -static int imximage_generate(struct mkimage_params *params, +static int imximage_generate(struct image_tool_params *params, struct image_type_params *tparams) { struct imx_header *imxhdr; @@ -701,5 +701,5 @@ static struct image_type_params imximage_params = { void init_imx_image_type(void) { - mkimage_register(&imximage_params); + register_image_type(&imximage_params); } diff --git a/tools/kwbimage.c b/tools/kwbimage.c index 1df6b2051e..109d61686e 100644 --- a/tools/kwbimage.c +++ b/tools/kwbimage.c @@ -6,7 +6,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include "mkimage.h" +#include "imagetool.h" #include <image.h> #include "kwbimage.h" @@ -54,7 +54,7 @@ static int lineno = -1; /* * Report Error if xflag is set in addition to default */ -static int kwbimage_check_params (struct mkimage_params *params) +static int kwbimage_check_params(struct image_tool_params *params) { if (!strlen (params->imagename)) { printf ("Error:%s - Configuration file not specified, " @@ -288,7 +288,7 @@ INVL_CMD: } static void kwbimage_set_header (void *ptr, struct stat *sbuf, int ifd, - struct mkimage_params *params) + struct image_tool_params *params) { struct kwb_header *hdr = (struct kwb_header *)ptr; bhr_t *mhdr = &hdr->kwb_hdr; @@ -322,7 +322,7 @@ static void kwbimage_set_header (void *ptr, struct stat *sbuf, int ifd, } static int kwbimage_verify_header (unsigned char *ptr, int image_size, - struct mkimage_params *params) + struct image_tool_params *params) { struct kwb_header *hdr = (struct kwb_header *)ptr; bhr_t *mhdr = &hdr->kwb_hdr; @@ -382,5 +382,5 @@ static struct image_type_params kwbimage_params = { void init_kwb_image_type (void) { - mkimage_register (&kwbimage_params); + register_image_type(&kwbimage_params); } diff --git a/tools/mkimage.c b/tools/mkimage.c index 7f221013e3..123d0c7d93 100644 --- a/tools/mkimage.c +++ b/tools/mkimage.c @@ -19,7 +19,7 @@ static void usage(void); struct image_type_params *mkimage_tparams = NULL; /* parameters initialized by core will be used by the image type code */ -struct mkimage_params params = { +struct image_tool_params params = { .os = IH_OS_LINUX, .arch = IH_ARCH_PPC, .type = IH_TYPE_KERNEL, @@ -139,24 +139,8 @@ main (int argc, char **argv) struct image_type_params *tparams = NULL; int pad_len = 0; - /* Init Freescale PBL Boot image generation/list support */ - init_pbl_image_type(); - /* Init Kirkwood Boot image generation/list support */ - init_kwb_image_type (); - /* Init Freescale imx Boot image generation/list support */ - init_imx_image_type (); - /* Init Freescale mxs Boot image generation/list support */ - init_mxs_image_type(); - /* Init FIT image generation/list support */ - init_fit_image_type (); - /* Init TI OMAP Boot image generation/list support */ - init_omap_image_type(); - /* Init Default image generation/list support */ - init_default_image_type (); - /* Init Davinci UBL support */ - init_ubl_image_type(); - /* Init Davinci AIS support */ - init_ais_image_type(); + /* Init all image generation/list support */ + register_image_tool(mkimage_register); params.cmdname = *argv; params.addr = params.ep = 0; @@ -632,8 +616,7 @@ copy_file (int ifd, const char *datafile, int pad) (void) close (dfd); } -void -usage () +static void usage(void) { fprintf (stderr, "Usage: %s -l image\n" " -l ==> list image header information\n", diff --git a/tools/mkimage.h b/tools/mkimage.h index af491544e4..d5491b6e60 100644 --- a/tools/mkimage.h +++ b/tools/mkimage.h @@ -20,6 +20,7 @@ #include <unistd.h> #include <sha1.h> #include "fdt_host.h" +#include "imagetool.h" #undef MKIMAGE_DEBUG @@ -29,8 +30,6 @@ #define debug(fmt,args...) #endif /* MKIMAGE_DEBUG */ -#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) - static inline void *map_sysmem(ulong paddr, unsigned long len) { return (void *)(uintptr_t)paddr; @@ -47,124 +46,4 @@ static inline ulong map_to_sysmem(void *ptr) #define MKIMAGE_MAX_DTC_CMDLINE_LEN 512 #define MKIMAGE_DTC "dtc" /* assume dtc is in $PATH */ -#define IH_ARCH_DEFAULT IH_ARCH_INVALID - -/* - * This structure defines all such variables those are initialized by - * mkimage main core and need to be referred by image type specific - * functions - */ -struct mkimage_params { - int dflag; - int eflag; - int fflag; - int lflag; - int vflag; - int xflag; - int skipcpy; - int os; - int arch; - int type; - int comp; - char *dtc; - unsigned int addr; - unsigned int ep; - char *imagename; - char *imagename2; - char *datafile; - char *imagefile; - char *cmdname; - const char *keydir; /* Directory holding private keys */ - const char *keydest; /* Destination .dtb for public key */ - const char *comment; /* Comment to add to signature node */ - int require_keys; /* 1 to mark signing keys as 'required' */ -}; - -/* - * image type specific variables and callback functions - */ -struct image_type_params { - /* name is an identification tag string for added support */ - char *name; - /* - * header size is local to the specific image type to be supported, - * mkimage core treats this as number of bytes - */ - uint32_t header_size; - /* Image type header pointer */ - void *hdr; - /* - * There are several arguments that are passed on the command line - * and are registered as flags in mkimage_params structure. - * This callback function can be used to check the passed arguments - * are in-lined with the image type to be supported - * - * Returns 1 if parameter check is successful - */ - int (*check_params) (struct mkimage_params *); - /* - * This function is used by list command (i.e. mkimage -l <filename>) - * image type verification code must be put here - * - * Returns 0 if image header verification is successful - * otherwise, returns respective negative error codes - */ - int (*verify_header) (unsigned char *, int, struct mkimage_params *); - /* Prints image information abstracting from image header */ - void (*print_header) (const void *); - /* - * The header or image contents need to be set as per image type to - * be generated using this callback function. - * further output file post processing (for ex. checksum calculation, - * padding bytes etc..) can also be done in this callback function. - */ - void (*set_header) (void *, struct stat *, int, - struct mkimage_params *); - /* - * Some image generation support for ex (default image type) supports - * more than one type_ids, this callback function is used to check - * whether input (-T <image_type>) is supported by registered image - * generation/list low level code - */ - int (*check_image_type) (uint8_t); - /* This callback function will be executed if fflag is defined */ - int (*fflag_handle) (struct mkimage_params *); - /* - * This callback function will be executed for variable size record - * It is expected to build this header in memory and return its length - * and a pointer to it by using image_type_params.header_size and - * image_type_params.hdr. The return value shall indicate if an - * additional padding should be used when copying the data image - * by returning the padding length. - */ - int (*vrec_header) (struct mkimage_params *, - struct image_type_params *); - /* pointer to the next registered entry in linked list */ - struct image_type_params *next; -}; - -/* - * Exported functions - */ -void mkimage_register (struct image_type_params *tparams); - -/* - * There is a c file associated with supported image type low level code - * for ex. default_image.c, fit_image.c - * init is the only function referred by mkimage core. - * to avoid a single lined header file, you can define them here - * - * Supported image types init functions - */ -void pbl_load_uboot(int fd, struct mkimage_params *mparams); -void init_pbl_image_type(void); -void init_ais_image_type(void); -void init_kwb_image_type (void); -void init_imx_image_type (void); -void init_mxs_image_type(void); -void init_default_image_type (void); -void init_fit_image_type (void); -void init_ubl_image_type(void); -void init_omap_image_type(void); - #endif /* _MKIIMAGE_H_ */ diff --git a/tools/mxsimage.c b/tools/mxsimage.c index 7bd9deef5f..045b35a39b 100644 --- a/tools/mxsimage.c +++ b/tools/mxsimage.c @@ -17,7 +17,7 @@ #include <openssl/evp.h> -#include "mkimage.h" +#include "imagetool.h" #include "mxsimage.h" #include <image.h> @@ -2149,11 +2149,11 @@ static int mxsimage_check_image_types(uint8_t type) } static void mxsimage_set_header(void *ptr, struct stat *sbuf, int ifd, - struct mkimage_params *params) + struct image_tool_params *params) { } -int mxsimage_check_params(struct mkimage_params *params) +int mxsimage_check_params(struct image_tool_params *params) { if (!params) return -1; @@ -2194,7 +2194,7 @@ static int mxsimage_verify_print_header(char *file, int silent) char *imagefile; static int mxsimage_verify_header(unsigned char *ptr, int image_size, - struct mkimage_params *params) + struct image_tool_params *params) { struct sb_boot_image_header *hdr; @@ -2292,7 +2292,7 @@ static int sb_build_image(struct sb_image_ctx *ictx, return 0; } -static int mxsimage_generate(struct mkimage_params *params, +static int mxsimage_generate(struct image_tool_params *params, struct image_type_params *tparams) { int ret; @@ -2338,7 +2338,7 @@ static struct image_type_params mxsimage_params = { void init_mxs_image_type(void) { - mkimage_register(&mxsimage_params); + register_image_type(&mxsimage_params); } #else diff --git a/tools/omapimage.c b/tools/omapimage.c index 8774a7e3ac..d59bc4d40d 100644 --- a/tools/omapimage.c +++ b/tools/omapimage.c @@ -14,7 +14,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include "mkimage.h" +#include "imagetool.h" #include <image.h> #include "omapimage.h" @@ -69,7 +69,7 @@ static int valid_gph_load_addr(uint32_t load_addr) } static int omapimage_verify_header(unsigned char *ptr, int image_size, - struct mkimage_params *params) + struct image_tool_params *params) { struct ch_toc *toc = (struct ch_toc *)ptr; struct gp_header *gph = (struct gp_header *)(ptr+OMAP_CH_HDR_SIZE); @@ -188,7 +188,7 @@ static int toc_offset(void *hdr, void *member) } static void omapimage_set_header(void *ptr, struct stat *sbuf, int ifd, - struct mkimage_params *params) + struct image_tool_params *params) { struct ch_toc *toc = (struct ch_toc *)ptr; struct ch_settings *chs = (struct ch_settings *) @@ -224,7 +224,7 @@ static void omapimage_set_header(void *ptr, struct stat *sbuf, int ifd, } } -int omapimage_check_params(struct mkimage_params *params) +int omapimage_check_params(struct image_tool_params *params) { return (params->dflag && (params->fflag || params->lflag)) || (params->fflag && (params->dflag || params->lflag)) || @@ -247,5 +247,5 @@ static struct image_type_params omapimage_params = { void init_omap_image_type(void) { - mkimage_register(&omapimage_params); + register_image_type(&omapimage_params); } diff --git a/tools/pblimage.c b/tools/pblimage.c index bac5faff98..ef3d7f6296 100644 --- a/tools/pblimage.c +++ b/tools/pblimage.c @@ -3,7 +3,7 @@ * * SPDX-License-Identifier: GPL-2.0+ */ -#include "mkimage.h" +#include "imagetool.h" #include <image.h> #include "pblimage.h" @@ -242,7 +242,7 @@ static void add_end_cmd(void) } } -void pbl_load_uboot(int ifd, struct mkimage_params *params) +void pbl_load_uboot(int ifd, struct image_tool_params *params) { FILE *fp_uboot; int size; @@ -281,7 +281,7 @@ static int pblimage_check_image_types(uint8_t type) } static int pblimage_verify_header(unsigned char *ptr, int image_size, - struct mkimage_params *params) + struct image_tool_params *params) { struct pbl_header *pbl_hdr = (struct pbl_header *) ptr; @@ -308,7 +308,7 @@ static void pblimage_print_header(const void *ptr) } static void pblimage_set_header(void *ptr, struct stat *sbuf, int ifd, - struct mkimage_params *params) + struct image_tool_params *params) { /*nothing need to do, pbl_load_uboot takes care of whole file. */ } @@ -327,5 +327,5 @@ static struct image_type_params pblimage_params = { void init_pbl_image_type(void) { pbl_size = 0; - mkimage_register(&pblimage_params); + register_image_type(&pblimage_params); } diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c new file mode 100644 index 0000000000..93b4c3923e --- /dev/null +++ b/tools/relocate-rela.c @@ -0,0 +1,189 @@ +/* + * Copyright 2013 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ BSD-2-Clause + * + * 64-bit and little-endian target only until we need to support a different + * arch that needs this. + */ + +#include <elf.h> +#include <errno.h> +#include <inttypes.h> +#include <stdarg.h> +#include <stdbool.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +#ifndef R_AARCH64_RELATIVE +#define R_AARCH64_RELATIVE 1027 +#endif + +static const bool debug_en; + +static void debug(const char *fmt, ...) +{ + va_list args; + + va_start(args, fmt); + if (debug_en) + vprintf(fmt, args); +} + +static bool supported_rela(Elf64_Rela *rela) +{ + uint64_t mask = 0xffffffffULL; /* would be different on 32-bit */ + uint32_t type = rela->r_info & mask; + + switch (type) { +#ifdef R_AARCH64_RELATIVE + case R_AARCH64_RELATIVE: + return true; +#endif + default: + fprintf(stderr, "warning: unsupported relocation type %" + PRIu32 " at %" PRIx64 "\n", + type, rela->r_offset); + + return false; + } +} + +static inline uint64_t swap64(uint64_t val) +{ + return ((val >> 56) & 0x00000000000000ffULL) | + ((val >> 40) & 0x000000000000ff00ULL) | + ((val >> 24) & 0x0000000000ff0000ULL) | + ((val >> 8) & 0x00000000ff000000ULL) | + ((val << 8) & 0x000000ff00000000ULL) | + ((val << 24) & 0x0000ff0000000000ULL) | + ((val << 40) & 0x00ff000000000000ULL) | + ((val << 56) & 0xff00000000000000ULL); +} + +#if __BYTE_ORDER == __LITTLE_ENDIAN +static inline uint64_t be64(uint64_t val) +{ + return swap64(val); +} + +static inline uint64_t le64(uint64_t val) +{ + return val; +} +#else +static inline uint64_t le64(uint64_t val) +{ + return swap64(val); +} + +static inline uint64_t be64(uint64_t val) +{ + return val; +} +#endif + +static bool read_num(const char *str, uint64_t *num) +{ + char *endptr; + *num = strtoull(str, &endptr, 16); + return str[0] && !endptr[0]; +} + +int main(int argc, char **argv) +{ + FILE *f; + int i, num; + uint64_t rela_start, rela_end, text_base; + + if (argc != 5) { + fprintf(stderr, "Statically apply ELF rela relocations\n"); + fprintf(stderr, "Usage: %s <bin file> <text base> " \ + "<rela start> <rela end>\n", argv[0]); + fprintf(stderr, "All numbers in hex.\n"); + return 1; + } + + f = fopen(argv[1], "r+b"); + if (!f) { + fprintf(stderr, "%s: Cannot open %s: %s\n", + argv[0], argv[1], strerror(errno)); + return 2; + } + + if (!read_num(argv[2], &text_base) || + !read_num(argv[3], &rela_start) || + !read_num(argv[4], &rela_end)) { + fprintf(stderr, "%s: bad number\n", argv[0]); + return 3; + } + + if (rela_start > rela_end || rela_start < text_base || + (rela_end - rela_start) % 24) { + fprintf(stderr, "%s: bad rela bounds\n", argv[0]); + return 3; + } + + rela_start -= text_base; + rela_end -= text_base; + + num = (rela_end - rela_start) / sizeof(Elf64_Rela); + + for (i = 0; i < num; i++) { + Elf64_Rela rela, swrela; + uint64_t pos = rela_start + sizeof(Elf64_Rela) * i; + uint64_t addr; + + if (fseek(f, pos, SEEK_SET) < 0) { + fprintf(stderr, "%s: %s: seek to %" PRIx64 + " failed: %s\n", + argv[0], argv[1], pos, strerror(errno)); + } + + if (fread(&rela, sizeof(rela), 1, f) != 1) { + fprintf(stderr, "%s: %s: read rela failed at %" + PRIx64 "\n", + argv[0], argv[1], pos); + return 4; + } + + swrela.r_offset = le64(rela.r_offset); + swrela.r_info = le64(rela.r_info); + swrela.r_addend = le64(rela.r_addend); + + if (!supported_rela(&swrela)) + continue; + + debug("Rela %" PRIx64 " %" PRIu64 " %" PRIx64 "\n", + swrela.r_offset, swrela.r_info, swrela.r_addend); + + if (swrela.r_offset < text_base) { + fprintf(stderr, "%s: %s: bad rela at %" PRIx64 "\n", + argv[0], argv[1], pos); + return 4; + } + + addr = swrela.r_offset - text_base; + + if (fseek(f, addr, SEEK_SET) < 0) { + fprintf(stderr, "%s: %s: seek to %" + PRIx64 " failed: %s\n", + argv[0], argv[1], addr, strerror(errno)); + } + + if (fwrite(&rela.r_addend, sizeof(rela.r_addend), 1, f) != 1) { + fprintf(stderr, "%s: %s: write failed at %" PRIx64 "\n", + argv[0], argv[1], addr); + return 4; + } + } + + if (fclose(f) < 0) { + fprintf(stderr, "%s: %s: close failed: %s\n", + argv[0], argv[1], strerror(errno)); + return 4; + } + + return 0; +} diff --git a/tools/ublimage.c b/tools/ublimage.c index aafe248758..cbbbe205da 100644 --- a/tools/ublimage.c +++ b/tools/ublimage.c @@ -13,7 +13,7 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include "mkimage.h" +#include "imagetool.h" #include <image.h> #include "ublimage.h" @@ -193,7 +193,7 @@ static int ublimage_check_image_types(uint8_t type) } static int ublimage_verify_header(unsigned char *ptr, int image_size, - struct mkimage_params *params) + struct image_tool_params *params) { struct ubl_header *ubl_hdr = (struct ubl_header *)ptr; @@ -211,7 +211,7 @@ static void ublimage_print_header(const void *ptr) } static void ublimage_set_header(void *ptr, struct stat *sbuf, int ifd, - struct mkimage_params *params) + struct image_tool_params *params) { struct ubl_header *ublhdr = (struct ubl_header *)ptr; @@ -219,7 +219,7 @@ static void ublimage_set_header(void *ptr, struct stat *sbuf, int ifd, parse_cfg_file(ublhdr, params->imagename); } -int ublimage_check_params(struct mkimage_params *params) +int ublimage_check_params(struct image_tool_params *params) { if (!params) return CFG_INVALID; @@ -257,5 +257,5 @@ static struct image_type_params ublimage_params = { void init_ubl_image_type(void) { - mkimage_register(&ublimage_params); + register_image_type(&ublimage_params); } |