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-rw-r--r--board/nvidia/seaboard/flashmap-2mb.dtsi120
-rw-r--r--board/nvidia/seaboard/flashmap-ro.dtsi (renamed from board/nvidia/seaboard/flashmap-twostop-ro-submap.dtsi)55
-rw-r--r--board/nvidia/seaboard/flashmap-twostop-2mb.dtsi124
-rw-r--r--board/nvidia/seaboard/flashmap-twostop-4mb.dtsi150
-rw-r--r--board/nvidia/seaboard/flashmap-twostop-seaboard.dtsi86
-rw-r--r--board/nvidia/seaboard/flashmap-twostop.dtsi100
-rw-r--r--board/nvidia/seaboard/onestop-layout.dtsi45
-rw-r--r--board/nvidia/seaboard/tegra2-aebl.dts2
-rw-r--r--board/nvidia/seaboard/tegra2-kaen.dts2
-rw-r--r--board/nvidia/seaboard/tegra2-seaboard.dts4
-rw-r--r--common/cmd_vboot_twostop.c37
-rw-r--r--include/chromeos/fdt_decode.h31
-rw-r--r--lib/chromeos/Makefile4
-rw-r--r--lib/chromeos/fdt_decode.c156
14 files changed, 429 insertions, 487 deletions
diff --git a/board/nvidia/seaboard/flashmap-2mb.dtsi b/board/nvidia/seaboard/flashmap-2mb.dtsi
deleted file mode 100644
index ab9ffb8f327..00000000000
--- a/board/nvidia/seaboard/flashmap-2mb.dtsi
+++ /dev/null
@@ -1,120 +0,0 @@
-/*
- * Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/*
- * This is the flash map for a 2MB device. It defines all the areas that
- * Chrome OS expects to find in its firmware device. The device is split into
- * a number of top-level sections, and within each are several areas.
- */
-
-/ {
- flash {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "chromeos,flashmap";
- reg = <0x00000000 0x00200000>;
-
- /* ---- Section: Read-only ---- */
- readonly {
- #address-cells = <1>;
- #size-cells = <1>;
-
- /*
- * This was 0xf0000 in the config file, but I have
- * moved vpd into the same section
- */
- reg = <0x00000000 0x00100000>;
- stub {
- reg = <0x00000000 0x00088000>;
- };
- recovery {
- reg = <0x00088000 0x00040000>;
- };
- data {
- reg = <0x000c8000 0x00008000>;
- };
- fmap {
- reg = <0x000c8000 0x00000400>;
- };
- fwid {
- reg = <0x000c8400 0x00000100>;
- };
- gbb {
- reg = <0x000d0000 0x00020000>;
- };
- vpd {
- reg = <0x000f0000 0x00010000>;
- };
- };
-
- /* ---- Section: Rewritable slot A ---- */
- readwrite-a {
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0x00100000 0x00078000>;
- vblock {
- reg = <0x00100000 0x00010000>;
- };
- main {
- reg = <0x00110000 0x00067f00>;
- };
- fwid {
- reg = <0x00177f00 0x00000100>;
- };
- data {
- reg = <0x00100000 0x00000000>;
- };
- };
-
- /* ---- Section: Rewritable slot B ---- */
- readwrite-b {
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0x00178000 0x00078000>;
- vblock {
- reg = <0x00178000 0x00010000>;
- };
- main {
- reg = <0x00188000 0x00067f00>;
- };
- fwid {
- reg = <0x001eff00 0x00000100>;
- };
- data {
- reg = <0x00178000 0x00000000>;
- };
- };
-
- /* ---- Section: Rewritable VPD ---- */
- readwrite-vpd {
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0x001f0000 0x00008000>;
- vpd {
- reg = <0x001f0000 0x00008000>;
- };
- };
-
- /* ---- Section: Rewritable shared ---- */
- readwrite-shared {
- #address-cells = <1>;
- #size-cells = <1>;
- dev-cfg {
- reg = <0x001f8000 0x00004000>;
- };
- shared-data {
- reg = <0x001fc000 0x00002000>;
- };
- vbnv-context {
- reg = <0x001fe000 0x00001000>;
- };
- env {
- reg = <0x001ff000 0x00001000>;
- };
- };
- };
-
-};
diff --git a/board/nvidia/seaboard/flashmap-twostop-ro-submap.dtsi b/board/nvidia/seaboard/flashmap-ro.dtsi
index f8c943f16db..a7ce7dbd18f 100644
--- a/board/nvidia/seaboard/flashmap-twostop-ro-submap.dtsi
+++ b/board/nvidia/seaboard/flashmap-ro.dtsi
@@ -16,26 +16,45 @@
*/
/ {
+ chromeos-config {
+ twostop; /* Two-stop boot */
+ twostop-optional; /* One-stop optimization enabled */
+ textbase = <0xe08000>; /* Address where U-Boot loads */
+
+ /*
+ * Device and offset for second-stage firmware, in SPI for now
+ * second-stage = <&emmc 0x00000080 0>;
+ */
+ };
+
+ /*
+ * Labels have been selected to be to compatible with existing tools,
+ * even thought the terminology may be a little different on ARM.
+ * Names will be capitalized and hyphen converted to underscore by
+ * cros_bundle_firmware.
+ */
flash@0 {
- readonly@0 {
- label = "readonly";
- reg = <0x00000000 0x00100000>;
+ /* ---- Section: Read-only ---- */
+ ro-section@0 {
+ label = "ro-section";
+ reg = <0x00000000 0x000f0000>;
read-only;
};
- ro-firmware-image@0 {
- label = "ro-firmware-image";
+ ro-boot@0 {
+ label = "boot-stub";
reg = <0x00000000 0x000bfb00>; /* ~785 KB */
read-only;
type = "blob signed";
};
ro-firmware-id@bfb00 {
- label = "ro-onestop";
+ label = "ro-frid";
reg = <0x000bfb00 0x00000100>;
- read-only;
+ read-only;
+ type = "blobstring fwid";
};
- gbb@bfc00 {
+ ro-gbb@bfc00 {
label = "gbb";
reg = <0x000bfc00 0x00020000>;
read-only;
@@ -46,20 +65,22 @@
reg = <0x000dfc00 0x00010000>;
read-only;
};
- ro-vpd@efc00 {
- label = "ro-vpd";
- reg = <0x000efc00 0x00010000>;
- read-only;
- type = "wiped";
- wipe-value = [ff];
- };
- fmap@ffc00 {
+ ro-fmap@ffc00 {
label = "ro-fmap";
- reg = <0x000ffc00 0x00000400>;
+ reg = <0x000efc00 0x00000400>;
read-only;
type = "fmap";
ver-major = <1>;
ver-minor = <0>;
};
+
+ /* ---- Section: Vital-product data (VPD) ---- */
+ ro-vpd@efc00 {
+ label = "ro-vpd";
+ reg = <0x000f0000 0x00010000>;
+ read-only;
+ type = "wiped";
+ wipe-value = [ff];
+ };
};
};
diff --git a/board/nvidia/seaboard/flashmap-twostop-2mb.dtsi b/board/nvidia/seaboard/flashmap-twostop-2mb.dtsi
new file mode 100644
index 00000000000..2aa10455697
--- /dev/null
+++ b/board/nvidia/seaboard/flashmap-twostop-2mb.dtsi
@@ -0,0 +1,124 @@
+/*
+* Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
+* Use of this source code is governed by a BSD-style license that can be
+* found in the LICENSE file.
+*/
+
+/*
+* This is the flash map (fmap) for a twostop firmware. It defines all the areas
+* that Chrome OS expects to find in its firmware device. The device is split
+* into a number of top-level sections, and within each are several areas.
+*
+* Available flags for each entry are: read-only, compresed.
+* All sections will be marked static in the fmap.
+*/
+
+/include/ "flashmap-ro.dtsi"
+
+/ {
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "winbond,W25Q16BVSSIG", "cfi-flash",
+ "chromeos,flashmap";
+ reg = <0x00000000 0x00200000>;
+
+ /* ---- Section: Rewritable slot A ---- */
+ rw-a@100000 {
+ label = "rw-section-a";
+ reg = <0x00100000 0x00078000>;
+ block-lba = <0x00000022>;
+ };
+ rw-a-boot@100000 {
+ label = "fw-main-a";
+ reg = <0x00100000 0x00076000>;
+ type = "blob boot";
+ };
+ rw-a-vblock@176000 {
+ label = "vblock-a";
+ reg = <0x00176000 0x00001f00>;
+ type = "keyblock boot";
+ keyblock = "dev_firmware.keyblock";
+ signprivate = "dev_firmware_data_key.vbprivk";
+ version = <1>;
+ kernelkey = "kernel_subkey.vbpubk";
+ preamble-flags = <1>;
+ };
+ rw-a-firmware-id@177f00 {
+ label = "rw-fwid-a";
+ reg = <0x00177f00 0x00000100>;
+ read-only;
+ type = "blobstring fwid";
+ };
+
+ /* ---- Section: Rewritable slot B ---- */
+ rw-b@178000 {
+ label = "rw-section-b";
+ reg = <0x00178000 0x00078000>;
+ block-lba = <0x00000422>;
+ };
+ rw-b-boot@178000 {
+ label = "fw-main-b";
+ reg = <0x00178000 0x00076000>;
+ type = "blob boot";
+ };
+ rw-b-vblock@1ee000 {
+ label = "vblock-b";
+ reg = <0x001ee000 0x00001f00>;
+ type = "keyblock boot";
+ keyblock = "firmware.keyblock";
+ signprivate = "firmware_data_key.vbprivk";
+ version = <1>;
+ kernelkey = "kernel_subkey.vbpubk";
+ preamble-flags = <1>;
+ };
+ rw-b-firmware-id@1eff00 {
+ label = "rw-fwid-a";
+ reg = <0x001eff00 0x00000100>;
+ read-only;
+ type = "blobstring fwid";
+ };
+
+ /* ---- Section: Rewritable VPD 32 KB ---- */
+ rw-vpd-section@1f0000 {
+ label = "rw-vpd-section";
+ reg = <0x001f0000 0x00008000>;
+ };
+ rw-vpd@1f0000 {
+ label = "rw-vpd";
+ reg = <0x001f0000 0x00008000>;
+ type = "wiped";
+ wipe-value = [ff];
+ };
+
+ /* ---- Section: Rewritable shared 32 KB---- */
+ shared-section@1f8000 {
+ label = "rw-shared";
+ reg = <0x001f8000 0x00006000>;
+ };
+ shared-dev-cfg@1f8000 {
+ label = "dev-cfg";
+ reg = <0x001f8000 0x00000000>;
+ type = "wiped";
+ wipe-value = [00];
+ };
+ shared-data@1f8000 {
+ label = "shared-data";
+ reg = <0x001f8000 0x00006000>;
+ type = "wiped";
+ wipe-value = [00];
+ };
+ shared-env@1fe000 {
+ label = "shared-env";
+ reg = <0x001fe000 0x00002000>;
+
+ /*
+ * We could put the dev environment here, but U-Boot
+ * has a default built in. Devs can 'saveenv' to set
+ * this up.
+ */
+ type = "wiped";
+ wipe-value = [00];
+ };
+ };
+};
diff --git a/board/nvidia/seaboard/flashmap-twostop-4mb.dtsi b/board/nvidia/seaboard/flashmap-twostop-4mb.dtsi
new file mode 100644
index 00000000000..59ddff76fae
--- /dev/null
+++ b/board/nvidia/seaboard/flashmap-twostop-4mb.dtsi
@@ -0,0 +1,150 @@
+/*
+* Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
+* Use of this source code is governed by a BSD-style license that can be
+* found in the LICENSE file.
+*/
+
+/*
+* This is the flash map (fmap) for a twostop firmware. It defines all the areas
+* that Chrome OS expects to find in its firmware device. The device is split
+* into a number of top-level sections, and within each are several areas.
+*
+* Available flags for each entry are: read-only, compresed.
+* All sections will be marked static in the fmap.
+*/
+
+/include/ "flashmap-ro.dtsi"
+
+/*
+* TODO: Although we can squeeze R/O and R/W blobs into 2 MB, we do not do
+* so because:
+*
+* - (A minor reason) Not every 4 MB flash chip can write-protect just the
+* first 1 MB.
+*
+* - (The main reason) We do not know how many tools or scripts implicitly
+* assume that R/O section consumes the first half 2 MB.
+*
+* In the long run, we should find and fix all those tools and scripts that
+* have incorrect implicit assumption of R/O section, but for now, we just
+* cannot squeeze the image size down to 2 MB at the risk of wrongly write-
+* protecting the R/W blobs.
+*/
+
+/ {
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "winbond,W25Q32BVSSIG", "cfi-flash",
+ "chromeos,flashmap";
+ reg = <0x00000000 0x00400000>;
+
+ /* ---- Section: Spare. unused 1MB---- */
+ ro-spare@100000 {
+ label = "shared-spare";
+ reg = <0x00100000 0x00100000>;
+ };
+
+ /* ---- Section: Rewritable slot A ---- */
+ rw-a@200000 {
+ label = "rw-section-a";
+ reg = <0x00200000 0x00078000>;
+ };
+ rw-a-boot@200000 {
+ label = "fw-main-a";
+ reg = <0x00200000 0x00076000>;
+ type = "blob boot";
+ };
+ rw-a-vblock@276000 {
+ label = "vblock-a";
+ reg = <0x00276000 0x00001f00>;
+ type = "keyblock boot";
+ keyblock = "dev_firmware.keyblock";
+ signprivate = "dev_firmware_data_key.vbprivk";
+ version = <1>;
+ kernelkey = "kernel_subkey.vbpubk";
+ preamble-flags = <1>;
+ };
+ rw-a-firmware-id@277f00 {
+ label = "rw-fwid-a";
+ reg = <0x00277f00 0x00000100>;
+ read-only;
+ type = "blobstring fwid";
+ };
+
+ /* ---- Section: Rewritable slot B ---- */
+ rw-b@278000 {
+ label = "rw-section-b";
+ reg = <0x00278000 0x00078000>;
+ };
+ rw-b-boot@278000 {
+ label = "fw-main-b";
+ reg = <0x00278000 0x00076000>;
+ type = "blob boot";
+ };
+ rw-b-vblock@2ee000 {
+ label = "vblock-b";
+ reg = <0x002ee000 0x00001f00>;
+ type = "keyblock boot";
+ keyblock = "firmware.keyblock";
+ signprivate = "firmware_data_key.vbprivk";
+ version = <1>;
+ kernelkey = "kernel_subkey.vbpubk";
+ preamble-flags = <1>;
+ };
+ rw-b-firmware-id@2eff00 {
+ label = "rw-fwid-a";
+ reg = <0x002eff00 0x00000100>;
+ read-only;
+ type = "blobstring fwid";
+ };
+
+ /* ---- Section: Rewritable VPD 32 KB ---- */
+ rw-vpd-section@2f0000 {
+ label = "rw-vpd-section";
+ reg = <0x002f0000 0x00008000>;
+ };
+ rw-vpd@2f0000 {
+ label = "rw-vpd";
+ reg = <0x002f0000 0x00008000>;
+ type = "wiped";
+ wipe-value = [ff];
+ };
+
+ /* ---- Section: Rewritable shared 32 KB---- */
+ shared-section@2f8000 {
+ label = "rw-shared";
+ reg = <0x002f8000 0x00006000>;
+ };
+ shared-dev-cfg@2f8000 {
+ label = "dev-cfg";
+ reg = <0x002f8000 0x00000000>;
+ type = "wiped";
+ wipe-value = [00];
+ };
+ shared-data@2f8000 {
+ label = "shared-data";
+ reg = <0x002f8000 0x00006000>;
+ type = "wiped";
+ wipe-value = [00];
+ };
+ shared-env@2fe000 {
+ label = "shared-env";
+ reg = <0x002fe000 0x00002000>;
+
+ /*
+ * We could put the dev environment here, but U-Boot
+ * has a default built in. Devs can 'saveenv' to set
+ * this up.
+ */
+ type = "wiped";
+ wipe-value = [00];
+ };
+
+ /* ---- Section: Spare. unused 1MB---- */
+ shared-spare@300000 {
+ label = "shared-spare";
+ reg = <0x00300000 0x00100000>;
+ };
+ };
+};
diff --git a/board/nvidia/seaboard/flashmap-twostop-seaboard.dtsi b/board/nvidia/seaboard/flashmap-twostop-seaboard.dtsi
deleted file mode 100644
index 45c5a8f9112..00000000000
--- a/board/nvidia/seaboard/flashmap-twostop-seaboard.dtsi
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/*
- * This is the flash map (fmap) for a twostop firmware. It defines all the areas
- * that Chrome OS expects to find in its firmware device. The device is split
- * into a number of top-level sections, and within each are several areas.
- *
- * Available flags for each entry are: read-only, compresed.
- * All sections will be marked static in the fmap.
- */
-
-/include/ "onestop-layout.dtsi"
-/include/ "flashmap-twostop-ro-submap.dtsi"
-
-/ {
- flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "winbond,W25Q32BVSSIG", "cfi-flash",
- "chromeos,flashmap";
- reg = <0x00000000 0x00200000>;
-
- /* ---- Section: Readwrite ---- */
- readwrite@1e4000 {
- label = "readwrite";
- reg = <0x001e4000 0x00000000>;
- };
- rw-vpd@1e4000 {
- label = "rw-vpd";
- reg = <0x001e4000 0x00001000>;
- type = "wiped";
- wipe-value = [ff];
- };
- shared-dev-cfg@1e5000 {
- label = "shared-dev-cfg";
- reg = <0x001e5000 0x00001000>;
- type = "wiped";
- wipe-value = [00];
- };
- shared-data@1e6000 {
- label = "shared-data";
- reg = <0x001e6000 0x00001000>;
- type = "wiped";
- wipe-value = [00];
- };
- shared-env@1e7000 {
- label = "shared-env";
- reg = <0x001e7000 0x00019000>;
-
- /*
- * We could put the dev environment here, but U-Boot
- * has a default built in. Devs can 'saveenv' to set
- * this up.
- */
- type = "wiped";
- wipe-value = [00];
- };
-
- /* ---- Section: Readwrite Slot A and B ---- */
- /* So far only onestop is put into readwrite A/B section */
- readwrite-a@100000 {
- label = "readwrite-a";
- reg = <0x00100000 0x00072000>;
- block-lba = <0x00000022>;
- };
- rw-a-onestop@100000 {
- label = "rw-a-onestop";
- reg = <0x00100000 0x00072000>;
- type = "blob boot";
- };
- readwrite-b@172000 {
- label = "readwrite-b";
- reg = <0x00172000 0x00072000>;
- block-lba = <0x00000422>;
- };
- rw-b-onestop@172000 {
- label = "rw-b-onestop";
- reg = <0x00172000 0x00072000>;
- type = "blob boot";
- };
- };
-};
diff --git a/board/nvidia/seaboard/flashmap-twostop.dtsi b/board/nvidia/seaboard/flashmap-twostop.dtsi
deleted file mode 100644
index ed2b4bab780..00000000000
--- a/board/nvidia/seaboard/flashmap-twostop.dtsi
+++ /dev/null
@@ -1,100 +0,0 @@
-/*
- * Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/*
- * This is the flash map (fmap) for a twostop firmware. It defines all the areas
- * that Chrome OS expects to find in its firmware device. The device is split
- * into a number of top-level sections, and within each are several areas.
- *
- * Available flags for each entry are: read-only, compresed.
- * All sections will be marked static in the fmap.
- */
-
-/include/ "onestop-layout.dtsi"
-/include/ "flashmap-twostop-ro-submap.dtsi"
-
-/*
- * TODO: Although we can squeeze R/O and R/W blobs into 2 MB, we do not do
- * so because:
- *
- * - (A minor reason) Not every 4 MB flash chip can write-protect just the
- * first 1 MB.
- *
- * - (The main reason) We do not know how many tools or scripts implicitly
- * assume that R/O section consumes the first half 2 MB.
- *
- * In the long run, we should find and fix all those tools and scripts that
- * have incorrect implicit assumption of R/O section, but for now, we just
- * cannot squeeze the image size down to 2 MB at the risk of wrongly write-
- * protecting the R/W blobs.
- */
-
-/ {
- flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "winbond,W25Q32BVSSIG", "cfi-flash",
- "chromeos,flashmap";
- reg = <0x00000000 0x00400000>;
-
- /* ---- Section: Readwrite ---- */
- readwrite@300000 {
- label = "readwrite";
- reg = <0x00300000 0x00100000>;
- };
- rw-vpd@300000 {
- label = "rw-vpd";
- reg = <0x00300000 0x00080000>;
- type = "wiped";
- wipe-value = [ff];
- };
- shared-dev-cfg@380000 {
- label = "shared-dev-cfg";
- reg = <0x00380000 0x00040000>;
- type = "wiped";
- wipe-value = [00];
- };
- shared-data@3c0000 {
- label = "shared-data";
- reg = <0x003c0000 0x00030000>;
- type = "wiped";
- wipe-value = [00];
- };
- shared-env@3f0000 {
- label = "shared-env";
- reg = <0x003f0000 0x00010000>;
-
- /*
- * We could put the dev environment here, but U-Boot
- * has a default built in. Devs can 'saveenv' to set
- * this up.
- */
- type = "wiped";
- wipe-value = [00];
- };
-
- /* ---- Section: Readwrite Slot A and B ---- */
- /* So far only a onestop blob is put into readwrite A/B slot */
- readwrite-a@200000 {
- label = "readwrite-a";
- reg = <0x00200000 0x00080000>;
- block-lba = <0x00000022>;
- };
- rw-a-onestop@200000 {
- label = "rw-a-onestop";
- reg = <0x00200000 0x00072000>;
- };
- readwrite-b@280000 {
- label = "readwrite-b";
- reg = <0x00280000 0x00080000>;
- block-lba = <0x00000422>;
- };
- rw-b-onestop@280000 {
- label = "rw-b-onestop";
- reg = <0x00280000 0x00072000>;
- };
- };
-};
diff --git a/board/nvidia/seaboard/onestop-layout.dtsi b/board/nvidia/seaboard/onestop-layout.dtsi
deleted file mode 100644
index 994051ad795..00000000000
--- a/board/nvidia/seaboard/onestop-layout.dtsi
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/*
- * This is a flash map (fmap) defines the internal layout of onestop blobs
- * in R/W slot A and slot B. Given that, the addresses here are interpreted
- * as relative offset from its enclosing onestop blob.
- *
- * The onestop layout is made smaller than 512 KB so that two onestop blobs
- * together are smaller than 1 MB and it is possible to squeeze the entire
- * R/W section into 1 MB (the R/W section includes two onestop blobs and
- * read-write data blobs).
- */
-
-/ {
- flash@0 {
- /* total size of onestop blob: ~468 KB */
- onestop-layout {
- label = "onestop-layout";
- reg = <0x00000000 0x00072000>;
- type = "blob boot";
- };
-
- /* U-Boot image including fdt: ~460 KB */
- firmware-image {
- label = "firmware-image";
- reg = <0x00000000 0x00070000>;
- };
-
- /* verification block: ~8 KB */
- verification-block {
- label = "verification-block";
- reg = <0x00070000 0x00001f00>;
- };
-
- /* frimware ID: 256 Bytes */
- firmware-id {
- label = "firmware-id";
- reg = <0x00071f00 0x00000100>;
- };
- };
-};
diff --git a/board/nvidia/seaboard/tegra2-aebl.dts b/board/nvidia/seaboard/tegra2-aebl.dts
index dbc6a1bf7b2..ae635d97506 100644
--- a/board/nvidia/seaboard/tegra2-aebl.dts
+++ b/board/nvidia/seaboard/tegra2-aebl.dts
@@ -2,7 +2,7 @@
/memreserve/ 0x1c000000 0x04000000;
/include/ "tegra250.dtsi"
-/include/ "flashmap-twostop.dtsi"
+/include/ "flashmap-twostop-4mb.dtsi"
/ {
model = "Google Aebl";
diff --git a/board/nvidia/seaboard/tegra2-kaen.dts b/board/nvidia/seaboard/tegra2-kaen.dts
index 03a7cef396d..179a2184e5e 100644
--- a/board/nvidia/seaboard/tegra2-kaen.dts
+++ b/board/nvidia/seaboard/tegra2-kaen.dts
@@ -2,7 +2,7 @@
/memreserve/ 0x1c000000 0x04000000;
/include/ "tegra250.dtsi"
-/include/ "flashmap-twostop.dtsi"
+/include/ "flashmap-twostop-4mb.dtsi"
/ {
model = "Google Kaen";
diff --git a/board/nvidia/seaboard/tegra2-seaboard.dts b/board/nvidia/seaboard/tegra2-seaboard.dts
index 34b7aa24e0b..bb3b00fb867 100644
--- a/board/nvidia/seaboard/tegra2-seaboard.dts
+++ b/board/nvidia/seaboard/tegra2-seaboard.dts
@@ -2,7 +2,7 @@
/memreserve/ 0x1c000000 0x04000000;
/include/ "tegra250.dtsi"
-/include/ "flashmap-twostop-seaboard.dtsi"
+/include/ "flashmap-twostop-2mb.dtsi"
/ {
model = "NVIDIA Seaboard";
@@ -76,7 +76,7 @@
power-gpio = <&gpio 70 3>; /* power enable, gpio PI6 */
};
- sdhci@c8000600 {
+ emmc: sdhci@c8000600 {
status = "ok";
width = <4>; /* width of SDIO port */
removable = <0>;
diff --git a/common/cmd_vboot_twostop.c b/common/cmd_vboot_twostop.c
index 9b461c89ecc..53a169be5ec 100644
--- a/common/cmd_vboot_twostop.c
+++ b/common/cmd_vboot_twostop.c
@@ -113,25 +113,24 @@ int twostop_read_firmware_id(twostop_t *tdata,
char *firmware_id)
{
const struct fdt_twostop_fmap const *fmap = &tdata->fmap;
- uint32_t firmware_id_offset = fmap->onestop_layout.fwid.offset;
+ const struct fdt_fmap_entry *entry;
switch (tdata->whoami) {
case I_AM_RO_FW:
- firmware_id_offset = fmap->readonly.ro_firmware_id.offset;
+ entry = &fmap->readonly.firmware_id;
break;
case I_AM_RW_A_FW:
- firmware_id_offset += fmap->readwrite_a.rw_a_onestop.offset;
+ entry = &fmap->readwrite_a.firmware_id;
break;
case I_AM_RW_B_FW:
- firmware_id_offset += fmap->readwrite_b.rw_b_onestop.offset;
+ entry = &fmap->readwrite_b.firmware_id;
break;
default:
VBDEBUG(PREFIX "unknown: whoami: %d\n", tdata->whoami);
return -1;
}
- return file->read(file, firmware_id_offset,
- fmap->onestop_layout.fwid.length,
+ return file->read(file, entry->offset, entry->length,
firmware_id);
}
@@ -280,10 +279,11 @@ boot_target_t twostop_select_boot_target(twostop_t *tdata,
const struct fdt_twostop_fmap const *fmap = &tdata->fmap;
boot_target_t target = BOOT_RECOVERY;
VbError_t err;
- uint32_t base[2], voffset, vlength;
+ uint32_t vlength;
VbInitParams iparams;
VbSelectFirmwareParams fparams;
hasher_state_t s;
+ const struct fdt_firmware_entry *firmware_a, *firmware_b;
memset(&fparams, '\0', sizeof(fparams));
@@ -308,17 +308,16 @@ boot_target_t twostop_select_boot_target(twostop_t *tdata,
if (iparams.out_flags & VB_INIT_OUT_ENABLE_RECOVERY)
goto out;
- voffset = fmap->onestop_layout.vblock.offset;
- vlength = fmap->onestop_layout.vblock.length;
-
if (tdata->whoami == I_AM_RW_A_FW) {
- base[0] = base[1] = fmap->readwrite_a.rw_a_onestop.offset;
+ firmware_a = firmware_b = &fmap->readwrite_a;
} else if (tdata->whoami == I_AM_RW_B_FW) {
- base[0] = base[1] = fmap->readwrite_b.rw_b_onestop.offset;
+ firmware_a = firmware_b = &fmap->readwrite_b;
} else {
- base[0] = fmap->readwrite_a.rw_a_onestop.offset;
- base[1] = fmap->readwrite_b.rw_b_onestop.offset;
+ firmware_a = &fmap->readwrite_a;
+ firmware_b = &fmap->readwrite_b;
}
+ vlength = firmware_a->vblock.length;
+ assert(vlength == firmware_b->vblock.length);
fparams.verification_size_A = fparams.verification_size_B = vlength;
@@ -333,19 +332,19 @@ boot_target_t twostop_select_boot_target(twostop_t *tdata,
goto out;
}
- if (file->read(file, base[0] + voffset, vlength,
+ if (file->read(file, firmware_a->vblock.offset, vlength,
fparams.verification_block_A)) {
VBDEBUG(PREFIX "fail to read vblock A\n");
goto out;
}
- if (file->read(file, base[1] + voffset, vlength,
+ if (file->read(file, firmware_b->vblock.offset, vlength,
fparams.verification_block_B)) {
VBDEBUG(PREFIX "fail to read vblock B\n");
goto out;
}
- s.fw[0].offset = base[0] + fmap->onestop_layout.fwbody.offset;
- s.fw[1].offset = base[1] + fmap->onestop_layout.fwbody.offset;
+ s.fw[0].offset = firmware_a->boot.offset;
+ s.fw[1].offset = firmware_b->boot.offset;
s.fw[0].size = firmware_body_size((uint32_t)
fparams.verification_block_A);
@@ -436,6 +435,8 @@ void twostop_goto_rwfw(twostop_t *tdata, crossystem_data_t *cdata,
memmove((void *)CONFIG_SYS_TEXT_BASE, fw_blob, fw_size);
/* TODO go to second-stage firmware without extra cleanup */
+ VBDEBUG(PREFIX "Jumping to second-stage firmware at %#x, size %#x\n",
+ CONFIG_SYS_TEXT_BASE, fw_size);
cleanup_before_linux();
((void(*)(void))CONFIG_SYS_TEXT_BASE)();
}
diff --git a/include/chromeos/fdt_decode.h b/include/chromeos/fdt_decode.h
index 2073ee6238e..e9ce64c67c0 100644
--- a/include/chromeos/fdt_decode.h
+++ b/include/chromeos/fdt_decode.h
@@ -18,37 +18,26 @@ struct fdt_fmap_entry {
uint32_t length;
};
+struct fdt_firmware_entry {
+ struct fdt_fmap_entry boot; /* U-Boot */
+ struct fdt_fmap_entry vblock;
+ struct fdt_fmap_entry firmware_id;
+ uint64_t block_lba;
+};
+
/*
* Only sections that are used during booting are put here. More sections will
* be added if required.
*/
struct fdt_twostop_fmap {
struct {
- struct fdt_fmap_entry onestop_layout;
- struct fdt_fmap_entry fwbody;
- struct fdt_fmap_entry vblock;
- struct fdt_fmap_entry fwid;
- } onestop_layout;
-
- struct {
- struct fdt_fmap_entry readonly;
- struct fdt_fmap_entry ro_firmware_image;
- struct fdt_fmap_entry ro_firmware_id;
struct fdt_fmap_entry fmap;
struct fdt_fmap_entry gbb;
+ struct fdt_fmap_entry firmware_id;
} readonly;
- struct {
- struct fdt_fmap_entry readwrite_a;
- struct fdt_fmap_entry rw_a_onestop;
- uint64_t block_lba;
- } readwrite_a;
-
- struct {
- struct fdt_fmap_entry readwrite_b;
- struct fdt_fmap_entry rw_b_onestop;
- uint64_t block_lba;
- } readwrite_b;
+ struct fdt_firmware_entry readwrite_a;
+ struct fdt_firmware_entry readwrite_b;
};
int fdt_decode_twostop_fmap(const void *fdt, struct fdt_twostop_fmap *config);
diff --git a/lib/chromeos/Makefile b/lib/chromeos/Makefile
index 67dbbc50f9f..395389d7eff 100644
--- a/lib/chromeos/Makefile
+++ b/lib/chromeos/Makefile
@@ -27,7 +27,9 @@ COBJS-$(CONFIG_CHROMEOS_ONESTOP) += firmware_storage_twostop.o
COBJS-$(CONFIG_CHROMEOS_ONESTOP) += load_kernel_helper.o
COBJS-$(CONFIG_CHROMEOS_ONESTOP) += onestop.o
-COBJS-$(CONFIG_CHROMEOS_TWOSTOP) += firmware_storage_twostop.o
+# TODO(sjg): This MMC code is not needed as yet, and needs slight changes
+# to build now
+#COBJS-$(CONFIG_CHROMEOS_TWOSTOP) += firmware_storage_twostop.o
COBJS := $(COBJS-y)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/lib/chromeos/fdt_decode.c b/lib/chromeos/fdt_decode.c
index a85dc37d65f..51e03ae2668 100644
--- a/lib/chromeos/fdt_decode.c
+++ b/lib/chromeos/fdt_decode.c
@@ -16,8 +16,9 @@
#define PREFIX "chromeos/fdt_decode: "
-static int fdt_relpath_offset(const void *fdt, int offset, const char *path)
+static int relpath_offset(const void *blob, int offset, const char *in_path)
{
+ const char *path = in_path;
const char *sep;
/* skip leading '/' */
@@ -30,120 +31,125 @@ static int fdt_relpath_offset(const void *fdt, int offset, const char *path)
if (!sep)
sep = path + strlen(path);
- offset = fdt_subnode_offset_namelen(fdt, offset, path,
+ offset = fdt_subnode_offset_namelen(blob, offset, path,
sep - path);
- if (offset < 0)
+ if (offset < 0) {
+ VBDEBUG(PREFIX "Node '%s' is missing\n", in_path);
return offset;
+ }
}
return offset;
}
-static int fdt_decode_fmap_entry(const void *fdt, int offset, const char *path,
- struct fdt_fmap_entry *config)
+static int decode_fmap_entry(const void *blob, int offset, const char *base,
+ const char *name, struct fdt_fmap_entry *entry)
{
+ char path[50];
int length;
uint32_t *property;
- offset = fdt_relpath_offset(fdt, offset, path);
+ /* Form the node to look up as <base>-<name> */
+ assert(strlen(base) + strlen(name) + 1 < sizeof(path));
+ strcpy(path, base);
+ strcat(path, "-");
+ strcat(path, name);
+
+ offset = relpath_offset(blob, offset, path);
if (offset < 0)
return offset;
-
- property = (uint32_t *)fdt_getprop(fdt, offset, "reg", &length);
- if (!property)
- return length;
-
- config->offset = fdt32_to_cpu(property[0]);
- config->length = fdt32_to_cpu(property[1]);
+ property = (uint32_t *)fdt_getprop(blob, offset, "reg", &length);
+ if (!property) {
+ VBDEBUG(PREFIX "Node '%s' is missing property '%s'\n",
+ path, "reg");
+ return -FDT_ERR_MISSING;
+ }
+ entry->offset = fdt32_to_cpu(property[0]);
+ entry->length = fdt32_to_cpu(property[1]);
return 0;
}
-static int fdt_decode_block_lba(const void *fdt, int offset, const char *path,
+static int decode_block_lba(const void *blob, int offset, const char *path,
uint64_t *out)
{
int length;
uint32_t *property;
- offset = fdt_relpath_offset(fdt, offset, path);
+ offset = relpath_offset(blob, offset, path);
if (offset < 0)
return offset;
- property = (uint32_t *)fdt_getprop(fdt, offset, "block-lba", &length);
- if (!property)
- return length;
-
+ property = (uint32_t *)fdt_getprop(blob, offset, "block-lba", &length);
+ if (!property) {
+ VBDEBUG(PREFIX "failed to load LBA '%s/block-lba'\n", path);
+ return -FDT_ERR_MISSING;
+ }
*out = fdt32_to_cpu(*property);
return 0;
}
-#define LIST_OF_ENTRIES \
- ACT_ON_ENTRY("/onestop-layout", onestop_layout.onestop_layout); \
- ACT_ON_ENTRY("/firmware-image", onestop_layout.fwbody); \
- ACT_ON_ENTRY("/verification-block", onestop_layout.vblock); \
- ACT_ON_ENTRY("/firmware-id", onestop_layout.fwid); \
- ACT_ON_ENTRY("/readonly", readonly.readonly); \
- ACT_ON_ENTRY("/ro-firmware-image", readonly.ro_firmware_image); \
- ACT_ON_ENTRY("/ro-firmware-id", readonly.ro_firmware_id); \
- ACT_ON_ENTRY("/fmap", readonly.fmap); \
- ACT_ON_ENTRY("/gbb", readonly.gbb); \
- ACT_ON_ENTRY("/readwrite-a", readwrite_a.readwrite_a); \
- ACT_ON_ENTRY("/rw-a-onestop", readwrite_a.rw_a_onestop); \
- ACT_ON_ENTRY("/readwrite-b", readwrite_b.readwrite_b); \
- ACT_ON_ENTRY("/rw-b-onestop", readwrite_b.rw_b_onestop);
-
-int fdt_decode_twostop_fmap(const void *fdt, struct fdt_twostop_fmap *config)
+int decode_firmware_entry(const char *blob, int fmap_offset, const char *name,
+ struct fdt_firmware_entry *entry)
{
- int fmap_offset, offset;
+ int err;
+
+ err = decode_fmap_entry(blob, fmap_offset, name, "boot", &entry->boot);
+ err |= decode_fmap_entry(blob, fmap_offset, name, "vblock",
+ &entry->vblock);
+ err |= decode_fmap_entry(blob, fmap_offset, name, "firmware-id",
+ &entry->firmware_id);
+ err |= decode_block_lba(blob, fmap_offset, name, &entry->block_lba);
+ return err;
+}
- fmap_offset = fdt_node_offset_by_compatible(fdt, -1,
+int fdt_decode_twostop_fmap(const void *blob, struct fdt_twostop_fmap *config)
+{
+ int fmap_offset;
+ int err;
+
+ fmap_offset = fdt_node_offset_by_compatible(blob, -1,
"chromeos,flashmap");
if (fmap_offset < 0) {
- VBDEBUG(PREFIX "no compatible node exists\n");
+ VBDEBUG(PREFIX "chromeos,flashmap node is missing\n");
return fmap_offset;
}
-
-#define ACT_ON_ENTRY(path, entry) \
- offset = fdt_decode_fmap_entry(fdt, fmap_offset, path, \
- &config->entry); \
- if (offset < 0) { \
- VBDEBUG(PREFIX "failed to load %s\n", path); \
- return offset; \
- }
-
- LIST_OF_ENTRIES
-
-#undef ACT_ON_ENTRY
-
- offset = fdt_decode_block_lba(fdt, fmap_offset, "/readwrite-a",
- &config->readwrite_a.block_lba);
- if (offset < 0) {
- VBDEBUG(PREFIX "failed to load LBA of slot A\n");
- return offset;
- }
-
- offset = fdt_decode_block_lba(fdt, fmap_offset, "/readwrite-b",
- &config->readwrite_b.block_lba);
- if (offset < 0) {
- VBDEBUG(PREFIX "failed to load LBA of slot B\n");
- return offset;
- }
+ err = decode_firmware_entry(blob, fmap_offset, "rw-a",
+ &config->readwrite_a);
+ err |= decode_firmware_entry(blob, fmap_offset, "rw-b",
+ &config->readwrite_b);
+
+ err |= decode_fmap_entry(blob, fmap_offset, "ro", "fmap",
+ &config->readonly.fmap); \
+ err |= decode_fmap_entry(blob, fmap_offset, "ro", "gbb",
+ &config->readonly.gbb); \
+ err |= decode_fmap_entry(blob, fmap_offset, "ro", "firmware-id",
+ &config->readonly.firmware_id);
return 0;
}
-void dump_fmap(struct fdt_twostop_fmap *config)
+void dump_entry(const char *path, struct fdt_fmap_entry *entry)
{
-#define ACT_ON_ENTRY(path, entry) \
- VBDEBUG(PREFIX "%-20s %08x:%08x\n", path, \
- config->entry.offset, config->entry.length)
-
- LIST_OF_ENTRIES
+ VBDEBUG(PREFIX "%-20s %08x:%08x\n", path, entry->offset,
+ entry->length);
+}
-#undef ACT_ON_ENTRY
+void dump_firmware_entry(const char *name, struct fdt_firmware_entry *entry)
+{
+ VBDEBUG(PREFIX "%s\n", name);
+ dump_entry("boot", &entry->boot);
+ dump_entry("vblock", &entry->vblock);
+ dump_entry("firmware_id", &entry->firmware_id);
+ VBDEBUG(PREFIX "%-20s %08llx\n", "LBA", entry->block_lba);
+}
- VBDEBUG(PREFIX "readwrite-a: block %08llx\n",
- config->readwrite_a.block_lba);
- VBDEBUG(PREFIX "readwrite-b: block %08llx\n",
- config->readwrite_b.block_lba);
+void dump_fmap(struct fdt_twostop_fmap *config)
+{
+ VBDEBUG(PREFIX "rw-a:\n");
+ dump_entry("fmap", &config->readonly.fmap);
+ dump_entry("gbb", &config->readonly.gbb);
+ dump_entry("firmware_id", &config->readonly.firmware_id);
+ dump_firmware_entry("rw-a", &config->readwrite_a);
+ dump_firmware_entry("rw-b", &config->readwrite_b);
}
generated by cgit v1.2.3 (git 2.0.4) at 2024-09-30 08:32:30 +0000