diff options
1206 files changed, 32718 insertions, 31076 deletions
diff --git a/.gitignore b/.gitignore index f1b801579ce..9110eda6468 100644 --- a/.gitignore +++ b/.gitignore @@ -13,6 +13,7 @@ *.su *.mod.c *.i +*.lex.c *.lst *.order *.elf @@ -20,6 +21,7 @@ *.bin *.patch *.cfgtmp +*.tab.[ch] # host programs on Cygwin *.exe @@ -46,7 +48,6 @@ fit-dtb.blob # # Generated files # -/LOG /spl/ /tpl/ /defconfig diff --git a/.travis.yml b/.travis.yml index 57f38e11698..7e90bc9b367 100644 --- a/.travis.yml +++ b/.travis.yml @@ -21,7 +21,6 @@ addons: - python-virtualenv - swig - libpython-dev - - gcc-powerpc-linux-gnu - iasl - grub-efi-ia32-bin - rpm2cpio @@ -29,6 +28,11 @@ addons: - device-tree-compiler - lzop +before_install: + - sudo add-apt-repository ppa:ubuntu-toolchain-r/test -y + - sudo apt-get update -q + - sudo apt-get install libisl15 -y + install: # Clone uboot-test-hooks - git clone --depth=1 git://github.com/swarren/uboot-test-hooks.git /tmp/uboot-test-hooks @@ -36,10 +40,8 @@ install: - ln -s travis-ci /tmp/uboot-test-hooks/py/`hostname` # prepare buildman environment - echo -e "[toolchain]\nroot = /usr" > ~/.buildman - - echo -e "aarch64 = /tmp/gcc-linaro-6.3.1-2017.02-x86_64_aarch64-linux-gnu" >> ~/.buildman - - echo -e "arm = /tmp/gcc-linaro-6.3.1-2017.02-x86_64_arm-linux-gnueabihf" >> ~/.buildman - echo -e "arc = /tmp/arc_gnu_2017.09_prebuilt_uclibc_le_archs_linux_install" >> ~/.buildman - - echo -e "\n[toolchain-alias]\nsh = sh4\nopenrisc = or32" >> ~/.buildman + - echo -e "\n[toolchain-alias]\nsh = sh2\n" >> ~/.buildman - cat ~/.buildman - virtualenv /tmp/venv - . /tmp/venv/bin/activate @@ -64,10 +66,10 @@ before_script: - if [[ "${TOOLCHAIN}" == *microblaze* ]]; then ./tools/buildman/buildman --fetch-arch microblaze ; fi - if [[ "${TOOLCHAIN}" == *mips* ]]; then ./tools/buildman/buildman --fetch-arch mips ; fi - if [[ "${TOOLCHAIN}" == *or32* ]]; then ./tools/buildman/buildman --fetch-arch or32 ; fi - - if [[ "${TOOLCHAIN}" == *sh4* ]]; then ./tools/buildman/buildman --fetch-arch sh4 ; fi + - if [[ "${TOOLCHAIN}" == *sh* ]]; then ./tools/buildman/buildman --fetch-arch sh2 ; fi - if [[ "${TOOLCHAIN}" == *x86_64* ]]; then ./tools/buildman/buildman --fetch-arch x86_64; - echo -e "\n[toolchain-prefix]\nx86 = ${HOME}/.buildman-toolchains/gcc-4.9.0-nolibc/x86_64-linux/bin/x86_64-linux-" >> ~/.buildman; + echo -e "\n[toolchain-prefix]\nx86 = ${HOME}/.buildman-toolchains/gcc-7.3.0-nolibc/x86_64-linux/bin/x86_64-linux-" >> ~/.buildman; fi - if [[ "${TOOLCHAIN}" == arc ]]; then wget https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases/download/arc-2017.09-release/arc_gnu_2017.09_prebuilt_uclibc_le_archs_linux_install.tar.gz && @@ -80,15 +82,14 @@ before_script: fi # If TOOLCHAIN is unset, we're on some flavour of ARM. - if [[ "${TOOLCHAIN}" == "" ]]; then - wget http://releases.linaro.org/components/toolchain/binaries/6.3-2017.02/aarch64-linux-gnu/gcc-linaro-6.3.1-2017.02-x86_64_aarch64-linux-gnu.tar.xz && - wget http://releases.linaro.org/components/toolchain/binaries/6.3-2017.02/arm-linux-gnueabihf/gcc-linaro-6.3.1-2017.02-x86_64_arm-linux-gnueabihf.tar.xz && - tar -C /tmp -xf gcc-linaro-6.3.1-2017.02-x86_64_aarch64-linux-gnu.tar.xz && - tar -C /tmp -xf gcc-linaro-6.3.1-2017.02-x86_64_arm-linux-gnueabihf.tar.xz; + ./tools/buildman/buildman --fetch-arch arm && + ./tools/buildman/buildman --fetch-arch aarch64; fi + - if [[ "${TOOLCHAIN}" == "powerpc" ]]; then ./tools/buildman/buildman --fetch-arch powerpc; fi - if [[ "${TOOLCHAIN}" == "riscv" ]]; then - wget https://github.com/PkmX/riscv-prebuilt-toolchains/releases/download/20180111/riscv32-unknown-elf-toolchain.tar.gz && - tar -C /tmp -xf riscv32-unknown-elf-toolchain.tar.gz && - echo -e "\n[toolchain-prefix]\nriscv = /tmp/riscv32-unknown-elf/bin/riscv32-unknown-elf-" >> ~/.buildman; + wget https://github.com/andestech/prebuilt/releases/download/20180530/riscv64-unknown-linux-gnu.tar.gz && + tar -C /tmp -xf riscv64-unknown-linux-gnu.tar.gz && + echo -e "\n[toolchain-prefix]\nriscv = /tmp/riscv64-unknown-linux-gnu/bin/riscv64-unknown-linux-gnu-" >> ~/.buildman; fi - if [[ "${QEMU_TARGET}" != "" ]]; then git clone git://git.qemu.org/qemu.git /tmp/qemu; @@ -149,26 +150,16 @@ matrix: - BUILDMAN="arc" TOOLCHAIN="arc" - env: - - BUILDMAN="arm11" - - env: - - BUILDMAN="arm7" - - env: - - BUILDMAN="arm920t" + - BUILDMAN="arm11 arm7 arm920t arm946es" - env: - JOB="arm926ejs" BUILDMAN="arm926ejs -x mx,siemens,atmel" - env: - - BUILDMAN="arm946es" - - env: - BUILDMAN="atmel" - env: - BUILDMAN="aries" - env: - - JOB="Boundary Devices" - BUILDMAN="boundary" - - env: - - JOB="engicam" - BUILDMAN="engicam" + BUILDMAN="boundary engicam toradex" - env: - JOB="Freescale ARM32" BUILDMAN="freescale -x powerpc,m68k,aarch64" @@ -184,9 +175,7 @@ matrix: - env: - BUILDMAN="k2" - env: - - BUILDMAN="samsung" - - env: - - BUILDMAN="socfpga" + - BUILDMAN="samsung socfpga" - env: - BUILDMAN="sun4i" - env: @@ -203,13 +192,11 @@ matrix: - BUILDMAN="sun50i" - env: - JOB="Catch-all ARM" - BUILDMAN="arm -x arm11,arm7,arm9,aarch64,atmel,aries,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap3,omap4,omap5,pxa,rockchip,toradex,socfpga,k2,xilinx" + BUILDMAN="arm -x arm11,arm7,arm9,aarch64,atmel,aries,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap,pxa,rockchip,toradex,socfpga,k2,xilinx" - env: - BUILDMAN="sandbox x86" TOOLCHAIN="x86_64" - env: - - BUILDMAN="toradex" - - env: - BUILDMAN="kirkwood" - env: - BUILDMAN="mvebu" @@ -226,27 +213,27 @@ matrix: - BUILDMAN="mips" TOOLCHAIN="mips" - env: - - BUILDMAN="mpc83xx" + - JOB="Non-Freescale PowerPC" + BUILDMAN="powerpc -x freescale" + TOOLCHAIN="powerpc" - env: - - BUILDMAN="mpc85xx -x freescale" + - BUILDMAN="mpc85xx&freescale -x t208xrdb -x t4qds -x t102* -x p1_p2_rdb_pc -x p1010rdb -x corenet_ds -x b4860qds -x bsc91*" + TOOLCHAIN="powerpc" - env: - - BUILDMAN="mpc85xx -x t208xrdb -x t4qds -x t102* -x p1_p2_rdb_pc -x p1010rdb -x corenet_ds -x b4860qds -x sbc8548 -x bsc91*" + - BUILDMAN="t208xrdb corenet_ds" + TOOLCHAIN="powerpc" - env: - - BUILDMAN="t208xrdb" - - env: - - BUILDMAN="t4qds" + - BUILDMAN="t4qds b4860qds mpc83xx&freescale mpc86xx&freescale" + TOOLCHAIN="powerpc" - env: - BUILDMAN="t102*" + TOOLCHAIN="powerpc" - env: - BUILDMAN="p1_p2_rdb_pc" + TOOLCHAIN="powerpc" - env: - - BUILDMAN="p1010rdb" - - env: - - BUILDMAN="corenet_ds b4860qds sbc8548 bsc91*" - - env: - - BUILDMAN="mpc86xx" - - env: - - BUILDMAN="mpc8xx" + - BUILDMAN="p1010rdb bsc91" + TOOLCHAIN="powerpc" - env: - BUILDMAN="siemens" - env: @@ -256,21 +243,18 @@ matrix: - JOB="am33xx" BUILDMAN="am33xx -x siemens" - env: - - BUILDMAN="omap3" - - env: - - BUILDMAN="omap4" - - env: - - BUILDMAN="omap5" + - BUILDMAN="omap" - env: - BUILDMAN="uniphier" - env: - - JOB="aarch64" - BUILDMAN="aarch64 -x tegra,freescale,mvebu,uniphier,sunxi,samsung,rockchip" + - JOB="Catch-all AArch64" + BUILDMAN="aarch64 -x tegra,freescale,mvebu,uniphier,sunxi,samsung,rockchip,xilinx" - env: - BUILDMAN="rockchip" - env: - - BUILDMAN="sh4" - TOOLCHAIN="sh4" + - JOB="sh" + BUILDMAN="sh -x arm" + TOOLCHAIN="sh" - env: - JOB="Xilinx (ARM)" BUILDMAN="xilinx -x microblaze" @@ -376,6 +360,7 @@ matrix: TEST_PY_TEST_SPEC="not sleep" QEMU_TARGET="ppc-softmmu" BUILDMAN="^qemu-ppce500$" + TOOLCHAIN="powerpc" - env: - TEST_PY_BD="qemu-x86" TEST_PY_TEST_SPEC="not sleep" diff --git a/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.txt b/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.txt new file mode 100644 index 00000000000..725ae71ae65 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.txt @@ -0,0 +1,73 @@ +STMicroelectronics STM32 USB HS PHY controller + +The STM32 USBPHYC block contains a dual port High Speed UTMI+ PHY and a UTMI +switch. It controls PHY configuration and status, and the UTMI+ switch that +selects either OTG or HOST controller for the second PHY port. It also sets +PLL configuration. + +USBPHYC + |_ PLL + | + |_ PHY port#1 _________________ HOST controller + | _ | + | / 1|________________| + |_ PHY port#2 ----| |________________ + | \_0| | + |_ UTMI switch_______| OTG controller + + +Phy provider node +================= + +Required properties: +- compatible: must be "st,stm32mp1-usbphyc" +- reg: address and length of the usb phy control register set +- clocks: phandle + clock specifier for the PLL phy clock +- #address-cells: number of address cells for phys sub-nodes, must be <1> +- #size-cells: number of size cells for phys sub-nodes, must be <0> + +Optional properties: +- assigned-clocks: phandle + clock specifier for the PLL phy clock +- assigned-clock-parents: the PLL phy clock parent +- resets: phandle + reset specifier + +Required nodes: one sub-node per port the controller provides. + +Phy sub-nodes +============== + +Required properties: +- reg: phy port index +- phy-supply: phandle to the regulator providing 3V3 power to the PHY, + see phy-bindings.txt in the same directory. +- vdda1v1-supply: phandle to the regulator providing 1V1 power to the PHY +- vdda1v8-supply: phandle to the regulator providing 1V8 power to the PHY +- #phy-cells: see phy-bindings.txt in the same directory, must be <0> for PHY + port#1 and must be <1> for PHY port#2, to select USB controller + + +Example: + usbphyc: usb-phy@5a006000 { + compatible = "st,stm32mp1-usbphyc"; + reg = <0x5a006000 0x1000>; + clocks = <&rcc_clk USBPHY_K>; + resets = <&rcc_rst USBPHY_R>; + #address-cells = <1>; + #size-cells = <0>; + + usbphyc_port0: usb-phy@0 { + reg = <0>; + phy-supply = <&vdd_usb>; + vdda1v1-supply = <®11>; + vdda1v8-supply = <®18> + #phy-cells = <0>; + }; + + usbphyc_port1: usb-phy@1 { + reg = <1>; + phy-supply = <&vdd_usb>; + vdda1v1-supply = <®11>; + vdda1v8-supply = <®18> + #phy-cells = <1>; + }; + }; @@ -305,6 +305,12 @@ config SPL_FIT depends on SPL select SPL_OF_LIBFDT +config SPL_FIT_PRINT + bool "Support FIT printing within SPL" + depends on SPL_FIT + help + Support printing the content of the fitImage in a verbose manner in SPL. + config SPL_FIT_SIGNATURE bool "Enable signature verification of FIT firmware within SPL" depends on SPL_DM @@ -322,6 +328,17 @@ config SPL_LOAD_FIT particular it can handle selecting from multiple device tree and passing the correct one to U-Boot. +config SPL_LOAD_FIT_FULL + bool "Enable SPL loading U-Boot as a FIT" + select SPL_FIT + help + Normally with the SPL framework a legacy image is generated as part + of the build. This contains U-Boot along with information as to + where it should be loaded. This option instead enables generation + of a FIT (Flat Image Tree) which provides more flexibility. In + particular it can handle selecting from multiple device tree + and passing the correct one to U-Boot. + config SPL_FIT_IMAGE_POST_PROCESS bool "Enable post-processing of FIT artifacts after loading by the SPL" depends on SPL_LOAD_FIT diff --git a/Licenses/README b/Licenses/README index 5ad921ddfc9..486e18d0d80 100644 --- a/Licenses/README +++ b/Licenses/README @@ -1,3 +1,5 @@ +SPDX-License-Identifier: GPL-2.0 + U-Boot is Free Software. It is copyrighted by Wolfgang Denk and many others who contributed code (see the actual source code and the git commit messages for details). You can redistribute U-Boot and/or @@ -31,27 +33,107 @@ information, ...) which makes automatic processing a nightmare. To make this easier, such license headers in the source files will be replaced with a single line reference to Unique License Identifiers -as defined by the Linux Foundation's SPDX project [1]. For example, -in a source file the full "GPL v2.0 or later" header text will be -replaced by a single line: - - SPDX-License-Identifier: GPL-2.0+ - -Ideally, the license terms of all files in the source tree should be -defined by such License Identifiers; in no case a file can contain -more than one such License Identifier list. +as defined by the Linux Foundation's SPDX project [1]. If a "SPDX-License-Identifier:" line references more than one Unique License Identifier, then this means that the respective file can be used under the terms of either of these licenses, i. e. with - SPDX-License-Identifier: GPL-2.0+ BSD-3-Clause + SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause you can choose between GPL-2.0+ and BSD-3-Clause licensing. We use the SPDX Unique License Identifiers here; these are available at [2]. +License identifier syntax +------------------------- + +1. Placement: + + The SPDX license identifier in U-Boot files shall be added at the first + possible line in a file which can contain a comment. For the majority + or files this is the first line, except for scripts which require the + '#!PATH_TO_INTERPRETER' in the first line. For those scripts the SPDX + identifier goes into the second line. + +| + +2. Style: + + The SPDX license identifier is added in form of a comment. The comment + style depends on the file type:: + + C source: // SPDX-License-Identifier: <SPDX License Expression> + C header: /* SPDX-License-Identifier: <SPDX License Expression> */ + ASM: /* SPDX-License-Identifier: <SPDX License Expression> */ + scripts: # SPDX-License-Identifier: <SPDX License Expression> + .rst: .. SPDX-License-Identifier: <SPDX License Expression> + .dts{i}: // SPDX-License-Identifier: <SPDX License Expression> + + If a specific tool cannot handle the standard comment style, then the + appropriate comment mechanism which the tool accepts shall be used. This + is the reason for having the "/\* \*/" style comment in C header + files. There was build breakage observed with generated .lds files where + 'ld' failed to parse the C++ comment. This has been fixed by now, but + there are still older assembler tools which cannot handle C++ style + comments. + +| + +3. Syntax: + + A <SPDX License Expression> is either an SPDX short form license + identifier found on the SPDX License List, or the combination of two + SPDX short form license identifiers separated by "WITH" when a license + exception applies. When multiple licenses apply, an expression consists + of keywords "AND", "OR" separating sub-expressions and surrounded by + "(", ")" . + + License identifiers for licenses like [L]GPL with the 'or later' option + are constructed by using a "+" for indicating the 'or later' option.:: + + // SPDX-License-Identifier: GPL-2.0+ + // SPDX-License-Identifier: LGPL-2.1+ + + WITH should be used when there is a modifier to a license needed. + For example, the linux kernel UAPI files use the expression:: + + // SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note + // SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note + + Other examples using WITH exceptions found in the linux kernel are:: + + // SPDX-License-Identifier: GPL-2.0 WITH mif-exception + // SPDX-License-Identifier: GPL-2.0+ WITH GCC-exception-2.0 + + Exceptions can only be used with particular License identifiers. The + valid License identifiers are listed in the tags of the exception text + file. + + OR should be used if the file is dual licensed and only one license is + to be selected. For example, some dtsi files are available under dual + licenses:: + + // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause + + Examples from U-Boot for license expressions in dual licensed files:: + + // SPDX-License-Identifier: GPL-2.0 OR MIT + // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause + + AND should be used if the file has multiple licenses whose terms all + apply to use the file. For example, if code is inherited from another + project and permission has been given to put it in U-Boot, but the + original license terms need to remain in effect:: + + // SPDX-License-Identifier: (GPL-2.0 WITH Linux-syscall-note) AND MIT + + Another other example where both sets of license terms need to be + adhered to is:: + + // SPDX-License-Identifier: GPL-1.0+ AND LGPL-2.1+ + [1] http://spdx.org/ [2] http://spdx.org/licenses/ diff --git a/MAINTAINERS b/MAINTAINERS index 5670917b41b..642c4480938 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -60,6 +60,7 @@ S: Maintained L: uboot-snps-arc@synopsys.com T: git git://git.denx.de/u-boot-arc.git F: arch/arc/ +F: board/synopsys/ ARC HSDK CGU CLOCK M: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> @@ -135,6 +136,7 @@ S: Maintained T: git git://git.denx.de/u-boot-marvell.git F: arch/arm/mach-kirkwood/ F: arch/arm/mach-mvebu/ +F: drivers/ata/ahci_mvebu.c ARM MARVELL PXA M: Marek Vasut <marex@denx.de> @@ -204,6 +206,7 @@ M: Patrick Delaunay <patrick.delaunay@st.com> S: Maintained F: arch/arm/mach-stm32mp F: drivers/clk/clk_stm32mp1.c +F: drivers/misc/stm32mp_fuse.c F: drivers/ram/stm32mp1/ ARM STM STV0991 @@ -339,6 +342,7 @@ EFI PAYLOAD M: Alexander Graf <agraf@suse.de> S: Maintained T: git git://github.com/agraf/u-boot.git +F: doc/DocBook/efi.tmpl F: doc/README.uefi F: doc/README.iscsi F: include/efi* @@ -1,9 +1,9 @@ # SPDX-License-Identifier: GPL-2.0+ VERSION = 2018 -PATCHLEVEL = 05 +PATCHLEVEL = 07 SUBLEVEL = -EXTRAVERSION = +EXTRAVERSION = -rc1 NAME = # *DOCUMENTATION* @@ -258,6 +258,15 @@ HOSTCFLAGS = -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer \ $(if $(CONFIG_TOOLS_DEBUG),-g) HOSTCXXFLAGS = -O2 +# With the move to GCC 6, we have implicitly upgraded our language +# standard to GNU11 (see https://gcc.gnu.org/gcc-5/porting_to.html). +# Some Linux distributions (including RHEL7, SLES13, Debian 8) still +# have older compilers as their default, so we make it explicit for +# these that our host tools are GNU11 (i.e. C11 w/ GNU extensions). +ifeq ($(HOSTOS),linux) +HOSTCFLAGS += --std=gnu11 +endif + ifeq ($(HOSTOS),cygwin) HOSTCFLAGS += -ansi endif @@ -344,9 +353,13 @@ LDR = $(CROSS_COMPILE)ldr STRIP = $(CROSS_COMPILE)strip OBJCOPY = $(CROSS_COMPILE)objcopy OBJDUMP = $(CROSS_COMPILE)objdump +LEX = flex +YACC = bison AWK = awk PERL = perl PYTHON ?= python +PYTHON2 = python2 +PYTHON3 = python3 DTC ?= $(objtree)/scripts/dtc/dtc CHECK = sparse @@ -369,7 +382,7 @@ export VERSION PATCHLEVEL SUBLEVEL UBOOTRELEASE UBOOTVERSION export ARCH CPU BOARD VENDOR SOC CPUDIR BOARDDIR export CONFIG_SHELL HOSTCC HOSTCFLAGS HOSTLDFLAGS CROSS_COMPILE AS LD CC export CPP AR NM LDR STRIP OBJCOPY OBJDUMP -export MAKE AWK PERL PYTHON +export MAKE LEX YACC AWK PERL PYTHON PYTHON2 PYTHON3 export HOSTCXX HOSTCXXFLAGS CHECK CHECKFLAGS DTC DTC_FLAGS export KBUILD_CPPFLAGS NOSTDINC_FLAGS UBOOTINCLUDE OBJCOPYFLAGS LDFLAGS @@ -505,7 +518,7 @@ $(KCONFIG_CONFIG) include/config/auto.conf.cmd: ; # if auto.conf.cmd is missing then we are probably in a cleaned tree so # we execute the config step to be sure to catch updated Kconfig files include/config/%.conf: $(KCONFIG_CONFIG) include/config/auto.conf.cmd - $(Q)$(MAKE) -f $(srctree)/Makefile silentoldconfig + $(Q)$(MAKE) -f $(srctree)/Makefile syncconfig @# If the following part fails, include/config/auto.conf should be @# deleted so "make silentoldconfig" will be re-run on the next build. $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.autoconf || \ @@ -1608,10 +1621,12 @@ clean: $(clean-dirs) \( -name '*.[oas]' -o -name '*.ko' -o -name '.*.cmd' \ -o -name '*.ko.*' -o -name '*.su' -o -name '*.cfgtmp' \ -o -name '.*.d' -o -name '.*.tmp' -o -name '*.mod.c' \ + -o -name '*.lex.c' -o -name '*.tab.[ch]' \ -o -name '*.symtypes' -o -name 'modules.order' \ -o -name modules.builtin -o -name '.tmp_*.o.*' \ -o -name 'dsdt.aml' -o -name 'dsdt.asl.tmp' -o -name 'dsdt.c' \ - -o -name '*.gcno' \) -type f -print | xargs rm -f + -o -name '*.efi' -o -name '*.gcno' -o -name '*.so' \) \ + -type f -print | xargs rm -f # mrproper - Delete all generated files, including .config # @@ -331,11 +331,6 @@ The following options need to be configured: - Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS. -- Marvell Family Member - CONFIG_SYS_MVFS - define it if you want to enable - multiple fs option at one time - for marvell soc family - - 85xx CPU Options: CONFIG_SYS_PPC64 @@ -1172,10 +1167,6 @@ The following options need to be configured: CONFIG_SUPPORT_EMMC_BOOT Enable some additional features of the eMMC boot partitions. - CONFIG_SUPPORT_EMMC_RPMB - Enable the commands for reading, writing and programming the - key for the Replay Protection Memory Block partition in eMMC. - - USB Device Firmware Update (DFU) class support: CONFIG_DFU_OVER_USB This enables the USB portion of the DFU USB class @@ -2695,7 +2686,7 @@ FIT uImage format: use an arch-specific makefile fragment instead, for example if more than one image needs to be produced. - CONFIG_FIT_SPL_PRINT + CONFIG_SPL_FIT_PRINT Printing information about a FIT image adds quite a bit of code to SPL. So this is normally disabled in SPL. Use this option to re-enable it. This will affect the output of the diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig index aee15d5353d..6f139d5bdc5 100644 --- a/arch/arc/Kconfig +++ b/arch/arc/Kconfig @@ -150,6 +150,10 @@ config TARGET_AXS101 config TARGET_AXS103 bool "Support Synopsys Designware SDP board AXS103" +config TARGET_EMDK + bool "Synopsys EM Development kit" + select CPU_ARCEM6 + config TARGET_HSDK bool "Support Synpsys HS DevelopmentKit board" @@ -158,6 +162,7 @@ endchoice source "board/abilis/tb100/Kconfig" source "board/synopsys/Kconfig" source "board/synopsys/axs10x/Kconfig" +source "board/synopsys/emdk/Kconfig" source "board/synopsys/hsdk/Kconfig" endmenu diff --git a/arch/arc/cpu/u-boot.lds b/arch/arc/cpu/u-boot.lds index 73c642ed6bd..e12145c7684 100644 --- a/arch/arc/cpu/u-boot.lds +++ b/arch/arc/cpu/u-boot.lds @@ -5,28 +5,29 @@ #include <config.h> -OUTPUT_FORMAT("elf32-littlearc", "elf32-littlearc", "elf32-littlearc") +OUTPUT_FORMAT("elf32-littlearc", "elf32-bigarc", "elf32-littlearc") OUTPUT_ARCH(arc) ENTRY(_start) SECTIONS { . = CONFIG_SYS_TEXT_BASE; __image_copy_start = .; - __text_start = .; - .text : { - arch/arc/lib/start.o (.text*) - *(.text*) - } - __text_end = .; - . = ALIGN(1024); __ivt_start = .; .ivt : { - *(.ivt) + KEEP(*(.ivt)) } __ivt_end = .; + . = ALIGN(1024); + __text_start = .; + .text : { + arch/arc/lib/start.o (.text*) + *(.text*) + } + __text_end = .; + . = ALIGN(4); .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) diff --git a/arch/arc/dts/Makefile b/arch/arc/dts/Makefile index 6eccec97dab..491a4f40bbc 100644 --- a/arch/arc/dts/Makefile +++ b/arch/arc/dts/Makefile @@ -4,6 +4,7 @@ dtb-$(CONFIG_TARGET_AXS101) += axs101.dtb dtb-$(CONFIG_TARGET_AXS103) += axs103.dtb dtb-$(CONFIG_TARGET_NSIM) += nsim.dtb dtb-$(CONFIG_TARGET_TB100) += abilis_tb100.dtb +dtb-$(CONFIG_TARGET_EMDK) += emdk.dtb dtb-$(CONFIG_TARGET_HSDK) += hsdk.dtb targets += $(dtb-y) diff --git a/arch/arc/dts/emdk.dts b/arch/arc/dts/emdk.dts new file mode 100644 index 00000000000..5e853e3a728 --- /dev/null +++ b/arch/arc/dts/emdk.dts @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Synopsys, Inc. All rights reserved. + */ +/dts-v1/; + +#include "skeleton.dtsi" + +/ { + #address-cells = <1>; + #size-cells = <1>; + + aliases { + console = &uart0; + }; + + cpu_card { + core_clk: core_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <40000000>; + u-boot,dm-pre-reloc; + }; + }; + + uart0: serial0@f0004000 { + compatible = "snps,dw-apb-uart"; + clock-frequency = <100000000>; + reg = <0xf0004000 0x1000>; + reg-shift = <2>; + reg-io-width = <4>; + }; +}; diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c index 6f52877643c..8c1cb6e8009 100644 --- a/arch/arc/lib/cache.c +++ b/arch/arc/lib/cache.c @@ -432,9 +432,16 @@ void read_decode_cache_bcr(void) int dc_line_sz = 0, ic_line_sz = 0; union bcr_di_cache ibcr, dbcr; + /* + * We don't care much about I$ line length really as there're + * no per-line ops on I$ instead we only do full invalidation of it + * on occasion of relocation and right before jumping to the OS. + * Still we check insane config with zero-encoded line length in + * presense of version field in I$ BCR. Just in case. + */ ibcr.word = read_aux_reg(ARC_BCR_IC_BUILD); if (ibcr.fields.ver) { - gd->arch.l1_line_sz = ic_line_sz = 8 << ibcr.fields.line_len; + ic_line_sz = 8 << ibcr.fields.line_len; if (!ic_line_sz) panic("Instruction exists but line length is 0\n"); } @@ -445,9 +452,6 @@ void read_decode_cache_bcr(void) if (!dc_line_sz) panic("Data cache exists but line length is 0\n"); } - - if (ic_line_sz && dc_line_sz && (ic_line_sz != dc_line_sz)) - panic("Instruction and data cache line lengths differ\n"); } void cache_init(void) diff --git a/arch/arc/lib/relocate.c b/arch/arc/lib/relocate.c index a3b7428d851..4ffba84eeb3 100644 --- a/arch/arc/lib/relocate.c +++ b/arch/arc/lib/relocate.c @@ -8,7 +8,9 @@ #include <asm-generic/sections.h> extern ulong __image_copy_start; +extern ulong __ivt_start; extern ulong __ivt_end; +extern ulong __text_end; DECLARE_GLOBAL_DATA_PTR; @@ -48,7 +50,7 @@ int do_elf_reloc_fixups(void) debug("Section .rela.dyn is located at %08x-%08x\n", (unsigned int)re_src, (unsigned int)re_end); - Elf32_Addr *offset_ptr_rom, *last_offset = NULL; + Elf32_Addr *offset_ptr_rom; Elf32_Addr *offset_ptr_ram; do { @@ -57,15 +59,28 @@ int do_elf_reloc_fixups(void) /* Check that the location of the relocation is in .text */ if (offset_ptr_rom >= (Elf32_Addr *)&__image_copy_start && - offset_ptr_rom > last_offset) { - unsigned int val; + offset_ptr_rom < (Elf32_Addr *)&__image_copy_end) { + unsigned int val, do_swap = 0; /* Switch to the in-RAM version */ offset_ptr_ram = (Elf32_Addr *)((ulong)offset_ptr_rom + gd->reloc_off); - debug("Patching value @ %08x (relocated to %08x)\n", +#ifdef __LITTLE_ENDIAN__ + /* If location in ".text" section swap value */ + if (((u32)offset_ptr_rom >= (u32)&__text_start && + (u32)offset_ptr_rom <= (u32)&__text_end) +#if defined(__ARC700__) || defined(__ARC600__) + || ((u32)offset_ptr_rom >= (u32)&__ivt_start && + (u32)offset_ptr_rom <= (u32)&__ivt_end) +#endif + ) + do_swap = 1; +#endif + + debug("Patching value @ %08x (relocated to %08x)%s\n", (unsigned int)offset_ptr_rom, - (unsigned int)offset_ptr_ram); + (unsigned int)offset_ptr_ram, + do_swap ? ", middle-endian encoded" : ""); /* * Use "memcpy" because target location might be @@ -75,28 +90,45 @@ int do_elf_reloc_fixups(void) */ memcpy(&val, offset_ptr_ram, sizeof(int)); -#ifdef __LITTLE_ENDIAN__ - /* If location in ".text" section swap value */ - if ((unsigned int)offset_ptr_rom < - (unsigned int)&__ivt_end) + if (do_swap) val = (val << 16) | (val >> 16); -#endif /* Check that the target points into executable */ - if (val >= (unsigned int)&__image_copy_start && val <= - (unsigned int)&__image_copy_end) { - val += gd->reloc_off; -#ifdef __LITTLE_ENDIAN__ - /* If location in ".text" section swap value */ - if ((unsigned int)offset_ptr_rom < - (unsigned int)&__ivt_end) - val = (val << 16) | (val >> 16); -#endif - memcpy(offset_ptr_ram, &val, sizeof(int)); + if (val < (unsigned int)&__image_copy_start || + val > (unsigned int)&__image_copy_end) { + /* TODO: Use panic() instead of debug() + * + * For some reason GCC might generate + * fake relocation even for LD/SC of constant + * inderectly. See an example below: + * ----------------------->8-------------------- + * static int setup_mon_len(void) + * { + * gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE; + * return 0; + * } + * ----------------------->8-------------------- + * + * And that's what we get in the binary: + * ----------------------->8-------------------- + * 10005cb4 <setup_mon_len>: + * 10005cb4: 193c 3f80 0003 2f80 st 0x32f80,[r25,60] + * 10005cb8: R_ARC_RELATIVE *ABS*-0x10000000 + * 10005cbc: 7fe0 j_s.d [blink] + * 10005cbe: 700c mov_s r0,0 + * ----------------------->8-------------------- + */ + debug("Relocation target %08x points outside of image\n", + val); } - } - last_offset = offset_ptr_rom; + val += gd->reloc_off; + + if (do_swap) + val = (val << 16) | (val >> 16); + + memcpy(offset_ptr_ram, &val, sizeof(int)); + } } while (++re_src < re_end); return 0; diff --git a/arch/arc/lib/reset.c b/arch/arc/lib/reset.c index 40fb0f1fbd1..02e08df48de 100644 --- a/arch/arc/lib/reset.c +++ b/arch/arc/lib/reset.c @@ -6,13 +6,17 @@ #include <command.h> #include <common.h> +__weak void reset_cpu(ulong addr) +{ + /* Stop debug session here */ + __builtin_arc_brk(); +} + int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) { - printf("Put your restart handler here\n"); + printf("Resetting the board...\n"); + + reset_cpu(0); -#ifdef DEBUG - /* Stop debug session here */ - __asm__("brk"); -#endif return 0; } diff --git a/arch/arc/lib/start.S b/arch/arc/lib/start.S index 3fb05606c7b..e573ce7718b 100644 --- a/arch/arc/lib/start.S +++ b/arch/arc/lib/start.S @@ -75,6 +75,11 @@ ENTRY(_start) /* Initialize reserved area - note: r0 already contains address */ bl board_init_f_init_reserve +#ifdef CONFIG_DEBUG_UART + /* Earliest point to set up early debug uart */ + bl debug_uart_init +#endif + /* Zero the one and only argument of "board_init_f" */ mov_s %r0, 0 bl board_init_f diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index c9d6e0a4241..dde422bc5d5 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -221,6 +221,7 @@ config CPU_V7M select THUMB2_KERNEL select SYS_CACHE_SHIFT_5 select SYS_ARM_MPU + select SYS_THUMB_BUILD config CPU_V7R bool @@ -393,7 +394,7 @@ choice config ARCH_AT91 bool "Atmel AT91" - select SPL_BOARD_INIT if SPL + select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB config TARGET_EDB93XX bool "Support edb93xx" @@ -497,13 +498,6 @@ config TARGET_X600 select SUPPORT_SPL select PL011_SERIAL -config TARGET_MX31PDK - bool "Support mx31pdk" - select BOARD_LATE_INIT - select CPU_ARM1136 - select SUPPORT_SPL - select BOARD_EARLY_INIT_F - config TARGET_WOODBURN bool "Support woodburn" select CPU_ARM1136 @@ -665,6 +659,10 @@ config ARCH_MX28 select PL011_SERIAL select SUPPORT_SPL +config ARCH_MX31 + bool "NXP i.MX31 family" + select CPU_ARM1136 + config ARCH_MX7ULP bool "NXP MX7ULP" select CPU_V7A @@ -733,14 +731,27 @@ config ARCH_SNAPDRAGON config ARCH_SOCFPGA bool "Altera SOCFPGA family" + select ARCH_EARLY_INIT_R + select ARCH_MISC_INIT select CPU_V7A - select SUPPORT_SPL - select OF_CONTROL - select SPL_OF_CONTROL select DM + select DM_SERIAL select ENABLE_ARM_SOC_BOOT0_HOOK - select ARCH_EARLY_INIT_R - select ARCH_MISC_INIT + select OF_CONTROL + select SPL_LIBCOMMON_SUPPORT + select SPL_LIBDISK_SUPPORT + select SPL_LIBGENERIC_SUPPORT + select SPL_MMC_SUPPORT if DM_MMC + select SPL_NAND_SUPPORT if SPL_NAND_DENALI + select SPL_OF_CONTROL + select SPL_SERIAL_SUPPORT + select SPL_DM_SERIAL + select SPL_SPI_FLASH_SUPPORT if SPL_SPI_SUPPORT + select SPL_SPI_SUPPORT if DM_SPI + select SPL_WATCHDOG_SUPPORT + select SUPPORT_SPL + select SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE + select SYS_NS16550 select SYS_THUMB_BUILD imply CMD_MTDPARTS imply CRC32_VERIFY @@ -1214,6 +1225,7 @@ config ARCH_STM32MP select DM_SERIAL select OF_CONTROL select OF_LIBFDT + select MISC select PINCTRL select REGMAP select SUPPORT_SPL @@ -1246,9 +1258,7 @@ config ARCH_ROCKCHIP select DM_REGULATOR select ENABLE_ARM_SOC_BOOT0_HOOK select SPI - imply CMD_FASTBOOT imply DISTRO_DEFAULTS - imply FASTBOOT imply FAT_WRITE imply USB_FUNCTION_FASTBOOT imply SPL_SYSRESET @@ -1305,6 +1315,8 @@ source "arch/arm/cpu/armv7/ls102xa/Kconfig" source "arch/arm/mach-imx/mx2/Kconfig" +source "arch/arm/mach-imx/mx3/Kconfig" + source "arch/arm/mach-imx/mx5/Kconfig" source "arch/arm/mach-imx/mx6/Kconfig" @@ -1392,7 +1404,6 @@ source "board/freescale/ls1046ardb/Kconfig" source "board/freescale/ls1012aqds/Kconfig" source "board/freescale/ls1012ardb/Kconfig" source "board/freescale/ls1012afrdm/Kconfig" -source "board/freescale/mx31pdk/Kconfig" source "board/freescale/mx35pdk/Kconfig" source "board/freescale/s32v234evb/Kconfig" source "board/gdsys/a38x/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 4d6d2761377..680c6e8516d 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -16,6 +16,7 @@ arch-$(CONFIG_CPU_ARM1136) =-march=armv5 arch-$(CONFIG_CPU_ARM1176) =-march=armv5t arch-$(CONFIG_CPU_V7A) =$(call cc-option, -march=armv7-a, \ $(call cc-option, -march=armv7, -march=armv5)) +arch-$(CONFIG_CPU_V7M) =-march=armv7-m arch-$(CONFIG_CPU_V7R) =-march=armv7-r arch-$(CONFIG_ARM64) =-march=armv8-a diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index 26056647df0..4f4647c90ac 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -12,6 +12,10 @@ obj-y += syslib.o obj-$(CONFIG_SYS_ARM_MPU) += mpu_v7r.o +ifneq ($(CONFIG_SPL_BUILD),y) +obj-$(CONFIG_EFI_LOADER) += sctlr.o +endif + ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y) obj-y += lowlevel_init.o endif diff --git a/arch/arm/cpu/armv7/sctlr.S b/arch/arm/cpu/armv7/sctlr.S new file mode 100644 index 00000000000..bd56e41afe1 --- /dev/null +++ b/arch/arm/cpu/armv7/sctlr.S @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Routines to access the system control register + * + * Copyright (c) 2018 Heinrich Schuchardt + */ + +#include <linux/linkage.h> + +/* + * void allow_unaligned(void) - allow unaligned access + * + * This routine clears the aligned flag in the system control register. + * After calling this routine unaligned access does no longer lead to a + * data abort but is handled by the CPU. + */ +ENTRY(allow_unaligned) + mrc p15, 0, r0, c1, c0, 0 @ load system control register + bic r0, r0, #2 @ clear aligned flag + mcr p15, 0, r0, c1, c0, 0 @ write system control register + bx lr @ return +ENDPROC(allow_unaligned) diff --git a/arch/arm/cpu/armv7m/config.mk b/arch/arm/cpu/armv7m/config.mk index 4e46df5a284..f50964cfb92 100644 --- a/arch/arm/cpu/armv7m/config.mk +++ b/arch/arm/cpu/armv7m/config.mk @@ -3,4 +3,4 @@ # (C) Copyright 2015 # Kamil Lulko, <kamil.lulko@gmail.com> -PLATFORM_CPPFLAGS += -march=armv7-m -mthumb -mno-unaligned-access +PLATFORM_CPPFLAGS += -mno-unaligned-access diff --git a/arch/arm/cpu/armv8/generic_timer.c b/arch/arm/cpu/armv8/generic_timer.c index 303ba3c00ef..bf07a706a02 100644 --- a/arch/arm/cpu/armv8/generic_timer.c +++ b/arch/arm/cpu/armv8/generic_timer.c @@ -61,3 +61,10 @@ unsigned long usec2ticks(unsigned long usec) return ticks; } + +ulong timer_get_boot_us(void) +{ + u64 val = get_ticks() * 1000000; + + return val / get_tbclk(); +} diff --git a/arch/arm/cpu/armv8/zynqmp/clk.c b/arch/arm/cpu/armv8/zynqmp/clk.c index 13e1977bfa1..0593b6310fd 100644 --- a/arch/arm/cpu/armv8/zynqmp/clk.c +++ b/arch/arm/cpu/armv8/zynqmp/clk.c @@ -16,10 +16,6 @@ unsigned long zynqmp_get_system_timer_freq(void) u32 ver = zynqmp_get_silicon_version(); switch (ver) { - case ZYNQMP_CSU_VERSION_VELOCE: - return 10000; - case ZYNQMP_CSU_VERSION_EP108: - return 4000000; case ZYNQMP_CSU_VERSION_QEMU: return 50000000; } @@ -40,11 +36,7 @@ int set_cpu_clk_info(void) { gd->cpu_clk = get_tbclk(); - /* Support Veloce to show at least 1MHz via bdi */ - if (gd->cpu_clk > 1000000) - gd->bd->bi_arm_freq = gd->cpu_clk / 1000000; - else - gd->bd->bi_arm_freq = 1; + gd->bd->bi_arm_freq = gd->cpu_clk / 1000000; gd->bd->bi_dsp_freq = 0; diff --git a/arch/arm/cpu/armv8/zynqmp/cpu.c b/arch/arm/cpu/armv8/zynqmp/cpu.c index 2748d65d14b..e122be59c74 100644 --- a/arch/arm/cpu/armv8/zynqmp/cpu.c +++ b/arch/arm/cpu/armv8/zynqmp/cpu.c @@ -135,12 +135,8 @@ unsigned int zynqmp_get_silicon_version(void) gd->cpu_clk = get_tbclk(); switch (gd->cpu_clk) { - case 0 ... 1000000: - return ZYNQMP_CSU_VERSION_VELOCE; case 50000000: return ZYNQMP_CSU_VERSION_QEMU; - case 4000000: - return ZYNQMP_CSU_VERSION_EP108; } return ZYNQMP_CSU_VERSION_SILICON; @@ -177,8 +173,8 @@ int __maybe_unused invoke_smc(u32 pm_api_id, u32 arg0, u32 arg1, u32 arg2, #define ZYNQMP_SIP_SVC_GET_API_VERSION 0xC2000001 -#define ZYNQMP_PM_VERSION_MAJOR 0 -#define ZYNQMP_PM_VERSION_MINOR 3 +#define ZYNQMP_PM_VERSION_MAJOR 1 +#define ZYNQMP_PM_VERSION_MINOR 0 #define ZYNQMP_PM_VERSION_MAJOR_SHIFT 16 #define ZYNQMP_PM_VERSION_MINOR_MASK 0xFFFF diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 7bec3d6cfea..790571b7730 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -130,6 +130,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \ zynq-cc108.dtb \ zynq-cse-qspi-single.dtb \ zynq-microzed.dtb \ + zynq-minized.dtb \ zynq-picozed.dtb \ zynq-syzygy-hub.dtb \ zynq-topic-miami.dtb \ @@ -183,20 +184,20 @@ dtb-$(CONFIG_TI816X) += dm8168-evm.dtb dtb-$(CONFIG_THUNDERX) += thunderx-88xx.dtb dtb-$(CONFIG_ARCH_SOCFPGA) += \ - socfpga_arria10_socdk_sdmmc.dtb \ socfpga_arria5_socdk.dtb \ + socfpga_arria10_socdk_sdmmc.dtb \ socfpga_cyclone5_is1.dtb \ socfpga_cyclone5_mcvevk.dtb \ socfpga_cyclone5_socdk.dtb \ socfpga_cyclone5_dbm_soc1.dtb \ - socfpga_cyclone5_de0_nano_soc.dtb \ + socfpga_cyclone5_de0_nano_soc.dtb \ socfpga_cyclone5_de1_soc.dtb \ socfpga_cyclone5_de10_nano.dtb \ socfpga_cyclone5_sockit.dtb \ socfpga_cyclone5_socrates.dtb \ socfpga_cyclone5_sr1500.dtb \ - socfpga_stratix10_socdk.dtb \ - socfpga_cyclone5_vining_fpga.dtb + socfpga_cyclone5_vining_fpga.dtb \ + socfpga_stratix10_socdk.dtb dtb-$(CONFIG_TARGET_DRA7XX_EVM) += dra72-evm.dtb dra7-evm.dtb \ dra72-evm-revc.dtb dra71-evm.dtb dra76-evm.dtb @@ -381,6 +382,7 @@ dtb-$(CONFIG_MACH_SUN50I_H5) += \ sun50i-h5-orangepi-prime.dtb \ sun50i-h5-orangepi-zero-plus2.dtb dtb-$(CONFIG_MACH_SUN50I) += \ + sun50i-a64-amarula-relic.dtb \ sun50i-a64-bananapi-m64.dtb \ sun50i-a64-nanopi-a64.dtb \ sun50i-a64-olinuxino.dtb \ @@ -400,24 +402,33 @@ dtb-$(CONFIG_VF610) += vf500-colibri.dtb \ dtb-$(CONFIG_MX53) += imx53-cx9020.dtb -dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \ - imx6sl-evk.dtb \ - imx6sll-evk.dtb \ +dtb-$(CONFIG_MX6QDL) += \ imx6dl-icore.dtb \ imx6dl-icore-mipi.dtb \ imx6dl-icore-rqs.dtb \ + imx6dl-mamoj.dtb \ imx6q-cm-fx6.dtb \ imx6q-icore.dtb \ imx6q-icore-mipi.dtb \ imx6q-icore-rqs.dtb \ - imx6q-logicpd.dtb \ + imx6q-logicpd.dtb + +dtb-$(CONFIG_MX6SL) += imx6sl-evk.dtb + +dtb-$(CONFIG_MX6SL) += imx6sll-evk.dtb + +dtb-$(CONFIG_MX6SX) += \ imx6sx-sabreauto.dtb \ - imx6sx-sdb.dtb \ + imx6sx-sdb.dtb + +dtb-$(CONFIG_MX6UL) += \ imx6ul-geam-kit.dtb \ imx6ul-isiot-emmc.dtb \ imx6ul-isiot-nand.dtb \ imx6ul-opos6uldev.dtb +dtb-$(CONFIG_MX6ULL) += imx6ull-14x14-evk.dtb + dtb-$(CONFIG_MX7) += imx7-colibri.dtb \ imx7d-sdb.dtb @@ -430,6 +441,7 @@ dtb-$(CONFIG_RCAR_GEN3) += \ r8a7796-salvator-x.dtb \ r8a77965-salvator-x.dtb \ r8a77970-eagle.dtb \ + r8a77990-ebisu.dtb \ r8a77995-draak.dtb dtb-$(CONFIG_SOC_KEYSTONE) += keystone-k2hk-evm.dtb \ diff --git a/arch/arm/dts/armada-388-clearfog.dts b/arch/arm/dts/armada-388-clearfog.dts index bc52bc0167d..a0b566a5ae0 100644 --- a/arch/arm/dts/armada-388-clearfog.dts +++ b/arch/arm/dts/armada-388-clearfog.dts @@ -62,6 +62,8 @@ ethernet2 = ð1; ethernet3 = ð2; spi1 = &spi1; + i2c0 = &i2c0; + i2c1 = &i2c1; }; chosen { diff --git a/arch/arm/dts/armada-8040-db.dts b/arch/arm/dts/armada-8040-db.dts index fa589956ad7..65b30bbc648 100644 --- a/arch/arm/dts/armada-8040-db.dts +++ b/arch/arm/dts/armada-8040-db.dts @@ -81,6 +81,13 @@ 1 3 0 0 0 0 0 0 0 3 >; }; +&ap_sdhci0 { + pinctrl-names = "default"; + pinctrl-0 = <&ap_emmc_pins>; + bus-width = <8>; + status = "okay"; +}; + &cpm_pinctl { /* MPP Bus: * [0-31] = 0xff: Keep default CP0_shared_pins @@ -182,6 +189,13 @@ status = "okay"; }; +&cpm_sdhci0 { + pinctrl-names = "default"; + pinctrl-0 = <&cpm_sdhci_pins>; + bus-width = <4>; + status = "okay"; +}; + &cps_pinctl { /* MPP Bus: * [0-11] RGMII0 diff --git a/arch/arm/dts/armada-8040-mcbin.dts b/arch/arm/dts/armada-8040-mcbin.dts index f912596c2cd..08f1d7df69a 100644 --- a/arch/arm/dts/armada-8040-mcbin.dts +++ b/arch/arm/dts/armada-8040-mcbin.dts @@ -154,6 +154,14 @@ status = "okay"; }; +/* uSD slot */ +&cpm_sdhci0 { + pinctrl-names = "default"; + pinctrl-0 = <&cpm_sdhci_pins>; + bus-width = <4>; + status = "okay"; +}; + &cpm_comphy { /* * CP0 Serdes Configuration: diff --git a/arch/arm/dts/armada-ap806.dtsi b/arch/arm/dts/armada-ap806.dtsi index e0d301682b9..ebdee514c09 100644 --- a/arch/arm/dts/armada-ap806.dtsi +++ b/arch/arm/dts/armada-ap806.dtsi @@ -141,7 +141,7 @@ }; ap_pinctl: ap-pinctl@6F4000 { - compatible = "marvell,armada-ap806-pinctrl"; + compatible = "marvell,ap806-pinctrl"; bank-name ="apn-806"; reg = <0x6F4000 0x10>; pin-count = <20>; diff --git a/arch/arm/dts/armada-cp110-master.dtsi b/arch/arm/dts/armada-cp110-master.dtsi index 8c336f2c38f..551d00d7746 100644 --- a/arch/arm/dts/armada-cp110-master.dtsi +++ b/arch/arm/dts/armada-cp110-master.dtsi @@ -120,8 +120,8 @@ cpm_pinctl: cpm-pinctl@440000 { compatible = "marvell,mvebu-pinctrl", - "marvell,a70x0-pinctrl", - "marvell,a80x0-cp0-pinctrl"; + "marvell,armada-7k-pinctrl", + "marvell,armada-8k-cpm-pinctrl"; bank-name ="cp0-110"; reg = <0x440000 0x20>; pin-count = <63>; diff --git a/arch/arm/dts/armada-cp110-slave.dtsi b/arch/arm/dts/armada-cp110-slave.dtsi index 0cdb3d3ae3d..2ea9004f1d4 100644 --- a/arch/arm/dts/armada-cp110-slave.dtsi +++ b/arch/arm/dts/armada-cp110-slave.dtsi @@ -120,7 +120,7 @@ cps_pinctl: cps-pinctl@440000 { compatible = "marvell,mvebu-pinctrl", - "marvell,a80x0-cp1-pinctrl"; + "marvell,armada-8k-cps-pinctrl"; bank-name ="cp1-110"; reg = <0x440000 0x20>; pin-count = <63>; diff --git a/arch/arm/dts/bitmain-antminer-s9.dts b/arch/arm/dts/bitmain-antminer-s9.dts new file mode 100644 index 00000000000..7362ad4e8f9 --- /dev/null +++ b/arch/arm/dts/bitmain-antminer-s9.dts @@ -0,0 +1,78 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Bitmain Antminer S9 board DTS + * + * Copyright (C) 2018 Michal Simek + * Copyright (C) 2018 VanguardiaSur + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + model = "Bitmain Antminer S9 Board"; + compatible = "bitmain,antminer-s9", "xlnx,zynq-7000"; + + aliases { + ethernet0 = &gem0; + serial0 = &uart1; + mmc0 = &sdhci0; + gpio0 = &gpio0; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x40000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + bootcount@efffff0 { + reg = <0xefffff0 0x10>; + no-map; + }; + + fpga_space@f000000 { + reg = <0xf000000 0x1000000>; + no-map; + }; + }; + + chosen { + bootargs = "earlycon"; + stdout-path = "serial0:115200n8"; + }; +}; + +&clkc { + ps-clk-frequency = <33333333>; +}; + +&gem0 { + status = "okay"; + phy-mode = "rgmii-id"; + phy-handle = <ðernet_phy>; + + /* 0362/5e62 */ + ethernet_phy: ethernet-phy@1 { + reg = <1>; + }; +}; + +&sdhci0 { + u-boot,dm-pre-reloc; + status = "okay"; + disable-wp; +}; + +&uart1 { + u-boot,dm-pre-reloc; + status = "okay"; +}; + +&watchdog0 { + reset-on-timeout; + timeout-sec = <200>; +}; diff --git a/arch/arm/dts/dragonboard410c-uboot.dtsi b/arch/arm/dts/dragonboard410c-uboot.dtsi index 17ee55a20cc..b968f5eb683 100644 --- a/arch/arm/dts/dragonboard410c-uboot.dtsi +++ b/arch/arm/dts/dragonboard410c-uboot.dtsi @@ -13,6 +13,14 @@ soc { u-boot,dm-pre-reloc; + qcom,tlmm@1000000 { + u-boot,dm-pre-reloc; + + uart { + u-boot,dm-pre-reloc; + }; + }; + qcom,gcc@1800000 { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/dragonboard410c.dts b/arch/arm/dts/dragonboard410c.dts index d9d5831f4f8..182a865b0ab 100644 --- a/arch/arm/dts/dragonboard410c.dts +++ b/arch/arm/dts/dragonboard410c.dts @@ -8,6 +8,7 @@ /dts-v1/; #include "skeleton64.dtsi" +#include <dt-bindings/pinctrl/pinctrl-snapdragon.h> / { model = "Qualcomm Technologies, Inc. Dragonboard 410c"; @@ -38,6 +39,17 @@ ranges = <0x0 0x0 0x0 0xffffffff>; compatible = "simple-bus"; + pinctrl: qcom,tlmm@1000000 { + compatible = "qcom,tlmm-apq8016"; + reg = <0x1000000 0x400000>; + + blsp1_uart: uart { + function = "blsp1_uart"; + pins = "GPIO_4", "GPIO_5"; + drive-strength = <DRIVE_STRENGTH_8MA>; + bias-disable; + }; + }; clkc: qcom,gcc@1800000 { compatible = "qcom,gcc-apq8016"; reg = <0x1800000 0x80000>; @@ -49,6 +61,8 @@ compatible = "qcom,msm-uartdm-v1.4"; reg = <0x78b0000 0x200>; clock = <&clkc 4>; + pinctrl-names = "uart"; + pinctrl-0 = <&blsp1_uart>; }; soc_gpios: pinctrl@1000000 { diff --git a/arch/arm/dts/dragonboard820c-uboot.dtsi b/arch/arm/dts/dragonboard820c-uboot.dtsi index 88312b3fa16..97394cc5b04 100644 --- a/arch/arm/dts/dragonboard820c-uboot.dtsi +++ b/arch/arm/dts/dragonboard820c-uboot.dtsi @@ -5,6 +5,20 @@ * (C) Copyright 2017 Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> */ +/ { + soc { + u-boot,dm-pre-reloc; + + clock-controller@300000 { + u-boot,dm-pre-reloc; + }; + + serial@75b0000 { + u-boot,dm-pre-reloc; + }; + }; +}; + &pm8994_pon { key_vol_down { gpios = <&pm8994_pon 1 0>; diff --git a/arch/arm/dts/dragonboard820c.dts b/arch/arm/dts/dragonboard820c.dts index 7bfae1c4266..7457d7b7e3f 100644 --- a/arch/arm/dts/dragonboard820c.dts +++ b/arch/arm/dts/dragonboard820c.dts @@ -50,6 +50,7 @@ blsp2_uart1: serial@75b0000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x75b0000 0x1000>; + clock = <&gcc 4>; }; sdhc2: sdhci@74a4900 { diff --git a/arch/arm/dts/imx53-kp.dts b/arch/arm/dts/imx53-kp.dts new file mode 100644 index 00000000000..fd64a9f2f6d --- /dev/null +++ b/arch/arm/dts/imx53-kp.dts @@ -0,0 +1,135 @@ +/* + * Copyright 2018 + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de + * + * SPDX-License-Identifier: GPL-2.0+ or X11 + */ + +/dts-v1/; +#include <dt-bindings/gpio/gpio.h> +#include "imx53.dtsi" +#include "imx53-pinfunc.h" + +/ { + model = "K+P iMX53"; + compatible = "kp,imx53-kp", "fsl,imx53"; + + chosen { + stdout-path = &uart2; + }; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_eth>; + phy-mode = "rmii"; + phy-reset-gpios = <&gpio7 6 0>; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + clock_frequency = <100000>; + + scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>; + + status = "okay"; + + pmic: mc34708@8 { + compatible = "fsl,mc34708"; + reg = <0x8>; + }; +}; + +&i2c3 { + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c3>; + pinctrl-1 = <&pinctrl_i2c3_gpio>; + clock_frequency = <100000>; + + scl-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; + + status = "okay"; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + imx53-kp { + pinctrl_eth: ethgrp { + fsl,pins = < + MX53_PAD_FEC_MDIO__FEC_MDIO 0x1fc + MX53_PAD_FEC_MDC__FEC_MDC 0x4 + MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x180 + MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x180 + MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x4 + MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x4 + MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x4 + MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x180 + /* The RX_ER pin needs to be pull down */ + /* for this device */ + MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x1c0 + MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x180 + >; + }; + + pinctrl_hog: hoggrp { + fsl,pins = < + /* PHY RESET */ + MX53_PAD_PATA_DA_0__GPIO7_6 0x182 + /* VBUS_PWR_EN */ + MX53_PAD_PATA_DA_2__GPIO7_8 0x1e4 + /* BOOSTER_OFF */ + MX53_PAD_EIM_CS0__GPIO2_23 0x1e4 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX53_PAD_KEY_ROW3__I2C2_SDA + (0x1ee | IMX_PAD_SION) + MX53_PAD_KEY_COL3__I2C2_SCL + (0x1ee | IMX_PAD_SION) + >; + }; + + pinctrl_i2c2_gpio: i2c2grpgpio { + fsl,pins = < + MX53_PAD_KEY_ROW3__GPIO4_13 0x1e4 + MX53_PAD_KEY_COL3__GPIO4_12 0x1e4 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX53_PAD_GPIO_6__I2C3_SDA (0x1ee | IMX_PAD_SION) + MX53_PAD_GPIO_5__I2C3_SCL (0x1ee | IMX_PAD_SION) + >; + }; + + pinctrl_i2c3_gpio: i2c3grpgpio { + fsl,pins = < + MX53_PAD_GPIO_6__GPIO1_6 0x1e4 + MX53_PAD_GPIO_5__GPIO1_5 0x1e4 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4 + MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4 + >; + }; + }; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; diff --git a/arch/arm/dts/imx53-pinfunc.h b/arch/arm/dts/imx53-pinfunc.h index aec406bc65e..baf710d0df2 100644 --- a/arch/arm/dts/imx53-pinfunc.h +++ b/arch/arm/dts/imx53-pinfunc.h @@ -10,6 +10,7 @@ #ifndef __DTS_IMX53_PINFUNC_H #define __DTS_IMX53_PINFUNC_H +#define IMX_PAD_SION 0x40000000 /* * The pin function ID is a tuple of * <mux_reg conf_reg input_reg mux_mode input_val> diff --git a/arch/arm/dts/imx53.dtsi b/arch/arm/dts/imx53.dtsi index f68e88585e4..64591f9d476 100644 --- a/arch/arm/dts/imx53.dtsi +++ b/arch/arm/dts/imx53.dtsi @@ -21,6 +21,16 @@ / { aliases { serial1 = &uart2; + gpio0 = &gpio1; + gpio1 = &gpio2; + gpio2 = &gpio3; + gpio3 = &gpio4; + gpio4 = &gpio5; + gpio5 = &gpio6; + gpio6 = &gpio7; + i2c0 = &i2c1; + i2c1 = &i2c2; + i2c2 = &i2c3; }; tzic: tz-interrupt-controller@fffc000 { @@ -73,6 +83,66 @@ #clock-cells = <1>; }; + gpio1: gpio@53f84000 { + compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; + reg = <0x53f84000 0x4000>; + interrupts = <50 51>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio2: gpio@53f88000 { + compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; + reg = <0x53f88000 0x4000>; + interrupts = <52 53>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio3: gpio@53f8c000 { + compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; + reg = <0x53f8c000 0x4000>; + interrupts = <54 55>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio4: gpio@53f90000 { + compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; + reg = <0x53f90000 0x4000>; + interrupts = <56 57>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio5: gpio@53fdc000 { + compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; + reg = <0x53fdc000 0x4000>; + interrupts = <103 104>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio6: gpio@53fe0000 { + compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; + reg = <0x53fe0000 0x4000>; + interrupts = <105 106>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + gpio7: gpio@53fe4000 { compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; reg = <0x53fe4000 0x4000>; @@ -82,6 +152,16 @@ interrupt-controller; #interrupt-cells = <2>; }; + + i2c3: i2c@53fec000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; + reg = <0x53fec000 0x4000>; + interrupts = <64>; + clocks = <&clks IMX5_CLK_I2C3_GATE>; + status = "disabled"; + }; }; aips@60000000 { /* AIPS2 */ @@ -102,7 +182,6 @@ fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin"; }; - fec: ethernet@63fec000 { compatible = "fsl,imx53-fec", "fsl,imx25-fec"; reg = <0x63fec000 0x4000>; @@ -113,6 +192,26 @@ clock-names = "ipg", "ahb", "ptp"; status = "disabled"; }; + + i2c2: i2c@63fc4000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; + reg = <0x63fc4000 0x4000>; + interrupts = <63>; + clocks = <&clks IMX5_CLK_I2C2_GATE>; + status = "disabled"; + }; + + i2c1: i2c@63fc8000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; + reg = <0x63fc8000 0x4000>; + interrupts = <62>; + clocks = <&clks IMX5_CLK_I2C1_GATE>; + status = "disabled"; + }; }; }; }; diff --git a/arch/arm/dts/imx6dl-icore-mipi-u-boot.dtsi b/arch/arm/dts/imx6dl-icore-mipi-u-boot.dtsi new file mode 100644 index 00000000000..06dd72527d6 --- /dev/null +++ b/arch/arm/dts/imx6dl-icore-mipi-u-boot.dtsi @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com> + */ + +#include "imx6qdl-icore-u-boot.dtsi" + +&usdhc3 { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/imx6dl-icore-mipi.dts b/arch/arm/dts/imx6dl-icore-mipi.dts index 3a444c0d986..39bdf2d55b3 100644 --- a/arch/arm/dts/imx6dl-icore-mipi.dts +++ b/arch/arm/dts/imx6dl-icore-mipi.dts @@ -16,6 +16,5 @@ }; &usdhc3 { - u-boot,dm-spl; status = "okay"; }; diff --git a/arch/arm/dts/imx6dl-icore-rqs-u-boot.dtsi b/arch/arm/dts/imx6dl-icore-rqs-u-boot.dtsi new file mode 100644 index 00000000000..bc5ed941b45 --- /dev/null +++ b/arch/arm/dts/imx6dl-icore-rqs-u-boot.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com> + */ + +#include "imx6qdl-icore-rqs-u-boot.dtsi" diff --git a/arch/arm/dts/imx6dl-icore-u-boot.dtsi b/arch/arm/dts/imx6dl-icore-u-boot.dtsi new file mode 100644 index 00000000000..cfc9f8c7411 --- /dev/null +++ b/arch/arm/dts/imx6dl-icore-u-boot.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com> + */ + +#include "imx6qdl-icore-u-boot.dtsi" diff --git a/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi b/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi new file mode 100644 index 00000000000..3af57ff8eb8 --- /dev/null +++ b/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com> + */ + +#include "imx6qdl-u-boot.dtsi" + +&usdhc3 { + u-boot,dm-spl; +}; + +&pinctrl_usdhc3 { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/imx6dl-mamoj.dts b/arch/arm/dts/imx6dl-mamoj.dts new file mode 100644 index 00000000000..3f6d8aa4a25 --- /dev/null +++ b/arch/arm/dts/imx6dl-mamoj.dts @@ -0,0 +1,225 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2018 BTicino + * Copyright (C) 2018 Amarula Solutions B.V. + */ + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include "imx6dl.dtsi" + +/ { + model = "BTicino i.MX6DL Mamoj board"; + compatible = "bticino,imx6dl-mamoj", "fsl,imx6dl"; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "mii"; + status = "okay"; +}; + +&i2c3 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; +}; + +&i2c4 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4>; + status = "okay"; + + pmic: pfuze100@08 { + compatible = "fsl,pfuze100"; + reg = <0x08>; + + regulators { + /* CPU vdd_arm core */ + sw1a_reg: sw1ab { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + /* SOC vdd_soc */ + sw1c_reg: sw1c { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + /* I/O power GEN_3V3 */ + sw2_reg: sw2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + /* DDR memory */ + sw3a_reg: sw3a { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-boot-on; + regulator-always-on; + }; + + /* DDR memory */ + sw3b_reg: sw3b { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-boot-on; + regulator-always-on; + }; + + /* not used */ + sw4_reg: sw4 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + }; + + /* not used */ + swbst_reg: swbst { + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5150000>; + }; + + /* PMIC vsnvs. EX boot mode */ + snvs_reg: vsnvs { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <3000000>; + regulator-boot-on; + regulator-always-on; + }; + + vref_reg: vrefddr { + regulator-boot-on; + regulator-always-on; + }; + + /* not used */ + vgen1_reg: vgen1 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + /* not used */ + vgen2_reg: vgen2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + /* not used */ + vgen3_reg: vgen3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + + /* 1v8 general power */ + vgen4_reg: vgen4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + /* 2v8 general power IMX6 */ + vgen5_reg: vgen5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + /* 3v3 Ethernet */ + vgen6_reg: vgen6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; + }; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + bus-width = <8>; + non-removable; + keep-power-in-suspend; + status = "okay"; +}; + +&iomuxc { + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b1 + MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0 + MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0 + MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2 0x1b0b0 + MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3 0x1b0b0 + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 + MX6QDL_PAD_GPIO_19__ENET_TX_ER 0x1b0b0 + MX6QDL_PAD_GPIO_18__ENET_RX_CLK 0x1b0b1 + MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0 + MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0 + MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2 0x1b0b0 + MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3 0x1b0b0 + MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 + MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0 + MX6QDL_PAD_KEY_COL3__ENET_CRS 0x1b0b0 + MX6QDL_PAD_KEY_ROW1__ENET_COL 0x1b0b0 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c4: i2c4grp { + fsl,pins = < + MX6QDL_PAD_GPIO_7__I2C4_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_8__I2C4_SDA 0x4001b8b1 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 + MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 + MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 + MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 + >; + }; +}; diff --git a/arch/arm/dts/imx6q-icore-mipi-u-boot.dtsi b/arch/arm/dts/imx6q-icore-mipi-u-boot.dtsi new file mode 100644 index 00000000000..06dd72527d6 --- /dev/null +++ b/arch/arm/dts/imx6q-icore-mipi-u-boot.dtsi @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com> + */ + +#include "imx6qdl-icore-u-boot.dtsi" + +&usdhc3 { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/imx6q-icore-mipi.dts b/arch/arm/dts/imx6q-icore-mipi.dts index 527f52c8866..e7c5616a631 100644 --- a/arch/arm/dts/imx6q-icore-mipi.dts +++ b/arch/arm/dts/imx6q-icore-mipi.dts @@ -16,6 +16,5 @@ }; &usdhc3 { - u-boot,dm-spl; status = "okay"; }; diff --git a/arch/arm/dts/imx6q-icore-rqs-u-boot.dtsi b/arch/arm/dts/imx6q-icore-rqs-u-boot.dtsi new file mode 100644 index 00000000000..bc5ed941b45 --- /dev/null +++ b/arch/arm/dts/imx6q-icore-rqs-u-boot.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com> + */ + +#include "imx6qdl-icore-rqs-u-boot.dtsi" diff --git a/arch/arm/dts/imx6q-icore-u-boot.dtsi b/arch/arm/dts/imx6q-icore-u-boot.dtsi new file mode 100644 index 00000000000..cfc9f8c7411 --- /dev/null +++ b/arch/arm/dts/imx6q-icore-u-boot.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com> + */ + +#include "imx6qdl-icore-u-boot.dtsi" diff --git a/arch/arm/dts/imx6qdl-icore-rqs-u-boot.dtsi b/arch/arm/dts/imx6qdl-icore-rqs-u-boot.dtsi new file mode 100644 index 00000000000..158cadceddc --- /dev/null +++ b/arch/arm/dts/imx6qdl-icore-rqs-u-boot.dtsi @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com> + */ + +#include "imx6qdl-u-boot.dtsi" + +&usdhc3 { + u-boot,dm-spl; +}; + +&usdhc4 { + u-boot,dm-spl; +}; + +&pinctrl_usdhc3 { + u-boot,dm-spl; +}; + +&pinctrl_usdhc4 { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/dts/imx6qdl-icore-rqs.dtsi index 4f7f10203d3..d797a034f76 100644 --- a/arch/arm/dts/imx6qdl-icore-rqs.dtsi +++ b/arch/arm/dts/imx6qdl-icore-rqs.dtsi @@ -105,7 +105,6 @@ }; &usdhc3 { - u-boot,dm-spl; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc3>; cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; @@ -114,7 +113,6 @@ }; &usdhc4 { - u-boot,dm-spl; pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc4>; pinctrl-1 = <&pinctrl_usdhc4_100mhz>; @@ -176,7 +174,6 @@ }; pinctrl_usdhc3: usdhc3grp { - u-boot,dm-spl; fsl,pins = < MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17070 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10070 @@ -188,7 +185,6 @@ }; pinctrl_usdhc4: usdhc4grp { - u-boot,dm-spl; fsl,pins = < MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070 diff --git a/arch/arm/dts/imx6qdl-icore-u-boot.dtsi b/arch/arm/dts/imx6qdl-icore-u-boot.dtsi new file mode 100644 index 00000000000..f95d49d00d6 --- /dev/null +++ b/arch/arm/dts/imx6qdl-icore-u-boot.dtsi @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com> + */ + +#include "imx6qdl-u-boot.dtsi" + +&usdhc1 { + u-boot,dm-spl; +}; + +&pinctrl_usdhc1 { + u-boot,dm-spl; +}; + +&pinctrl_usdhc3 { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/imx6qdl-icore.dtsi b/arch/arm/dts/imx6qdl-icore.dtsi index 913dc99c54f..5eccda800da 100644 --- a/arch/arm/dts/imx6qdl-icore.dtsi +++ b/arch/arm/dts/imx6qdl-icore.dtsi @@ -122,7 +122,6 @@ }; &usdhc1 { - u-boot,dm-spl; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc1>; cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; @@ -221,7 +220,6 @@ }; pinctrl_usdhc1: usdhc1grp { - u-boot,dm-spl; fsl,pins = < MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17070 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10070 @@ -233,7 +231,6 @@ }; pinctrl_usdhc3: usdhc3grp { - u-boot,dm-spl; fsl,pins = < MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 diff --git a/arch/arm/dts/imx6qdl-u-boot.dtsi b/arch/arm/dts/imx6qdl-u-boot.dtsi new file mode 100644 index 00000000000..dffc21ba78c --- /dev/null +++ b/arch/arm/dts/imx6qdl-u-boot.dtsi @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com> + */ + +/ { + soc { + u-boot,dm-spl; + + aips-bus@02000000 { + u-boot,dm-spl; + }; + + aips-bus@02100000 { + u-boot,dm-spl; + }; + }; +}; + +&gpio1 { + u-boot,dm-spl; +}; + +&iomuxc { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/imx6qdl.dtsi b/arch/arm/dts/imx6qdl.dtsi index e04b57089a6..b13b0b2db88 100644 --- a/arch/arm/dts/imx6qdl.dtsi +++ b/arch/arm/dts/imx6qdl.dtsi @@ -77,7 +77,6 @@ compatible = "simple-bus"; interrupt-parent = <&gpc>; ranges; - u-boot,dm-spl; dma_apbh: dma-apbh@00110000 { compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh"; @@ -226,7 +225,6 @@ #size-cells = <1>; reg = <0x02000000 0x100000>; ranges; - u-boot,dm-spl; spba-bus@02000000 { compatible = "fsl,spba-bus", "simple-bus"; @@ -518,7 +516,6 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; - u-boot,dm-spl; }; gpio2: gpio@020a0000 { @@ -808,7 +805,6 @@ iomuxc: iomuxc@020e0000 { compatible = "fsl,imx6dl-iomuxc", "fsl,imx6q-iomuxc"; reg = <0x020e0000 0x4000>; - u-boot,dm-spl; }; ldb: ldb@020e0008 { @@ -893,7 +889,6 @@ #size-cells = <1>; reg = <0x02100000 0x100000>; ranges; - u-boot,dm-spl; crypto: caam@2100000 { compatible = "fsl,sec-v4.0"; diff --git a/arch/arm/dts/imx6ul-geam-kit-u-boot.dtsi b/arch/arm/dts/imx6ul-geam-kit-u-boot.dtsi new file mode 100644 index 00000000000..3141a07f048 --- /dev/null +++ b/arch/arm/dts/imx6ul-geam-kit-u-boot.dtsi @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com> + */ + +#include "imx6ul-u-boot.dtsi" + +&usdhc1 { + u-boot,dm-spl; +}; + +&iomuxc { + pinctrl_usdhc1: usdhc1grp { + u-boot,dm-spl; + }; + + pinctrl_usdhc1_100mhz: usdhc1grp100mhz { + u-boot,dm-spl; + }; + + pinctrl_usdhc1_200mhz: usdhc1grp200mhz { + u-boot,dm-spl; + }; +}; diff --git a/arch/arm/dts/imx6ul-geam-kit.dts b/arch/arm/dts/imx6ul-geam-kit.dts index 15e3f941538..07c21cb0a2d 100644 --- a/arch/arm/dts/imx6ul-geam-kit.dts +++ b/arch/arm/dts/imx6ul-geam-kit.dts @@ -87,7 +87,6 @@ }; &usdhc1 { - u-boot,dm-spl; pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc1>; pinctrl-1 = <&pinctrl_usdhc1_100mhz>; @@ -135,7 +134,6 @@ }; pinctrl_usdhc1: usdhc1grp { - u-boot,dm-spl; fsl,pins = < MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 @@ -147,7 +145,6 @@ }; pinctrl_usdhc1_100mhz: usdhc1grp100mhz { - u-boot,dm-spl; fsl,pins = < MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 @@ -159,7 +156,6 @@ }; pinctrl_usdhc1_200mhz: usdhc1grp200mhz { - u-boot,dm-spl; fsl,pins = < MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 diff --git a/arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi b/arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi new file mode 100644 index 00000000000..6256b793d10 --- /dev/null +++ b/arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com> + */ + +#include "imx6ul-isiot-u-boot.dtsi" + +&usdhc2 { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/imx6ul-isiot-emmc.dts b/arch/arm/dts/imx6ul-isiot-emmc.dts index a611e3bba55..50ce2d798e6 100644 --- a/arch/arm/dts/imx6ul-isiot-emmc.dts +++ b/arch/arm/dts/imx6ul-isiot-emmc.dts @@ -42,6 +42,7 @@ /dts-v1/; +#include "imx6ul.dtsi" #include "imx6ul-isiot.dtsi" / { @@ -51,29 +52,5 @@ &usdhc2 { u-boot,dm-spl; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc2>; - cd-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; - bus-width = <8>; - no-1-8-v; status = "okay"; }; - -&iomuxc { - pinctrl_usdhc2: usdhc2grp { - u-boot,dm-spl; - fsl,pins = < - MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x17070 - MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x10070 - MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17070 - MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17070 - MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17070 - MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17070 - MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17070 - MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17070 - MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17070 - MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17070 - MX6UL_PAD_NAND_ALE__USDHC2_RESET_B 0x17070 - >; - }; -}; diff --git a/arch/arm/dts/imx6ul-isiot-nand.dts b/arch/arm/dts/imx6ul-isiot-nand.dts index 12a35284285..ffdaf34efb4 100644 --- a/arch/arm/dts/imx6ul-isiot-nand.dts +++ b/arch/arm/dts/imx6ul-isiot-nand.dts @@ -42,6 +42,7 @@ /dts-v1/; +#include "imx6ul.dtsi" #include "imx6ul-isiot.dtsi" / { diff --git a/arch/arm/dts/imx6ul-isiot-u-boot.dtsi b/arch/arm/dts/imx6ul-isiot-u-boot.dtsi new file mode 100644 index 00000000000..aa8e9804bfe --- /dev/null +++ b/arch/arm/dts/imx6ul-isiot-u-boot.dtsi @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com> + */ + +#include "imx6ul-u-boot.dtsi" + +&usdhc1 { + u-boot,dm-spl; +}; + +&pinctrl_usdhc1 { + u-boot,dm-spl; +}; + +&pinctrl_usdhc2 { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/imx6ul-isiot.dtsi b/arch/arm/dts/imx6ul-isiot.dtsi index 5007a88f45e..4ed7313683d 100644 --- a/arch/arm/dts/imx6ul-isiot.dtsi +++ b/arch/arm/dts/imx6ul-isiot.dtsi @@ -42,7 +42,6 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> -#include "imx6ul.dtsi" / { memory { @@ -82,7 +81,6 @@ }; &usdhc1 { - u-boot,dm-spl; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc1>; cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; @@ -91,6 +89,15 @@ status = "okay"; }; +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + cd-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; + bus-width = <8>; + no-1-8-v; + status = "disabled"; +}; + &iomuxc { pinctrl_enet1: enet1grp { fsl,pins = < @@ -129,7 +136,6 @@ }; pinctrl_usdhc1: usdhc1grp { - u-boot,dm-spl; fsl,pins = < MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 @@ -139,4 +145,21 @@ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 >; }; + + pinctrl_usdhc2: usdhc2grp { + u-boot,dm-spl; + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x17070 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x10070 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17070 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17070 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17070 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17070 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17070 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17070 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17070 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17070 + MX6UL_PAD_NAND_ALE__USDHC2_RESET_B 0x17070 + >; + }; }; diff --git a/arch/arm/dts/imx6ul-u-boot.dtsi b/arch/arm/dts/imx6ul-u-boot.dtsi new file mode 100644 index 00000000000..eb190cf8c84 --- /dev/null +++ b/arch/arm/dts/imx6ul-u-boot.dtsi @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com> + */ + +/ { + soc { + u-boot,dm-spl; + }; +}; + +&aips1 { + u-boot,dm-spl; +}; + +&gpio1 { + u-boot,dm-spl; +}; + +&gpio4 { + u-boot,dm-spl; +}; + +&iomuxc { + u-boot,dm-spl; +}; + +&aips2 { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/imx6ul.dtsi b/arch/arm/dts/imx6ul.dtsi index d5ce3f13c24..b33e6249774 100644 --- a/arch/arm/dts/imx6ul.dtsi +++ b/arch/arm/dts/imx6ul.dtsi @@ -134,7 +134,6 @@ compatible = "simple-bus"; interrupt-parent = <&gpc>; ranges; - u-boot,dm-spl; pmu { compatible = "arm,cortex-a7-pmu"; @@ -186,7 +185,6 @@ #size-cells = <1>; reg = <0x02000000 0x100000>; ranges; - u-boot,dm-spl; spba-bus@02000000 { compatible = "fsl,spba-bus", "simple-bus"; @@ -418,7 +416,6 @@ #interrupt-cells = <2>; gpio-ranges = <&iomuxc 0 23 10>, <&iomuxc 10 17 6>, <&iomuxc 16 33 16>; - u-boot,dm-spl; }; gpio2: gpio@020a0000 { @@ -455,7 +452,6 @@ interrupt-controller; #interrupt-cells = <2>; gpio-ranges = <&iomuxc 0 94 17>, <&iomuxc 17 117 12>; - u-boot,dm-spl; }; gpio5: gpio@020ac000 { @@ -654,7 +650,6 @@ iomuxc: iomuxc@020e0000 { compatible = "fsl,imx6ul-iomuxc"; reg = <0x020e0000 0x4000>; - u-boot,dm-spl; }; gpr: iomuxc-gpr@020e4000 { @@ -735,7 +730,6 @@ #size-cells = <1>; reg = <0x02100000 0x100000>; ranges; - u-boot,dm-spl; usbotg1: usb@02184000 { compatible = "fsl,imx6ul-usb", "fsl,imx27-usb"; diff --git a/arch/arm/dts/kirkwood-6192.dtsi b/arch/arm/dts/kirkwood-6192.dtsi new file mode 100644 index 00000000000..396bcba08ad --- /dev/null +++ b/arch/arm/dts/kirkwood-6192.dtsi @@ -0,0 +1,88 @@ +// SPDX-License-Identifier: GPL-2.0 +/ { + mbus@f1000000 { + pciec: pcie@82000000 { + compatible = "marvell,kirkwood-pcie"; + status = "disabled"; + device_type = "pci"; + + #address-cells = <3>; + #size-cells = <2>; + + bus-range = <0x00 0xff>; + + ranges = + <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 + 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ + 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>; + + pcie0: pcie@1,0 { + device_type = "pci"; + assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>; + reg = <0x0800 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 + 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &intc 9>; + marvell,pcie-port = <0>; + marvell,pcie-lane = <0>; + clocks = <&gate_clk 2>; + status = "disabled"; + }; + }; + }; + + ocp@f1000000 { + pinctrl: pin-controller@10000 { + compatible = "marvell,88f6192-pinctrl"; + + pmx_sata0: pmx-sata0 { + marvell,pins = "mpp5", "mpp21", "mpp23"; + marvell,function = "sata0"; + }; + pmx_sata1: pmx-sata1 { + marvell,pins = "mpp4", "mpp20", "mpp22"; + marvell,function = "sata1"; + }; + pmx_sdio: pmx-sdio { + marvell,pins = "mpp12", "mpp13", "mpp14", + "mpp15", "mpp16", "mpp17"; + marvell,function = "sdio"; + }; + }; + + rtc: rtc@10300 { + compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc"; + reg = <0x10300 0x20>; + interrupts = <53>; + clocks = <&gate_clk 7>; + }; + + sata: sata@80000 { + compatible = "marvell,orion-sata"; + reg = <0x80000 0x5000>; + interrupts = <21>; + clocks = <&gate_clk 14>, <&gate_clk 15>; + clock-names = "0", "1"; + phys = <&sata_phy0>, <&sata_phy1>; + phy-names = "port0", "port1"; + status = "disabled"; + }; + + sdio: mvsdio@90000 { + compatible = "marvell,orion-sdio"; + reg = <0x90000 0x200>; + interrupts = <28>; + clocks = <&gate_clk 4>; + bus-width = <4>; + cap-sdio-irq; + cap-sd-highspeed; + cap-mmc-highspeed; + status = "disabled"; + }; + }; +}; diff --git a/arch/arm/dts/kirkwood-6281.dtsi b/arch/arm/dts/kirkwood-6281.dtsi new file mode 100644 index 00000000000..faa05849a40 --- /dev/null +++ b/arch/arm/dts/kirkwood-6281.dtsi @@ -0,0 +1,90 @@ +// SPDX-License-Identifier: GPL-2.0 +/ { + mbus@f1000000 { + pciec: pcie@82000000 { + compatible = "marvell,kirkwood-pcie"; + status = "disabled"; + device_type = "pci"; + + #address-cells = <3>; + #size-cells = <2>; + + bus-range = <0x00 0xff>; + + ranges = + <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 + 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ + 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>; + + pcie0: pcie@1,0 { + device_type = "pci"; + assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>; + reg = <0x0800 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 + 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &intc 9>; + marvell,pcie-port = <0>; + marvell,pcie-lane = <0>; + clocks = <&gate_clk 2>; + status = "disabled"; + }; + }; + }; + + ocp@f1000000 { + pinctrl: pin-controller@10000 { + compatible = "marvell,88f6281-pinctrl"; + + pmx_sata0: pmx-sata0 { + marvell,pins = "mpp5", "mpp21", "mpp23"; + marvell,function = "sata0"; + }; + pmx_sata1: pmx-sata1 { + marvell,pins = "mpp4", "mpp20", "mpp22"; + marvell,function = "sata1"; + }; + pmx_sdio: pmx-sdio { + marvell,pins = "mpp12", "mpp13", "mpp14", + "mpp15", "mpp16", "mpp17"; + marvell,function = "sdio"; + }; + }; + + rtc: rtc@10300 { + compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc"; + reg = <0x10300 0x20>; + interrupts = <53>; + clocks = <&gate_clk 7>; + }; + + sata: sata@80000 { + compatible = "marvell,orion-sata"; + reg = <0x80000 0x5000>; + interrupts = <21>; + clocks = <&gate_clk 14>, <&gate_clk 15>; + clock-names = "0", "1"; + phys = <&sata_phy0>, <&sata_phy1>; + phy-names = "port0", "port1"; + status = "disabled"; + }; + + sdio: mvsdio@90000 { + compatible = "marvell,orion-sdio"; + reg = <0x90000 0x200>; + interrupts = <28>; + clocks = <&gate_clk 4>; + pinctrl-0 = <&pmx_sdio>; + pinctrl-names = "default"; + bus-width = <4>; + cap-sdio-irq; + cap-sd-highspeed; + cap-mmc-highspeed; + status = "disabled"; + }; + }; +}; diff --git a/arch/arm/dts/kirkwood-98dx4122.dtsi b/arch/arm/dts/kirkwood-98dx4122.dtsi new file mode 100644 index 00000000000..299c147298c --- /dev/null +++ b/arch/arm/dts/kirkwood-98dx4122.dtsi @@ -0,0 +1,53 @@ +// SPDX-License-Identifier: GPL-2.0 +/ { + mbus@f1000000 { + pciec: pcie@82000000 { + compatible = "marvell,kirkwood-pcie"; + status = "disabled"; + device_type = "pci"; + + #address-cells = <3>; + #size-cells = <2>; + + bus-range = <0x00 0xff>; + + ranges = + <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 + 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ + 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>; + + pcie0: pcie@1,0 { + device_type = "pci"; + assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>; + reg = <0x0800 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 + 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &intc 9>; + marvell,pcie-port = <0>; + marvell,pcie-lane = <0>; + clocks = <&gate_clk 2>; + status = "disabled"; + }; + }; + }; + + ocp@f1000000 { + pinctrl: pin-controller@10000 { + compatible = "marvell,98dx4122-pinctrl"; + + }; + }; +}; + +&sata_phy0 { + status = "disabled"; +}; + +&sata_phy1 { + status = "disabled"; +}; diff --git a/arch/arm/dts/kirkwood-atl-sbx81lifkw.dts b/arch/arm/dts/kirkwood-atl-sbx81lifkw.dts new file mode 100644 index 00000000000..e5b1efa1415 --- /dev/null +++ b/arch/arm/dts/kirkwood-atl-sbx81lifkw.dts @@ -0,0 +1,133 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" + +/ { + model = "Allied Telesis SBx81LIFKW Board"; + compatible = "atl,SBx81LIFKW", "marvell,kirkwood-88f6281", + "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x08000000>; /* 128 MB */ + }; + + chosen { + bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; + }; + + aliases { + ethernet0 = ð0; + i2c0 = &i2c0; + spi0 = &spi0; + }; + + dsa { + compatible = "marvell,dsa"; + #address-cells = <2>; + #size-cells = <0>; + dsa,ethernet = <ð0>; + dsa,mii-bus = <&mdio>; + status = "okay"; + + switch@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1 0>; + + port@0 { + reg = <0>; + label = "internal0"; + }; + port@1 { + reg = <1>; + label = "internal1"; + }; + port@8 { + reg = <8>; + label = "internal8"; + phy-mode = "rgmii-id"; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + port@9 { + reg = <9>; + label = "internal9"; + phy-mode = "rgmii-id"; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + port@10 { + reg = <10>; + label = "cpu"; + }; + }; + }; +}; + +&spi0 { + status = "okay"; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,m25p128", "jedec,spi-nor", "spi-flash"; + reg = <0>; + spi-max-frequency = <50000000>; + mode = <0>; + + partition@u-boot { + reg = <0x00000000 0x00c00000>; + label = "u-boot"; + }; + partition@u-boot-env { + reg = <0x00c00000 0x00040000>; + label = "u-boot-env"; + }; + partition@unused { + reg = <0x00100000 0x00f00000>; + label = "unused"; + }; + }; +}; + +&i2c0 { + status = "okay"; + + eeprom@52 { + compatible = "atmel,24c04"; + reg = <0x52>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&mdio { + status = "okay"; +}; + +ð0 { + status = "okay"; + + ethernet0-port@0 { + speed = <1000>; + duplex = <1>; + }; +}; + +&pciec { + status = "okay"; +}; + +&pcie0 { + status = "okay"; +}; diff --git a/arch/arm/dts/kirkwood-blackarmor-nas220.dts b/arch/arm/dts/kirkwood-blackarmor-nas220.dts new file mode 100644 index 00000000000..07fbfca444d --- /dev/null +++ b/arch/arm/dts/kirkwood-blackarmor-nas220.dts @@ -0,0 +1,172 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Device Tree file for Seagate Blackarmor NAS220 + * + * Copyright (C) 2014 Evgeni Dobrev <evgeni@studio-punkt.com> + */ + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include "kirkwood.dtsi" +#include "kirkwood-6192.dtsi" + +/ { + model = "Seagate Blackarmor NAS220"; + compatible = "seagate,blackarmor-nas220","marvell,kirkwood-88f6192", + "marvell,kirkwood"; + + memory { /* 128 MB */ + device_type = "memory"; + reg = <0x00000000 0x8000000>; + }; + + chosen { + bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; + }; + + gpio_poweroff { + compatible = "gpio-poweroff"; + gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; + }; + + gpio_keys { + compatible = "gpio-keys"; + + reset { + label = "Reset"; + linux,code = <KEY_POWER>; + gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>; + }; + + button { + label = "Power"; + linux,code = <KEY_SLEEP>; + gpios = <&gpio0 26 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + blue-power { + label = "nas220:blue:power"; + gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-on"; + }; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_power_sata0 &pmx_power_sata1>; + pinctrl-names = "default"; + + sata0_power: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "SATA0 Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 24 GPIO_ACTIVE_LOW>; + }; + + sata1_power: regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "SATA1 Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 28 GPIO_ACTIVE_LOW>; + }; + }; +}; + +/* + * Serial port routed to connector CN5 + * + * pin 1 - TX (CPU's TX) + * pin 4 - RX (CPU's RX) + * pin 6 - GND + */ +&uart0 { + status = "okay"; +}; + +&pinctrl { + pinctrl-0 = <&pmx_button_reset &pmx_button_power>; + pinctrl-names = "default"; + + pmx_act_sata0: pmx-act-sata0 { + marvell,pins = "mpp15"; + marvell,function = "sata0"; + }; + + pmx_act_sata1: pmx-act-sata1 { + marvell,pins = "mpp16"; + marvell,function = "sata1"; + }; + + pmx_power_sata0: pmx-power-sata0 { + marvell,pins = "mpp24"; + marvell,function = "gpio"; + }; + + pmx_power_sata1: pmx-power-sata1 { + marvell,pins = "mpp28"; + marvell,function = "gpio"; + }; + + pmx_button_reset: pmx-button-reset { + marvell,pins = "mpp29"; + marvell,function = "gpio"; + }; + + pmx_button_power: pmx-button-power { + marvell,pins = "mpp26"; + marvell,function = "gpio"; + }; +}; + +&sata { + status = "okay"; + nr-ports = <2>; +}; + +&i2c0 { + status = "okay"; + + adt7476: thermal@2e { + compatible = "adi,adt7476"; + reg = <0x2e>; + }; +}; + +&nand { + status = "okay"; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@8 { + reg = <8>; + }; +}; + +ð0 { + status = "okay"; + + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; diff --git a/arch/arm/dts/kirkwood-d2net.dts b/arch/arm/dts/kirkwood-d2net.dts new file mode 100644 index 00000000000..bd3b266dd76 --- /dev/null +++ b/arch/arm/dts/kirkwood-d2net.dts @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree file for d2 Network v2 + * + * Copyright (C) 2014 Simon Guinot <simon.guinot@sequanux.org> + * +*/ + +/dts-v1/; + +#include <dt-bindings/leds/leds-ns2.h> +#include "kirkwood-netxbig.dtsi" + +/ { + model = "LaCie d2 Network v2"; + compatible = "lacie,d2net_v2", "lacie,netxbig", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x10000000>; + }; + + ns2-leds { + compatible = "lacie,ns2-leds"; + + blue-sata { + label = "d2net_v2:blue:sata"; + slow-gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>; + cmd-gpio = <&gpio0 30 GPIO_ACTIVE_HIGH>; + modes-map = <NS_V2_LED_OFF 1 0 + NS_V2_LED_ON 0 1 + NS_V2_LED_ON 1 1 + NS_V2_LED_SATA 0 0>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + red-fail { + label = "d2net_v2:red:fail"; + gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; + }; + }; +}; diff --git a/arch/arm/dts/kirkwood-dns325.dts b/arch/arm/dts/kirkwood-dns325.dts new file mode 100644 index 00000000000..94d9c06cbbf --- /dev/null +++ b/arch/arm/dts/kirkwood-dns325.dts @@ -0,0 +1,63 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "kirkwood-dnskw.dtsi" + +/ { + model = "D-Link DNS-325 NAS (Rev A1)"; + compatible = "dlink,dns-325-a1", "dlink,dns-325", "dlink,dns-kirkwood", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x10000000>; + }; + + chosen { + bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; + }; + + gpio-leds { + compatible = "gpio-leds"; + pinctrl-0 = <&pmx_led_power &pmx_led_red_usb_325 + &pmx_led_red_left_hdd &pmx_led_red_right_hdd + &pmx_led_white_usb>; + pinctrl-names = "default"; + + white-power { + label = "dns325:white:power"; + gpios = <&gpio0 26 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + white-usb { + label = "dns325:white:usb"; + gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; /* GPIO 43 */ + }; + red-l_hdd { + label = "dns325:red:l_hdd"; + gpios = <&gpio0 28 GPIO_ACTIVE_LOW>; + }; + red-r_hdd { + label = "dns325:red:r_hdd"; + gpios = <&gpio0 27 GPIO_ACTIVE_LOW>; + }; + red-usb { + label = "dns325:red:usb"; + gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; + }; + }; + + ocp@f1000000 { + i2c@11000 { + status = "okay"; + + lm75: lm75@48 { + compatible = "national,lm75"; + reg = <0x48>; + }; + }; + serial@12000 { + status = "okay"; + }; + }; +}; diff --git a/arch/arm/dts/kirkwood-dnskw.dtsi b/arch/arm/dts/kirkwood-dnskw.dtsi new file mode 100644 index 00000000000..cbaf06f2f78 --- /dev/null +++ b/arch/arm/dts/kirkwood-dnskw.dtsi @@ -0,0 +1,235 @@ +// SPDX-License-Identifier: GPL-2.0 +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" + +/ { + model = "D-Link DNS NASes (kirkwood-based)"; + compatible = "dlink,dns-kirkwood", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + gpio_keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_button_power &pmx_button_unmount + &pmx_button_reset>; + pinctrl-names = "default"; + + power { + label = "Power button"; + linux,code = <KEY_POWER>; + gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; + }; + eject { + label = "USB unmount button"; + linux,code = <KEY_EJECTCD>; + gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; + }; + reset { + label = "Reset button"; + linux,code = <KEY_RESTART>; + gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; + }; + }; + + gpio_fan { + /* Fan: ADDA AD045HB-G73 40mm 6000rpm@5v */ + compatible = "gpio-fan"; + pinctrl-0 = <&pmx_fan_high_speed &pmx_fan_low_speed>; + pinctrl-names = "default"; + gpios = <&gpio1 14 GPIO_ACTIVE_LOW + &gpio1 13 GPIO_ACTIVE_LOW>; + gpio-fan,speed-map = <0 0 + 3000 1 + 6000 2>; + }; + + gpio_poweroff { + compatible = "gpio-poweroff"; + pinctrl-0 = <&pmx_power_off>; + pinctrl-names = "default"; + gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; + }; + + ocp@f1000000 { + pinctrl: pin-controller@10000 { + + pinctrl-0 = <&pmx_power_back_on &pmx_present_sata0 + &pmx_present_sata1 &pmx_fan_tacho + &pmx_temp_alarm>; + pinctrl-names = "default"; + + pmx_sata0: pmx-sata0 { + marvell,pins = "mpp20"; + marvell,function = "sata1"; + }; + pmx_sata1: pmx-sata1 { + marvell,pins = "mpp21"; + marvell,function = "sata0"; + }; + pmx_led_power: pmx-led-power { + marvell,pins = "mpp26"; + marvell,function = "gpio"; + }; + pmx_led_red_right_hdd: pmx-led-red-right-hdd { + marvell,pins = "mpp27"; + marvell,function = "gpio"; + }; + pmx_led_red_left_hdd: pmx-led-red-left-hdd { + marvell,pins = "mpp28"; + marvell,function = "gpio"; + }; + pmx_led_red_usb_325: pmx-led-red-usb-325 { + marvell,pins = "mpp29"; + marvell,function = "gpio"; + }; + pmx_button_power: pmx-button-power { + marvell,pins = "mpp34"; + marvell,function = "gpio"; + }; + pmx_led_red_usb_320: pmx-led-red-usb-320 { + marvell,pins = "mpp35"; + marvell,function = "gpio"; + }; + pmx_power_off: pmx-power-off { + marvell,pins = "mpp36"; + marvell,function = "gpio"; + }; + pmx_power_back_on: pmx-power-back-on { + marvell,pins = "mpp37"; + marvell,function = "gpio"; + }; + pmx_power_sata0: pmx-power-sata0 { + marvell,pins = "mpp39"; + marvell,function = "gpio"; + }; + pmx_power_sata1: pmx-power-sata1 { + marvell,pins = "mpp40"; + marvell,function = "gpio"; + }; + pmx_present_sata0: pmx-present-sata0 { + marvell,pins = "mpp41"; + marvell,function = "gpio"; + }; + pmx_present_sata1: pmx-present-sata1 { + marvell,pins = "mpp42"; + marvell,function = "gpio"; + }; + pmx_led_white_usb: pmx-led-white-usb { + marvell,pins = "mpp43"; + marvell,function = "gpio"; + }; + pmx_fan_tacho: pmx-fan-tacho { + marvell,pins = "mpp44"; + marvell,function = "gpio"; + }; + pmx_fan_high_speed: pmx-fan-high-speed { + marvell,pins = "mpp45"; + marvell,function = "gpio"; + }; + pmx_fan_low_speed: pmx-fan-low-speed { + marvell,pins = "mpp46"; + marvell,function = "gpio"; + }; + pmx_button_unmount: pmx-button-unmount { + marvell,pins = "mpp47"; + marvell,function = "gpio"; + }; + pmx_button_reset: pmx-button-reset { + marvell,pins = "mpp48"; + marvell,function = "gpio"; + }; + pmx_temp_alarm: pmx-temp-alarm { + marvell,pins = "mpp49"; + marvell,function = "gpio"; + }; + }; + sata@80000 { + pinctrl-0 = <&pmx_sata0 &pmx_sata1>; + pinctrl-names = "default"; + status = "okay"; + nr-ports = <2>; + }; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_power_sata0 &pmx_power_sata1>; + pinctrl-names = "default"; + + sata0_power: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "SATA0 Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio1 7 0>; + }; + sata1_power: regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "SATA1 Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio1 8 0>; + }; + }; +}; + +&nand { + status = "okay"; + chip-delay = <35>; + + partition@0 { + label = "u-boot"; + reg = <0x0000000 0x100000>; + read-only; + }; + + partition@100000 { + label = "uImage"; + reg = <0x0100000 0x500000>; + }; + + partition@600000 { + label = "ramdisk"; + reg = <0x0600000 0x500000>; + }; + + partition@b00000 { + label = "image"; + reg = <0x0b00000 0x6600000>; + }; + + partition@7100000 { + label = "mini firmware"; + reg = <0x7100000 0xa00000>; + }; + + partition@7b00000 { + label = "config"; + reg = <0x7b00000 0x500000>; + }; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@8 { + reg = <8>; + }; +}; + +ð0 { + status = "okay"; + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; diff --git a/arch/arm/dts/kirkwood-dockstar.dts b/arch/arm/dts/kirkwood-dockstar.dts new file mode 100644 index 00000000000..6a3f1bf6d9f --- /dev/null +++ b/arch/arm/dts/kirkwood-dockstar.dts @@ -0,0 +1,110 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" + +/ { + model = "Seagate FreeAgent Dockstar"; + compatible = "seagate,dockstar", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x8000000>; + }; + + chosen { + bootargs = "console=ttyS0,115200n8 earlyprintk root=/dev/sda1 rootdelay=10"; + stdout-path = &uart0; + }; + + ocp@f1000000 { + pinctrl: pin-controller@10000 { + pmx_usb_power_enable: pmx-usb-power-enable { + marvell,pins = "mpp29"; + marvell,function = "gpio"; + }; + pmx_led_green: pmx-led-green { + marvell,pins = "mpp46"; + marvell,function = "gpio"; + }; + pmx_led_orange: pmx-led-orange { + marvell,pins = "mpp47"; + marvell,function = "gpio"; + }; + }; + serial@12000 { + status = "ok"; + }; + }; + gpio-leds { + compatible = "gpio-leds"; + pinctrl-0 = <&pmx_led_green &pmx_led_orange>; + pinctrl-names = "default"; + + health { + label = "status:green:health"; + gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + fault { + label = "status:orange:fault"; + gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; + }; + }; + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_usb_power_enable>; + pinctrl-names = "default"; + + usb_power: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "USB Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 29 0>; + }; + }; +}; + +&nand { + status = "okay"; + + partition@0 { + label = "u-boot"; + reg = <0x0000000 0x100000>; + read-only; + }; + + partition@100000 { + label = "uImage"; + reg = <0x0100000 0x400000>; + }; + + partition@500000 { + label = "data"; + reg = <0x0500000 0xfb00000>; + }; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@0 { + compatible = "marvell,88e1116"; + reg = <0>; + }; +}; + +ð0 { + status = "okay"; + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; diff --git a/arch/arm/dts/kirkwood-dreamplug.dts b/arch/arm/dts/kirkwood-dreamplug.dts new file mode 100644 index 00000000000..a647a65c20a --- /dev/null +++ b/arch/arm/dts/kirkwood-dreamplug.dts @@ -0,0 +1,127 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" + +/ { + model = "Globalscale Technologies Dreamplug"; + compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x20000000>; + }; + + chosen { + bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; + }; + + ocp@f1000000 { + pinctrl: pin-controller@10000 { + pmx_led_bluetooth: pmx-led-bluetooth { + marvell,pins = "mpp47"; + marvell,function = "gpio"; + }; + pmx_led_wifi: pmx-led-wifi { + marvell,pins = "mpp48"; + marvell,function = "gpio"; + }; + pmx_led_wifi_ap: pmx-led-wifi-ap { + marvell,pins = "mpp49"; + marvell,function = "gpio"; + }; + }; + serial@12000 { + status = "ok"; + }; + + spi@10600 { + status = "okay"; + + m25p40@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "mxicy,mx25l1606e", "jedec,spi-nor", "spi-flash"; + reg = <0>; + spi-max-frequency = <50000000>; + mode = <0>; + + partition@0 { + reg = <0x0 0x80000>; + label = "u-boot"; + }; + + partition@100000 { + reg = <0x100000 0x10000>; + label = "u-boot env"; + }; + + partition@180000 { + reg = <0x180000 0x10000>; + label = "dtb"; + }; + }; + }; + + sata@80000 { + status = "okay"; + nr-ports = <1>; + }; + + mvsdio@90000 { + pinctrl-0 = <&pmx_sdio>; + pinctrl-names = "default"; + status = "okay"; + /* No CD or WP GPIOs */ + broken-cd; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + pinctrl-0 = <&pmx_led_bluetooth &pmx_led_wifi + &pmx_led_wifi_ap >; + pinctrl-names = "default"; + + bluetooth { + label = "dreamplug:blue:bluetooth"; + gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; + }; + wifi { + label = "dreamplug:green:wifi"; + gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; + }; + wifi-ap { + label = "dreamplug:green:wifi_ap"; + gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; + + ethphy1: ethernet-phy@1 { + reg = <1>; + }; +}; + +ð0 { + status = "okay"; + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; + +ð1 { + status = "okay"; + ethernet1-port@0 { + phy-handle = <ðphy1>; + }; +}; diff --git a/arch/arm/dts/kirkwood-ds109.dts b/arch/arm/dts/kirkwood-ds109.dts new file mode 100644 index 00000000000..29982e7acb7 --- /dev/null +++ b/arch/arm/dts/kirkwood-ds109.dts @@ -0,0 +1,40 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Andrew Lunn <andrew@lunn.ch> + * Ben Peddell <klightspeed@killerwolves.net> + * + */ + +/dts-v1/; + +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" +#include "kirkwood-synology.dtsi" + +/ { + model = "Synology DS109, DS110, DS110jv20"; + compatible = "synology,ds109", "synology,ds110jv20", + "synology,ds110", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x8000000>; + }; + + chosen { + bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; + }; + + gpio-fan-150-32-35 { + status = "okay"; + }; + + gpio-leds-hdd-21-1 { + status = "okay"; + }; +}; + +&rs5c372 { + status = "okay"; +}; diff --git a/arch/arm/dts/kirkwood-goflexnet.dts b/arch/arm/dts/kirkwood-goflexnet.dts new file mode 100644 index 00000000000..02d87e0a106 --- /dev/null +++ b/arch/arm/dts/kirkwood-goflexnet.dts @@ -0,0 +1,190 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" + +/ { + model = "Seagate GoFlex Net"; + compatible = "seagate,goflexnet", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x8000000>; + }; + + chosen { + bootargs = "console=ttyS0,115200n8 earlyprintk root=/dev/sda1 rootdelay=10"; + stdout-path = &uart0; + }; + + ocp@f1000000 { + pinctrl: pin-controller@10000 { + pmx_usb_power_enable: pmx-usb-power-enable { + marvell,pins = "mpp29"; + marvell,function = "gpio"; + }; + pmx_led_right_cap_0: pmx-led_right_cap_0 { + marvell,pins = "mpp38"; + marvell,function = "gpio"; + }; + pmx_led_right_cap_1: pmx-led_right_cap_1 { + marvell,pins = "mpp39"; + marvell,function = "gpio"; + }; + pmx_led_right_cap_2: pmx-led_right_cap_2 { + marvell,pins = "mpp40"; + marvell,function = "gpio"; + }; + pmx_led_right_cap_3: pmx-led_right_cap_3 { + marvell,pins = "mpp41"; + marvell,function = "gpio"; + }; + pmx_led_left_cap_0: pmx-led_left_cap_0 { + marvell,pins = "mpp42"; + marvell,function = "gpio"; + }; + pmx_led_left_cap_1: pmx-led_left_cap_1 { + marvell,pins = "mpp43"; + marvell,function = "gpio"; + }; + pmx_led_left_cap_2: pmx-led_left_cap_2 { + marvell,pins = "mpp44"; + marvell,function = "gpio"; + }; + pmx_led_left_cap_3: pmx-led_left_cap_3 { + marvell,pins = "mpp45"; + marvell,function = "gpio"; + }; + pmx_led_green: pmx-led_green { + marvell,pins = "mpp46"; + marvell,function = "gpio"; + }; + pmx_led_orange: pmx-led_orange { + marvell,pins = "mpp47"; + marvell,function = "gpio"; + }; + }; + serial@12000 { + status = "ok"; + }; + + sata@80000 { + status = "okay"; + nr-ports = <2>; + }; + + }; + gpio-leds { + compatible = "gpio-leds"; + pinctrl-0 = < &pmx_led_orange + &pmx_led_left_cap_0 &pmx_led_left_cap_1 + &pmx_led_left_cap_2 &pmx_led_left_cap_3 + &pmx_led_right_cap_0 &pmx_led_right_cap_1 + &pmx_led_right_cap_2 &pmx_led_right_cap_3 + >; + pinctrl-names = "default"; + + health { + label = "status:green:health"; + gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + fault { + label = "status:orange:fault"; + gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; + }; + left0 { + label = "status:white:left0"; + gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; + }; + left1 { + label = "status:white:left1"; + gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>; + }; + left2 { + label = "status:white:left2"; + gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; + }; + left3 { + label = "status:white:left3"; + gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>; + }; + right0 { + label = "status:white:right0"; + gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; + }; + right1 { + label = "status:white:right1"; + gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; + }; + right2 { + label = "status:white:right2"; + gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; + }; + right3 { + label = "status:white:right3"; + gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; + }; + }; + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_usb_power_enable>; + pinctrl-names = "default"; + + usb_power: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "USB Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&nand { + chip-delay = <40>; + status = "okay"; + + partition@0 { + label = "u-boot"; + reg = <0x0000000 0x100000>; + read-only; + }; + + partition@100000 { + label = "uImage"; + reg = <0x0100000 0x400000>; + }; + + partition@500000 { + label = "pogoplug"; + reg = <0x0500000 0x2000000>; + }; + + partition@2500000 { + label = "root"; + reg = <0x02500000 0xd800000>; + }; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; +}; + +ð0 { + status = "okay"; + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; diff --git a/arch/arm/dts/kirkwood-guruplug-server-plus.dts b/arch/arm/dts/kirkwood-guruplug-server-plus.dts new file mode 100644 index 00000000000..ff1260ee3fe --- /dev/null +++ b/arch/arm/dts/kirkwood-guruplug-server-plus.dts @@ -0,0 +1,133 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" + +/ { + model = "Globalscale Technologies Guruplug Server Plus"; + compatible = "globalscale,guruplug-server-plus", "globalscale,guruplug", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x20000000>; + }; + + chosen { + bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; + }; + + ocp@f1000000 { + pinctrl: pin-controller@10000 { + pmx_led_health_r: pmx-led-health-r { + marvell,pins = "mpp46"; + marvell,function = "gpio"; + }; + pmx_led_health_g: pmx-led-health-g { + marvell,pins = "mpp47"; + marvell,function = "gpio"; + }; + pmx_led_wmode_r: pmx-led-wmode-r { + marvell,pins = "mpp48"; + marvell,function = "gpio"; + }; + pmx_led_wmode_g: pmx-led-wmode-g { + marvell,pins = "mpp49"; + marvell,function = "gpio"; + }; + }; + serial@12000 { + status = "ok"; + }; + + sata@80000 { + status = "okay"; + nr-ports = <1>; + }; + + /* AzureWave AW-GH381 WiFi/BT */ + mvsdio@90000 { + status = "okay"; + non-removable; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + pinctrl-0 = < &pmx_led_health_r &pmx_led_health_g + &pmx_led_wmode_r &pmx_led_wmode_g >; + pinctrl-names = "default"; + + health-r { + label = "guruplug:red:health"; + gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; + }; + health-g { + label = "guruplug:green:health"; + gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; + }; + wmode-r { + label = "guruplug:red:wmode"; + gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; + }; + wmode-g { + label = "guruplug:green:wmode"; + gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&nand { + status = "okay"; + + partition@0 { + label = "u-boot"; + reg = <0x00000000 0x00100000>; + read-only; + }; + + partition@100000 { + label = "uImage"; + reg = <0x00100000 0x00400000>; + }; + + partition@500000 { + label = "data"; + reg = <0x00500000 0x1fb00000>; + }; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@0 { + /* Marvell 88E1121R */ + compatible = "ethernet-phy-id0141.0cb0", + "ethernet-phy-ieee802.3-c22"; + reg = <0>; + }; + + ethphy1: ethernet-phy@1 { + /* Marvell 88E1121R */ + compatible = "ethernet-phy-id0141.0cb0", + "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; +}; + +ð0 { + status = "okay"; + ethernet0-port@0 { + phy-handle = <ðphy0>; + phy-connection-type = "rgmii-id"; + }; +}; + +ð1 { + status = "okay"; + ethernet1-port@0 { + phy-handle = <ðphy1>; + phy-connection-type = "rgmii-id"; + }; +}; diff --git a/arch/arm/dts/kirkwood-ib62x0.dts b/arch/arm/dts/kirkwood-ib62x0.dts new file mode 100644 index 00000000000..962a910a6f5 --- /dev/null +++ b/arch/arm/dts/kirkwood-ib62x0.dts @@ -0,0 +1,146 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" + +/ { + model = "RaidSonic ICY BOX IB-NAS62x0 (Rev B)"; + compatible = "raidsonic,ib-nas6210-b", "raidsonic,ib-nas6220-b", "raidsonic,ib-nas6210", "raidsonic,ib-nas6220", "raidsonic,ib-nas62x0", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x10000000>; + }; + + chosen { + bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; + }; + + ocp@f1000000 { + pinctrl: pin-controller@10000 { + pmx_led_os_red: pmx-led-os-red { + marvell,pins = "mpp22"; + marvell,function = "gpio"; + }; + pmx_power_off: pmx-power-off { + marvell,pins = "mpp24"; + marvell,function = "gpio"; + }; + pmx_led_os_green: pmx-led-os-green { + marvell,pins = "mpp25"; + marvell,function = "gpio"; + }; + pmx_led_usb_transfer: pmx-led-usb-transfer { + marvell,pins = "mpp27"; + marvell,function = "gpio"; + }; + pmx_button_reset: pmx-button-reset { + marvell,pins = "mpp28"; + marvell,function = "gpio"; + }; + pmx_button_usb_copy: pmx-button-usb-copy { + marvell,pins = "mpp29"; + marvell,function = "gpio"; + }; + }; + + serial@12000 { + status = "okay"; + }; + + sata@80000 { + status = "okay"; + nr-ports = <2>; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_button_reset &pmx_button_usb_copy>; + pinctrl-names = "default"; + + copy { + label = "USB Copy"; + linux,code = <KEY_COPY>; + gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; + }; + reset { + label = "Reset"; + linux,code = <KEY_RESTART>; + gpios = <&gpio0 28 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + pinctrl-0 = <&pmx_led_os_red &pmx_led_os_green + &pmx_led_usb_transfer>; + pinctrl-names = "default"; + + green-os { + label = "ib62x0:green:os"; + gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + red-os { + label = "ib62x0:red:os"; + gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>; + }; + usb-copy { + label = "ib62x0:red:usb_copy"; + gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>; + }; + }; + + gpio_poweroff { + compatible = "gpio-poweroff"; + pinctrl-0 = <&pmx_power_off>; + pinctrl-names = "default"; + gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>; + }; +}; + +&nand { + status = "okay"; + + partition@0 { + label = "u-boot"; + reg = <0x0000000 0xe0000>; + }; + + partition@e0000 { + label = "u-boot environment"; + reg = <0xe0000 0x20000>; + }; + + partition@100000 { + label = "uImage"; + reg = <0x0100000 0x600000>; + }; + + partition@700000 { + label = "root"; + reg = <0x0700000 0xf900000>; + }; + +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@8 { + reg = <8>; + }; +}; + +ð0 { + status = "okay"; + + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; diff --git a/arch/arm/dts/kirkwood-iconnect.dts b/arch/arm/dts/kirkwood-iconnect.dts new file mode 100644 index 00000000000..4a512d80912 --- /dev/null +++ b/arch/arm/dts/kirkwood-iconnect.dts @@ -0,0 +1,195 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" + +/ { + model = "Iomega Iconnect"; + compatible = "iom,iconnect-1.1", "iom,iconnect", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x10000000>; + }; + + chosen { + bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; + linux,initrd-start = <0x4500040>; + linux,initrd-end = <0x4800000>; + }; + + ocp@f1000000 { + pinctrl: pin-controller@10000 { + pmx_button_reset: pmx-button-reset { + marvell,pins = "mpp12"; + marvell,function = "gpio"; + }; + pmx_button_otb: pmx-button-otb { + marvell,pins = "mpp35"; + marvell,function = "gpio"; + }; + pmx_led_level: pmx-led-level { + marvell,pins = "mpp41"; + marvell,function = "gpio"; + }; + pmx_led_power_blue: pmx-led-power-blue { + marvell,pins = "mpp42"; + marvell,function = "gpio"; + }; + pmx_led_power_red: pmx-power-red { + marvell,pins = "mpp43"; + marvell,function = "gpio"; + }; + pmx_led_usb1: pmx-led-usb1 { + marvell,pins = "mpp44"; + marvell,function = "gpio"; + }; + pmx_led_usb2: pmx-led-usb2 { + marvell,pins = "mpp45"; + marvell,function = "gpio"; + }; + pmx_led_usb3: pmx-led-usb3 { + marvell,pins = "mpp46"; + marvell,function = "gpio"; + }; + pmx_led_usb4: pmx-led-usb4 { + marvell,pins = "mpp47"; + marvell,function = "gpio"; + }; + pmx_led_otb: pmx-led-otb { + marvell,pins = "mpp48"; + marvell,function = "gpio"; + }; + }; + i2c@11000 { + status = "okay"; + + lm63: lm63@4c { + compatible = "national,lm63"; + reg = <0x4c>; + }; + }; + serial@12000 { + status = "ok"; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + pinctrl-0 = < &pmx_led_level &pmx_led_power_blue + &pmx_led_power_red &pmx_led_usb1 + &pmx_led_usb2 &pmx_led_usb3 + &pmx_led_usb4 &pmx_led_otb >; + pinctrl-names = "default"; + + led-level { + label = "led_level"; + gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + power-blue { + label = "power:blue"; + gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + power-red { + label = "power:red"; + gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>; + }; + usb1 { + label = "usb1:blue"; + gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; + }; + usb2 { + label = "usb2:blue"; + gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>; + }; + usb3 { + label = "usb3:blue"; + gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; + }; + usb4 { + label = "usb4:blue"; + gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>; + }; + otb { + label = "otb:blue"; + gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = < &pmx_button_reset &pmx_button_otb >; + pinctrl-names = "default"; + + otb { + label = "OTB Button"; + linux,code = <KEY_COPY>; + gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; + debounce-interval = <100>; + }; + reset { + label = "Reset"; + linux,code = <KEY_RESTART>; + gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; + debounce-interval = <100>; + }; + }; +}; + +&nand { + status = "okay"; + + partition@0 { + label = "uboot"; + reg = <0x0000000 0xc0000>; + }; + + partition@a0000 { + label = "env"; + reg = <0xa0000 0x20000>; + }; + + partition@100000 { + label = "zImage"; + reg = <0x100000 0x300000>; + }; + + partition@540000 { + label = "initrd"; + reg = <0x540000 0x300000>; + }; + + partition@980000 { + label = "boot"; + reg = <0x980000 0x1f400000>; + }; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@11 { + reg = <11>; + }; +}; + +ð0 { + status = "okay"; + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; + +&pciec { + status = "okay"; +}; + +&pcie0 { + status = "okay"; +}; diff --git a/arch/arm/dts/kirkwood-is2.dts b/arch/arm/dts/kirkwood-is2.dts new file mode 100644 index 00000000000..1bc16a5cdba --- /dev/null +++ b/arch/arm/dts/kirkwood-is2.dts @@ -0,0 +1,40 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include <dt-bindings/leds/leds-ns2.h> +#include "kirkwood-ns2-common.dtsi" + +/ { + model = "LaCie Internet Space v2"; + compatible = "lacie,inetspace_v2", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x8000000>; + }; + + ocp@f1000000 { + sata@80000 { + pinctrl-0 = <&pmx_ns2_sata0>; + pinctrl-names = "default"; + status = "okay"; + nr-ports = <1>; + }; + }; + + ns2-leds { + compatible = "lacie,ns2-leds"; + + blue-sata { + label = "ns2:blue:sata"; + slow-gpio = <&gpio0 29 0>; + cmd-gpio = <&gpio0 30 0>; + modes-map = <NS_V2_LED_OFF 1 0 + NS_V2_LED_ON 0 1 + NS_V2_LED_ON 1 1 + NS_V2_LED_SATA 0 0>; + }; + }; +}; + +ðphy0 { reg = <8>; }; diff --git a/arch/arm/dts/kirkwood-km_common.dtsi b/arch/arm/dts/kirkwood-km_common.dtsi new file mode 100644 index 00000000000..75dc83914f5 --- /dev/null +++ b/arch/arm/dts/kirkwood-km_common.dtsi @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0 +/ { + chosen { + bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; + }; + + ocp@f1000000 { + pinctrl: pin-controller@10000 { + pinctrl-0 = < &pmx_i2c_gpio_sda &pmx_i2c_gpio_scl >; + pinctrl-names = "default"; + + pmx_i2c_gpio_sda: pmx-gpio-sda { + marvell,pins = "mpp8"; + marvell,function = "gpio"; + }; + pmx_i2c_gpio_scl: pmx-gpio-scl { + marvell,pins = "mpp9"; + marvell,function = "gpio"; + }; + }; + + serial@12000 { + status = "okay"; + }; + }; + + i2c { + compatible = "i2c-gpio"; + gpios = < &gpio0 8 GPIO_ACTIVE_HIGH /* sda */ + &gpio0 9 GPIO_ACTIVE_HIGH>; /* scl */ + i2c-gpio,delay-us = <2>; /* ~100 kHz */ + }; +}; + +&nand { + status = "okay"; + chip-delay = <25>; +}; + +&pciec { + status = "okay"; +}; + +&pcie0 { + status = "okay"; +}; diff --git a/arch/arm/dts/kirkwood-km_kirkwood.dts b/arch/arm/dts/kirkwood-km_kirkwood.dts new file mode 100644 index 00000000000..f035eff1c11 --- /dev/null +++ b/arch/arm/dts/kirkwood-km_kirkwood.dts @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "kirkwood.dtsi" +#include "kirkwood-98dx4122.dtsi" +#include "kirkwood-km_common.dtsi" + +/ { + model = "Keymile Kirkwood Reference Design"; + compatible = "keymile,km_kirkwood", "marvell,kirkwood-98DX4122", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x08000000>; + }; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; +}; + +ð0 { + status = "okay"; + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; diff --git a/arch/arm/dts/kirkwood-lschlv2.dts b/arch/arm/dts/kirkwood-lschlv2.dts new file mode 100644 index 00000000000..1d737d903f5 --- /dev/null +++ b/arch/arm/dts/kirkwood-lschlv2.dts @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "kirkwood-lsxl.dtsi" + +/ { + model = "Buffalo Linkstation LS-CHLv2"; + compatible = "buffalo,lschlv2", "buffalo,lsxl", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x4000000>; + }; + + ocp@f1000000 { + serial@12000 { + status = "okay"; + }; + }; +}; diff --git a/arch/arm/dts/kirkwood-lsxhl.dts b/arch/arm/dts/kirkwood-lsxhl.dts new file mode 100644 index 00000000000..a56e0d79777 --- /dev/null +++ b/arch/arm/dts/kirkwood-lsxhl.dts @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "kirkwood-lsxl.dtsi" + +/ { + model = "Buffalo Linkstation LS-XHL"; + compatible = "buffalo,lsxhl", "buffalo,lsxl", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x10000000>; + }; + + ocp@f1000000 { + serial@12000 { + status = "okay"; + }; + }; +}; diff --git a/arch/arm/dts/kirkwood-lsxl.dtsi b/arch/arm/dts/kirkwood-lsxl.dtsi new file mode 100644 index 00000000000..479a750d1d8 --- /dev/null +++ b/arch/arm/dts/kirkwood-lsxl.dtsi @@ -0,0 +1,241 @@ +// SPDX-License-Identifier: GPL-2.0 +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" + +/ { + chosen { + bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; + }; + + aliases { + spi0 = &spi0; + }; + + ocp@f1000000 { + pinctrl: pin-controller@10000 { + pmx_power_hdd: pmx-power-hdd { + marvell,pins = "mpp10"; + marvell,function = "gpo"; + }; + pmx_usb_vbus: pmx-usb-vbus { + marvell,pins = "mpp11"; + marvell,function = "gpio"; + }; + pmx_fan_high: pmx-fan-high { + marvell,pins = "mpp18"; + marvell,function = "gpo"; + }; + pmx_fan_low: pmx-fan-low { + marvell,pins = "mpp19"; + marvell,function = "gpo"; + }; + pmx_led_function_blue: pmx-led-function-blue { + marvell,pins = "mpp36"; + marvell,function = "gpio"; + }; + pmx_led_alarm: pmx-led-alarm { + marvell,pins = "mpp37"; + marvell,function = "gpio"; + }; + pmx_led_info: pmx-led-info { + marvell,pins = "mpp38"; + marvell,function = "gpio"; + }; + pmx_led_power: pmx-led-power { + marvell,pins = "mpp39"; + marvell,function = "gpio"; + }; + pmx_fan_lock: pmx-fan-lock { + marvell,pins = "mpp40"; + marvell,function = "gpio"; + }; + pmx_button_function: pmx-button-function { + marvell,pins = "mpp41"; + marvell,function = "gpio"; + }; + pmx_power_switch: pmx-power-switch { + marvell,pins = "mpp42"; + marvell,function = "gpio"; + }; + pmx_power_auto_switch: pmx-power-auto-switch { + marvell,pins = "mpp43"; + marvell,function = "gpio"; + }; + pmx_led_function_red: pmx-led-function_red { + marvell,pins = "mpp48"; + marvell,function = "gpio"; + }; + + }; + sata@80000 { + status = "okay"; + nr-ports = <1>; + }; + + spi@10600 { + status = "okay"; + + m25p40@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "m25p40", "jedec,spi-nor", "spi-flash"; + reg = <0>; + spi-max-frequency = <25000000>; + mode = <0>; + + partition@0 { + reg = <0x0 0x60000>; + label = "uboot"; + read-only; + }; + + partition@60000 { + reg = <0x60000 0x10000>; + label = "dtb"; + read-only; + }; + + partition@70000 { + reg = <0x70000 0x10000>; + label = "uboot_env"; + }; + }; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_button_function &pmx_power_switch + &pmx_power_auto_switch>; + pinctrl-names = "default"; + + option { + label = "Function Button"; + linux,code = <KEY_OPTION>; + gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; + }; + reserved { + label = "Power-on Switch"; + linux,code = <KEY_RESERVED>; + linux,input-type = <5>; + gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; + }; + power { + label = "Power-auto Switch"; + linux,code = <KEY_ESC>; + linux,input-type = <5>; + gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; + }; + }; + + gpio_leds { + compatible = "gpio-leds"; + pinctrl-0 = <&pmx_led_function_red &pmx_led_alarm + &pmx_led_info &pmx_led_power + &pmx_led_function_blue>; + pinctrl-names = "default"; + + func_blue { + label = "lsxl:blue:func"; + gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + }; + + alarm { + label = "lsxl:red:alarm"; + gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; + }; + + info { + label = "lsxl:amber:info"; + gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; + }; + + power { + label = "lsxl:blue:power"; + gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + + func_red { + label = "lsxl:red:func"; + gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; + }; + }; + + gpio_fan { + compatible = "gpio-fan"; + pinctrl-0 = <&pmx_fan_low &pmx_fan_high &pmx_fan_lock>; + pinctrl-names = "default"; + gpios = <&gpio0 19 GPIO_ACTIVE_LOW + &gpio0 18 GPIO_ACTIVE_LOW>; + gpio-fan,speed-map = <0 3 + 1500 2 + 3250 1 + 5000 0>; + alarm-gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; + }; + + restart_poweroff { + compatible = "restart-poweroff"; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_power_hdd &pmx_usb_vbus>; + pinctrl-names = "default"; + + usb_power: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "USB Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 11 0>; + }; + hdd_power: regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "HDD Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 10 0>; + }; + }; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; + + ethphy1: ethernet-phy@8 { + reg = <8>; + }; +}; + +ð0 { + status = "okay"; + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; + +ð1 { + status = "okay"; + ethernet1-port@0 { + phy-handle = <ðphy1>; + }; +}; diff --git a/arch/arm/dts/kirkwood-net2big.dts b/arch/arm/dts/kirkwood-net2big.dts new file mode 100644 index 00000000000..3e3ac289e5b --- /dev/null +++ b/arch/arm/dts/kirkwood-net2big.dts @@ -0,0 +1,63 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree file for LaCie 2Big Network v2 + * + * Copyright (C) 2014 + * + * Andrew Lunn <andrew@lunn.ch> + * + * Based on netxbig_v2-setup.c, + * Copyright (C) 2010 Simon Guinot <sguinot@lacie.com> + * +*/ + +/dts-v1/; + +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" +#include "kirkwood-netxbig.dtsi" + +/ { + model = "LaCie 2Big Network v2"; + compatible = "lacie,net2big_v2", "lacie,netxbig", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x10000000>; + }; + + fan { + compatible = "gpio-fan"; + alarm-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>; + }; +}; + +®ulators { + regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "hdd1power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 17 GPIO_ACTIVE_HIGH>; + }; + + clocks { + g762_clk: g762-oscillator { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; +}; + +&i2c0 { + g762@3e { + compatible = "gmt,g762"; + reg = <0x3e>; + clocks = <&g762_clk>; + }; +}; diff --git a/arch/arm/dts/kirkwood-netxbig.dtsi b/arch/arm/dts/kirkwood-netxbig.dtsi new file mode 100644 index 00000000000..135ac8021c8 --- /dev/null +++ b/arch/arm/dts/kirkwood-netxbig.dtsi @@ -0,0 +1,232 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree common file for LaCie 2Big and 5Big Network v2 + * + * Copyright (C) 2014 + * + * Andrew Lunn <andrew@lunn.ch> + * + * Based on netxbig_v2-setup.c, + * Copyright (C) 2010 Simon Guinot <sguinot@lacie.com> + * +*/ + +#include <dt-bindings/leds/leds-netxbig.h> +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" + +/ { + chosen { + bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; + }; + + ocp@f1000000 { + serial@12000 { + status = "okay"; + }; + + spi@10600 { + status = "okay"; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "mxicy,mx25l4005a", "jedec,spi-nor", "spi-flash"; + reg = <0>; + spi-max-frequency = <20000000>; + mode = <0>; + + partition@0 { + reg = <0x0 0x80000>; + label = "u-boot"; + }; + }; + }; + + sata@80000 { + status = "okay"; + nr-ports = <2>; + }; + + }; + + gpio-keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + + /* + * esc and power represent a three position rocker + * switch. Thus the conventional KEY_POWER does not fit + */ + exc { + label = "Back power switch (on|auto)"; + linux,code = <KEY_ESC>; + linux,input-type = <5>; + gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; + }; + power { + label = "Back power switch (auto|off)"; + linux,code = <KEY_1>; + linux,input-type = <5>; + gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; + }; + option { + label = "Function button"; + linux,code = <KEY_OPTION>; + gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; + }; + + }; + + gpio-poweroff { + compatible = "gpio-poweroff"; + gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; + }; + + regulators: regulators { + status = "okay"; + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + + regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "hdd0power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 16 GPIO_ACTIVE_HIGH>; + }; + }; + + netxbig_gpio_ext: netxbig-gpio-ext { + compatible = "lacie,netxbig-gpio-ext"; + + addr-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH + &gpio1 16 GPIO_ACTIVE_HIGH + &gpio1 17 GPIO_ACTIVE_HIGH>; + data-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH + &gpio1 13 GPIO_ACTIVE_HIGH + &gpio1 14 GPIO_ACTIVE_HIGH>; + enable-gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>; + }; + + netxbig-leds { + compatible = "lacie,netxbig-leds"; + + gpio-ext = <&netxbig_gpio_ext>; + + timers = <NETXBIG_LED_TIMER1 500 500 + NETXBIG_LED_TIMER2 500 1000>; + + blue-power { + label = "netxbig:blue:power"; + mode-addr = <0>; + mode-val = <NETXBIG_LED_OFF 0 + NETXBIG_LED_ON 1 + NETXBIG_LED_TIMER1 3 + NETXBIG_LED_TIMER2 7>; + bright-addr = <1>; + max-brightness = <7>; + }; + red-power { + label = "netxbig:red:power"; + mode-addr = <0>; + mode-val = <NETXBIG_LED_OFF 0 + NETXBIG_LED_ON 2 + NETXBIG_LED_TIMER1 4>; + bright-addr = <1>; + max-brightness = <7>; + }; + blue-sata0 { + label = "netxbig:blue:sata0"; + mode-addr = <3>; + mode-val = <NETXBIG_LED_OFF 0 + NETXBIG_LED_ON 7 + NETXBIG_LED_SATA 1 + NETXBIG_LED_TIMER1 3>; + bright-addr = <2>; + max-brightness = <7>; + }; + red-sata0 { + label = "netxbig:red:sata0"; + mode-addr = <3>; + mode-val = <NETXBIG_LED_OFF 0 + NETXBIG_LED_ON 2 + NETXBIG_LED_TIMER1 4>; + bright-addr = <2>; + max-brightness = <7>; + }; + blue-sata1 { + label = "netxbig:blue:sata1"; + mode-addr = <4>; + mode-val = <NETXBIG_LED_OFF 0 + NETXBIG_LED_ON 7 + NETXBIG_LED_SATA 1 + NETXBIG_LED_TIMER1 3>; + bright-addr = <2>; + max-brightness = <7>; + }; + red-sata1 { + label = "netxbig:red:sata1"; + mode-addr = <4>; + mode-val = <NETXBIG_LED_OFF 0 + NETXBIG_LED_ON 2 + NETXBIG_LED_TIMER1 4>; + bright-addr = <2>; + max-brightness = <7>; + }; + }; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@0 { + reg = <8>; + }; + + ethphy1: ethernet-phy@1 { + reg = <0>; + }; +}; + +ð0 { + status = "okay"; + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; + +&pinctrl { + pinctrl-names = "default"; + + pmx_button_function: pmx-button-function { + marvell,pins = "mpp34"; + marvell,function = "gpio"; + }; + pmx_button_power_off: pmx-button-power-off { + marvell,pins = "mpp15"; + marvell,function = "gpio"; + }; + pmx_button_power_on: pmx-button-power-on { + marvell,pins = "mpp13"; + marvell,function = "gpio"; + }; +}; + +&i2c0 { + status = "okay"; + + eeprom@50 { + compatible = "atmel,24c04"; + pagesize = <16>; + reg = <0x50>; + }; +}; diff --git a/arch/arm/dts/kirkwood-ns2-common.dtsi b/arch/arm/dts/kirkwood-ns2-common.dtsi new file mode 100644 index 00000000000..f997bb4df20 --- /dev/null +++ b/arch/arm/dts/kirkwood-ns2-common.dtsi @@ -0,0 +1,97 @@ +// SPDX-License-Identifier: GPL-2.0 +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" + +/ { + chosen { + bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; + }; + + ocp@f1000000 { + pinctrl: pin-controller@10000 { + pmx_ns2_sata0: pmx-ns2-sata0 { + marvell,pins = "mpp21"; + marvell,function = "sata0"; + }; + pmx_ns2_sata1: pmx-ns2-sata1 { + marvell,pins = "mpp20"; + marvell,function = "sata1"; + }; + }; + + serial@12000 { + status = "okay"; + }; + + spi@10600 { + status = "okay"; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "mxicy,mx25l4005a", "jedec,spi-nor", "spi-flash"; + reg = <0>; + spi-max-frequency = <20000000>; + mode = <0>; + + partition@0 { + reg = <0x0 0x80000>; + label = "u-boot"; + }; + }; + }; + + i2c@11000 { + status = "okay"; + + eeprom@50 { + compatible = "atmel,24c04"; + pagesize = <16>; + reg = <0x50>; + }; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + + power { + label = "Power push button"; + linux,code = <KEY_POWER>; + gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + red-fail { + label = "ns2:red:fail"; + gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; + }; + }; + + gpio_poweroff { + compatible = "gpio-poweroff"; + gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>; + }; + +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@X { + /* overwrite reg property in board file */ + }; +}; + +ð0 { + status = "okay"; + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; diff --git a/arch/arm/dts/kirkwood-ns2.dts b/arch/arm/dts/kirkwood-ns2.dts new file mode 100644 index 00000000000..7b67083e1ec --- /dev/null +++ b/arch/arm/dts/kirkwood-ns2.dts @@ -0,0 +1,40 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include <dt-bindings/leds/leds-ns2.h> +#include "kirkwood-ns2-common.dtsi" + +/ { + model = "LaCie Network Space v2"; + compatible = "lacie,netspace_v2", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x10000000>; + }; + + ocp@f1000000 { + sata@80000 { + pinctrl-0 = <&pmx_ns2_sata0>; + pinctrl-names = "default"; + status = "okay"; + nr-ports = <1>; + }; + }; + + ns2-leds { + compatible = "lacie,ns2-leds"; + + blue-sata { + label = "ns2:blue:sata"; + slow-gpio = <&gpio0 29 0>; + cmd-gpio = <&gpio0 30 0>; + modes-map = <NS_V2_LED_OFF 1 0 + NS_V2_LED_ON 0 1 + NS_V2_LED_ON 1 1 + NS_V2_LED_SATA 0 0>; + }; + }; +}; + +ðphy0 { reg = <8>; }; diff --git a/arch/arm/dts/kirkwood-ns2lite.dts b/arch/arm/dts/kirkwood-ns2lite.dts new file mode 100644 index 00000000000..b0cb5907ed6 --- /dev/null +++ b/arch/arm/dts/kirkwood-ns2lite.dts @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "kirkwood-ns2-common.dtsi" + +/ { + model = "LaCie Network Space Lite v2"; + compatible = "lacie,netspace_lite_v2", "marvell,kirkwood-88f6192", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x8000000>; + }; + + ocp@f1000000 { + sata@80000 { + pinctrl-0 = <&pmx_ns2_sata0>; + pinctrl-names = "default"; + status = "okay"; + nr-ports = <1>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + blue-sata { + label = "ns2:blue:sata"; + gpios = <&gpio0 30 GPIO_ACTIVE_LOW>; + linux,default-trigger = "disk-activity"; + }; + }; +}; + +ðphy0 { reg = <0>; }; diff --git a/arch/arm/dts/kirkwood-ns2max.dts b/arch/arm/dts/kirkwood-ns2max.dts new file mode 100644 index 00000000000..c0a087e7740 --- /dev/null +++ b/arch/arm/dts/kirkwood-ns2max.dts @@ -0,0 +1,59 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include <dt-bindings/leds/leds-ns2.h> +#include "kirkwood-ns2-common.dtsi" + +/ { + model = "LaCie Network Space Max v2"; + compatible = "lacie,netspace_max_v2", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x10000000>; + }; + + ocp@f1000000 { + sata@80000 { + pinctrl-0 = <&pmx_ns2_sata0 &pmx_ns2_sata1>; + pinctrl-names = "default"; + status = "okay"; + nr-ports = <2>; + }; + }; + + gpio_fan { + compatible = "gpio-fan"; + gpios = <&gpio0 22 GPIO_ACTIVE_LOW + &gpio0 7 GPIO_ACTIVE_LOW + &gpio1 1 GPIO_ACTIVE_LOW + &gpio0 23 GPIO_ACTIVE_LOW>; + gpio-fan,speed-map = + < 0 0 + 1500 15 + 1700 14 + 1800 13 + 2100 12 + 3100 11 + 3300 10 + 4300 9 + 5500 8>; + alarm-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>; + }; + + ns2-leds { + compatible = "lacie,ns2-leds"; + + blue-sata { + label = "ns2:blue:sata"; + slow-gpio = <&gpio0 29 0>; + cmd-gpio = <&gpio0 30 0>; + modes-map = <NS_V2_LED_OFF 1 0 + NS_V2_LED_ON 0 1 + NS_V2_LED_ON 1 1 + NS_V2_LED_SATA 0 0>; + }; + }; +}; + +ðphy0 { reg = <8>; }; diff --git a/arch/arm/dts/kirkwood-ns2mini.dts b/arch/arm/dts/kirkwood-ns2mini.dts new file mode 100644 index 00000000000..5b9fa14b642 --- /dev/null +++ b/arch/arm/dts/kirkwood-ns2mini.dts @@ -0,0 +1,60 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include <dt-bindings/leds/leds-ns2.h> +#include "kirkwood-ns2-common.dtsi" + +/ { + /* This machine is embedded in the first LaCie CloudBox product. */ + model = "LaCie Network Space Mini v2"; + compatible = "lacie,netspace_mini_v2", "marvell,kirkwood-88f6192", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x8000000>; + }; + + ocp@f1000000 { + sata@80000 { + pinctrl-0 = <&pmx_ns2_sata0>; + pinctrl-names = "default"; + status = "okay"; + nr-ports = <1>; + }; + }; + + gpio_fan { + compatible = "gpio-fan"; + gpios = <&gpio0 22 GPIO_ACTIVE_LOW + &gpio0 7 GPIO_ACTIVE_LOW + &gpio1 1 GPIO_ACTIVE_LOW + &gpio0 23 GPIO_ACTIVE_LOW>; + gpio-fan,speed-map = + < 0 0 + 3000 15 + 3180 14 + 4140 13 + 4570 12 + 6760 11 + 7140 10 + 7980 9 + 9200 8>; + alarm-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>; + }; + + ns2-leds { + compatible = "lacie,ns2-leds"; + + blue-sata { + label = "ns2:blue:sata"; + slow-gpio = <&gpio0 29 0>; + cmd-gpio = <&gpio0 30 0>; + modes-map = <NS_V2_LED_OFF 1 0 + NS_V2_LED_ON 0 1 + NS_V2_LED_ON 1 1 + NS_V2_LED_SATA 0 0>; + }; + }; +}; + +ðphy0 { reg = <0>; }; diff --git a/arch/arm/dts/kirkwood-openrd-base.dts b/arch/arm/dts/kirkwood-openrd-base.dts new file mode 100644 index 00000000000..094191ece3d --- /dev/null +++ b/arch/arm/dts/kirkwood-openrd-base.dts @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Marvell OpenRD Base Board Description + * + * Andrew Lunn <andrew@lunn.ch> + * + * This file contains the definitions that are specific to OpenRD + * base variant of the Marvell Kirkwood Development Board. + */ + +/dts-v1/; + +#include "kirkwood-openrd.dtsi" + +/ { + model = "OpenRD Base"; + compatible = "marvell,openrd-base", "marvell,openrd", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + ocp@f1000000 { + serial@12100 { + status = "okay"; + }; + }; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@8 { + reg = <8>; + }; +}; + +ð0 { + status = "okay"; + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; diff --git a/arch/arm/dts/kirkwood-openrd-client.dts b/arch/arm/dts/kirkwood-openrd-client.dts new file mode 100644 index 00000000000..74dc23daf64 --- /dev/null +++ b/arch/arm/dts/kirkwood-openrd-client.dts @@ -0,0 +1,73 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Marvell OpenRD Client Board Description + * + * Andrew Lunn <andrew@lunn.ch> + * + * This file contains the definitions that are specific to OpenRD + * client variant of the Marvell Kirkwood Development Board. + */ + +/dts-v1/; + +#include "kirkwood-openrd.dtsi" + +/ { + model = "OpenRD Client"; + compatible = "marvell,openrd-client", "marvell,openrd", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + ocp@f1000000 { + audio-controller@a0000 { + status = "okay"; + }; + i2c@11000 { + status = "okay"; + clock-frequency = <400000>; + + cs42l51: cs42l51@4a { + compatible = "cirrus,cs42l51"; + reg = <0x4a>; + #sound-dai-cells = <0>; + }; + }; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + simple-audio-card,mclk-fs = <256>; + + simple-audio-card,cpu { + sound-dai = <&audio0 0>; + }; + + simple-audio-card,codec { + sound-dai = <&cs42l51>; + }; + }; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@8 { + reg = <8>; + }; + ethphy1: ethernet-phy@24 { + reg = <24>; + }; +}; + +ð0 { + status = "okay"; + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; + +ð1 { + status = "okay"; + ethernet1-port@0 { + phy-handle = <ðphy1>; + }; +}; diff --git a/arch/arm/dts/kirkwood-openrd-ultimate.dts b/arch/arm/dts/kirkwood-openrd-ultimate.dts new file mode 100644 index 00000000000..888e13320c1 --- /dev/null +++ b/arch/arm/dts/kirkwood-openrd-ultimate.dts @@ -0,0 +1,55 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Marvell OpenRD Ultimate Board Description + * + * Andrew Lunn <andrew@lunn.ch> + * + * This file contains the definitions that are specific to OpenRD + * ultimate variant of the Marvell Kirkwood Development Board. + */ + +/dts-v1/; + +#include "kirkwood-openrd.dtsi" + +/ { + model = "OpenRD Ultimate"; + compatible = "marvell,openrd-ultimate", "marvell,openrd", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + ocp@f1000000 { + i2c@11000 { + status = "okay"; + clock-frequency = <400000>; + + cs42l51: cs42l51@4a { + compatible = "cirrus,cs42l51"; + reg = <0x4a>; + }; + }; + }; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; + ethphy1: ethernet-phy@1 { + reg = <1>; + }; +}; + +ð0 { + status = "okay"; + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; + +ð1 { + status = "okay"; + ethernet1-port@0 { + phy-handle = <ðphy1>; + }; +}; diff --git a/arch/arm/dts/kirkwood-openrd.dtsi b/arch/arm/dts/kirkwood-openrd.dtsi new file mode 100644 index 00000000000..47f03c69c55 --- /dev/null +++ b/arch/arm/dts/kirkwood-openrd.dtsi @@ -0,0 +1,122 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Marvell OpenRD (Base|Client|Ultimate) Board Description + * + * Andrew Lunn <andrew@lunn.ch> + * + * This file contains the definitions that are common between the three + * variants of the Marvell Kirkwood Development Board. + */ + +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" + +/ { + memory { + device_type = "memory"; + reg = <0x00000000 0x20000000>; + }; + + chosen { + bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; + }; + + ocp@f1000000 { + pinctrl: pin-controller@10000 { + pinctrl-0 = <&pmx_select28 &pmx_sdio_cd &pmx_select34>; + pinctrl-names = "default"; + + pmx_select28: pmx-select-rs232-rs485 { + marvell,pins = "mpp28"; + marvell,function = "gpio"; + }; + pmx_sdio_cd: pmx-sdio-cd { + marvell,pins = "mpp29"; + marvell,function = "gpio"; + }; + pmx_select34: pmx-select-uart-sd { + marvell,pins = "mpp34"; + marvell,function = "gpio"; + }; + }; + serial@12000 { + status = "okay"; + + }; + sata@80000 { + status = "okay"; + nr-ports = <2>; + }; + mvsdio@90000 { + status = "okay"; + cd-gpios = <&gpio0 29 9>; + }; + gpio@10100 { + p28 { + gpio-hog; + gpios = <28 GPIO_ACTIVE_HIGH>; + /* + * SelRS232or485 selects between RS-232 or RS-485 + * mode for the second UART. + * + * Low: RS-232 + * High: RS-485 + * + * To use the second UART, you need to change also + * the SelUARTorSD. + */ + output-low; + line-name = "SelRS232or485"; + }; + }; + gpio@10140 { + p2 { + gpio-hog; + gpios = <2 GPIO_ACTIVE_HIGH>; + /* + * SelUARTorSD selects between the second UART + * (serial@12100) and SD (mvsdio@90000). + * + * Low: UART + * High: SD + * + * When changing this line make sure the newly + * selected device node is enabled and the + * previously selected device node is disabled. + */ + output-high; /* Select SD by default */ + line-name = "SelUARTorSD"; + }; + }; + }; +}; + +&nand { + status = "okay"; + pinctrl-0 = <&pmx_nand>; + pinctrl-names = "default"; + + partition@0 { + label = "u-boot"; + reg = <0x0000000 0x100000>; + }; + + partition@100000 { + label = "uImage"; + reg = <0x0100000 0x400000>; + }; + + partition@600000 { + label = "root"; + reg = <0x0600000 0x1FA00000>; + }; +}; + +&pciec { + status = "okay"; +}; + +&pcie0 { + status = "okay"; +}; diff --git a/arch/arm/dts/kirkwood-pogo_e02.dts b/arch/arm/dts/kirkwood-pogo_e02.dts new file mode 100644 index 00000000000..f9e95e55f36 --- /dev/null +++ b/arch/arm/dts/kirkwood-pogo_e02.dts @@ -0,0 +1,132 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * kirkwood-pogo_e02.dts - Device tree file for Pogoplug E02 + * + * Copyright (C) 2015 Christoph Junghans <ottxor@gentoo.org> + * + * based on information of dts files from + * Arch Linux ARM by Oleg Rakhmanov <moonman.ca@gmail.com> + * OpenWrt by Felix Kaechele <heffer@fedoraproject.org> + * + */ + +/dts-v1/; + +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" + +/ { + model = "Cloud Engines Pogoplug E02"; + compatible = "cloudengines,pogoe02", "marvell,kirkwood-88f6281", + "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x10000000>; + }; + + chosen { + bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; + }; + + gpio-leds { + compatible = "gpio-leds"; + + health { + label = "pogo_e02:green:health"; + gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + fault { + label = "pogo_e02:orange:fault"; + gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; + }; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_usb_power_enable>; + pinctrl-names = "default"; + + usb_power: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "USB Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&pinctrl { + pinctrl-0 = < &pmx_usb_power_enable &pmx_led_orange + &pmx_led_green >; + pinctrl-names = "default"; + + pmx_usb_power_enable: pmx-usb-power-enable { + marvell,pins = "mpp29"; + marvell,function = "gpio"; + }; + + pmx_led_green: pmx-led-green { + marvell,pins = "mpp48"; + marvell,function = "gpio"; + }; + + pmx_led_orange: pmx-led-orange { + marvell,pins = "mpp49"; + marvell,function = "gpio"; + }; +}; + +&uart0 { + status = "okay"; +}; + +&nand { + chip-delay = <40>; + status = "okay"; + + partition@0 { + label = "u-boot"; + reg = <0x0000000 0x100000>; + read-only; + }; + + partition@100000 { + label = "uImage"; + reg = <0x0100000 0x400000>; + }; + + partition@500000 { + label = "pogoplug"; + reg = <0x0500000 0x2000000>; + }; + + partition@2500000 { + label = "root"; + reg = <0x02500000 0x5b00000>; + }; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; +}; + +ð0 { + status = "okay"; + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; diff --git a/arch/arm/dts/kirkwood-sheevaplug-common.dtsi b/arch/arm/dts/kirkwood-sheevaplug-common.dtsi new file mode 100644 index 00000000000..0a698d3b739 --- /dev/null +++ b/arch/arm/dts/kirkwood-sheevaplug-common.dtsi @@ -0,0 +1,104 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * kirkwood-sheevaplug-common.dtsi - Common parts for Sheevaplugs + * + * Copyright (C) 2013 Simon Baatz <gmbnomis@gmail.com> + */ + +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" + +/ { + memory { + device_type = "memory"; + reg = <0x00000000 0x20000000>; + }; + + chosen { + bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; + }; + + ocp@f1000000 { + pinctrl: pin-controller@10000 { + + pmx_usb_power_enable: pmx-usb-power-enable { + marvell,pins = "mpp29"; + marvell,function = "gpio"; + }; + pmx_led_red: pmx-led-red { + marvell,pins = "mpp46"; + marvell,function = "gpio"; + }; + pmx_led_blue: pmx-led-blue { + marvell,pins = "mpp49"; + marvell,function = "gpio"; + }; + pmx_sdio_cd: pmx-sdio-cd { + marvell,pins = "mpp44"; + marvell,function = "gpio"; + }; + pmx_sdio_wp: pmx-sdio-wp { + marvell,pins = "mpp47"; + marvell,function = "gpio"; + }; + }; + serial@12000 { + status = "okay"; + }; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_usb_power_enable>; + pinctrl-names = "default"; + + usb_power: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "USB Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 29 0>; + }; + }; +}; + +&nand { + status = "okay"; + + partition@0 { + label = "u-boot"; + reg = <0x0000000 0x100000>; + }; + + partition@100000 { + label = "uImage"; + reg = <0x0100000 0x400000>; + }; + + partition@500000 { + label = "root"; + reg = <0x0500000 0x1fb00000>; + }; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; +}; + +ð0 { + status = "okay"; + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; diff --git a/arch/arm/dts/kirkwood-sheevaplug.dts b/arch/arm/dts/kirkwood-sheevaplug.dts new file mode 100644 index 00000000000..c73cc904e5c --- /dev/null +++ b/arch/arm/dts/kirkwood-sheevaplug.dts @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * kirkwood-sheevaplug.dts - Device tree file for Sheevaplug + * + * Copyright (C) 2013 Simon Baatz <gmbnomis@gmail.com> + */ + +/dts-v1/; + +#include "kirkwood-sheevaplug-common.dtsi" + +/ { + model = "Globalscale Technologies SheevaPlug"; + compatible = "globalscale,sheevaplug", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + ocp@f1000000 { + mvsdio@90000 { + pinctrl-0 = <&pmx_sdio>; + pinctrl-names = "default"; + status = "okay"; + /* No CD or WP GPIOs */ + broken-cd; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + pinctrl-0 = <&pmx_led_blue &pmx_led_red>; + pinctrl-names = "default"; + + health { + label = "sheevaplug:blue:health"; + gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + + misc { + label = "sheevaplug:red:misc"; + gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; + }; + }; +}; diff --git a/arch/arm/dts/kirkwood-synology.dtsi b/arch/arm/dts/kirkwood-synology.dtsi new file mode 100644 index 00000000000..b80d8ee3709 --- /dev/null +++ b/arch/arm/dts/kirkwood-synology.dtsi @@ -0,0 +1,855 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Nodes for Marvell 628x Synology devices + * + * Andrew Lunn <andrew@lunn.ch> + * Ben Peddell <klightspeed@killerwolves.net> + * + */ + +/ { + ocp@f1000000 { + pinctrl: pin-controller@10000 { + pmx_alarmled_12: pmx-alarmled-12 { + marvell,pins = "mpp12"; + marvell,function = "gpio"; + }; + + pmx_fanctrl_15: pmx-fanctrl-15 { + marvell,pins = "mpp15"; + marvell,function = "gpio"; + }; + + pmx_fanctrl_16: pmx-fanctrl-16 { + marvell,pins = "mpp16"; + marvell,function = "gpio"; + }; + + pmx_fanctrl_17: pmx-fanctrl-17 { + marvell,pins = "mpp17"; + marvell,function = "gpio"; + }; + + pmx_fanalarm_18: pmx-fanalarm-18 { + marvell,pins = "mpp18"; + marvell,function = "gpo"; + }; + + pmx_hddled_20: pmx-hddled-20 { + marvell,pins = "mpp20"; + marvell,function = "gpio"; + }; + + pmx_hddled_21: pmx-hddled-21 { + marvell,pins = "mpp21"; + marvell,function = "gpio"; + }; + + pmx_hddled_22: pmx-hddled-22 { + marvell,pins = "mpp22"; + marvell,function = "gpio"; + }; + + pmx_hddled_23: pmx-hddled-23 { + marvell,pins = "mpp23"; + marvell,function = "gpio"; + }; + + pmx_hddled_24: pmx-hddled-24 { + marvell,pins = "mpp24"; + marvell,function = "gpio"; + }; + + pmx_hddled_25: pmx-hddled-25 { + marvell,pins = "mpp25"; + marvell,function = "gpio"; + }; + + pmx_hddled_26: pmx-hddled-26 { + marvell,pins = "mpp26"; + marvell,function = "gpio"; + }; + + pmx_hddled_27: pmx-hddled-27 { + marvell,pins = "mpp27"; + marvell,function = "gpio"; + }; + + pmx_hddled_28: pmx-hddled-28 { + marvell,pins = "mpp28"; + marvell,function = "gpio"; + }; + + pmx_hdd1_pwr_29: pmx-hdd1-pwr-29 { + marvell,pins = "mpp29"; + marvell,function = "gpio"; + }; + + pmx_hdd1_pwr_30: pmx-hdd-pwr-30 { + marvell,pins = "mpp30"; + marvell,function = "gpio"; + }; + + pmx_hdd2_pwr_31: pmx-hdd2-pwr-31 { + marvell,pins = "mpp31"; + marvell,function = "gpio"; + }; + + pmx_fanctrl_32: pmx-fanctrl-32 { + marvell,pins = "mpp32"; + marvell,function = "gpio"; + }; + + pmx_fanctrl_33: pmx-fanctrl-33 { + marvell,pins = "mpp33"; + marvell,function = "gpo"; + }; + + pmx_fanctrl_34: pmx-fanctrl-34 { + marvell,pins = "mpp34"; + marvell,function = "gpio"; + }; + + pmx_hdd2_pwr_34: pmx-hdd2-pwr-34 { + marvell,pins = "mpp34"; + marvell,function = "gpio"; + }; + + pmx_fanalarm_35: pmx-fanalarm-35 { + marvell,pins = "mpp35"; + marvell,function = "gpio"; + }; + + pmx_hddled_36: pmx-hddled-36 { + marvell,pins = "mpp36"; + marvell,function = "gpio"; + }; + + pmx_hddled_37: pmx-hddled-37 { + marvell,pins = "mpp37"; + marvell,function = "gpio"; + }; + + pmx_hddled_38: pmx-hddled-38 { + marvell,pins = "mpp38"; + marvell,function = "gpio"; + }; + + pmx_hddled_39: pmx-hddled-39 { + marvell,pins = "mpp39"; + marvell,function = "gpio"; + }; + + pmx_hddled_40: pmx-hddled-40 { + marvell,pins = "mpp40"; + marvell,function = "gpio"; + }; + + pmx_hddled_41: pmx-hddled-41 { + marvell,pins = "mpp41"; + marvell,function = "gpio"; + }; + + pmx_hddled_42: pmx-hddled-42 { + marvell,pins = "mpp42"; + marvell,function = "gpio"; + }; + + pmx_hddled_43: pmx-hddled-43 { + marvell,pins = "mpp43"; + marvell,function = "gpio"; + }; + + pmx_hddled_44: pmx-hddled-44 { + marvell,pins = "mpp44"; + marvell,function = "gpio"; + }; + + pmx_hddled_45: pmx-hddled-45 { + marvell,pins = "mpp45"; + marvell,function = "gpio"; + }; + + pmx_hdd3_pwr_44: pmx-hdd3-pwr-44 { + marvell,pins = "mpp44"; + marvell,function = "gpio"; + }; + + pmx_hdd4_pwr_45: pmx-hdd4-pwr-45 { + marvell,pins = "mpp45"; + marvell,function = "gpio"; + }; + + pmx_fanalarm_44: pmx-fanalarm-44 { + marvell,pins = "mpp44"; + marvell,function = "gpio"; + }; + + pmx_fanalarm_45: pmx-fanalarm-45 { + marvell,pins = "mpp45"; + marvell,function = "gpio"; + }; + }; + + rtc@10300 { + status = "disabled"; + }; + + spi@10600 { + status = "okay"; + + m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,m25p80", "jedec,spi-nor", "spi-flash"; + reg = <0>; + spi-max-frequency = <20000000>; + mode = <0>; + + partition@0 { + reg = <0x00000000 0x00080000>; + label = "RedBoot"; + }; + + partition@80000 { + reg = <0x00080000 0x00200000>; + label = "zImage"; + }; + + partition@280000 { + reg = <0x00280000 0x00140000>; + label = "rd.gz"; + }; + + partition@3c0000 { + reg = <0x003c0000 0x00010000>; + label = "vendor"; + }; + + partition@3d0000 { + reg = <0x003d0000 0x00020000>; + label = "RedBoot config"; + }; + + partition@3f0000 { + reg = <0x003f0000 0x00010000>; + label = "FIS directory"; + }; + }; + }; + + i2c@11000 { + status = "okay"; + clock-frequency = <400000>; + + rs5c372: rs5c372@32 { + status = "disabled"; + compatible = "ricoh,rs5c372"; + reg = <0x32>; + }; + + s35390a: s35390a@30 { + status = "disabled"; + compatible = "sii,s35390a"; + reg = <0x30>; + }; + }; + + serial@12000 { + status = "okay"; + }; + + serial@12100 { + status = "okay"; + }; + + poweroff@12100 { + compatible = "synology,power-off"; + reg = <0x12100 0x100>; + clocks = <&gate_clk 7>; + }; + + sata@80000 { + pinctrl-0 = <&pmx_sata0 &pmx_sata1>; + pinctrl-names = "default"; + status = "okay"; + nr-ports = <2>; + }; + }; + + gpio-fan-150-32-35 { + status = "disabled"; + compatible = "gpio-fan"; + pinctrl-0 = <&pmx_fanctrl_32 &pmx_fanctrl_33 &pmx_fanctrl_34 + &pmx_fanalarm_35>; + pinctrl-names = "default"; + gpios = <&gpio1 0 GPIO_ACTIVE_HIGH + &gpio1 1 GPIO_ACTIVE_HIGH + &gpio1 2 GPIO_ACTIVE_HIGH>; + gpio-fan,speed-map = < 0 0 + 2200 1 + 2500 2 + 3000 4 + 3300 3 + 3700 5 + 3800 6 + 4200 7 >; + }; + + gpio-fan-150-15-18 { + status = "disabled"; + compatible = "gpio-fan"; + pinctrl-0 = <&pmx_fanctrl_15 &pmx_fanctrl_16 &pmx_fanctrl_17 + &pmx_fanalarm_18>; + pinctrl-names = "default"; + gpios = <&gpio0 15 GPIO_ACTIVE_HIGH + &gpio0 16 GPIO_ACTIVE_HIGH + &gpio0 17 GPIO_ACTIVE_HIGH>; + alarm-gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>; + gpio-fan,speed-map = < 0 0 + 2200 1 + 2500 2 + 3000 4 + 3300 3 + 3700 5 + 3800 6 + 4200 7 >; + }; + + gpio-fan-100-32-35 { + status = "disabled"; + compatible = "gpio-fan"; + pinctrl-0 = <&pmx_fanctrl_32 &pmx_fanctrl_33 &pmx_fanctrl_34 + &pmx_fanalarm_35>; + pinctrl-names = "default"; + gpios = <&gpio1 0 GPIO_ACTIVE_HIGH + &gpio1 1 GPIO_ACTIVE_HIGH + &gpio1 2 GPIO_ACTIVE_HIGH>; + alarm-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; + gpio-fan,speed-map = < 0 0 + 2500 1 + 3100 2 + 3800 3 + 4600 4 + 4800 5 + 4900 6 + 5000 7 >; + }; + + gpio-fan-100-15-18 { + status = "disabled"; + compatible = "gpio-fan"; + pinctrl-0 = <&pmx_fanctrl_15 &pmx_fanctrl_16 &pmx_fanctrl_17 + &pmx_fanalarm_18>; + pinctrl-names = "default"; + gpios = <&gpio0 15 GPIO_ACTIVE_HIGH + &gpio0 16 GPIO_ACTIVE_HIGH + &gpio0 17 GPIO_ACTIVE_HIGH>; + alarm-gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>; + gpio-fan,speed-map = < 0 0 + 2500 1 + 3100 2 + 3800 3 + 4600 4 + 4800 5 + 4900 6 + 5000 7 >; + }; + + gpio-fan-100-15-35-1 { + status = "disabled"; + compatible = "gpio-fan"; + pinctrl-0 = <&pmx_fanctrl_15 &pmx_fanctrl_16 &pmx_fanctrl_17 + &pmx_fanalarm_35>; + pinctrl-names = "default"; + gpios = <&gpio0 15 GPIO_ACTIVE_HIGH + &gpio0 16 GPIO_ACTIVE_HIGH + &gpio0 17 GPIO_ACTIVE_HIGH>; + alarm-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; + gpio-fan,speed-map = < 0 0 + 2500 1 + 3100 2 + 3800 3 + 4600 4 + 4800 5 + 4900 6 + 5000 7 >; + }; + + gpio-fan-100-15-35-3 { + status = "disabled"; + compatible = "gpio-fan"; + pinctrl-0 = <&pmx_fanctrl_15 &pmx_fanctrl_16 &pmx_fanctrl_17 + &pmx_fanalarm_35 &pmx_fanalarm_44 &pmx_fanalarm_45>; + pinctrl-names = "default"; + gpios = <&gpio0 15 GPIO_ACTIVE_HIGH + &gpio0 16 GPIO_ACTIVE_HIGH + &gpio0 17 GPIO_ACTIVE_HIGH>; + alarm-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH + &gpio1 12 GPIO_ACTIVE_HIGH + &gpio1 13 GPIO_ACTIVE_HIGH>; + gpio-fan,speed-map = < 0 0 + 2500 1 + 3100 2 + 3800 3 + 4600 4 + 4800 5 + 4900 6 + 5000 7 >; + }; + + gpio-leds-alarm-12 { + status = "disabled"; + compatible = "gpio-leds"; + pinctrl-0 = <&pmx_alarmled_12>; + pinctrl-names = "default"; + + hdd1-green { + label = "synology:alarm"; + gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-leds-hdd-20 { + status = "disabled"; + compatible = "gpio-leds"; + pinctrl-0 = <&pmx_hddled_20 &pmx_hddled_21 &pmx_hddled_22 + &pmx_hddled_23 &pmx_hddled_24 &pmx_hddled_25 + &pmx_hddled_26 &pmx_hddled_27>; + pinctrl-names = "default"; + + hdd1-green { + label = "synology:green:hdd1"; + gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; + }; + + hdd1-amber { + label = "synology:amber:hdd1"; + gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; + }; + + hdd2-green { + label = "synology:green:hdd2"; + gpios = <&gpio0 22 GPIO_ACTIVE_LOW>; + }; + + hdd2-amber { + label = "synology:amber:hdd2"; + gpios = <&gpio0 23 GPIO_ACTIVE_LOW>; + }; + + hdd3-green { + label = "synology:green:hdd3"; + gpios = <&gpio0 24 GPIO_ACTIVE_LOW>; + }; + + hdd3-amber { + label = "synology:amber:hdd3"; + gpios = <&gpio0 25 GPIO_ACTIVE_LOW>; + }; + + hdd4-green { + label = "synology:green:hdd4"; + gpios = <&gpio0 26 GPIO_ACTIVE_LOW>; + }; + + hdd4-amber { + label = "synology:amber:hdd4"; + gpios = <&gpio0 27 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-leds-hdd-21-1 { + status = "disabled"; + compatible = "gpio-leds"; + pinctrl-0 = <&pmx_hddled_21 &pmx_hddled_23>; + pinctrl-names = "default"; + + hdd1-green { + label = "synology:green:hdd1"; + gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; + }; + + hdd1-amber { + label = "synology:amber:hdd1"; + gpios = <&gpio0 23 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-leds-hdd-21-2 { + status = "disabled"; + compatible = "gpio-leds"; + pinctrl-0 = <&pmx_hddled_21 &pmx_hddled_23 &pmx_hddled_20 &pmx_hddled_22>; + pinctrl-names = "default"; + + hdd1-green { + label = "synology:green:hdd1"; + gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; + }; + + hdd1-amber { + label = "synology:amber:hdd1"; + gpios = <&gpio0 23 GPIO_ACTIVE_LOW>; + }; + + hdd2-green { + label = "synology:green:hdd2"; + gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; + }; + + hdd2-amber { + label = "synology:amber:hdd2"; + gpios = <&gpio0 22 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-leds-hdd-36 { + status = "disabled"; + compatible = "gpio-leds"; + pinctrl-0 = <&pmx_hddled_36 &pmx_hddled_37 &pmx_hddled_38 + &pmx_hddled_39 &pmx_hddled_40 &pmx_hddled_41 + &pmx_hddled_42 &pmx_hddled_43 &pmx_hddled_44 + &pmx_hddled_45>; + pinctrl-names = "default"; + + hdd1-green { + label = "synology:green:hdd1"; + gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + }; + + hdd1-amber { + label = "synology:amber:hdd1"; + gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; + }; + + hdd2-green { + label = "synology:green:hdd2"; + gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; + }; + + hdd2-amber { + label = "synology:amber:hdd2"; + gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; + }; + + hdd3-green { + label = "synology:green:hdd3"; + gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; + }; + + hdd3-amber { + label = "synology:amber:hdd3"; + gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; + }; + + hdd4-green { + label = "synology:green:hdd4"; + gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; + }; + + hdd4-amber { + label = "synology:amber:hdd4"; + gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; + }; + + hdd5-green { + label = "synology:green:hdd5"; + gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; + }; + + hdd5-amber { + label = "synology:amber:hdd5"; + gpios = <&gpio1 13 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-leds-hdd-38 { + status = "disabled"; + compatible = "gpio-leds"; + pinctrl-0 = <&pmx_hddled_38 &pmx_hddled_39 &pmx_hddled_36 &pmx_hddled_37>; + pinctrl-names = "default"; + + hdd1-green { + label = "synology:green:hdd1"; + gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; + }; + + hdd1-amber { + label = "synology:amber:hdd1"; + gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; + }; + + hdd2-green { + label = "synology:green:hdd2"; + gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + }; + + hdd2-amber { + label = "synology:amber:hdd2"; + gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; + }; + }; + + regulators-hdd-29 { + status = "disabled"; + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_hdd1_pwr_29 &pmx_hdd2_pwr_31>; + pinctrl-names = "default"; + + regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "hdd1power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + startup-delay-us = <5000000>; + gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>; + }; + + regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "hdd2power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + startup-delay-us = <5000000>; + gpio = <&gpio0 31 GPIO_ACTIVE_HIGH>; + }; + }; + + regulators-hdd-30-1 { + status = "disabled"; + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_hdd1_pwr_30>; + pinctrl-names = "default"; + + regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "hdd1power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + startup-delay-us = <5000000>; + gpio = <&gpio0 30 GPIO_ACTIVE_HIGH>; + }; + }; + + regulators-hdd-30-2 { + status = "disabled"; + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_hdd1_pwr_30 &pmx_hdd2_pwr_34>; + pinctrl-names = "default"; + + regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "hdd1power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + startup-delay-us = <5000000>; + gpio = <&gpio0 30 GPIO_ACTIVE_HIGH>; + }; + + regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "hdd2power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + startup-delay-us = <5000000>; + gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>; + }; + }; + + regulators-hdd-30-4 { + status = "disabled"; + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_hdd1_pwr_30 &pmx_hdd2_pwr_34 + &pmx_hdd3_pwr_44 &pmx_hdd4_pwr_45>; + pinctrl-names = "default"; + + regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "hdd1power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + startup-delay-us = <5000000>; + gpio = <&gpio0 30 GPIO_ACTIVE_HIGH>; + }; + + regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "hdd2power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + startup-delay-us = <5000000>; + gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>; + }; + + regulator@3 { + compatible = "regulator-fixed"; + reg = <3>; + regulator-name = "hdd3power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + startup-delay-us = <5000000>; + gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>; + }; + + regulator@4 { + compatible = "regulator-fixed"; + reg = <4>; + regulator-name = "hdd4power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + startup-delay-us = <5000000>; + gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>; + }; + }; + + regulators-hdd-31 { + status = "disabled"; + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_hdd2_pwr_31>; + pinctrl-names = "default"; + + regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "hdd2power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + startup-delay-us = <5000000>; + gpio = <&gpio0 31 GPIO_ACTIVE_HIGH>; + }; + }; + + regulators-hdd-34 { + status = "disabled"; + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_hdd2_pwr_34 &pmx_hdd3_pwr_44 + &pmx_hdd4_pwr_45>; + pinctrl-names = "default"; + + regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "hdd2power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + startup-delay-us = <5000000>; + gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>; + }; + + regulator@3 { + compatible = "regulator-fixed"; + reg = <3>; + regulator-name = "hdd3power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + startup-delay-us = <5000000>; + gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>; + }; + + regulator@4 { + compatible = "regulator-fixed"; + reg = <4>; + regulator-name = "hdd4power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + startup-delay-us = <5000000>; + gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@0 { + device_type = "ethernet-phy"; + reg = <8>; + }; + + ethphy1: ethernet-phy@1 { + device_type = "ethernet-phy"; + reg = <9>; + }; +}; + +ð0 { + status = "okay"; + + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; + +ð1 { + status = "disabled"; + + ethernet1-port@0 { + phy-handle = <ðphy1>; + }; +}; + +&pciec { + status = "okay"; +}; + +&pcie0 { + status = "okay"; +}; diff --git a/arch/arm/dts/kirkwood.dtsi b/arch/arm/dts/kirkwood.dtsi new file mode 100644 index 00000000000..81c7eda2c44 --- /dev/null +++ b/arch/arm/dts/kirkwood.dtsi @@ -0,0 +1,393 @@ +// SPDX-License-Identifier: GPL-2.0 +/include/ "skeleton.dtsi" +#include <dt-bindings/input/input.h> +#include <dt-bindings/gpio/gpio.h> + +#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) + +/ { + compatible = "marvell,kirkwood"; + interrupt-parent = <&intc>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "marvell,feroceon"; + reg = <0>; + clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>; + clock-names = "cpu_clk", "ddrclk", "powersave"; + }; + }; + + aliases { + gpio0 = &gpio0; + gpio1 = &gpio1; + i2c0 = &i2c0; + }; + + mbus@f1000000 { + compatible = "marvell,kirkwood-mbus", "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + /* If a board file needs to change this ranges it must replace it completely */ + ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 /* internal-regs */ + MBUS_ID(0x01, 0x2f) 0 0xf4000000 0x10000 /* nand flash */ + MBUS_ID(0x03, 0x01) 0 0xf5000000 0x10000 /* crypto sram */ + >; + controller = <&mbusc>; + pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */ + pcie-io-aperture = <0xf2000000 0x100000>; /* 1 MiB I/O space */ + + nand: nand@12f { + #address-cells = <1>; + #size-cells = <1>; + cle = <0>; + ale = <1>; + bank-width = <1>; + compatible = "marvell,orion-nand"; + reg = <MBUS_ID(0x01, 0x2f) 0 0x400>; + chip-delay = <25>; + /* set partition map and/or chip-delay in board dts */ + clocks = <&gate_clk 7>; + pinctrl-0 = <&pmx_nand>; + pinctrl-names = "default"; + status = "disabled"; + }; + + crypto_sram: sa-sram@301 { + compatible = "mmio-sram"; + reg = <MBUS_ID(0x03, 0x01) 0x0 0x800>; + clocks = <&gate_clk 17>; + #address-cells = <1>; + #size-cells = <1>; + }; + }; + + ocp@f1000000 { + compatible = "simple-bus"; + ranges = <0x00000000 0xf1000000 0x0100000>; + #address-cells = <1>; + #size-cells = <1>; + + pinctrl: pin-controller@10000 { + /* set compatible property in SoC file */ + reg = <0x10000 0x20>; + + pmx_ge1: pmx-ge1 { + marvell,pins = "mpp20", "mpp21", "mpp22", "mpp23", + "mpp24", "mpp25", "mpp26", "mpp27", + "mpp30", "mpp31", "mpp32", "mpp33"; + marvell,function = "ge1"; + }; + + pmx_nand: pmx-nand { + marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", + "mpp4", "mpp5", "mpp18", "mpp19"; + marvell,function = "nand"; + }; + + /* + * Default SPI0 pinctrl setting with CSn on mpp0, + * overwrite marvell,pins on board level if required. + */ + pmx_spi: pmx-spi { + marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3"; + marvell,function = "spi"; + }; + + pmx_twsi0: pmx-twsi0 { + marvell,pins = "mpp8", "mpp9"; + marvell,function = "twsi0"; + }; + + /* + * Default UART pinctrl setting without RTS/CTS, + * overwrite marvell,pins on board level if required. + */ + pmx_uart0: pmx-uart0 { + marvell,pins = "mpp10", "mpp11"; + marvell,function = "uart0"; + }; + + pmx_uart1: pmx-uart1 { + marvell,pins = "mpp13", "mpp14"; + marvell,function = "uart1"; + }; + }; + + core_clk: core-clocks@10030 { + compatible = "marvell,kirkwood-core-clock"; + reg = <0x10030 0x4>; + #clock-cells = <1>; + }; + + spi0: spi@10600 { + compatible = "marvell,orion-spi"; + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + interrupts = <23>; + reg = <0x10600 0x28>; + clocks = <&gate_clk 7>; + pinctrl-0 = <&pmx_spi>; + pinctrl-names = "default"; + status = "disabled"; + }; + + gpio0: gpio@10100 { + compatible = "marvell,orion-gpio"; + #gpio-cells = <2>; + gpio-controller; + reg = <0x10100 0x40>; + ngpios = <32>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <35>, <36>, <37>, <38>; + clocks = <&gate_clk 7>; + }; + + gpio1: gpio@10140 { + compatible = "marvell,orion-gpio"; + #gpio-cells = <2>; + gpio-controller; + reg = <0x10140 0x40>; + ngpios = <18>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <39>, <40>, <41>; + clocks = <&gate_clk 7>; + }; + + i2c0: i2c@11000 { + compatible = "marvell,mv64xxx-i2c"; + reg = <0x11000 0x20>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <29>; + clock-frequency = <100000>; + clocks = <&gate_clk 7>; + pinctrl-0 = <&pmx_twsi0>; + pinctrl-names = "default"; + status = "disabled"; + }; + + uart0: serial@12000 { + compatible = "ns16550a"; + reg = <0x12000 0x100>; + reg-shift = <2>; + interrupts = <33>; + clocks = <&gate_clk 7>; + pinctrl-0 = <&pmx_uart0>; + pinctrl-names = "default"; + status = "disabled"; + }; + + uart1: serial@12100 { + compatible = "ns16550a"; + reg = <0x12100 0x100>; + reg-shift = <2>; + interrupts = <34>; + clocks = <&gate_clk 7>; + pinctrl-0 = <&pmx_uart1>; + pinctrl-names = "default"; + status = "disabled"; + }; + + mbusc: mbus-controller@20000 { + compatible = "marvell,mbus-controller"; + reg = <0x20000 0x80>, <0x1500 0x20>; + }; + + sysc: system-controller@20000 { + compatible = "marvell,orion-system-controller"; + reg = <0x20000 0x120>; + }; + + bridge_intc: bridge-interrupt-ctrl@20110 { + compatible = "marvell,orion-bridge-intc"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0x20110 0x8>; + interrupts = <1>; + marvell,#interrupts = <6>; + }; + + gate_clk: clock-gating-control@2011c { + compatible = "marvell,kirkwood-gating-clock"; + reg = <0x2011c 0x4>; + clocks = <&core_clk 0>; + #clock-cells = <1>; + }; + + l2: l2-cache@20128 { + compatible = "marvell,kirkwood-cache"; + reg = <0x20128 0x4>; + }; + + intc: main-interrupt-ctrl@20200 { + compatible = "marvell,orion-intc"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0x20200 0x10>, <0x20210 0x10>; + }; + + timer: timer@20300 { + compatible = "marvell,orion-timer"; + reg = <0x20300 0x20>; + interrupt-parent = <&bridge_intc>; + interrupts = <1>, <2>; + clocks = <&core_clk 0>; + }; + + wdt: watchdog-timer@20300 { + compatible = "marvell,orion-wdt"; + reg = <0x20300 0x28>, <0x20108 0x4>; + interrupt-parent = <&bridge_intc>; + interrupts = <3>; + clocks = <&gate_clk 7>; + status = "okay"; + }; + + cesa: crypto@30000 { + compatible = "marvell,kirkwood-crypto"; + reg = <0x30000 0x10000>; + reg-names = "regs"; + interrupts = <22>; + clocks = <&gate_clk 17>; + marvell,crypto-srams = <&crypto_sram>; + marvell,crypto-sram-size = <0x800>; + status = "okay"; + }; + + usb0: ehci@50000 { + compatible = "marvell,orion-ehci"; + reg = <0x50000 0x1000>; + interrupts = <19>; + clocks = <&gate_clk 3>; + status = "okay"; + }; + + dma0: xor@60800 { + compatible = "marvell,orion-xor"; + reg = <0x60800 0x100 + 0x60A00 0x100>; + status = "okay"; + clocks = <&gate_clk 8>; + + xor00 { + interrupts = <5>; + dmacap,memcpy; + dmacap,xor; + }; + xor01 { + interrupts = <6>; + dmacap,memcpy; + dmacap,xor; + dmacap,memset; + }; + }; + + dma1: xor@60900 { + compatible = "marvell,orion-xor"; + reg = <0x60900 0x100 + 0x60B00 0x100>; + status = "okay"; + clocks = <&gate_clk 16>; + + xor00 { + interrupts = <7>; + dmacap,memcpy; + dmacap,xor; + }; + xor01 { + interrupts = <8>; + dmacap,memcpy; + dmacap,xor; + dmacap,memset; + }; + }; + + eth0: ethernet-controller@72000 { + compatible = "marvell,kirkwood-eth"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x72000 0x4000>; + clocks = <&gate_clk 0>; + marvell,tx-checksum-limit = <1600>; + status = "disabled"; + + eth0port: ethernet0-port@0 { + compatible = "marvell,kirkwood-eth-port"; + reg = <0>; + interrupts = <11>; + /* overwrite MAC address in bootloader */ + local-mac-address = [00 00 00 00 00 00]; + /* set phy-handle property in board file */ + }; + }; + + mdio: mdio-bus@72004 { + compatible = "marvell,orion-mdio"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x72004 0x84>; + interrupts = <46>; + clocks = <&gate_clk 0>; + status = "disabled"; + + /* add phy nodes in board file */ + }; + + eth1: ethernet-controller@76000 { + compatible = "marvell,kirkwood-eth"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x76000 0x4000>; + clocks = <&gate_clk 19>; + marvell,tx-checksum-limit = <1600>; + pinctrl-0 = <&pmx_ge1>; + pinctrl-names = "default"; + status = "disabled"; + + eth1port: ethernet1-port@0 { + compatible = "marvell,kirkwood-eth-port"; + reg = <0>; + interrupts = <15>; + /* overwrite MAC address in bootloader */ + local-mac-address = [00 00 00 00 00 00]; + /* set phy-handle property in board file */ + }; + }; + + sata_phy0: sata-phy@82000 { + compatible = "marvell,mvebu-sata-phy"; + reg = <0x82000 0x0334>; + clocks = <&gate_clk 14>; + clock-names = "sata"; + #phy-cells = <0>; + status = "ok"; + }; + + sata_phy1: sata-phy@84000 { + compatible = "marvell,mvebu-sata-phy"; + reg = <0x84000 0x0334>; + clocks = <&gate_clk 15>; + clock-names = "sata"; + #phy-cells = <0>; + status = "ok"; + }; + + audio0: audio-controller@a0000 { + compatible = "marvell,kirkwood-audio"; + #sound-dai-cells = <0>; + reg = <0xa0000 0x2210>; + interrupts = <24>; + clocks = <&gate_clk 9>; + clock-names = "internal"; + status = "disabled"; + }; + }; +}; diff --git a/arch/arm/dts/r8a7792-blanche-u-boot.dts b/arch/arm/dts/r8a7792-blanche-u-boot.dts index 8eb263eb5d2..3555663d647 100644 --- a/arch/arm/dts/r8a7792-blanche-u-boot.dts +++ b/arch/arm/dts/r8a7792-blanche-u-boot.dts @@ -7,3 +7,7 @@ #include "r8a7792-blanche.dts" #include "r8a7792-u-boot.dtsi" + +&scif0 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/r8a77990-ebisu-u-boot.dts b/arch/arm/dts/r8a77990-ebisu-u-boot.dts new file mode 100644 index 00000000000..8d4ea88a91f --- /dev/null +++ b/arch/arm/dts/r8a77990-ebisu-u-boot.dts @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source extras for U-Boot for the Ebisu board + * + * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> + */ + +#include "r8a77990-ebisu.dts" +#include "r8a77990-u-boot.dtsi" diff --git a/arch/arm/dts/r8a77990-ebisu.dts b/arch/arm/dts/r8a77990-ebisu.dts new file mode 100644 index 00000000000..7a09d0524f9 --- /dev/null +++ b/arch/arm/dts/r8a77990-ebisu.dts @@ -0,0 +1,65 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Device Tree Source for the ebisu board + * + * Copyright (C) 2018 Renesas Electronics Corp. + */ + +/dts-v1/; +#include "r8a77990.dtsi" +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "Renesas Ebisu board based on r8a77990"; + compatible = "renesas,ebisu", "renesas,r8a77990"; + + aliases { + serial0 = &scif2; + ethernet0 = &avb; + }; + + chosen { + bootargs = "ignore_loglevel"; + stdout-path = "serial0:115200n8"; + }; + + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x0 0x38000000>; + }; +}; + +&avb { + pinctrl-0 = <&avb_pins>; + pinctrl-names = "default"; + renesas,no-ether-link; + phy-handle = <&phy0>; + phy-mode = "rgmii-txid"; + status = "okay"; + + phy0: ethernet-phy@0 { + rxc-skew-ps = <1500>; + reg = <0>; + interrupt-parent = <&gpio2>; + interrupts = <21 IRQ_TYPE_LEVEL_LOW>; + reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>; + }; +}; + +&extal_clk { + clock-frequency = <48000000>; +}; + +&pfc { + avb_pins: avb { + mux { + groups = "avb_link", "avb_mii"; + function = "avb"; + }; + }; +}; + +&scif2 { + status = "okay"; +}; diff --git a/arch/arm/dts/r8a77990-u-boot.dtsi b/arch/arm/dts/r8a77990-u-boot.dtsi new file mode 100644 index 00000000000..564c258e924 --- /dev/null +++ b/arch/arm/dts/r8a77990-u-boot.dtsi @@ -0,0 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source extras for U-Boot on RCar R8A77990 SoC + * + * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> + */ + +#include "r8a779x-u-boot.dtsi" diff --git a/arch/arm/dts/r8a77990.dtsi b/arch/arm/dts/r8a77990.dtsi new file mode 100644 index 00000000000..be4f519711a --- /dev/null +++ b/arch/arm/dts/r8a77990.dtsi @@ -0,0 +1,281 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Device Tree Source for the r8a77990 SoC + * + * Copyright (C) 2018 Renesas Electronics Corp. + */ + +#include <dt-bindings/clock/renesas-cpg-mssr.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + compatible = "renesas,r8a77990"; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + /* 1 core only at this point */ + a53_0: cpu@0 { + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0>; + device_type = "cpu"; + power-domains = <&sysc 5>; + next-level-cache = <&L2_CA53>; + enable-method = "psci"; + }; + + L2_CA53: cache-controller-0 { + compatible = "cache"; + power-domains = <&sysc 21>; + cache-unified; + cache-level = <2>; + }; + }; + + extal_clk: extal { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board */ + clock-frequency = <0>; + }; + + pmu_a53 { + compatible = "arm,cortex-a53-pmu"; + interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&a53_0>; + }; + + psci { + compatible = "arm,psci-1.0", "arm,psci-0.2"; + method = "smc"; + }; + + soc: soc { + compatible = "simple-bus"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gpio0: gpio@e6050000 { + compatible = "renesas,gpio-r8a77990", + "renesas,rcar-gen3-gpio"; + reg = <0 0xe6050000 0 0x50>; + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 0 18>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&cpg CPG_MOD 912>; + power-domains = <&sysc 32>; + resets = <&cpg 912>; + }; + + gpio1: gpio@e6051000 { + compatible = "renesas,gpio-r8a77990", + "renesas,rcar-gen3-gpio"; + reg = <0 0xe6051000 0 0x50>; + interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 32 23>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&cpg CPG_MOD 911>; + power-domains = <&sysc 32>; + resets = <&cpg 911>; + }; + + gpio2: gpio@e6052000 { + compatible = "renesas,gpio-r8a77990", + "renesas,rcar-gen3-gpio"; + reg = <0 0xe6052000 0 0x50>; + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 64 26>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&cpg CPG_MOD 910>; + power-domains = <&sysc 32>; + resets = <&cpg 910>; + }; + + gpio3: gpio@e6053000 { + compatible = "renesas,gpio-r8a77990", + "renesas,rcar-gen3-gpio"; + reg = <0 0xe6053000 0 0x50>; + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 96 16>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&cpg CPG_MOD 909>; + power-domains = <&sysc 32>; + resets = <&cpg 909>; + }; + + gpio4: gpio@e6054000 { + compatible = "renesas,gpio-r8a77990", + "renesas,rcar-gen3-gpio"; + reg = <0 0xe6054000 0 0x50>; + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 128 11>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&cpg CPG_MOD 908>; + power-domains = <&sysc 32>; + resets = <&cpg 908>; + }; + + gpio5: gpio@e6055000 { + compatible = "renesas,gpio-r8a77990", + "renesas,rcar-gen3-gpio"; + reg = <0 0xe6055000 0 0x50>; + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 160 20>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&cpg CPG_MOD 907>; + power-domains = <&sysc 32>; + resets = <&cpg 907>; + }; + + gpio6: gpio@e6055400 { + compatible = "renesas,gpio-r8a77990", + "renesas,rcar-gen3-gpio"; + reg = <0 0xe6055400 0 0x50>; + interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 192 18>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&cpg CPG_MOD 906>; + power-domains = <&sysc 32>; + resets = <&cpg 906>; + }; + + pfc: pin-controller@e6060000 { + compatible = "renesas,pfc-r8a77990"; + reg = <0 0xe6060000 0 0x508>; + }; + + cpg: clock-controller@e6150000 { + compatible = "renesas,r8a77990-cpg-mssr"; + reg = <0 0xe6150000 0 0x1000>; + clocks = <&extal_clk>; + clock-names = "extal"; + #clock-cells = <2>; + #power-domain-cells = <0>; + #reset-cells = <1>; + }; + + rst: reset-controller@e6160000 { + compatible = "renesas,r8a77990-rst"; + reg = <0 0xe6160000 0 0x0200>; + }; + + sysc: system-controller@e6180000 { + compatible = "renesas,r8a77990-sysc"; + reg = <0 0xe6180000 0 0x0400>; + #power-domain-cells = <1>; + }; + + avb: ethernet@e6800000 { + compatible = "renesas,etheravb-r8a77990", + "renesas,etheravb-rcar-gen3"; + reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15", + "ch16", "ch17", "ch18", "ch19", + "ch20", "ch21", "ch22", "ch23", + "ch24"; + clocks = <&cpg CPG_MOD 812>; + power-domains = <&sysc 32>; + resets = <&cpg 812>; + phy-mode = "rgmii"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + scif2: serial@e6e88000 { + compatible = "renesas,scif-r8a77990", + "renesas,rcar-gen3-scif", "renesas,scif"; + reg = <0 0xe6e88000 0 64>; + interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 310>; + clock-names = "fck"; + power-domains = <&sysc 32>; + resets = <&cpg 310>; + status = "disabled"; + }; + + gic: interrupt-controller@f1010000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x0 0xf1010000 0 0x1000>, + <0x0 0xf1020000 0 0x20000>, + <0x0 0xf1040000 0 0x20000>, + <0x0 0xf1060000 0 0x20000>; + interrupts = <GIC_PPI 9 + (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>; + clocks = <&cpg CPG_MOD 408>; + clock-names = "clk"; + power-domains = <&sysc 32>; + resets = <&cpg 408>; + }; + + prr: chipid@fff00044 { + compatible = "renesas,prr"; + reg = <0 0xfff00044 0 4>; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, + <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, + <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, + <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; + }; +}; diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi index e64127fcb28..314449478d0 100644 --- a/arch/arm/dts/socfpga.dtsi +++ b/arch/arm/dts/socfpga.dtsi @@ -737,6 +737,7 @@ reg-shift = <2>; reg-io-width = <4>; clocks = <&l4_sp_clk>; + clock-frequency = <100000000>; }; uart1: serial1@ffc03000 { @@ -746,6 +747,7 @@ reg-shift = <2>; reg-io-width = <4>; clocks = <&l4_sp_clk>; + clock-frequency = <100000000>; }; rst: rstmgr@ffd05000 { diff --git a/arch/arm/dts/socfpga_arria10.dtsi b/arch/arm/dts/socfpga_arria10.dtsi index abfd0bc4f8f..b51febda9cc 100644 --- a/arch/arm/dts/socfpga_arria10.dtsi +++ b/arch/arm/dts/socfpga_arria10.dtsi @@ -1,5 +1,5 @@ /* - * Copyright Altera Corporation (C) 2014-2017. All rights reserved. + * Copyright Altera Corporation (C) 2014. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms and conditions of the GNU General Public License, @@ -14,7 +14,6 @@ * this program. If not, see <http://www.gnu.org/licenses/>. */ -#include "skeleton.dtsi" #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/reset/altr,rst-mgr-a10.h> @@ -22,29 +21,10 @@ #address-cells = <1>; #size-cells = <1>; - aliases { - ethernet0 = &gmac0; - ethernet1 = &gmac1; - ethernet2 = &gmac2; - serial0 = &uart0; - serial1 = &uart1; - timer0 = &timer0; - timer1 = &timer1; - timer2 = &timer2; - timer3 = &timer3; - spi0 = &spi0; - spi1 = &spi1; - }; - - memory { - name = "memory"; - device_type = "memory"; - reg = <0x0 0x40000000>; /* 1GB */ - }; - cpus { #address-cells = <1>; #size-cells = <0>; + enable-method = "altr,socfpga-a10-smp"; cpu@0 { compatible = "arm,cortex-a9"; @@ -102,321 +82,335 @@ }; }; - clkmgr@ffd04000 { - compatible = "altr,clk-mgr"; - reg = <0xffd04000 0x1000>; - reg-names = "soc_clock_manager_OCP_SLV"; - - clocks { - #address-cells = <1>; - #size-cells = <0>; - - cb_intosc_hs_div2_clk: cb_intosc_hs_div2_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - }; - - cb_intosc_ls_clk: cb_intosc_ls_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - }; + base_fpga_region { + #address-cells = <0x1>; + #size-cells = <0x1>; - f2s_free_clk: f2s_free_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - }; + compatible = "fpga-region"; + fpga-mgr = <&fpga_mgr>; + }; - osc1: osc1 { - #clock-cells = <0>; - compatible = "fixed-clock"; - }; + clkmgr@ffd04000 { + compatible = "altr,clk-mgr"; + reg = <0xffd04000 0x1000>; - main_pll: main_pll { + clocks { #address-cells = <1>; #size-cells = <0>; - #clock-cells = <0>; - compatible = "altr,socfpga-a10-pll-clock"; - clocks = <&osc1>, <&cb_intosc_ls_clk>, - <&f2s_free_clk>; - reg = <0x40>; - main_mpu_base_clk: main_mpu_base_clk { + cb_intosc_hs_div2_clk: cb_intosc_hs_div2_clk { #clock-cells = <0>; - compatible = "altr,socfpga-a10-perip-clk"; - clocks = <&main_pll>; - div-reg = <0x140 0 11>; + compatible = "fixed-clock"; }; - main_noc_base_clk: main_noc_base_clk { + cb_intosc_ls_clk: cb_intosc_ls_clk { #clock-cells = <0>; - compatible = "altr,socfpga-a10-perip-clk"; - clocks = <&main_pll>; - div-reg = <0x144 0 11>; + compatible = "fixed-clock"; }; - main_emaca_clk: main_emaca_clk { + f2s_free_clk: f2s_free_clk { #clock-cells = <0>; - compatible = "altr,socfpga-a10-perip-clk"; - clocks = <&main_pll>; - reg = <0x68>; + compatible = "fixed-clock"; }; - main_emacb_clk: main_emacb_clk { + osc1: osc1 { #clock-cells = <0>; - compatible = "altr,socfpga-a10-perip-clk"; - clocks = <&main_pll>; - reg = <0x6C>; + compatible = "fixed-clock"; }; - main_emac_ptp_clk: main_emac_ptp_clk { + main_pll: main_pll@40 { + #address-cells = <1>; + #size-cells = <0>; #clock-cells = <0>; - compatible = "altr,socfpga-a10-perip-clk"; - clocks = <&main_pll>; - reg = <0x70>; + compatible = "altr,socfpga-a10-pll-clock"; + clocks = <&osc1>, <&cb_intosc_ls_clk>, + <&f2s_free_clk>; + reg = <0x40>; + + main_mpu_base_clk: main_mpu_base_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-a10-perip-clk"; + clocks = <&main_pll>; + div-reg = <0x140 0 11>; + }; + + main_noc_base_clk: main_noc_base_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-a10-perip-clk"; + clocks = <&main_pll>; + div-reg = <0x144 0 11>; + }; + + main_emaca_clk: main_emaca_clk@68 { + #clock-cells = <0>; + compatible = "altr,socfpga-a10-perip-clk"; + clocks = <&main_pll>; + reg = <0x68>; + }; + + main_emacb_clk: main_emacb_clk@6c { + #clock-cells = <0>; + compatible = "altr,socfpga-a10-perip-clk"; + clocks = <&main_pll>; + reg = <0x6C>; + }; + + main_emac_ptp_clk: main_emac_ptp_clk@70 { + #clock-cells = <0>; + compatible = "altr,socfpga-a10-perip-clk"; + clocks = <&main_pll>; + reg = <0x70>; + }; + + main_gpio_db_clk: main_gpio_db_clk@74 { + #clock-cells = <0>; + compatible = "altr,socfpga-a10-perip-clk"; + clocks = <&main_pll>; + reg = <0x74>; + }; + + main_sdmmc_clk: main_sdmmc_clk@78 { + #clock-cells = <0>; + compatible = "altr,socfpga-a10-perip-clk" +; + clocks = <&main_pll>; + reg = <0x78>; + }; + + main_s2f_usr0_clk: main_s2f_usr0_clk@7c { + #clock-cells = <0>; + compatible = "altr,socfpga-a10-perip-clk"; + clocks = <&main_pll>; + reg = <0x7C>; + }; + + main_s2f_usr1_clk: main_s2f_usr1_clk@80 { + #clock-cells = <0>; + compatible = "altr,socfpga-a10-perip-clk"; + clocks = <&main_pll>; + reg = <0x80>; + }; + + main_hmc_pll_ref_clk: main_hmc_pll_ref_clk@84 { + #clock-cells = <0>; + compatible = "altr,socfpga-a10-perip-clk"; + clocks = <&main_pll>; + reg = <0x84>; + }; + + main_periph_ref_clk: main_periph_ref_clk@9c { + #clock-cells = <0>; + compatible = "altr,socfpga-a10-perip-clk"; + clocks = <&main_pll>; + reg = <0x9C>; + }; }; - main_gpio_db_clk: main_gpio_db_clk { + periph_pll: periph_pll@c0 { + #address-cells = <1>; + #size-cells = <0>; #clock-cells = <0>; - compatible = "altr,socfpga-a10-perip-clk"; - clocks = <&main_pll>; - reg = <0x74>; + compatible = "altr,socfpga-a10-pll-clock"; + clocks = <&osc1>, <&cb_intosc_ls_clk>, + <&f2s_free_clk>, <&main_periph_ref_clk>; + reg = <0xC0>; + + peri_mpu_base_clk: peri_mpu_base_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-a10-perip-clk"; + clocks = <&periph_pll>; + div-reg = <0x140 16 11>; + }; + + peri_noc_base_clk: peri_noc_base_clk { + #clock-cells = <0>; + compatible = "altr,socfpga-a10-perip-clk"; + clocks = <&periph_pll>; + div-reg = <0x144 16 11>; + }; + + peri_emaca_clk: peri_emaca_clk@e8 { + #clock-cells = <0>; + compatible = "altr,socfpga-a10-perip-clk"; + clocks = <&periph_pll>; + reg = <0xE8>; + }; + + peri_emacb_clk: peri_emacb_clk@ec { + #clock-cells = <0>; + compatible = "altr,socfpga-a10-perip-clk"; + clocks = <&periph_pll>; + reg = <0xEC>; + }; + + peri_emac_ptp_clk: peri_emac_ptp_clk@f0 { + #clock-cells = <0>; + compatible = "altr,socfpga-a10-perip-clk"; + clocks = <&periph_pll>; + reg = <0xF0>; + }; + + peri_gpio_db_clk: peri_gpio_db_clk@f4 { + #clock-cells = <0>; + compatible = "altr,socfpga-a10-perip-clk"; + clocks = <&periph_pll>; + reg = <0xF4>; + }; + + peri_sdmmc_clk: peri_sdmmc_clk@f8 { + #clock-cells = <0>; + compatible = "altr,socfpga-a10-perip-clk"; + clocks = <&periph_pll>; + reg = <0xF8>; + }; + + peri_s2f_usr0_clk: peri_s2f_usr0_clk@fc { + #clock-cells = <0>; + compatible = "altr,socfpga-a10-perip-clk"; + clocks = <&periph_pll>; + reg = <0xFC>; + }; + + peri_s2f_usr1_clk: peri_s2f_usr1_clk@100 { + #clock-cells = <0>; + compatible = "altr,socfpga-a10-perip-clk"; + clocks = <&periph_pll>; + reg = <0x100>; + }; + + peri_hmc_pll_ref_clk: peri_hmc_pll_ref_clk@104 { + #clock-cells = <0>; + compatible = "altr,socfpga-a10-perip-clk"; + clocks = <&periph_pll>; + reg = <0x104>; + }; }; - main_sdmmc_clk: main_sdmmc_clk { + mpu_free_clk: mpu_free_clk@60 { #clock-cells = <0>; compatible = "altr,socfpga-a10-perip-clk"; - clocks = <&main_pll>; - reg = <0x78>; + clocks = <&main_mpu_base_clk>, <&peri_mpu_base_clk>, + <&osc1>, <&cb_intosc_hs_div2_clk>, + <&f2s_free_clk>; + reg = <0x60>; }; - main_s2f_usr0_clk: main_s2f_usr0_clk { + noc_free_clk: noc_free_clk@64 { #clock-cells = <0>; compatible = "altr,socfpga-a10-perip-clk"; - clocks = <&main_pll>; - reg = <0x7C>; + clocks = <&main_noc_base_clk>, <&peri_noc_base_clk>, + <&osc1>, <&cb_intosc_hs_div2_clk>, + <&f2s_free_clk>; + reg = <0x64>; }; - main_s2f_usr1_clk: main_s2f_usr1_clk { + s2f_user1_free_clk: s2f_user1_free_clk@104 { #clock-cells = <0>; compatible = "altr,socfpga-a10-perip-clk"; - clocks = <&main_pll>; - reg = <0x80>; + clocks = <&main_s2f_usr1_clk>, <&peri_s2f_usr1_clk>, + <&osc1>, <&cb_intosc_hs_div2_clk>, + <&f2s_free_clk>; + reg = <0x104>; }; - main_hmc_pll_ref_clk: main_hmc_pll_ref_clk { + sdmmc_free_clk: sdmmc_free_clk@f8 { #clock-cells = <0>; compatible = "altr,socfpga-a10-perip-clk"; - clocks = <&main_pll>; - reg = <0x84>; + clocks = <&main_sdmmc_clk>, <&peri_sdmmc_clk>, + <&osc1>, <&cb_intosc_hs_div2_clk>, + <&f2s_free_clk>; + fixed-divider = <4>; + reg = <0xF8>; }; - main_periph_ref_clk: main_periph_ref_clk { + l4_sys_free_clk: l4_sys_free_clk { #clock-cells = <0>; compatible = "altr,socfpga-a10-perip-clk"; - clocks = <&main_pll>; - reg = <0x9C>; + clocks = <&noc_free_clk>; + fixed-divider = <4>; }; - }; - - periph_pll: periph_pll { - #address-cells = <1>; - #size-cells = <0>; - #clock-cells = <0>; - compatible = "altr,socfpga-a10-pll-clock"; - clocks = <&osc1>, <&cb_intosc_ls_clk>, - <&f2s_free_clk>, <&main_periph_ref_clk>; - reg = <0xC0>; - peri_mpu_base_clk: peri_mpu_base_clk { + l4_main_clk: l4_main_clk { #clock-cells = <0>; - compatible = "altr,socfpga-a10-perip-clk"; - clocks = <&periph_pll>; - div-reg = <0x140 16 11>; + compatible = "altr,socfpga-a10-gate-clk"; + clocks = <&noc_free_clk>; + div-reg = <0xA8 0 2>; + clk-gate = <0x48 1>; }; - peri_noc_base_clk: peri_noc_base_clk { + l4_mp_clk: l4_mp_clk { #clock-cells = <0>; - compatible = "altr,socfpga-a10-perip-clk"; - clocks = <&periph_pll>; - div-reg = <0x144 16 11>; + compatible = "altr,socfpga-a10-gate-clk"; + clocks = <&noc_free_clk>; + div-reg = <0xA8 8 2>; + clk-gate = <0x48 2>; }; - peri_emaca_clk: peri_emaca_clk { + l4_sp_clk: l4_sp_clk { #clock-cells = <0>; - compatible = "altr,socfpga-a10-perip-clk"; - clocks = <&periph_pll>; - reg = <0xE8>; + compatible = "altr,socfpga-a10-gate-clk"; + clocks = <&noc_free_clk>; + div-reg = <0xA8 16 2>; + clk-gate = <0x48 3>; }; - peri_emacb_clk: peri_emacb_clk { + mpu_periph_clk: mpu_periph_clk { #clock-cells = <0>; - compatible = "altr,socfpga-a10-perip-clk"; - clocks = <&periph_pll>; - reg = <0xEC>; + compatible = "altr,socfpga-a10-gate-clk"; + clocks = <&mpu_free_clk>; + fixed-divider = <4>; + clk-gate = <0x48 0>; }; - peri_emac_ptp_clk: peri_emac_ptp_clk { + sdmmc_clk: sdmmc_clk { #clock-cells = <0>; - compatible = "altr,socfpga-a10-perip-clk"; - clocks = <&periph_pll>; - reg = <0xF0>; + compatible = "altr,socfpga-a10-gate-clk"; + clocks = <&sdmmc_free_clk>; + clk-gate = <0xC8 5>; + clk-phase = <0 135>; }; - peri_gpio_db_clk: peri_gpio_db_clk { + qspi_clk: qspi_clk { #clock-cells = <0>; - compatible = "altr,socfpga-a10-perip-clk"; - clocks = <&periph_pll>; - reg = <0xF4>; + compatible = "altr,socfpga-a10-gate-clk"; + clocks = <&l4_main_clk>; + clk-gate = <0xC8 11>; }; - peri_sdmmc_clk: peri_sdmmc_clk { + nand_clk: nand_clk { #clock-cells = <0>; - compatible = "altr,socfpga-a10-perip-clk"; - clocks = <&periph_pll>; - reg = <0xF8>; + compatible = "altr,socfpga-a10-gate-clk"; + clocks = <&l4_mp_clk>; + clk-gate = <0xC8 10>; }; - peri_s2f_usr0_clk: peri_s2f_usr0_clk { + spi_m_clk: spi_m_clk { #clock-cells = <0>; - compatible = "altr,socfpga-a10-perip-clk"; - clocks = <&periph_pll>; - reg = <0xFC>; + compatible = "altr,socfpga-a10-gate-clk"; + clocks = <&l4_main_clk>; + clk-gate = <0xC8 9>; }; - peri_s2f_usr1_clk: peri_s2f_usr1_clk { + usb_clk: usb_clk { #clock-cells = <0>; - compatible = "altr,socfpga-a10-perip-clk"; - clocks = <&periph_pll>; - reg = <0x100>; + compatible = "altr,socfpga-a10-gate-clk"; + clocks = <&l4_mp_clk>; + clk-gate = <0xC8 8>; }; - peri_hmc_pll_ref_clk: peri_hmc_pll_ref_clk { + s2f_usr1_clk: s2f_usr1_clk { #clock-cells = <0>; - compatible = "altr,socfpga-a10-perip-clk"; - clocks = <&periph_pll>; - reg = <0x104>; + compatible = "altr,socfpga-a10-gate-clk"; + clocks = <&peri_s2f_usr1_clk>; + clk-gate = <0xC8 6>; }; }; + }; - mpu_free_clk: mpu_free_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-a10-perip-clk"; - clocks = <&main_mpu_base_clk>, <&peri_mpu_base_clk>, - <&osc1>, <&cb_intosc_hs_div2_clk>, - <&f2s_free_clk>; - reg = <0x60>; - }; - - noc_free_clk: noc_free_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-a10-perip-clk"; - clocks = <&main_noc_base_clk>, <&peri_noc_base_clk>, - <&osc1>, <&cb_intosc_hs_div2_clk>, - <&f2s_free_clk>; - reg = <0x64>; - }; - - s2f_user1_free_clk: s2f_user1_free_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-a10-perip-clk"; - clocks = <&main_s2f_usr1_clk>, <&peri_s2f_usr1_clk>, - <&osc1>, <&cb_intosc_hs_div2_clk>, - <&f2s_free_clk>; - reg = <0x104>; - }; - - sdmmc_free_clk: sdmmc_free_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-a10-perip-clk"; - clocks = <&main_sdmmc_clk>, <&peri_sdmmc_clk>, - <&osc1>, <&cb_intosc_hs_div2_clk>, - <&f2s_free_clk>; - fixed-divider = <4>; - reg = <0xF8>; - }; - - l4_sys_free_clk: l4_sys_free_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-a10-perip-clk"; - clocks = <&noc_free_clk>; - fixed-divider = <4>; - }; - - l4_main_clk: l4_main_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-a10-gate-clk"; - clocks = <&noc_free_clk>; - div-reg = <0xA8 0 2>; - clk-gate = <0x48 1>; - }; - - l4_mp_clk: l4_mp_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-a10-gate-clk"; - clocks = <&noc_free_clk>; - div-reg = <0xA8 8 2>; - clk-gate = <0x48 2>; - }; - - l4_sp_clk: l4_sp_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-a10-gate-clk"; - clocks = <&noc_free_clk>; - div-reg = <0xA8 16 2>; - clk-gate = <0x48 3>; - }; - - mpu_periph_clk: mpu_periph_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-a10-gate-clk"; - clocks = <&mpu_free_clk>; - fixed-divider = <4>; - clk-gate = <0x48 0>; - }; - - sdmmc_clk: sdmmc_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-a10-gate-clk"; - clocks = <&sdmmc_free_clk>; - clk-gate = <0xC8 5>; - clk-phase = <0 135>; - }; - - qspi_clk: qspi_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-a10-gate-clk"; - clocks = <&l4_main_clk>; - clk-gate = <0xC8 11>; - }; - - nand_clk: nand_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-a10-gate-clk"; - clocks = <&l4_mp_clk>; - clk-gate = <0xC8 10>; - }; - - spi_m_clk: spi_m_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-a10-gate-clk"; - clocks = <&l4_main_clk>; - clk-gate = <0xC8 9>; - }; - - usb_clk: usb_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-a10-gate-clk"; - clocks = <&l4_mp_clk>; - clk-gate = <0xC8 8>; - }; - - s2f_usr1_clk: s2f_usr1_clk { - #clock-cells = <0>; - compatible = "altr,socfpga-a10-gate-clk"; - clocks = <&peri_s2f_usr1_clk>; - clk-gate = <0xC8 6>; - }; - }; + socfpga_axi_setup: stmmac-axi-config { + snps,wr_osr_lmt = <0xf>; + snps,rd_osr_lmt = <0xf>; + snps,blen = <0 0 0 0 16 0 0>; }; gmac0: ethernet@ff800000 { @@ -435,6 +429,7 @@ clock-names = "stmmaceth"; resets = <&rst EMAC0_RESET>; reset-names = "stmmaceth"; + snps,axi-config = <&socfpga_axi_setup>; status = "disabled"; }; @@ -454,6 +449,7 @@ clock-names = "stmmaceth"; resets = <&rst EMAC1_RESET>; reset-names = "stmmaceth"; + snps,axi-config = <&socfpga_axi_setup>; status = "disabled"; }; @@ -471,6 +467,7 @@ rx-fifo-depth = <16384>; clocks = <&l4_mp_clk>; clock-names = "stmmaceth"; + snps,axi-config = <&socfpga_axi_setup>; status = "disabled"; }; @@ -483,6 +480,7 @@ porta: gpio-controller@0 { compatible = "snps,dw-apb-gpio-port"; + bank-name = "porta"; gpio-controller; #gpio-cells = <2>; snps,nr-gpios = <29>; @@ -502,6 +500,7 @@ portb: gpio-controller@0 { compatible = "snps,dw-apb-gpio-port"; + bank-name = "portb"; gpio-controller; #gpio-cells = <2>; snps,nr-gpios = <29>; @@ -521,6 +520,7 @@ portc: gpio-controller@0 { compatible = "snps,dw-apb-gpio-port"; + bank-name = "portc"; gpio-controller; #gpio-cells = <2>; snps,nr-gpios = <27>; @@ -590,37 +590,24 @@ status = "disabled"; }; - sdr: sdr@0xffcfb100 { - compatible = "syscon"; - reg = <0xffcfb100 0x80>; - }; - - spi0: spi@ffda4000 { + spi1: spi@ffda5000 { compatible = "snps,dw-apb-ssi"; #address-cells = <1>; #size-cells = <0>; - reg = <0xffda4000 0x100>; - interrupts = <0 101 IRQ_TYPE_LEVEL_HIGH>; + reg = <0xffda5000 0x100>; + interrupts = <0 102 4>; num-chipselect = <4>; bus-num = <0>; + /*32bit_access;*/ tx-dma-channel = <&pdma 16>; rx-dma-channel = <&pdma 17>; clocks = <&spi_m_clk>; status = "disabled"; }; - spi1: spi@ffda5000 { - compatible = "snps,dw-apb-ssi"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0xffda5000 0x100>; - interrupts = <0 102 IRQ_TYPE_LEVEL_HIGH>; - num-chipselect = <4>; - bus-num = <0>; - tx-dma-channel = <&pdma 20>; - rx-dma-channel = <&pdma 21>; - clocks = <&spi_m_clk>; - status = "disabled"; + sdr: sdr@ffc25000 { + compatible = "altr,sdr-ctl", "syscon"; + reg = <0xffcfb100 0x80>; }; L2: l2-cache@fffff000 { @@ -629,6 +616,9 @@ interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>; cache-unified; cache-level = <2>; + prefetch-data = <1>; + prefetch-instr = <1>; + arm,shared-override; }; mmc: dwmmc0@ff808000 { @@ -638,18 +628,30 @@ reg = <0xff808000 0x1000>; interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>; fifo-depth = <0x400>; - bus-width = <4>; clocks = <&l4_mp_clk>, <&sdmmc_clk>; clock-names = "biu", "ciu"; status = "disabled"; }; + nand: nand@ffb90000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "denali,denali-nand-dt", "altr,socfpga-denali-nand"; + reg = <0xffb90000 0x72000>, + <0xffb80000 0x10000>; + reg-names = "nand_data", "denali_reg"; + interrupts = <0 99 4>; + dma-mask = <0xffffffff>; + clocks = <&nand_clk>; + status = "disabled"; + }; + ocram: sram@ffe00000 { compatible = "mmio-sram"; reg = <0xffe00000 0x40000>; }; - eccmgr: eccmgr@ffd06000 { + eccmgr: eccmgr { compatible = "altr,socfpga-a10-ecc-manager"; altr,sysmgr-syscon = <&sysmgr>; #address-cells = <1>; @@ -681,16 +683,6 @@ <33 IRQ_TYPE_LEVEL_HIGH>; }; - sdmmca-ecc@ff8c2c00 { - compatible = "altr,socfpga-sdmmc-ecc"; - reg = <0xff8c2c00 0x400>; - altr,ecc-parent = <&mmc>; - interrupts = <15 IRQ_TYPE_LEVEL_HIGH>, - <47 IRQ_TYPE_LEVEL_HIGH>, - <16 IRQ_TYPE_LEVEL_HIGH>, - <48 IRQ_TYPE_LEVEL_HIGH>; - }; - emac0-rx-ecc@ff8c0800 { compatible = "altr,socfpga-eth-mac-ecc"; reg = <0xff8c0800 0x400>; @@ -724,19 +716,17 @@ }; }; - qspi: qspi@ff809000 { + qspi: spi@ff809000 { + compatible = "cdns,qspi-nor", "cadence,qspi"; #address-cells = <1>; #size-cells = <0>; - compatible = "cadence,qspi"; reg = <0xff809000 0x100>, - <0xffa00000 0x100000>; + <0xffa00000 0x100000>; interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&l4_main_clk>; - ext-decoder = <0>; /* external decoder */ - num-chipselect = <4>; cdns,fifo-depth = <128>; cdns,fifo-width = <4>; - bus-num = <2>; + cdns,trigger-address = <0x00000000>; + clocks = <&qspi_clk>; status = "disabled"; }; @@ -818,7 +808,7 @@ status = "disabled"; }; - usbphy0: usbphy@0 { + usbphy0: usbphy { #phy-cells = <0>; compatible = "usb-nop-xceiv"; status = "okay"; diff --git a/arch/arm/dts/socfpga_arria10_socdk.dtsi b/arch/arm/dts/socfpga_arria10_socdk.dtsi new file mode 100644 index 00000000000..d7616dd1c51 --- /dev/null +++ b/arch/arm/dts/socfpga_arria10_socdk.dtsi @@ -0,0 +1,167 @@ +/* + * Copyright (C) 2015 Altera Corporation <www.altera.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ +#include "socfpga_arria10_socdk_sdmmc_handoff.dtsi" + +/ { + model = "Altera SOCFPGA Arria 10"; + compatible = "altr,socfpga-arria10", "altr,socfpga"; + + aliases { + ethernet0 = &gmac0; + serial0 = &uart1; + }; + + chosen { + bootargs = "earlyprintk"; + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + name = "memory"; + device_type = "memory"; + reg = <0x0 0x40000000>; /* 1GB */ + }; + + a10leds { + compatible = "gpio-leds"; + + a10sr_led0 { + label = "a10sr-led0"; + gpios = <&a10sr_gpio 0 1>; + }; + + a10sr_led1 { + label = "a10sr-led1"; + gpios = <&a10sr_gpio 1 1>; + }; + + a10sr_led2 { + label = "a10sr-led2"; + gpios = <&a10sr_gpio 2 1>; + }; + + a10sr_led3 { + label = "a10sr-led3"; + gpios = <&a10sr_gpio 3 1>; + }; + }; + + soc { + u-boot,dm-pre-reloc; + }; +}; + +&gmac0 { + phy-mode = "rgmii"; + phy-addr = <0xffffffff>; /* probe for phy addr */ + + /* + * These skews assume the user's FPGA design is adding 600ps of delay + * for TX_CLK on Arria 10. + * + * All skews are offset since hardware skew values for the ksz9031 + * range from a negative skew to a positive skew. + * See the micrel-ksz90x1.txt Documentation file for details. + */ + txd0-skew-ps = <0>; /* -420ps */ + txd1-skew-ps = <0>; /* -420ps */ + txd2-skew-ps = <0>; /* -420ps */ + txd3-skew-ps = <0>; /* -420ps */ + rxd0-skew-ps = <420>; /* 0ps */ + rxd1-skew-ps = <420>; /* 0ps */ + rxd2-skew-ps = <420>; /* 0ps */ + rxd3-skew-ps = <420>; /* 0ps */ + txen-skew-ps = <0>; /* -420ps */ + txc-skew-ps = <1860>; /* 960ps */ + rxdv-skew-ps = <420>; /* 0ps */ + rxc-skew-ps = <1680>; /* 780ps */ + max-frame-size = <3800>; + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&spi1 { + status = "okay"; + + resource-manager@0 { + compatible = "altr,a10sr"; + reg = <0>; + spi-max-frequency = <100000>; + /* low-level active IRQ at GPIO1_5 */ + interrupt-parent = <&portb>; + interrupts = <5 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + #interrupt-cells = <2>; + + a10sr_gpio: gpio-controller { + compatible = "altr,a10sr-gpio"; + gpio-controller; + #gpio-cells = <2>; + }; + + a10sr_rst: reset-controller { + compatible = "altr,a10sr-reset"; + #reset-cells = <1>; + }; + }; +}; + +&i2c1 { + status = "okay"; + + /* + * adjust the falling times to decrease the i2c frequency to 50Khz + * because the LCD module does not work at the standard 100Khz + */ + clock-frequency = <100000>; + i2c-sda-falling-time-ns = <6000>; + i2c-scl-falling-time-ns = <6000>; + + eeprom@51 { + compatible = "atmel,24c32"; + reg = <0x51>; + pagesize = <32>; + }; + + rtc@68 { + compatible = "dallas,ds1339"; + reg = <0x68>; + }; + + ltc@5c { + compatible = "ltc2977"; + reg = <0x5c>; + }; +}; + +&uart1 { + clock-frequency = <50000000>; + u-boot,dm-pre-reloc; + status = "okay"; +}; + +&usb0 { + status = "okay"; + disable-over-current; +}; + +&watchdog1 { + status = "okay"; +}; diff --git a/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts b/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts index b573d0e6582..9c6070ded91 100644 --- a/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts +++ b/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts @@ -1,32 +1,22 @@ /* - * Copyright (C) 2015-2017 Altera Corporation. All rights reserved. + * Copyright (C) 2014-2015 Altera Corporation <www.altera.com> * * This program is free software; you can redistribute it and/or modify - * it under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. * - * You should have received a copy of the GNU General Public License along with - * this program. If not, see <http://www.gnu.org/licenses/>. + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. */ /dts-v1/; -#include "socfpga_arria10_socdk_sdmmc_handoff.dtsi" - -/ { - chosen { - bootargs = "console=ttyS0,115200"; - }; -}; - -&uart1 { - u-boot,dm-pre-reloc; - status = "okay"; -}; +#include "socfpga_arria10_socdk.dtsi" &mmc { u-boot,dm-pre-reloc; @@ -36,3 +26,15 @@ broken-cd; bus-width = <4>; }; + +&eccmgr { + sdmmca-ecc@ff8c2c00 { + compatible = "altr,socfpga-sdmmc-ecc"; + reg = <0xff8c2c00 0x400>; + altr,ecc-parent = <&mmc>; + interrupts = <15 IRQ_TYPE_LEVEL_HIGH>, + <47 IRQ_TYPE_LEVEL_HIGH>, + <16 IRQ_TYPE_LEVEL_HIGH>, + <48 IRQ_TYPE_LEVEL_HIGH>; + }; +}; diff --git a/arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi b/arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi index b6939b011aa..39009654d9d 100644 --- a/arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi +++ b/arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi @@ -14,467 +14,337 @@ #include "socfpga_arria10.dtsi" / { - model = "Altera SOCFPGA Arria 10"; - compatible = "altr,socfpga-arria10", "altr,socfpga"; + #address-cells = <1>; + #size-cells = <1>; + model = "SOCFPGA Arria10 Dev Kit"; /* Bootloader setting: uboot.model */ chosen { - /* Bootloader setting: uboot.rbf_filename */ - cff-file = "ghrd_10as066n2.periph.rbf"; - early-release-fpga-config; + cff-file = "socfpga.rbf"; /* Bootloader setting: uboot.rbf_filename */ }; - soc { + /* Clock sources */ + clocks { u-boot,dm-pre-reloc; - clkmgr@ffd04000 { + #address-cells = <1>; + #size-cells = <1>; + + /* Clock source: altera_arria10_hps_eosc1 */ + altera_arria10_hps_eosc1: altera_arria10_hps_eosc1 { + u-boot,dm-pre-reloc; + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + clock-output-names = "altera_arria10_hps_eosc1-clk"; + }; + + /* Clock source: altera_arria10_hps_cb_intosc_ls */ + altera_arria10_hps_cb_intosc_ls: altera_arria10_hps_cb_intosc_ls { + u-boot,dm-pre-reloc; + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <60000000>; + clock-output-names = "altera_arria10_hps_cb_intosc_ls-clk"; + }; + + /* Clock source: altera_arria10_hps_f2h_free */ + altera_arria10_hps_f2h_free: altera_arria10_hps_f2h_free { + u-boot,dm-pre-reloc; + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + clock-output-names = "altera_arria10_hps_f2h_free-clk"; + }; + }; + + /* + * Driver: altera_arria10_soc_clock_manager_arria10_uboot_driver + * Version: 1.0 + * Binding: device + */ + i_clk_mgr: clock_manager@0xffd04000 { + u-boot,dm-pre-reloc; + compatible = "altr,socfpga-a10-clk-init"; + reg = <0xffd04000 0x00000200>; + reg-names = "soc_clock_manager_OCP_SLV"; + + /* Address Block: soc_clock_manager_OCP_SLV.i_clk_mgr_mainpllgrp */ + mainpll { u-boot,dm-pre-reloc; - clocks { - u-boot,dm-pre-reloc; - osc1 { - u-boot,dm-pre-reloc; - clock-frequency = <25000000>; - clock-output-names = "altera_arria10_hps_eosc1-clk"; - }; + vco0-psrc = <0>; /* Field: vco0.psrc */ + vco1-denom = <1>; /* Field: vco1.denom */ + vco1-numer = <191>; /* Field: vco1.numer */ + mpuclk-cnt = <0>; /* Field: mpuclk.cnt */ + mpuclk-src = <0>; /* Field: mpuclk.src */ + nocclk-cnt = <0>; /* Field: nocclk.cnt */ + nocclk-src = <0>; /* Field: nocclk.src */ + cntr2clk-cnt = <900>; /* Field: cntr2clk.cnt */ + cntr3clk-cnt = <900>; /* Field: cntr3clk.cnt */ + cntr4clk-cnt = <900>; /* Field: cntr4clk.cnt */ + cntr5clk-cnt = <900>; /* Field: cntr5clk.cnt */ + cntr6clk-cnt = <900>; /* Field: cntr6clk.cnt */ + cntr7clk-cnt = <900>; /* Field: cntr7clk.cnt */ + cntr7clk-src = <0>; /* Field: cntr7clk.src */ + cntr8clk-cnt = <900>; /* Field: cntr8clk.cnt */ + cntr9clk-cnt = <900>; /* Field: cntr9clk.cnt */ + cntr9clk-src = <0>; /* Field: cntr9clk.src */ + cntr15clk-cnt = <900>; /* Field: cntr15clk.cnt */ + nocdiv-l4mainclk = <0>; /* Field: nocdiv.l4mainclk */ + nocdiv-l4mpclk = <0>; /* Field: nocdiv.l4mpclk */ + nocdiv-l4spclk = <2>; /* Field: nocdiv.l4spclk */ + nocdiv-csatclk = <0>; /* Field: nocdiv.csatclk */ + nocdiv-cstraceclk = <1>; /* Field: nocdiv.cstraceclk */ + nocdiv-cspdbgclk = <1>; /* Field: nocdiv.cspdbgclk */ + }; - cb_intosc_ls_clk { - u-boot,dm-pre-reloc; - clock-frequency = <60000000>; - clock-output-names = "altera_arria10_hps_cb_intosc_ls-clk"; - }; + /* Address Block: soc_clock_manager_OCP_SLV.i_clk_mgr_perpllgrp */ + perpll { + u-boot,dm-pre-reloc; + vco0-psrc = <0>; /* Field: vco0.psrc */ + vco1-denom = <1>; /* Field: vco1.denom */ + vco1-numer = <159>; /* Field: vco1.numer */ + cntr2clk-cnt = <7>; /* Field: cntr2clk.cnt */ + cntr2clk-src = <1>; /* Field: cntr2clk.src */ + cntr3clk-cnt = <900>; /* Field: cntr3clk.cnt */ + cntr3clk-src = <1>; /* Field: cntr3clk.src */ + cntr4clk-cnt = <19>; /* Field: cntr4clk.cnt */ + cntr4clk-src = <1>; /* Field: cntr4clk.src */ + cntr5clk-cnt = <499>; /* Field: cntr5clk.cnt */ + cntr5clk-src = <1>; /* Field: cntr5clk.src */ + cntr6clk-cnt = <9>; /* Field: cntr6clk.cnt */ + cntr6clk-src = <1>; /* Field: cntr6clk.src */ + cntr7clk-cnt = <900>; /* Field: cntr7clk.cnt */ + cntr8clk-cnt = <900>; /* Field: cntr8clk.cnt */ + cntr8clk-src = <0>; /* Field: cntr8clk.src */ + cntr9clk-cnt = <900>; /* Field: cntr9clk.cnt */ + emacctl-emac0sel = <0>; /* Field: emacctl.emac0sel */ + emacctl-emac1sel = <0>; /* Field: emacctl.emac1sel */ + emacctl-emac2sel = <0>; /* Field: emacctl.emac2sel */ + gpiodiv-gpiodbclk = <32000>; /* Field: gpiodiv.gpiodbclk */ + }; - f2s_free_clk { - u-boot,dm-pre-reloc; - clock-frequency = <200000000>; - clock-output-names = "altera_arria10_hps_f2h_free-clk"; - }; + /* Address Block: soc_clock_manager_OCP_SLV.i_clk_mgr_alteragrp */ + alteragrp { + u-boot,dm-pre-reloc; + nocclk = <0x0384000b>; /* Register: nocclk */ + mpuclk = <0x03840001>; /* Register: mpuclk */ + }; + }; - main_pll { - u-boot,dm-pre-reloc; - /* - * Address Block: soc_clock_manager_OCP_SLV. - * i_clk_mgr_mainpllgrp - */ - altr,of_reg_value = < - 0 /* Field: vco0.psrc */ - 1 /* Field: vco1.denom */ - 191 /* Field: vco1.numer */ - 0 /* Field: mpuclk */ - 0 /* Field: mpuclk.cnt */ - 0 /* Field: mpuclk.src */ - 0 /* Field: nocclk */ - 0 /* Field: nocclk.cnt */ - 0 /* Field: nocclk.src */ - 900 /* Field: cntr2clk.cnt */ - 900 /* Field: cntr3clk.cnt */ - 900 /* Field: cntr4clk.cnt */ - 900 /* Field: cntr5clk.cnt */ - 900 /* Field: cntr6clk.cnt */ - 900 /* Field: cntr7clk.cnt */ - 0 /* Field: cntr7clk.src */ - 900 /* Field: cntr8clk.cnt */ - 900 /* Field: cntr9clk.cnt */ - 0 /* Field: cntr9clk.src */ - 900 /* Field: cntr15clk.cnt */ - 0 /* Field: nocdiv.l4mainclk */ - 0 /* Field: nocdiv.l4mpclk */ - 2 /* Field: nocdiv.l4spclk */ - 0 /* Field: nocdiv.csatclk */ - 1 /* Field: nocdiv.cstraceclk */ - 1 /* Field: nocdiv.cspdbgclk */ - >; - }; + /* + * Driver: altera_arria10_soc_3v_io48_pin_mux_arria10_uboot_driver + * Version: 1.0 + * Binding: pinmux + */ + i_io48_pin_mux: pinmux@0xffd07000 { + u-boot,dm-pre-reloc; + #address-cells = <1>; + #size-cells = <1>; + compatible = "pinctrl-single"; + reg = <0xffd07000 0x00000800>; + reg-names = "soc_3v_io48_pin_mux_OCP_SLV"; - periph_pll { - u-boot,dm-pre-reloc; - /* - * Address Block: soc_clock_manager_OCP_SLV. - * i_clk_mgr_perpllgrp - */ - altr,of_reg_value = < - 0 /* Field: vco0.psrc */ - 1 /* Field: vco1.denom */ - 159 /* Field: vco1.numer */ - 7 /* Field: cntr2clk.cnt */ - 1 /* Field: cntr2clk.src */ - 900 /* Field: cntr3clk.cnt */ - 1 /* Field: cntr3clk.src */ - 19 /* Field: cntr4clk.cnt */ - 1 /* Field: cntr4clk.src */ - 499 /* Field: cntr5clk.cnt */ - 1 /* Field: cntr5clk.src */ - 9 /* Field: cntr6clk.cnt */ - 1 /* Field: cntr6clk.src */ - 900 /* Field: cntr7clk.cnt */ - 900 /* Field: cntr8clk.cnt */ - 0 /* Field: cntr8clk.src */ - 900 /* Field: cntr9clk.cnt */ - 0 /* Field: emacctl.emac0sel */ - 0 /* Field: emacctl.emac1sel */ - 0 /* Field: emacctl.emac2sel */ - 32000 /* Field: gpiodiv.gpiodbclk */ - >; - }; + /* Address Block: soc_3v_io48_pin_mux_OCP_SLV.i_io48_pin_mux_shared_3v_io_grp */ + shared { + u-boot,dm-pre-reloc; + reg = <0xffd07000 0x00000200>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0x0000000f>; + pinctrl-single,pins = + <0x00000000 0x00000008>, /* Register: pinmux_shared_io_q1_1 */ + <0x00000004 0x00000008>, /* Register: pinmux_shared_io_q1_2 */ + <0x00000008 0x00000008>, /* Register: pinmux_shared_io_q1_3 */ + <0x0000000c 0x00000008>, /* Register: pinmux_shared_io_q1_4 */ + <0x00000010 0x00000008>, /* Register: pinmux_shared_io_q1_5 */ + <0x00000014 0x00000008>, /* Register: pinmux_shared_io_q1_6 */ + <0x00000018 0x00000008>, /* Register: pinmux_shared_io_q1_7 */ + <0x0000001c 0x00000008>, /* Register: pinmux_shared_io_q1_8 */ + <0x00000020 0x00000008>, /* Register: pinmux_shared_io_q1_9 */ + <0x00000024 0x00000008>, /* Register: pinmux_shared_io_q1_10 */ + <0x00000028 0x00000008>, /* Register: pinmux_shared_io_q1_11 */ + <0x0000002c 0x00000008>, /* Register: pinmux_shared_io_q1_12 */ + <0x00000030 0x00000004>, /* Register: pinmux_shared_io_q2_1 */ + <0x00000034 0x00000004>, /* Register: pinmux_shared_io_q2_2 */ + <0x00000038 0x00000004>, /* Register: pinmux_shared_io_q2_3 */ + <0x0000003c 0x00000004>, /* Register: pinmux_shared_io_q2_4 */ + <0x00000040 0x00000004>, /* Register: pinmux_shared_io_q2_5 */ + <0x00000044 0x00000004>, /* Register: pinmux_shared_io_q2_6 */ + <0x00000048 0x00000004>, /* Register: pinmux_shared_io_q2_7 */ + <0x0000004c 0x00000004>, /* Register: pinmux_shared_io_q2_8 */ + <0x00000050 0x00000004>, /* Register: pinmux_shared_io_q2_9 */ + <0x00000054 0x00000004>, /* Register: pinmux_shared_io_q2_10 */ + <0x00000058 0x00000004>, /* Register: pinmux_shared_io_q2_11 */ + <0x0000005c 0x00000004>, /* Register: pinmux_shared_io_q2_12 */ + <0x00000060 0x00000003>, /* Register: pinmux_shared_io_q3_1 */ + <0x00000064 0x00000003>, /* Register: pinmux_shared_io_q3_2 */ + <0x00000068 0x00000003>, /* Register: pinmux_shared_io_q3_3 */ + <0x0000006c 0x00000003>, /* Register: pinmux_shared_io_q3_4 */ + <0x00000070 0x00000003>, /* Register: pinmux_shared_io_q3_5 */ + <0x00000074 0x0000000f>, /* Register: pinmux_shared_io_q3_6 */ + <0x00000078 0x0000000a>, /* Register: pinmux_shared_io_q3_7 */ + <0x0000007c 0x0000000a>, /* Register: pinmux_shared_io_q3_8 */ + <0x00000080 0x0000000a>, /* Register: pinmux_shared_io_q3_9 */ + <0x00000084 0x0000000a>, /* Register: pinmux_shared_io_q3_10 */ + <0x00000088 0x00000001>, /* Register: pinmux_shared_io_q3_11 */ + <0x0000008c 0x00000001>, /* Register: pinmux_shared_io_q3_12 */ + <0x00000090 0x00000000>, /* Register: pinmux_shared_io_q4_1 */ + <0x00000094 0x00000000>, /* Register: pinmux_shared_io_q4_2 */ + <0x00000098 0x0000000f>, /* Register: pinmux_shared_io_q4_3 */ + <0x0000009c 0x0000000c>, /* Register: pinmux_shared_io_q4_4 */ + <0x000000a0 0x0000000f>, /* Register: pinmux_shared_io_q4_5 */ + <0x000000a4 0x0000000f>, /* Register: pinmux_shared_io_q4_6 */ + <0x000000a8 0x0000000a>, /* Register: pinmux_shared_io_q4_7 */ + <0x000000ac 0x0000000a>, /* Register: pinmux_shared_io_q4_8 */ + <0x000000b0 0x0000000c>, /* Register: pinmux_shared_io_q4_9 */ + <0x000000b4 0x0000000c>, /* Register: pinmux_shared_io_q4_10 */ + <0x000000b8 0x0000000c>, /* Register: pinmux_shared_io_q4_11 */ + <0x000000bc 0x0000000c>; /* Register: pinmux_shared_io_q4_12 */ + }; + + /* Address Block: soc_3v_io48_pin_mux_OCP_SLV.i_io48_pin_mux_dedicated_io_grp */ + dedicated { + u-boot,dm-pre-reloc; + reg = <0xffd07200 0x00000200>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0x0000000f>; + pinctrl-single,pins = + <0x0000000c 0x00000008>, /* Register: pinmux_dedicated_io_4 */ + <0x00000010 0x00000008>, /* Register: pinmux_dedicated_io_5 */ + <0x00000014 0x00000008>, /* Register: pinmux_dedicated_io_6 */ + <0x00000018 0x00000008>, /* Register: pinmux_dedicated_io_7 */ + <0x0000001c 0x00000008>, /* Register: pinmux_dedicated_io_8 */ + <0x00000020 0x00000008>, /* Register: pinmux_dedicated_io_9 */ + <0x00000024 0x0000000a>, /* Register: pinmux_dedicated_io_10 */ + <0x00000028 0x0000000a>, /* Register: pinmux_dedicated_io_11 */ + <0x0000002c 0x00000008>, /* Register: pinmux_dedicated_io_12 */ + <0x00000030 0x00000008>, /* Register: pinmux_dedicated_io_13 */ + <0x00000034 0x00000008>, /* Register: pinmux_dedicated_io_14 */ + <0x00000038 0x00000008>, /* Register: pinmux_dedicated_io_15 */ + <0x0000003c 0x0000000d>, /* Register: pinmux_dedicated_io_16 */ + <0x00000040 0x0000000d>; /* Register: pinmux_dedicated_io_17 */ + }; - altera { - u-boot,dm-pre-reloc; - /* - * Address Block: soc_clock_manager_OCP_SLV. - * i_clk_mgr_alteragrp - */ - altr,of_reg_value = < - 0x0384000b /* Register: nocclk */ - 0x03840001 /* Register: mpuclk */ - >; - }; - }; + /* Address Block: soc_3v_io48_pin_mux_OCP_SLV.i_io48_pin_mux_dedicated_io_grp */ + dedicated_cfg { + u-boot,dm-pre-reloc; + reg = <0xffd07200 0x00000200>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0x003f3f3f>; + pinctrl-single,pins = + <0x00000100 0x00000101>, /* Register: configuration_dedicated_io_bank */ + <0x00000104 0x000b080a>, /* Register: configuration_dedicated_io_1 */ + <0x00000108 0x000b080a>, /* Register: configuration_dedicated_io_2 */ + <0x0000010c 0x000b080a>, /* Register: configuration_dedicated_io_3 */ + <0x00000110 0x000a282a>, /* Register: configuration_dedicated_io_4 */ + <0x00000114 0x000a282a>, /* Register: configuration_dedicated_io_5 */ + <0x00000118 0x0008282a>, /* Register: configuration_dedicated_io_6 */ + <0x0000011c 0x000a282a>, /* Register: configuration_dedicated_io_7 */ + <0x00000120 0x000a282a>, /* Register: configuration_dedicated_io_8 */ + <0x00000124 0x000a282a>, /* Register: configuration_dedicated_io_9 */ + <0x00000128 0x00090000>, /* Register: configuration_dedicated_io_10 */ + <0x0000012c 0x00090000>, /* Register: configuration_dedicated_io_11 */ + <0x00000130 0x000b282a>, /* Register: configuration_dedicated_io_12 */ + <0x00000134 0x000b282a>, /* Register: configuration_dedicated_io_13 */ + <0x00000138 0x000b282a>, /* Register: configuration_dedicated_io_14 */ + <0x0000013c 0x000b282a>, /* Register: configuration_dedicated_io_15 */ + <0x00000140 0x0008282a>, /* Register: configuration_dedicated_io_16 */ + <0x00000144 0x000a282a>; /* Register: configuration_dedicated_io_17 */ }; - /* - * Driver: altera_arria10_soc_3v_io48_pin_mux_arria10_uboot_driver - * Binding: pinmux - */ - i_io48_pin_mux: pinmux@0xffd07000 { + /* Address Block: soc_3v_io48_pin_mux_OCP_SLV.i_io48_pin_mux_fpga_interface_grp */ + fpga { u-boot,dm-pre-reloc; - #address-cells = <1>; - #size-cells = <1>; - compatible = "pinctrl-single"; - reg = <0xffd07000 0x00000800>; - reg-names = "soc_3v_io48_pin_mux_OCP_SLV"; + reg = <0xffd07400 0x00000100>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0x00000001>; + pinctrl-single,pins = + <0x00000000 0x00000000>, /* Register: pinmux_emac0_usefpga */ + <0x00000004 0x00000000>, /* Register: pinmux_emac1_usefpga */ + <0x00000008 0x00000000>, /* Register: pinmux_emac2_usefpga */ + <0x0000000c 0x00000000>, /* Register: pinmux_i2c0_usefpga */ + <0x00000010 0x00000000>, /* Register: pinmux_i2c1_usefpga */ + <0x00000014 0x00000000>, /* Register: pinmux_i2c_emac0_usefpga */ + <0x00000018 0x00000000>, /* Register: pinmux_i2c_emac1_usefpga */ + <0x0000001c 0x00000000>, /* Register: pinmux_i2c_emac2_usefpga */ + <0x00000020 0x00000000>, /* Register: pinmux_nand_usefpga */ + <0x00000024 0x00000000>, /* Register: pinmux_qspi_usefpga */ + <0x00000028 0x00000000>, /* Register: pinmux_sdmmc_usefpga */ + <0x0000002c 0x00000000>, /* Register: pinmux_spim0_usefpga */ + <0x00000030 0x00000000>, /* Register: pinmux_spim1_usefpga */ + <0x00000034 0x00000000>, /* Register: pinmux_spis0_usefpga */ + <0x00000038 0x00000000>, /* Register: pinmux_spis1_usefpga */ + <0x0000003c 0x00000000>, /* Register: pinmux_uart0_usefpga */ + <0x00000040 0x00000000>; /* Register: pinmux_uart1_usefpga */ + }; + }; + + /* + * Driver: altera_arria10_soc_noc_arria10_uboot_driver + * Version: 1.0 + * Binding: device + */ + i_noc: noc@0xffd10000 { + u-boot,dm-pre-reloc; + compatible = "altr,socfpga-a10-noc"; + reg = <0xffd10000 0x00008000>; + reg-names = "mpu_m0"; + firewall { + u-boot,dm-pre-reloc; /* - * Address Block: soc_3v_io48_pin_mux_OCP_SLV. - * i_io48_pin_mux_shared_3v_io_grp + * Driver setting: altera_arria10_soc_noc_arria10_uboot_driver.I_NOC.mpu_m0.noc_fw_ddr_mpu_fpga2sdram_ddr_scr.mpuregion0addr.base + * Driver setting: altera_arria10_soc_noc_arria10_uboot_driver.I_NOC.mpu_m0.noc_fw_ddr_mpu_fpga2sdram_ddr_scr.mpuregion0addr.limit */ - shared { - u-boot,dm-pre-reloc; - reg = <0xffd07000 0x00000200>; - pinctrl-single,register-width = <32>; - pinctrl-single,function-mask = <0x0000000f>; - pinctrl-single,pins = - /* Reg: pinmux_shared_io_q1_1 */ - <0x00000000 0x00000008>, - /* Reg: pinmux_shared_io_q1_2 */ - <0x00000004 0x00000008>, - /* Reg: pinmux_shared_io_q1_3 */ - <0x00000008 0x00000008>, - /* Reg: pinmux_shared_io_q1_4 */ - <0x0000000c 0x00000008>, - /* Reg: pinmux_shared_io_q1_5 */ - <0x00000010 0x00000008>, - /* Reg: pinmux_shared_io_q1_6 */ - <0x00000014 0x00000008>, - /* Reg: pinmux_shared_io_q1_7 */ - <0x00000018 0x00000008>, - /* Reg: pinmux_shared_io_q1_8 */ - <0x0000001c 0x00000008>, - /* Reg: pinmux_shared_io_q1_9 */ - <0x00000020 0x00000008>, - /* Reg: pinmux_shared_io_q1_10 */ - <0x00000024 0x00000008>, - /* Reg: pinmux_shared_io_q1_11 */ - <0x00000028 0x00000008>, - /* Reg: pinmux_shared_io_q1_12 */ - <0x0000002c 0x00000008>, - /* Reg: pinmux_shared_io_q2_1 */ - <0x00000030 0x00000004>, - /* Reg: pinmux_shared_io_q2_2 */ - <0x00000034 0x00000004>, - /* Reg: pinmux_shared_io_q2_3 */ - <0x00000038 0x00000004>, - /* Reg: pinmux_shared_io_q2_4 */ - <0x0000003c 0x00000004>, - /* Reg: pinmux_shared_io_q2_5 */ - <0x00000040 0x00000004>, - /* Reg: pinmux_shared_io_q2_6 */ - <0x00000044 0x00000004>, - /* Reg: pinmux_shared_io_q2_7 */ - <0x00000048 0x00000004>, - /* Reg: pinmux_shared_io_q2_8 */ - <0x0000004c 0x00000004>, - /* Reg: pinmux_shared_io_q2_9 */ - <0x00000050 0x00000004>, - /* Reg: pinmux_shared_io_q2_10 */ - <0x00000054 0x00000004>, - /* Reg: pinmux_shared_io_q2_11 */ - <0x00000058 0x00000004>, - /* Reg: pinmux_shared_io_q2_12 */ - <0x0000005c 0x00000004>, - /* Reg: pinmux_shared_io_q3_1 */ - <0x00000060 0x00000003>, - /* Reg: pinmux_shared_io_q3_2 */ - <0x00000064 0x00000003>, - /* Reg: pinmux_shared_io_q3_3 */ - <0x00000068 0x00000003>, - /* Reg: pinmux_shared_io_q3_4 */ - <0x0000006c 0x00000003>, - /* Reg: pinmux_shared_io_q3_5 */ - <0x00000070 0x00000003>, - /* Reg: pinmux_shared_io_q3_6 */ - <0x00000074 0x0000000f>, - /* Reg: pinmux_shared_io_q3_7 */ - <0x00000078 0x0000000a>, - /* Reg: pinmux_shared_io_q3_8 */ - <0x0000007c 0x0000000a>, - /* Reg: pinmux_shared_io_q3_9 */ - <0x00000080 0x0000000a>, - /* Reg: pinmux_shared_io_q3_10 */ - <0x00000084 0x0000000a>, - /* Reg: pinmux_shared_io_q3_11 */ - <0x00000088 0x00000001>, - /* Reg: pinmux_shared_io_q3_12 */ - <0x0000008c 0x00000001>, - /* Reg: pinmux_shared_io_q4_1 */ - <0x00000090 0x00000000>, - /* Reg: pinmux_shared_io_q4_2 */ - <0x00000094 0x00000000>, - /* Reg: pinmux_shared_io_q4_3 */ - <0x00000098 0x0000000f>, - /* Reg: pinmux_shared_io_q4_4 */ - <0x0000009c 0x0000000c>, - /* Reg: pinmux_shared_io_q4_5 */ - <0x000000a0 0x0000000f>, - /* Reg: pinmux_shared_io_q4_6 */ - <0x000000a4 0x0000000f>, - /* Reg: pinmux_shared_io_q4_7 */ - <0x000000a8 0x0000000a>, - /* Reg: pinmux_shared_io_q4_8 */ - <0x000000ac 0x0000000a>, - /* Reg: pinmux_shared_io_q4_9 */ - <0x000000b0 0x0000000c>, - /* Reg: pinmux_shared_io_q4_10 */ - <0x000000b4 0x0000000c>, - /* Reg: pinmux_shared_io_q4_11 */ - <0x000000b8 0x0000000c>, - /* Reg: pinmux_shared_io_q4_12 */ - <0x000000bc 0x0000000c>; - }; - + mpu0 = <0x00000000 0x0000ffff>; /* - * Address Block: soc_3v_io48_pin_mux_OCP_SLV. - * i_io48_pin_mux_dedicated_io_grp + * Driver setting: altera_arria10_soc_noc_arria10_uboot_driver.I_NOC.mpu_m0.noc_fw_ddr_l3_ddr_scr.hpsregion0addr.base + * Driver setting: altera_arria10_soc_noc_arria10_uboot_driver.I_NOC.mpu_m0.noc_fw_ddr_l3_ddr_scr.hpsregion0addr.limit */ - dedicated { - u-boot,dm-pre-reloc; - reg = <0xffd07200 0x00000200>; - pinctrl-single,register-width = <32>; - pinctrl-single,function-mask = <0x0000000f>; - pinctrl-single,pins = - /* Reg: pinmux_dedicated_io_4 */ - <0x0000000c 0x00000008>, - /* Reg: pinmux_dedicated_io_5 */ - <0x00000010 0x00000008>, - /* Reg: pinmux_dedicated_io_6 */ - <0x00000014 0x00000008>, - /* Regi: pinmux_dedicated_io_7 */ - <0x00000018 0x00000008>, - /* Reg: pinmux_dedicated_io_8 */ - <0x0000001c 0x00000008>, - /* Reg: pinmux_dedicated_io_9 */ - <0x00000020 0x00000008>, - /* Reg: pinmux_dedicated_io_10 */ - <0x00000024 0x0000000a>, - /* Reg: pinmux_dedicated_io_11 */ - <0x00000028 0x0000000a>, - /* Reg: pinmux_dedicated_io_12 */ - <0x0000002c 0x00000008>, - /* Reg: pinmux_dedicated_io_13 */ - <0x00000030 0x00000008>, - /* Reg: pinmux_dedicated_io_14 */ - <0x00000034 0x00000008>, - /* Reg: pinmux_dedicated_io_15 */ - <0x00000038 0x00000008>, - /* Reg: pinmux_dedicated_io_16 */ - <0x0000003c 0x0000000d>, - /* Reg: pinmux_dedicated_io_17 */ - <0x00000040 0x0000000d>; - }; - + l3-0 = <0x00000000 0x0000ffff>; /* - * Address Block: soc_3v_io48_pin_mux_OCP_SLV. - * i_io48_pin_mux_dedicated_io_grp + * Driver setting: altera_arria10_soc_noc_arria10_uboot_driver.I_NOC.mpu_m0.noc_fw_ddr_mpu_fpga2sdram_ddr_scr.fpga2sdram0region0addr.base + * Driver setting: altera_arria10_soc_noc_arria10_uboot_driver.I_NOC.mpu_m0.noc_fw_ddr_mpu_fpga2sdram_ddr_scr.fpga2sdram0region0addr.limit */ - dedicated_cfg { - u-boot,dm-pre-reloc; - reg = <0xffd07200 0x00000200>; - pinctrl-single,register-width = <32>; - pinctrl-single,function-mask = <0x003f3f3f>; - pinctrl-single,pins = - /* Reg: cfg_dedicated_io_bank */ - <0x00000100 0x00000101>, - /* Reg: cfg_dedicated_io_1 */ - <0x00000104 0x000b080a>, - /* Reg: cfg_dedicated_io_2 */ - <0x00000108 0x000b080a>, - /* Reg: cfg_dedicated_io_3 */ - <0x0000010c 0x000b080a>, - /* Reg: cfg_dedicated_io_4 */ - <0x00000110 0x000a282a>, - /* Reg: cfg_dedicated_io_5 */ - <0x00000114 0x000a282a>, - /* Reg: cfg_dedicated_io_6 */ - <0x00000118 0x0008282a>, - /* Reg: cfg_dedicated_io_7 */ - <0x0000011c 0x000a282a>, - /* Reg: cfg_dedicated_io_8 */ - <0x00000120 0x000a282a>, - /* Reg: cfg_dedicated_io_9 */ - <0x00000124 0x000a282a>, - /* Reg: cfg_dedicated_io_10 */ - <0x00000128 0x00090000>, - /* Reg: cfg_dedicated_io_11 */ - <0x0000012c 0x00090000>, - /* Reg: cfg_dedicated_io_12 */ - <0x00000130 0x000b282a>, - /* Reg: cfg_dedicated_io_13 */ - <0x00000134 0x000b282a>, - /* Reg: cfg_dedicated_io_14 */ - <0x00000138 0x000b282a>, - /* Reg: cfg_dedicated_io_15 */ - <0x0000013c 0x000b282a>, - /* Reg: cfg_dedicated_io_16 */ - <0x00000140 0x0008282a>, - /* Reg: cfg_dedicated_io_17 */ - <0x00000144 0x000a282a>; - }; - + fpga2sdram0-0 = <0x00000000 0x0000ffff>; /* - * Address Block: soc_3v_io48_pin_mux_OCP_SLV. - * i_io48_pin_mux_fpga_interface_grp + * Driver setting: altera_arria10_soc_noc_arria10_uboot_driver.I_NOC.mpu_m0.noc_fw_ddr_mpu_fpga2sdram_ddr_scr.fpga2sdram1region0addr.base + * Driver setting: altera_arria10_soc_noc_arria10_uboot_driver.I_NOC.mpu_m0.noc_fw_ddr_mpu_fpga2sdram_ddr_scr.fpga2sdram1region0addr.limit */ - fpga { - u-boot,dm-pre-reloc; - reg = <0xffd07400 0x00000100>; - pinctrl-single,register-width = <32>; - pinctrl-single,function-mask = <0x00000001>; - pinctrl-single,pins = - /* Reg: pinmux_emac0_usefpga */ - <0x00000000 0x00000000>, - /* Reg: pinmux_emac1_usefpga */ - <0x00000004 0x00000000>, - /* Reg: pinmux_emac2_usefpga */ - <0x00000008 0x00000000>, - /* Reg: pinmux_i2c0_usefpga */ - <0x0000000c 0x00000000>, - /* Reg: pinmux_i2c1_usefpga */ - <0x00000010 0x00000000>, - /* Reg: pinmux_i2c_emac0_usefpga */ - <0x00000014 0x00000000>, - /* Reg: pinmux_i2c_emac1_usefpga */ - <0x00000018 0x00000000>, - /* Reg: pinmux_i2c_emac2_usefpga */ - <0x0000001c 0x00000000>, - /* Reg: pinmux_nand_usefpga */ - <0x00000020 0x00000000>, - /* Reg: pinmux_qspi_usefpga */ - <0x00000024 0x00000000>, - /* Reg: pinmux_sdmmc_usefpga */ - <0x00000028 0x00000000>, - /* Reg: pinmux_spim0_usefpga */ - <0x0000002c 0x00000000>, - /* Reg: pinmux_spim1_usefpga */ - <0x00000030 0x00000000>, - /* Reg: pinmux_spis0_usefpga */ - <0x00000034 0x00000000>, - /* Reg: pinmux_spis1_usefpga */ - <0x00000038 0x00000000>, - /* Reg: pinmux_uart0_usefpga */ - <0x0000003c 0x00000000>, - /* Reg: pinmux_uart1_usefpga */ - <0x00000040 0x00000000>; - }; - }; - - i_noc: noc@0xffd10000 { - u-boot,dm-pre-reloc; - compatible = "altr,socfpga-a10-noc"; - reg = <0xffd10000 0x00008000>; - reg-names = "mpu_m0"; - - firewall { - u-boot,dm-pre-reloc; - /* - * Driver setting: altera_arria10_soc_noc_arria10_uboot_driver. - * I_NOC.mpu_m0. - * noc_fw_ddr_mpu_fpga2sdram_ddr_scr. - * mpuregion0addr.base - * Driver setting: altera_arria10_soc_noc_arria10_uboot_driver. - * I_NOC.mpu_m0. - * noc_fw_ddr_mpu_fpga2sdram_ddr_scr. - * mpuregion0addr.limit - */ - altr,mpu0 = <0x00000000 0x0000ffff>; - /* - * Driver setting: altera_arria10_soc_noc_arria10_uboot_driver. - * I_NOC.mpu_m0.noc_fw_ddr_l3_ddr_scr. - * hpsregion0addr.base - * Driver setting: altera_arria10_soc_noc_arria10_uboot_driver. - * I_NOC.mpu_m0.noc_fw_ddr_l3_ddr_scr. - * hpsregion0addr.limit - */ - altr,l3-0 = <0x00000000 0x0000ffff>; - /* - * Driver setting: altera_arria10_soc_noc_arria10_uboot_driver. - * I_NOC.mpu_m0. - * noc_fw_ddr_mpu_fpga2sdram_ddr_scr. - * fpga2sdram0region0addr.base - * Driver setting: altera_arria10_soc_noc_arria10_uboot_driver. - * I_NOC.mpu_m0. - * noc_fw_ddr_mpu_fpga2sdram_ddr_scr. - * fpga2sdram0region0addr.limit - */ - altr,fpga2sdram0-0 = <0x00000000 0x0000ffff>; - /* - * Driver setting: altera_arria10_soc_noc_arria10_uboot_driver. - * I_NOC.mpu_m0. - * noc_fw_ddr_mpu_fpga2sdram_ddr_scr. - * fpga2sdram1region0addr.base - * Driver setting: altera_arria10_soc_noc_arria10_uboot_driver. - * I_NOC.mpu_m0. - * noc_fw_ddr_mpu_fpga2sdram_ddr_scr. - * fpga2sdram1region0addr.limit - */ - altr,fpga2sdram1-0 = <0x00000000 0x0000ffff>; - /* - * Driver setting: altera_arria10_soc_noc_arria10_uboot_driver. - * I_NOC.mpu_m0. - * noc_fw_ddr_mpu_fpga2sdram_ddr_scr. - * fpga2sdram2region0addr.base - * Driver setting: altera_arria10_soc_noc_arria10_uboot_driver. - * I_NOC.mpu_m0. - * noc_fw_ddr_mpu_fpga2sdram_ddr_scr. - * fpga2sdram2region0addr.limit - */ - altr,fpga2sdram2-0 = <0x00000000 0x0000ffff>; - }; + fpga2sdram1-0 = <0x00000000 0x0000ffff>; + /* + * Driver setting: altera_arria10_soc_noc_arria10_uboot_driver.I_NOC.mpu_m0.noc_fw_ddr_mpu_fpga2sdram_ddr_scr.fpga2sdram2region0addr.base + * Driver setting: altera_arria10_soc_noc_arria10_uboot_driver.I_NOC.mpu_m0.noc_fw_ddr_mpu_fpga2sdram_ddr_scr.fpga2sdram2region0addr.limit + */ + fpga2sdram2-0 = <0x00000000 0x0000ffff>; }; + }; - hps_fpgabridge0: fpgabridge@0 { - compatible = "altr,socfpga-hps2fpga-bridge"; - altr,init-val = <1>; - }; + hps_fpgabridge0: fpgabridge@0 { + compatible = "altr,socfpga-hps2fpga-bridge"; + init-val = <1>; + }; - hps_fpgabridge1: fpgabridge@1 { - compatible = "altr,socfpga-lwhps2fpga-bridge"; - altr,init-val = <1>; - }; + hps_fpgabridge1: fpgabridge@1 { + compatible = "altr,socfpga-lwhps2fpga-bridge"; + init-val = <1>; + }; - hps_fpgabridge2: fpgabridge@2 { - compatible = "altr,socfpga-fpga2hps-bridge"; - altr,init-val = <1>; - }; + hps_fpgabridge2: fpgabridge@2 { + compatible = "altr,socfpga-fpga2hps-bridge"; + init-val = <1>; + }; - hps_fpgabridge3: fpgabridge@3 { - compatible = "altr,socfpga-fpga2sdram0-bridge"; - altr,init-val = <1>; - }; + hps_fpgabridge3: fpgabridge@3 { + compatible = "altr,socfpga-fpga2sdram0-bridge"; + init-val = <1>; + }; - hps_fpgabridge4: fpgabridge@4 { - compatible = "altr,socfpga-fpga2sdram1-bridge"; - altr,init-val = <0>; - }; + hps_fpgabridge4: fpgabridge@4 { + compatible = "altr,socfpga-fpga2sdram1-bridge"; + init-val = <0>; + }; - hps_fpgabridge5: fpgabridge@5 { - compatible = "altr,socfpga-fpga2sdram2-bridge"; - altr,init-val = <1>; - }; + hps_fpgabridge5: fpgabridge@5 { + compatible = "altr,socfpga-fpga2sdram2-bridge"; + init-val = <1>; }; }; diff --git a/arch/arm/dts/socfpga_stratix10.dtsi b/arch/arm/dts/socfpga_stratix10.dtsi index db8eb7ce7a8..ccd3f32301e 100644 --- a/arch/arm/dts/socfpga_stratix10.dtsi +++ b/arch/arm/dts/socfpga_stratix10.dtsi @@ -80,6 +80,7 @@ device_type = "soc"; interrupt-parent = <&intc>; ranges = <0 0 0 0xffffffff>; + u-boot,dm-pre-reloc; clkmgr@ffd1000 { compatible = "altr,clk-mgr"; @@ -92,7 +93,7 @@ interrupts = <0 90 4>; interrupt-names = "macirq"; mac-address = [00 00 00 00 00 00]; - resets = <&rst EMAC0_RESET>; + resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>; reset-names = "stmmaceth"; status = "disabled"; }; @@ -103,7 +104,7 @@ interrupts = <0 91 4>; interrupt-names = "macirq"; mac-address = [00 00 00 00 00 00]; - resets = <&rst EMAC1_RESET>; + resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>; reset-names = "stmmaceth"; status = "disabled"; }; @@ -114,7 +115,7 @@ interrupts = <0 92 4>; interrupt-names = "macirq"; mac-address = [00 00 00 00 00 00]; - resets = <&rst EMAC2_RESET>; + resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>; reset-names = "stmmaceth"; status = "disabled"; }; @@ -136,6 +137,7 @@ interrupt-controller; #interrupt-cells = <2>; interrupts = <0 110 4>; + bank-name = "porta"; }; }; @@ -156,6 +158,7 @@ interrupt-controller; #interrupt-cells = <2>; interrupts = <0 111 4>; + bank-name = "portb"; }; }; @@ -166,6 +169,7 @@ reg = <0xffc02800 0x100>; interrupts = <0 103 4>; resets = <&rst I2C0_RESET>; + reset-names = "i2c"; status = "disabled"; }; @@ -176,6 +180,7 @@ reg = <0xffc02900 0x100>; interrupts = <0 104 4>; resets = <&rst I2C1_RESET>; + reset-names = "i2c"; status = "disabled"; }; @@ -186,6 +191,7 @@ reg = <0xffc02a00 0x100>; interrupts = <0 105 4>; resets = <&rst I2C2_RESET>; + reset-names = "i2c"; status = "disabled"; }; @@ -196,6 +202,7 @@ reg = <0xffc02b00 0x100>; interrupts = <0 106 4>; resets = <&rst I2C3_RESET>; + reset-names = "i2c"; status = "disabled"; }; @@ -206,6 +213,7 @@ reg = <0xffc02c00 0x100>; interrupts = <0 107 4>; resets = <&rst I2C4_RESET>; + reset-names = "i2c"; status = "disabled"; }; @@ -216,8 +224,8 @@ reg = <0xff808000 0x1000>; interrupts = <0 96 4>; fifo-depth = <0x400>; - resets = <&rst SDMMC_RESET>; - reset-names = "reset"; + resets = <&rst SDMMC_RESET>, <&rst SDMMC_OCP_RESET>; + u-boot,dm-pre-reloc; status = "disabled"; }; @@ -231,6 +239,7 @@ compatible = "altr,rst-mgr"; reg = <0xffd11000 0x1000>; altr,modrst-offset = <0x20>; + u-boot,dm-pre-reloc; }; spi0: spi@ffda4000 { @@ -304,6 +313,8 @@ reg-shift = <2>; reg-io-width = <4>; resets = <&rst UART0_RESET>; + clock-frequency = <100000000>; + u-boot,dm-pre-reloc; status = "disabled"; }; @@ -350,6 +361,7 @@ reg = <0xffd00200 0x100>; interrupts = <0 117 4>; resets = <&rst WATCHDOG0_RESET>; + u-boot,dm-pre-reloc; status = "disabled"; }; diff --git a/arch/arm/dts/socfpga_stratix10_socdk.dts b/arch/arm/dts/socfpga_stratix10_socdk.dts index d5f43a23e7e..c6ab0ae9923 100644 --- a/arch/arm/dts/socfpga_stratix10_socdk.dts +++ b/arch/arm/dts/socfpga_stratix10_socdk.dts @@ -78,8 +78,11 @@ &mmc { status = "okay"; cap-sd-highspeed; + cap-mmc-highspeed; broken-cd; bus-width = <4>; + drvsel = <3>; + smplsel = <0>; }; &uart0 { diff --git a/arch/arm/dts/stm32f429-disco-u-boot.dtsi b/arch/arm/dts/stm32f429-disco-u-boot.dtsi index 8a0f642a937..10e09508aa2 100644 --- a/arch/arm/dts/stm32f429-disco-u-boot.dtsi +++ b/arch/arm/dts/stm32f429-disco-u-boot.dtsi @@ -37,6 +37,8 @@ clocks = <&rcc 0 STM32F4_AHB3_CLOCK(FMC)>; pinctrl-0 = <&fmc_pins>; pinctrl-names = "default"; + st,syscfg = <&syscfg>; + st,swp_fmc = <1>; u-boot,dm-pre-reloc; /* diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi index 8581df9a277..afa7832f893 100644 --- a/arch/arm/dts/stm32f746.dtsi +++ b/arch/arm/dts/stm32f746.dtsi @@ -88,10 +88,11 @@ #address-cells = <1>; #size-cells = <0>; reg = <0xA0001000 0x1000>, <0x90000000 0x10000000>; - reg-names = "QuadSPI", "QuadSPI-memory"; + reg-names = "qspi", "qspi_mm"; interrupts = <92>; spi-max-frequency = <108000000>; clocks = <&rcc 0 STM32F7_AHB3_CLOCK(QSPI)>; + resets = <&rcc STM32F7_AHB3_RESET(QSPI)>; status = "disabled"; }; usart1: serial@40011000 { diff --git a/arch/arm/dts/sun50i-a64-amarula-relic.dts b/arch/arm/dts/sun50i-a64-amarula-relic.dts new file mode 100644 index 00000000000..f3b4e93ece6 --- /dev/null +++ b/arch/arm/dts/sun50i-a64-amarula-relic.dts @@ -0,0 +1,65 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2018 Amarula Solutions B.V. + * Author: Jagan Teki <jagan@amarulasolutions.com> + */ + +/dts-v1/; + +#include "sun50i-a64.dtsi" + +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "Amarula A64-Relic"; + compatible = "amarula,a64-relic", "allwinner,sun50i-a64"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reg_vcc3v3: vcc3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; +}; + +&ehci0 { + status = "okay"; +}; + +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_pins>; + vmmc-supply = <®_vcc3v3>; + bus-width = <8>; + non-removable; + cap-mmc-hw-reset; + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usbphy { + usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */ + status = "okay"; +}; diff --git a/arch/arm/dts/sun50i-a64-bananapi-m64.dts b/arch/arm/dts/sun50i-a64-bananapi-m64.dts index 02db114113b..dcde4a48816 100644 --- a/arch/arm/dts/sun50i-a64-bananapi-m64.dts +++ b/arch/arm/dts/sun50i-a64-bananapi-m64.dts @@ -68,6 +68,14 @@ }; }; +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + &i2c1 { pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins>; @@ -108,6 +116,14 @@ status = "okay"; }; +&ohci0 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; @@ -119,3 +135,13 @@ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; status = "okay"; }; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usbphy { + usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */ + status = "okay"; +}; diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts index d1c347d2b86..a65300d5aa5 100644 --- a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts +++ b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts @@ -50,6 +50,11 @@ model = "OrangePi PC 2"; compatible = "xunlong,orangepi-pc-2", "allwinner,sun50i-h5"; + aliases { + serial0 = &uart0; + ethernet0 = &emac; + }; + chosen { stdout-path = "serial0:115200n8"; }; @@ -58,11 +63,6 @@ reg = <0x40000000 0x40000000>; }; - aliases { - serial0 = &uart0; - ethernet0 = &emac; - }; - soc { reg_vcc3v3: vcc3v3 { compatible = "regulator-fixed"; @@ -73,6 +73,29 @@ }; }; +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&emac_rgmii_pins>; + phy-mode = "rgmii"; + phy-handle = <&ext_rgmii_phy>; + status = "okay"; +}; + +&external_mdio { + ext_rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; +}; + &mmc0 { compatible = "allwinner,sun50i-h5-mmc", "allwinner,sun50i-a64-mmc", @@ -86,13 +109,7 @@ status = "okay"; }; -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins_a>; - status = "okay"; -}; - -&usbphy { +&ohci0 { status = "okay"; }; @@ -100,21 +117,17 @@ status = "okay"; }; -&ehci1 { +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; status = "okay"; }; -&emac { - pinctrl-names = "default"; - pinctrl-0 = <&emac_rgmii_pins>; - phy-mode = "rgmii"; - phy-handle = <&ext_rgmii_phy>; +&usb_otg { + dr_mode = "otg"; status = "okay"; }; -&external_mdio { - ext_rgmii_phy: ethernet-phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <1>; - }; +&usbphy { + status = "okay"; }; diff --git a/arch/arm/dts/sun50i-h5-orangepi-prime.dts b/arch/arm/dts/sun50i-h5-orangepi-prime.dts index d4577dfae15..131d8058c47 100644 --- a/arch/arm/dts/sun50i-h5-orangepi-prime.dts +++ b/arch/arm/dts/sun50i-h5-orangepi-prime.dts @@ -72,6 +72,10 @@ }; }; +&ehci0 { + status = "okay"; +}; + &ehci1 { status = "okay"; }; @@ -89,6 +93,10 @@ status = "okay"; }; +&ohci0 { + status = "okay"; +}; + &ohci1 { status = "okay"; }; @@ -99,6 +107,11 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { status = "okay"; }; diff --git a/arch/arm/dts/sun8i-a83t.dtsi b/arch/arm/dts/sun8i-a83t.dtsi index bab6c1812b8..2953e0fdac7 100644 --- a/arch/arm/dts/sun8i-a83t.dtsi +++ b/arch/arm/dts/sun8i-a83t.dtsi @@ -230,13 +230,29 @@ reg = <0x01c19000 0x400>; interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "mc"; + phys = <&usbphy 0>; + phy-names = "usb"; status = "disabled"; }; + usbphy: phy@1c19400 { + compatible = "allwinner,sun8i-a83t-usb-phy"; + reg = <0x01c19400 0x10>, + <0x01c1a800 0x14>, + <0x01c1b800 0x14>; + reg-names = "phy_ctrl", + "pmu1", + "pmu2"; + status = "disabled"; + #phy-cells = <1>; + }; + ehci0: usb@01c1a000 { compatible = "allwinner,sun8i-a83t-ehci", "generic-ehci"; reg = <0x01c1a000 0x100>; interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; + phys = <&usbphy 1>; + phy-names = "usb"; status = "disabled"; }; @@ -244,6 +260,8 @@ compatible = "allwinner,sun8i-a83t-ohci", "generic-ohci"; reg = <0x01c1a400 0x100>; interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; + phys = <&usbphy 1>; + phy-names = "usb"; status = "disabled"; }; @@ -251,6 +269,8 @@ compatible = "allwinner,sun8i-a83t-ehci", "generic-ehci"; reg = <0x01c1b000 0x100>; interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; + phys = <&usbphy 2>; + phy-names = "usb"; status = "disabled"; }; diff --git a/arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts index f3b1d5f6dbd..e766aa3e2fe 100644 --- a/arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts +++ b/arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts @@ -93,6 +93,10 @@ }; }; +&ehci0 { + status = "okay"; +}; + &ehci1 { status = "okay"; }; @@ -146,6 +150,10 @@ status = "okay"; }; +&ohci0 { + status = "okay"; +}; + &ohci1 { status = "okay"; }; @@ -189,6 +197,11 @@ status = "okay"; }; +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + &usbphy { /* USB VBUS is on as long as VCC-IO is on */ status = "okay"; diff --git a/arch/arm/dts/sun8i-h3.dtsi b/arch/arm/dts/sun8i-h3.dtsi index d9d31fa3f50..1df6ca4f31b 100644 --- a/arch/arm/dts/sun8i-h3.dtsi +++ b/arch/arm/dts/sun8i-h3.dtsi @@ -219,6 +219,19 @@ #size-cells = <0>; }; + usb_otg: usb@1c19000 { + compatible = "allwinner,sun8i-h3-musb"; + reg = <0x01c19000 0x400>; + clocks = <&ccu CLK_BUS_OTG>; + resets = <&ccu RST_BUS_OTG>; + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "mc"; + phys = <&usbphy 0>; + phy-names = "usb"; + extcon = <&usbphy 0>; + status = "disabled"; + }; + usbphy: phy@01c19400 { compatible = "allwinner,sun8i-h3-usb-phy"; reg = <0x01c19400 0x2c>, @@ -251,6 +264,25 @@ #phy-cells = <1>; }; + ehci0: usb@1c1a000 { + compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; + reg = <0x01c1a000 0x100>; + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>; + resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>; + status = "disabled"; + }; + + ohci0: usb@1c1a400 { + compatible = "allwinner,sun8i-h3-ohci", "generic-ohci"; + reg = <0x01c1a400 0x100>; + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>, + <&ccu CLK_USB_OHCI0>; + resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>; + status = "disabled"; + }; + ehci1: usb@01c1b000 { compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; reg = <0x01c1b000 0x100>; diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi index 72e95afd780..5adfd9bca2e 100644 --- a/arch/arm/dts/sunxi-u-boot.dtsi +++ b/arch/arm/dts/sunxi-u-boot.dtsi @@ -1,14 +1,5 @@ #include <config.h> -/* - * This is the maximum size the U-Boot binary can be, which is basically - * the start of the environment, minus the start of the U-Boot binary in - * the MMC. This makes the assumption that the MMC is using 512-bytes - * blocks, but devices using something other than that remains to be - * seen. - */ -#define UBOOT_MMC_MAX_SIZE (CONFIG_ENV_OFFSET - (CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)) - / { binman { filename = "u-boot-sunxi-with-spl.bin"; @@ -17,9 +8,6 @@ filename = "spl/sunxi-spl.bin"; }; u-boot-img { -#ifdef CONFIG_MMC - size = <UBOOT_MMC_MAX_SIZE>; -#endif pos = <CONFIG_SPL_PAD_TO>; }; }; diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi index bf3118eca3c..e7514f01fa0 100644 --- a/arch/arm/dts/uniphier-ld11.dtsi +++ b/arch/arm/dts/uniphier-ld11.dtsi @@ -418,7 +418,7 @@ mmc-ddr-1_8v; mmc-hs200-1_8v; mmc-pwrseq = <&emmc_pwrseq>; - cdns,phy-input-delay-legacy = <4>; + cdns,phy-input-delay-legacy = <9>; cdns,phy-input-delay-mmc-highspeed = <2>; cdns,phy-input-delay-mmc-ddr = <3>; cdns,phy-dll-delay-sdclk = <21>; @@ -553,10 +553,13 @@ status = "disabled"; reg = <0x65000000 0x8500>; interrupts = <0 66 4>; + clock-names = "ether"; clocks = <&sys_clk 6>; + reset-names = "ether"; resets = <&sys_rst 6>; - phy-mode = "rmii"; + phy-mode = "internal"; local-mac-address = [00 00 00 00 00 00]; + socionext,syscon-phy-mode = <&soc_glue 0>; mdio: mdio { #address-cells = <1>; diff --git a/arch/arm/dts/uniphier-ld20-ref.dts b/arch/arm/dts/uniphier-ld20-ref.dts index 2c1a92fafbf..440c2e6a638 100644 --- a/arch/arm/dts/uniphier-ld20-ref.dts +++ b/arch/arm/dts/uniphier-ld20-ref.dts @@ -67,3 +67,11 @@ reg = <0>; }; }; + +&pinctrl_ether_rgmii { + tx { + pins = "RGMII_TXCLK", "RGMII_TXD0", "RGMII_TXD1", + "RGMII_TXD2", "RGMII_TXD3", "RGMII_TXCTL"; + drive-strength = <9>; + }; +}; diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi index b993df8a34a..31bc124dfca 100644 --- a/arch/arm/dts/uniphier-ld20.dtsi +++ b/arch/arm/dts/uniphier-ld20.dtsi @@ -523,7 +523,7 @@ mmc-ddr-1_8v; mmc-hs200-1_8v; mmc-pwrseq = <&emmc_pwrseq>; - cdns,phy-input-delay-legacy = <4>; + cdns,phy-input-delay-legacy = <9>; cdns,phy-input-delay-mmc-highspeed = <2>; cdns,phy-input-delay-mmc-ddr = <3>; cdns,phy-dll-delay-sdclk = <21>; @@ -622,10 +622,13 @@ interrupts = <0 66 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ether_rgmii>; + clock-names = "ether"; clocks = <&sys_clk 6>; + reset-names = "ether"; resets = <&sys_rst 6>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; + socionext,syscon-phy-mode = <&soc_glue 0>; mdio: mdio { #address-cells = <1>; diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi index 25c4b4f8fc0..00048635894 100644 --- a/arch/arm/dts/uniphier-pro4.dtsi +++ b/arch/arm/dts/uniphier-pro4.dtsi @@ -342,7 +342,7 @@ has-transaction-translator; }; - soc-glue@5f800000 { + soc_glue: soc-glue@5f800000 { compatible = "socionext,uniphier-pro4-soc-glue", "simple-mfd", "syscon"; reg = <0x5f800000 0x2000>; @@ -427,10 +427,14 @@ interrupts = <0 66 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ether_rgmii>; - clocks = <&sys_clk 6>; - resets = <&sys_rst 6>; + clock-names = "gio", "ether", "ether-gb", "ether-phy"; + clocks = <&sys_clk 12>, <&sys_clk 6>, <&sys_clk 7>, + <&sys_clk 10>; + reset-names = "gio", "ether"; + resets = <&sys_rst 12>, <&sys_rst 6>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; + socionext,syscon-phy-mode = <&soc_glue 0>; mdio: mdio { #address-cells = <1>; diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi index 9760f79e7ce..20f39351073 100644 --- a/arch/arm/dts/uniphier-pxs2.dtsi +++ b/arch/arm/dts/uniphier-pxs2.dtsi @@ -545,10 +545,13 @@ interrupts = <0 66 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ether_rgmii>; + clock-names = "ether"; clocks = <&sys_clk 6>; + reset-names = "ether"; resets = <&sys_rst 6>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; + socionext,syscon-phy-mode = <&soc_glue 0>; mdio: mdio { #address-cells = <1>; diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi index d4c458a2111..ae867cbb0ac 100644 --- a/arch/arm/dts/uniphier-pxs3.dtsi +++ b/arch/arm/dts/uniphier-pxs3.dtsi @@ -338,7 +338,7 @@ mmc-ddr-1_8v; mmc-hs200-1_8v; mmc-pwrseq = <&emmc_pwrseq>; - cdns,phy-input-delay-legacy = <4>; + cdns,phy-input-delay-legacy = <9>; cdns,phy-input-delay-mmc-highspeed = <2>; cdns,phy-input-delay-mmc-ddr = <3>; cdns,phy-dll-delay-sdclk = <21>; @@ -430,10 +430,13 @@ interrupts = <0 66 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ether_rgmii>; + clock-names = "ether"; clocks = <&sys_clk 6>; + reset-names = "ether"; resets = <&sys_rst 6>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; + socionext,syscon-phy-mode = <&soc_glue 0>; mdio0: mdio { #address-cells = <1>; @@ -448,10 +451,13 @@ interrupts = <0 67 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ether1_rgmii>; + clock-names = "ether"; clocks = <&sys_clk 7>; + reset-names = "ether"; resets = <&sys_rst 7>; phy-mode = "rgmii"; local-mac-address = [00 00 00 00 00 00]; + socionext,syscon-phy-mode = <&soc_glue 1>; mdio1: mdio { #address-cells = <1>; diff --git a/arch/arm/dts/zynq-minized.dts b/arch/arm/dts/zynq-minized.dts new file mode 100644 index 00000000000..525921ee7ba --- /dev/null +++ b/arch/arm/dts/zynq-minized.dts @@ -0,0 +1,106 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * dts file for Avnet MiniZed board + * + * (C) Copyright 2017 - 2018, Xilinx, Inc. + * + * Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> + */ + +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + model = "Avnet Zynq MiniZed Development Board"; + compatible = "avnet,minized", "xlnx,zynq-7000"; + + aliases { + serial0 = &uart1; + serial1 = &uart0; + spi0 = &qspi; + mmc0 = &sdhci0; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x20000000>; + }; + + chosen { + bootargs = ""; + stdout-path = "serial0:115200n8"; + }; + + usb_phy0: phy0 { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + }; +}; + +&qspi { + status = "okay"; + is-dual = <0>; + num-cs = <1>; + flash@0 { + compatible = "micron,m25p128"; + reg = <0x0>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + spi-max-frequency = <50000000>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "boot"; + reg = <0x0 0xff0000>; + }; + + partition@270000 { + label = "kernel"; + reg = <0x270000 0xd80000>; + }; + + partition@ff0000 { + label = "bootenv"; + reg = <0xff0000 0x10000>; + }; + + partition@1000000 { + label = "spare"; + reg = <0x1000000 0x0>; + }; + }; + }; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + u-boot,dm-pre-reloc; + status = "okay"; +}; + +&usb0 { + status = "okay"; + dr_mode = "host"; + usb-phy = <&usb_phy0>; + usb-reset = <&gpio0 7 0>; /* USB_RST_N-MIO7 */ +}; + +&sdhci1 { + status = "okay"; + non-removable; + bus-width = <4>; + max-frequency = <12000000>; + + #address-cells = <1>; + #size-cells = <0>; + mmccard: mmccard@0 { + compatible = "mmc-card"; + reg = <0>; + broken-hpi; + }; +}; diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi index b18d8d19c30..247a35f9219 100644 --- a/arch/arm/dts/zynqmp-clk-ccf.dtsi +++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi @@ -248,6 +248,22 @@ clocks = <&clkc 59>, <&clkc 31>; }; +&ttc0 { + clocks = <&clkc 31>; +}; + +&ttc1 { + clocks = <&clkc 31>; +}; + +&ttc2 { + clocks = <&clkc 31>; +}; + +&ttc3 { + clocks = <&clkc 31>; +}; + &uart0 { clocks = <&clkc 56>, <&clkc 31>; }; diff --git a/arch/arm/dts/zynqmp-zcu100-revC.dts b/arch/arm/dts/zynqmp-zcu100-revC.dts index bcd9c3958ff..c6aaa08a004 100644 --- a/arch/arm/dts/zynqmp-zcu100-revC.dts +++ b/arch/arm/dts/zynqmp-zcu100-revC.dts @@ -252,7 +252,6 @@ &sdhci0 { status = "okay"; no-1-8-v; - broken-cd; /* CD has to be enabled by default */ disable-wp; xlnx,mio_bank = <0>; }; diff --git a/arch/arm/dts/zynqmp-zcu104-revA.dts b/arch/arm/dts/zynqmp-zcu104-revA.dts index a0e13d8dc5b..6a4b701ab81 100644 --- a/arch/arm/dts/zynqmp-zcu104-revA.dts +++ b/arch/arm/dts/zynqmp-zcu104-revA.dts @@ -130,9 +130,9 @@ #address-cells = <1>; #size-cells = <0>; reg = <4>; - tca6416_u97: gpio@21 { + tca6416_u97: gpio@20 { compatible = "ti,tca6416"; - reg = <0x21>; + reg = <0x20>; gpio-controller; #gpio-cells = <2>; /* diff --git a/arch/arm/dts/zynqmp-zcu104-revC.dts b/arch/arm/dts/zynqmp-zcu104-revC.dts index 6e3cf5a97f3..fe742b894b8 100644 --- a/arch/arm/dts/zynqmp-zcu104-revC.dts +++ b/arch/arm/dts/zynqmp-zcu104-revC.dts @@ -74,9 +74,9 @@ status = "okay"; clock-frequency = <400000>; - tca6416_u97: gpio@21 { + tca6416_u97: gpio@20 { compatible = "ti,tca6416"; - reg = <0x21>; + reg = <0x20>; gpio-controller; #gpio-cells = <2>; /* @@ -145,10 +145,15 @@ }; }; - i2c@4 { + i2c@3 { #address-cells = <1>; #size-cells = <0>; - reg = <4>; + reg = <3>; + ina226@40 { /* u183 */ + compatible = "ti,ina226"; + reg = <0x40>; + shunt-resistor = <5000>; + }; }; i2c@5 { @@ -163,7 +168,7 @@ reg = <7>; }; - /* 3, 6 not connected */ + /* 4, 6 not connected */ }; }; diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts index 4002d788061..aa9055b7152 100644 --- a/arch/arm/dts/zynqmp-zcu111-revA.dts +++ b/arch/arm/dts/zynqmp-zcu111-revA.dts @@ -500,6 +500,7 @@ &sdhci1 { status = "okay"; no-1-8-v; + disable-wp; xlnx,mio_bank = <1>; }; diff --git a/arch/arm/include/asm/arch-mx31/clock.h b/arch/arm/include/asm/arch-mx31/clock.h index e340db42fad..aafc2d690ef 100644 --- a/arch/arm/include/asm/arch-mx31/clock.h +++ b/arch/arm/include/asm/arch-mx31/clock.h @@ -9,17 +9,9 @@ #include <common.h> -#ifdef CONFIG_MX31_HCLK_FREQ #define MXC_HCLK CONFIG_MX31_HCLK_FREQ -#else -#define MXC_HCLK 26000000 -#endif -#ifdef CONFIG_MX31_CLK32 #define MXC_CLK32 CONFIG_MX31_CLK32 -#else -#define MXC_CLK32 32768 -#endif enum mxc_clock { MXC_ARM_CLK, diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h index 27a0da938c8..8acf79fbba3 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h @@ -270,21 +270,27 @@ struct sunxi_ccm_reg { #define AXI_GATE_OFFSET_DRAM 0 /* ahb_gate0 offsets */ -#define AHB_GATE_OFFSET_USB_OHCI1 30 -#define AHB_GATE_OFFSET_USB_OHCI0 29 #ifdef CONFIG_MACH_SUNXI_H3_H5 /* * These are EHCI1 - EHCI3 in the datasheet (EHCI0 is for the OTG) we call * them 0 - 2 like they were called on older SoCs. */ +#define AHB_GATE_OFFSET_USB_OHCI0 28 #define AHB_GATE_OFFSET_USB_EHCI2 27 #define AHB_GATE_OFFSET_USB_EHCI1 26 +#define AHB_GATE_OFFSET_USB_EHCI0 24 +#elif defined(CONFIG_MACH_SUN50I) +#define AHB_GATE_OFFSET_USB_OHCI0 29 #define AHB_GATE_OFFSET_USB_EHCI0 25 #else +#define AHB_GATE_OFFSET_USB_OHCI1 30 +#define AHB_GATE_OFFSET_USB_OHCI0 29 #define AHB_GATE_OFFSET_USB_EHCI1 27 #define AHB_GATE_OFFSET_USB_EHCI0 26 #endif -#ifndef CONFIG_MACH_SUN8I_R40 +#ifdef CONFIG_MACH_SUN50I +#define AHB_GATE_OFFSET_USB0 23 +#elif !defined(CONFIG_MACH_SUN8I_R40) #define AHB_GATE_OFFSET_USB0 24 #else #define AHB_GATE_OFFSET_USB0 25 @@ -344,13 +350,10 @@ struct sunxi_ccm_reg { #define CCM_USB_CTRL_PHY2_CLK (0x1 << 10) #define CCM_USB_CTRL_PHY3_CLK (0x1 << 11) #ifdef CONFIG_MACH_SUNXI_H3_H5 -/* - * These are OHCI1 - OHCI3 in the datasheet (OHCI0 is for the OTG) we call - * them 0 - 2 like they were called on older SoCs. - */ -#define CCM_USB_CTRL_OHCI0_CLK (0x1 << 17) -#define CCM_USB_CTRL_OHCI1_CLK (0x1 << 18) -#define CCM_USB_CTRL_OHCI2_CLK (0x1 << 19) +#define CCM_USB_CTRL_OHCI0_CLK (0x1 << 16) +#define CCM_USB_CTRL_OHCI1_CLK (0x1 << 17) +#define CCM_USB_CTRL_OHCI2_CLK (0x1 << 18) +#define CCM_USB_CTRL_OHCI3_CLK (0x1 << 19) #else #define CCM_USB_CTRL_OHCI0_CLK (0x1 << 16) #define CCM_USB_CTRL_OHCI1_CLK (0x1 << 17) diff --git a/arch/arm/include/asm/arch-sunxi/usb_phy.h b/arch/arm/include/asm/arch-sunxi/usb_phy.h deleted file mode 100644 index 39e7af45dd9..00000000000 --- a/arch/arm/include/asm/arch-sunxi/usb_phy.h +++ /dev/null @@ -1,20 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Sunxi usb-phy code - * - * Copyright (C) 2015 Hans de Goede <hdegoede@redhat.com> - * Copyright (C) 2014 Roman Byshko <rbyshko@gmail.com> - * - * Based on code from - * Allwinner Technology Co., Ltd. <www.allwinnertech.com> - */ - -int sunxi_usb_phy_probe(void); -int sunxi_usb_phy_remove(void); -void sunxi_usb_phy_init(int index); -void sunxi_usb_phy_exit(int index); -void sunxi_usb_phy_power_on(int index); -void sunxi_usb_phy_power_off(int index); -int sunxi_usb_phy_vbus_detect(int index); -int sunxi_usb_phy_id_detect(int index); -void sunxi_usb_phy_enable_squelch_detect(int index, int enable); diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h index dfd6097b4be..8a505edab3c 100644 --- a/arch/arm/include/asm/arch-zynqmp/hardware.h +++ b/arch/arm/include/asm/arch-zynqmp/hardware.h @@ -17,9 +17,6 @@ #define ARASAN_NAND_BASEADDR 0xFF100000 -#define ZYNQMP_USB0_XHCI_BASEADDR 0xFE200000 -#define ZYNQMP_USB1_XHCI_BASEADDR 0xFE300000 - #define ZYNQMP_TCM_BASE_ADDR 0xFFE00000 #define ZYNQMP_TCM_SIZE 0x40000 @@ -33,6 +30,14 @@ #define PS_MODE2 BIT(2) #define PS_MODE3 BIT(3) +#define RESET_REASON_DEBUG_SYS BIT(6) +#define RESET_REASON_SOFT BIT(5) +#define RESET_REASON_SRST BIT(4) +#define RESET_REASON_PSONLY BIT(3) +#define RESET_REASON_PMU BIT(2) +#define RESET_REASON_INTERNAL BIT(1) +#define RESET_REASON_EXTERNAL BIT(0) + struct crlapb_regs { u32 reserved0[36]; u32 cpu_r5_ctrl; /* 0x90 */ @@ -40,7 +45,9 @@ struct crlapb_regs { u32 timestamp_ref_ctrl; /* 0x128 */ u32 reserved2[53]; u32 boot_mode; /* 0x200 */ - u32 reserved3[14]; + u32 reserved3_0[7]; + u32 reset_reason; /* 0x220 */ + u32 reserved3_1[6]; u32 rst_lpd_top; /* 0x23C */ u32 reserved4[4]; u32 boot_pin_ctrl; /* 0x250 */ @@ -123,8 +130,6 @@ struct apu_regs { /* Board version value */ #define ZYNQMP_CSU_BASEADDR 0xFFCA0000 #define ZYNQMP_CSU_VERSION_SILICON 0x0 -#define ZYNQMP_CSU_VERSION_EP108 0x1 -#define ZYNQMP_CSU_VERSION_VELOCE 0x2 #define ZYNQMP_CSU_VERSION_QEMU 0x3 #define ZYNQMP_CSU_VERSION_EMPTY_SHIFT 20 diff --git a/arch/arm/include/asm/arch-zynqmp/sys_proto.h b/arch/arm/include/asm/arch-zynqmp/sys_proto.h index 6056bc6c0c5..773b930512b 100644 --- a/arch/arm/include/asm/arch-zynqmp/sys_proto.h +++ b/arch/arm/include/asm/arch-zynqmp/sys_proto.h @@ -13,8 +13,14 @@ #define ZYNQMP_SIP_SVC_PM_SECURE_IMG_LOAD 0xC200002D #define KEY_PTR_LEN 32 +#define ZYNQMP_FPGA_BIT_AUTH_DDR 1 +#define ZYNQMP_FPGA_BIT_AUTH_OCM 2 +#define ZYNQMP_FPGA_BIT_ENC_USR_KEY 3 +#define ZYNQMP_FPGA_BIT_ENC_DEV_KEY 4 #define ZYNQMP_FPGA_BIT_NS 5 +#define ZYNQMP_FPGA_AUTH_DDR 1 + enum { IDCODE, VERSION, diff --git a/arch/arm/include/asm/u-boot-arm.h b/arch/arm/include/asm/u-boot-arm.h index 01c3ba87c3f..cc828c45045 100644 --- a/arch/arm/include/asm/u-boot-arm.h +++ b/arch/arm/include/asm/u-boot-arm.h @@ -37,7 +37,6 @@ int arch_early_init_r(void); /* board/.../... */ int board_init(void); -void board_quiesce_devices(void); /* cpu/.../interrupt.c */ int arch_interrupt_init (void); diff --git a/arch/arm/lib/interrupts.c b/arch/arm/lib/interrupts.c index 28ba3f14f36..930b25ccb81 100644 --- a/arch/arm/lib/interrupts.c +++ b/arch/arm/lib/interrupts.c @@ -56,6 +56,30 @@ static void show_efi_loaded_images(struct pt_regs *regs) efi_print_image_infos((void *)instruction_pointer(regs)); } +static void dump_instr(struct pt_regs *regs) +{ + unsigned long addr = instruction_pointer(regs); + const int thumb = thumb_mode(regs); + const int width = thumb ? 4 : 8; + int i; + + if (thumb) + addr &= ~1L; + else + addr &= ~3L; + printf("Code: "); + for (i = -4; i < 1 + !!thumb; i++) { + unsigned int val; + + if (thumb) + val = ((u16 *)addr)[i]; + else + val = ((u32 *)addr)[i]; + printf(i == 0 ? "(%0*x) " : "%0*x ", width, val); + } + printf("\n"); +} + void show_regs (struct pt_regs *regs) { unsigned long __maybe_unused flags; @@ -96,6 +120,7 @@ void show_regs (struct pt_regs *regs) fast_interrupts_enabled (regs) ? "on" : "off", processor_modes[processor_mode (regs)], thumb_mode (regs) ? " (T)" : ""); + dump_instr(regs); } /* fixup PC to point to the instruction leading to the exception */ diff --git a/arch/arm/mach-at91/spl.c b/arch/arm/mach-at91/spl.c index 7cba3825e7f..8bfb2a452b5 100644 --- a/arch/arm/mach-at91/spl.c +++ b/arch/arm/mach-at91/spl.c @@ -11,9 +11,7 @@ #include <asm/arch/clk.h> #include <spl.h> -#if defined(CONFIG_AT91SAM9_WATCHDOG) -void at91_disable_wdt(void) { } -#else +#if !defined(CONFIG_AT91SAM9_WATCHDOG) void at91_disable_wdt(void) { struct at91_wdt *wdt = (struct at91_wdt *)ATMEL_BASE_WDT; diff --git a/arch/arm/mach-at91/spl_at91.c b/arch/arm/mach-at91/spl_at91.c index d701c3586d3..8c368042a6b 100644 --- a/arch/arm/mach-at91/spl_at91.c +++ b/arch/arm/mach-at91/spl_at91.c @@ -76,7 +76,9 @@ void __weak spl_board_init(void) void board_init_f(ulong dummy) { lowlevel_clock_init(); +#if !defined(CONFIG_AT91SAM9_WATCHDOG) at91_disable_wdt(); +#endif /* * At this stage the main oscillator is supposed to be enabled diff --git a/arch/arm/mach-at91/spl_atmel.c b/arch/arm/mach-at91/spl_atmel.c index 11db1e5f8cf..597ff8c0367 100644 --- a/arch/arm/mach-at91/spl_atmel.c +++ b/arch/arm/mach-at91/spl_atmel.c @@ -98,8 +98,10 @@ void board_init_f(ulong dummy) configure_2nd_sram_as_l2_cache(); #endif +#if !defined(CONFIG_AT91SAM9_WATCHDOG) /* disable watchdog */ at91_disable_wdt(); +#endif /* PMC configuration */ at91_pmc_init(); diff --git a/arch/arm/mach-imx/mx3/Kconfig b/arch/arm/mach-imx/mx3/Kconfig new file mode 100644 index 00000000000..6cc970fc499 --- /dev/null +++ b/arch/arm/mach-imx/mx3/Kconfig @@ -0,0 +1,34 @@ +if ARCH_MX31 + +config MX31 + bool + default y +choice + prompt "MX31 board select" + optional + +config TARGET_MX31PDK + bool "Support the i.MX31 PDK board from Freescale/NXP" + select BOARD_LATE_INIT + select SUPPORT_SPL + select BOARD_EARLY_INIT_F + +endchoice + +config MX31_HCLK_FREQ + int "i.MX31 HCLK frequency" + default 26000000 + help + Frequency in Hz of the high frequency input clock. Typically + 26000000 Hz. + +config MX31_CLK32 + int "i.MX31 CLK32 Frequency" + default 32768 + help + Frequency in Hz of the low frequency input clock. Typically + 32768 or 32000 Hz. + +source "board/freescale/mx31pdk/Kconfig" + +endif diff --git a/arch/arm/mach-imx/mx5/Kconfig b/arch/arm/mach-imx/mx5/Kconfig index 3ce6bcfc889..06322b2aaac 100644 --- a/arch/arm/mach-imx/mx5/Kconfig +++ b/arch/arm/mach-imx/mx5/Kconfig @@ -16,6 +16,17 @@ choice prompt "MX5 board select" optional +config TARGET_KP_IMX53 + bool "Support K+P imx53 board" + select BOARD_LATE_INIT + select MX53 + select DM + select DM_SERIAL + select DM_ETH + select DM_I2C + select DM_GPIO + select DM_PMIC + config TARGET_M53EVK bool "Support m53evk" select MX53 @@ -79,6 +90,7 @@ source "board/freescale/mx53loco/Kconfig" source "board/freescale/mx53smd/Kconfig" source "board/ge/mx53ppd/Kconfig" source "board/inversepath/usbarmory/Kconfig" +source "board/k+p/kp_imx53/Kconfig" source "board/technologic/ts4800/Kconfig" endif diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index 98ea1f566c4..521fad74b5a 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -5,6 +5,7 @@ config MX6_SMP select ARM_ERRATA_761320 select ARM_ERRATA_794072 select ARM_ERRATA_845369 + select MP bool config MX6 @@ -167,18 +168,8 @@ config TARGET_EMBESTMX6BOARDS bool "embestmx6boards" select BOARD_LATE_INIT -config TARGET_GE_B450V3 - bool "General Electric B450v3" - select BOARD_LATE_INIT - select MX6Q - -config TARGET_GE_B650V3 - bool "General Electric B650v3" - select BOARD_LATE_INIT - select MX6Q - -config TARGET_GE_B850V3 - bool "General Electric B850v3" +config TARGET_GE_BX50V3 + bool "General Electric Bx50v3" select BOARD_LATE_INIT select MX6Q @@ -229,6 +220,37 @@ config TARGET_MX6MEMCAL config TARGET_MX6QARM2 bool "mx6qarm2" +config TARGET_MX6DL_MAMOJ + bool "Support BTicino Mamoj" + select MX6QDL + select OF_CONTROL + select PINCTRL + select DM + select DM_ETH + select DM_GPIO + select DM_I2C + select DM_MMC + select DM_PMIC + select DM_PMIC_PFUZE100 + select DM_THERMAL + select SPL + select SUPPORT_SPL + select SPL_DM if SPL + select SPL_OF_LIBFDT if SPL + select SPL_OF_CONTROL if SPL + select SPL_PINCTRL if SPL + select SPL_SEPARATE_BSS if SPL + select SPL_GPIO_SUPPORT if SPL + select SPL_LIBCOMMON_SUPPORT if SPL + select SPL_LIBDISK_SUPPORT if SPL + select SPL_LIBGENERIC_SUPPORT if SPL + select SPL_MMC_SUPPORT if SPL + select SPL_SERIAL_SUPPORT if SPL + select SPL_USB_HOST_SUPPORT if SPL + select SPL_USB_GADGET_SUPPORT if SPL + select SPL_USB_SDP_SUPPORT if SPL + select SPL_WATCHDOG_SUPPORT if SPL + config TARGET_MX6Q_ENGICAM bool "Support Engicam i.Core(RQS)" select BOARD_LATE_INIT @@ -472,6 +494,7 @@ source "board/bachmann/ot1200/Kconfig" source "board/barco/platinum/Kconfig" source "board/barco/titanium/Kconfig" source "board/boundary/nitrogen6x/Kconfig" +source "board/bticino/mamoj/Kconfig" source "board/ccv/xpress/Kconfig" source "board/compulab/cm_fx6/Kconfig" source "board/congatec/cgtqmx6eval/Kconfig" diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig index 2dd107a8b3b..5a5a63cea71 100644 --- a/arch/arm/mach-kirkwood/Kconfig +++ b/arch/arm/mach-kirkwood/Kconfig @@ -59,6 +59,9 @@ config TARGET_NAS220 config TARGET_NSA310S bool "Zyxel NSA310S" +config TARGET_SBx81LIFKW + bool "Allied Telesis SBx81GS24/SBx81GT40/SBx81XS6/SBx81XS16" + endchoice config SYS_SOC @@ -81,5 +84,6 @@ source "board/Seagate/dockstar/Kconfig" source "board/Seagate/goflexhome/Kconfig" source "board/Seagate/nas220/Kconfig" source "board/zyxel/nsa310s/Kconfig" +source "board/alliedtelesis/SBx81LIFKW/Kconfig" endif diff --git a/arch/arm/mach-kirkwood/include/mach/config.h b/arch/arm/mach-kirkwood/include/mach/config.h index 98639114dbd..f2b2de47d05 100644 --- a/arch/arm/mach-kirkwood/include/mach/config.h +++ b/arch/arm/mach-kirkwood/include/mach/config.h @@ -59,7 +59,6 @@ * SPI Flash configuration */ #ifdef CONFIG_CMD_SF -#define CONFIG_HARD_SPI 1 #ifndef CONFIG_ENV_SPI_BUS # define CONFIG_ENV_SPI_BUS 0 #endif @@ -116,7 +115,7 @@ /* * I2C related stuff */ -#ifdef CONFIG_CMD_I2C +#if defined(CONFIG_CMD_I2C) && !defined(CONFIG_DM_I2C) #ifndef CONFIG_SYS_I2C_SOFT #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MVTWSI diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile index 3b9a8116d8e..ade7b870646 100644 --- a/arch/arm/mach-mvebu/Makefile +++ b/arch/arm/mach-mvebu/Makefile @@ -7,7 +7,6 @@ ifdef CONFIG_ARM64 obj-$(CONFIG_ARMADA_3700) += armada3700/ obj-$(CONFIG_ARMADA_8K) += armada8k/ obj-y += arm64-common.o -obj-$(CONFIG_AHCI) += sata.o else # CONFIG_ARM64 diff --git a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c index 13553cf9600..33e70569bc4 100644 --- a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c +++ b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c @@ -597,6 +597,8 @@ struct op_params pex_electrical_config_serdes_rev2_params[] = { {LANE_CFG4_REG, 0x800, 0x8, {0x8}, 0, 0}, /* tximpcal_th and rximpcal_th */ {VTHIMPCAL_CTRL_REG, 0x800, 0xff00, {0x3000}, 0, 0}, + /* Force receiver detected */ + {LANE_CFG0_REG, 0x800, 0x8000, {0x8000}, 0, 0}, }; /* PEX - configuration seq for REF_CLOCK_25MHz */ diff --git a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h index 953445b7d7a..50b23582665 100644 --- a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h +++ b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h @@ -71,6 +71,7 @@ #define RX_REG3 0xa0188 #define PCIE_REG1 0xa0288 #define PCIE_REG3 0xa0290 +#define LANE_CFG0_REG 0xa0600 #define LANE_CFG1_REG 0xa0604 #define LANE_CFG4_REG 0xa0620 #define LANE_CFG5_REG 0xa0624 diff --git a/arch/arm/mach-omap2/boot-common.c b/arch/arm/mach-omap2/boot-common.c index 0e9fd03fefb..d4a1e2e42c4 100644 --- a/arch/arm/mach-omap2/boot-common.c +++ b/arch/arm/mach-omap2/boot-common.c @@ -236,13 +236,3 @@ void arch_preboot_os(void) ahci_reset((void __iomem *)DWC_AHSATA_BASE); } #endif - -#if defined(CONFIG_USB_FUNCTION_FASTBOOT) && !defined(CONFIG_ENV_IS_NOWHERE) -int fb_set_reboot_flag(void) -{ - printf("Setting reboot to fastboot flag ...\n"); - env_set("dofastboot", "1"); - env_save(); - return 0; -} -#endif diff --git a/arch/arm/mach-omap2/utils.c b/arch/arm/mach-omap2/utils.c index dc7b37f1643..edf5edcb680 100644 --- a/arch/arm/mach-omap2/utils.c +++ b/arch/arm/mach-omap2/utils.c @@ -85,7 +85,7 @@ static void omap_set_fastboot_board_rev(void) env_set("fastboot.board_rev", board_rev); } -#ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV +#ifdef CONFIG_FASTBOOT_FLASH_MMC static u32 omap_mmc_get_part_size(const char *part) { int res; @@ -128,7 +128,7 @@ static void omap_set_fastboot_userdata_size(void) static inline void omap_set_fastboot_userdata_size(void) { } -#endif /* CONFIG_FASTBOOT_FLASH_MMC_DEV */ +#endif /* CONFIG_FASTBOOT_FLASH_MMC */ void omap_set_fastboot_vars(void) { omap_set_fastboot_cpu(); diff --git a/arch/arm/mach-rmobile/Kconfig.32 b/arch/arm/mach-rmobile/Kconfig.32 index 1ceb329f1f7..c0b5b2457cb 100644 --- a/arch/arm/mach-rmobile/Kconfig.32 +++ b/arch/arm/mach-rmobile/Kconfig.32 @@ -41,6 +41,7 @@ config TARGET_BLANCHE bool "Blanche board" select DM select DM_SERIAL + select USE_TINY_PRINTF config TARGET_GOSE bool "Gose board" diff --git a/arch/arm/mach-rmobile/Kconfig.64 b/arch/arm/mach-rmobile/Kconfig.64 index 6112d79f0d7..cb9f569e5fb 100644 --- a/arch/arm/mach-rmobile/Kconfig.64 +++ b/arch/arm/mach-rmobile/Kconfig.64 @@ -12,6 +12,9 @@ config R8A7796 config R8A77970 bool "Renesas SoC R8A77970" +config R8A77990 + bool "Renesas SoC R8A77990" + config R8A77995 bool "Renesas SoC R8A77995" @@ -31,6 +34,11 @@ config TARGET_EAGLE help Support for Renesas R-Car Gen3 Eagle platform +config TARGET_EBISU + bool "Ebisu board" + help + Support for Renesas R-Car Gen3 Ebisu platform + config TARGET_SALVATOR_X bool "Salvator-X board" help @@ -48,6 +56,7 @@ config SYS_SOC source "board/renesas/draak/Kconfig" source "board/renesas/eagle/Kconfig" +source "board/renesas/ebisu/Kconfig" source "board/renesas/salvator-x/Kconfig" source "board/renesas/ulcb/Kconfig" diff --git a/arch/arm/mach-rmobile/Makefile b/arch/arm/mach-rmobile/Makefile index 51453a88dc7..1f26adaca96 100644 --- a/arch/arm/mach-rmobile/Makefile +++ b/arch/arm/mach-rmobile/Makefile @@ -8,12 +8,8 @@ obj-y += emac.o obj-$(CONFIG_DISPLAY_BOARDINFO) += board.o obj-$(CONFIG_GLOBAL_TIMER) += timer.o +obj-$(CONFIG_TMU_TIMER) += ../../sh/lib/time.o +obj-$(CONFIG_SH73A0) += lowlevel_init.o cpu_info-sh73a0.o pfc-sh73a0.o obj-$(CONFIG_R8A7740) += lowlevel_init.o cpu_info-r8a7740.o pfc-r8a7740.o -obj-$(CONFIG_R8A7790) += lowlevel_init_ca15.o cpu_info-rcar.o pfc-r8a7790.o -obj-$(CONFIG_R8A7791) += lowlevel_init_ca15.o cpu_info-rcar.o pfc-r8a7791.o -obj-$(CONFIG_R8A7792) += lowlevel_init_ca15.o cpu_info-rcar.o pfc-r8a7792.o -obj-$(CONFIG_R8A7793) += lowlevel_init_ca15.o cpu_info-rcar.o pfc-r8a7793.o -obj-$(CONFIG_R8A7794) += lowlevel_init_ca15.o cpu_info-rcar.o pfc-r8a7794.o +obj-$(CONFIG_RCAR_GEN2) += lowlevel_init_ca15.o cpu_info-rcar.o obj-$(CONFIG_RCAR_GEN3) += lowlevel_init_gen3.o cpu_info-rcar.o memmap-gen3.o -obj-$(CONFIG_SH73A0) += lowlevel_init.o cpu_info-sh73a0.o pfc-sh73a0.o -obj-$(CONFIG_TMU_TIMER) += ../../sh/lib/time.o diff --git a/arch/arm/mach-rmobile/cpu_info.c b/arch/arm/mach-rmobile/cpu_info.c index 4e6a191cb1e..e110737471b 100644 --- a/arch/arm/mach-rmobile/cpu_info.c +++ b/arch/arm/mach-rmobile/cpu_info.c @@ -59,6 +59,7 @@ static const struct { { RMOBILE_CPU_TYPE_R8A7796, "R8A7796" }, { RMOBILE_CPU_TYPE_R8A77965, "R8A77965" }, { RMOBILE_CPU_TYPE_R8A77970, "R8A77970" }, + { RMOBILE_CPU_TYPE_R8A77990, "R8A77990" }, { RMOBILE_CPU_TYPE_R8A77995, "R8A77995" }, { 0x0, "CPU" }, }; diff --git a/arch/arm/mach-rmobile/include/mach/gpio.h b/arch/arm/mach-rmobile/include/mach/gpio.h index 448d189e926..6b5e4ed4eb5 100644 --- a/arch/arm/mach-rmobile/include/mach/gpio.h +++ b/arch/arm/mach-rmobile/include/mach/gpio.h @@ -7,21 +7,6 @@ void sh73a0_pinmux_init(void); #elif defined(CONFIG_R8A7740) #include "r8a7740-gpio.h" void r8a7740_pinmux_init(void); -#elif defined(CONFIG_R8A7790) -#include "r8a7790-gpio.h" -void r8a7790_pinmux_init(void); -#elif defined(CONFIG_R8A7791) -#include "r8a7791-gpio.h" -void r8a7791_pinmux_init(void); -#elif defined(CONFIG_R8A7792) -#include "r8a7792-gpio.h" -void r8a7792_pinmux_init(void); -#elif defined(CONFIG_R8A7793) -#include "r8a7793-gpio.h" -void r8a7793_pinmux_init(void); -#elif defined(CONFIG_R8A7794) -#include "r8a7794-gpio.h" -void r8a7794_pinmux_init(void); #endif #endif /* __ASM_ARCH_GPIO_H */ diff --git a/arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h b/arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h deleted file mode 100644 index 74b5f1df598..00000000000 --- a/arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h +++ /dev/null @@ -1,387 +0,0 @@ -#ifndef __ASM_R8A7790_GPIO_H__ -#define __ASM_R8A7790_GPIO_H__ - -/* Pin Function Controller: - * GPIO_FN_xx - GPIO used to select pin function - * GPIO_GP_x_x - GPIO mapped to real I/O pin on CPU - */ -enum { - GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3, - GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7, - GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11, - GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15, - GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19, - GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23, - GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27, - GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31, - - GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3, - GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7, - GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11, - GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15, - GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19, - GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23, - GPIO_GP_1_24, GPIO_GP_1_25, GPIO_GP_1_26, GPIO_GP_1_27, - GPIO_GP_1_28, GPIO_GP_1_29, - - GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3, - GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7, - GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11, - GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15, - GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19, - GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23, - GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27, - GPIO_GP_2_28, GPIO_GP_2_29, - - GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3, - GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7, - GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11, - GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15, - GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19, - GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23, - GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27, - GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31, - - GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3, - GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7, - GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11, - GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15, - GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19, - GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23, - GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27, - GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31, - - GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3, - GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7, - GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11, - GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15, - GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19, - GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23, - GPIO_GP_5_24, GPIO_GP_5_25, GPIO_GP_5_26, GPIO_GP_5_27, - GPIO_GP_5_28, GPIO_GP_5_29, GPIO_GP_5_30, GPIO_GP_5_31, - - GPIO_FN_VI1_DATA7_VI1_B7, GPIO_FN_USB0_PWEN, GPIO_FN_USB0_OVC_VBUS, - GPIO_FN_USB2_PWEN, GPIO_FN_USB2_OVC, GPIO_FN_AVS1, GPIO_FN_AVS2, - GPIO_FN_DU_DOTCLKIN0, GPIO_FN_DU_DOTCLKIN2, - - /* IPSR0 */ - GPIO_FN_D1, GPIO_FN_MSIOF3_SYNC_B, GPIO_FN_VI3_DATA1, GPIO_FN_VI0_G5, - GPIO_FN_VI0_G5_B, GPIO_FN_D2, GPIO_FN_MSIOF3_RXD_B, GPIO_FN_VI3_DATA2, - GPIO_FN_VI0_G6, GPIO_FN_VI0_G6_B, GPIO_FN_D3, GPIO_FN_MSIOF3_TXD_B, - GPIO_FN_VI3_DATA3, GPIO_FN_VI0_G7, GPIO_FN_VI0_G7_B, GPIO_FN_D4, - GPIO_FN_SCIFB1_RXD_F, GPIO_FN_SCIFB0_RXD_C, GPIO_FN_VI3_DATA4, - GPIO_FN_VI0_R0, GPIO_FN_VI0_R0_B, GPIO_FN_RX0_B, GPIO_FN_D5, - GPIO_FN_SCIFB1_TXD_F, GPIO_FN_SCIFB0_TXD_C, GPIO_FN_VI3_DATA5, - GPIO_FN_VI0_R1, GPIO_FN_VI0_R1_B, GPIO_FN_TX0_B, GPIO_FN_D6, - GPIO_FN_SCL2_C, GPIO_FN_VI3_DATA6, GPIO_FN_VI0_R2, GPIO_FN_VI0_R2_B, - GPIO_FN_SCL2_CIS_C, GPIO_FN_D7, GPIO_FN_AD_DI_B, GPIO_FN_SDA2_C, - GPIO_FN_VI3_DATA7, GPIO_FN_VI0_R3, GPIO_FN_VI0_R3_B, GPIO_FN_SDA2_CIS_C, - GPIO_FN_D8, GPIO_FN_SCIFA1_SCK_C, GPIO_FN_AVB_TXD0, GPIO_FN_MII_TXD0, - GPIO_FN_VI0_G0, GPIO_FN_VI0_G0_B, GPIO_FN_VI2_DATA0_VI2_B0, - - /* IPSR1 */ - GPIO_FN_D9, GPIO_FN_SCIFA1_RXD_C, GPIO_FN_AVB_TXD1, GPIO_FN_MII_TXD1, - GPIO_FN_VI0_G1, GPIO_FN_VI0_G1_B, GPIO_FN_VI2_DATA1_VI2_B1, GPIO_FN_D10, - GPIO_FN_SCIFA1_TXD_C, GPIO_FN_AVB_TXD2, GPIO_FN_MII_TXD2, - GPIO_FN_VI0_G2, GPIO_FN_VI0_G2_B, GPIO_FN_VI2_DATA2_VI2_B2, GPIO_FN_D11, - GPIO_FN_SCIFA1_CTS_N_C, GPIO_FN_AVB_TXD3, GPIO_FN_MII_TXD3, - GPIO_FN_VI0_G3, GPIO_FN_VI0_G3_B, GPIO_FN_VI2_DATA3_VI2_B3, - GPIO_FN_D12, GPIO_FN_SCIFA1_RTS_N_C, GPIO_FN_AVB_TXD4, - GPIO_FN_VI0_HSYNC_N, GPIO_FN_VI0_HSYNC_N_B, GPIO_FN_VI2_DATA4_VI2_B4, - GPIO_FN_D13, GPIO_FN_AVB_TXD5, GPIO_FN_VI0_VSYNC_N, - GPIO_FN_VI0_VSYNC_N_B, GPIO_FN_VI2_DATA5_VI2_B5, GPIO_FN_D14, - GPIO_FN_SCIFB1_RXD_C, GPIO_FN_AVB_TXD6, GPIO_FN_RX1_B, - GPIO_FN_VI0_CLKENB, GPIO_FN_VI0_CLKENB_B, GPIO_FN_VI2_DATA6_VI2_B6, - GPIO_FN_D15, GPIO_FN_SCIFB1_TXD_C, GPIO_FN_AVB_TXD7, GPIO_FN_TX1_B, - GPIO_FN_VI0_FIELD, GPIO_FN_VI0_FIELD_B, GPIO_FN_VI2_DATA7_VI2_B7, - GPIO_FN_A0, GPIO_FN_PWM3, GPIO_FN_A1, GPIO_FN_PWM4, - - /* IPSR2 */ - GPIO_FN_A2, GPIO_FN_PWM5, GPIO_FN_MSIOF1_SS1_B, GPIO_FN_A3, - GPIO_FN_PWM6, GPIO_FN_MSIOF1_SS2_B, GPIO_FN_A4, GPIO_FN_MSIOF1_TXD_B, - GPIO_FN_TPU0TO0, GPIO_FN_A5, GPIO_FN_SCIFA1_TXD_B, GPIO_FN_TPU0TO1, - GPIO_FN_A6, GPIO_FN_SCIFA1_RTS_N_B, GPIO_FN_TPU0TO2, GPIO_FN_A7, - GPIO_FN_SCIFA1_SCK_B, GPIO_FN_AUDIO_CLKOUT_B, GPIO_FN_TPU0TO3, - GPIO_FN_A8, GPIO_FN_SCIFA1_RXD_B, GPIO_FN_SSI_SCK5_B, GPIO_FN_VI0_R4, - GPIO_FN_VI0_R4_B, GPIO_FN_SCIFB2_RXD_C, GPIO_FN_VI2_DATA0_VI2_B0_B, - GPIO_FN_A9, GPIO_FN_SCIFA1_CTS_N_B, GPIO_FN_SSI_WS5_B, GPIO_FN_VI0_R5, - GPIO_FN_VI0_R5_B, GPIO_FN_SCIFB2_TXD_C, GPIO_FN_VI2_DATA1_VI2_B1_B, - GPIO_FN_A10, GPIO_FN_SSI_SDATA5_B, GPIO_FN_MSIOF2_SYNC, GPIO_FN_VI0_R6, - GPIO_FN_VI0_R6_B, GPIO_FN_VI2_DATA2_VI2_B2_B, - - /* IPSR3 */ - GPIO_FN_A11, GPIO_FN_SCIFB2_CTS_N_B, GPIO_FN_MSIOF2_SCK, GPIO_FN_VI1_R0, - GPIO_FN_VI1_R0_B, GPIO_FN_VI2_G0, GPIO_FN_VI2_DATA3_VI2_B3_B, - GPIO_FN_A12, GPIO_FN_SCIFB2_RXD_B, GPIO_FN_MSIOF2_TXD, GPIO_FN_VI1_R1, - GPIO_FN_VI1_R1_B, GPIO_FN_VI2_G1, GPIO_FN_VI2_DATA4_VI2_B4_B, - GPIO_FN_A13, GPIO_FN_SCIFB2_RTS_N_B, GPIO_FN_EX_WAIT2, - GPIO_FN_MSIOF2_RXD, GPIO_FN_VI1_R2, GPIO_FN_VI1_R2_B, GPIO_FN_VI2_G2, - GPIO_FN_VI2_DATA5_VI2_B5_B, GPIO_FN_A14, GPIO_FN_SCIFB2_TXD_B, - GPIO_FN_ATACS11_N, GPIO_FN_MSIOF2_SS1, GPIO_FN_A15, - GPIO_FN_SCIFB2_SCK_B, GPIO_FN_ATARD1_N, GPIO_FN_MSIOF2_SS2, GPIO_FN_A16, - GPIO_FN_ATAWR1_N, GPIO_FN_A17, GPIO_FN_AD_DO_B, GPIO_FN_ATADIR1_N, - GPIO_FN_A18, GPIO_FN_AD_CLK_B, GPIO_FN_ATAG1_N, GPIO_FN_A19, - GPIO_FN_AD_NCS_N_B, GPIO_FN_ATACS01_N, GPIO_FN_EX_WAIT0_B, GPIO_FN_A20, - GPIO_FN_SPCLK, GPIO_FN_VI1_R3, GPIO_FN_VI1_R3_B, GPIO_FN_VI2_G4, - - /* IPSR4 */ - GPIO_FN_A21, GPIO_FN_MOSI_IO0, GPIO_FN_VI1_R4, GPIO_FN_VI1_R4_B, - GPIO_FN_VI2_G5, GPIO_FN_A22, GPIO_FN_MISO_IO1, GPIO_FN_VI1_R5, - GPIO_FN_VI1_R5_B, GPIO_FN_VI2_G6, GPIO_FN_A23, GPIO_FN_IO2, - GPIO_FN_VI1_G7, GPIO_FN_VI1_G7_B, GPIO_FN_VI2_G7, GPIO_FN_A24, - GPIO_FN_IO3, GPIO_FN_VI1_R7, GPIO_FN_VI1_R7_B, GPIO_FN_VI2_CLKENB, - GPIO_FN_VI2_CLKENB_B, GPIO_FN_A25, GPIO_FN_SSL, GPIO_FN_VI1_G6, - GPIO_FN_VI1_G6_B, GPIO_FN_VI2_FIELD, GPIO_FN_VI2_FIELD_B, GPIO_FN_CS0_N, - GPIO_FN_VI1_R6, GPIO_FN_VI1_R6_B, GPIO_FN_VI2_G3, GPIO_FN_MSIOF0_SS2_B, - GPIO_FN_CS1_N_A26, GPIO_FN_SPEEDIN, GPIO_FN_VI0_R7, GPIO_FN_VI0_R7_B, - GPIO_FN_VI2_CLK, GPIO_FN_VI2_CLK_B, GPIO_FN_EX_CS0_N, GPIO_FN_HRX1_B, - GPIO_FN_VI1_G5, GPIO_FN_VI1_G5_B, GPIO_FN_VI2_R0, GPIO_FN_HTX0_B, - GPIO_FN_MSIOF0_SS1_B, GPIO_FN_EX_CS1_N, GPIO_FN_GPS_CLK, - GPIO_FN_HCTS1_N_B, GPIO_FN_VI1_FIELD, GPIO_FN_VI1_FIELD_B, - GPIO_FN_VI2_R1, GPIO_FN_EX_CS2_N, GPIO_FN_GPS_SIGN, GPIO_FN_HRTS1_N_B, - GPIO_FN_VI3_CLKENB, GPIO_FN_VI1_G0, GPIO_FN_VI1_G0_B, GPIO_FN_VI2_R2, - - /* IPSR5 */ - GPIO_FN_EX_CS3_N, GPIO_FN_GPS_MAG, GPIO_FN_VI3_FIELD, GPIO_FN_VI1_G1, - GPIO_FN_VI1_G1_B, GPIO_FN_VI2_R3, GPIO_FN_EX_CS4_N, - GPIO_FN_MSIOF1_SCK_B, GPIO_FN_VI3_HSYNC_N, - GPIO_FN_VI2_HSYNC_N, GPIO_FN_SCL1, GPIO_FN_VI2_HSYNC_N_B, - GPIO_FN_INTC_EN0_N, GPIO_FN_SCL1_CIS, GPIO_FN_EX_CS5_N, GPIO_FN_CAN0_RX, - GPIO_FN_MSIOF1_RXD_B, GPIO_FN_VI3_VSYNC_N, GPIO_FN_VI1_G2, - GPIO_FN_VI1_G2_B, GPIO_FN_VI2_R4, GPIO_FN_SDA1, GPIO_FN_INTC_EN1_N, - GPIO_FN_SDA1_CIS, GPIO_FN_BS_N, GPIO_FN_IETX, GPIO_FN_HTX1_B, - GPIO_FN_CAN1_TX, GPIO_FN_DRACK0, GPIO_FN_IETX_C, GPIO_FN_RD_N, - GPIO_FN_CAN0_TX, GPIO_FN_SCIFA0_SCK_B, GPIO_FN_RD_WR_N, GPIO_FN_VI1_G3, - GPIO_FN_VI1_G3_B, GPIO_FN_VI2_R5, GPIO_FN_SCIFA0_RXD_B, - GPIO_FN_INTC_IRQ4_N, GPIO_FN_WE0_N, GPIO_FN_IECLK, GPIO_FN_CAN_CLK, - GPIO_FN_VI2_VSYNC_N, GPIO_FN_SCIFA0_TXD_B, GPIO_FN_VI2_VSYNC_N_B, - GPIO_FN_WE1_N, GPIO_FN_IERX, GPIO_FN_CAN1_RX, GPIO_FN_VI1_G4, - GPIO_FN_VI1_G4_B, GPIO_FN_VI2_R6, GPIO_FN_SCIFA0_CTS_N_B, - GPIO_FN_IERX_C, GPIO_FN_EX_WAIT0, GPIO_FN_IRQ3, GPIO_FN_INTC_IRQ3_N, - GPIO_FN_VI3_CLK, GPIO_FN_SCIFA0_RTS_N_B, GPIO_FN_HRX0_B, - GPIO_FN_MSIOF0_SCK_B, GPIO_FN_DREQ0_N, GPIO_FN_VI1_HSYNC_N, - GPIO_FN_VI1_HSYNC_N_B, GPIO_FN_VI2_R7, GPIO_FN_SSI_SCK78_C, - GPIO_FN_SSI_WS78_B, - - /* IPSR6 */ - GPIO_FN_DACK0, GPIO_FN_IRQ0, GPIO_FN_INTC_IRQ0_N, GPIO_FN_SSI_SCK6_B, - GPIO_FN_VI1_VSYNC_N, GPIO_FN_VI1_VSYNC_N_B, GPIO_FN_SSI_WS78_C, - GPIO_FN_DREQ1_N, GPIO_FN_VI1_CLKENB, GPIO_FN_VI1_CLKENB_B, - GPIO_FN_SSI_SDATA7_C, GPIO_FN_SSI_SCK78_B, GPIO_FN_DACK1, GPIO_FN_IRQ1, - GPIO_FN_INTC_IRQ1_N, GPIO_FN_SSI_WS6_B, GPIO_FN_SSI_SDATA8_C, - GPIO_FN_DREQ2_N, GPIO_FN_HSCK1_B, GPIO_FN_HCTS0_N_B, - GPIO_FN_MSIOF0_TXD_B, GPIO_FN_DACK2, GPIO_FN_IRQ2, GPIO_FN_INTC_IRQ2_N, - GPIO_FN_SSI_SDATA6_B, GPIO_FN_HRTS0_N_B, GPIO_FN_MSIOF0_RXD_B, - GPIO_FN_ETH_CRS_DV, GPIO_FN_RMII_CRS_DV, GPIO_FN_STP_ISCLK_0_B, - GPIO_FN_TS_SDEN0_D, GPIO_FN_GLO_Q0_C, GPIO_FN_SCL2_E, - GPIO_FN_SCL2_CIS_E, GPIO_FN_ETH_RX_ER, GPIO_FN_RMII_RX_ER, - GPIO_FN_STP_ISD_0_B, GPIO_FN_TS_SPSYNC0_D, GPIO_FN_GLO_Q1_C, - GPIO_FN_SDA2_E, GPIO_FN_SDA2_CIS_E, GPIO_FN_ETH_RXD0, GPIO_FN_RMII_RXD0, - GPIO_FN_STP_ISEN_0_B, GPIO_FN_TS_SDAT0_D, GPIO_FN_GLO_I0_C, - GPIO_FN_SCIFB1_SCK_G, GPIO_FN_SCK1_E, GPIO_FN_ETH_RXD1, - GPIO_FN_RMII_RXD1, GPIO_FN_HRX0_E, GPIO_FN_STP_ISSYNC_0_B, - GPIO_FN_TS_SCK0_D, GPIO_FN_GLO_I1_C, GPIO_FN_SCIFB1_RXD_G, - GPIO_FN_RX1_E, GPIO_FN_ETH_LINK, GPIO_FN_RMII_LINK, GPIO_FN_HTX0_E, - GPIO_FN_STP_IVCXO27_0_B, GPIO_FN_SCIFB1_TXD_G, GPIO_FN_TX1_E, - GPIO_FN_ETH_REF_CLK, GPIO_FN_RMII_REF_CLK, GPIO_FN_HCTS0_N_E, - GPIO_FN_STP_IVCXO27_1_B, GPIO_FN_HRX0_F, - - /* IPSR7 */ - GPIO_FN_ETH_MDIO, GPIO_FN_RMII_MDIO, GPIO_FN_HRTS0_N_E, - GPIO_FN_SIM0_D_C, GPIO_FN_HCTS0_N_F, GPIO_FN_ETH_TXD1, - GPIO_FN_RMII_TXD1, GPIO_FN_HTX0_F, GPIO_FN_BPFCLK_G, GPIO_FN_RDS_CLK_F, - GPIO_FN_ETH_TX_EN, GPIO_FN_RMII_TX_EN, GPIO_FN_SIM0_CLK_C, - GPIO_FN_HRTS0_N_F, GPIO_FN_ETH_MAGIC, GPIO_FN_RMII_MAGIC, - GPIO_FN_SIM0_RST_C, GPIO_FN_ETH_TXD0, GPIO_FN_RMII_TXD0, - GPIO_FN_STP_ISCLK_1_B, GPIO_FN_TS_SDEN1_C, GPIO_FN_GLO_SCLK_C, - GPIO_FN_ETH_MDC, GPIO_FN_RMII_MDC, GPIO_FN_STP_ISD_1_B, - GPIO_FN_TS_SPSYNC1_C, GPIO_FN_GLO_SDATA_C, GPIO_FN_PWM0, - GPIO_FN_SCIFA2_SCK_C, GPIO_FN_STP_ISEN_1_B, GPIO_FN_TS_SDAT1_C, - GPIO_FN_GLO_SS_C, GPIO_FN_PWM1, GPIO_FN_SCIFA2_TXD_C, - GPIO_FN_STP_ISSYNC_1_B, GPIO_FN_TS_SCK1_C, GPIO_FN_GLO_RFON_C, - GPIO_FN_PCMOE_N, GPIO_FN_PWM2, GPIO_FN_PWMFSW0, GPIO_FN_SCIFA2_RXD_C, - GPIO_FN_PCMWE_N, GPIO_FN_IECLK_C, GPIO_FN_DU1_DOTCLKIN, - GPIO_FN_AUDIO_CLKC, GPIO_FN_AUDIO_CLKOUT_C, GPIO_FN_VI0_CLK, - GPIO_FN_ATACS00_N, GPIO_FN_AVB_RXD1, GPIO_FN_MII_RXD1, - GPIO_FN_VI0_DATA0_VI0_B0, GPIO_FN_ATACS10_N, GPIO_FN_AVB_RXD2, - GPIO_FN_MII_RXD2, - - /* IPSR8 */ - GPIO_FN_VI0_DATA1_VI0_B1, GPIO_FN_ATARD0_N, GPIO_FN_AVB_RXD3, - GPIO_FN_MII_RXD3, GPIO_FN_VI0_DATA2_VI0_B2, GPIO_FN_ATAWR0_N, - GPIO_FN_AVB_RXD4, GPIO_FN_VI0_DATA3_VI0_B3, GPIO_FN_ATADIR0_N, - GPIO_FN_AVB_RXD5, GPIO_FN_VI0_DATA4_VI0_B4, GPIO_FN_ATAG0_N, - GPIO_FN_AVB_RXD6, GPIO_FN_VI0_DATA5_VI0_B5, GPIO_FN_EX_WAIT1, - GPIO_FN_AVB_RXD7, GPIO_FN_VI0_DATA6_VI0_B6, GPIO_FN_AVB_RX_ER, - GPIO_FN_MII_RX_ER, GPIO_FN_VI0_DATA7_VI0_B7, GPIO_FN_AVB_RX_CLK, - GPIO_FN_MII_RX_CLK, GPIO_FN_VI1_CLK, GPIO_FN_AVB_RX_DV, - GPIO_FN_MII_RX_DV, GPIO_FN_VI1_DATA0_VI1_B0, GPIO_FN_SCIFA1_SCK_D, - GPIO_FN_AVB_CRS, GPIO_FN_MII_CRS, GPIO_FN_VI1_DATA1_VI1_B1, - GPIO_FN_SCIFA1_RXD_D, GPIO_FN_AVB_MDC, GPIO_FN_MII_MDC, - GPIO_FN_VI1_DATA2_VI1_B2, GPIO_FN_SCIFA1_TXD_D, GPIO_FN_AVB_MDIO, - GPIO_FN_MII_MDIO, GPIO_FN_VI1_DATA3_VI1_B3, GPIO_FN_SCIFA1_CTS_N_D, - GPIO_FN_AVB_GTX_CLK, GPIO_FN_VI1_DATA4_VI1_B4, GPIO_FN_SCIFA1_RTS_N_D, - GPIO_FN_AVB_MAGIC, GPIO_FN_MII_MAGIC, GPIO_FN_VI1_DATA5_VI1_B5, - GPIO_FN_AVB_PHY_INT, GPIO_FN_VI1_DATA6_VI1_B6, GPIO_FN_AVB_GTXREFCLK, - GPIO_FN_SD0_CLK, GPIO_FN_VI1_DATA0_VI1_B0_B, GPIO_FN_SD0_CMD, - GPIO_FN_SCIFB1_SCK_B, GPIO_FN_VI1_DATA1_VI1_B1_B, - - /* IPSR9 */ - GPIO_FN_SD0_DAT0, GPIO_FN_SCIFB1_RXD_B, GPIO_FN_VI1_DATA2_VI1_B2_B, - GPIO_FN_SD0_DAT1, GPIO_FN_SCIFB1_TXD_B, GPIO_FN_VI1_DATA3_VI1_B3_B, - GPIO_FN_SD0_DAT2, GPIO_FN_SCIFB1_CTS_N_B, GPIO_FN_VI1_DATA4_VI1_B4_B, - GPIO_FN_SD0_DAT3, GPIO_FN_SCIFB1_RTS_N_B, GPIO_FN_VI1_DATA5_VI1_B5_B, - GPIO_FN_SD0_CD, GPIO_FN_MMC0_D6, GPIO_FN_TS_SDEN0_B, GPIO_FN_USB0_EXTP, - GPIO_FN_GLO_SCLK, GPIO_FN_VI1_DATA6_VI1_B6_B, GPIO_FN_SCL1_B, - GPIO_FN_SCL1_CIS_B, GPIO_FN_VI2_DATA6_VI2_B6_B, GPIO_FN_SD0_WP, - GPIO_FN_MMC0_D7, GPIO_FN_TS_SPSYNC0_B, GPIO_FN_USB0_IDIN, - GPIO_FN_GLO_SDATA, GPIO_FN_VI1_DATA7_VI1_B7_B, GPIO_FN_SDA1_B, - GPIO_FN_SDA1_CIS_B, GPIO_FN_VI2_DATA7_VI2_B7_B, GPIO_FN_SD1_CLK, - GPIO_FN_AVB_TX_EN, GPIO_FN_MII_TX_EN, GPIO_FN_SD1_CMD, - GPIO_FN_AVB_TX_ER, GPIO_FN_MII_TX_ER, GPIO_FN_SCIFB0_SCK_B, - GPIO_FN_SD1_DAT0, GPIO_FN_AVB_TX_CLK, GPIO_FN_MII_TX_CLK, - GPIO_FN_SCIFB0_RXD_B, GPIO_FN_SD1_DAT1, GPIO_FN_AVB_LINK, - GPIO_FN_MII_LINK, GPIO_FN_SCIFB0_TXD_B, GPIO_FN_SD1_DAT2, - GPIO_FN_AVB_COL, GPIO_FN_MII_COL, GPIO_FN_SCIFB0_CTS_N_B, - GPIO_FN_SD1_DAT3, GPIO_FN_AVB_RXD0, GPIO_FN_MII_RXD0, - GPIO_FN_SCIFB0_RTS_N_B, GPIO_FN_SD1_CD, GPIO_FN_MMC1_D6, - GPIO_FN_TS_SDEN1, GPIO_FN_USB1_EXTP, GPIO_FN_GLO_SS, GPIO_FN_VI0_CLK_B, - GPIO_FN_SCL2_D, GPIO_FN_SCL2_CIS_D, GPIO_FN_SIM0_CLK_B, - GPIO_FN_VI3_CLK_B, - - /* IPSR10 */ - GPIO_FN_SD1_WP, GPIO_FN_MMC1_D7, GPIO_FN_TS_SPSYNC1, GPIO_FN_USB1_IDIN, - GPIO_FN_GLO_RFON, GPIO_FN_VI1_CLK_B, GPIO_FN_SDA2_D, GPIO_FN_SDA2_CIS_D, - GPIO_FN_SIM0_D_B, GPIO_FN_SD2_CLK, GPIO_FN_MMC0_CLK, GPIO_FN_SIM0_CLK, - GPIO_FN_VI0_DATA0_VI0_B0_B, GPIO_FN_TS_SDEN0_C, GPIO_FN_GLO_SCLK_B, - GPIO_FN_VI3_DATA0_B, GPIO_FN_SD2_CMD, GPIO_FN_MMC0_CMD, GPIO_FN_SIM0_D, - GPIO_FN_VI0_DATA1_VI0_B1_B, GPIO_FN_SCIFB1_SCK_E, GPIO_FN_SCK1_D, - GPIO_FN_TS_SPSYNC0_C, GPIO_FN_GLO_SDATA_B, GPIO_FN_VI3_DATA1_B, - GPIO_FN_SD2_DAT0, GPIO_FN_MMC0_D0, GPIO_FN_FMCLK_B, - GPIO_FN_VI0_DATA2_VI0_B2_B, GPIO_FN_SCIFB1_RXD_E, GPIO_FN_RX1_D, - GPIO_FN_TS_SDAT0_C, GPIO_FN_GLO_SS_B, GPIO_FN_VI3_DATA2_B, - GPIO_FN_SD2_DAT1, GPIO_FN_MMC0_D1, GPIO_FN_FMIN_B, GPIO_FN_RDS_DATA, - GPIO_FN_VI0_DATA3_VI0_B3_B, GPIO_FN_SCIFB1_TXD_E, GPIO_FN_TX1_D, - GPIO_FN_TS_SCK0_C, GPIO_FN_GLO_RFON_B, GPIO_FN_VI3_DATA3_B, - GPIO_FN_SD2_DAT2, GPIO_FN_MMC0_D2, GPIO_FN_BPFCLK_B, GPIO_FN_RDS_CLK, - GPIO_FN_VI0_DATA4_VI0_B4_B, GPIO_FN_HRX0_D, GPIO_FN_TS_SDEN1_B, - GPIO_FN_GLO_Q0_B, GPIO_FN_VI3_DATA4_B, GPIO_FN_SD2_DAT3, - GPIO_FN_MMC0_D3, GPIO_FN_SIM0_RST, GPIO_FN_VI0_DATA5_VI0_B5_B, - GPIO_FN_HTX0_D, GPIO_FN_TS_SPSYNC1_B, GPIO_FN_GLO_Q1_B, - GPIO_FN_VI3_DATA5_B, GPIO_FN_SD2_CD, GPIO_FN_MMC0_D4, - GPIO_FN_TS_SDAT0_B, GPIO_FN_USB2_EXTP, GPIO_FN_GLO_I0, - GPIO_FN_VI0_DATA6_VI0_B6_B, GPIO_FN_HCTS0_N_D, GPIO_FN_TS_SDAT1_B, - GPIO_FN_GLO_I0_B, GPIO_FN_VI3_DATA6_B, - - /* IPSR11 */ - GPIO_FN_SD2_WP, GPIO_FN_MMC0_D5, GPIO_FN_TS_SCK0_B, GPIO_FN_USB2_IDIN, - GPIO_FN_GLO_I1, GPIO_FN_VI0_DATA7_VI0_B7_B, GPIO_FN_HRTS0_N_D, - GPIO_FN_TS_SCK1_B, GPIO_FN_GLO_I1_B, GPIO_FN_VI3_DATA7_B, - GPIO_FN_SD3_CLK, GPIO_FN_MMC1_CLK, GPIO_FN_SD3_CMD, GPIO_FN_MMC1_CMD, - GPIO_FN_MTS_N, GPIO_FN_SD3_DAT0, GPIO_FN_MMC1_D0, GPIO_FN_STM_N, - GPIO_FN_SD3_DAT1, GPIO_FN_MMC1_D1, GPIO_FN_MDATA, GPIO_FN_SD3_DAT2, - GPIO_FN_MMC1_D2, GPIO_FN_SDATA, GPIO_FN_SD3_DAT3, GPIO_FN_MMC1_D3, - GPIO_FN_SCKZ, GPIO_FN_SD3_CD, GPIO_FN_MMC1_D4, GPIO_FN_TS_SDAT1, - GPIO_FN_VSP, GPIO_FN_GLO_Q0, GPIO_FN_SIM0_RST_B, GPIO_FN_SD3_WP, - GPIO_FN_MMC1_D5, GPIO_FN_TS_SCK1, GPIO_FN_GLO_Q1, GPIO_FN_FMIN_C, - GPIO_FN_RDS_DATA_B, GPIO_FN_FMIN_E, GPIO_FN_RDS_DATA_D, GPIO_FN_FMIN_F, - GPIO_FN_RDS_DATA_E, GPIO_FN_MLB_CLK, GPIO_FN_SCL2_B, GPIO_FN_SCL2_CIS_B, - GPIO_FN_MLB_SIG, GPIO_FN_SCIFB1_RXD_D, GPIO_FN_RX1_C, GPIO_FN_SDA2_B, - GPIO_FN_SDA2_CIS_B, GPIO_FN_MLB_DAT, GPIO_FN_SPV_EVEN, - GPIO_FN_SCIFB1_TXD_D, GPIO_FN_TX1_C, GPIO_FN_BPFCLK_C, - GPIO_FN_RDS_CLK_B, GPIO_FN_SSI_SCK0129, GPIO_FN_CAN_CLK_B, - GPIO_FN_MOUT0, - - /* IPSR12 */ - GPIO_FN_SSI_WS0129, GPIO_FN_CAN0_TX_B, GPIO_FN_MOUT1, - GPIO_FN_SSI_SDATA0, GPIO_FN_CAN0_RX_B, GPIO_FN_MOUT2, - GPIO_FN_SSI_SDATA1, GPIO_FN_CAN1_TX_B, GPIO_FN_MOUT5, - GPIO_FN_SSI_SDATA2, GPIO_FN_CAN1_RX_B, GPIO_FN_SSI_SCK1, GPIO_FN_MOUT6, - GPIO_FN_SSI_SCK34, GPIO_FN_STP_OPWM_0, GPIO_FN_SCIFB0_SCK, - GPIO_FN_MSIOF1_SCK, GPIO_FN_CAN_DEBUG_HW_TRIGGER, GPIO_FN_SSI_WS34, - GPIO_FN_STP_IVCXO27_0, GPIO_FN_SCIFB0_RXD, GPIO_FN_MSIOF1_SYNC, - GPIO_FN_CAN_STEP0, GPIO_FN_SSI_SDATA3, GPIO_FN_STP_ISCLK_0, - GPIO_FN_SCIFB0_TXD, GPIO_FN_MSIOF1_SS1, GPIO_FN_CAN_TXCLK, - GPIO_FN_SSI_SCK4, GPIO_FN_STP_ISD_0, GPIO_FN_SCIFB0_CTS_N, - GPIO_FN_MSIOF1_SS2, GPIO_FN_SSI_SCK5_C, GPIO_FN_CAN_DEBUGOUT0, - GPIO_FN_SSI_WS4, GPIO_FN_STP_ISEN_0, GPIO_FN_SCIFB0_RTS_N, - GPIO_FN_MSIOF1_TXD, GPIO_FN_SSI_WS5_C, GPIO_FN_CAN_DEBUGOUT1, - GPIO_FN_SSI_SDATA4, GPIO_FN_STP_ISSYNC_0, GPIO_FN_MSIOF1_RXD, - GPIO_FN_CAN_DEBUGOUT2, GPIO_FN_SSI_SCK5, GPIO_FN_SCIFB1_SCK, - GPIO_FN_IERX_B, GPIO_FN_DU2_EXHSYNC_DU2_HSYNC, GPIO_FN_QSTH_QHS, - GPIO_FN_CAN_DEBUGOUT3, GPIO_FN_SSI_WS5, GPIO_FN_SCIFB1_RXD, - GPIO_FN_IECLK_B, GPIO_FN_DU2_EXVSYNC_DU2_VSYNC, GPIO_FN_QSTB_QHE, - GPIO_FN_CAN_DEBUGOUT4, - - /* IPSR13 */ - GPIO_FN_SSI_SDATA5, GPIO_FN_SCIFB1_TXD, GPIO_FN_IETX_B, GPIO_FN_DU2_DR2, - GPIO_FN_LCDOUT2, GPIO_FN_CAN_DEBUGOUT5, GPIO_FN_SSI_SCK6, - GPIO_FN_SCIFB1_CTS_N, GPIO_FN_BPFCLK_D, GPIO_FN_RDS_CLK_C, - GPIO_FN_DU2_DR3, GPIO_FN_LCDOUT3, GPIO_FN_CAN_DEBUGOUT6, - GPIO_FN_BPFCLK_F, GPIO_FN_RDS_CLK_E, GPIO_FN_SSI_WS6, - GPIO_FN_SCIFB1_RTS_N, GPIO_FN_CAN0_TX_D, GPIO_FN_DU2_DR4, - GPIO_FN_LCDOUT4, GPIO_FN_CAN_DEBUGOUT7, GPIO_FN_SSI_SDATA6, - GPIO_FN_FMIN_D, GPIO_FN_RDS_DATA_C, GPIO_FN_DU2_DR5, GPIO_FN_LCDOUT5, - GPIO_FN_CAN_DEBUGOUT8, GPIO_FN_SSI_SCK78, GPIO_FN_STP_IVCXO27_1, - GPIO_FN_SCK1, GPIO_FN_SCIFA1_SCK, GPIO_FN_DU2_DR6, GPIO_FN_LCDOUT6, - GPIO_FN_CAN_DEBUGOUT9, GPIO_FN_SSI_WS78, GPIO_FN_STP_ISCLK_1, - GPIO_FN_SCIFB2_SCK, GPIO_FN_SCIFA2_CTS_N, GPIO_FN_DU2_DR7, - GPIO_FN_LCDOUT7, GPIO_FN_CAN_DEBUGOUT10, GPIO_FN_SSI_SDATA7, - GPIO_FN_STP_ISD_1, GPIO_FN_SCIFB2_RXD, GPIO_FN_SCIFA2_RTS_N, - GPIO_FN_TCLK2, GPIO_FN_QSTVA_QVS, GPIO_FN_CAN_DEBUGOUT11, - GPIO_FN_BPFCLK_E, GPIO_FN_RDS_CLK_D, GPIO_FN_SSI_SDATA7_B, - GPIO_FN_FMIN_G, GPIO_FN_RDS_DATA_F, GPIO_FN_SSI_SDATA8, - GPIO_FN_STP_ISEN_1, GPIO_FN_SCIFB2_TXD, GPIO_FN_CAN0_TX_C, - GPIO_FN_CAN_DEBUGOUT12, GPIO_FN_SSI_SDATA8_B, GPIO_FN_SSI_SDATA9, - GPIO_FN_STP_ISSYNC_1, GPIO_FN_SCIFB2_CTS_N, GPIO_FN_SSI_WS1, - GPIO_FN_SSI_SDATA5_C, GPIO_FN_CAN_DEBUGOUT13, GPIO_FN_AUDIO_CLKA, - GPIO_FN_SCIFB2_RTS_N, GPIO_FN_CAN_DEBUGOUT14, - - /* IPSR14 */ - GPIO_FN_AUDIO_CLKB, GPIO_FN_SCIF_CLK, GPIO_FN_CAN0_RX_D, - GPIO_FN_DVC_MUTE, GPIO_FN_CAN0_RX_C, GPIO_FN_CAN_DEBUGOUT15, - GPIO_FN_REMOCON, GPIO_FN_SCIFA0_SCK, GPIO_FN_HSCK1, GPIO_FN_SCK0, - GPIO_FN_MSIOF3_SS2, GPIO_FN_DU2_DG2, GPIO_FN_LCDOUT10, GPIO_FN_SDA1_C, - GPIO_FN_SDA1_CIS_C, GPIO_FN_SCIFA0_RXD, GPIO_FN_HRX1, GPIO_FN_RX0, - GPIO_FN_DU2_DR0, GPIO_FN_LCDOUT0, GPIO_FN_SCIFA0_TXD, GPIO_FN_HTX1, - GPIO_FN_TX0, GPIO_FN_DU2_DR1, GPIO_FN_LCDOUT1, GPIO_FN_SCIFA0_CTS_N, - GPIO_FN_HCTS1_N, GPIO_FN_CTS0_N, GPIO_FN_MSIOF3_SYNC, GPIO_FN_DU2_DG3, - GPIO_FN_LCDOUT11, GPIO_FN_PWM0_B, GPIO_FN_SCL1_C, GPIO_FN_SCL1_CIS_C, - GPIO_FN_SCIFA0_RTS_N, GPIO_FN_HRTS1_N, GPIO_FN_RTS0_N_TANS, - GPIO_FN_MSIOF3_SS1, GPIO_FN_DU2_DG0, GPIO_FN_LCDOUT8, GPIO_FN_PWM1_B, - GPIO_FN_SCIFA1_RXD, GPIO_FN_AD_DI, GPIO_FN_RX1, - GPIO_FN_DU2_EXODDF_DU2_ODDF_DISP_CDE, GPIO_FN_QCPV_QDE, - GPIO_FN_SCIFA1_TXD, GPIO_FN_AD_DO, GPIO_FN_TX1, GPIO_FN_DU2_DG1, - GPIO_FN_LCDOUT9, GPIO_FN_SCIFA1_CTS_N, GPIO_FN_AD_CLK, - GPIO_FN_CTS1_N, GPIO_FN_MSIOF3_RXD, GPIO_FN_DU0_DOTCLKOUT, GPIO_FN_QCLK, - GPIO_FN_SCIFA1_RTS_N, GPIO_FN_AD_NCS_N, GPIO_FN_RTS1_N_TANS, - GPIO_FN_MSIOF3_TXD, GPIO_FN_DU1_DOTCLKOUT, GPIO_FN_QSTVB_QVE, - GPIO_FN_HRTS0_N_C, - - /* IPSR15 */ - GPIO_FN_SCIFA2_SCK, GPIO_FN_FMCLK, GPIO_FN_MSIOF3_SCK, GPIO_FN_DU2_DG7, - GPIO_FN_LCDOUT15, GPIO_FN_SCIF_CLK_B, GPIO_FN_SCIFA2_RXD, GPIO_FN_FMIN, - GPIO_FN_DU2_DB0, GPIO_FN_LCDOUT16, GPIO_FN_SCL2, GPIO_FN_SCL2_CIS, - GPIO_FN_SCIFA2_TXD, GPIO_FN_BPFCLK, GPIO_FN_DU2_DB1, GPIO_FN_LCDOUT17, - GPIO_FN_SDA2, GPIO_FN_SDA2_CIS, GPIO_FN_HSCK0, GPIO_FN_TS_SDEN0, - GPIO_FN_DU2_DG4, GPIO_FN_LCDOUT12, GPIO_FN_HCTS0_N_C, GPIO_FN_HRX0, - GPIO_FN_DU2_DB2, GPIO_FN_LCDOUT18, GPIO_FN_HTX0, GPIO_FN_DU2_DB3, - GPIO_FN_LCDOUT19, GPIO_FN_HCTS0_N, GPIO_FN_SSI_SCK9, GPIO_FN_DU2_DB4, - GPIO_FN_LCDOUT20, GPIO_FN_HRTS0_N, GPIO_FN_SSI_WS9, GPIO_FN_DU2_DB5, - GPIO_FN_LCDOUT21, GPIO_FN_MSIOF0_SCK, GPIO_FN_TS_SDAT0, GPIO_FN_ADICLK, - GPIO_FN_DU2_DB6, GPIO_FN_LCDOUT22, GPIO_FN_MSIOF0_SYNC, GPIO_FN_TS_SCK0, - GPIO_FN_SSI_SCK2, GPIO_FN_ADIDATA, GPIO_FN_DU2_DB7, GPIO_FN_LCDOUT23, - GPIO_FN_SCIFA2_RXD_B, GPIO_FN_MSIOF0_SS1, GPIO_FN_ADICHS0, - GPIO_FN_DU2_DG5, GPIO_FN_LCDOUT13, GPIO_FN_MSIOF0_TXD, GPIO_FN_ADICHS1, - GPIO_FN_DU2_DG6, GPIO_FN_LCDOUT14, - - /* IPSR16 */ - GPIO_FN_MSIOF0_SS2, GPIO_FN_AUDIO_CLKOUT, GPIO_FN_ADICHS2, - GPIO_FN_DU2_DISP, GPIO_FN_QPOLA, GPIO_FN_HTX0_C, GPIO_FN_SCIFA2_TXD_B, - GPIO_FN_MSIOF0_RXD, GPIO_FN_TS_SPSYNC0, GPIO_FN_SSI_WS2, - GPIO_FN_ADICS_SAMP, GPIO_FN_DU2_CDE, GPIO_FN_QPOLB, GPIO_FN_HRX0_C, - GPIO_FN_USB1_PWEN, GPIO_FN_AUDIO_CLKOUT_D, GPIO_FN_USB1_OVC, - GPIO_FN_TCLK1_B, -}; - -#endif /* __ASM_R8A7790_GPIO_H__ */ diff --git a/arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h b/arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h deleted file mode 100644 index 42e82597e78..00000000000 --- a/arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h +++ /dev/null @@ -1,438 +0,0 @@ -#ifndef __ASM_R8A7791_GPIO_H__ -#define __ASM_R8A7791_GPIO_H__ - -/* Pin Function Controller: - * GPIO_FN_xx - GPIO used to select pin function - * GPIO_GP_x_x - GPIO mapped to real I/O pin on CPU - */ -enum { - GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3, - GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7, - GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11, - GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15, - GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19, - GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23, - GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27, - GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31, - - GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3, - GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7, - GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11, - GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15, - GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19, - GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23, - GPIO_GP_1_24, GPIO_GP_1_25, - - GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3, - GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7, - GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11, - GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15, - GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19, - GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23, - GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27, - GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31, - - GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3, - GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7, - GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11, - GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15, - GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19, - GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23, - GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27, - GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31, - - GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3, - GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7, - GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11, - GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15, - GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19, - GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23, - GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27, - GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31, - - GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3, - GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7, - GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11, - GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15, - GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19, - GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23, - GPIO_GP_5_24, GPIO_GP_5_25, GPIO_GP_5_26, GPIO_GP_5_27, - GPIO_GP_5_28, GPIO_GP_5_29, GPIO_GP_5_30, GPIO_GP_5_31, - - GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3, - GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7, - GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11, - GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15, - GPIO_GP_6_16, GPIO_GP_6_17, GPIO_GP_6_18, GPIO_GP_6_19, - GPIO_GP_6_20, GPIO_GP_6_21, GPIO_GP_6_22, GPIO_GP_6_23, - GPIO_GP_6_24, GPIO_GP_6_25, GPIO_GP_6_26, GPIO_GP_6_27, - GPIO_GP_6_28, GPIO_GP_6_29, GPIO_GP_6_30, GPIO_GP_6_31, - - GPIO_GP_7_0, GPIO_GP_7_1, GPIO_GP_7_2, GPIO_GP_7_3, - GPIO_GP_7_4, GPIO_GP_7_5, GPIO_GP_7_6, GPIO_GP_7_7, - GPIO_GP_7_8, GPIO_GP_7_9, GPIO_GP_7_10, GPIO_GP_7_11, - GPIO_GP_7_12, GPIO_GP_7_13, GPIO_GP_7_14, GPIO_GP_7_15, - GPIO_GP_7_16, GPIO_GP_7_17, GPIO_GP_7_18, GPIO_GP_7_19, - GPIO_GP_7_20, GPIO_GP_7_21, GPIO_GP_7_22, GPIO_GP_7_23, - GPIO_GP_7_24, GPIO_GP_7_25, - - GPIO_FN_EX_CS0_N, GPIO_FN_RD_N, GPIO_FN_AUDIO_CLKA, - GPIO_FN_VI0_CLK, GPIO_FN_VI0_DATA0_VI0_B0, - GPIO_FN_VI0_DATA0_VI0_B1, GPIO_FN_VI0_DATA0_VI0_B2, - GPIO_FN_VI0_DATA0_VI0_B4, GPIO_FN_VI0_DATA0_VI0_B5, - GPIO_FN_VI0_DATA0_VI0_B6, GPIO_FN_VI0_DATA0_VI0_B7, - GPIO_FN_USB0_PWEN, GPIO_FN_USB0_OVC, GPIO_FN_USB1_PWEN, - - /* IPSR0 */ - GPIO_FN_D0, GPIO_FN_D1, GPIO_FN_D2, GPIO_FN_D3, GPIO_FN_D4, GPIO_FN_D5, - GPIO_FN_D6, GPIO_FN_D7, GPIO_FN_D8, GPIO_FN_D9, GPIO_FN_D10, - GPIO_FN_D11, GPIO_FN_D12, GPIO_FN_D13, GPIO_FN_D14, GPIO_FN_D15, - GPIO_FN_A0, GPIO_FN_ATAWR0_N_C, GPIO_FN_MSIOF0_SCK_B, - GPIO_FN_SCL0_C, GPIO_FN_PWM2_B, - GPIO_FN_A1, GPIO_FN_MSIOF0_SYNC_B, GPIO_FN_A2, GPIO_FN_MSIOF0_SS1_B, - GPIO_FN_A3, GPIO_FN_MSIOF0_SS2_B, GPIO_FN_A4, GPIO_FN_MSIOF0_TXD_B, - GPIO_FN_A5, GPIO_FN_MSIOF0_RXD_B, GPIO_FN_A6, GPIO_FN_MSIOF1_SCK, - - /* IPSR1 */ - GPIO_FN_A7, GPIO_FN_MSIOF1_SYNC, GPIO_FN_A8, - GPIO_FN_MSIOF1_SS1, GPIO_FN_SCL0, - GPIO_FN_A9, GPIO_FN_MSIOF1_SS2, GPIO_FN_SDA0, - GPIO_FN_A10, GPIO_FN_MSIOF1_TXD, GPIO_FN_MSIOF1_TXD_D, - GPIO_FN_A11, GPIO_FN_MSIOF1_RXD, GPIO_FN_SCL3_D, GPIO_FN_MSIOF1_RXD_D, - GPIO_FN_A12, GPIO_FN_FMCLK, GPIO_FN_SDA3_D, GPIO_FN_MSIOF1_SCK_D, - GPIO_FN_A13, GPIO_FN_ATAG0_N_C, GPIO_FN_BPFCLK, GPIO_FN_MSIOF1_SS1_D, - GPIO_FN_A14, GPIO_FN_ATADIR0_N_C, GPIO_FN_FMIN, - GPIO_FN_FMIN_C, GPIO_FN_MSIOF1_SYNC_D, - GPIO_FN_A15, GPIO_FN_BPFCLK_C, - GPIO_FN_A16, GPIO_FN_DREQ2_B, GPIO_FN_FMCLK_C, GPIO_FN_SCIFA1_SCK_B, - GPIO_FN_A17, GPIO_FN_DACK2_B, GPIO_FN_SDA0_C, - GPIO_FN_A18, GPIO_FN_DREQ1, GPIO_FN_SCIFA1_RXD_C, GPIO_FN_SCIFB1_RXD_C, - - /* IPSR2 */ - GPIO_FN_A19, GPIO_FN_DACK1, GPIO_FN_SCIFA1_TXD_C, - GPIO_FN_SCIFB1_TXD_C, GPIO_FN_SCIFB1_SCK_B, - GPIO_FN_A20, GPIO_FN_SPCLK, - GPIO_FN_A21, GPIO_FN_ATAWR0_N_B, GPIO_FN_MOSI_IO0, - GPIO_FN_A22, GPIO_FN_MISO_IO1, GPIO_FN_FMCLK_B, - GPIO_FN_TX0, GPIO_FN_SCIFA0_TXD, - GPIO_FN_A23, GPIO_FN_IO2, GPIO_FN_BPFCLK_B, - GPIO_FN_RX0, GPIO_FN_SCIFA0_RXD, - GPIO_FN_A24, GPIO_FN_DREQ2, GPIO_FN_IO3, - GPIO_FN_TX1, GPIO_FN_SCIFA1_TXD, - GPIO_FN_A25, GPIO_FN_DACK2, GPIO_FN_SSL, GPIO_FN_DREQ1_C, - GPIO_FN_RX1, GPIO_FN_SCIFA1_RXD, - GPIO_FN_CS0_N, GPIO_FN_ATAG0_N_B, GPIO_FN_SCL1, - GPIO_FN_CS1_N_A26, GPIO_FN_ATADIR0_N_B, GPIO_FN_SDA1, - GPIO_FN_EX_CS1_N, GPIO_FN_MSIOF2_SCK, - GPIO_FN_EX_CS2_N, GPIO_FN_ATAWR0_N, GPIO_FN_MSIOF2_SYNC, - GPIO_FN_EX_CS3_N, GPIO_FN_ATADIR0_N, GPIO_FN_MSIOF2_TXD, - GPIO_FN_ATAG0_N, GPIO_FN_EX_WAIT1, - - /* IPSR3 */ - GPIO_FN_EX_CS4_N, GPIO_FN_ATARD0_N, - GPIO_FN_MSIOF2_RXD, GPIO_FN_EX_WAIT2, - GPIO_FN_EX_CS5_N, GPIO_FN_ATACS00_N, GPIO_FN_MSIOF2_SS1, - GPIO_FN_HRX1_B, GPIO_FN_SCIFB1_RXD_B, - GPIO_FN_PWM1, GPIO_FN_TPU_TO1, - GPIO_FN_BS_N, GPIO_FN_ATACS10_N, GPIO_FN_MSIOF2_SS2, - GPIO_FN_HTX1_B, GPIO_FN_SCIFB1_TXD_B, - GPIO_FN_PWM2, GPIO_FN_TPU_TO2, - GPIO_FN_RD_WR_N, GPIO_FN_HRX2_B, GPIO_FN_FMIN_B, - GPIO_FN_SCIFB0_RXD_B, GPIO_FN_DREQ1_D, - GPIO_FN_WE0_N, GPIO_FN_HCTS2_N_B, GPIO_FN_SCIFB0_TXD_B, - GPIO_FN_WE1_N, GPIO_FN_ATARD0_N_B, - GPIO_FN_HTX2_B, GPIO_FN_SCIFB0_RTS_N_B, - GPIO_FN_EX_WAIT0, GPIO_FN_HRTS2_N_B, GPIO_FN_SCIFB0_CTS_N_B, - GPIO_FN_DREQ0, GPIO_FN_PWM3, GPIO_FN_TPU_TO3, - GPIO_FN_DACK0, GPIO_FN_DRACK0, GPIO_FN_REMOCON, - GPIO_FN_SPEEDIN, GPIO_FN_HSCK0_C, GPIO_FN_HSCK2_C, - GPIO_FN_SCIFB0_SCK_B, GPIO_FN_SCIFB2_SCK_B, - GPIO_FN_DREQ2_C, GPIO_FN_HTX2_D, - GPIO_FN_SSI_SCK0129, GPIO_FN_HRX0_C, GPIO_FN_HRX2_C, - GPIO_FN_SCIFB0_RXD_C, GPIO_FN_SCIFB2_RXD_C, - GPIO_FN_SSI_WS0129, GPIO_FN_HTX0_C, GPIO_FN_HTX2_C, - GPIO_FN_SCIFB0_TXD_C, GPIO_FN_SCIFB2_TXD_C, - - /* IPSR4 */ - GPIO_FN_SSI_SDATA0, GPIO_FN_SCL0_B, - GPIO_FN_SCL7_B, GPIO_FN_MSIOF2_SCK_C, - GPIO_FN_SSI_SCK1, GPIO_FN_SDA0_B, GPIO_FN_SDA7_B, - GPIO_FN_MSIOF2_SYNC_C, GPIO_FN_GLO_I0_D, - GPIO_FN_SSI_WS1, GPIO_FN_SCL1_B, GPIO_FN_SCL8_B, - GPIO_FN_MSIOF2_TXD_C, GPIO_FN_GLO_I1_D, - GPIO_FN_SSI_SDATA1, GPIO_FN_SDA1_B, - GPIO_FN_SDA8_B, GPIO_FN_MSIOF2_RXD_C, - GPIO_FN_SSI_SCK2, GPIO_FN_SCL2, GPIO_FN_GPS_CLK_B, - GPIO_FN_GLO_Q0_D, GPIO_FN_HSCK1_E, - GPIO_FN_SSI_WS2, GPIO_FN_SDA2, GPIO_FN_GPS_SIGN_B, - GPIO_FN_RX2_E, GPIO_FN_GLO_Q1_D, GPIO_FN_HCTS1_N_E, - GPIO_FN_SSI_SDATA2, GPIO_FN_GPS_MAG_B, - GPIO_FN_TX2_E, GPIO_FN_HRTS1_N_E, - GPIO_FN_SSI_SCK34, GPIO_FN_SSI_WS34, GPIO_FN_SSI_SDATA3, - GPIO_FN_SSI_SCK4, GPIO_FN_GLO_SS_D, - GPIO_FN_SSI_WS4, GPIO_FN_GLO_RFON_D, - GPIO_FN_SSI_SDATA4, GPIO_FN_MSIOF2_SCK_D, - GPIO_FN_SSI_SCK5, GPIO_FN_MSIOF1_SCK_C, - GPIO_FN_TS_SDATA0, GPIO_FN_GLO_I0, - GPIO_FN_MSIOF2_SYNC_D, GPIO_FN_VI1_R2_B, - - /* IPSR5 */ - GPIO_FN_SSI_WS5, GPIO_FN_MSIOF1_SYNC_C, GPIO_FN_TS_SCK0, - GPIO_FN_GLO_I1, GPIO_FN_MSIOF2_TXD_D, GPIO_FN_VI1_R3_B, - GPIO_FN_SSI_SDATA5, GPIO_FN_MSIOF1_TXD_C, GPIO_FN_TS_SDEN0, - GPIO_FN_GLO_Q0, GPIO_FN_MSIOF2_SS1_D, GPIO_FN_VI1_R4_B, - GPIO_FN_SSI_SCK6, GPIO_FN_MSIOF1_RXD_C, GPIO_FN_TS_SPSYNC0, - GPIO_FN_GLO_Q1, GPIO_FN_MSIOF2_RXD_D, GPIO_FN_VI1_R5_B, - GPIO_FN_SSI_WS6, GPIO_FN_GLO_SCLK, - GPIO_FN_MSIOF2_SS2_D, GPIO_FN_VI1_R6_B, - GPIO_FN_SSI_SDATA6, GPIO_FN_STP_IVCXO27_0_B, - GPIO_FN_GLO_SDATA, GPIO_FN_VI1_R7_B, - GPIO_FN_SSI_SCK78, GPIO_FN_STP_ISCLK_0_B, GPIO_FN_GLO_SS, - GPIO_FN_SSI_WS78, GPIO_FN_TX0_D, GPIO_FN_STP_ISD_0_B, GPIO_FN_GLO_RFON, - GPIO_FN_SSI_SDATA7, GPIO_FN_RX0_D, GPIO_FN_STP_ISEN_0_B, - GPIO_FN_SSI_SDATA8, GPIO_FN_TX1_D, GPIO_FN_STP_ISSYNC_0_B, - GPIO_FN_SSI_SCK9, GPIO_FN_RX1_D, GPIO_FN_GLO_SCLK_D, - GPIO_FN_SSI_WS9, GPIO_FN_TX3_D, GPIO_FN_CAN0_TX_D, GPIO_FN_GLO_SDATA_D, - GPIO_FN_SSI_SDATA9, GPIO_FN_RX3_D, GPIO_FN_CAN0_RX_D, - - /* IPSR6 */ - GPIO_FN_AUDIO_CLKB, GPIO_FN_STP_OPWM_0_B, GPIO_FN_MSIOF1_SCK_B, - GPIO_FN_SCIF_CLK, GPIO_FN_BPFCLK_E, - GPIO_FN_AUDIO_CLKC, GPIO_FN_SCIFB0_SCK_C, GPIO_FN_MSIOF1_SYNC_B, - GPIO_FN_RX2, GPIO_FN_SCIFA2_RXD, GPIO_FN_FMIN_E, - GPIO_FN_AUDIO_CLKOUT, GPIO_FN_MSIOF1_SS1_B, - GPIO_FN_TX2, GPIO_FN_SCIFA2_TXD, - GPIO_FN_IRQ0, GPIO_FN_SCIFB1_RXD_D, GPIO_FN_INTC_IRQ0_N, - GPIO_FN_IRQ1, GPIO_FN_SCIFB1_SCK_C, GPIO_FN_INTC_IRQ1_N, - GPIO_FN_IRQ2, GPIO_FN_SCIFB1_TXD_D, GPIO_FN_INTC_IRQ2_N, - GPIO_FN_IRQ3, GPIO_FN_SCL4_C, - GPIO_FN_MSIOF2_TXD_E, GPIO_FN_INTC_IRQ3_N, - GPIO_FN_IRQ4, GPIO_FN_HRX1_C, GPIO_FN_SDA4_C, - GPIO_FN_MSIOF2_RXD_E, GPIO_FN_INTC_IRQ4_N, - GPIO_FN_IRQ5, GPIO_FN_HTX1_C, GPIO_FN_SCL1_E, GPIO_FN_MSIOF2_SCK_E, - GPIO_FN_IRQ6, GPIO_FN_HSCK1_C, GPIO_FN_MSIOF1_SS2_B, - GPIO_FN_SDA1_E, GPIO_FN_MSIOF2_SYNC_E, - GPIO_FN_IRQ7, GPIO_FN_HCTS1_N_C, GPIO_FN_MSIOF1_TXD_B, - GPIO_FN_GPS_CLK_C, GPIO_FN_GPS_CLK_D, - GPIO_FN_IRQ8, GPIO_FN_HRTS1_N_C, GPIO_FN_MSIOF1_RXD_B, - GPIO_FN_GPS_SIGN_C, GPIO_FN_GPS_SIGN_D, - - /* IPSR7 */ - GPIO_FN_IRQ9, GPIO_FN_DU1_DOTCLKIN_B, GPIO_FN_CAN_CLK_D, - GPIO_FN_GPS_MAG_C, GPIO_FN_SCIF_CLK_B, GPIO_FN_GPS_MAG_D, - GPIO_FN_DU1_DR0, GPIO_FN_LCDOUT0, GPIO_FN_VI1_DATA0_B, GPIO_FN_TX0_B, - GPIO_FN_SCIFA0_TXD_B, GPIO_FN_MSIOF2_SCK_B, - GPIO_FN_DU1_DR1, GPIO_FN_LCDOUT1, GPIO_FN_VI1_DATA1_B, GPIO_FN_RX0_B, - GPIO_FN_SCIFA0_RXD_B, GPIO_FN_MSIOF2_SYNC_B, - GPIO_FN_DU1_DR2, GPIO_FN_LCDOUT2, GPIO_FN_SSI_SCK0129_B, - GPIO_FN_DU1_DR3, GPIO_FN_LCDOUT3, GPIO_FN_SSI_WS0129_B, - GPIO_FN_DU1_DR4, GPIO_FN_LCDOUT4, GPIO_FN_SSI_SDATA0_B, - GPIO_FN_DU1_DR5, GPIO_FN_LCDOUT5, GPIO_FN_SSI_SCK1_B, - GPIO_FN_DU1_DR6, GPIO_FN_LCDOUT6, GPIO_FN_SSI_WS1_B, - GPIO_FN_DU1_DR7, GPIO_FN_LCDOUT7, GPIO_FN_SSI_SDATA1_B, - GPIO_FN_DU1_DG0, GPIO_FN_LCDOUT8, GPIO_FN_VI1_DATA2_B, GPIO_FN_TX1_B, - GPIO_FN_SCIFA1_TXD_B, GPIO_FN_MSIOF2_SS1_B, - GPIO_FN_DU1_DG1, GPIO_FN_LCDOUT9, GPIO_FN_VI1_DATA3_B, GPIO_FN_RX1_B, - GPIO_FN_SCIFA1_RXD_B, GPIO_FN_MSIOF2_SS2_B, - GPIO_FN_DU1_DG2, GPIO_FN_LCDOUT10, GPIO_FN_VI1_DATA4_B, - GPIO_FN_SCIF1_SCK_B, GPIO_FN_SCIFA1_SCK, GPIO_FN_SSI_SCK78_B, - - /* IPSR8 */ - GPIO_FN_DU1_DG3, GPIO_FN_LCDOUT11, - GPIO_FN_VI1_DATA5_B, GPIO_FN_SSI_WS78_B, - GPIO_FN_DU1_DG4, GPIO_FN_LCDOUT12, GPIO_FN_VI1_DATA6_B, - GPIO_FN_HRX0_B, GPIO_FN_SCIFB2_RXD_B, GPIO_FN_SSI_SDATA7_B, - GPIO_FN_DU1_DG5, GPIO_FN_LCDOUT13, GPIO_FN_VI1_DATA7_B, - GPIO_FN_HCTS0_N_B, GPIO_FN_SCIFB2_TXD_B, GPIO_FN_SSI_SDATA8_B, - GPIO_FN_DU1_DG6, GPIO_FN_LCDOUT14, GPIO_FN_HRTS0_N_B, - GPIO_FN_SCIFB2_CTS_N_B, GPIO_FN_SSI_SCK9_B, - GPIO_FN_DU1_DG7, GPIO_FN_LCDOUT15, GPIO_FN_HTX0_B, - GPIO_FN_SCIFB2_RTS_N_B, GPIO_FN_SSI_WS9_B, - GPIO_FN_DU1_DB0, GPIO_FN_LCDOUT16, GPIO_FN_VI1_CLK_B, GPIO_FN_TX2_B, - GPIO_FN_SCIFA2_TXD_B, GPIO_FN_MSIOF2_TXD_B, - GPIO_FN_DU1_DB1, GPIO_FN_LCDOUT17, GPIO_FN_VI1_HSYNC_N_B, - GPIO_FN_RX2_B, GPIO_FN_SCIFA2_RXD_B, GPIO_FN_MSIOF2_RXD_B, - GPIO_FN_DU1_DB2, GPIO_FN_LCDOUT18, GPIO_FN_VI1_VSYNC_N_B, - GPIO_FN_SCIF2_SCK_B, GPIO_FN_SCIFA2_SCK, GPIO_FN_SSI_SDATA9_B, - GPIO_FN_DU1_DB3, GPIO_FN_LCDOUT19, GPIO_FN_VI1_CLKENB_B, - GPIO_FN_DU1_DB4, GPIO_FN_LCDOUT20, - GPIO_FN_VI1_FIELD_B, GPIO_FN_CAN1_RX, - GPIO_FN_DU1_DB5, GPIO_FN_LCDOUT21, GPIO_FN_TX3, - GPIO_FN_SCIFA3_TXD, GPIO_FN_CAN1_TX, - - /* IPSR9 */ - GPIO_FN_DU1_DB6, GPIO_FN_LCDOUT22, GPIO_FN_SCL3_C, - GPIO_FN_RX3, GPIO_FN_SCIFA3_RXD, - GPIO_FN_DU1_DB7, GPIO_FN_LCDOUT23, GPIO_FN_SDA3_C, - GPIO_FN_SCIF3_SCK, GPIO_FN_SCIFA3_SCK, - GPIO_FN_DU1_DOTCLKIN, GPIO_FN_QSTVA_QVS, - GPIO_FN_DU1_DOTCLKOUT0, GPIO_FN_QCLK, - GPIO_FN_DU1_DOTCLKOUT1, GPIO_FN_QSTVB_QVE, GPIO_FN_CAN0_TX, - GPIO_FN_TX3_B, GPIO_FN_SCL2_B, GPIO_FN_PWM4, - GPIO_FN_DU1_EXHSYNC_DU1_HSYNC, GPIO_FN_QSTH_QHS, - GPIO_FN_DU1_EXVSYNC_DU1_VSYNC, GPIO_FN_QSTB_QHE, - GPIO_FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, GPIO_FN_QCPV_QDE, - GPIO_FN_CAN0_RX, GPIO_FN_RX3_B, GPIO_FN_SDA2_B, - GPIO_FN_DU1_DISP, GPIO_FN_QPOLA, - GPIO_FN_DU1_CDE, GPIO_FN_QPOLB, GPIO_FN_PWM4_B, - GPIO_FN_VI0_CLKENB, GPIO_FN_TX4, - GPIO_FN_SCIFA4_TXD, GPIO_FN_TS_SDATA0_D, - GPIO_FN_VI0_FIELD, GPIO_FN_RX4, GPIO_FN_SCIFA4_RXD, GPIO_FN_TS_SCK0_D, - GPIO_FN_VI0_HSYNC_N, GPIO_FN_TX5, - GPIO_FN_SCIFA5_TXD, GPIO_FN_TS_SDEN0_D, - GPIO_FN_VI0_VSYNC_N, GPIO_FN_RX5, - GPIO_FN_SCIFA5_RXD, GPIO_FN_TS_SPSYNC0_D, - GPIO_FN_VI0_DATA3_VI0_B3, GPIO_FN_SCIF3_SCK_B, GPIO_FN_SCIFA3_SCK_B, - GPIO_FN_VI0_G0, GPIO_FN_SCL8, GPIO_FN_STP_IVCXO27_0_C, GPIO_FN_SCL4, - GPIO_FN_HCTS2_N, GPIO_FN_SCIFB2_CTS_N, GPIO_FN_ATAWR1_N, - - /* IPSR10 */ - GPIO_FN_VI0_G1, GPIO_FN_SDA8, GPIO_FN_STP_ISCLK_0_C, GPIO_FN_SDA4, - GPIO_FN_HRTS2_N, GPIO_FN_SCIFB2_RTS_N, GPIO_FN_ATADIR1_N, - GPIO_FN_VI0_G2, GPIO_FN_VI2_HSYNC_N, GPIO_FN_STP_ISD_0_C, - GPIO_FN_SCL3_B, GPIO_FN_HSCK2, GPIO_FN_SCIFB2_SCK, GPIO_FN_ATARD1_N, - GPIO_FN_VI0_G3, GPIO_FN_VI2_VSYNC_N, GPIO_FN_STP_ISEN_0_C, - GPIO_FN_SDA3_B, GPIO_FN_HRX2, GPIO_FN_SCIFB2_RXD, GPIO_FN_ATACS01_N, - GPIO_FN_VI0_G4, GPIO_FN_VI2_CLKENB, GPIO_FN_STP_ISSYNC_0_C, - GPIO_FN_HTX2, GPIO_FN_SCIFB2_TXD, GPIO_FN_SCIFB0_SCK_D, - GPIO_FN_VI0_G5, GPIO_FN_VI2_FIELD, GPIO_FN_STP_OPWM_0_C, - GPIO_FN_FMCLK_D, GPIO_FN_CAN0_TX_E, - GPIO_FN_HTX1_D, GPIO_FN_SCIFB0_TXD_D, - GPIO_FN_VI0_G6, GPIO_FN_VI2_CLK, GPIO_FN_BPFCLK_D, - GPIO_FN_VI0_G7, GPIO_FN_VI2_DATA0, GPIO_FN_FMIN_D, - GPIO_FN_VI0_R0, GPIO_FN_VI2_DATA1, GPIO_FN_GLO_I0_B, - GPIO_FN_TS_SDATA0_C, GPIO_FN_ATACS11_N, - GPIO_FN_VI0_R1, GPIO_FN_VI2_DATA2, GPIO_FN_GLO_I1_B, - GPIO_FN_TS_SCK0_C, GPIO_FN_ATAG1_N, - GPIO_FN_VI0_R2, GPIO_FN_VI2_DATA3, - GPIO_FN_GLO_Q0_B, GPIO_FN_TS_SDEN0_C, - GPIO_FN_VI0_R3, GPIO_FN_VI2_DATA4, - GPIO_FN_GLO_Q1_B, GPIO_FN_TS_SPSYNC0_C, - GPIO_FN_VI0_R4, GPIO_FN_VI2_DATA5, GPIO_FN_GLO_SCLK_B, - GPIO_FN_TX0_C, GPIO_FN_SCL1_D, - - /* IPSR11 */ - GPIO_FN_VI0_R5, GPIO_FN_VI2_DATA6, GPIO_FN_GLO_SDATA_B, - GPIO_FN_RX0_C, GPIO_FN_SDA1_D, - GPIO_FN_VI0_R6, GPIO_FN_VI2_DATA7, GPIO_FN_GLO_SS_B, - GPIO_FN_TX1_C, GPIO_FN_SCL4_B, - GPIO_FN_VI0_R7, GPIO_FN_GLO_RFON_B, GPIO_FN_RX1_C, GPIO_FN_CAN0_RX_E, - GPIO_FN_SDA4_B, GPIO_FN_HRX1_D, GPIO_FN_SCIFB0_RXD_D, - GPIO_FN_VI1_HSYNC_N, GPIO_FN_AVB_RXD0, GPIO_FN_TS_SDATA0_B, - GPIO_FN_TX4_B, GPIO_FN_SCIFA4_TXD_B, - GPIO_FN_VI1_VSYNC_N, GPIO_FN_AVB_RXD1, GPIO_FN_TS_SCK0_B, - GPIO_FN_RX4_B, GPIO_FN_SCIFA4_RXD_B, - GPIO_FN_VI1_CLKENB, GPIO_FN_AVB_RXD2, GPIO_FN_TS_SDEN0_B, - GPIO_FN_VI1_FIELD, GPIO_FN_AVB_RXD3, GPIO_FN_TS_SPSYNC0_B, - GPIO_FN_VI1_CLK, GPIO_FN_AVB_RXD4, GPIO_FN_VI1_DATA0, GPIO_FN_AVB_RXD5, - GPIO_FN_VI1_DATA1, GPIO_FN_AVB_RXD6, - GPIO_FN_VI1_DATA2, GPIO_FN_AVB_RXD7, - GPIO_FN_VI1_DATA3, GPIO_FN_AVB_RX_ER, - GPIO_FN_VI1_DATA4, GPIO_FN_AVB_MDIO, - GPIO_FN_VI1_DATA5, GPIO_FN_AVB_RX_DV, - GPIO_FN_VI1_DATA6, GPIO_FN_AVB_MAGIC, - GPIO_FN_VI1_DATA7, GPIO_FN_AVB_MDC, - GPIO_FN_ETH_MDIO, GPIO_FN_AVB_RX_CLK, GPIO_FN_SCL2_C, - GPIO_FN_ETH_CRS_DV, GPIO_FN_AVB_LINK, GPIO_FN_SDA2_C, - - /* IPSR12 */ - GPIO_FN_ETH_RX_ER, GPIO_FN_AVB_CRS, GPIO_FN_SCL3, GPIO_FN_SCL7, - GPIO_FN_ETH_RXD0, GPIO_FN_AVB_PHY_INT, GPIO_FN_SDA3, GPIO_FN_SDA7, - GPIO_FN_ETH_RXD1, GPIO_FN_AVB_GTXREFCLK, GPIO_FN_CAN0_TX_C, - GPIO_FN_SCL2_D, GPIO_FN_MSIOF1_RXD_E, - GPIO_FN_ETH_LINK, GPIO_FN_AVB_TXD0, GPIO_FN_CAN0_RX_C, - GPIO_FN_SDA2_D, GPIO_FN_MSIOF1_SCK_E, - GPIO_FN_ETH_REFCLK, GPIO_FN_AVB_TXD1, GPIO_FN_SCIFA3_RXD_B, - GPIO_FN_CAN1_RX_C, GPIO_FN_MSIOF1_SYNC_E, - GPIO_FN_ETH_TXD1, GPIO_FN_AVB_TXD2, GPIO_FN_SCIFA3_TXD_B, - GPIO_FN_CAN1_TX_C, GPIO_FN_MSIOF1_TXD_E, - GPIO_FN_ETH_TX_EN, GPIO_FN_AVB_TXD3, - GPIO_FN_TCLK1_B, GPIO_FN_CAN_CLK_B, - GPIO_FN_ETH_MAGIC, GPIO_FN_AVB_TXD4, GPIO_FN_IETX_C, - GPIO_FN_ETH_TXD0, GPIO_FN_AVB_TXD5, GPIO_FN_IECLK_C, - GPIO_FN_ETH_MDC, GPIO_FN_AVB_TXD6, GPIO_FN_IERX_C, - GPIO_FN_STP_IVCXO27_0, GPIO_FN_AVB_TXD7, GPIO_FN_SCIFB2_TXD_D, - GPIO_FN_ADIDATA_B, GPIO_FN_MSIOF0_SYNC_C, - GPIO_FN_STP_ISCLK_0, GPIO_FN_AVB_TX_EN, GPIO_FN_SCIFB2_RXD_D, - GPIO_FN_ADICS_SAMP_B, GPIO_FN_MSIOF0_SCK_C, - - /* IPSR13 */ - GPIO_FN_STP_ISD_0, GPIO_FN_AVB_TX_ER, GPIO_FN_SCIFB2_SCK_C, - GPIO_FN_ADICLK_B, GPIO_FN_MSIOF0_SS1_C, - GPIO_FN_STP_ISEN_0, GPIO_FN_AVB_TX_CLK, - GPIO_FN_ADICHS0_B, GPIO_FN_MSIOF0_SS2_C, - GPIO_FN_STP_ISSYNC_0, GPIO_FN_AVB_COL, - GPIO_FN_ADICHS1_B, GPIO_FN_MSIOF0_RXD_C, - GPIO_FN_STP_OPWM_0, GPIO_FN_AVB_GTX_CLK, GPIO_FN_PWM0_B, - GPIO_FN_ADICHS2_B, GPIO_FN_MSIOF0_TXD_C, - GPIO_FN_SD0_CLK, GPIO_FN_SPCLK_B, GPIO_FN_SD0_CMD, GPIO_FN_MOSI_IO0_B, - GPIO_FN_SD0_DATA0, GPIO_FN_MISO_IO1_B, - GPIO_FN_SD0_DATA1, GPIO_FN_IO2_B, - GPIO_FN_SD0_DATA2, GPIO_FN_IO3_B, GPIO_FN_SD0_DATA3, GPIO_FN_SSL_B, - GPIO_FN_SD0_CD, GPIO_FN_MMC_D6_B, - GPIO_FN_SIM0_RST_B, GPIO_FN_CAN0_RX_F, - GPIO_FN_SCIFA5_TXD_B, GPIO_FN_TX3_C, - GPIO_FN_SD0_WP, GPIO_FN_MMC_D7_B, GPIO_FN_SIM0_D_B, GPIO_FN_CAN0_TX_F, - GPIO_FN_SCIFA5_RXD_B, GPIO_FN_RX3_C, - GPIO_FN_SD1_CMD, GPIO_FN_REMOCON_B, - GPIO_FN_SD1_DATA0, GPIO_FN_SPEEDIN_B, - GPIO_FN_SD1_DATA1, GPIO_FN_IETX_B, GPIO_FN_SD1_DATA2, GPIO_FN_IECLK_B, - GPIO_FN_SD1_DATA3, GPIO_FN_IERX_B, - GPIO_FN_SD1_CD, GPIO_FN_PWM0, GPIO_FN_TPU_TO0, GPIO_FN_SCL1_C, - - /* IPSR14 */ - GPIO_FN_SD1_WP, GPIO_FN_PWM1_B, GPIO_FN_SDA1_C, - GPIO_FN_SD2_CLK, GPIO_FN_MMC_CLK, GPIO_FN_SD2_CMD, GPIO_FN_MMC_CMD, - GPIO_FN_SD2_DATA0, GPIO_FN_MMC_D0, GPIO_FN_SD2_DATA1, GPIO_FN_MMC_D1, - GPIO_FN_SD2_DATA2, GPIO_FN_MMC_D2, GPIO_FN_SD2_DATA3, GPIO_FN_MMC_D3, - GPIO_FN_SD2_CD, GPIO_FN_MMC_D4, GPIO_FN_SCL8_C, - GPIO_FN_TX5_B, GPIO_FN_SCIFA5_TXD_C, - GPIO_FN_SD2_WP, GPIO_FN_MMC_D5, GPIO_FN_SDA8_C, - GPIO_FN_RX5_B, GPIO_FN_SCIFA5_RXD_C, - GPIO_FN_MSIOF0_SCK, GPIO_FN_RX2_C, GPIO_FN_ADIDATA, - GPIO_FN_VI1_CLK_C, GPIO_FN_VI1_G0_B, - GPIO_FN_MSIOF0_SYNC, GPIO_FN_TX2_C, GPIO_FN_ADICS_SAMP, - GPIO_FN_VI1_CLKENB_C, GPIO_FN_VI1_G1_B, - GPIO_FN_MSIOF0_TXD, GPIO_FN_ADICLK, - GPIO_FN_VI1_FIELD_C, GPIO_FN_VI1_G2_B, - GPIO_FN_MSIOF0_RXD, GPIO_FN_ADICHS0, - GPIO_FN_VI1_DATA0_C, GPIO_FN_VI1_G3_B, - GPIO_FN_MSIOF0_SS1, GPIO_FN_MMC_D6, GPIO_FN_ADICHS1, GPIO_FN_TX0_E, - GPIO_FN_VI1_HSYNC_N_C, GPIO_FN_SCL7_C, GPIO_FN_VI1_G4_B, - GPIO_FN_MSIOF0_SS2, GPIO_FN_MMC_D7, GPIO_FN_ADICHS2, GPIO_FN_RX0_E, - GPIO_FN_VI1_VSYNC_N_C, GPIO_FN_SDA7_C, GPIO_FN_VI1_G5_B, - - /* IPSR15 */ - GPIO_FN_SIM0_RST, GPIO_FN_IETX, GPIO_FN_CAN1_TX_D, - GPIO_FN_SIM0_CLK, GPIO_FN_IECLK, GPIO_FN_CAN_CLK_C, - GPIO_FN_SIM0_D, GPIO_FN_IERX, GPIO_FN_CAN1_RX_D, - GPIO_FN_GPS_CLK, GPIO_FN_DU1_DOTCLKIN_C, GPIO_FN_AUDIO_CLKB_B, - GPIO_FN_PWM5_B, GPIO_FN_SCIFA3_TXD_C, - GPIO_FN_GPS_SIGN, GPIO_FN_TX4_C, GPIO_FN_SCIFA4_TXD_C, GPIO_FN_PWM5, - GPIO_FN_VI1_G6_B, GPIO_FN_SCIFA3_RXD_C, - GPIO_FN_GPS_MAG, GPIO_FN_RX4_C, GPIO_FN_SCIFA4_RXD_C, GPIO_FN_PWM6, - GPIO_FN_VI1_G7_B, GPIO_FN_SCIFA3_SCK_C, - GPIO_FN_HCTS0_N, GPIO_FN_SCIFB0_CTS_N, GPIO_FN_GLO_I0_C, - GPIO_FN_TCLK1, GPIO_FN_VI1_DATA1_C, - GPIO_FN_HRTS0_N, GPIO_FN_SCIFB0_RTS_N, - GPIO_FN_GLO_I1_C, GPIO_FN_VI1_DATA2_C, - GPIO_FN_HSCK0, GPIO_FN_SCIFB0_SCK, GPIO_FN_GLO_Q0_C, GPIO_FN_CAN_CLK, - GPIO_FN_TCLK2, GPIO_FN_VI1_DATA3_C, - GPIO_FN_HRX0, GPIO_FN_SCIFB0_RXD, GPIO_FN_GLO_Q1_C, - GPIO_FN_CAN0_RX_B, GPIO_FN_VI1_DATA4_C, - GPIO_FN_HTX0, GPIO_FN_SCIFB0_TXD, GPIO_FN_GLO_SCLK_C, - GPIO_FN_CAN0_TX_B, GPIO_FN_VI1_DATA5_C, - - /* IPSR16 */ - GPIO_FN_HRX1, GPIO_FN_SCIFB1_RXD, GPIO_FN_VI1_R0_B, - GPIO_FN_GLO_SDATA_C, GPIO_FN_VI1_DATA6_C, - GPIO_FN_HTX1, GPIO_FN_SCIFB1_TXD, GPIO_FN_VI1_R1_B, - GPIO_FN_GLO_SS_C, GPIO_FN_VI1_DATA7_C, - GPIO_FN_HSCK1, GPIO_FN_SCIFB1_SCK, GPIO_FN_MLB_CK, GPIO_FN_GLO_RFON_C, - GPIO_FN_HCTS1_N, GPIO_FN_SCIFB1_CTS_N, - GPIO_FN_MLB_SIG, GPIO_FN_CAN1_TX_B, - GPIO_FN_HRTS1_N, GPIO_FN_SCIFB1_RTS_N, - GPIO_FN_MLB_DAT, GPIO_FN_CAN1_RX_B, -}; - -#endif /* __ASM_R8A7791_GPIO_H__ */ diff --git a/arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h b/arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h deleted file mode 100644 index 86931c3fee7..00000000000 --- a/arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h +++ /dev/null @@ -1,220 +0,0 @@ -#ifndef __ASM_R8A7792_GPIO_H__ -#define __ASM_R8A7792_GPIO_H__ - -/* Pin Function Controller: - * GPIO_FN_xx - GPIO used to select pin function - * GPIO_GP_x_x - GPIO mapped to real I/O pin on CPU - */ -enum { - GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3, - GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7, - GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11, - GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15, - GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19, - GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23, - GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27, - GPIO_GP_0_28, - - GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3, - GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7, - GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11, - GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15, - GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19, - GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, - - GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3, - GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7, - GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11, - GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15, - GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19, - GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23, - GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27, - GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31, - - GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3, - GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7, - GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11, - GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15, - GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19, - GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23, - GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27, - GPIO_GP_3_28, - - GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3, - GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7, - GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11, - GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15, - GPIO_GP_4_16, - - GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3, - GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7, - GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11, - GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15, - GPIO_GP_5_16, - - GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3, - GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7, - GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11, - GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15, - GPIO_GP_6_16, - - GPIO_GP_7_0, GPIO_GP_7_1, GPIO_GP_7_2, GPIO_GP_7_3, - GPIO_GP_7_4, GPIO_GP_7_5, GPIO_GP_7_6, GPIO_GP_7_7, - GPIO_GP_7_8, GPIO_GP_7_9, GPIO_GP_7_10, GPIO_GP_7_11, - GPIO_GP_7_12, GPIO_GP_7_13, GPIO_GP_7_14, GPIO_GP_7_15, - GPIO_GP_7_16, - - GPIO_GP_8_0, GPIO_GP_8_1, GPIO_GP_8_2, GPIO_GP_8_3, - GPIO_GP_8_4, GPIO_GP_8_5, GPIO_GP_8_6, GPIO_GP_8_7, - GPIO_GP_8_8, GPIO_GP_8_9, GPIO_GP_8_10, GPIO_GP_8_11, - GPIO_GP_8_12, GPIO_GP_8_13, GPIO_GP_8_14, GPIO_GP_8_15, - GPIO_GP_8_16, - - GPIO_GP_9_0, GPIO_GP_9_1, GPIO_GP_9_2, GPIO_GP_9_3, - GPIO_GP_9_4, GPIO_GP_9_5, GPIO_GP_9_6, GPIO_GP_9_7, - GPIO_GP_9_8, GPIO_GP_9_9, GPIO_GP_9_10, GPIO_GP_9_11, - GPIO_GP_9_12, GPIO_GP_9_13, GPIO_GP_9_14, GPIO_GP_9_15, - GPIO_GP_9_16, - - GPIO_GP_10_0, GPIO_GP_10_1, GPIO_GP_10_2, GPIO_GP_10_3, - GPIO_GP_10_4, GPIO_GP_10_5, GPIO_GP_10_6, GPIO_GP_10_7, - GPIO_GP_10_8, GPIO_GP_10_9, GPIO_GP_10_10, GPIO_GP_10_11, - GPIO_GP_10_12, GPIO_GP_10_13, GPIO_GP_10_14, GPIO_GP_10_15, - GPIO_GP_10_16, GPIO_GP_10_17, GPIO_GP_10_18, GPIO_GP_10_19, - GPIO_GP_10_20, GPIO_GP_10_21, GPIO_GP_10_22, GPIO_GP_10_23, - GPIO_GP_10_24, GPIO_GP_10_25, GPIO_GP_10_26, GPIO_GP_10_27, - GPIO_GP_10_28, GPIO_GP_10_29, GPIO_GP_10_30, GPIO_GP_10_31, - - GPIO_GP_11_0, GPIO_GP_11_1, GPIO_GP_11_2, GPIO_GP_11_3, - GPIO_GP_11_4, GPIO_GP_11_5, GPIO_GP_11_6, GPIO_GP_11_7, - GPIO_GP_11_8, GPIO_GP_11_9, GPIO_GP_11_10, GPIO_GP_11_11, - GPIO_GP_11_12, GPIO_GP_11_13, GPIO_GP_11_14, GPIO_GP_11_15, - GPIO_GP_11_16, GPIO_GP_11_17, GPIO_GP_11_18, GPIO_GP_11_19, - GPIO_GP_11_20, GPIO_GP_11_21, GPIO_GP_11_22, GPIO_GP_11_23, - GPIO_GP_11_24, GPIO_GP_11_25, GPIO_GP_11_26, GPIO_GP_11_27, - GPIO_GP_11_28, GPIO_GP_11_29, - - GPIO_FN_DU1_DB2_C0_DATA12, GPIO_FN_DU1_DB3_C1_DATA13, - GPIO_FN_DU1_DB4_C2_DATA14, GPIO_FN_DU1_DB5_C3_DATA15, - GPIO_FN_DU1_DB6_C4, GPIO_FN_DU1_DB7_C5, GPIO_FN_DU1_EXHSYNC_DU1_HSYNC, GPIO_FN_DU1_EXVSYNC_DU1_VSYNC, - GPIO_FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, GPIO_FN_DU1_DISP, GPIO_FN_DU1_CDE, - - GPIO_FN_D0, GPIO_FN_D1, GPIO_FN_D2, GPIO_FN_D3, GPIO_FN_D4, GPIO_FN_D5, - GPIO_FN_D6, GPIO_FN_D7, GPIO_FN_D8, GPIO_FN_D9, GPIO_FN_D10, GPIO_FN_D11, - GPIO_FN_D12, GPIO_FN_D13, GPIO_FN_D14, GPIO_FN_D15, GPIO_FN_A0, GPIO_FN_A1, - GPIO_FN_A2, GPIO_FN_A3, GPIO_FN_A4, GPIO_FN_A5, GPIO_FN_A6, GPIO_FN_A7, - GPIO_FN_A8, GPIO_FN_A9, GPIO_FN_A10, GPIO_FN_A11, GPIO_FN_A12, GPIO_FN_A13, - GPIO_FN_A14, GPIO_FN_A15, - - GPIO_FN_A16, GPIO_FN_A17, GPIO_FN_A18, GPIO_FN_A19, - GPIO_FN_CS1_A26, GPIO_FN_EX_CS0, GPIO_FN_EX_CS1, GPIO_FN_EX_CS2, - GPIO_FN_EX_CS3, GPIO_FN_EX_CS4, GPIO_FN_EX_CS5, GPIO_FN_BS, - GPIO_FN_RD, GPIO_FN_RD_WR, GPIO_FN_WE0, GPIO_FN_WE1, GPIO_FN_EX_WAIT0, - GPIO_FN_IRQ0, GPIO_FN_IRQ1, GPIO_FN_IRQ2, GPIO_FN_IRQ3, GPIO_FN_CS0, - - GPIO_FN_VI0_CLK, GPIO_FN_VI0_CLKENB, GPIO_FN_VI0_HSYNC, GPIO_FN_VI0_VSYNC, - GPIO_FN_VI0_D0_B0_C0, GPIO_FN_VI0_D1_B1_C1, GPIO_FN_VI0_D2_B2_C2, GPIO_FN_VI0_D3_B3_C3, - GPIO_FN_VI0_D4_B4_C4, GPIO_FN_VI0_D5_B5_C5, GPIO_FN_VI0_D6_B6_C6, GPIO_FN_VI0_D7_B7_C7, - GPIO_FN_VI0_D8_G0_Y0, GPIO_FN_VI0_D9_G1_Y1, GPIO_FN_VI0_D10_G2_Y2, GPIO_FN_VI0_D11_G3_Y3, - GPIO_FN_VI0_FIELD, - - GPIO_FN_VI1_CLK, GPIO_FN_VI1_CLKENB, GPIO_FN_VI1_HSYNC, - GPIO_FN_VI1_VSYNC, GPIO_FN_VI1_D0_B0_C0, GPIO_FN_VI1_D1_B1_C1, - GPIO_FN_VI1_D2_B2_C2, GPIO_FN_VI1_D3_B3_C3, GPIO_FN_VI1_D4_B4_C4, - GPIO_FN_VI1_D5_B5_C5, GPIO_FN_VI1_D6_B6_C6, GPIO_FN_VI1_D7_B7_C7, - GPIO_FN_VI1_D8_G0_Y0, GPIO_FN_VI1_D9_G1_Y1, GPIO_FN_VI1_D10_G2_Y2, - GPIO_FN_VI1_D11_G3_Y3, GPIO_FN_VI1_FIELD, - - GPIO_FN_VI3_D10_Y2, GPIO_FN_VI3_FIELD, - - GPIO_FN_VI4_CLK, - - GPIO_FN_VI5_CLK, GPIO_FN_VI5_D9_Y1, GPIO_FN_VI5_D10_Y2, GPIO_FN_VI5_D11_Y3, GPIO_FN_VI5_FIELD, - - GPIO_FN_HRTS0, GPIO_FN_HCTS1, GPIO_FN_SCK0, GPIO_FN_CTS0, GPIO_FN_RTS0, GPIO_FN_TX0, - GPIO_FN_RX0, GPIO_FN_SCK1, GPIO_FN_CTS1, GPIO_FN_RTS1, GPIO_FN_TX1, GPIO_FN_RX1, - GPIO_FN_SCIF_CLK, GPIO_FN_CAN0_TX, GPIO_FN_CAN0_RX, - GPIO_FN_CAN_CLK, GPIO_FN_CAN1_TX, GPIO_FN_CAN1_RX, - - GPIO_FN_SD0_CLK, GPIO_FN_SD0_CMD, GPIO_FN_SD0_DAT0, - GPIO_FN_SD0_DAT1, GPIO_FN_SD0_DAT2, GPIO_FN_SD0_DAT3, - GPIO_FN_SD0_CD, GPIO_FN_SD0_WP, GPIO_FN_ADICLK, - GPIO_FN_ADICS_SAMP, GPIO_FN_ADIDATA, GPIO_FN_ADICHS0, - GPIO_FN_ADICHS1, GPIO_FN_ADICHS2, GPIO_FN_AVS1, GPIO_FN_AVS2, - - GPIO_FN_DU0_DR0_DATA0, GPIO_FN_DU0_DR1_DATA1, GPIO_FN_DU0_DR2_Y4_DATA2, - GPIO_FN_DU0_DR3_Y5_DATA3, GPIO_FN_DU0_DR4_Y6_DATA4, GPIO_FN_DU0_DR5_Y7_DATA5, - GPIO_FN_DU0_DR6_Y8_DATA6, GPIO_FN_DU0_DR7_Y9_DATA7, GPIO_FN_DU0_DG0_DATA8, - GPIO_FN_DU0_DG1_DATA9, GPIO_FN_DU0_DG2_C6_DATA10, GPIO_FN_DU0_DG3_C7_DATA11, - GPIO_FN_DU0_DG4_Y0_DATA12, GPIO_FN_DU0_DG5_Y1_DATA13, GPIO_FN_DU0_DG6_Y2_DATA14, - GPIO_FN_DU0_DG7_Y3_DATA15, GPIO_FN_DU0_DB0, GPIO_FN_DU0_DB1, - GPIO_FN_DU0_DB2_C0, GPIO_FN_DU0_DB3_C1, GPIO_FN_DU0_DB4_C2, - GPIO_FN_DU0_DB5_C3, GPIO_FN_DU0_DB6_C4, GPIO_FN_DU0_DB7_C5, - - GPIO_FN_DU0_EXHSYNC_DU0_HSYNC, GPIO_FN_DU0_EXVSYNC_DU0_VSYNC, - GPIO_FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, GPIO_FN_DU0_DISP, GPIO_FN_DU0_CDE, - GPIO_FN_DU1_DR2_Y4_DATA0, GPIO_FN_DU1_DR3_Y5_DATA1, GPIO_FN_DU1_DR4_Y6_DATA2, - GPIO_FN_DU1_DR5_Y7_DATA3, GPIO_FN_DU1_DR6_DATA4, GPIO_FN_DU1_DR7_DATA5, - GPIO_FN_DU1_DG2_C6_DATA6, GPIO_FN_DU1_DG3_C7_DATA7, GPIO_FN_DU1_DG4_Y0_DATA8, - GPIO_FN_DU1_DG5_Y1_DATA9, GPIO_FN_DU1_DG6_Y2_DATA10, GPIO_FN_DU1_DG7_Y3_DATA11, - GPIO_FN_A20, GPIO_FN_MOSI_IO0, GPIO_FN_A21, GPIO_FN_MISO_IO1, GPIO_FN_A22, GPIO_FN_IO2, - GPIO_FN_A23, GPIO_FN_IO3, GPIO_FN_A24, GPIO_FN_SPCLK, GPIO_FN_A25, GPIO_FN_SSL, - - GPIO_FN_VI2_CLK, GPIO_FN_AVB_RX_CLK, GPIO_FN_VI2_CLKENB, GPIO_FN_AVB_RX_DV, - GPIO_FN_VI2_HSYNC, GPIO_FN_AVB_RXD0, GPIO_FN_VI2_VSYNC, GPIO_FN_AVB_RXD1, - GPIO_FN_VI2_D0_C0, GPIO_FN_AVB_RXD2, GPIO_FN_VI2_D1_C1, GPIO_FN_AVB_RXD3, - GPIO_FN_VI2_D2_C2, GPIO_FN_AVB_RXD4, GPIO_FN_VI2_D3_C3, GPIO_FN_AVB_RXD5, - GPIO_FN_VI2_D4_C4, GPIO_FN_AVB_RXD6, GPIO_FN_VI2_D5_C5, GPIO_FN_AVB_RXD7, - GPIO_FN_VI2_D6_C6, GPIO_FN_AVB_RX_ER, GPIO_FN_VI2_D7_C7, GPIO_FN_AVB_COL, - GPIO_FN_VI2_D8_Y0, GPIO_FN_AVB_TXD3, GPIO_FN_VI2_D9_Y1, GPIO_FN_AVB_TX_EN, - GPIO_FN_VI2_D10_Y2, GPIO_FN_AVB_TXD0, GPIO_FN_VI2_D11_Y3, GPIO_FN_AVB_TXD1, - GPIO_FN_VI2_FIELD, GPIO_FN_AVB_TXD2, - - GPIO_FN_VI3_CLK, GPIO_FN_AVB_TX_CLK, GPIO_FN_VI3_CLKENB, GPIO_FN_AVB_TXD4, - GPIO_FN_VI3_HSYNC, GPIO_FN_AVB_TXD5, GPIO_FN_VI3_VSYNC, GPIO_FN_AVB_TXD6, - GPIO_FN_VI3_D0_C0, GPIO_FN_AVB_TXD7, GPIO_FN_VI3_D1_C1, GPIO_FN_AVB_TX_ER, - GPIO_FN_VI3_D2_C2, GPIO_FN_AVB_GTX_CLK, GPIO_FN_VI3_D3_C3, GPIO_FN_AVB_MDC, - GPIO_FN_VI3_D4_C4, GPIO_FN_AVB_MDIO, GPIO_FN_VI3_D5_C5, GPIO_FN_AVB_LINK, - GPIO_FN_VI3_D6_C6, GPIO_FN_AVB_MAGIC, GPIO_FN_VI3_D7_C7, GPIO_FN_AVB_PHY_INT, - GPIO_FN_VI3_D8_Y0, GPIO_FN_AVB_CRS, GPIO_FN_VI3_D9_Y1, GPIO_FN_AVB_GTXREFCLK, - GPIO_FN_VI3_D11_Y3, - - GPIO_FN_VI4_CLKENB, GPIO_FN_VI0_D12_G4_Y4, GPIO_FN_VI4_HSYNC, GPIO_FN_VI0_D13_G5_Y5, - GPIO_FN_VI4_VSYNC, GPIO_FN_VI0_D14_G6_Y6, GPIO_FN_VI4_D0_C0, GPIO_FN_VI0_D15_G7_Y7, - GPIO_FN_VI4_D1_C1, GPIO_FN_VI0_D16_R0, GPIO_FN_VI1_D12_G4_Y4_0, - GPIO_FN_VI4_D2_C2, GPIO_FN_VI0_D17_R1, GPIO_FN_VI1_D13_G5_Y5_0, - GPIO_FN_VI4_D3_C3, GPIO_FN_VI0_D18_R2, GPIO_FN_VI1_D14_G6_Y6_0, - GPIO_FN_VI4_D4_C4, GPIO_FN_VI0_D19_R3, GPIO_FN_VI1_D15_G7_Y7_0, - GPIO_FN_VI4_D5_C5, GPIO_FN_VI0_D20_R4, GPIO_FN_VI2_D12_Y4, - GPIO_FN_VI4_D6_C6, GPIO_FN_VI0_D21_R5, GPIO_FN_VI2_D13_Y5, - GPIO_FN_VI4_D7_C7, GPIO_FN_VI0_D22_R6, GPIO_FN_VI2_D14_Y6, - GPIO_FN_VI4_D8_Y0, GPIO_FN_VI0_D23_R7, GPIO_FN_VI2_D15_Y7, - GPIO_FN_VI4_D9_Y1, GPIO_FN_VI3_D12_Y4, GPIO_FN_VI4_D10_Y2, GPIO_FN_VI3_D13_Y5, - GPIO_FN_VI4_D11_Y3, GPIO_FN_VI3_D14_Y6, GPIO_FN_VI4_FIELD, GPIO_FN_VI3_D15_Y7, - - GPIO_FN_VI5_CLKENB, GPIO_FN_VI1_D12_G4_Y4_1, GPIO_FN_VI5_HSYNC, GPIO_FN_VI1_D13_G5_Y5_1, - GPIO_FN_VI5_VSYNC, GPIO_FN_VI1_D14_G6_Y6_1, GPIO_FN_VI5_D0_C0, GPIO_FN_VI1_D15_G7_Y7_1, - GPIO_FN_VI5_D1_C1, GPIO_FN_VI1_D16_R0, GPIO_FN_VI5_D2_C2, GPIO_FN_VI1_D17_R1, - GPIO_FN_VI5_D3_C3, GPIO_FN_VI1_D18_R2, GPIO_FN_VI5_D4_C4, GPIO_FN_VI1_D19_R3, - GPIO_FN_VI5_D5_C5, GPIO_FN_VI1_D20_R4, GPIO_FN_VI5_D6_C6, GPIO_FN_VI1_D21_R5, - GPIO_FN_VI5_D7_C7, GPIO_FN_VI1_D22_R6, GPIO_FN_VI5_D8_Y0, GPIO_FN_VI1_D23_R7, - - GPIO_FN_MSIOF0_SCK, GPIO_FN_HSCK0, GPIO_FN_MSIOF0_SYNC, GPIO_FN_HCTS0, - GPIO_FN_MSIOF0_TXD, GPIO_FN_HTX0, GPIO_FN_MSIOF0_RXD, GPIO_FN_HRX0, - GPIO_FN_MSIOF1_SCK, GPIO_FN_HSCK1, GPIO_FN_MSIOF1_SYNC, GPIO_FN_HRTS1, - GPIO_FN_MSIOF1_TXD, GPIO_FN_HTX1, GPIO_FN_MSIOF1_RXD, GPIO_FN_HRX1, - GPIO_FN_DRACK0, GPIO_FN_SCK2, GPIO_FN_DACK0, GPIO_FN_TX2, - GPIO_FN_DREQ0, GPIO_FN_RX2, GPIO_FN_DACK1, GPIO_FN_SCK3, - GPIO_FN_TX3, GPIO_FN_DREQ1, GPIO_FN_RX3, - - GPIO_FN_PWM0, GPIO_FN_TCLK1, GPIO_FN_FSO_CFE_0, - GPIO_FN_PWM1, GPIO_FN_TCLK2, GPIO_FN_FSO_CFE_1, - GPIO_FN_PWM2, GPIO_FN_TCLK3, GPIO_FN_FSO_TOE, - GPIO_FN_PWM3, GPIO_FN_PWM4, GPIO_FN_SSI_SCK3, GPIO_FN_TPU0TO0, - GPIO_FN_SSI_WS3, GPIO_FN_TPU0TO1, GPIO_FN_SSI_SDATA3, GPIO_FN_TPU0TO2, - GPIO_FN_SSI_SCK4, GPIO_FN_TPU0TO3, GPIO_FN_SSI_WS4, - GPIO_FN_SSI_SDATA4, GPIO_FN_AUDIO_CLKOUT, - GPIO_FN_AUDIO_CLKA, GPIO_FN_AUDIO_CLKB, -}; - -#endif /* __ASM_R8A7792_GPIO_H__ */ diff --git a/arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h b/arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h deleted file mode 100644 index f9a29fc144f..00000000000 --- a/arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h +++ /dev/null @@ -1,438 +0,0 @@ -#ifndef __ASM_R8A7793_H__ -#define __ASM_R8A7793_H__ - -/* Pin Function Controller: - * GPIO_FN_xx - GPIO used to select pin function - * GPIO_GP_x_x - GPIO mapped to real I/O pin on CPU - */ -enum { - GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3, - GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7, - GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11, - GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15, - GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19, - GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23, - GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27, - GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31, - - GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3, - GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7, - GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11, - GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15, - GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19, - GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23, - GPIO_GP_1_24, GPIO_GP_1_25, - - GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3, - GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7, - GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11, - GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15, - GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19, - GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23, - GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27, - GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31, - - GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3, - GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7, - GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11, - GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15, - GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19, - GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23, - GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27, - GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31, - - GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3, - GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7, - GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11, - GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15, - GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19, - GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23, - GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27, - GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31, - - GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3, - GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7, - GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11, - GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15, - GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19, - GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23, - GPIO_GP_5_24, GPIO_GP_5_25, GPIO_GP_5_26, GPIO_GP_5_27, - GPIO_GP_5_28, GPIO_GP_5_29, GPIO_GP_5_30, GPIO_GP_5_31, - - GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3, - GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7, - GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11, - GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15, - GPIO_GP_6_16, GPIO_GP_6_17, GPIO_GP_6_18, GPIO_GP_6_19, - GPIO_GP_6_20, GPIO_GP_6_21, GPIO_GP_6_22, GPIO_GP_6_23, - GPIO_GP_6_24, GPIO_GP_6_25, GPIO_GP_6_26, GPIO_GP_6_27, - GPIO_GP_6_28, GPIO_GP_6_29, GPIO_GP_6_30, GPIO_GP_6_31, - - GPIO_GP_7_0, GPIO_GP_7_1, GPIO_GP_7_2, GPIO_GP_7_3, - GPIO_GP_7_4, GPIO_GP_7_5, GPIO_GP_7_6, GPIO_GP_7_7, - GPIO_GP_7_8, GPIO_GP_7_9, GPIO_GP_7_10, GPIO_GP_7_11, - GPIO_GP_7_12, GPIO_GP_7_13, GPIO_GP_7_14, GPIO_GP_7_15, - GPIO_GP_7_16, GPIO_GP_7_17, GPIO_GP_7_18, GPIO_GP_7_19, - GPIO_GP_7_20, GPIO_GP_7_21, GPIO_GP_7_22, GPIO_GP_7_23, - GPIO_GP_7_24, GPIO_GP_7_25, - - GPIO_FN_EX_CS0_N, GPIO_FN_RD_N, GPIO_FN_AUDIO_CLKA, - GPIO_FN_VI0_CLK, GPIO_FN_VI0_DATA0_VI0_B0, - GPIO_FN_VI0_DATA0_VI0_B1, GPIO_FN_VI0_DATA0_VI0_B2, - GPIO_FN_VI0_DATA0_VI0_B4, GPIO_FN_VI0_DATA0_VI0_B5, - GPIO_FN_VI0_DATA0_VI0_B6, GPIO_FN_VI0_DATA0_VI0_B7, - GPIO_FN_USB0_PWEN, GPIO_FN_USB0_OVC, GPIO_FN_USB1_PWEN, - - /* IPSR0 */ - GPIO_FN_D0, GPIO_FN_D1, GPIO_FN_D2, GPIO_FN_D3, GPIO_FN_D4, GPIO_FN_D5, - GPIO_FN_D6, GPIO_FN_D7, GPIO_FN_D8, GPIO_FN_D9, GPIO_FN_D10, - GPIO_FN_D11, GPIO_FN_D12, GPIO_FN_D13, GPIO_FN_D14, GPIO_FN_D15, - GPIO_FN_A0, GPIO_FN_ATAWR0_N_C, GPIO_FN_MSIOF0_SCK_B, - GPIO_FN_SCL0_C, GPIO_FN_PWM2_B, - GPIO_FN_A1, GPIO_FN_MSIOF0_SYNC_B, GPIO_FN_A2, GPIO_FN_MSIOF0_SS1_B, - GPIO_FN_A3, GPIO_FN_MSIOF0_SS2_B, GPIO_FN_A4, GPIO_FN_MSIOF0_TXD_B, - GPIO_FN_A5, GPIO_FN_MSIOF0_RXD_B, GPIO_FN_A6, GPIO_FN_MSIOF1_SCK, - - /* IPSR1 */ - GPIO_FN_A7, GPIO_FN_MSIOF1_SYNC, GPIO_FN_A8, - GPIO_FN_MSIOF1_SS1, GPIO_FN_SCL0, - GPIO_FN_A9, GPIO_FN_MSIOF1_SS2, GPIO_FN_SDA0, - GPIO_FN_A10, GPIO_FN_MSIOF1_TXD, GPIO_FN_MSIOF1_TXD_D, - GPIO_FN_A11, GPIO_FN_MSIOF1_RXD, GPIO_FN_SCL3_D, GPIO_FN_MSIOF1_RXD_D, - GPIO_FN_A12, GPIO_FN_FMCLK, GPIO_FN_SDA3_D, GPIO_FN_MSIOF1_SCK_D, - GPIO_FN_A13, GPIO_FN_ATAG0_N_C, GPIO_FN_BPFCLK, GPIO_FN_MSIOF1_SS1_D, - GPIO_FN_A14, GPIO_FN_ATADIR0_N_C, GPIO_FN_FMIN, - GPIO_FN_FMIN_C, GPIO_FN_MSIOF1_SYNC_D, - GPIO_FN_A15, GPIO_FN_BPFCLK_C, - GPIO_FN_A16, GPIO_FN_DREQ2_B, GPIO_FN_FMCLK_C, GPIO_FN_SCIFA1_SCK_B, - GPIO_FN_A17, GPIO_FN_DACK2_B, GPIO_FN_SDA0_C, - GPIO_FN_A18, GPIO_FN_DREQ1, GPIO_FN_SCIFA1_RXD_C, GPIO_FN_SCIFB1_RXD_C, - - /* IPSR2 */ - GPIO_FN_A19, GPIO_FN_DACK1, GPIO_FN_SCIFA1_TXD_C, - GPIO_FN_SCIFB1_TXD_C, GPIO_FN_SCIFB1_SCK_B, - GPIO_FN_A20, GPIO_FN_SPCLK, - GPIO_FN_A21, GPIO_FN_ATAWR0_N_B, GPIO_FN_MOSI_IO0, - GPIO_FN_A22, GPIO_FN_MISO_IO1, GPIO_FN_FMCLK_B, - GPIO_FN_TX0, GPIO_FN_SCIFA0_TXD, - GPIO_FN_A23, GPIO_FN_IO2, GPIO_FN_BPFCLK_B, - GPIO_FN_RX0, GPIO_FN_SCIFA0_RXD, - GPIO_FN_A24, GPIO_FN_DREQ2, GPIO_FN_IO3, - GPIO_FN_TX1, GPIO_FN_SCIFA1_TXD, - GPIO_FN_A25, GPIO_FN_DACK2, GPIO_FN_SSL, GPIO_FN_DREQ1_C, - GPIO_FN_RX1, GPIO_FN_SCIFA1_RXD, - GPIO_FN_CS0_N, GPIO_FN_ATAG0_N_B, GPIO_FN_SCL1, - GPIO_FN_CS1_N_A26, GPIO_FN_ATADIR0_N_B, GPIO_FN_SDA1, - GPIO_FN_EX_CS1_N, GPIO_FN_MSIOF2_SCK, - GPIO_FN_EX_CS2_N, GPIO_FN_ATAWR0_N, GPIO_FN_MSIOF2_SYNC, - GPIO_FN_EX_CS3_N, GPIO_FN_ATADIR0_N, GPIO_FN_MSIOF2_TXD, - GPIO_FN_ATAG0_N, GPIO_FN_EX_WAIT1, - - /* IPSR3 */ - GPIO_FN_EX_CS4_N, GPIO_FN_ATARD0_N, - GPIO_FN_MSIOF2_RXD, GPIO_FN_EX_WAIT2, - GPIO_FN_EX_CS5_N, GPIO_FN_ATACS00_N, GPIO_FN_MSIOF2_SS1, - GPIO_FN_HRX1_B, GPIO_FN_SCIFB1_RXD_B, - GPIO_FN_PWM1, GPIO_FN_TPU_TO1, - GPIO_FN_BS_N, GPIO_FN_ATACS10_N, GPIO_FN_MSIOF2_SS2, - GPIO_FN_HTX1_B, GPIO_FN_SCIFB1_TXD_B, - GPIO_FN_PWM2, GPIO_FN_TPU_TO2, - GPIO_FN_RD_WR_N, GPIO_FN_HRX2_B, GPIO_FN_FMIN_B, - GPIO_FN_SCIFB0_RXD_B, GPIO_FN_DREQ1_D, - GPIO_FN_WE0_N, GPIO_FN_HCTS2_N_B, GPIO_FN_SCIFB0_TXD_B, - GPIO_FN_WE1_N, GPIO_FN_ATARD0_N_B, - GPIO_FN_HTX2_B, GPIO_FN_SCIFB0_RTS_N_B, - GPIO_FN_EX_WAIT0, GPIO_FN_HRTS2_N_B, GPIO_FN_SCIFB0_CTS_N_B, - GPIO_FN_DREQ0, GPIO_FN_PWM3, GPIO_FN_TPU_TO3, - GPIO_FN_DACK0, GPIO_FN_DRACK0, GPIO_FN_REMOCON, - GPIO_FN_SPEEDIN, GPIO_FN_HSCK0_C, GPIO_FN_HSCK2_C, - GPIO_FN_SCIFB0_SCK_B, GPIO_FN_SCIFB2_SCK_B, - GPIO_FN_DREQ2_C, GPIO_FN_HTX2_D, - GPIO_FN_SSI_SCK0129, GPIO_FN_HRX0_C, GPIO_FN_HRX2_C, - GPIO_FN_SCIFB0_RXD_C, GPIO_FN_SCIFB2_RXD_C, - GPIO_FN_SSI_WS0129, GPIO_FN_HTX0_C, GPIO_FN_HTX2_C, - GPIO_FN_SCIFB0_TXD_C, GPIO_FN_SCIFB2_TXD_C, - - /* IPSR4 */ - GPIO_FN_SSI_SDATA0, GPIO_FN_SCL0_B, - GPIO_FN_SCL7_B, GPIO_FN_MSIOF2_SCK_C, - GPIO_FN_SSI_SCK1, GPIO_FN_SDA0_B, GPIO_FN_SDA7_B, - GPIO_FN_MSIOF2_SYNC_C, GPIO_FN_GLO_I0_D, - GPIO_FN_SSI_WS1, GPIO_FN_SCL1_B, GPIO_FN_SCL8_B, - GPIO_FN_MSIOF2_TXD_C, GPIO_FN_GLO_I1_D, - GPIO_FN_SSI_SDATA1, GPIO_FN_SDA1_B, - GPIO_FN_SDA8_B, GPIO_FN_MSIOF2_RXD_C, - GPIO_FN_SSI_SCK2, GPIO_FN_SCL2, GPIO_FN_GPS_CLK_B, - GPIO_FN_GLO_Q0_D, GPIO_FN_HSCK1_E, - GPIO_FN_SSI_WS2, GPIO_FN_SDA2, GPIO_FN_GPS_SIGN_B, - GPIO_FN_RX2_E, GPIO_FN_GLO_Q1_D, GPIO_FN_HCTS1_N_E, - GPIO_FN_SSI_SDATA2, GPIO_FN_GPS_MAG_B, - GPIO_FN_TX2_E, GPIO_FN_HRTS1_N_E, - GPIO_FN_SSI_SCK34, GPIO_FN_SSI_WS34, GPIO_FN_SSI_SDATA3, - GPIO_FN_SSI_SCK4, GPIO_FN_GLO_SS_D, - GPIO_FN_SSI_WS4, GPIO_FN_GLO_RFON_D, - GPIO_FN_SSI_SDATA4, GPIO_FN_MSIOF2_SCK_D, - GPIO_FN_SSI_SCK5, GPIO_FN_MSIOF1_SCK_C, - GPIO_FN_TS_SDATA0, GPIO_FN_GLO_I0, - GPIO_FN_MSIOF2_SYNC_D, GPIO_FN_VI1_R2_B, - - /* IPSR5 */ - GPIO_FN_SSI_WS5, GPIO_FN_MSIOF1_SYNC_C, GPIO_FN_TS_SCK0, - GPIO_FN_GLO_I1, GPIO_FN_MSIOF2_TXD_D, GPIO_FN_VI1_R3_B, - GPIO_FN_SSI_SDATA5, GPIO_FN_MSIOF1_TXD_C, GPIO_FN_TS_SDEN0, - GPIO_FN_GLO_Q0, GPIO_FN_MSIOF2_SS1_D, GPIO_FN_VI1_R4_B, - GPIO_FN_SSI_SCK6, GPIO_FN_MSIOF1_RXD_C, GPIO_FN_TS_SPSYNC0, - GPIO_FN_GLO_Q1, GPIO_FN_MSIOF2_RXD_D, GPIO_FN_VI1_R5_B, - GPIO_FN_SSI_WS6, GPIO_FN_GLO_SCLK, - GPIO_FN_MSIOF2_SS2_D, GPIO_FN_VI1_R6_B, - GPIO_FN_SSI_SDATA6, GPIO_FN_STP_IVCXO27_0_B, - GPIO_FN_GLO_SDATA, GPIO_FN_VI1_R7_B, - GPIO_FN_SSI_SCK78, GPIO_FN_STP_ISCLK_0_B, GPIO_FN_GLO_SS, - GPIO_FN_SSI_WS78, GPIO_FN_TX0_D, GPIO_FN_STP_ISD_0_B, GPIO_FN_GLO_RFON, - GPIO_FN_SSI_SDATA7, GPIO_FN_RX0_D, GPIO_FN_STP_ISEN_0_B, - GPIO_FN_SSI_SDATA8, GPIO_FN_TX1_D, GPIO_FN_STP_ISSYNC_0_B, - GPIO_FN_SSI_SCK9, GPIO_FN_RX1_D, GPIO_FN_GLO_SCLK_D, - GPIO_FN_SSI_WS9, GPIO_FN_TX3_D, GPIO_FN_CAN0_TX_D, GPIO_FN_GLO_SDATA_D, - GPIO_FN_SSI_SDATA9, GPIO_FN_RX3_D, GPIO_FN_CAN0_RX_D, - - /* IPSR6 */ - GPIO_FN_AUDIO_CLKB, GPIO_FN_STP_OPWM_0_B, GPIO_FN_MSIOF1_SCK_B, - GPIO_FN_SCIF_CLK, GPIO_FN_BPFCLK_E, - GPIO_FN_AUDIO_CLKC, GPIO_FN_SCIFB0_SCK_C, GPIO_FN_MSIOF1_SYNC_B, - GPIO_FN_RX2, GPIO_FN_SCIFA2_RXD, GPIO_FN_FMIN_E, - GPIO_FN_AUDIO_CLKOUT, GPIO_FN_MSIOF1_SS1_B, - GPIO_FN_TX2, GPIO_FN_SCIFA2_TXD, - GPIO_FN_IRQ0, GPIO_FN_SCIFB1_RXD_D, GPIO_FN_INTC_IRQ0_N, - GPIO_FN_IRQ1, GPIO_FN_SCIFB1_SCK_C, GPIO_FN_INTC_IRQ1_N, - GPIO_FN_IRQ2, GPIO_FN_SCIFB1_TXD_D, GPIO_FN_INTC_IRQ2_N, - GPIO_FN_IRQ3, GPIO_FN_SCL4_C, - GPIO_FN_MSIOF2_TXD_E, GPIO_FN_INTC_IRQ3_N, - GPIO_FN_IRQ4, GPIO_FN_HRX1_C, GPIO_FN_SDA4_C, - GPIO_FN_MSIOF2_RXD_E, GPIO_FN_INTC_IRQ4_N, - GPIO_FN_IRQ5, GPIO_FN_HTX1_C, GPIO_FN_SCL1_E, GPIO_FN_MSIOF2_SCK_E, - GPIO_FN_IRQ6, GPIO_FN_HSCK1_C, GPIO_FN_MSIOF1_SS2_B, - GPIO_FN_SDA1_E, GPIO_FN_MSIOF2_SYNC_E, - GPIO_FN_IRQ7, GPIO_FN_HCTS1_N_C, GPIO_FN_MSIOF1_TXD_B, - GPIO_FN_GPS_CLK_C, GPIO_FN_GPS_CLK_D, - GPIO_FN_IRQ8, GPIO_FN_HRTS1_N_C, GPIO_FN_MSIOF1_RXD_B, - GPIO_FN_GPS_SIGN_C, GPIO_FN_GPS_SIGN_D, - - /* IPSR7 */ - GPIO_FN_IRQ9, GPIO_FN_DU1_DOTCLKIN_B, GPIO_FN_CAN_CLK_D, - GPIO_FN_GPS_MAG_C, GPIO_FN_SCIF_CLK_B, GPIO_FN_GPS_MAG_D, - GPIO_FN_DU1_DR0, GPIO_FN_LCDOUT0, GPIO_FN_VI1_DATA0_B, GPIO_FN_TX0_B, - GPIO_FN_SCIFA0_TXD_B, GPIO_FN_MSIOF2_SCK_B, - GPIO_FN_DU1_DR1, GPIO_FN_LCDOUT1, GPIO_FN_VI1_DATA1_B, GPIO_FN_RX0_B, - GPIO_FN_SCIFA0_RXD_B, GPIO_FN_MSIOF2_SYNC_B, - GPIO_FN_DU1_DR2, GPIO_FN_LCDOUT2, GPIO_FN_SSI_SCK0129_B, - GPIO_FN_DU1_DR3, GPIO_FN_LCDOUT3, GPIO_FN_SSI_WS0129_B, - GPIO_FN_DU1_DR4, GPIO_FN_LCDOUT4, GPIO_FN_SSI_SDATA0_B, - GPIO_FN_DU1_DR5, GPIO_FN_LCDOUT5, GPIO_FN_SSI_SCK1_B, - GPIO_FN_DU1_DR6, GPIO_FN_LCDOUT6, GPIO_FN_SSI_WS1_B, - GPIO_FN_DU1_DR7, GPIO_FN_LCDOUT7, GPIO_FN_SSI_SDATA1_B, - GPIO_FN_DU1_DG0, GPIO_FN_LCDOUT8, GPIO_FN_VI1_DATA2_B, GPIO_FN_TX1_B, - GPIO_FN_SCIFA1_TXD_B, GPIO_FN_MSIOF2_SS1_B, - GPIO_FN_DU1_DG1, GPIO_FN_LCDOUT9, GPIO_FN_VI1_DATA3_B, GPIO_FN_RX1_B, - GPIO_FN_SCIFA1_RXD_B, GPIO_FN_MSIOF2_SS2_B, - GPIO_FN_DU1_DG2, GPIO_FN_LCDOUT10, GPIO_FN_VI1_DATA4_B, - GPIO_FN_SCIF1_SCK_B, GPIO_FN_SCIFA1_SCK, GPIO_FN_SSI_SCK78_B, - - /* IPSR8 */ - GPIO_FN_DU1_DG3, GPIO_FN_LCDOUT11, - GPIO_FN_VI1_DATA5_B, GPIO_FN_SSI_WS78_B, - GPIO_FN_DU1_DG4, GPIO_FN_LCDOUT12, GPIO_FN_VI1_DATA6_B, - GPIO_FN_HRX0_B, GPIO_FN_SCIFB2_RXD_B, GPIO_FN_SSI_SDATA7_B, - GPIO_FN_DU1_DG5, GPIO_FN_LCDOUT13, GPIO_FN_VI1_DATA7_B, - GPIO_FN_HCTS0_N_B, GPIO_FN_SCIFB2_TXD_B, GPIO_FN_SSI_SDATA8_B, - GPIO_FN_DU1_DG6, GPIO_FN_LCDOUT14, GPIO_FN_HRTS0_N_B, - GPIO_FN_SCIFB2_CTS_N_B, GPIO_FN_SSI_SCK9_B, - GPIO_FN_DU1_DG7, GPIO_FN_LCDOUT15, GPIO_FN_HTX0_B, - GPIO_FN_SCIFB2_RTS_N_B, GPIO_FN_SSI_WS9_B, - GPIO_FN_DU1_DB0, GPIO_FN_LCDOUT16, GPIO_FN_VI1_CLK_B, GPIO_FN_TX2_B, - GPIO_FN_SCIFA2_TXD_B, GPIO_FN_MSIOF2_TXD_B, - GPIO_FN_DU1_DB1, GPIO_FN_LCDOUT17, GPIO_FN_VI1_HSYNC_N_B, - GPIO_FN_RX2_B, GPIO_FN_SCIFA2_RXD_B, GPIO_FN_MSIOF2_RXD_B, - GPIO_FN_DU1_DB2, GPIO_FN_LCDOUT18, GPIO_FN_VI1_VSYNC_N_B, - GPIO_FN_SCIF2_SCK_B, GPIO_FN_SCIFA2_SCK, GPIO_FN_SSI_SDATA9_B, - GPIO_FN_DU1_DB3, GPIO_FN_LCDOUT19, GPIO_FN_VI1_CLKENB_B, - GPIO_FN_DU1_DB4, GPIO_FN_LCDOUT20, - GPIO_FN_VI1_FIELD_B, GPIO_FN_CAN1_RX, - GPIO_FN_DU1_DB5, GPIO_FN_LCDOUT21, GPIO_FN_TX3, - GPIO_FN_SCIFA3_TXD, GPIO_FN_CAN1_TX, - - /* IPSR9 */ - GPIO_FN_DU1_DB6, GPIO_FN_LCDOUT22, GPIO_FN_SCL3_C, - GPIO_FN_RX3, GPIO_FN_SCIFA3_RXD, - GPIO_FN_DU1_DB7, GPIO_FN_LCDOUT23, GPIO_FN_SDA3_C, - GPIO_FN_SCIF3_SCK, GPIO_FN_SCIFA3_SCK, - GPIO_FN_DU1_DOTCLKIN, GPIO_FN_QSTVA_QVS, - GPIO_FN_DU1_DOTCLKOUT0, GPIO_FN_QCLK, - GPIO_FN_DU1_DOTCLKOUT1, GPIO_FN_QSTVB_QVE, GPIO_FN_CAN0_TX, - GPIO_FN_TX3_B, GPIO_FN_SCL2_B, GPIO_FN_PWM4, - GPIO_FN_DU1_EXHSYNC_DU1_HSYNC, GPIO_FN_QSTH_QHS, - GPIO_FN_DU1_EXVSYNC_DU1_VSYNC, GPIO_FN_QSTB_QHE, - GPIO_FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, GPIO_FN_QCPV_QDE, - GPIO_FN_CAN0_RX, GPIO_FN_RX3_B, GPIO_FN_SDA2_B, - GPIO_FN_DU1_DISP, GPIO_FN_QPOLA, - GPIO_FN_DU1_CDE, GPIO_FN_QPOLB, GPIO_FN_PWM4_B, - GPIO_FN_VI0_CLKENB, GPIO_FN_TX4, - GPIO_FN_SCIFA4_TXD, GPIO_FN_TS_SDATA0_D, - GPIO_FN_VI0_FIELD, GPIO_FN_RX4, GPIO_FN_SCIFA4_RXD, GPIO_FN_TS_SCK0_D, - GPIO_FN_VI0_HSYNC_N, GPIO_FN_TX5, - GPIO_FN_SCIFA5_TXD, GPIO_FN_TS_SDEN0_D, - GPIO_FN_VI0_VSYNC_N, GPIO_FN_RX5, - GPIO_FN_SCIFA5_RXD, GPIO_FN_TS_SPSYNC0_D, - GPIO_FN_VI0_DATA3_VI0_B3, GPIO_FN_SCIF3_SCK_B, GPIO_FN_SCIFA3_SCK_B, - GPIO_FN_VI0_G0, GPIO_FN_SCL8, GPIO_FN_STP_IVCXO27_0_C, GPIO_FN_SCL4, - GPIO_FN_HCTS2_N, GPIO_FN_SCIFB2_CTS_N, GPIO_FN_ATAWR1_N, - - /* IPSR10 */ - GPIO_FN_VI0_G1, GPIO_FN_SDA8, GPIO_FN_STP_ISCLK_0_C, GPIO_FN_SDA4, - GPIO_FN_HRTS2_N, GPIO_FN_SCIFB2_RTS_N, GPIO_FN_ATADIR1_N, - GPIO_FN_VI0_G2, GPIO_FN_VI2_HSYNC_N, GPIO_FN_STP_ISD_0_C, - GPIO_FN_SCL3_B, GPIO_FN_HSCK2, GPIO_FN_SCIFB2_SCK, GPIO_FN_ATARD1_N, - GPIO_FN_VI0_G3, GPIO_FN_VI2_VSYNC_N, GPIO_FN_STP_ISEN_0_C, - GPIO_FN_SDA3_B, GPIO_FN_HRX2, GPIO_FN_SCIFB2_RXD, GPIO_FN_ATACS01_N, - GPIO_FN_VI0_G4, GPIO_FN_VI2_CLKENB, GPIO_FN_STP_ISSYNC_0_C, - GPIO_FN_HTX2, GPIO_FN_SCIFB2_TXD, GPIO_FN_SCIFB0_SCK_D, - GPIO_FN_VI0_G5, GPIO_FN_VI2_FIELD, GPIO_FN_STP_OPWM_0_C, - GPIO_FN_FMCLK_D, GPIO_FN_CAN0_TX_E, - GPIO_FN_HTX1_D, GPIO_FN_SCIFB0_TXD_D, - GPIO_FN_VI0_G6, GPIO_FN_VI2_CLK, GPIO_FN_BPFCLK_D, - GPIO_FN_VI0_G7, GPIO_FN_VI2_DATA0, GPIO_FN_FMIN_D, - GPIO_FN_VI0_R0, GPIO_FN_VI2_DATA1, GPIO_FN_GLO_I0_B, - GPIO_FN_TS_SDATA0_C, GPIO_FN_ATACS11_N, - GPIO_FN_VI0_R1, GPIO_FN_VI2_DATA2, GPIO_FN_GLO_I1_B, - GPIO_FN_TS_SCK0_C, GPIO_FN_ATAG1_N, - GPIO_FN_VI0_R2, GPIO_FN_VI2_DATA3, - GPIO_FN_GLO_Q0_B, GPIO_FN_TS_SDEN0_C, - GPIO_FN_VI0_R3, GPIO_FN_VI2_DATA4, - GPIO_FN_GLO_Q1_B, GPIO_FN_TS_SPSYNC0_C, - GPIO_FN_VI0_R4, GPIO_FN_VI2_DATA5, GPIO_FN_GLO_SCLK_B, - GPIO_FN_TX0_C, GPIO_FN_SCL1_D, - - /* IPSR11 */ - GPIO_FN_VI0_R5, GPIO_FN_VI2_DATA6, GPIO_FN_GLO_SDATA_B, - GPIO_FN_RX0_C, GPIO_FN_SDA1_D, - GPIO_FN_VI0_R6, GPIO_FN_VI2_DATA7, GPIO_FN_GLO_SS_B, - GPIO_FN_TX1_C, GPIO_FN_SCL4_B, - GPIO_FN_VI0_R7, GPIO_FN_GLO_RFON_B, GPIO_FN_RX1_C, GPIO_FN_CAN0_RX_E, - GPIO_FN_SDA4_B, GPIO_FN_HRX1_D, GPIO_FN_SCIFB0_RXD_D, - GPIO_FN_VI1_HSYNC_N, GPIO_FN_AVB_RXD0, GPIO_FN_TS_SDATA0_B, - GPIO_FN_TX4_B, GPIO_FN_SCIFA4_TXD_B, - GPIO_FN_VI1_VSYNC_N, GPIO_FN_AVB_RXD1, GPIO_FN_TS_SCK0_B, - GPIO_FN_RX4_B, GPIO_FN_SCIFA4_RXD_B, - GPIO_FN_VI1_CLKENB, GPIO_FN_AVB_RXD2, GPIO_FN_TS_SDEN0_B, - GPIO_FN_VI1_FIELD, GPIO_FN_AVB_RXD3, GPIO_FN_TS_SPSYNC0_B, - GPIO_FN_VI1_CLK, GPIO_FN_AVB_RXD4, GPIO_FN_VI1_DATA0, GPIO_FN_AVB_RXD5, - GPIO_FN_VI1_DATA1, GPIO_FN_AVB_RXD6, - GPIO_FN_VI1_DATA2, GPIO_FN_AVB_RXD7, - GPIO_FN_VI1_DATA3, GPIO_FN_AVB_RX_ER, - GPIO_FN_VI1_DATA4, GPIO_FN_AVB_MDIO, - GPIO_FN_VI1_DATA5, GPIO_FN_AVB_RX_DV, - GPIO_FN_VI1_DATA6, GPIO_FN_AVB_MAGIC, - GPIO_FN_VI1_DATA7, GPIO_FN_AVB_MDC, - GPIO_FN_ETH_MDIO, GPIO_FN_AVB_RX_CLK, GPIO_FN_SCL2_C, - GPIO_FN_ETH_CRS_DV, GPIO_FN_AVB_LINK, GPIO_FN_SDA2_C, - - /* IPSR12 */ - GPIO_FN_ETH_RX_ER, GPIO_FN_AVB_CRS, GPIO_FN_SCL3, GPIO_FN_SCL7, - GPIO_FN_ETH_RXD0, GPIO_FN_AVB_PHY_INT, GPIO_FN_SDA3, GPIO_FN_SDA7, - GPIO_FN_ETH_RXD1, GPIO_FN_AVB_GTXREFCLK, GPIO_FN_CAN0_TX_C, - GPIO_FN_SCL2_D, GPIO_FN_MSIOF1_RXD_E, - GPIO_FN_ETH_LINK, GPIO_FN_AVB_TXD0, GPIO_FN_CAN0_RX_C, - GPIO_FN_SDA2_D, GPIO_FN_MSIOF1_SCK_E, - GPIO_FN_ETH_REFCLK, GPIO_FN_AVB_TXD1, GPIO_FN_SCIFA3_RXD_B, - GPIO_FN_CAN1_RX_C, GPIO_FN_MSIOF1_SYNC_E, - GPIO_FN_ETH_TXD1, GPIO_FN_AVB_TXD2, GPIO_FN_SCIFA3_TXD_B, - GPIO_FN_CAN1_TX_C, GPIO_FN_MSIOF1_TXD_E, - GPIO_FN_ETH_TX_EN, GPIO_FN_AVB_TXD3, - GPIO_FN_TCLK1_B, GPIO_FN_CAN_CLK_B, - GPIO_FN_ETH_MAGIC, GPIO_FN_AVB_TXD4, GPIO_FN_IETX_C, - GPIO_FN_ETH_TXD0, GPIO_FN_AVB_TXD5, GPIO_FN_IECLK_C, - GPIO_FN_ETH_MDC, GPIO_FN_AVB_TXD6, GPIO_FN_IERX_C, - GPIO_FN_STP_IVCXO27_0, GPIO_FN_AVB_TXD7, GPIO_FN_SCIFB2_TXD_D, - GPIO_FN_ADIDATA_B, GPIO_FN_MSIOF0_SYNC_C, - GPIO_FN_STP_ISCLK_0, GPIO_FN_AVB_TX_EN, GPIO_FN_SCIFB2_RXD_D, - GPIO_FN_ADICS_SAMP_B, GPIO_FN_MSIOF0_SCK_C, - - /* IPSR13 */ - GPIO_FN_STP_ISD_0, GPIO_FN_AVB_TX_ER, GPIO_FN_SCIFB2_SCK_C, - GPIO_FN_ADICLK_B, GPIO_FN_MSIOF0_SS1_C, - GPIO_FN_STP_ISEN_0, GPIO_FN_AVB_TX_CLK, - GPIO_FN_ADICHS0_B, GPIO_FN_MSIOF0_SS2_C, - GPIO_FN_STP_ISSYNC_0, GPIO_FN_AVB_COL, - GPIO_FN_ADICHS1_B, GPIO_FN_MSIOF0_RXD_C, - GPIO_FN_STP_OPWM_0, GPIO_FN_AVB_GTX_CLK, GPIO_FN_PWM0_B, - GPIO_FN_ADICHS2_B, GPIO_FN_MSIOF0_TXD_C, - GPIO_FN_SD0_CLK, GPIO_FN_SPCLK_B, GPIO_FN_SD0_CMD, GPIO_FN_MOSI_IO0_B, - GPIO_FN_SD0_DATA0, GPIO_FN_MISO_IO1_B, - GPIO_FN_SD0_DATA1, GPIO_FN_IO2_B, - GPIO_FN_SD0_DATA2, GPIO_FN_IO3_B, GPIO_FN_SD0_DATA3, GPIO_FN_SSL_B, - GPIO_FN_SD0_CD, GPIO_FN_MMC_D6_B, - GPIO_FN_SIM0_RST_B, GPIO_FN_CAN0_RX_F, - GPIO_FN_SCIFA5_TXD_B, GPIO_FN_TX3_C, - GPIO_FN_SD0_WP, GPIO_FN_MMC_D7_B, GPIO_FN_SIM0_D_B, GPIO_FN_CAN0_TX_F, - GPIO_FN_SCIFA5_RXD_B, GPIO_FN_RX3_C, - GPIO_FN_SD1_CMD, GPIO_FN_REMOCON_B, - GPIO_FN_SD1_DATA0, GPIO_FN_SPEEDIN_B, - GPIO_FN_SD1_DATA1, GPIO_FN_IETX_B, GPIO_FN_SD1_DATA2, GPIO_FN_IECLK_B, - GPIO_FN_SD1_DATA3, GPIO_FN_IERX_B, - GPIO_FN_SD1_CD, GPIO_FN_PWM0, GPIO_FN_TPU_TO0, GPIO_FN_SCL1_C, - - /* IPSR14 */ - GPIO_FN_SD1_WP, GPIO_FN_PWM1_B, GPIO_FN_SDA1_C, - GPIO_FN_SD2_CLK, GPIO_FN_MMC_CLK, GPIO_FN_SD2_CMD, GPIO_FN_MMC_CMD, - GPIO_FN_SD2_DATA0, GPIO_FN_MMC_D0, GPIO_FN_SD2_DATA1, GPIO_FN_MMC_D1, - GPIO_FN_SD2_DATA2, GPIO_FN_MMC_D2, GPIO_FN_SD2_DATA3, GPIO_FN_MMC_D3, - GPIO_FN_SD2_CD, GPIO_FN_MMC_D4, GPIO_FN_SCL8_C, - GPIO_FN_TX5_B, GPIO_FN_SCIFA5_TXD_C, - GPIO_FN_SD2_WP, GPIO_FN_MMC_D5, GPIO_FN_SDA8_C, - GPIO_FN_RX5_B, GPIO_FN_SCIFA5_RXD_C, - GPIO_FN_MSIOF0_SCK, GPIO_FN_RX2_C, GPIO_FN_ADIDATA, - GPIO_FN_VI1_CLK_C, GPIO_FN_VI1_G0_B, - GPIO_FN_MSIOF0_SYNC, GPIO_FN_TX2_C, GPIO_FN_ADICS_SAMP, - GPIO_FN_VI1_CLKENB_C, GPIO_FN_VI1_G1_B, - GPIO_FN_MSIOF0_TXD, GPIO_FN_ADICLK, - GPIO_FN_VI1_FIELD_C, GPIO_FN_VI1_G2_B, - GPIO_FN_MSIOF0_RXD, GPIO_FN_ADICHS0, - GPIO_FN_VI1_DATA0_C, GPIO_FN_VI1_G3_B, - GPIO_FN_MSIOF0_SS1, GPIO_FN_MMC_D6, GPIO_FN_ADICHS1, GPIO_FN_TX0_E, - GPIO_FN_VI1_HSYNC_N_C, GPIO_FN_SCL7_C, GPIO_FN_VI1_G4_B, - GPIO_FN_MSIOF0_SS2, GPIO_FN_MMC_D7, GPIO_FN_ADICHS2, GPIO_FN_RX0_E, - GPIO_FN_VI1_VSYNC_N_C, GPIO_FN_SDA7_C, GPIO_FN_VI1_G5_B, - - /* IPSR15 */ - GPIO_FN_SIM0_RST, GPIO_FN_IETX, GPIO_FN_CAN1_TX_D, - GPIO_FN_SIM0_CLK, GPIO_FN_IECLK, GPIO_FN_CAN_CLK_C, - GPIO_FN_SIM0_D, GPIO_FN_IERX, GPIO_FN_CAN1_RX_D, - GPIO_FN_GPS_CLK, GPIO_FN_DU1_DOTCLKIN_C, GPIO_FN_AUDIO_CLKB_B, - GPIO_FN_PWM5_B, GPIO_FN_SCIFA3_TXD_C, - GPIO_FN_GPS_SIGN, GPIO_FN_TX4_C, GPIO_FN_SCIFA4_TXD_C, GPIO_FN_PWM5, - GPIO_FN_VI1_G6_B, GPIO_FN_SCIFA3_RXD_C, - GPIO_FN_GPS_MAG, GPIO_FN_RX4_C, GPIO_FN_SCIFA4_RXD_C, GPIO_FN_PWM6, - GPIO_FN_VI1_G7_B, GPIO_FN_SCIFA3_SCK_C, - GPIO_FN_HCTS0_N, GPIO_FN_SCIFB0_CTS_N, GPIO_FN_GLO_I0_C, - GPIO_FN_TCLK1, GPIO_FN_VI1_DATA1_C, - GPIO_FN_HRTS0_N, GPIO_FN_SCIFB0_RTS_N, - GPIO_FN_GLO_I1_C, GPIO_FN_VI1_DATA2_C, - GPIO_FN_HSCK0, GPIO_FN_SCIFB0_SCK, GPIO_FN_GLO_Q0_C, GPIO_FN_CAN_CLK, - GPIO_FN_TCLK2, GPIO_FN_VI1_DATA3_C, - GPIO_FN_HRX0, GPIO_FN_SCIFB0_RXD, GPIO_FN_GLO_Q1_C, - GPIO_FN_CAN0_RX_B, GPIO_FN_VI1_DATA4_C, - GPIO_FN_HTX0, GPIO_FN_SCIFB0_TXD, GPIO_FN_GLO_SCLK_C, - GPIO_FN_CAN0_TX_B, GPIO_FN_VI1_DATA5_C, - - /* IPSR16 */ - GPIO_FN_HRX1, GPIO_FN_SCIFB1_RXD, GPIO_FN_VI1_R0_B, - GPIO_FN_GLO_SDATA_C, GPIO_FN_VI1_DATA6_C, - GPIO_FN_HTX1, GPIO_FN_SCIFB1_TXD, GPIO_FN_VI1_R1_B, - GPIO_FN_GLO_SS_C, GPIO_FN_VI1_DATA7_C, - GPIO_FN_HSCK1, GPIO_FN_SCIFB1_SCK, GPIO_FN_MLB_CK, GPIO_FN_GLO_RFON_C, - GPIO_FN_HCTS1_N, GPIO_FN_SCIFB1_CTS_N, - GPIO_FN_MLB_SIG, GPIO_FN_CAN1_TX_B, - GPIO_FN_HRTS1_N, GPIO_FN_SCIFB1_RTS_N, - GPIO_FN_MLB_DAT, GPIO_FN_CAN1_RX_B, -}; - -#endif /* __ASM_R8A7793_H__ */ diff --git a/arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h b/arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h deleted file mode 100644 index 8a002a89187..00000000000 --- a/arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h +++ /dev/null @@ -1,276 +0,0 @@ -#ifndef __ASM_R8A7794_H__ -#define __ASM_R8A7794_H__ - -/* Pin Function Controller: - * GPIO_FN_xx - GPIO used to select pin function - * GPIO_GP_x_x - GPIO mapped to real I/O pin on CPU - */ -enum { - GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3, - GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7, - GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11, - GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15, - GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19, - GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23, - GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27, - GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31, - - GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3, - GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7, - GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11, - GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15, - GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19, - GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23, - GPIO_GP_1_24, GPIO_GP_1_25, - - GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3, - GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7, - GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11, - GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15, - GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19, - GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23, - GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27, - GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31, - - GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3, - GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7, - GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11, - GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15, - GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19, - GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23, - GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27, - GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31, - - GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3, - GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7, - GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11, - GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15, - GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19, - GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23, - GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27, - GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31, - - GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3, - GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7, - GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11, - GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15, - GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19, - GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23, - GPIO_GP_5_24, GPIO_GP_5_25, GPIO_GP_5_26, GPIO_GP_5_27, - - GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3, - GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7, - GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11, - GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15, - GPIO_GP_6_16, GPIO_GP_6_17, GPIO_GP_6_18, GPIO_GP_6_19, - GPIO_GP_6_20, GPIO_GP_6_21, GPIO_GP_6_22, GPIO_GP_6_23, - GPIO_GP_6_24, GPIO_GP_6_25, - - GPIO_FN_A2, GPIO_FN_WE0_N, GPIO_FN_WE1_N, GPIO_FN_DACK0, - GPIO_FN_USB0_PWEN, GPIO_FN_USB0_OVC, GPIO_FN_USB1_PWEN, - GPIO_FN_USB1_OVC, GPIO_FN_SD0_CLK, GPIO_FN_SD0_CMD, - GPIO_FN_SD0_DATA0, GPIO_FN_SD0_DATA1, GPIO_FN_SD0_DATA2, - GPIO_FN_SD0_DATA3, GPIO_FN_SD0_CD, GPIO_FN_SD0_WP, - GPIO_FN_SD1_CLK, GPIO_FN_SD1_CMD, GPIO_FN_SD1_DATA0, - GPIO_FN_SD1_DATA1, GPIO_FN_SD1_DATA2, GPIO_FN_SD1_DATA3, - - /* IPSR0 */ - GPIO_FN_SD1_CD, GPIO_FN_CAN0_RX, GPIO_FN_SD1_WP, GPIO_FN_IRQ7, - GPIO_FN_CAN0_TX, GPIO_FN_MMC_CLK, GPIO_FN_SD2_CLK, GPIO_FN_MMC_CMD, - GPIO_FN_SD2_CMD, GPIO_FN_MMC_D0, GPIO_FN_SD2_DATA0, GPIO_FN_MMC_D1, - GPIO_FN_SD2_DATA1, GPIO_FN_MMC_D2, GPIO_FN_SD2_DATA2, - GPIO_FN_MMC_D3, GPIO_FN_SD2_DATA3, GPIO_FN_MMC_D4, - GPIO_FN_SD2_CD, GPIO_FN_MMC_D5, GPIO_FN_SD2_WP, GPIO_FN_MMC_D6, - GPIO_FN_SCIF0_RXD, GPIO_FN_I2C2_SCL_B, GPIO_FN_CAN1_RX, GPIO_FN_MMC_D7, - GPIO_FN_SCIF0_TXD, GPIO_FN_I2C2_SDA_B, GPIO_FN_CAN1_TX, GPIO_FN_D0, - GPIO_FN_SCIFA3_SCK_B, GPIO_FN_IRQ4, GPIO_FN_D1, GPIO_FN_SCIFA3_RXD_B, - GPIO_FN_D2, GPIO_FN_SCIFA3_TXD_B, GPIO_FN_D3, GPIO_FN_I2C3_SCL_B, - GPIO_FN_SCIF5_RXD_B, GPIO_FN_D4, GPIO_FN_I2C3_SDA_B, - GPIO_FN_SCIF5_TXD_B, GPIO_FN_D5, GPIO_FN_SCIF4_RXD_B, - GPIO_FN_I2C0_SCL_D, - - /* - * From IPSR1 to IPSR5 have been removed because they does not use. - */ - - /* IPSR6 */ - GPIO_FN_DU0_EXVSYNC_DU0_VSYNC, GPIO_FN_QSTB_QHE, GPIO_FN_CC50_STATE28, - GPIO_FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, GPIO_FN_QCPV_QDE, - GPIO_FN_CC50_STATE29, GPIO_FN_DU0_DISP, GPIO_FN_QPOLA, - GPIO_FN_CC50_STATE30, GPIO_FN_DU0_CDE, GPIO_FN_QPOLB, - GPIO_FN_CC50_STATE31, GPIO_FN_VI0_CLK, GPIO_FN_AVB_RX_CLK, - GPIO_FN_VI0_DATA0_VI0_B0, GPIO_FN_AVB_RX_DV, GPIO_FN_VI0_DATA1_VI0_B1, - GPIO_FN_AVB_RXD0, GPIO_FN_VI0_DATA2_VI0_B2, GPIO_FN_AVB_RXD1, - GPIO_FN_VI0_DATA3_VI0_B3, GPIO_FN_AVB_RXD2, GPIO_FN_VI0_DATA4_VI0_B4, - GPIO_FN_AVB_RXD3, GPIO_FN_VI0_DATA5_VI0_B5, GPIO_FN_AVB_RXD4, - GPIO_FN_VI0_DATA6_VI0_B6, GPIO_FN_AVB_RXD5, GPIO_FN_VI0_DATA7_VI0_B7, - GPIO_FN_AVB_RXD6, GPIO_FN_VI0_CLKENB, GPIO_FN_I2C3_SCL, - GPIO_FN_SCIFA5_RXD_C, GPIO_FN_IETX_C, GPIO_FN_AVB_RXD7, - GPIO_FN_VI0_FIELD, GPIO_FN_I2C3_SDA, GPIO_FN_SCIFA5_TXD_C, - GPIO_FN_IECLK_C, GPIO_FN_AVB_RX_ER, GPIO_FN_VI0_HSYNC_N, - GPIO_FN_SCIF0_RXD_B, GPIO_FN_I2C0_SCL_C, GPIO_FN_IERX_C, - GPIO_FN_AVB_COL, GPIO_FN_VI0_VSYNC_N, GPIO_FN_SCIF0_TXD_B, - GPIO_FN_I2C0_SDA_C, GPIO_FN_AUDIO_CLKOUT_B, GPIO_FN_AVB_TX_EN, - GPIO_FN_ETH_MDIO, GPIO_FN_VI0_G0, GPIO_FN_MSIOF2_RXD_B, - GPIO_FN_IIC0_SCL_D, GPIO_FN_AVB_TX_CLK, GPIO_FN_ADIDATA, GPIO_FN_AD_DI, - - /* IPSR7 */ - GPIO_FN_ETH_CRS_DV, GPIO_FN_VI0_G1, GPIO_FN_MSIOF2_TXD_B, - GPIO_FN_IIC0_SDA_D, GPIO_FN_AVB_TXD0, GPIO_FN_ADICS_SAMP, GPIO_FN_AD_DO, - GPIO_FN_ETH_RX_ER, GPIO_FN_VI0_G2, GPIO_FN_MSIOF2_SCK_B, - GPIO_FN_CAN0_RX_B, GPIO_FN_AVB_TXD1, GPIO_FN_ADICLK, GPIO_FN_AD_CLK, - GPIO_FN_ETH_RXD0, GPIO_FN_VI0_G3, GPIO_FN_MSIOF2_SYNC_B, - GPIO_FN_CAN0_TX_B, GPIO_FN_AVB_TXD2, GPIO_FN_ADICHS0, GPIO_FN_AD_NCS_N, - GPIO_FN_ETH_RXD1, GPIO_FN_VI0_G4, GPIO_FN_MSIOF2_SS1_B, - GPIO_FN_SCIF4_RXD_D, GPIO_FN_AVB_TXD3, GPIO_FN_ADICHS1, - GPIO_FN_ETH_LINK, GPIO_FN_VI0_G5, GPIO_FN_MSIOF2_SS2_B, - GPIO_FN_SCIF4_TXD_D, GPIO_FN_AVB_TXD4, GPIO_FN_ADICHS2, - GPIO_FN_ETH_REFCLK, GPIO_FN_VI0_G6, GPIO_FN_SCIF2_SCK_C, - GPIO_FN_AVB_TXD5, GPIO_FN_SSI_SCK5_B, GPIO_FN_ETH_TXD1, GPIO_FN_VI0_G7, - GPIO_FN_SCIF2_RXD_C, GPIO_FN_IIC1_SCL_D, GPIO_FN_AVB_TXD6, - GPIO_FN_SSI_WS5_B, GPIO_FN_ETH_TX_EN, GPIO_FN_VI0_R0, - GPIO_FN_SCIF2_TXD_C, GPIO_FN_IIC1_SDA_D, GPIO_FN_AVB_TXD7, - GPIO_FN_SSI_SDATA5_B, GPIO_FN_ETH_MAGIC, GPIO_FN_VI0_R1, - GPIO_FN_SCIF3_SCK_B, GPIO_FN_AVB_TX_ER, GPIO_FN_SSI_SCK6_B, - GPIO_FN_ETH_TXD0, GPIO_FN_VI0_R2, GPIO_FN_SCIF3_RXD_B, - GPIO_FN_I2C4_SCL_E, GPIO_FN_AVB_GTX_CLK, GPIO_FN_SSI_WS6_B, - GPIO_FN_DREQ0_N, GPIO_FN_SCIFB1_RXD, - - /* IPSR8 */ - GPIO_FN_ETH_MDC, GPIO_FN_VI0_R3, GPIO_FN_SCIF3_TXD_B, - GPIO_FN_I2C4_SDA_E, GPIO_FN_AVB_MDC, GPIO_FN_SSI_SDATA6_B, - GPIO_FN_HSCIF0_HRX, GPIO_FN_VI0_R4, GPIO_FN_I2C1_SCL_C, - GPIO_FN_AUDIO_CLKA_B, GPIO_FN_AVB_MDIO, GPIO_FN_SSI_SCK78_B, - GPIO_FN_HSCIF0_HTX, GPIO_FN_VI0_R5, GPIO_FN_I2C1_SDA_C, - GPIO_FN_AUDIO_CLKB_B, GPIO_FN_AVB_LINK, GPIO_FN_SSI_WS78_B, - GPIO_FN_HSCIF0_HCTS_N, GPIO_FN_VI0_R6, GPIO_FN_SCIF0_RXD_D, - GPIO_FN_I2C0_SCL_E, GPIO_FN_AVB_MAGIC, GPIO_FN_SSI_SDATA7_B, - GPIO_FN_HSCIF0_HRTS_N, GPIO_FN_VI0_R7, GPIO_FN_SCIF0_TXD_D, - GPIO_FN_I2C0_SDA_E, GPIO_FN_AVB_PHY_INT, GPIO_FN_SSI_SDATA8_B, - GPIO_FN_HSCIF0_HSCK, GPIO_FN_SCIF_CLK_B, GPIO_FN_AVB_CRS, - GPIO_FN_AUDIO_CLKC_B, GPIO_FN_I2C0_SCL, GPIO_FN_SCIF0_RXD_C, - GPIO_FN_PWM5, GPIO_FN_TCLK1_B, GPIO_FN_AVB_GTXREFCLK, GPIO_FN_CAN1_RX_D, - GPIO_FN_TPUTO0_B, GPIO_FN_I2C0_SDA, GPIO_FN_SCIF0_TXD_C, GPIO_FN_TPUTO0, - GPIO_FN_CAN_CLK, GPIO_FN_DVC_MUTE, GPIO_FN_CAN1_TX_D, GPIO_FN_I2C1_SCL, - GPIO_FN_SCIF4_RXD, GPIO_FN_PWM5_B, GPIO_FN_DU1_DR0, GPIO_FN_RIF1_SYNC_B, - GPIO_FN_TS_SDATA_D, GPIO_FN_TPUTO1_B, GPIO_FN_I2C1_SDA, - GPIO_FN_SCIF4_TXD, GPIO_FN_IRQ5, GPIO_FN_DU1_DR1, GPIO_FN_RIF1_CLK_B, - GPIO_FN_TS_SCK_D, GPIO_FN_BPFCLK_C, GPIO_FN_MSIOF0_RXD, - GPIO_FN_SCIF5_RXD, GPIO_FN_I2C2_SCL_C, GPIO_FN_DU1_DR2, - GPIO_FN_RIF1_D0_B, GPIO_FN_TS_SDEN_D, GPIO_FN_FMCLK_C, GPIO_FN_RDS_CLK, - - /* IPSR9 */ - GPIO_FN_MSIOF0_TXD, GPIO_FN_SCIF5_TXD, GPIO_FN_I2C2_SDA_C, - GPIO_FN_DU1_DR3, GPIO_FN_RIF1_D1_B, GPIO_FN_TS_SPSYNC_D, GPIO_FN_FMIN_C, - GPIO_FN_RDS_DATA, GPIO_FN_MSIOF0_SCK, GPIO_FN_IRQ0, GPIO_FN_TS_SDATA, - GPIO_FN_DU1_DR4, GPIO_FN_RIF1_SYNC, GPIO_FN_TPUTO1_C, - GPIO_FN_MSIOF0_SYNC, GPIO_FN_PWM1, GPIO_FN_TS_SCK, GPIO_FN_DU1_DR5, - GPIO_FN_RIF1_CLK, GPIO_FN_BPFCLK_B, GPIO_FN_MSIOF0_SS1, - GPIO_FN_SCIFA0_RXD, GPIO_FN_TS_SDEN, GPIO_FN_DU1_DR6, GPIO_FN_RIF1_D0, - GPIO_FN_FMCLK_B, GPIO_FN_RDS_CLK_B, GPIO_FN_MSIOF0_SS2, - GPIO_FN_SCIFA0_TXD, GPIO_FN_TS_SPSYNC, GPIO_FN_DU1_DR7, GPIO_FN_RIF1_D1, - GPIO_FN_FMIN_B, GPIO_FN_RDS_DATA_B, GPIO_FN_HSCIF1_HRX, - GPIO_FN_I2C4_SCL, GPIO_FN_PWM6, GPIO_FN_DU1_DG0, GPIO_FN_HSCIF1_HTX, - GPIO_FN_I2C4_SDA, GPIO_FN_TPUTO1, GPIO_FN_DU1_DG1, GPIO_FN_HSCIF1_HSCK, - GPIO_FN_PWM2, GPIO_FN_IETX, GPIO_FN_DU1_DG2, GPIO_FN_REMOCON_B, - GPIO_FN_SPEEDIN_B, GPIO_FN_VSP_B, GPIO_FN_HSCIF1_HCTS_N, - GPIO_FN_SCIFA4_RXD, GPIO_FN_IECLK, GPIO_FN_DU1_DG3, GPIO_FN_SSI_SCK1_B, - GPIO_FN_CAN_DEBUG_HW_TRIGGER, GPIO_FN_CC50_STATE32, - GPIO_FN_HSCIF1_HRTS_N, GPIO_FN_SCIFA4_TXD, GPIO_FN_IERX, - GPIO_FN_DU1_DG4, GPIO_FN_SSI_WS1_B, GPIO_FN_CAN_STEP0, - GPIO_FN_CC50_STATE33, GPIO_FN_SCIF1_SCK, GPIO_FN_PWM3, GPIO_FN_TCLK2, - GPIO_FN_DU1_DG5, GPIO_FN_SSI_SDATA1_B, GPIO_FN_CAN_TXCLK, - GPIO_FN_CC50_STATE34, - - /* IPSR10 */ - GPIO_FN_SCIF1_RXD, GPIO_FN_IIC0_SCL, GPIO_FN_DU1_DG6, - GPIO_FN_SSI_SCK2_B, GPIO_FN_CAN_DEBUGOUT0, GPIO_FN_CC50_STATE35, - GPIO_FN_SCIF1_TXD, GPIO_FN_IIC0_SDA, GPIO_FN_DU1_DG7, GPIO_FN_SSI_WS2_B, - GPIO_FN_CAN_DEBUGOUT1, GPIO_FN_CC50_STATE36, GPIO_FN_SCIF2_RXD, - GPIO_FN_IIC1_SCL, GPIO_FN_DU1_DB0, GPIO_FN_SSI_SDATA2_B, - GPIO_FN_USB0_EXTLP, GPIO_FN_CAN_DEBUGOUT2, GPIO_FN_CC50_STATE37, - GPIO_FN_SCIF2_TXD, GPIO_FN_IIC1_SDA, GPIO_FN_DU1_DB1, - GPIO_FN_SSI_SCK9_B, GPIO_FN_USB0_OVC1, GPIO_FN_CAN_DEBUGOUT3, - GPIO_FN_CC50_STATE38, GPIO_FN_SCIF2_SCK, GPIO_FN_IRQ1, GPIO_FN_DU1_DB2, - GPIO_FN_SSI_WS9_B, GPIO_FN_USB0_IDIN, GPIO_FN_CAN_DEBUGOUT4, - GPIO_FN_CC50_STATE39, GPIO_FN_SCIF3_SCK, GPIO_FN_IRQ2, GPIO_FN_BPFCLK_D, - GPIO_FN_DU1_DB3, GPIO_FN_SSI_SDATA9_B, GPIO_FN_TANS2, - GPIO_FN_CAN_DEBUGOUT5, GPIO_FN_CC50_OSCOUT, GPIO_FN_SCIF3_RXD, - GPIO_FN_I2C1_SCL_E, GPIO_FN_FMCLK_D, GPIO_FN_DU1_DB4, - GPIO_FN_AUDIO_CLKA_C, GPIO_FN_SSI_SCK4_B, GPIO_FN_CAN_DEBUGOUT6, - GPIO_FN_RDS_CLK_C, GPIO_FN_SCIF3_TXD, GPIO_FN_I2C1_SDA_E, - GPIO_FN_FMIN_D, GPIO_FN_DU1_DB5, GPIO_FN_AUDIO_CLKB_C, - GPIO_FN_SSI_WS4_B, GPIO_FN_CAN_DEBUGOUT7, GPIO_FN_RDS_DATA_C, - GPIO_FN_I2C2_SCL, GPIO_FN_SCIFA5_RXD, GPIO_FN_DU1_DB6, - GPIO_FN_AUDIO_CLKC_C, GPIO_FN_SSI_SDATA4_B, GPIO_FN_CAN_DEBUGOUT8, - GPIO_FN_I2C2_SDA, GPIO_FN_SCIFA5_TXD, GPIO_FN_DU1_DB7, - GPIO_FN_AUDIO_CLKOUT_C, GPIO_FN_CAN_DEBUGOUT9, GPIO_FN_SSI_SCK5, - GPIO_FN_SCIFA3_SCK, GPIO_FN_CAN_DEBUGOUT10, - GPIO_FN_DU1_DOTCLKIN, - - /* IPSR11 */ - GPIO_FN_SSI_WS5, GPIO_FN_SCIFA3_RXD, GPIO_FN_I2C3_SCL_C, - GPIO_FN_DU1_DOTCLKOUT0, GPIO_FN_CAN_DEBUGOUT11, GPIO_FN_SSI_SDATA5, - GPIO_FN_SCIFA3_TXD, GPIO_FN_I2C3_SDA_C, GPIO_FN_DU1_DOTCLKOUT1, - GPIO_FN_CAN_DEBUGOUT12, GPIO_FN_SSI_SCK6, GPIO_FN_SCIFA1_SCK_B, - GPIO_FN_DU1_EXHSYNC_DU1_HSYNC, GPIO_FN_CAN_DEBUGOUT13, GPIO_FN_SSI_WS6, - GPIO_FN_SCIFA1_RXD_B, GPIO_FN_I2C4_SCL_C, GPIO_FN_DU1_EXVSYNC_DU1_VSYNC, - GPIO_FN_CAN_DEBUGOUT14, GPIO_FN_SSI_SDATA6, GPIO_FN_SCIFA1_TXD_B, - GPIO_FN_I2C4_SDA_C, GPIO_FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, - GPIO_FN_CAN_DEBUGOUT15, GPIO_FN_SSI_SCK78, GPIO_FN_SCIFA2_SCK_B, - GPIO_FN_IIC0_SDA_C, GPIO_FN_DU1_DISP, GPIO_FN_SSI_WS78, - GPIO_FN_SCIFA2_RXD_B, GPIO_FN_IIC0_SCL_C, GPIO_FN_DU1_CDE, - GPIO_FN_SSI_SDATA7, GPIO_FN_SCIFA2_TXD_B, GPIO_FN_IRQ8, - GPIO_FN_AUDIO_CLKA_D, GPIO_FN_CAN_CLK_D, GPIO_FN_PCMOE_N, - GPIO_FN_SSI_SCK0129, GPIO_FN_MSIOF1_RXD_B, GPIO_FN_SCIF5_RXD_D, - GPIO_FN_ADIDATA_B, GPIO_FN_AD_DI_B, GPIO_FN_PCMWE_N, GPIO_FN_SSI_WS0129, - GPIO_FN_MSIOF1_TXD_B, GPIO_FN_SCIF5_TXD_D, GPIO_FN_ADICS_SAMP_B, - GPIO_FN_AD_DO_B, GPIO_FN_SSI_SDATA0, GPIO_FN_MSIOF1_SCK_B, - GPIO_FN_PWM0_B, GPIO_FN_ADICLK_B, GPIO_FN_AD_CLK_B, - - /* IPSR12 */ - GPIO_FN_SSI_SCK34, GPIO_FN_MSIOF1_SYNC_B, GPIO_FN_SCIFA1_SCK_C, - GPIO_FN_ADICHS0_B, GPIO_FN_AD_NCS_N_B, GPIO_FN_DREQ1_N_B, - GPIO_FN_SSI_WS34, GPIO_FN_MSIOF1_SS1_B, GPIO_FN_SCIFA1_RXD_C, - GPIO_FN_ADICHS1_B, GPIO_FN_CAN1_RX_C, GPIO_FN_DACK1_B, - GPIO_FN_SSI_SDATA3, GPIO_FN_MSIOF1_SS2_B, GPIO_FN_SCIFA1_TXD_C, - GPIO_FN_ADICHS2_B, GPIO_FN_CAN1_TX_C, GPIO_FN_DREQ2_N, GPIO_FN_SSI_SCK4, - GPIO_FN_MLB_CK, GPIO_FN_IETX_B, GPIO_FN_IRD_TX, GPIO_FN_SSI_WS4, - GPIO_FN_MLB_SIG, GPIO_FN_IECLK_B, GPIO_FN_IRD_RX, GPIO_FN_SSI_SDATA4, - GPIO_FN_MLB_DAT, GPIO_FN_IERX_B, GPIO_FN_IRD_SCK, GPIO_FN_SSI_SDATA8, - GPIO_FN_SCIF1_SCK_B, GPIO_FN_PWM1_B, GPIO_FN_IRQ9, GPIO_FN_REMOCON, - GPIO_FN_DACK2, GPIO_FN_ETH_MDIO_B, GPIO_FN_SSI_SCK1, - GPIO_FN_SCIF1_RXD_B, GPIO_FN_IIC1_SCL_C, GPIO_FN_VI1_CLK, - GPIO_FN_CAN0_RX_D, GPIO_FN_AVB_AVTP_CAPTURE, GPIO_FN_ETH_CRS_DV_B, - GPIO_FN_SSI_WS1, GPIO_FN_SCIF1_TXD_B, GPIO_FN_IIC1_SDA_C, - GPIO_FN_VI1_DATA0, GPIO_FN_CAN0_TX_D, GPIO_FN_AVB_AVTP_MATCH, - GPIO_FN_ETH_RX_ER_B, GPIO_FN_SSI_SDATA1, GPIO_FN_HSCIF1_HRX_B, - GPIO_FN_VI1_DATA1, GPIO_FN_SDATA, GPIO_FN_ATAG0_N, GPIO_FN_ETH_RXD0_B, - GPIO_FN_SSI_SCK2, GPIO_FN_HSCIF1_HTX_B, GPIO_FN_VI1_DATA2, - GPIO_FN_MDATA, GPIO_FN_ATAWR0_N, GPIO_FN_ETH_RXD1_B, - - /* IPSR13 */ - GPIO_FN_SSI_WS2, GPIO_FN_HSCIF1_HCTS_N_B, GPIO_FN_SCIFA0_RXD_D, - GPIO_FN_VI1_DATA3, GPIO_FN_SCKZ, GPIO_FN_ATACS00_N, GPIO_FN_ETH_LINK_B, - GPIO_FN_SSI_SDATA2, GPIO_FN_HSCIF1_HRTS_N_B, GPIO_FN_SCIFA0_TXD_D, - GPIO_FN_VI1_DATA4, GPIO_FN_STM_N, GPIO_FN_ATACS10_N, - GPIO_FN_ETH_REFCLK_B, GPIO_FN_SSI_SCK9, GPIO_FN_SCIF2_SCK_B, - GPIO_FN_PWM2_B, GPIO_FN_VI1_DATA5, GPIO_FN_MTS_N, GPIO_FN_EX_WAIT1, - GPIO_FN_ETH_TXD1_B, GPIO_FN_SSI_WS9, GPIO_FN_SCIF2_RXD_B, - GPIO_FN_I2C3_SCL_E, GPIO_FN_VI1_DATA6, GPIO_FN_ATARD0_N, - GPIO_FN_ETH_TX_EN_B, GPIO_FN_SSI_SDATA9, GPIO_FN_SCIF2_TXD_B, - GPIO_FN_I2C3_SDA_E, GPIO_FN_VI1_DATA7, GPIO_FN_ATADIR0_N, - GPIO_FN_ETH_MAGIC_B, GPIO_FN_AUDIO_CLKA, GPIO_FN_I2C0_SCL_B, - GPIO_FN_SCIFA4_RXD_D, GPIO_FN_VI1_CLKENB, GPIO_FN_TS_SDATA_C, - GPIO_FN_RIF0_SYNC_B, GPIO_FN_ETH_TXD0_B, GPIO_FN_AUDIO_CLKB, - GPIO_FN_I2C0_SDA_B, GPIO_FN_SCIFA4_TXD_D, GPIO_FN_VI1_FIELD, - GPIO_FN_TS_SCK_C, GPIO_FN_RIF0_CLK_B, GPIO_FN_BPFCLK_E, - GPIO_FN_ETH_MDC_B, GPIO_FN_AUDIO_CLKC, GPIO_FN_I2C4_SCL_B, - GPIO_FN_SCIFA5_RXD_D, GPIO_FN_VI1_HSYNC_N, GPIO_FN_TS_SDEN_C, - GPIO_FN_RIF0_D0_B, GPIO_FN_FMCLK_E, GPIO_FN_RDS_CLK_D, - GPIO_FN_AUDIO_CLKOUT, GPIO_FN_I2C4_SDA_B, GPIO_FN_SCIFA5_TXD_D, - GPIO_FN_VI1_VSYNC_N, GPIO_FN_TS_SPSYNC_C, GPIO_FN_RIF0_D1_B, - GPIO_FN_FMIN_E, GPIO_FN_RDS_DATA_D, -}; - -#endif /* __ASM_R8A7794_H__ */ diff --git a/arch/arm/mach-rmobile/include/mach/rmobile.h b/arch/arm/mach-rmobile/include/mach/rmobile.h index 94ea366f453..c94b3ff5093 100644 --- a/arch/arm/mach-rmobile/include/mach/rmobile.h +++ b/arch/arm/mach-rmobile/include/mach/rmobile.h @@ -35,6 +35,7 @@ #define RMOBILE_CPU_TYPE_R8A7796 0x52 #define RMOBILE_CPU_TYPE_R8A77965 0x55 #define RMOBILE_CPU_TYPE_R8A77970 0x54 +#define RMOBILE_CPU_TYPE_R8A77990 0x57 #define RMOBILE_CPU_TYPE_R8A77995 0x58 #ifndef __ASSEMBLY__ diff --git a/arch/arm/mach-rmobile/pfc-r8a7790.c b/arch/arm/mach-rmobile/pfc-r8a7790.c deleted file mode 100644 index 31be1bb0c3e..00000000000 --- a/arch/arm/mach-rmobile/pfc-r8a7790.c +++ /dev/null @@ -1,1813 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * arch/arm/cpu/armv7/rmobile/pfc-r8a7790.c - * This file is r8a7790 processor support - PFC hardware block. - * - * Copy from linux-kernel:drivers/pinctrl/sh-pfc/pfc-r8a7790.c - * - * Copyright (C) 2013 Renesas Electronics Corporation - * Copyright (C) 2013 Magnus Damm - * Copyright (C) 2012 Renesas Solutions Corp. - * Copyright (C) 2012 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> - */ - -#include <common.h> -#include <sh_pfc.h> -#include <asm/gpio.h> -#include "pfc-r8a7790.h" - -enum { - PINMUX_RESERVED = 0, - - PINMUX_DATA_BEGIN, - GP_ALL(DATA), - PINMUX_DATA_END, - - PINMUX_INPUT_BEGIN, - GP_ALL(IN), - PINMUX_INPUT_END, - - PINMUX_OUTPUT_BEGIN, - GP_ALL(OUT), - PINMUX_OUTPUT_END, - - PINMUX_FUNCTION_BEGIN, - GP_ALL(FN), - - /* GPSR0 */ - FN_IP0_2_0, FN_IP0_5_3, FN_IP0_8_6, FN_IP0_11_9, FN_IP0_15_12, - FN_IP0_19_16, FN_IP0_22_20, FN_IP0_26_23, FN_IP0_30_27, - FN_IP1_3_0, FN_IP1_7_4, FN_IP1_11_8, FN_IP1_14_12, - FN_IP1_17_15, FN_IP1_21_18, FN_IP1_25_22, FN_IP1_27_26, - FN_IP1_29_28, FN_IP2_2_0, FN_IP2_5_3, FN_IP2_8_6, FN_IP2_11_9, - FN_IP2_14_12, FN_IP2_17_15, FN_IP2_21_18, FN_IP2_25_22, - FN_IP2_28_26, FN_IP3_3_0, FN_IP3_7_4, FN_IP3_11_8, - FN_IP3_14_12, FN_IP3_17_15, - - /* GPSR1 */ - FN_IP3_19_18, FN_IP3_22_20, FN_IP3_25_23, FN_IP3_28_26, - FN_IP3_31_29, FN_IP4_2_0, FN_IP4_5_3, FN_IP4_8_6, FN_IP4_11_9, - FN_IP4_14_12, FN_IP4_17_15, FN_IP4_20_18, FN_IP4_23_21, - FN_IP4_26_24, FN_IP4_29_27, FN_IP5_2_0, FN_IP5_5_3, FN_IP5_9_6, - FN_IP5_12_10, FN_IP5_14_13, FN_IP5_17_15, FN_IP5_20_18, - FN_IP5_23_21, FN_IP5_26_24, FN_IP5_29_27, FN_IP6_2_0, - FN_IP6_5_3, FN_IP6_8_6, FN_IP6_10_9, FN_IP6_13_11, - - /* GPSR2 */ - FN_IP7_28_27, FN_IP7_30_29, FN_IP8_1_0, FN_IP8_3_2, FN_IP8_5_4, - FN_IP8_7_6, FN_IP8_9_8, FN_IP8_11_10, FN_IP8_13_12, FN_IP8_15_14, - FN_IP8_17_16, FN_IP8_19_18, FN_IP8_21_20, FN_IP8_23_22, - FN_IP8_25_24, FN_IP8_26, FN_IP8_27, FN_VI1_DATA7_VI1_B7, - FN_IP6_16_14, FN_IP6_19_17, FN_IP6_22_20, FN_IP6_25_23, - FN_IP6_28_26, FN_IP6_31_29, FN_IP7_2_0, FN_IP7_5_3, FN_IP7_7_6, - FN_IP7_9_8, FN_IP7_12_10, FN_IP7_15_13, - - /* GPSR3 */ - FN_IP8_28, FN_IP8_30_29, FN_IP9_1_0, FN_IP9_3_2, FN_IP9_5_4, - FN_IP9_7_6, FN_IP9_11_8, FN_IP9_15_12, FN_IP9_17_16, FN_IP9_19_18, - FN_IP9_21_20, FN_IP9_23_22, FN_IP9_25_24, FN_IP9_27_26, - FN_IP9_31_28, FN_IP10_3_0, FN_IP10_6_4, FN_IP10_10_7, FN_IP10_14_11, - FN_IP10_18_15, FN_IP10_22_19, FN_IP10_25_23, FN_IP10_29_26, - FN_IP11_3_0, FN_IP11_4, FN_IP11_6_5, FN_IP11_8_7, FN_IP11_10_9, - FN_IP11_12_11, FN_IP11_14_13, FN_IP11_17_15, FN_IP11_21_18, - - /* GPSR4 */ - FN_IP11_23_22, FN_IP11_26_24, FN_IP11_29_27, FN_IP11_31_30, - FN_IP12_1_0, FN_IP12_3_2, FN_IP12_5_4, FN_IP12_7_6, FN_IP12_10_8, - FN_IP12_13_11, FN_IP12_16_14, FN_IP12_19_17, FN_IP12_22_20, - FN_IP12_24_23, FN_IP12_27_25, FN_IP12_30_28, FN_IP13_2_0, - FN_IP13_6_3, FN_IP13_9_7, FN_IP13_12_10, FN_IP13_15_13, - FN_IP13_18_16, FN_IP13_22_19, FN_IP13_25_23, FN_IP13_28_26, - FN_IP13_30_29, FN_IP14_2_0, FN_IP14_5_3, FN_IP14_8_6, FN_IP14_11_9, - FN_IP14_15_12, FN_IP14_18_16, - - /* GPSR5 */ - FN_IP14_21_19, FN_IP14_24_22, FN_IP14_27_25, FN_IP14_30_28, - FN_IP15_2_0, FN_IP15_5_3, FN_IP15_8_6, FN_IP15_11_9, FN_IP15_13_12, - FN_IP15_15_14, FN_IP15_17_16, FN_IP15_19_18, FN_IP15_22_20, - FN_IP15_25_23, FN_IP15_27_26, FN_IP15_29_28, FN_IP16_2_0, - FN_IP16_5_3, FN_USB0_PWEN, FN_USB0_OVC_VBUS, FN_IP16_6, FN_IP16_7, - FN_USB2_PWEN, FN_USB2_OVC, FN_AVS1, FN_AVS2, FN_DU_DOTCLKIN0, - FN_IP7_26_25, FN_DU_DOTCLKIN2, FN_IP7_18_16, FN_IP7_21_19, FN_IP7_24_22, - - /* IPSR0 - IPSR5 */ - /* IPSR6 */ - FN_DACK0, FN_IRQ0, FN_INTC_IRQ0_N, FN_SSI_SCK6_B, - FN_VI1_VSYNC_N, FN_VI1_VSYNC_N_B, FN_SSI_WS78_C, - FN_DREQ1_N, FN_VI1_CLKENB, FN_VI1_CLKENB_B, - FN_SSI_SDATA7_C, FN_SSI_SCK78_B, FN_DACK1, FN_IRQ1, - FN_INTC_IRQ1_N, FN_SSI_WS6_B, FN_SSI_SDATA8_C, - FN_DREQ2_N, FN_HSCK1_B, FN_HCTS0_N_B, - FN_MSIOF0_TXD_B, FN_DACK2, FN_IRQ2, FN_INTC_IRQ2_N, - FN_SSI_SDATA6_B, FN_HRTS0_N_B, FN_MSIOF0_RXD_B, - FN_ETH_CRS_DV, FN_RMII_CRS_DV, FN_STP_ISCLK_0_B, - FN_TS_SDEN0_D, FN_GLO_Q0_C, FN_SCL2_E, - FN_SCL2_CIS_E, FN_ETH_RX_ER, FN_RMII_RX_ER, - FN_STP_ISD_0_B, FN_TS_SPSYNC0_D, FN_GLO_Q1_C, - FN_SDA2_E, FN_SDA2_CIS_E, FN_ETH_RXD0, FN_RMII_RXD0, - FN_STP_ISEN_0_B, FN_TS_SDAT0_D, FN_GLO_I0_C, - FN_SCIFB1_SCK_G, FN_SCK1_E, FN_ETH_RXD1, - FN_RMII_RXD1, FN_HRX0_E, FN_STP_ISSYNC_0_B, - FN_TS_SCK0_D, FN_GLO_I1_C, FN_SCIFB1_RXD_G, - FN_RX1_E, FN_ETH_LINK, FN_RMII_LINK, FN_HTX0_E, - FN_STP_IVCXO27_0_B, FN_SCIFB1_TXD_G, FN_TX1_E, - FN_ETH_REF_CLK, FN_RMII_REF_CLK, FN_HCTS0_N_E, - FN_STP_IVCXO27_1_B, FN_HRX0_F, - - /* IPSR7 */ - FN_ETH_MDIO, FN_RMII_MDIO, FN_HRTS0_N_E, - FN_SIM0_D_C, FN_HCTS0_N_F, FN_ETH_TXD1, - FN_RMII_TXD1, FN_HTX0_F, FN_BPFCLK_G, FN_RDS_CLK_F, - FN_ETH_TX_EN, FN_RMII_TX_EN, FN_SIM0_CLK_C, - FN_HRTS0_N_F, FN_ETH_MAGIC, FN_RMII_MAGIC, - FN_SIM0_RST_C, FN_ETH_TXD0, FN_RMII_TXD0, - FN_STP_ISCLK_1_B, FN_TS_SDEN1_C, FN_GLO_SCLK_C, - FN_ETH_MDC, FN_RMII_MDC, FN_STP_ISD_1_B, - FN_TS_SPSYNC1_C, FN_GLO_SDATA_C, FN_PWM0, - FN_SCIFA2_SCK_C, FN_STP_ISEN_1_B, FN_TS_SDAT1_C, - FN_GLO_SS_C, FN_PWM1, FN_SCIFA2_TXD_C, - FN_STP_ISSYNC_1_B, FN_TS_SCK1_C, FN_GLO_RFON_C, - FN_PCMOE_N, FN_PWM2, FN_PWMFSW0, FN_SCIFA2_RXD_C, - FN_PCMWE_N, FN_IECLK_C, FN_DU1_DOTCLKIN, - FN_AUDIO_CLKC, FN_AUDIO_CLKOUT_C, FN_VI0_CLK, - FN_ATACS00_N, FN_AVB_RXD1, FN_MII_RXD1, - FN_VI0_DATA0_VI0_B0, FN_ATACS10_N, FN_AVB_RXD2, - FN_MII_RXD2, - - /* IPSR8 */ - FN_VI0_DATA1_VI0_B1, FN_ATARD0_N, FN_AVB_RXD3, - FN_MII_RXD3, FN_VI0_DATA2_VI0_B2, FN_ATAWR0_N, - FN_AVB_RXD4, FN_VI0_DATA3_VI0_B3, FN_ATADIR0_N, - FN_AVB_RXD5, FN_VI0_DATA4_VI0_B4, FN_ATAG0_N, - FN_AVB_RXD6, FN_VI0_DATA5_VI0_B5, FN_EX_WAIT1, - FN_AVB_RXD7, FN_VI0_DATA6_VI0_B6, FN_AVB_RX_ER, - FN_MII_RX_ER, FN_VI0_DATA7_VI0_B7, FN_AVB_RX_CLK, - FN_MII_RX_CLK, FN_VI1_CLK, FN_AVB_RX_DV, - FN_MII_RX_DV, FN_VI1_DATA0_VI1_B0, FN_SCIFA1_SCK_D, - FN_AVB_CRS, FN_MII_CRS, FN_VI1_DATA1_VI1_B1, - FN_SCIFA1_RXD_D, FN_AVB_MDC, FN_MII_MDC, - FN_VI1_DATA2_VI1_B2, FN_SCIFA1_TXD_D, FN_AVB_MDIO, - FN_MII_MDIO, FN_VI1_DATA3_VI1_B3, FN_SCIFA1_CTS_N_D, - FN_AVB_GTX_CLK, FN_VI1_DATA4_VI1_B4, FN_SCIFA1_RTS_N_D, - FN_AVB_MAGIC, FN_MII_MAGIC, FN_VI1_DATA5_VI1_B5, - FN_AVB_PHY_INT, FN_VI1_DATA6_VI1_B6, FN_AVB_GTXREFCLK, - FN_SD0_CLK, FN_VI1_DATA0_VI1_B0_B, FN_SD0_CMD, - FN_SCIFB1_SCK_B, FN_VI1_DATA1_VI1_B1_B, - - /* IPSR9 */ - FN_SD0_DAT0, FN_SCIFB1_RXD_B, FN_VI1_DATA2_VI1_B2_B, - FN_SD0_DAT1, FN_SCIFB1_TXD_B, FN_VI1_DATA3_VI1_B3_B, - FN_SD0_DAT2, FN_SCIFB1_CTS_N_B, FN_VI1_DATA4_VI1_B4_B, - FN_SD0_DAT3, FN_SCIFB1_RTS_N_B, FN_VI1_DATA5_VI1_B5_B, - FN_SD0_CD, FN_MMC0_D6, FN_TS_SDEN0_B, FN_USB0_EXTP, - FN_GLO_SCLK, FN_VI1_DATA6_VI1_B6_B, FN_SCL1_B, - FN_SCL1_CIS_B, FN_VI2_DATA6_VI2_B6_B, FN_SD0_WP, - FN_MMC0_D7, FN_TS_SPSYNC0_B, FN_USB0_IDIN, - FN_GLO_SDATA, FN_VI1_DATA7_VI1_B7_B, FN_SDA1_B, - FN_SDA1_CIS_B, FN_VI2_DATA7_VI2_B7_B, FN_SD1_CLK, - FN_AVB_TX_EN, FN_MII_TX_EN, FN_SD1_CMD, - FN_AVB_TX_ER, FN_MII_TX_ER, FN_SCIFB0_SCK_B, - FN_SD1_DAT0, FN_AVB_TX_CLK, FN_MII_TX_CLK, - FN_SCIFB0_RXD_B, FN_SD1_DAT1, FN_AVB_LINK, - FN_MII_LINK, FN_SCIFB0_TXD_B, FN_SD1_DAT2, - FN_AVB_COL, FN_MII_COL, FN_SCIFB0_CTS_N_B, - FN_SD1_DAT3, FN_AVB_RXD0, FN_MII_RXD0, - FN_SCIFB0_RTS_N_B, FN_SD1_CD, FN_MMC1_D6, - FN_TS_SDEN1, FN_USB1_EXTP, FN_GLO_SS, FN_VI0_CLK_B, - FN_SCL2_D, FN_SCL2_CIS_D, FN_SIM0_CLK_B, - FN_VI3_CLK_B, - - /* IPSR10 */ - FN_SD1_WP, FN_MMC1_D7, FN_TS_SPSYNC1, FN_USB1_IDIN, - FN_GLO_RFON, FN_VI1_CLK_B, FN_SDA2_D, FN_SDA2_CIS_D, - FN_SIM0_D_B, FN_SD2_CLK, FN_MMC0_CLK, FN_SIM0_CLK, - FN_VI0_DATA0_VI0_B0_B, FN_TS_SDEN0_C, FN_GLO_SCLK_B, - FN_VI3_DATA0_B, FN_SD2_CMD, FN_MMC0_CMD, FN_SIM0_D, - FN_VI0_DATA1_VI0_B1_B, FN_SCIFB1_SCK_E, FN_SCK1_D, - FN_TS_SPSYNC0_C, FN_GLO_SDATA_B, FN_VI3_DATA1_B, - FN_SD2_DAT0, FN_MMC0_D0, FN_FMCLK_B, - FN_VI0_DATA2_VI0_B2_B, FN_SCIFB1_RXD_E, FN_RX1_D, - FN_TS_SDAT0_C, FN_GLO_SS_B, FN_VI3_DATA2_B, - FN_SD2_DAT1, FN_MMC0_D1, FN_FMIN_B, FN_RDS_DATA, - FN_VI0_DATA3_VI0_B3_B, FN_SCIFB1_TXD_E, FN_TX1_D, - FN_TS_SCK0_C, FN_GLO_RFON_B, FN_VI3_DATA3_B, - FN_SD2_DAT2, FN_MMC0_D2, FN_BPFCLK_B, FN_RDS_CLK, - FN_VI0_DATA4_VI0_B4_B, FN_HRX0_D, FN_TS_SDEN1_B, - FN_GLO_Q0_B, FN_VI3_DATA4_B, FN_SD2_DAT3, - FN_MMC0_D3, FN_SIM0_RST, FN_VI0_DATA5_VI0_B5_B, - FN_HTX0_D, FN_TS_SPSYNC1_B, FN_GLO_Q1_B, - FN_VI3_DATA5_B, FN_SD2_CD, FN_MMC0_D4, - FN_TS_SDAT0_B, FN_USB2_EXTP, FN_GLO_I0, - FN_VI0_DATA6_VI0_B6_B, FN_HCTS0_N_D, FN_TS_SDAT1_B, - FN_GLO_I0_B, FN_VI3_DATA6_B, - - /* IPSR11 */ - FN_SD2_WP, FN_MMC0_D5, FN_TS_SCK0_B, FN_USB2_IDIN, - FN_GLO_I1, FN_VI0_DATA7_VI0_B7_B, FN_HRTS0_N_D, - FN_TS_SCK1_B, FN_GLO_I1_B, FN_VI3_DATA7_B, - FN_SD3_CLK, FN_MMC1_CLK, FN_SD3_CMD, FN_MMC1_CMD, - FN_MTS_N, FN_SD3_DAT0, FN_MMC1_D0, FN_STM_N, - FN_SD3_DAT1, FN_MMC1_D1, FN_MDATA, FN_SD3_DAT2, - FN_MMC1_D2, FN_SDATA, FN_SD3_DAT3, FN_MMC1_D3, - FN_SCKZ, FN_SD3_CD, FN_MMC1_D4, FN_TS_SDAT1, - FN_VSP, FN_GLO_Q0, FN_SIM0_RST_B, FN_SD3_WP, - FN_MMC1_D5, FN_TS_SCK1, FN_GLO_Q1, FN_FMIN_C, - FN_RDS_DATA_B, FN_FMIN_E, FN_RDS_DATA_D, FN_FMIN_F, - FN_RDS_DATA_E, FN_MLB_CLK, FN_SCL2_B, FN_SCL2_CIS_B, - FN_MLB_SIG, FN_SCIFB1_RXD_D, FN_RX1_C, FN_SDA2_B, - FN_SDA2_CIS_B, FN_MLB_DAT, FN_SPV_EVEN, - FN_SCIFB1_TXD_D, FN_TX1_C, FN_BPFCLK_C, - FN_RDS_CLK_B, FN_SSI_SCK0129, FN_CAN_CLK_B, - FN_MOUT0, - - FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3, - FN_SEL_SCIF1_4, - FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2, - FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, FN_SEL_SCIFB2_2, - FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3, - FN_SEL_SCIFB1_4, - FN_SEL_SCIFB1_5, FN_SEL_SCIFB1_6, - FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, FN_SEL_SCIFA1_3, - FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, - FN_SEL_SCFA_0, FN_SEL_SCFA_1, - FN_SEL_SOF1_0, FN_SEL_SOF1_1, - FN_SEL_SSI7_0, FN_SEL_SSI7_1, FN_SEL_SSI7_2, - FN_SEL_SSI6_0, FN_SEL_SSI6_1, - FN_SEL_SSI5_0, FN_SEL_SSI5_1, FN_SEL_SSI5_2, - FN_SEL_VI3_0, FN_SEL_VI3_1, - FN_SEL_VI2_0, FN_SEL_VI2_1, - FN_SEL_VI1_0, FN_SEL_VI1_1, - FN_SEL_VI0_0, FN_SEL_VI0_1, - FN_SEL_TSIF1_0, FN_SEL_TSIF1_1, FN_SEL_TSIF1_2, - FN_SEL_LBS_0, FN_SEL_LBS_1, - FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3, - FN_SEL_SOF3_0, FN_SEL_SOF3_1, - FN_SEL_SOF0_0, FN_SEL_SOF0_1, - - FN_SEL_TMU1_0, FN_SEL_TMU1_1, - FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, - FN_SEL_SCIFCLK_0, FN_SEL_SCIFCLK_1, - FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3, - FN_SEL_CANCLK_0, FN_SEL_CANCLK_1, - FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1, FN_SEL_SCIFA2_2, - FN_SEL_CAN1_0, FN_SEL_CAN1_1, - FN_SEL_ADI_0, FN_SEL_ADI_1, - FN_SEL_SSP_0, FN_SEL_SSP_1, - FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3, - FN_SEL_FM_4, FN_SEL_FM_5, FN_SEL_FM_6, - FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2, FN_SEL_HSCIF0_3, - FN_SEL_HSCIF0_4, FN_SEL_HSCIF0_5, - FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, - FN_SEL_RDS_0, FN_SEL_RDS_1, FN_SEL_RDS_2, - FN_SEL_RDS_3, FN_SEL_RDS_4, FN_SEL_RDS_5, - FN_SEL_SIM_0, FN_SEL_SIM_1, FN_SEL_SIM_2, - FN_SEL_SSI8_0, FN_SEL_SSI8_1, FN_SEL_SSI8_2, - - FN_SEL_IICDVFS_0, FN_SEL_IICDVFS_1, - FN_SEL_IIC0_0, FN_SEL_IIC0_1, - FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, - FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3, - FN_SEL_IIC2_4, - FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2, - FN_SEL_I2C2_0, FN_SEL_I2C2_1, FN_SEL_I2C2_2, FN_SEL_I2C2_3, - FN_SEL_I2C2_4, - FN_SEL_I2C1_0, FN_SEL_I2C1_1, FN_SEL_I2C1_2, - PINMUX_FUNCTION_END, - - PINMUX_MARK_BEGIN, - - VI1_DATA7_VI1_B7_MARK, - - USB0_PWEN_MARK, USB0_OVC_VBUS_MARK, - USB2_PWEN_MARK, USB2_OVC_MARK, AVS1_MARK, AVS2_MARK, - DU_DOTCLKIN0_MARK, DU_DOTCLKIN2_MARK, - - D0_MARK, MSIOF3_SCK_B_MARK, VI3_DATA0_MARK, VI0_G4_MARK, VI0_G4_B_MARK, - D1_MARK, MSIOF3_SYNC_B_MARK, VI3_DATA1_MARK, VI0_G5_MARK, - VI0_G5_B_MARK, D2_MARK, MSIOF3_RXD_B_MARK, VI3_DATA2_MARK, - VI0_G6_MARK, VI0_G6_B_MARK, D3_MARK, MSIOF3_TXD_B_MARK, - VI3_DATA3_MARK, VI0_G7_MARK, VI0_G7_B_MARK, D4_MARK, - SCIFB1_RXD_F_MARK, SCIFB0_RXD_C_MARK, VI3_DATA4_MARK, - VI0_R0_MARK, VI0_R0_B_MARK, RX0_B_MARK, D5_MARK, - SCIFB1_TXD_F_MARK, SCIFB0_TXD_C_MARK, VI3_DATA5_MARK, - VI0_R1_MARK, VI0_R1_B_MARK, TX0_B_MARK, D6_MARK, - SCL2_C_MARK, VI3_DATA6_MARK, VI0_R2_MARK, VI0_R2_B_MARK, - SCL2_CIS_C_MARK, D7_MARK, AD_DI_B_MARK, SDA2_C_MARK, - VI3_DATA7_MARK, VI0_R3_MARK, VI0_R3_B_MARK, SDA2_CIS_C_MARK, - D8_MARK, SCIFA1_SCK_C_MARK, AVB_TXD0_MARK, MII_TXD0_MARK, - VI0_G0_MARK, VI0_G0_B_MARK, VI2_DATA0_VI2_B0_MARK, - - D9_MARK, SCIFA1_RXD_C_MARK, AVB_TXD1_MARK, MII_TXD1_MARK, - VI0_G1_MARK, VI0_G1_B_MARK, VI2_DATA1_VI2_B1_MARK, D10_MARK, - SCIFA1_TXD_C_MARK, AVB_TXD2_MARK, MII_TXD2_MARK, - VI0_G2_MARK, VI0_G2_B_MARK, VI2_DATA2_VI2_B2_MARK, D11_MARK, - SCIFA1_CTS_N_C_MARK, AVB_TXD3_MARK, MII_TXD3_MARK, - VI0_G3_MARK, VI0_G3_B_MARK, VI2_DATA3_VI2_B3_MARK, - D12_MARK, SCIFA1_RTS_N_C_MARK, AVB_TXD4_MARK, - VI0_HSYNC_N_MARK, VI0_HSYNC_N_B_MARK, VI2_DATA4_VI2_B4_MARK, - D13_MARK, AVB_TXD5_MARK, VI0_VSYNC_N_MARK, - VI0_VSYNC_N_B_MARK, VI2_DATA5_VI2_B5_MARK, D14_MARK, - SCIFB1_RXD_C_MARK, AVB_TXD6_MARK, RX1_B_MARK, - VI0_CLKENB_MARK, VI0_CLKENB_B_MARK, VI2_DATA6_VI2_B6_MARK, - D15_MARK, SCIFB1_TXD_C_MARK, AVB_TXD7_MARK, TX1_B_MARK, - VI0_FIELD_MARK, VI0_FIELD_B_MARK, VI2_DATA7_VI2_B7_MARK, - A0_MARK, PWM3_MARK, A1_MARK, PWM4_MARK, - - A2_MARK, PWM5_MARK, MSIOF1_SS1_B_MARK, A3_MARK, - PWM6_MARK, MSIOF1_SS2_B_MARK, A4_MARK, MSIOF1_TXD_B_MARK, - TPU0TO0_MARK, A5_MARK, SCIFA1_TXD_B_MARK, TPU0TO1_MARK, - A6_MARK, SCIFA1_RTS_N_B_MARK, TPU0TO2_MARK, A7_MARK, - SCIFA1_SCK_B_MARK, AUDIO_CLKOUT_B_MARK, TPU0TO3_MARK, - A8_MARK, SCIFA1_RXD_B_MARK, SSI_SCK5_B_MARK, VI0_R4_MARK, - VI0_R4_B_MARK, SCIFB2_RXD_C_MARK, VI2_DATA0_VI2_B0_B_MARK, - A9_MARK, SCIFA1_CTS_N_B_MARK, SSI_WS5_B_MARK, VI0_R5_MARK, - VI0_R5_B_MARK, SCIFB2_TXD_C_MARK, VI2_DATA1_VI2_B1_B_MARK, - A10_MARK, SSI_SDATA5_B_MARK, MSIOF2_SYNC_MARK, VI0_R6_MARK, - VI0_R6_B_MARK, VI2_DATA2_VI2_B2_B_MARK, - - A11_MARK, SCIFB2_CTS_N_B_MARK, MSIOF2_SCK_MARK, VI1_R0_MARK, - VI1_R0_B_MARK, VI2_G0_MARK, VI2_DATA3_VI2_B3_B_MARK, - A12_MARK, SCIFB2_RXD_B_MARK, MSIOF2_TXD_MARK, VI1_R1_MARK, - VI1_R1_B_MARK, VI2_G1_MARK, VI2_DATA4_VI2_B4_B_MARK, - A13_MARK, SCIFB2_RTS_N_B_MARK, EX_WAIT2_MARK, - MSIOF2_RXD_MARK, VI1_R2_MARK, VI1_R2_B_MARK, VI2_G2_MARK, - VI2_DATA5_VI2_B5_B_MARK, A14_MARK, SCIFB2_TXD_B_MARK, - ATACS11_N_MARK, MSIOF2_SS1_MARK, A15_MARK, SCIFB2_SCK_B_MARK, - ATARD1_N_MARK, MSIOF2_SS2_MARK, A16_MARK, ATAWR1_N_MARK, - A17_MARK, AD_DO_B_MARK, ATADIR1_N_MARK, A18_MARK, - AD_CLK_B_MARK, ATAG1_N_MARK, A19_MARK, AD_NCS_N_B_MARK, - ATACS01_N_MARK, EX_WAIT0_B_MARK, A20_MARK, SPCLK_MARK, - VI1_R3_MARK, VI1_R3_B_MARK, VI2_G4_MARK, - - A21_MARK, MOSI_IO0_MARK, VI1_R4_MARK, VI1_R4_B_MARK, VI2_G5_MARK, - A22_MARK, MISO_IO1_MARK, VI1_R5_MARK, VI1_R5_B_MARK, - VI2_G6_MARK, A23_MARK, IO2_MARK, VI1_G7_MARK, - VI1_G7_B_MARK, VI2_G7_MARK, A24_MARK, IO3_MARK, - VI1_R7_MARK, VI1_R7_B_MARK, VI2_CLKENB_MARK, - VI2_CLKENB_B_MARK, A25_MARK, SSL_MARK, VI1_G6_MARK, - VI1_G6_B_MARK, VI2_FIELD_MARK, VI2_FIELD_B_MARK, CS0_N_MARK, - VI1_R6_MARK, VI1_R6_B_MARK, VI2_G3_MARK, MSIOF0_SS2_B_MARK, - CS1_N_A26_MARK, SPEEDIN_MARK, VI0_R7_MARK, VI0_R7_B_MARK, - VI2_CLK_MARK, VI2_CLK_B_MARK, EX_CS0_N_MARK, HRX1_B_MARK, - VI1_G5_MARK, VI1_G5_B_MARK, VI2_R0_MARK, HTX0_B_MARK, - MSIOF0_SS1_B_MARK, EX_CS1_N_MARK, GPS_CLK_MARK, - HCTS1_N_B_MARK, VI1_FIELD_MARK, VI1_FIELD_B_MARK, - VI2_R1_MARK, EX_CS2_N_MARK, GPS_SIGN_MARK, HRTS1_N_B_MARK, - VI3_CLKENB_MARK, VI1_G0_MARK, VI1_G0_B_MARK, VI2_R2_MARK, - - EX_CS3_N_MARK, GPS_MAG_MARK, VI3_FIELD_MARK, - VI1_G1_MARK, VI1_G1_B_MARK, VI2_R3_MARK, - EX_CS4_N_MARK, MSIOF1_SCK_B_MARK, VI3_HSYNC_N_MARK, - VI2_HSYNC_N_MARK, SCL1_MARK, VI2_HSYNC_N_B_MARK, - INTC_EN0_N_MARK, SCL1_CIS_MARK, EX_CS5_N_MARK, CAN0_RX_MARK, - MSIOF1_RXD_B_MARK, VI3_VSYNC_N_MARK, VI1_G2_MARK, - VI1_G2_B_MARK, VI2_R4_MARK, SDA1_MARK, INTC_EN1_N_MARK, - SDA1_CIS_MARK, BS_N_MARK, IETX_MARK, HTX1_B_MARK, - CAN1_TX_MARK, DRACK0_MARK, IETX_C_MARK, RD_N_MARK, - CAN0_TX_MARK, SCIFA0_SCK_B_MARK, RD_WR_N_MARK, VI1_G3_MARK, - VI1_G3_B_MARK, VI2_R5_MARK, SCIFA0_RXD_B_MARK, - INTC_IRQ4_N_MARK, WE0_N_MARK, IECLK_MARK, CAN_CLK_MARK, - VI2_VSYNC_N_MARK, SCIFA0_TXD_B_MARK, VI2_VSYNC_N_B_MARK, - WE1_N_MARK, IERX_MARK, CAN1_RX_MARK, VI1_G4_MARK, - VI1_G4_B_MARK, VI2_R6_MARK, SCIFA0_CTS_N_B_MARK, - IERX_C_MARK, EX_WAIT0_MARK, IRQ3_MARK, INTC_IRQ3_N_MARK, - VI3_CLK_MARK, SCIFA0_RTS_N_B_MARK, HRX0_B_MARK, - MSIOF0_SCK_B_MARK, DREQ0_N_MARK, VI1_HSYNC_N_MARK, - VI1_HSYNC_N_B_MARK, VI2_R7_MARK, SSI_SCK78_C_MARK, - SSI_WS78_B_MARK, - - DACK0_MARK, IRQ0_MARK, INTC_IRQ0_N_MARK, SSI_SCK6_B_MARK, - VI1_VSYNC_N_MARK, VI1_VSYNC_N_B_MARK, SSI_WS78_C_MARK, - DREQ1_N_MARK, VI1_CLKENB_MARK, VI1_CLKENB_B_MARK, - SSI_SDATA7_C_MARK, SSI_SCK78_B_MARK, DACK1_MARK, IRQ1_MARK, - INTC_IRQ1_N_MARK, SSI_WS6_B_MARK, SSI_SDATA8_C_MARK, - DREQ2_N_MARK, HSCK1_B_MARK, HCTS0_N_B_MARK, - MSIOF0_TXD_B_MARK, DACK2_MARK, IRQ2_MARK, INTC_IRQ2_N_MARK, - SSI_SDATA6_B_MARK, HRTS0_N_B_MARK, MSIOF0_RXD_B_MARK, - ETH_CRS_DV_MARK, RMII_CRS_DV_MARK, STP_ISCLK_0_B_MARK, - TS_SDEN0_D_MARK, GLO_Q0_C_MARK, SCL2_E_MARK, - SCL2_CIS_E_MARK, ETH_RX_ER_MARK, RMII_RX_ER_MARK, - STP_ISD_0_B_MARK, TS_SPSYNC0_D_MARK, GLO_Q1_C_MARK, - SDA2_E_MARK, SDA2_CIS_E_MARK, ETH_RXD0_MARK, RMII_RXD0_MARK, - STP_ISEN_0_B_MARK, TS_SDAT0_D_MARK, GLO_I0_C_MARK, - SCIFB1_SCK_G_MARK, SCK1_E_MARK, ETH_RXD1_MARK, - RMII_RXD1_MARK, HRX0_E_MARK, STP_ISSYNC_0_B_MARK, - TS_SCK0_D_MARK, GLO_I1_C_MARK, SCIFB1_RXD_G_MARK, - RX1_E_MARK, ETH_LINK_MARK, RMII_LINK_MARK, HTX0_E_MARK, - STP_IVCXO27_0_B_MARK, SCIFB1_TXD_G_MARK, TX1_E_MARK, - ETH_REF_CLK_MARK, RMII_REF_CLK_MARK, HCTS0_N_E_MARK, - STP_IVCXO27_1_B_MARK, HRX0_F_MARK, - - ETH_MDIO_MARK, RMII_MDIO_MARK, HRTS0_N_E_MARK, - SIM0_D_C_MARK, HCTS0_N_F_MARK, ETH_TXD1_MARK, - RMII_TXD1_MARK, HTX0_F_MARK, BPFCLK_G_MARK, RDS_CLK_F_MARK, - ETH_TX_EN_MARK, RMII_TX_EN_MARK, SIM0_CLK_C_MARK, - HRTS0_N_F_MARK, ETH_MAGIC_MARK, RMII_MAGIC_MARK, - SIM0_RST_C_MARK, ETH_TXD0_MARK, RMII_TXD0_MARK, - STP_ISCLK_1_B_MARK, TS_SDEN1_C_MARK, GLO_SCLK_C_MARK, - ETH_MDC_MARK, RMII_MDC_MARK, STP_ISD_1_B_MARK, - TS_SPSYNC1_C_MARK, GLO_SDATA_C_MARK, PWM0_MARK, - SCIFA2_SCK_C_MARK, STP_ISEN_1_B_MARK, TS_SDAT1_C_MARK, - GLO_SS_C_MARK, PWM1_MARK, SCIFA2_TXD_C_MARK, - STP_ISSYNC_1_B_MARK, TS_SCK1_C_MARK, GLO_RFON_C_MARK, - PCMOE_N_MARK, PWM2_MARK, PWMFSW0_MARK, SCIFA2_RXD_C_MARK, - PCMWE_N_MARK, IECLK_C_MARK, DU1_DOTCLKIN_MARK, - AUDIO_CLKC_MARK, AUDIO_CLKOUT_C_MARK, VI0_CLK_MARK, - ATACS00_N_MARK, AVB_RXD1_MARK, MII_RXD1_MARK, - VI0_DATA0_VI0_B0_MARK, ATACS10_N_MARK, AVB_RXD2_MARK, - MII_RXD2_MARK, - - VI0_DATA1_VI0_B1_MARK, ATARD0_N_MARK, AVB_RXD3_MARK, - MII_RXD3_MARK, VI0_DATA2_VI0_B2_MARK, ATAWR0_N_MARK, - AVB_RXD4_MARK, VI0_DATA3_VI0_B3_MARK, ATADIR0_N_MARK, - AVB_RXD5_MARK, VI0_DATA4_VI0_B4_MARK, ATAG0_N_MARK, - AVB_RXD6_MARK, VI0_DATA5_VI0_B5_MARK, EX_WAIT1_MARK, - AVB_RXD7_MARK, VI0_DATA6_VI0_B6_MARK, AVB_RX_ER_MARK, - MII_RX_ER_MARK, VI0_DATA7_VI0_B7_MARK, AVB_RX_CLK_MARK, - MII_RX_CLK_MARK, VI1_CLK_MARK, AVB_RX_DV_MARK, - MII_RX_DV_MARK, VI1_DATA0_VI1_B0_MARK, SCIFA1_SCK_D_MARK, - AVB_CRS_MARK, MII_CRS_MARK, VI1_DATA1_VI1_B1_MARK, - SCIFA1_RXD_D_MARK, AVB_MDC_MARK, MII_MDC_MARK, - VI1_DATA2_VI1_B2_MARK, SCIFA1_TXD_D_MARK, AVB_MDIO_MARK, - MII_MDIO_MARK, VI1_DATA3_VI1_B3_MARK, SCIFA1_CTS_N_D_MARK, - AVB_GTX_CLK_MARK, VI1_DATA4_VI1_B4_MARK, SCIFA1_RTS_N_D_MARK, - AVB_MAGIC_MARK, MII_MAGIC_MARK, VI1_DATA5_VI1_B5_MARK, - AVB_PHY_INT_MARK, VI1_DATA6_VI1_B6_MARK, AVB_GTXREFCLK_MARK, - SD0_CLK_MARK, VI1_DATA0_VI1_B0_B_MARK, SD0_CMD_MARK, - SCIFB1_SCK_B_MARK, VI1_DATA1_VI1_B1_B_MARK, - - SD0_DAT0_MARK, SCIFB1_RXD_B_MARK, VI1_DATA2_VI1_B2_B_MARK, - SD0_DAT1_MARK, SCIFB1_TXD_B_MARK, VI1_DATA3_VI1_B3_B_MARK, - SD0_DAT2_MARK, SCIFB1_CTS_N_B_MARK, VI1_DATA4_VI1_B4_B_MARK, - SD0_DAT3_MARK, SCIFB1_RTS_N_B_MARK, VI1_DATA5_VI1_B5_B_MARK, - SD0_CD_MARK, MMC0_D6_MARK, TS_SDEN0_B_MARK, USB0_EXTP_MARK, - GLO_SCLK_MARK, VI1_DATA6_VI1_B6_B_MARK, SCL1_B_MARK, - SCL1_CIS_B_MARK, VI2_DATA6_VI2_B6_B_MARK, SD0_WP_MARK, - MMC0_D7_MARK, TS_SPSYNC0_B_MARK, USB0_IDIN_MARK, - GLO_SDATA_MARK, VI1_DATA7_VI1_B7_B_MARK, SDA1_B_MARK, - SDA1_CIS_B_MARK, VI2_DATA7_VI2_B7_B_MARK, SD1_CLK_MARK, - AVB_TX_EN_MARK, MII_TX_EN_MARK, SD1_CMD_MARK, - AVB_TX_ER_MARK, MII_TX_ER_MARK, SCIFB0_SCK_B_MARK, - SD1_DAT0_MARK, AVB_TX_CLK_MARK, MII_TX_CLK_MARK, - SCIFB0_RXD_B_MARK, SD1_DAT1_MARK, AVB_LINK_MARK, - MII_LINK_MARK, SCIFB0_TXD_B_MARK, SD1_DAT2_MARK, - AVB_COL_MARK, MII_COL_MARK, SCIFB0_CTS_N_B_MARK, - SD1_DAT3_MARK, AVB_RXD0_MARK, MII_RXD0_MARK, - SCIFB0_RTS_N_B_MARK, SD1_CD_MARK, MMC1_D6_MARK, - TS_SDEN1_MARK, USB1_EXTP_MARK, GLO_SS_MARK, VI0_CLK_B_MARK, - SCL2_D_MARK, SCL2_CIS_D_MARK, SIM0_CLK_B_MARK, - VI3_CLK_B_MARK, - - SD1_WP_MARK, MMC1_D7_MARK, TS_SPSYNC1_MARK, USB1_IDIN_MARK, - GLO_RFON_MARK, VI1_CLK_B_MARK, SDA2_D_MARK, SDA2_CIS_D_MARK, - SIM0_D_B_MARK, SD2_CLK_MARK, MMC0_CLK_MARK, SIM0_CLK_MARK, - VI0_DATA0_VI0_B0_B_MARK, TS_SDEN0_C_MARK, GLO_SCLK_B_MARK, - VI3_DATA0_B_MARK, SD2_CMD_MARK, MMC0_CMD_MARK, SIM0_D_MARK, - VI0_DATA1_VI0_B1_B_MARK, SCIFB1_SCK_E_MARK, SCK1_D_MARK, - TS_SPSYNC0_C_MARK, GLO_SDATA_B_MARK, VI3_DATA1_B_MARK, - SD2_DAT0_MARK, MMC0_D0_MARK, FMCLK_B_MARK, - VI0_DATA2_VI0_B2_B_MARK, SCIFB1_RXD_E_MARK, RX1_D_MARK, - TS_SDAT0_C_MARK, GLO_SS_B_MARK, VI3_DATA2_B_MARK, - SD2_DAT1_MARK, MMC0_D1_MARK, FMIN_B_MARK, RDS_DATA_MARK, - VI0_DATA3_VI0_B3_B_MARK, SCIFB1_TXD_E_MARK, TX1_D_MARK, - TS_SCK0_C_MARK, GLO_RFON_B_MARK, VI3_DATA3_B_MARK, - SD2_DAT2_MARK, MMC0_D2_MARK, BPFCLK_B_MARK, RDS_CLK_MARK, - VI0_DATA4_VI0_B4_B_MARK, HRX0_D_MARK, TS_SDEN1_B_MARK, - GLO_Q0_B_MARK, VI3_DATA4_B_MARK, SD2_DAT3_MARK, - MMC0_D3_MARK, SIM0_RST_MARK, VI0_DATA5_VI0_B5_B_MARK, - HTX0_D_MARK, TS_SPSYNC1_B_MARK, GLO_Q1_B_MARK, - VI3_DATA5_B_MARK, SD2_CD_MARK, MMC0_D4_MARK, - TS_SDAT0_B_MARK, USB2_EXTP_MARK, GLO_I0_MARK, - VI0_DATA6_VI0_B6_B_MARK, HCTS0_N_D_MARK, TS_SDAT1_B_MARK, - GLO_I0_B_MARK, VI3_DATA6_B_MARK, - - SD2_WP_MARK, MMC0_D5_MARK, TS_SCK0_B_MARK, USB2_IDIN_MARK, - GLO_I1_MARK, VI0_DATA7_VI0_B7_B_MARK, HRTS0_N_D_MARK, - TS_SCK1_B_MARK, GLO_I1_B_MARK, VI3_DATA7_B_MARK, - SD3_CLK_MARK, MMC1_CLK_MARK, SD3_CMD_MARK, MMC1_CMD_MARK, - MTS_N_MARK, SD3_DAT0_MARK, MMC1_D0_MARK, STM_N_MARK, - SD3_DAT1_MARK, MMC1_D1_MARK, MDATA_MARK, SD3_DAT2_MARK, - MMC1_D2_MARK, SDATA_MARK, SD3_DAT3_MARK, MMC1_D3_MARK, - SCKZ_MARK, SD3_CD_MARK, MMC1_D4_MARK, TS_SDAT1_MARK, - VSP_MARK, GLO_Q0_MARK, SIM0_RST_B_MARK, SD3_WP_MARK, - MMC1_D5_MARK, TS_SCK1_MARK, GLO_Q1_MARK, FMIN_C_MARK, - RDS_DATA_B_MARK, FMIN_E_MARK, RDS_DATA_D_MARK, FMIN_F_MARK, - RDS_DATA_E_MARK, MLB_CLK_MARK, SCL2_B_MARK, SCL2_CIS_B_MARK, - MLB_SIG_MARK, SCIFB1_RXD_D_MARK, RX1_C_MARK, SDA2_B_MARK, - SDA2_CIS_B_MARK, MLB_DAT_MARK, SPV_EVEN_MARK, - SCIFB1_TXD_D_MARK, TX1_C_MARK, BPFCLK_C_MARK, - RDS_CLK_B_MARK, SSI_SCK0129_MARK, CAN_CLK_B_MARK, - MOUT0_MARK, - - SSI_WS0129_MARK, CAN0_TX_B_MARK, MOUT1_MARK, - SSI_SDATA0_MARK, CAN0_RX_B_MARK, MOUT2_MARK, - SSI_SDATA1_MARK, CAN1_TX_B_MARK, MOUT5_MARK, - SSI_SDATA2_MARK, CAN1_RX_B_MARK, SSI_SCK1_MARK, MOUT6_MARK, - SSI_SCK34_MARK, STP_OPWM_0_MARK, SCIFB0_SCK_MARK, - MSIOF1_SCK_MARK, CAN_DEBUG_HW_TRIGGER_MARK, SSI_WS34_MARK, - STP_IVCXO27_0_MARK, SCIFB0_RXD_MARK, MSIOF1_SYNC_MARK, - CAN_STEP0_MARK, SSI_SDATA3_MARK, STP_ISCLK_0_MARK, - SCIFB0_TXD_MARK, MSIOF1_SS1_MARK, CAN_TXCLK_MARK, - SSI_SCK4_MARK, STP_ISD_0_MARK, SCIFB0_CTS_N_MARK, - MSIOF1_SS2_MARK, SSI_SCK5_C_MARK, CAN_DEBUGOUT0_MARK, - SSI_WS4_MARK, STP_ISEN_0_MARK, SCIFB0_RTS_N_MARK, - MSIOF1_TXD_MARK, SSI_WS5_C_MARK, CAN_DEBUGOUT1_MARK, - SSI_SDATA4_MARK, STP_ISSYNC_0_MARK, MSIOF1_RXD_MARK, - CAN_DEBUGOUT2_MARK, SSI_SCK5_MARK, SCIFB1_SCK_MARK, - IERX_B_MARK, DU2_EXHSYNC_DU2_HSYNC_MARK, QSTH_QHS_MARK, - CAN_DEBUGOUT3_MARK, SSI_WS5_MARK, SCIFB1_RXD_MARK, - IECLK_B_MARK, DU2_EXVSYNC_DU2_VSYNC_MARK, QSTB_QHE_MARK, - CAN_DEBUGOUT4_MARK, - - SSI_SDATA5_MARK, SCIFB1_TXD_MARK, IETX_B_MARK, DU2_DR2_MARK, - LCDOUT2_MARK, CAN_DEBUGOUT5_MARK, SSI_SCK6_MARK, - SCIFB1_CTS_N_MARK, BPFCLK_D_MARK, RDS_CLK_C_MARK, - DU2_DR3_MARK, LCDOUT3_MARK, CAN_DEBUGOUT6_MARK, - BPFCLK_F_MARK, RDS_CLK_E_MARK, SSI_WS6_MARK, - SCIFB1_RTS_N_MARK, CAN0_TX_D_MARK, DU2_DR4_MARK, - LCDOUT4_MARK, CAN_DEBUGOUT7_MARK, SSI_SDATA6_MARK, - FMIN_D_MARK, RDS_DATA_C_MARK, DU2_DR5_MARK, LCDOUT5_MARK, - CAN_DEBUGOUT8_MARK, SSI_SCK78_MARK, STP_IVCXO27_1_MARK, - SCK1_MARK, SCIFA1_SCK_MARK, DU2_DR6_MARK, LCDOUT6_MARK, - CAN_DEBUGOUT9_MARK, SSI_WS78_MARK, STP_ISCLK_1_MARK, - SCIFB2_SCK_MARK, SCIFA2_CTS_N_MARK, DU2_DR7_MARK, - LCDOUT7_MARK, CAN_DEBUGOUT10_MARK, SSI_SDATA7_MARK, - STP_ISD_1_MARK, SCIFB2_RXD_MARK, SCIFA2_RTS_N_MARK, - TCLK2_MARK, QSTVA_QVS_MARK, CAN_DEBUGOUT11_MARK, - BPFCLK_E_MARK, RDS_CLK_D_MARK, SSI_SDATA7_B_MARK, - FMIN_G_MARK, RDS_DATA_F_MARK, SSI_SDATA8_MARK, - STP_ISEN_1_MARK, SCIFB2_TXD_MARK, CAN0_TX_C_MARK, - CAN_DEBUGOUT12_MARK, SSI_SDATA8_B_MARK, SSI_SDATA9_MARK, - STP_ISSYNC_1_MARK, SCIFB2_CTS_N_MARK, SSI_WS1_MARK, - SSI_SDATA5_C_MARK, CAN_DEBUGOUT13_MARK, AUDIO_CLKA_MARK, - SCIFB2_RTS_N_MARK, CAN_DEBUGOUT14_MARK, - - AUDIO_CLKB_MARK, SCIF_CLK_MARK, CAN0_RX_D_MARK, - DVC_MUTE_MARK, CAN0_RX_C_MARK, CAN_DEBUGOUT15_MARK, - REMOCON_MARK, SCIFA0_SCK_MARK, HSCK1_MARK, SCK0_MARK, - MSIOF3_SS2_MARK, DU2_DG2_MARK, LCDOUT10_MARK, SDA1_C_MARK, - SDA1_CIS_C_MARK, SCIFA0_RXD_MARK, HRX1_MARK, RX0_MARK, - DU2_DR0_MARK, LCDOUT0_MARK, SCIFA0_TXD_MARK, HTX1_MARK, - TX0_MARK, DU2_DR1_MARK, LCDOUT1_MARK, SCIFA0_CTS_N_MARK, - HCTS1_N_MARK, CTS0_N_MARK, MSIOF3_SYNC_MARK, DU2_DG3_MARK, - LCDOUT11_MARK, PWM0_B_MARK, SCL1_C_MARK, SCL1_CIS_C_MARK, - SCIFA0_RTS_N_MARK, HRTS1_N_MARK, RTS0_N_TANS_MARK, - MSIOF3_SS1_MARK, DU2_DG0_MARK, LCDOUT8_MARK, PWM1_B_MARK, - SCIFA1_RXD_MARK, AD_DI_MARK, RX1_MARK, - DU2_EXODDF_DU2_ODDF_DISP_CDE_MARK, QCPV_QDE_MARK, - SCIFA1_TXD_MARK, AD_DO_MARK, TX1_MARK, DU2_DG1_MARK, - LCDOUT9_MARK, SCIFA1_CTS_N_MARK, AD_CLK_MARK, - CTS1_N_MARK, MSIOF3_RXD_MARK, DU0_DOTCLKOUT_MARK, QCLK_MARK, - SCIFA1_RTS_N_MARK, AD_NCS_N_MARK, RTS1_N_TANS_MARK, - MSIOF3_TXD_MARK, DU1_DOTCLKOUT_MARK, QSTVB_QVE_MARK, - HRTS0_N_C_MARK, - - SCIFA2_SCK_MARK, FMCLK_MARK, MSIOF3_SCK_MARK, DU2_DG7_MARK, - LCDOUT15_MARK, SCIF_CLK_B_MARK, SCIFA2_RXD_MARK, FMIN_MARK, - DU2_DB0_MARK, LCDOUT16_MARK, SCL2_MARK, SCL2_CIS_MARK, - SCIFA2_TXD_MARK, BPFCLK_MARK, DU2_DB1_MARK, LCDOUT17_MARK, - SDA2_MARK, SDA2_CIS_MARK, HSCK0_MARK, TS_SDEN0_MARK, - DU2_DG4_MARK, LCDOUT12_MARK, HCTS0_N_C_MARK, HRX0_MARK, - DU2_DB2_MARK, LCDOUT18_MARK, HTX0_MARK, DU2_DB3_MARK, - LCDOUT19_MARK, HCTS0_N_MARK, SSI_SCK9_MARK, DU2_DB4_MARK, - LCDOUT20_MARK, HRTS0_N_MARK, SSI_WS9_MARK, DU2_DB5_MARK, - LCDOUT21_MARK, MSIOF0_SCK_MARK, TS_SDAT0_MARK, ADICLK_MARK, - DU2_DB6_MARK, LCDOUT22_MARK, MSIOF0_SYNC_MARK, TS_SCK0_MARK, - SSI_SCK2_MARK, ADIDATA_MARK, DU2_DB7_MARK, LCDOUT23_MARK, - SCIFA2_RXD_B_MARK, MSIOF0_SS1_MARK, ADICHS0_MARK, - DU2_DG5_MARK, LCDOUT13_MARK, MSIOF0_TXD_MARK, ADICHS1_MARK, - DU2_DG6_MARK, LCDOUT14_MARK, - - MSIOF0_SS2_MARK, AUDIO_CLKOUT_MARK, ADICHS2_MARK, - DU2_DISP_MARK, QPOLA_MARK, HTX0_C_MARK, SCIFA2_TXD_B_MARK, - MSIOF0_RXD_MARK, TS_SPSYNC0_MARK, SSI_WS2_MARK, - ADICS_SAMP_MARK, DU2_CDE_MARK, QPOLB_MARK, HRX0_C_MARK, - USB1_PWEN_MARK, AUDIO_CLKOUT_D_MARK, USB1_OVC_MARK, - TCLK1_B_MARK, - PINMUX_MARK_END, -}; - -static pinmux_enum_t pinmux_data[] = { - PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */ - - PINMUX_DATA(VI1_DATA7_VI1_B7_MARK, FN_VI1_DATA7_VI1_B7), - PINMUX_DATA(USB0_PWEN_MARK, FN_USB0_PWEN), - PINMUX_DATA(USB0_OVC_VBUS_MARK, FN_USB0_OVC_VBUS), - PINMUX_DATA(USB2_PWEN_MARK, FN_USB2_PWEN), - PINMUX_DATA(USB2_OVC_MARK, FN_USB2_OVC), - PINMUX_DATA(AVS1_MARK, FN_AVS1), - PINMUX_DATA(AVS2_MARK, FN_AVS2), - PINMUX_DATA(DU_DOTCLKIN0_MARK, FN_DU_DOTCLKIN0), - PINMUX_DATA(DU_DOTCLKIN2_MARK, FN_DU_DOTCLKIN2), - - PINMUX_IPSR_DATA(IP6_2_0, DACK0), - PINMUX_IPSR_DATA(IP6_2_0, IRQ0), - PINMUX_IPSR_DATA(IP6_2_0, INTC_IRQ0_N), - PINMUX_IPSR_MODSEL_DATA(IP6_2_0, SSI_SCK6_B, SEL_SSI6_1), - PINMUX_IPSR_MODSEL_DATA(IP6_2_0, VI1_VSYNC_N, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP6_2_0, VI1_VSYNC_N_B, SEL_VI1_1), - PINMUX_IPSR_MODSEL_DATA(IP6_2_0, SSI_WS78_C, SEL_SSI7_2), - PINMUX_IPSR_DATA(IP6_5_3, DREQ1_N), - PINMUX_IPSR_MODSEL_DATA(IP6_5_3, VI1_CLKENB, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP6_5_3, VI1_CLKENB_B, SEL_VI1_1), - PINMUX_IPSR_MODSEL_DATA(IP6_5_3, SSI_SDATA7_C, SEL_SSI7_2), - PINMUX_IPSR_MODSEL_DATA(IP6_5_3, SSI_SCK78_B, SEL_SSI7_1), - PINMUX_IPSR_DATA(IP6_8_6, DACK1), - PINMUX_IPSR_DATA(IP6_8_6, IRQ1), - PINMUX_IPSR_DATA(IP6_8_6, INTC_IRQ1_N), - PINMUX_IPSR_MODSEL_DATA(IP6_8_6, SSI_WS6_B, SEL_SSI6_1), - PINMUX_IPSR_MODSEL_DATA(IP6_8_6, SSI_SDATA8_C, SEL_SSI8_2), - PINMUX_IPSR_DATA(IP6_10_9, DREQ2_N), - PINMUX_IPSR_MODSEL_DATA(IP6_10_9, HSCK1_B, SEL_HSCIF1_1), - PINMUX_IPSR_MODSEL_DATA(IP6_10_9, HCTS0_N_B, SEL_HSCIF0_1), - PINMUX_IPSR_MODSEL_DATA(IP6_10_9, MSIOF0_TXD_B, SEL_SOF0_1), - PINMUX_IPSR_DATA(IP6_13_11, DACK2), - PINMUX_IPSR_DATA(IP6_13_11, IRQ2), - PINMUX_IPSR_DATA(IP6_13_11, INTC_IRQ2_N), - PINMUX_IPSR_MODSEL_DATA(IP6_13_11, SSI_SDATA6_B, SEL_SSI6_1), - PINMUX_IPSR_MODSEL_DATA(IP6_13_11, HRTS0_N_B, SEL_HSCIF0_1), - PINMUX_IPSR_MODSEL_DATA(IP6_13_11, MSIOF0_RXD_B, SEL_SOF0_1), - PINMUX_IPSR_DATA(IP6_16_14, ETH_CRS_DV), - PINMUX_IPSR_DATA(IP6_16_14, RMII_CRS_DV), - PINMUX_IPSR_MODSEL_DATA(IP6_16_14, STP_ISCLK_0_B, SEL_SSP_1), - PINMUX_IPSR_MODSEL_DATA(IP6_16_14, TS_SDEN0_D, SEL_TSIF0_3), - PINMUX_IPSR_MODSEL_DATA(IP6_16_14, GLO_Q0_C, SEL_GPS_2), - PINMUX_IPSR_MODSEL_DATA(IP6_16_14, SCL2_E, SEL_IIC2_4), - PINMUX_IPSR_MODSEL_DATA(IP6_16_14, SCL2_CIS_E, SEL_I2C2_4), - PINMUX_IPSR_DATA(IP6_19_17, ETH_RX_ER), - PINMUX_IPSR_DATA(IP6_19_17, RMII_RX_ER), - PINMUX_IPSR_MODSEL_DATA(IP6_19_17, STP_ISD_0_B, SEL_SSP_1), - PINMUX_IPSR_MODSEL_DATA(IP6_19_17, TS_SPSYNC0_D, SEL_TSIF0_3), - PINMUX_IPSR_MODSEL_DATA(IP6_19_17, GLO_Q1_C, SEL_GPS_2), - PINMUX_IPSR_MODSEL_DATA(IP6_19_17, SDA2_E, SEL_IIC2_4), - PINMUX_IPSR_MODSEL_DATA(IP6_19_17, SDA2_CIS_E, SEL_I2C2_4), - PINMUX_IPSR_DATA(IP6_22_20, ETH_RXD0), - PINMUX_IPSR_DATA(IP6_22_20, RMII_RXD0), - PINMUX_IPSR_MODSEL_DATA(IP6_22_20, STP_ISEN_0_B, SEL_SSP_1), - PINMUX_IPSR_MODSEL_DATA(IP6_22_20, TS_SDAT0_D, SEL_TSIF0_3), - PINMUX_IPSR_MODSEL_DATA(IP6_22_20, GLO_I0_C, SEL_GPS_2), - PINMUX_IPSR_MODSEL_DATA(IP6_22_20, SCIFB1_SCK_G, SEL_SCIFB1_6), - PINMUX_IPSR_MODSEL_DATA(IP6_22_20, SCK1_E, SEL_SCIF1_4), - PINMUX_IPSR_DATA(IP6_25_23, ETH_RXD1), - PINMUX_IPSR_DATA(IP6_25_23, RMII_RXD1), - PINMUX_IPSR_MODSEL_DATA(IP6_25_23, HRX0_E, SEL_HSCIF0_4), - PINMUX_IPSR_MODSEL_DATA(IP6_25_23, STP_ISSYNC_0_B, SEL_SSP_1), - PINMUX_IPSR_MODSEL_DATA(IP6_25_23, TS_SCK0_D, SEL_TSIF0_3), - PINMUX_IPSR_MODSEL_DATA(IP6_25_23, GLO_I1_C, SEL_GPS_2), - PINMUX_IPSR_MODSEL_DATA(IP6_25_23, SCIFB1_RXD_G, SEL_SCIFB1_6), - PINMUX_IPSR_MODSEL_DATA(IP6_25_23, RX1_E, SEL_SCIF1_4), - PINMUX_IPSR_DATA(IP6_28_26, ETH_LINK), - PINMUX_IPSR_DATA(IP6_28_26, RMII_LINK), - PINMUX_IPSR_MODSEL_DATA(IP6_28_26, HTX0_E, SEL_HSCIF0_4), - PINMUX_IPSR_MODSEL_DATA(IP6_28_26, STP_IVCXO27_0_B, SEL_SSP_1), - PINMUX_IPSR_MODSEL_DATA(IP6_28_26, SCIFB1_TXD_G, SEL_SCIFB1_6), - PINMUX_IPSR_MODSEL_DATA(IP6_28_26, TX1_E, SEL_SCIF1_4), - PINMUX_IPSR_DATA(IP6_31_29, ETH_REF_CLK), - PINMUX_IPSR_DATA(IP6_31_29, RMII_REF_CLK), - PINMUX_IPSR_MODSEL_DATA(IP6_31_29, HCTS0_N_E, SEL_HSCIF0_4), - PINMUX_IPSR_MODSEL_DATA(IP6_31_29, STP_IVCXO27_1_B, SEL_SSP_1), - PINMUX_IPSR_MODSEL_DATA(IP6_31_29, HRX0_F, SEL_HSCIF0_5), - - PINMUX_IPSR_DATA(IP7_2_0, ETH_MDIO), - PINMUX_IPSR_DATA(IP7_2_0, RMII_MDIO), - PINMUX_IPSR_MODSEL_DATA(IP7_2_0, HRTS0_N_E, SEL_HSCIF0_4), - PINMUX_IPSR_MODSEL_DATA(IP7_2_0, SIM0_D_C, SEL_SIM_2), - PINMUX_IPSR_MODSEL_DATA(IP7_2_0, HCTS0_N_F, SEL_HSCIF0_5), - PINMUX_IPSR_DATA(IP7_5_3, ETH_TXD1), - PINMUX_IPSR_DATA(IP7_5_3, RMII_TXD1), - PINMUX_IPSR_MODSEL_DATA(IP7_5_3, HTX0_F, SEL_HSCIF0_4), - PINMUX_IPSR_MODSEL_DATA(IP7_5_3, BPFCLK_G, SEL_SIM_2), - PINMUX_IPSR_MODSEL_DATA(IP7_5_3, RDS_CLK_F, SEL_HSCIF0_5), - PINMUX_IPSR_DATA(IP7_7_6, ETH_TX_EN), - PINMUX_IPSR_DATA(IP7_7_6, RMII_TX_EN), - PINMUX_IPSR_MODSEL_DATA(IP7_7_6, SIM0_CLK_C, SEL_SIM_2), - PINMUX_IPSR_MODSEL_DATA(IP7_7_6, HRTS0_N_F, SEL_HSCIF0_5), - PINMUX_IPSR_DATA(IP7_9_8, ETH_MAGIC), - PINMUX_IPSR_DATA(IP7_9_8, RMII_MAGIC), - PINMUX_IPSR_MODSEL_DATA(IP7_9_8, SIM0_RST_C, SEL_SIM_2), - PINMUX_IPSR_DATA(IP7_12_10, ETH_TXD0), - PINMUX_IPSR_DATA(IP7_12_10, RMII_TXD0), - PINMUX_IPSR_MODSEL_DATA(IP7_12_10, STP_ISCLK_1_B, SEL_SSP_1), - PINMUX_IPSR_MODSEL_DATA(IP7_12_10, TS_SDEN1_C, SEL_TSIF1_2), - PINMUX_IPSR_MODSEL_DATA(IP7_12_10, GLO_SCLK_C, SEL_GPS_2), - PINMUX_IPSR_DATA(IP7_15_13, ETH_MDC), - PINMUX_IPSR_DATA(IP7_15_13, RMII_MDC), - PINMUX_IPSR_MODSEL_DATA(IP7_15_13, STP_ISD_1_B, SEL_SSP_1), - PINMUX_IPSR_MODSEL_DATA(IP7_15_13, TS_SPSYNC1_C, SEL_TSIF1_2), - PINMUX_IPSR_MODSEL_DATA(IP7_15_13, GLO_SDATA_C, SEL_GPS_2), - PINMUX_IPSR_DATA(IP7_18_16, PWM0), - PINMUX_IPSR_MODSEL_DATA(IP7_18_16, SCIFA2_SCK_C, SEL_SCIFA2_2), - PINMUX_IPSR_MODSEL_DATA(IP7_18_16, STP_ISEN_1_B, SEL_SSP_1), - PINMUX_IPSR_MODSEL_DATA(IP7_18_16, TS_SDAT1_C, SEL_TSIF1_2), - PINMUX_IPSR_MODSEL_DATA(IP7_18_16, GLO_SS_C, SEL_GPS_2), - PINMUX_IPSR_DATA(IP7_21_19, PWM1), - PINMUX_IPSR_MODSEL_DATA(IP7_21_19, SCIFA2_TXD_C, SEL_SCIFA2_2), - PINMUX_IPSR_MODSEL_DATA(IP7_21_19, STP_ISSYNC_1_B, SEL_SSP_1), - PINMUX_IPSR_MODSEL_DATA(IP7_21_19, TS_SCK1_C, SEL_TSIF1_2), - PINMUX_IPSR_MODSEL_DATA(IP7_21_19, GLO_RFON_C, SEL_GPS_2), - PINMUX_IPSR_DATA(IP7_21_19, PCMOE_N), - PINMUX_IPSR_DATA(IP7_24_22, PWM2), - PINMUX_IPSR_DATA(IP7_24_22, PWMFSW0), - PINMUX_IPSR_MODSEL_DATA(IP7_24_22, SCIFA2_RXD_C, SEL_SCIFA2_2), - PINMUX_IPSR_DATA(IP7_24_22, PCMWE_N), - PINMUX_IPSR_MODSEL_DATA(IP7_24_22, IECLK_C, SEL_IEB_2), - PINMUX_IPSR_DATA(IP7_26_25, DU1_DOTCLKIN), - PINMUX_IPSR_DATA(IP7_26_25, AUDIO_CLKC), - PINMUX_IPSR_DATA(IP7_26_25, AUDIO_CLKOUT_C), - PINMUX_IPSR_MODSEL_DATA(IP7_28_27, VI0_CLK, SEL_VI0_0), - PINMUX_IPSR_DATA(IP7_28_27, ATACS00_N), - PINMUX_IPSR_DATA(IP7_28_27, AVB_RXD1), - PINMUX_IPSR_DATA(IP7_28_27, MII_RXD1), - PINMUX_IPSR_MODSEL_DATA(IP7_30_29, VI0_DATA0_VI0_B0, SEL_VI0_0), - PINMUX_IPSR_DATA(IP7_30_29, ATACS10_N), - PINMUX_IPSR_DATA(IP7_30_29, AVB_RXD2), - PINMUX_IPSR_DATA(IP7_30_29, MII_RXD2), - - PINMUX_IPSR_MODSEL_DATA(IP8_1_0, VI0_DATA1_VI0_B1, SEL_VI0_0), - PINMUX_IPSR_DATA(IP8_1_0, ATARD0_N), - PINMUX_IPSR_DATA(IP8_1_0, AVB_RXD3), - PINMUX_IPSR_DATA(IP8_1_0, MII_RXD3), - PINMUX_IPSR_MODSEL_DATA(IP8_3_2, VI0_DATA2_VI0_B2, SEL_VI0_0), - PINMUX_IPSR_DATA(IP8_3_2, ATAWR0_N), - PINMUX_IPSR_DATA(IP8_3_2, AVB_RXD4), - PINMUX_IPSR_MODSEL_DATA(IP8_5_4, VI0_DATA3_VI0_B3, SEL_VI0_0), - PINMUX_IPSR_DATA(IP8_5_4, ATADIR0_N), - PINMUX_IPSR_DATA(IP8_5_4, AVB_RXD5), - PINMUX_IPSR_MODSEL_DATA(IP8_7_6, VI0_DATA4_VI0_B4, SEL_VI0_0), - PINMUX_IPSR_DATA(IP8_7_6, ATAG0_N), - PINMUX_IPSR_DATA(IP8_7_6, AVB_RXD6), - PINMUX_IPSR_MODSEL_DATA(IP8_9_8, VI0_DATA5_VI0_B5, SEL_VI0_0), - PINMUX_IPSR_DATA(IP8_9_8, EX_WAIT1), - PINMUX_IPSR_DATA(IP8_9_8, AVB_RXD7), - PINMUX_IPSR_MODSEL_DATA(IP8_11_10, VI0_DATA6_VI0_B6, SEL_VI0_0), - PINMUX_IPSR_DATA(IP8_11_10, AVB_RX_ER), - PINMUX_IPSR_DATA(IP8_11_10, MII_RX_ER), - PINMUX_IPSR_MODSEL_DATA(IP8_13_12, VI0_DATA7_VI0_B7, SEL_VI0_0), - PINMUX_IPSR_DATA(IP8_13_12, AVB_RX_CLK), - PINMUX_IPSR_DATA(IP8_13_12, MII_RX_CLK), - PINMUX_IPSR_MODSEL_DATA(IP8_15_14, VI1_CLK, SEL_VI1_0), - PINMUX_IPSR_DATA(IP8_15_14, AVB_RX_DV), - PINMUX_IPSR_DATA(IP8_15_14, MII_RX_DV), - PINMUX_IPSR_MODSEL_DATA(IP8_17_16, VI1_DATA0_VI1_B0, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP8_17_16, SCIFA1_SCK_D, SEL_SCIFA1_3), - PINMUX_IPSR_DATA(IP8_17_16, AVB_CRS), - PINMUX_IPSR_DATA(IP8_17_16, MII_CRS), - PINMUX_IPSR_MODSEL_DATA(IP8_19_18, VI1_DATA1_VI1_B1, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP8_19_18, SCIFA1_RXD_D, SEL_SCIFA1_3), - PINMUX_IPSR_DATA(IP8_19_18, AVB_MDC), - PINMUX_IPSR_DATA(IP8_19_18, MII_MDC), - PINMUX_IPSR_MODSEL_DATA(IP8_21_20, VI1_DATA2_VI1_B2, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP8_21_20, SCIFA1_TXD_D, SEL_SCIFA1_3), - PINMUX_IPSR_DATA(IP8_21_20, AVB_MDIO), - PINMUX_IPSR_DATA(IP8_21_20, MII_MDIO), - PINMUX_IPSR_MODSEL_DATA(IP8_23_22, VI1_DATA3_VI1_B3, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP8_23_22, SCIFA1_CTS_N_D, SEL_SCIFA1_3), - PINMUX_IPSR_DATA(IP8_23_22, AVB_GTX_CLK), - PINMUX_IPSR_MODSEL_DATA(IP8_25_24, VI1_DATA4_VI1_B4, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP8_25_24, SCIFA1_RTS_N_D, SEL_SCIFA1_3), - PINMUX_IPSR_DATA(IP8_25_24, AVB_MAGIC), - PINMUX_IPSR_DATA(IP8_25_24, MII_MAGIC), - PINMUX_IPSR_MODSEL_DATA(IP8_26, VI1_DATA5_VI1_B5, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP8_26, AVB_PHY_INT, SEL_SCIFA1_3), - PINMUX_IPSR_MODSEL_DATA(IP8_27, VI1_DATA6_VI1_B6, SEL_VI1_0), - PINMUX_IPSR_DATA(IP8_27, AVB_GTXREFCLK), - PINMUX_IPSR_DATA(IP8_28, SD0_CLK), - PINMUX_IPSR_MODSEL_DATA(IP8_28, VI1_DATA0_VI1_B0_B, SEL_VI1_1), - PINMUX_IPSR_DATA(IP8_30_29, SD0_CMD), - PINMUX_IPSR_MODSEL_DATA(IP8_30_29, SCIFB1_SCK_B, SEL_SCIFB1_1), - PINMUX_IPSR_MODSEL_DATA(IP8_30_29, VI1_DATA1_VI1_B1_B, SEL_VI1_1), - - PINMUX_IPSR_DATA(IP9_1_0, SD0_DAT0), - PINMUX_IPSR_MODSEL_DATA(IP9_1_0, SCIFB1_RXD_B, SEL_SCIFB1_1), - PINMUX_IPSR_MODSEL_DATA(IP9_1_0, VI1_DATA2_VI1_B2_B, SEL_VI1_1), - PINMUX_IPSR_DATA(IP9_3_2, SD0_DAT1), - PINMUX_IPSR_MODSEL_DATA(IP9_3_2, SCIFB1_TXD_B, SEL_SCIFB1_1), - PINMUX_IPSR_MODSEL_DATA(IP9_3_2, VI1_DATA3_VI1_B3_B, SEL_VI1_1), - PINMUX_IPSR_DATA(IP9_5_4, SD0_DAT2), - PINMUX_IPSR_MODSEL_DATA(IP9_5_4, SCIFB1_CTS_N_B, SEL_SCIFB1_1), - PINMUX_IPSR_MODSEL_DATA(IP9_5_4, VI1_DATA4_VI1_B4_B, SEL_VI1_1), - PINMUX_IPSR_DATA(IP9_7_6, SD0_DAT3), - PINMUX_IPSR_MODSEL_DATA(IP9_7_6, SCIFB1_RTS_N_B, SEL_SCIFB1_1), - PINMUX_IPSR_MODSEL_DATA(IP9_7_6, VI1_DATA5_VI1_B5_B, SEL_VI1_1), - PINMUX_IPSR_DATA(IP9_11_8, SD0_CD), - PINMUX_IPSR_DATA(IP9_11_8, MMC0_D6), - PINMUX_IPSR_MODSEL_DATA(IP9_11_8, TS_SDEN0_B, SEL_TSIF0_1), - PINMUX_IPSR_DATA(IP9_11_8, USB0_EXTP), - PINMUX_IPSR_MODSEL_DATA(IP9_11_8, GLO_SCLK, SEL_GPS_0), - PINMUX_IPSR_MODSEL_DATA(IP9_11_8, VI1_DATA6_VI1_B6_B, SEL_VI1_1), - PINMUX_IPSR_MODSEL_DATA(IP9_11_8, SCL1_B, SEL_IIC1_1), - PINMUX_IPSR_MODSEL_DATA(IP9_11_8, SCL1_CIS_B, SEL_I2C1_1), - PINMUX_IPSR_MODSEL_DATA(IP9_11_8, VI2_DATA6_VI2_B6_B, SEL_VI2_1), - PINMUX_IPSR_DATA(IP9_15_12, SD0_WP), - PINMUX_IPSR_DATA(IP9_15_12, MMC0_D7), - PINMUX_IPSR_MODSEL_DATA(IP9_15_12, TS_SPSYNC0_B, SEL_TSIF0_1), - PINMUX_IPSR_DATA(IP9_15_12, USB0_IDIN), - PINMUX_IPSR_MODSEL_DATA(IP9_15_12, GLO_SDATA, SEL_GPS_0), - PINMUX_IPSR_MODSEL_DATA(IP9_15_12, VI1_DATA7_VI1_B7_B, SEL_VI1_1), - PINMUX_IPSR_MODSEL_DATA(IP9_15_12, SDA1_B, SEL_IIC1_1), - PINMUX_IPSR_MODSEL_DATA(IP9_15_12, SDA1_CIS_B, SEL_I2C1_1), - PINMUX_IPSR_MODSEL_DATA(IP9_15_12, VI2_DATA7_VI2_B7_B, SEL_VI2_1), - PINMUX_IPSR_DATA(IP9_17_16, SD1_CLK), - PINMUX_IPSR_DATA(IP9_17_16, AVB_TX_EN), - PINMUX_IPSR_DATA(IP9_17_16, MII_TX_EN), - PINMUX_IPSR_DATA(IP9_19_18, SD1_CMD), - PINMUX_IPSR_DATA(IP9_19_18, AVB_TX_ER), - PINMUX_IPSR_DATA(IP9_19_18, MII_TX_ER), - PINMUX_IPSR_MODSEL_DATA(IP9_19_18, SCIFB0_SCK_B, SEL_SCIFB_1), - PINMUX_IPSR_DATA(IP9_21_20, SD1_DAT0), - PINMUX_IPSR_DATA(IP9_21_20, AVB_TX_CLK), - PINMUX_IPSR_DATA(IP9_21_20, MII_TX_CLK), - PINMUX_IPSR_MODSEL_DATA(IP9_21_20, SCIFB0_RXD_B, SEL_SCIFB_1), - PINMUX_IPSR_DATA(IP9_23_22, SD1_DAT1), - PINMUX_IPSR_DATA(IP9_23_22, AVB_LINK), - PINMUX_IPSR_DATA(IP9_23_22, MII_LINK), - PINMUX_IPSR_MODSEL_DATA(IP9_23_22, SCIFB0_TXD_B, SEL_SCIFB_1), - PINMUX_IPSR_DATA(IP9_25_24, SD1_DAT2), - PINMUX_IPSR_DATA(IP9_25_24, AVB_COL), - PINMUX_IPSR_DATA(IP9_25_24, MII_COL), - PINMUX_IPSR_MODSEL_DATA(IP9_25_24, SCIFB0_CTS_N_B, SEL_SCIFB_1), - PINMUX_IPSR_DATA(IP9_27_26, SD1_DAT3), - PINMUX_IPSR_DATA(IP9_27_26, AVB_RXD0), - PINMUX_IPSR_DATA(IP9_27_26, MII_RXD0), - PINMUX_IPSR_MODSEL_DATA(IP9_27_26, SCIFB0_RTS_N_B, SEL_SCIFB_1), - PINMUX_IPSR_DATA(IP9_31_28, SD1_CD), - PINMUX_IPSR_DATA(IP9_31_28, MMC1_D6), - PINMUX_IPSR_MODSEL_DATA(IP9_31_28, TS_SDEN1, SEL_TSIF1_0), - PINMUX_IPSR_DATA(IP9_31_28, USB1_EXTP), - PINMUX_IPSR_MODSEL_DATA(IP9_31_28, GLO_SS, SEL_GPS_0), - PINMUX_IPSR_MODSEL_DATA(IP9_31_28, VI0_CLK_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP9_31_28, SCL2_D, SEL_IIC2_3), - PINMUX_IPSR_MODSEL_DATA(IP9_31_28, SCL2_CIS_D, SEL_I2C2_3), - PINMUX_IPSR_MODSEL_DATA(IP9_31_28, SIM0_CLK_B, SEL_SIM_1), - PINMUX_IPSR_MODSEL_DATA(IP9_31_28, VI3_CLK_B, SEL_VI3_1), - - PINMUX_IPSR_DATA(IP10_3_0, SD1_WP), - PINMUX_IPSR_DATA(IP10_3_0, MMC1_D7), - PINMUX_IPSR_MODSEL_DATA(IP10_3_0, TS_SPSYNC1, SEL_TSIF1_0), - PINMUX_IPSR_DATA(IP10_3_0, USB1_IDIN), - PINMUX_IPSR_MODSEL_DATA(IP10_3_0, GLO_RFON, SEL_GPS_0), - PINMUX_IPSR_MODSEL_DATA(IP10_3_0, VI1_CLK_B, SEL_VI1_1), - PINMUX_IPSR_MODSEL_DATA(IP10_3_0, SDA2_D, SEL_IIC2_3), - PINMUX_IPSR_MODSEL_DATA(IP10_3_0, SDA2_CIS_D, SEL_I2C2_3), - PINMUX_IPSR_MODSEL_DATA(IP10_3_0, SIM0_D_B, SEL_SIM_1), - PINMUX_IPSR_DATA(IP10_6_4, SD2_CLK), - PINMUX_IPSR_DATA(IP10_6_4, MMC0_CLK), - PINMUX_IPSR_MODSEL_DATA(IP10_6_4, SIM0_CLK, SEL_SIM_0), - PINMUX_IPSR_MODSEL_DATA(IP10_6_4, VI0_DATA0_VI0_B0_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP10_6_4, TS_SDEN0_C, SEL_TSIF0_2), - PINMUX_IPSR_MODSEL_DATA(IP10_6_4, GLO_SCLK_B, SEL_GPS_1), - PINMUX_IPSR_MODSEL_DATA(IP10_6_4, VI3_DATA0_B, SEL_VI3_1), - PINMUX_IPSR_DATA(IP10_10_7, SD2_CMD), - PINMUX_IPSR_DATA(IP10_10_7, MMC0_CMD), - PINMUX_IPSR_MODSEL_DATA(IP10_10_7, SIM0_D, SEL_SIM_0), - PINMUX_IPSR_MODSEL_DATA(IP10_10_7, VI0_DATA1_VI0_B1_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP10_10_7, SCIFB1_SCK_E, SEL_SCIFB1_4), - PINMUX_IPSR_MODSEL_DATA(IP10_10_7, SCK1_D, SEL_SCIF1_3), - PINMUX_IPSR_MODSEL_DATA(IP10_10_7, TS_SPSYNC0_C, SEL_TSIF0_2), - PINMUX_IPSR_MODSEL_DATA(IP10_10_7, GLO_SDATA_B, SEL_GPS_1), - PINMUX_IPSR_MODSEL_DATA(IP10_10_7, VI3_DATA1_B, SEL_VI3_1), - PINMUX_IPSR_DATA(IP10_14_11, SD2_DAT0), - PINMUX_IPSR_DATA(IP10_14_11, MMC0_D0), - PINMUX_IPSR_MODSEL_DATA(IP10_14_11, FMCLK_B, SEL_FM_1), - PINMUX_IPSR_MODSEL_DATA(IP10_14_11, VI0_DATA2_VI0_B2_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP10_14_11, SCIFB1_RXD_E, SEL_SCIFB1_4), - PINMUX_IPSR_MODSEL_DATA(IP10_14_11, RX1_D, SEL_SCIF1_3), - PINMUX_IPSR_MODSEL_DATA(IP10_14_11, TS_SDAT0_C, SEL_TSIF0_2), - PINMUX_IPSR_MODSEL_DATA(IP10_14_11, GLO_SS_B, SEL_GPS_1), - PINMUX_IPSR_MODSEL_DATA(IP10_14_11, VI3_DATA2_B, SEL_VI3_1), - PINMUX_IPSR_DATA(IP10_18_15, SD2_DAT1), - PINMUX_IPSR_DATA(IP10_18_15, MMC0_D1), - PINMUX_IPSR_MODSEL_DATA(IP10_18_15, FMIN_B, SEL_FM_1), - PINMUX_IPSR_MODSEL_DATA(IP10_18_15, RDS_DATA, SEL_RDS_0), - PINMUX_IPSR_MODSEL_DATA(IP10_18_15, VI0_DATA3_VI0_B3_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP10_18_15, SCIFB1_TXD_E, SEL_SCIFB1_4), - PINMUX_IPSR_MODSEL_DATA(IP10_18_15, TX1_D, SEL_SCIF1_3), - PINMUX_IPSR_MODSEL_DATA(IP10_18_15, TS_SCK0_C, SEL_TSIF0_2), - PINMUX_IPSR_MODSEL_DATA(IP10_18_15, GLO_RFON_B, SEL_GPS_1), - PINMUX_IPSR_MODSEL_DATA(IP10_18_15, VI3_DATA3_B, SEL_VI3_1), - PINMUX_IPSR_DATA(IP10_22_19, SD2_DAT2), - PINMUX_IPSR_DATA(IP10_22_19, MMC0_D2), - PINMUX_IPSR_MODSEL_DATA(IP10_22_19, BPFCLK_B, SEL_FM_1), - PINMUX_IPSR_MODSEL_DATA(IP10_22_19, RDS_CLK, SEL_RDS_0), - PINMUX_IPSR_MODSEL_DATA(IP10_22_19, VI0_DATA4_VI0_B4_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP10_22_19, HRX0_D, SEL_HSCIF0_3), - PINMUX_IPSR_MODSEL_DATA(IP10_22_19, TS_SDEN1_B, SEL_TSIF1_1), - PINMUX_IPSR_MODSEL_DATA(IP10_22_19, GLO_Q0_B, SEL_GPS_1), - PINMUX_IPSR_MODSEL_DATA(IP10_22_19, VI3_DATA4_B, SEL_VI3_1), - PINMUX_IPSR_DATA(IP10_25_23, SD2_DAT3), - PINMUX_IPSR_DATA(IP10_25_23, MMC0_D3), - PINMUX_IPSR_MODSEL_DATA(IP10_25_23, SIM0_RST, SEL_SIM_0), - PINMUX_IPSR_MODSEL_DATA(IP10_25_23, VI0_DATA5_VI0_B5_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP10_25_23, HTX0_D, SEL_HSCIF0_3), - PINMUX_IPSR_MODSEL_DATA(IP10_25_23, TS_SPSYNC1_B, SEL_TSIF1_1), - PINMUX_IPSR_MODSEL_DATA(IP10_25_23, GLO_Q1_B, SEL_GPS_1), - PINMUX_IPSR_MODSEL_DATA(IP10_25_23, VI3_DATA5_B, SEL_VI3_1), - PINMUX_IPSR_DATA(IP10_29_26, SD2_CD), - PINMUX_IPSR_DATA(IP10_29_26, MMC0_D4), - PINMUX_IPSR_MODSEL_DATA(IP10_29_26, TS_SDAT0_B, SEL_TSIF0_1), - PINMUX_IPSR_DATA(IP10_29_26, USB2_EXTP), - PINMUX_IPSR_MODSEL_DATA(IP10_29_26, GLO_I0, SEL_GPS_0), - PINMUX_IPSR_MODSEL_DATA(IP10_29_26, VI0_DATA6_VI0_B6_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP10_29_26, HCTS0_N_D, SEL_HSCIF0_3), - PINMUX_IPSR_MODSEL_DATA(IP10_29_26, TS_SDAT1_B, SEL_TSIF1_1), - PINMUX_IPSR_MODSEL_DATA(IP10_29_26, GLO_I0_B, SEL_GPS_1), - PINMUX_IPSR_MODSEL_DATA(IP10_29_26, VI3_DATA6_B, SEL_VI3_1), - - PINMUX_IPSR_DATA(IP11_3_0, SD2_WP), - PINMUX_IPSR_DATA(IP11_3_0, MMC0_D5), - PINMUX_IPSR_MODSEL_DATA(IP11_3_0, TS_SCK0_B, SEL_TSIF0_1), - PINMUX_IPSR_DATA(IP11_3_0, USB2_IDIN), - PINMUX_IPSR_MODSEL_DATA(IP11_3_0, GLO_I1, SEL_GPS_0), - PINMUX_IPSR_MODSEL_DATA(IP11_3_0, VI0_DATA7_VI0_B7_B, SEL_VI0_1), - PINMUX_IPSR_MODSEL_DATA(IP11_3_0, HRTS0_N_D, SEL_HSCIF0_3), - PINMUX_IPSR_MODSEL_DATA(IP11_3_0, TS_SCK1_B, SEL_TSIF1_1), - PINMUX_IPSR_MODSEL_DATA(IP11_3_0, GLO_I1_B, SEL_GPS_1), - PINMUX_IPSR_MODSEL_DATA(IP11_3_0, VI3_DATA7_B, SEL_VI3_1), - PINMUX_IPSR_DATA(IP11_4, SD3_CLK), - PINMUX_IPSR_DATA(IP11_4, MMC1_CLK), - PINMUX_IPSR_DATA(IP11_6_5, SD3_CMD), - PINMUX_IPSR_DATA(IP11_6_5, MMC1_CMD), - PINMUX_IPSR_DATA(IP11_6_5, MTS_N), - PINMUX_IPSR_DATA(IP11_8_7, SD3_DAT0), - PINMUX_IPSR_DATA(IP11_8_7, MMC1_D0), - PINMUX_IPSR_DATA(IP11_8_7, STM_N), - PINMUX_IPSR_DATA(IP11_10_9, SD3_DAT1), - PINMUX_IPSR_DATA(IP11_10_9, MMC1_D1), - PINMUX_IPSR_DATA(IP11_10_9, MDATA), - PINMUX_IPSR_DATA(IP11_12_11, SD3_DAT2), - PINMUX_IPSR_DATA(IP11_12_11, MMC1_D2), - PINMUX_IPSR_DATA(IP11_12_11, SDATA), - PINMUX_IPSR_DATA(IP11_14_13, SD3_DAT3), - PINMUX_IPSR_DATA(IP11_14_13, MMC1_D3), - PINMUX_IPSR_DATA(IP11_14_13, SCKZ), - PINMUX_IPSR_DATA(IP11_17_15, SD3_CD), - PINMUX_IPSR_DATA(IP11_17_15, MMC1_D4), - PINMUX_IPSR_MODSEL_DATA(IP11_17_15, TS_SDAT1, SEL_TSIF1_0), - PINMUX_IPSR_DATA(IP11_17_15, VSP), - PINMUX_IPSR_MODSEL_DATA(IP11_17_15, GLO_Q0, SEL_GPS_0), - PINMUX_IPSR_MODSEL_DATA(IP11_17_15, SIM0_RST_B, SEL_SIM_1), - PINMUX_IPSR_DATA(IP11_21_18, SD3_WP), - PINMUX_IPSR_DATA(IP11_21_18, MMC1_D5), - PINMUX_IPSR_MODSEL_DATA(IP11_21_18, TS_SCK1, SEL_TSIF1_0), - PINMUX_IPSR_MODSEL_DATA(IP11_21_18, GLO_Q1, SEL_GPS_0), - PINMUX_IPSR_MODSEL_DATA(IP11_21_18, FMIN_C, SEL_FM_2), - PINMUX_IPSR_MODSEL_DATA(IP11_21_18, RDS_DATA_B, SEL_RDS_1), - PINMUX_IPSR_MODSEL_DATA(IP11_21_18, FMIN_E, SEL_FM_4), - PINMUX_IPSR_MODSEL_DATA(IP11_21_18, RDS_DATA_D, SEL_RDS_3), - PINMUX_IPSR_MODSEL_DATA(IP11_21_18, FMIN_F, SEL_FM_5), - PINMUX_IPSR_MODSEL_DATA(IP11_21_18, RDS_DATA_E, SEL_RDS_4), - PINMUX_IPSR_DATA(IP11_23_22, MLB_CLK), - PINMUX_IPSR_MODSEL_DATA(IP11_23_22, SCL2_B, SEL_IIC2_1), - PINMUX_IPSR_MODSEL_DATA(IP11_23_22, SCL2_CIS_B, SEL_I2C2_1), - PINMUX_IPSR_DATA(IP11_26_24, MLB_SIG), - PINMUX_IPSR_MODSEL_DATA(IP11_26_24, SCIFB1_RXD_D, SEL_SCIFB1_3), - PINMUX_IPSR_MODSEL_DATA(IP11_26_24, RX1_C, SEL_SCIF1_2), - PINMUX_IPSR_MODSEL_DATA(IP11_26_24, SDA2_B, SEL_IIC2_1), - PINMUX_IPSR_MODSEL_DATA(IP11_26_24, SDA2_CIS_B, SEL_I2C2_1), - PINMUX_IPSR_DATA(IP11_29_27, MLB_DAT), - PINMUX_IPSR_DATA(IP11_29_27, SPV_EVEN), - PINMUX_IPSR_MODSEL_DATA(IP11_29_27, SCIFB1_TXD_D, SEL_SCIFB1_3), - PINMUX_IPSR_MODSEL_DATA(IP11_29_27, TX1_C, SEL_SCIF1_2), - PINMUX_IPSR_MODSEL_DATA(IP11_29_27, BPFCLK_C, SEL_FM_2), - PINMUX_IPSR_MODSEL_DATA(IP11_29_27, RDS_CLK_B, SEL_RDS_1), - PINMUX_IPSR_DATA(IP11_31_30, SSI_SCK0129), - PINMUX_IPSR_MODSEL_DATA(IP11_31_30, CAN_CLK_B, SEL_CANCLK_1), - PINMUX_IPSR_DATA(IP11_31_30, MOUT0), - -}; - -static struct pinmux_gpio pinmux_gpios[] = { - PINMUX_GPIO_GP_ALL(), - - GPIO_FN(VI1_DATA7_VI1_B7), GPIO_FN(USB0_PWEN), GPIO_FN(USB0_OVC_VBUS), - GPIO_FN(USB2_PWEN), GPIO_FN(USB2_OVC), GPIO_FN(AVS1), GPIO_FN(AVS2), - GPIO_FN(DU_DOTCLKIN0), GPIO_FN(DU_DOTCLKIN2), - - /* IPSR0 - IPSR5 */ - /*IPSR6*/ - GPIO_FN(DACK0), GPIO_FN(IRQ0), GPIO_FN(INTC_IRQ0_N), - GPIO_FN(SSI_SCK6_B), GPIO_FN(VI1_VSYNC_N), GPIO_FN(VI1_VSYNC_N_B), - GPIO_FN(SSI_WS78_C), GPIO_FN(DREQ1_N), GPIO_FN(VI1_CLKENB), - GPIO_FN(VI1_CLKENB_B), GPIO_FN(SSI_SDATA7_C), GPIO_FN(SSI_SCK78_B), - GPIO_FN(DACK1), GPIO_FN(IRQ1), GPIO_FN(INTC_IRQ1_N), GPIO_FN(SSI_WS6_B), - GPIO_FN(SSI_SDATA8_C), GPIO_FN(DREQ2_N), GPIO_FN(HSCK1_B), - GPIO_FN(HCTS0_N_B), GPIO_FN(MSIOF0_TXD_B), GPIO_FN(DACK2), - GPIO_FN(IRQ2), GPIO_FN(INTC_IRQ2_N), GPIO_FN(SSI_SDATA6_B), - GPIO_FN(HRTS0_N_B), GPIO_FN(MSIOF0_RXD_B), GPIO_FN(ETH_CRS_DV), - GPIO_FN(RMII_CRS_DV), GPIO_FN(STP_ISCLK_0_B), GPIO_FN(TS_SDEN0_D), - GPIO_FN(GLO_Q0_C), GPIO_FN(SCL2_E), GPIO_FN(SCL2_CIS_E), - GPIO_FN(ETH_RX_ER), GPIO_FN(RMII_RX_ER), GPIO_FN(STP_ISD_0_B), - GPIO_FN(TS_SPSYNC0_D), GPIO_FN(GLO_Q1_C), GPIO_FN(SDA2_E), - GPIO_FN(SDA2_CIS_E), GPIO_FN(ETH_RXD0), GPIO_FN(RMII_RXD0), - GPIO_FN(STP_ISEN_0_B), GPIO_FN(TS_SDAT0_D), GPIO_FN(GLO_I0_C), - GPIO_FN(SCIFB1_SCK_G), GPIO_FN(SCK1_E), GPIO_FN(ETH_RXD1), - GPIO_FN(RMII_RXD1), GPIO_FN(HRX0_E), GPIO_FN(STP_ISSYNC_0_B), - GPIO_FN(TS_SCK0_D), GPIO_FN(GLO_I1_C), GPIO_FN(SCIFB1_RXD_G), - GPIO_FN(RX1_E), GPIO_FN(ETH_LINK), GPIO_FN(RMII_LINK), GPIO_FN(HTX0_E), - GPIO_FN(STP_IVCXO27_0_B), GPIO_FN(SCIFB1_TXD_G), GPIO_FN(TX1_E), - GPIO_FN(ETH_REF_CLK), GPIO_FN(RMII_REF_CLK), GPIO_FN(HCTS0_N_E), - GPIO_FN(STP_IVCXO27_1_B), GPIO_FN(HRX0_F), - - /*IPSR7*/ - GPIO_FN(ETH_MDIO), GPIO_FN(RMII_MDIO), GPIO_FN(HRTS0_N_E), - GPIO_FN(SIM0_D_C), GPIO_FN(HCTS0_N_F), GPIO_FN(ETH_TXD1), - GPIO_FN(RMII_TXD1), GPIO_FN(HTX0_F), GPIO_FN(BPFCLK_G), - GPIO_FN(RDS_CLK_F), GPIO_FN(ETH_TX_EN), GPIO_FN(RMII_TX_EN), - GPIO_FN(SIM0_CLK_C), GPIO_FN(HRTS0_N_F), GPIO_FN(ETH_MAGIC), - GPIO_FN(RMII_MAGIC), GPIO_FN(SIM0_RST_C), GPIO_FN(ETH_TXD0), - GPIO_FN(RMII_TXD0), GPIO_FN(STP_ISCLK_1_B), GPIO_FN(TS_SDEN1_C), - GPIO_FN(GLO_SCLK_C), GPIO_FN(ETH_MDC), GPIO_FN(RMII_MDC), - GPIO_FN(STP_ISD_1_B), GPIO_FN(TS_SPSYNC1_C), GPIO_FN(GLO_SDATA_C), - GPIO_FN(PWM0), GPIO_FN(SCIFA2_SCK_C), GPIO_FN(STP_ISEN_1_B), - GPIO_FN(TS_SDAT1_C), GPIO_FN(GLO_SS_C), GPIO_FN(PWM1), - GPIO_FN(SCIFA2_TXD_C), GPIO_FN(STP_ISSYNC_1_B), GPIO_FN(TS_SCK1_C), - GPIO_FN(GLO_RFON_C), GPIO_FN(PCMOE_N), GPIO_FN(PWM2), GPIO_FN(PWMFSW0), - GPIO_FN(SCIFA2_RXD_C), GPIO_FN(PCMWE_N), GPIO_FN(IECLK_C), - GPIO_FN(DU1_DOTCLKIN), GPIO_FN(AUDIO_CLKC), GPIO_FN(AUDIO_CLKOUT_C), - GPIO_FN(VI0_CLK), GPIO_FN(ATACS00_N), GPIO_FN(AVB_RXD1), - GPIO_FN(MII_RXD1), GPIO_FN(VI0_DATA0_VI0_B0), GPIO_FN(ATACS10_N), - GPIO_FN(AVB_RXD2), GPIO_FN(MII_RXD2), - - /*IPSR8*/ - GPIO_FN(VI0_DATA1_VI0_B1), GPIO_FN(ATARD0_N), GPIO_FN(AVB_RXD3), - GPIO_FN(MII_RXD3), GPIO_FN(VI0_DATA2_VI0_B2), GPIO_FN(ATAWR0_N), - GPIO_FN(AVB_RXD4), GPIO_FN(VI0_DATA3_VI0_B3), GPIO_FN(ATADIR0_N), - GPIO_FN(AVB_RXD5), GPIO_FN(VI0_DATA4_VI0_B4), GPIO_FN(ATAG0_N), - GPIO_FN(AVB_RXD6), GPIO_FN(VI0_DATA5_VI0_B5), GPIO_FN(EX_WAIT1), - GPIO_FN(AVB_RXD7), GPIO_FN(VI0_DATA6_VI0_B6), GPIO_FN(AVB_RX_ER), - GPIO_FN(MII_RX_ER), GPIO_FN(VI0_DATA7_VI0_B7), GPIO_FN(AVB_RX_CLK), - GPIO_FN(MII_RX_CLK), GPIO_FN(VI1_CLK), GPIO_FN(AVB_RX_DV), - GPIO_FN(MII_RX_DV), GPIO_FN(VI1_DATA0_VI1_B0), GPIO_FN(SCIFA1_SCK_D), - GPIO_FN(AVB_CRS), GPIO_FN(MII_CRS), GPIO_FN(VI1_DATA1_VI1_B1), - GPIO_FN(SCIFA1_RXD_D), GPIO_FN(AVB_MDC), GPIO_FN(MII_MDC), - GPIO_FN(VI1_DATA2_VI1_B2), GPIO_FN(SCIFA1_TXD_D), GPIO_FN(AVB_MDIO), - GPIO_FN(MII_MDIO), GPIO_FN(VI1_DATA3_VI1_B3), GPIO_FN(SCIFA1_CTS_N_D), - GPIO_FN(AVB_GTX_CLK), GPIO_FN(VI1_DATA4_VI1_B4), - GPIO_FN(SCIFA1_RTS_N_D), GPIO_FN(AVB_MAGIC), GPIO_FN(MII_MAGIC), - GPIO_FN(VI1_DATA5_VI1_B5), GPIO_FN(AVB_PHY_INT), - GPIO_FN(VI1_DATA6_VI1_B6), GPIO_FN(AVB_GTXREFCLK), - GPIO_FN(SD0_CLK), GPIO_FN(VI1_DATA0_VI1_B0_B), GPIO_FN(SD0_CMD), - GPIO_FN(SCIFB1_SCK_B), GPIO_FN(VI1_DATA1_VI1_B1_B), - - /*IPSR9*/ - GPIO_FN(SD0_DAT0), GPIO_FN(SCIFB1_RXD_B), GPIO_FN(VI1_DATA2_VI1_B2_B), - GPIO_FN(SD0_DAT1), GPIO_FN(SCIFB1_TXD_B), GPIO_FN(VI1_DATA3_VI1_B3_B), - GPIO_FN(SD0_DAT2), GPIO_FN(SCIFB1_CTS_N_B), GPIO_FN(VI1_DATA4_VI1_B4_B), - GPIO_FN(SD0_DAT3), GPIO_FN(SCIFB1_RTS_N_B), GPIO_FN(VI1_DATA5_VI1_B5_B), - GPIO_FN(SD0_CD), GPIO_FN(MMC0_D6), GPIO_FN(TS_SDEN0_B), - GPIO_FN(USB0_EXTP), GPIO_FN(GLO_SCLK), GPIO_FN(VI1_DATA6_VI1_B6_B), - GPIO_FN(SCL1_B), GPIO_FN(SCL1_CIS_B), GPIO_FN(VI2_DATA6_VI2_B6_B), - GPIO_FN(SD0_WP), GPIO_FN(MMC0_D7), GPIO_FN(TS_SPSYNC0_B), - GPIO_FN(USB0_IDIN), GPIO_FN(GLO_SDATA), GPIO_FN(VI1_DATA7_VI1_B7_B), - GPIO_FN(SDA1_B), GPIO_FN(SDA1_CIS_B), GPIO_FN(VI2_DATA7_VI2_B7_B), - GPIO_FN(SD1_CLK), GPIO_FN(AVB_TX_EN), GPIO_FN(MII_TX_EN), - GPIO_FN(SD1_CMD), GPIO_FN(AVB_TX_ER), GPIO_FN(MII_TX_ER), - GPIO_FN(SCIFB0_SCK_B), GPIO_FN(SD1_DAT0), GPIO_FN(AVB_TX_CLK), - GPIO_FN(MII_TX_CLK), GPIO_FN(SCIFB0_RXD_B), GPIO_FN(SD1_DAT1), - GPIO_FN(AVB_LINK), GPIO_FN(MII_LINK), GPIO_FN(SCIFB0_TXD_B), - GPIO_FN(SD1_DAT2), GPIO_FN(AVB_COL), GPIO_FN(MII_COL), - GPIO_FN(SCIFB0_CTS_N_B), GPIO_FN(SD1_DAT3), GPIO_FN(AVB_RXD0), - GPIO_FN(MII_RXD0), GPIO_FN(SCIFB0_RTS_N_B), GPIO_FN(SD1_CD), - GPIO_FN(MMC1_D6), GPIO_FN(TS_SDEN1), GPIO_FN(USB1_EXTP), - GPIO_FN(GLO_SS), GPIO_FN(VI0_CLK_B), GPIO_FN(SCL2_D), - GPIO_FN(SCL2_CIS_D), GPIO_FN(SIM0_CLK_B), GPIO_FN(VI3_CLK_B), - - /*IPSR10*/ - GPIO_FN(SD1_WP), GPIO_FN(MMC1_D7), GPIO_FN(TS_SPSYNC1), - GPIO_FN(USB1_IDIN), GPIO_FN(GLO_RFON), GPIO_FN(VI1_CLK_B), - GPIO_FN(SDA2_D), GPIO_FN(SDA2_CIS_D), GPIO_FN(SIM0_D_B), - GPIO_FN(SD2_CLK), GPIO_FN(MMC0_CLK), GPIO_FN(SIM0_CLK), - GPIO_FN(VI0_DATA0_VI0_B0_B), GPIO_FN(TS_SDEN0_C), GPIO_FN(GLO_SCLK_B), - GPIO_FN(VI3_DATA0_B), GPIO_FN(SD2_CMD), GPIO_FN(MMC0_CMD), - GPIO_FN(SIM0_D), GPIO_FN(VI0_DATA1_VI0_B1_B), GPIO_FN(SCIFB1_SCK_E), - GPIO_FN(SCK1_D), GPIO_FN(TS_SPSYNC0_C), GPIO_FN(GLO_SDATA_B), - GPIO_FN(VI3_DATA1_B), GPIO_FN(SD2_DAT0), GPIO_FN(MMC0_D0), - GPIO_FN(FMCLK_B), GPIO_FN(VI0_DATA2_VI0_B2_B), GPIO_FN(SCIFB1_RXD_E), - GPIO_FN(RX1_D), GPIO_FN(TS_SDAT0_C), GPIO_FN(GLO_SS_B), - GPIO_FN(VI3_DATA2_B), GPIO_FN(SD2_DAT1), GPIO_FN(MMC0_D1), - GPIO_FN(FMIN_B), GPIO_FN(RDS_DATA), GPIO_FN(VI0_DATA3_VI0_B3_B), - GPIO_FN(SCIFB1_TXD_E), GPIO_FN(TX1_D), GPIO_FN(TS_SCK0_C), - GPIO_FN(GLO_RFON_B), GPIO_FN(VI3_DATA3_B), GPIO_FN(SD2_DAT2), - GPIO_FN(MMC0_D2), GPIO_FN(BPFCLK_B), GPIO_FN(RDS_CLK), - GPIO_FN(VI0_DATA4_VI0_B4_B), GPIO_FN(HRX0_D), GPIO_FN(TS_SDEN1_B), - GPIO_FN(GLO_Q0_B), GPIO_FN(VI3_DATA4_B), GPIO_FN(SD2_DAT3), - GPIO_FN(MMC0_D3), GPIO_FN(SIM0_RST), GPIO_FN(VI0_DATA5_VI0_B5_B), - GPIO_FN(HTX0_D), GPIO_FN(TS_SPSYNC1_B), GPIO_FN(GLO_Q1_B), - GPIO_FN(VI3_DATA5_B), GPIO_FN(SD2_CD), GPIO_FN(MMC0_D4), - GPIO_FN(TS_SDAT0_B), GPIO_FN(USB2_EXTP), GPIO_FN(GLO_I0), - GPIO_FN(VI0_DATA6_VI0_B6_B), GPIO_FN(HCTS0_N_D), GPIO_FN(TS_SDAT1_B), - GPIO_FN(GLO_I0_B), GPIO_FN(VI3_DATA6_B), - - /*IPSR11*/ - GPIO_FN(SD2_WP), GPIO_FN(MMC0_D5), GPIO_FN(TS_SCK0_B), - GPIO_FN(USB2_IDIN), GPIO_FN(GLO_I1), GPIO_FN(VI0_DATA7_VI0_B7_B), - GPIO_FN(HRTS0_N_D), GPIO_FN(TS_SCK1_B), GPIO_FN(GLO_I1_B), - GPIO_FN(VI3_DATA7_B), GPIO_FN(SD3_CLK), GPIO_FN(MMC1_CLK), - GPIO_FN(SD3_CMD), GPIO_FN(MMC1_CMD), GPIO_FN(MTS_N), GPIO_FN(SD3_DAT0), - GPIO_FN(MMC1_D0), GPIO_FN(STM_N), GPIO_FN(SD3_DAT1), GPIO_FN(MMC1_D1), - GPIO_FN(MDATA), GPIO_FN(SD3_DAT2), GPIO_FN(MMC1_D2), GPIO_FN(SDATA), - GPIO_FN(SD3_DAT3), GPIO_FN(MMC1_D3), GPIO_FN(SCKZ), GPIO_FN(SD3_CD), - GPIO_FN(MMC1_D4), GPIO_FN(TS_SDAT1), GPIO_FN(VSP), GPIO_FN(GLO_Q0), - GPIO_FN(SIM0_RST_B), GPIO_FN(SD3_WP), GPIO_FN(MMC1_D5), - GPIO_FN(TS_SCK1), GPIO_FN(GLO_Q1), GPIO_FN(FMIN_C), GPIO_FN(RDS_DATA_B), - GPIO_FN(FMIN_E), GPIO_FN(RDS_DATA_D), GPIO_FN(FMIN_F), - GPIO_FN(RDS_DATA_E), GPIO_FN(MLB_CLK), GPIO_FN(SCL2_B), - GPIO_FN(SCL2_CIS_B), GPIO_FN(MLB_SIG), GPIO_FN(SCIFB1_RXD_D), - GPIO_FN(RX1_C), GPIO_FN(SDA2_B), GPIO_FN(SDA2_CIS_B), GPIO_FN(MLB_DAT), - GPIO_FN(SPV_EVEN), GPIO_FN(SCIFB1_TXD_D), GPIO_FN(TX1_C), - GPIO_FN(BPFCLK_C), GPIO_FN(RDS_CLK_B), GPIO_FN(SSI_SCK0129), - GPIO_FN(CAN_CLK_B), GPIO_FN(MOUT0), - -}; - -static struct pinmux_cfg_reg pinmux_config_regs[] = { - { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1) { - GP_0_31_FN, FN_IP3_17_15, - GP_0_30_FN, FN_IP3_14_12, - GP_0_29_FN, FN_IP3_11_8, - GP_0_28_FN, FN_IP3_7_4, - GP_0_27_FN, FN_IP3_3_0, - GP_0_26_FN, FN_IP2_28_26, - GP_0_25_FN, FN_IP2_25_22, - GP_0_24_FN, FN_IP2_21_18, - GP_0_23_FN, FN_IP2_17_15, - GP_0_22_FN, FN_IP2_14_12, - GP_0_21_FN, FN_IP2_11_9, - GP_0_20_FN, FN_IP2_8_6, - GP_0_19_FN, FN_IP2_5_3, - GP_0_18_FN, FN_IP2_2_0, - GP_0_17_FN, FN_IP1_29_28, - GP_0_16_FN, FN_IP1_27_26, - GP_0_15_FN, FN_IP1_25_22, - GP_0_14_FN, FN_IP1_21_18, - GP_0_13_FN, FN_IP1_17_15, - GP_0_12_FN, FN_IP1_14_12, - GP_0_11_FN, FN_IP1_11_8, - GP_0_10_FN, FN_IP1_7_4, - GP_0_9_FN, FN_IP1_3_0, - GP_0_8_FN, FN_IP0_30_27, - GP_0_7_FN, FN_IP0_26_23, - GP_0_6_FN, FN_IP0_22_20, - GP_0_5_FN, FN_IP0_19_16, - GP_0_4_FN, FN_IP0_15_12, - GP_0_3_FN, FN_IP0_11_9, - GP_0_2_FN, FN_IP0_8_6, - GP_0_1_FN, FN_IP0_5_3, - GP_0_0_FN, FN_IP0_2_0 } - }, - { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1) { - 0, 0, - 0, 0, - GP_1_29_FN, FN_IP6_13_11, - GP_1_28_FN, FN_IP6_10_9, - GP_1_27_FN, FN_IP6_8_6, - GP_1_26_FN, FN_IP6_5_3, - GP_1_25_FN, FN_IP6_2_0, - GP_1_24_FN, FN_IP5_29_27, - GP_1_23_FN, FN_IP5_26_24, - GP_1_22_FN, FN_IP5_23_21, - GP_1_21_FN, FN_IP5_20_18, - GP_1_20_FN, FN_IP5_17_15, - GP_1_19_FN, FN_IP5_14_13, - GP_1_18_FN, FN_IP5_12_10, - GP_1_17_FN, FN_IP5_9_6, - GP_1_16_FN, FN_IP5_5_3, - GP_1_15_FN, FN_IP5_2_0, - GP_1_14_FN, FN_IP4_29_27, - GP_1_13_FN, FN_IP4_26_24, - GP_1_12_FN, FN_IP4_23_21, - GP_1_11_FN, FN_IP4_20_18, - GP_1_10_FN, FN_IP4_17_15, - GP_1_9_FN, FN_IP4_14_12, - GP_1_8_FN, FN_IP4_11_9, - GP_1_7_FN, FN_IP4_8_6, - GP_1_6_FN, FN_IP4_5_3, - GP_1_5_FN, FN_IP4_2_0, - GP_1_4_FN, FN_IP3_31_29, - GP_1_3_FN, FN_IP3_28_26, - GP_1_2_FN, FN_IP3_25_23, - GP_1_1_FN, FN_IP3_22_20, - GP_1_0_FN, FN_IP3_19_18, } - }, - { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1) { - 0, 0, - 0, 0, - GP_2_29_FN, FN_IP7_15_13, - GP_2_28_FN, FN_IP7_12_10, - GP_2_27_FN, FN_IP7_9_8, - GP_2_26_FN, FN_IP7_7_6, - GP_2_25_FN, FN_IP7_5_3, - GP_2_24_FN, FN_IP7_2_0, - GP_2_23_FN, FN_IP6_31_29, - GP_2_22_FN, FN_IP6_28_26, - GP_2_21_FN, FN_IP6_25_23, - GP_2_20_FN, FN_IP6_22_20, - GP_2_19_FN, FN_IP6_19_17, - GP_2_18_FN, FN_IP6_16_14, - GP_2_17_FN, FN_VI1_DATA7_VI1_B7, - GP_2_16_FN, FN_IP8_27, - GP_2_15_FN, FN_IP8_26, - GP_2_14_FN, FN_IP8_25_24, - GP_2_13_FN, FN_IP8_23_22, - GP_2_12_FN, FN_IP8_21_20, - GP_2_11_FN, FN_IP8_19_18, - GP_2_10_FN, FN_IP8_17_16, - GP_2_9_FN, FN_IP8_15_14, - GP_2_8_FN, FN_IP8_13_12, - GP_2_7_FN, FN_IP8_11_10, - GP_2_6_FN, FN_IP8_9_8, - GP_2_5_FN, FN_IP8_7_6, - GP_2_4_FN, FN_IP8_5_4, - GP_2_3_FN, FN_IP8_3_2, - GP_2_2_FN, FN_IP8_1_0, - GP_2_1_FN, FN_IP7_30_29, - GP_2_0_FN, FN_IP7_28_27 } - }, - { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1) { - GP_3_31_FN, FN_IP11_21_18, - GP_3_30_FN, FN_IP11_17_15, - GP_3_29_FN, FN_IP11_14_13, - GP_3_28_FN, FN_IP11_12_11, - GP_3_27_FN, FN_IP11_10_9, - GP_3_26_FN, FN_IP11_8_7, - GP_3_25_FN, FN_IP11_6_5, - GP_3_24_FN, FN_IP11_4, - GP_3_23_FN, FN_IP11_3_0, - GP_3_22_FN, FN_IP10_29_26, - GP_3_21_FN, FN_IP10_25_23, - GP_3_20_FN, FN_IP10_22_19, - GP_3_19_FN, FN_IP10_18_15, - GP_3_18_FN, FN_IP10_14_11, - GP_3_17_FN, FN_IP10_10_7, - GP_3_16_FN, FN_IP10_6_4, - GP_3_15_FN, FN_IP10_3_0, - GP_3_14_FN, FN_IP9_31_28, - GP_3_13_FN, FN_IP9_27_26, - GP_3_12_FN, FN_IP9_25_24, - GP_3_11_FN, FN_IP9_23_22, - GP_3_10_FN, FN_IP9_21_20, - GP_3_9_FN, FN_IP9_19_18, - GP_3_8_FN, FN_IP9_17_16, - GP_3_7_FN, FN_IP9_15_12, - GP_3_6_FN, FN_IP9_11_8, - GP_3_5_FN, FN_IP9_7_6, - GP_3_4_FN, FN_IP9_5_4, - GP_3_3_FN, FN_IP9_3_2, - GP_3_2_FN, FN_IP9_1_0, - GP_3_1_FN, FN_IP8_30_29, - GP_3_0_FN, FN_IP8_28 } - }, - { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1) { - GP_4_31_FN, FN_IP14_18_16, - GP_4_30_FN, FN_IP14_15_12, - GP_4_29_FN, FN_IP14_11_9, - GP_4_28_FN, FN_IP14_8_6, - GP_4_27_FN, FN_IP14_5_3, - GP_4_26_FN, FN_IP14_2_0, - GP_4_25_FN, FN_IP13_30_29, - GP_4_24_FN, FN_IP13_28_26, - GP_4_23_FN, FN_IP13_25_23, - GP_4_22_FN, FN_IP13_22_19, - GP_4_21_FN, FN_IP13_18_16, - GP_4_20_FN, FN_IP13_15_13, - GP_4_19_FN, FN_IP13_12_10, - GP_4_18_FN, FN_IP13_9_7, - GP_4_17_FN, FN_IP13_6_3, - GP_4_16_FN, FN_IP13_2_0, - GP_4_15_FN, FN_IP12_30_28, - GP_4_14_FN, FN_IP12_27_25, - GP_4_13_FN, FN_IP12_24_23, - GP_4_12_FN, FN_IP12_22_20, - GP_4_11_FN, FN_IP12_19_17, - GP_4_10_FN, FN_IP12_16_14, - GP_4_9_FN, FN_IP12_13_11, - GP_4_8_FN, FN_IP12_10_8, - GP_4_7_FN, FN_IP12_7_6, - GP_4_6_FN, FN_IP12_5_4, - GP_4_5_FN, FN_IP12_3_2, - GP_4_4_FN, FN_IP12_1_0, - GP_4_3_FN, FN_IP11_31_30, - GP_4_2_FN, FN_IP11_29_27, - GP_4_1_FN, FN_IP11_26_24, - GP_4_0_FN, FN_IP11_23_22 } - }, - { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1) { - GP_5_31_FN, FN_IP7_24_22, - GP_5_30_FN, FN_IP7_21_19, - GP_5_29_FN, FN_IP7_18_16, - GP_5_28_FN, FN_DU_DOTCLKIN2, - GP_5_27_FN, FN_IP7_26_25, - GP_5_26_FN, FN_DU_DOTCLKIN0, - GP_5_25_FN, FN_AVS2, - GP_5_24_FN, FN_AVS1, - GP_5_23_FN, FN_USB2_OVC, - GP_5_22_FN, FN_USB2_PWEN, - GP_5_21_FN, FN_IP16_7, - GP_5_20_FN, FN_IP16_6, - GP_5_19_FN, FN_USB0_OVC_VBUS, - GP_5_18_FN, FN_USB0_PWEN, - GP_5_17_FN, FN_IP16_5_3, - GP_5_16_FN, FN_IP16_2_0, - GP_5_15_FN, FN_IP15_29_28, - GP_5_14_FN, FN_IP15_27_26, - GP_5_13_FN, FN_IP15_25_23, - GP_5_12_FN, FN_IP15_22_20, - GP_5_11_FN, FN_IP15_19_18, - GP_5_10_FN, FN_IP15_17_16, - GP_5_9_FN, FN_IP15_15_14, - GP_5_8_FN, FN_IP15_13_12, - GP_5_7_FN, FN_IP15_11_9, - GP_5_6_FN, FN_IP15_8_6, - GP_5_5_FN, FN_IP15_5_3, - GP_5_4_FN, FN_IP15_2_0, - GP_5_3_FN, FN_IP14_30_28, - GP_5_2_FN, FN_IP14_27_25, - GP_5_1_FN, FN_IP14_24_22, - GP_5_0_FN, FN_IP14_21_19 } - }, - /* IPSR0 - IPSR5 */ - { PINMUX_CFG_REG_VAR("IPSR6", 0xE6060038, 32, - 3, 3, 3, 3, 3, 3, 3, 2, 3, 3, 3) { - /* IP6_31_29 [3] */ - FN_ETH_REF_CLK, FN_RMII_REF_CLK, FN_HCTS0_N_E, - FN_STP_IVCXO27_1_B, FN_HRX0_F, 0, 0, 0, - /* IP6_28_26 [3] */ - FN_ETH_LINK, FN_RMII_LINK, FN_HTX0_E, - FN_STP_IVCXO27_0_B, FN_SCIFB1_TXD_G, FN_TX1_E, 0, 0, - /* IP6_25_23 [3] */ - FN_ETH_RXD1, FN_RMII_RXD1, FN_HRX0_E, FN_STP_ISSYNC_0_B, - FN_TS_SCK0_D, FN_GLO_I1_C, FN_SCIFB1_RXD_G, FN_RX1_E, - /* IP6_22_20 [3] */ - FN_ETH_RXD0, FN_RMII_RXD0, FN_STP_ISEN_0_B, FN_TS_SDAT0_D, - FN_GLO_I0_C, FN_SCIFB1_SCK_G, FN_SCK1_E, 0, - /* IP6_19_17 [3] */ - FN_ETH_RX_ER, FN_RMII_RX_ER, FN_STP_ISD_0_B, - FN_TS_SPSYNC0_D, FN_GLO_Q1_C, FN_SDA2_E, FN_SDA2_CIS_E, 0, - /* IP6_16_14 [3] */ - FN_ETH_CRS_DV, FN_RMII_CRS_DV, FN_STP_ISCLK_0_B, - FN_TS_SDEN0_D, FN_GLO_Q0_C, FN_SCL2_E, - FN_SCL2_CIS_E, 0, - /* IP6_13_11 [3] */ - FN_DACK2, FN_IRQ2, FN_INTC_IRQ2_N, - FN_SSI_SDATA6_B, FN_HRTS0_N_B, FN_MSIOF0_RXD_B, 0, 0, - /* IP6_10_9 [2] */ - FN_DREQ2_N, FN_HSCK1_B, FN_HCTS0_N_B, FN_MSIOF0_TXD_B, - /* IP6_8_6 [3] */ - FN_DACK1, FN_IRQ1, FN_INTC_IRQ1_N, FN_SSI_WS6_B, - FN_SSI_SDATA8_C, 0, 0, 0, - /* IP6_5_3 [3] */ - FN_DREQ1_N, FN_VI1_CLKENB, FN_VI1_CLKENB_B, - FN_SSI_SDATA7_C, FN_SSI_SCK78_B, 0, 0, 0, - /* IP6_2_0 [3] */ - FN_DACK0, FN_IRQ0, FN_INTC_IRQ0_N, FN_SSI_SCK6_B, - FN_VI1_VSYNC_N, FN_VI1_VSYNC_N_B, FN_SSI_WS78_C, 0, } - }, - { PINMUX_CFG_REG_VAR("IPSR7", 0xE606003C, 32, - 1, 2, 2, 2, 3, 3, 3, 3, 3, 2, 2, 3, 3) { - /* IP7_31 [1] */ - 0, 0, - /* IP7_30_29 [2] */ - FN_VI0_DATA0_VI0_B0, FN_ATACS10_N, FN_AVB_RXD2, - FN_MII_RXD2, - /* IP7_28_27 [2] */ - FN_VI0_CLK, FN_ATACS00_N, FN_AVB_RXD1, FN_MII_RXD1, - /* IP7_26_25 [2] */ - FN_DU1_DOTCLKIN, FN_AUDIO_CLKC, FN_AUDIO_CLKOUT_C, 0, - /* IP7_24_22 [3] */ - FN_PWM2, FN_PWMFSW0, FN_SCIFA2_RXD_C, FN_PCMWE_N, FN_IECLK_C, - 0, 0, 0, - /* IP7_21_19 [3] */ - FN_PWM1, FN_SCIFA2_TXD_C, FN_STP_ISSYNC_1_B, FN_TS_SCK1_C, - FN_GLO_RFON_C, FN_PCMOE_N, 0, 0, - /* IP7_18_16 [3] */ - FN_PWM0, FN_SCIFA2_SCK_C, FN_STP_ISEN_1_B, FN_TS_SDAT1_C, - FN_GLO_SS_C, 0, 0, 0, - /* IP7_15_13 [3] */ - FN_ETH_MDC, FN_RMII_MDC, FN_STP_ISD_1_B, - FN_TS_SPSYNC1_C, FN_GLO_SDATA_C, 0, 0, 0, - /* IP7_12_10 [3] */ - FN_ETH_TXD0, FN_RMII_TXD0, FN_STP_ISCLK_1_B, FN_TS_SDEN1_C, - FN_GLO_SCLK_C, 0, 0, 0, - /* IP7_9_8 [2] */ - FN_ETH_MAGIC, FN_RMII_MAGIC, FN_SIM0_RST_C, 0, - /* IP7_7_6 [2] */ - FN_ETH_TX_EN, FN_RMII_TX_EN, FN_SIM0_CLK_C, FN_HRTS0_N_F, - /* IP7_5_3 [3] */ - FN_ETH_TXD1, FN_RMII_TXD1, FN_HTX0_F, FN_BPFCLK_G, FN_RDS_CLK_F, - 0, 0, 0, - /* IP7_2_0 [3] */ - FN_ETH_MDIO, FN_RMII_MDIO, FN_HRTS0_N_E, - FN_SIM0_D_C, FN_HCTS0_N_F, 0, 0, 0, } - }, - { PINMUX_CFG_REG_VAR("IPSR8", 0xE6060040, 32, - 1, 2, 1, 1, 1, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2) { - /* IP8_31 [1] */ - 0, 0, - /* IP8_30_29 [2] */ - FN_SD0_CMD, FN_SCIFB1_SCK_B, FN_VI1_DATA1_VI1_B1_B, 0, - /* IP8_28 [1] */ - FN_SD0_CLK, FN_VI1_DATA0_VI1_B0_B, - /* IP8_27 [1] */ - FN_VI1_DATA6_VI1_B6, FN_AVB_GTXREFCLK, - /* IP8_26 [1] */ - FN_VI1_DATA5_VI1_B5, FN_AVB_PHY_INT, - /* IP8_25_24 [2] */ - FN_VI1_DATA4_VI1_B4, FN_SCIFA1_RTS_N_D, - FN_AVB_MAGIC, FN_MII_MAGIC, - /* IP8_23_22 [2] */ - FN_VI1_DATA3_VI1_B3, FN_SCIFA1_CTS_N_D, FN_AVB_GTX_CLK, 0, - /* IP8_21_20 [2] */ - FN_VI1_DATA2_VI1_B2, FN_SCIFA1_TXD_D, FN_AVB_MDIO, - FN_MII_MDIO, - /* IP8_19_18 [2] */ - FN_VI1_DATA1_VI1_B1, FN_SCIFA1_RXD_D, FN_AVB_MDC, FN_MII_MDC, - /* IP8_17_16 [2] */ - FN_VI1_DATA0_VI1_B0, FN_SCIFA1_SCK_D, FN_AVB_CRS, FN_MII_CRS, - /* IP8_15_14 [2] */ - FN_VI1_CLK, FN_AVB_RX_DV, FN_MII_RX_DV, 0, - /* IP8_13_12 [2] */ - FN_VI0_DATA7_VI0_B7, FN_AVB_RX_CLK, FN_MII_RX_CLK, 0, - /* IP8_11_10 [2] */ - FN_VI0_DATA6_VI0_B6, FN_AVB_RX_ER, FN_MII_RX_ER, 0, - /* IP8_9_8 [2] */ - FN_VI0_DATA5_VI0_B5, FN_EX_WAIT1, FN_AVB_RXD7, 0, - /* IP8_7_6 [2] */ - FN_VI0_DATA4_VI0_B4, FN_ATAG0_N, FN_AVB_RXD6, 0, - /* IP8_5_4 [2] */ - FN_VI0_DATA3_VI0_B3, FN_ATADIR0_N, FN_AVB_RXD5, 0, - /* IP8_3_2 [2] */ - FN_VI0_DATA2_VI0_B2, FN_ATAWR0_N, FN_AVB_RXD4, 0, - /* IP8_1_0 [2] */ - FN_VI0_DATA1_VI0_B1, FN_ATARD0_N, FN_AVB_RXD3, FN_MII_RXD3, } - }, - { PINMUX_CFG_REG_VAR("IPSR9", 0xE6060044, 32, - 4, 2, 2, 2, 2, 2, 2, 4, 4, 2, 2, 2, 2) { - /* IP9_31_28 [4] */ - FN_SD1_CD, FN_MMC1_D6, FN_TS_SDEN1, FN_USB1_EXTP, - FN_GLO_SS, FN_VI0_CLK_B, FN_SCL2_D, FN_SCL2_CIS_D, - FN_SIM0_CLK_B, FN_VI3_CLK_B, 0, 0, 0, 0, 0, 0, - /* IP9_27_26 [2] */ - FN_SD1_DAT3, FN_AVB_RXD0, FN_MII_RXD0, FN_SCIFB0_RTS_N_B, - /* IP9_25_24 [2] */ - FN_SD1_DAT2, FN_AVB_COL, FN_MII_COL, FN_SCIFB0_CTS_N_B, - /* IP9_23_22 [2] */ - FN_SD1_DAT1, FN_AVB_LINK, FN_MII_LINK, FN_SCIFB0_TXD_B, - /* IP9_21_20 [2] */ - FN_SD1_DAT0, FN_AVB_TX_CLK, FN_MII_TX_CLK, FN_SCIFB0_RXD_B, - /* IP9_19_18 [2] */ - FN_SD1_CMD, FN_AVB_TX_ER, FN_MII_TX_ER, FN_SCIFB0_SCK_B, - /* IP9_17_16 [2] */ - FN_SD1_CLK, FN_AVB_TX_EN, FN_MII_TX_EN, 0, - /* IP9_15_12 [4] */ - FN_SD0_WP, FN_MMC0_D7, FN_TS_SPSYNC0_B, FN_USB0_IDIN, - FN_GLO_SDATA, FN_VI1_DATA7_VI1_B7_B, FN_SDA1_B, - FN_SDA1_CIS_B, FN_VI2_DATA7_VI2_B7_B, 0, 0, 0, 0, 0, 0, 0, - /* IP9_11_8 [4] */ - FN_SD0_CD, FN_MMC0_D6, FN_TS_SDEN0_B, FN_USB0_EXTP, - FN_GLO_SCLK, FN_VI1_DATA6_VI1_B6_B, FN_SCL1_B, - FN_SCL1_CIS_B, FN_VI2_DATA6_VI2_B6_B, 0, 0, 0, 0, 0, 0, 0, - /* IP9_7_6 [2] */ - FN_SD0_DAT3, FN_SCIFB1_RTS_N_B, FN_VI1_DATA5_VI1_B5_B, 0, - /* IP9_5_4 [2] */ - FN_SD0_DAT2, FN_SCIFB1_CTS_N_B, FN_VI1_DATA4_VI1_B4_B, 0, - /* IP9_3_2 [2] */ - FN_SD0_DAT1, FN_SCIFB1_TXD_B, FN_VI1_DATA3_VI1_B3_B, 0, - /* IP9_1_0 [2] */ - FN_SD0_DAT0, FN_SCIFB1_RXD_B, FN_VI1_DATA2_VI1_B2_B, 0, } - }, - { PINMUX_CFG_REG_VAR("IPSR10", 0xE6060048, 32, - 2, 4, 3, 4, 4, 4, 4, 3, 4) { - /* IP10_31_30 [2] */ - 0, 0, 0, 0, - /* IP10_29_26 [4] */ - FN_SD2_CD, FN_MMC0_D4, FN_TS_SDAT0_B, FN_USB2_EXTP, FN_GLO_I0, - FN_VI0_DATA6_VI0_B6_B, FN_HCTS0_N_D, FN_TS_SDAT1_B, - FN_GLO_I0_B, FN_VI3_DATA6_B, 0, 0, 0, 0, 0, 0, - /* IP10_25_23 [3] */ - FN_SD2_DAT3, FN_MMC0_D3, FN_SIM0_RST, FN_VI0_DATA5_VI0_B5_B, - FN_HTX0_D, FN_TS_SPSYNC1_B, FN_GLO_Q1_B, FN_VI3_DATA5_B, - /* IP10_22_19 [4] */ - FN_SD2_DAT2, FN_MMC0_D2, FN_BPFCLK_B, FN_RDS_CLK, - FN_VI0_DATA4_VI0_B4_B, FN_HRX0_D, FN_TS_SDEN1_B, - FN_GLO_Q0_B, FN_VI3_DATA4_B, 0, 0, 0, 0, 0, 0, 0, - /* IP10_18_15 [4] */ - FN_SD2_DAT1, FN_MMC0_D1, FN_FMIN_B, FN_RDS_DATA, - FN_VI0_DATA3_VI0_B3_B, FN_SCIFB1_TXD_E, FN_TX1_D, - FN_TS_SCK0_C, FN_GLO_RFON_B, FN_VI3_DATA3_B, - 0, 0, 0, 0, 0, 0, - /* IP10_14_11 [4] */ - FN_SD2_DAT0, FN_MMC0_D0, FN_FMCLK_B, - FN_VI0_DATA2_VI0_B2_B, FN_SCIFB1_RXD_E, FN_RX1_D, - FN_TS_SDAT0_C, FN_GLO_SS_B, FN_VI3_DATA2_B, - 0, 0, 0, 0, 0, 0, 0, - /* IP10_10_7 [4] */ - FN_SD2_CMD, FN_MMC0_CMD, FN_SIM0_D, - FN_VI0_DATA1_VI0_B1_B, FN_SCIFB1_SCK_E, FN_SCK1_D, - FN_TS_SPSYNC0_C, FN_GLO_SDATA_B, FN_VI3_DATA1_B, - 0, 0, 0, 0, 0, 0, 0, - /* IP10_6_4 [3] */ - FN_SD2_CLK, FN_MMC0_CLK, FN_SIM0_CLK, - FN_VI0_DATA0_VI0_B0_B, FN_TS_SDEN0_C, FN_GLO_SCLK_B, - FN_VI3_DATA0_B, 0, - /* IP10_3_0 [4] */ - FN_SD1_WP, FN_MMC1_D7, FN_TS_SPSYNC1, FN_USB1_IDIN, - FN_GLO_RFON, FN_VI1_CLK_B, FN_SDA2_D, FN_SDA2_CIS_D, - FN_SIM0_D_B, 0, 0, 0, 0, 0, 0, 0, } - }, - { PINMUX_CFG_REG_VAR("IPSR11", 0xE606004C, 32, - 2, 3, 3, 2, 4, 3, 2, 2, 2, 2, 2, 1, 4) { - /* IP11_31_30 [2] */ - FN_SSI_SCK0129, FN_CAN_CLK_B, FN_MOUT0, 0, - /* IP11_29_27 [3] */ - FN_MLB_DAT, FN_SPV_EVEN, FN_SCIFB1_TXD_D, FN_TX1_C, FN_BPFCLK_C, - FN_RDS_CLK_B, 0, 0, - /* IP11_26_24 [3] */ - FN_MLB_SIG, FN_SCIFB1_RXD_D, FN_RX1_C, FN_SDA2_B, FN_SDA2_CIS_B, - 0, 0, 0, - /* IP11_23_22 [2] */ - FN_MLB_CLK, FN_SCL2_B, FN_SCL2_CIS_B, 0, - /* IP11_21_18 [4] */ - FN_SD3_WP, FN_MMC1_D5, FN_TS_SCK1, FN_GLO_Q1, FN_FMIN_C, - FN_RDS_DATA_B, FN_FMIN_E, FN_RDS_DATA_D, FN_FMIN_F, - FN_RDS_DATA_E, 0, 0, 0, 0, 0, 0, - /* IP11_17_15 [3] */ - FN_SD3_CD, FN_MMC1_D4, FN_TS_SDAT1, - FN_VSP, FN_GLO_Q0, FN_SIM0_RST_B, 0, 0, - /* IP11_14_13 [2] */ - FN_SD3_DAT3, FN_MMC1_D3, FN_SCKZ, 0, - /* IP11_12_11 [2] */ - FN_SD3_DAT2, FN_MMC1_D2, FN_SDATA, 0, - /* IP11_10_9 [2] */ - FN_SD3_DAT1, FN_MMC1_D1, FN_MDATA, 0, - /* IP11_8_7 [2] */ - FN_SD3_DAT0, FN_MMC1_D0, FN_STM_N, 0, - /* IP11_6_5 [2] */ - FN_SD3_CMD, FN_MMC1_CMD, FN_MTS_N, 0, - /* IP11_4 [1] */ - FN_SD3_CLK, FN_MMC1_CLK, - /* IP11_3_0 [4] */ - FN_SD2_WP, FN_MMC0_D5, FN_TS_SCK0_B, FN_USB2_IDIN, - FN_GLO_I1, FN_VI0_DATA7_VI0_B7_B, FN_HRTS0_N_D, - FN_TS_SCK1_B, FN_GLO_I1_B, FN_VI3_DATA7_B, 0, 0, 0, 0, 0, 0, } - }, - { PINMUX_CFG_REG_VAR("MOD_SEL", 0xE6060090, 32, - 3, 2, 2, 3, 2, 1, 1, 1, 2, 1, - 2, 1, 1, 1, 1, 2, 1, 1, 2, 1, 1) { - /* SEL_SCIF1 [3] */ - FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3, - FN_SEL_SCIF1_4, 0, 0, 0, - /* SEL_SCIFB [2] */ - FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2, 0, - /* SEL_SCIFB2 [2] */ - FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, FN_SEL_SCIFB2_2, 0, - /* SEL_SCIFB1 [3] */ - FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, FN_SEL_SCIFB1_2, - FN_SEL_SCIFB1_3, FN_SEL_SCIFB1_4, FN_SEL_SCIFB1_5, - FN_SEL_SCIFB1_6, 0, - /* SEL_SCIFA1 [2] */ - FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, - FN_SEL_SCIFA1_3, - /* SEL_SCIF0 [1] */ - FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, - /* SEL_SCIFA [1] */ - FN_SEL_SCFA_0, FN_SEL_SCFA_1, - /* SEL_SOF1 [1] */ - FN_SEL_SOF1_0, FN_SEL_SOF1_1, - /* SEL_SSI7 [2] */ - FN_SEL_SSI7_0, FN_SEL_SSI7_1, FN_SEL_SSI7_2, 0, - /* SEL_SSI6 [1] */ - FN_SEL_SSI6_0, FN_SEL_SSI6_1, - /* SEL_SSI5 [2] */ - FN_SEL_SSI5_0, FN_SEL_SSI5_1, FN_SEL_SSI5_2, 0, - /* SEL_VI3 [1] */ - FN_SEL_VI3_0, FN_SEL_VI3_1, - /* SEL_VI2 [1] */ - FN_SEL_VI2_0, FN_SEL_VI2_1, - /* SEL_VI1 [1] */ - FN_SEL_VI1_0, FN_SEL_VI1_1, - /* SEL_VI0 [1] */ - FN_SEL_VI0_0, FN_SEL_VI0_1, - /* SEL_TSIF1 [2] */ - FN_SEL_TSIF1_0, FN_SEL_TSIF1_1, FN_SEL_TSIF1_2, 0, - /* RESERVED [1] */ - 0, 0, - /* SEL_LBS [1] */ - FN_SEL_LBS_0, FN_SEL_LBS_1, - /* SEL_TSIF0 [2] */ - FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3, - /* SEL_SOF3 [1] */ - FN_SEL_SOF3_0, FN_SEL_SOF3_1, - /* SEL_SOF0 [1] */ - FN_SEL_SOF0_0, FN_SEL_SOF0_1, } - }, - { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xE6060094, 32, - 2, 1, 1, 1, 1, 2, 1, 2, 1, - 2, 1, 1, 1, 3, 3, 2, 3, 2, 2) { - /* RESEVED [2] */ - 0, 0, 0, 0, 0, 0, 0, 0, - /* RESEVED [1] */ - 0, 0, - /* SEL_TMU1 [1] */ - FN_SEL_TMU1_0, FN_SEL_TMU1_1, - /* SEL_HSCIF1 [1] */ - FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, - /* SEL_SCIFCLK [1] */ - FN_SEL_SCIFCLK_0, FN_SEL_SCIFCLK_1, - /* SEL_CAN0 [2] */ - FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3, - /* SEL_CANCLK [1] */ - FN_SEL_CANCLK_0, FN_SEL_CANCLK_1, - /* SEL_SCIFA2 [2] */ - FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1, FN_SEL_SCIFA2_2, 0, - /* SEL_CAN1 [1] */ - FN_SEL_CAN1_0, FN_SEL_CAN1_1, - /* RESEVED [2] */ - 0, 0, 0, 0, 0, 0, 0, 0, - /* RESEVED [1] */ - 0, 0, - /* SEL_ADI [1] */ - FN_SEL_ADI_0, FN_SEL_ADI_1, - /* SEL_SSP [1] */ - FN_SEL_SSP_0, FN_SEL_SSP_1, - /* SEL_FM [3] */ - FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3, - FN_SEL_FM_4, FN_SEL_FM_5, FN_SEL_FM_6, 0, - /* SEL_HSCIF0 [3] */ - FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2, - FN_SEL_HSCIF0_3, FN_SEL_HSCIF0_4, FN_SEL_HSCIF0_5, 0, 0, - /* SEL_GPS [2] */ - FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, 0, - /* SEL_RDS [3] */ - FN_SEL_RDS_0, FN_SEL_RDS_1, FN_SEL_RDS_2, - FN_SEL_RDS_3, FN_SEL_RDS_4, FN_SEL_RDS_5, 0, 0, - /* SEL_SIM [2] */ - FN_SEL_SIM_0, FN_SEL_SIM_1, FN_SEL_SIM_2, 0, - /* SEL_SSI8 [2] */ - FN_SEL_SSI8_0, FN_SEL_SSI8_1, FN_SEL_SSI8_2, 0, } - }, - { PINMUX_CFG_REG_VAR("MOD_SEL3", 0xE6060098, 32, - 1, 1, 2, 4, 4, 2, 2, - 4, 2, 3, 2, 3, 2) { - /* SEL_IICDVFS [1] */ - FN_SEL_IICDVFS_0, FN_SEL_IICDVFS_1, - /* SEL_IIC0 [1] */ - FN_SEL_IIC0_0, FN_SEL_IIC0_1, - /* RESEVED [2] */ - 0, 0, 0, 0, - /* RESEVED [4] */ - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - /* RESEVED [4] */ - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - /* RESEVED [2] */ - 0, 0, 0, 0, - /* SEL_IEB [2] */ - FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, 0, - /* RESEVED [4] */ - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - /* RESEVED [2] */ - 0, 0, 0, 0, - /* SEL_IIC2 [3] */ - FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3, - FN_SEL_IIC2_4, 0, 0, 0, - /* SEL_IIC1 [2] */ - FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2, 0, - /* SEL_I2C2 [3] */ - FN_SEL_I2C2_0, FN_SEL_I2C2_1, FN_SEL_I2C2_2, FN_SEL_I2C2_3, - FN_SEL_I2C2_4, 0, 0, 0, - /* SEL_I2C1 [2] */ - FN_SEL_I2C1_0, FN_SEL_I2C1_1, FN_SEL_I2C1_2, 0, } - }, - { PINMUX_CFG_REG("INOUTSEL0", 0xE6050004, 32, 1) { GP_INOUTSEL(0) } }, - { PINMUX_CFG_REG("INOUTSEL1", 0xE6051004, 32, 1) { - 0, 0, - 0, 0, - GP_1_29_IN, GP_1_29_OUT, - GP_1_28_IN, GP_1_28_OUT, - GP_1_27_IN, GP_1_27_OUT, - GP_1_26_IN, GP_1_26_OUT, - GP_1_25_IN, GP_1_25_OUT, - GP_1_24_IN, GP_1_24_OUT, - GP_1_23_IN, GP_1_23_OUT, - GP_1_22_IN, GP_1_22_OUT, - GP_1_21_IN, GP_1_21_OUT, - GP_1_20_IN, GP_1_20_OUT, - GP_1_19_IN, GP_1_19_OUT, - GP_1_18_IN, GP_1_18_OUT, - GP_1_17_IN, GP_1_17_OUT, - GP_1_16_IN, GP_1_16_OUT, - GP_1_15_IN, GP_1_15_OUT, - GP_1_14_IN, GP_1_14_OUT, - GP_1_13_IN, GP_1_13_OUT, - GP_1_12_IN, GP_1_12_OUT, - GP_1_11_IN, GP_1_11_OUT, - GP_1_10_IN, GP_1_10_OUT, - GP_1_9_IN, GP_1_9_OUT, - GP_1_8_IN, GP_1_8_OUT, - GP_1_7_IN, GP_1_7_OUT, - GP_1_6_IN, GP_1_6_OUT, - GP_1_5_IN, GP_1_5_OUT, - GP_1_4_IN, GP_1_4_OUT, - GP_1_3_IN, GP_1_3_OUT, - GP_1_2_IN, GP_1_2_OUT, - GP_1_1_IN, GP_1_1_OUT, - GP_1_0_IN, GP_1_0_OUT, } - }, - { PINMUX_CFG_REG("INOUTSEL2", 0xE6052004, 32, 1) { - 0, 0, - 0, 0, - GP_2_29_IN, GP_2_29_OUT, - GP_2_28_IN, GP_2_28_OUT, - GP_2_27_IN, GP_2_27_OUT, - GP_2_26_IN, GP_2_26_OUT, - GP_2_25_IN, GP_2_25_OUT, - GP_2_24_IN, GP_2_24_OUT, - GP_2_23_IN, GP_2_23_OUT, - GP_2_22_IN, GP_2_22_OUT, - GP_2_21_IN, GP_2_21_OUT, - GP_2_20_IN, GP_2_20_OUT, - GP_2_19_IN, GP_2_19_OUT, - GP_2_18_IN, GP_2_18_OUT, - GP_2_17_IN, GP_2_17_OUT, - GP_2_16_IN, GP_2_16_OUT, - GP_2_15_IN, GP_2_15_OUT, - GP_2_14_IN, GP_2_14_OUT, - GP_2_13_IN, GP_2_13_OUT, - GP_2_12_IN, GP_2_12_OUT, - GP_2_11_IN, GP_2_11_OUT, - GP_2_10_IN, GP_2_10_OUT, - GP_2_9_IN, GP_2_9_OUT, - GP_2_8_IN, GP_2_8_OUT, - GP_2_7_IN, GP_2_7_OUT, - GP_2_6_IN, GP_2_6_OUT, - GP_2_5_IN, GP_2_5_OUT, - GP_2_4_IN, GP_2_4_OUT, - GP_2_3_IN, GP_2_3_OUT, - GP_2_2_IN, GP_2_2_OUT, - GP_2_1_IN, GP_2_1_OUT, - GP_2_0_IN, GP_2_0_OUT, } - }, - { PINMUX_CFG_REG("INOUTSEL3", 0xE6053004, 32, 1) { GP_INOUTSEL(3) } }, - { PINMUX_CFG_REG("INOUTSEL4", 0xE6054004, 32, 1) { GP_INOUTSEL(4) } }, - { PINMUX_CFG_REG("INOUTSEL5", 0xE6055004, 32, 1) { GP_INOUTSEL(5) } }, - { }, -}; - -static struct pinmux_data_reg pinmux_data_regs[] = { - { PINMUX_DATA_REG("INDT0", 0xE6050008, 32) { GP_INDT(0) } }, - { PINMUX_DATA_REG("INDT1", 0xE6051008, 32) { - 0, 0, GP_1_29_DATA, GP_1_28_DATA, - GP_1_27_DATA, GP_1_26_DATA, GP_1_25_DATA, GP_1_24_DATA, - GP_1_23_DATA, GP_1_22_DATA, GP_1_21_DATA, GP_1_20_DATA, - GP_1_19_DATA, GP_1_18_DATA, GP_1_17_DATA, GP_1_16_DATA, - GP_1_15_DATA, GP_1_14_DATA, GP_1_13_DATA, GP_1_12_DATA, - GP_1_11_DATA, GP_1_10_DATA, GP_1_9_DATA, GP_1_8_DATA, - GP_1_7_DATA, GP_1_6_DATA, GP_1_5_DATA, GP_1_4_DATA, - GP_1_3_DATA, GP_1_2_DATA, GP_1_1_DATA, GP_1_0_DATA } - }, - { PINMUX_DATA_REG("INDT2", 0xE6052008, 32) { - 0, 0, GP_2_29_DATA, GP_2_28_DATA, - GP_2_27_DATA, GP_2_26_DATA, GP_2_25_DATA, GP_2_24_DATA, - GP_2_23_DATA, GP_2_22_DATA, GP_2_21_DATA, GP_2_20_DATA, - GP_2_19_DATA, GP_2_18_DATA, GP_2_17_DATA, GP_2_16_DATA, - GP_2_15_DATA, GP_2_14_DATA, GP_2_13_DATA, GP_2_12_DATA, - GP_2_11_DATA, GP_2_10_DATA, GP_2_9_DATA, GP_2_8_DATA, - GP_2_7_DATA, GP_2_6_DATA, GP_2_5_DATA, GP_2_4_DATA, - GP_2_3_DATA, GP_2_2_DATA, GP_2_1_DATA, GP_2_0_DATA } - }, - { PINMUX_DATA_REG("INDT3", 0xE6053008, 32) { GP_INDT(3) } }, - { PINMUX_DATA_REG("INDT4", 0xE6054008, 32) { GP_INDT(4) } }, - { PINMUX_DATA_REG("INDT5", 0xE6055008, 32) { GP_INDT(5) } }, - { }, -}; - -static struct pinmux_info r8a7790_pinmux_info = { - .name = "r8a7790_pfc", - - .unlock_reg = 0xe6060000, /* PMMR */ - - .reserved_id = PINMUX_RESERVED, - .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, - .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, - .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, - .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, - .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, - - .first_gpio = GPIO_GP_0_0, - .last_gpio = GPIO_FN_MOUT0, - - .gpios = pinmux_gpios, - .cfg_regs = pinmux_config_regs, - .data_regs = pinmux_data_regs, - - .gpio_data = pinmux_data, - .gpio_data_size = ARRAY_SIZE(pinmux_data), -}; - -void r8a7790_pinmux_init(void) -{ - register_pinmux(&r8a7790_pinmux_info); -} diff --git a/arch/arm/mach-rmobile/pfc-r8a7791.c b/arch/arm/mach-rmobile/pfc-r8a7791.c deleted file mode 100644 index 68f5578094c..00000000000 --- a/arch/arm/mach-rmobile/pfc-r8a7791.c +++ /dev/null @@ -1,1116 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * arch/arm/cpu/armv7/rmobile/pfc-r8a7791.c - * - * Copyright (C) 2013 Renesas Electronics Corporation - */ - -#include <common.h> -#include <sh_pfc.h> -#include <asm/gpio.h> -#include "pfc-r8a7790.h" - -enum { - PINMUX_RESERVED = 0, - - PINMUX_DATA_BEGIN, - GP_ALL(DATA), - PINMUX_DATA_END, - - PINMUX_INPUT_BEGIN, - GP_ALL(IN), - PINMUX_INPUT_END, - - PINMUX_OUTPUT_BEGIN, - GP_ALL(OUT), - PINMUX_OUTPUT_END, - - PINMUX_FUNCTION_BEGIN, - GP_ALL(FN), - - /* GPSR0 */ - FN_IP0_0, FN_IP0_1, FN_IP0_2, FN_IP0_3, FN_IP0_4, FN_IP0_5, - FN_IP0_6, FN_IP0_7, FN_IP0_8, FN_IP0_9, FN_IP0_10, FN_IP0_11, - FN_IP0_12, FN_IP0_13, FN_IP0_14, FN_IP0_15, FN_IP0_18_16, FN_IP0_20_19, - FN_IP0_22_21, FN_IP0_24_23, FN_IP0_26_25, FN_IP0_28_27, FN_IP0_30_29, - FN_IP1_1_0, FN_IP1_3_2, FN_IP1_5_4, FN_IP1_7_6, FN_IP1_10_8, - FN_IP1_13_11, FN_IP1_16_14, FN_IP1_19_17, FN_IP1_22_20, - - /* GPSR1 */ - FN_IP1_25_23, FN_IP1_28_26, FN_IP1_31_29, FN_IP2_2_0, FN_IP2_4_3, - FN_IP2_6_5, FN_IP2_9_7, FN_IP2_12_10, FN_IP2_15_13, FN_IP2_18_16, - FN_IP2_20_19, FN_IP2_22_21, FN_EX_CS0_N, FN_IP2_24_23, FN_IP2_26_25, - FN_IP2_29_27, FN_IP3_2_0, FN_IP3_5_3, FN_IP3_8_6, FN_RD_N, - FN_IP3_11_9, FN_IP3_13_12, FN_IP3_15_14 , FN_IP3_17_16 , FN_IP3_19_18, - FN_IP3_21_20, - - /* GPSR2 */ - FN_IP3_27_25, FN_IP3_30_28, FN_IP4_1_0, FN_IP4_4_2, FN_IP4_7_5, - FN_IP4_9_8, FN_IP4_12_10, FN_IP4_15_13, FN_IP4_18_16, FN_IP4_19, - FN_IP4_20, FN_IP4_21, FN_IP4_23_22, FN_IP4_25_24, FN_IP4_27_26, - FN_IP4_30_28, FN_IP5_2_0, FN_IP5_5_3, FN_IP5_8_6, FN_IP5_11_9, - FN_IP5_14_12, FN_IP5_16_15, FN_IP5_19_17, FN_IP5_21_20, FN_IP5_23_22, - FN_IP5_25_24, FN_IP5_28_26, FN_IP5_31_29, FN_AUDIO_CLKA, FN_IP6_2_0, - FN_IP6_5_3, FN_IP6_7_6, - - /* GPSR3 */ - FN_IP7_5_3, FN_IP7_8_6, FN_IP7_10_9, FN_IP7_12_11, FN_IP7_14_13, - FN_IP7_16_15, FN_IP7_18_17, FN_IP7_20_19, FN_IP7_23_21, FN_IP7_26_24, - FN_IP7_29_27, FN_IP8_2_0, FN_IP8_5_3, FN_IP8_8_6, FN_IP8_11_9, - FN_IP8_14_12, FN_IP8_17_15, FN_IP8_20_18, FN_IP8_23_21, FN_IP8_25_24, - FN_IP8_27_26, FN_IP8_30_28, FN_IP9_2_0, FN_IP9_5_3, FN_IP9_6, FN_IP9_7, - FN_IP9_10_8, FN_IP9_11, FN_IP9_12, FN_IP9_15_13, FN_IP9_16, - FN_IP9_18_17, - - /* GPSR4 */ - FN_VI0_CLK, FN_IP9_20_19, FN_IP9_22_21, FN_IP9_24_23, FN_IP9_26_25, - FN_VI0_DATA0_VI0_B0, FN_VI0_DATA0_VI0_B1, FN_VI0_DATA0_VI0_B2, - FN_IP9_28_27, FN_VI0_DATA0_VI0_B4, FN_VI0_DATA0_VI0_B5, - FN_VI0_DATA0_VI0_B6, FN_VI0_DATA0_VI0_B7, FN_IP9_31_29, FN_IP10_2_0, - FN_IP10_5_3, FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_16_15, - FN_IP10_18_17, FN_IP10_21_19, FN_IP10_24_22, FN_IP10_26_25, - FN_IP10_28_27, FN_IP10_31_29, FN_IP11_2_0, FN_IP11_5_3, FN_IP11_8_6, - FN_IP15_1_0, FN_IP15_3_2, FN_IP15_5_4, - - /* GPSR5 */ - FN_IP11_11_9, FN_IP11_14_12, FN_IP11_16_15, FN_IP11_18_17, FN_IP11_19, - FN_IP11_20, FN_IP11_21, FN_IP11_22, FN_IP11_23, FN_IP11_24, - FN_IP11_25, FN_IP11_26, FN_IP11_27, FN_IP11_29_28, FN_IP11_31_30, - FN_IP12_1_0, FN_IP12_3_2, FN_IP12_6_4, FN_IP12_9_7, FN_IP12_12_10, - FN_IP12_15_13, FN_IP12_17_16, FN_IP12_19_18, FN_IP12_21_20, - FN_IP12_23_22, FN_IP12_26_24, FN_IP12_29_27, FN_IP13_2_0, FN_IP13_4_3, - FN_IP13_6_5, FN_IP13_9_7, FN_IP3_24_22, - - /* GPSR6 */ - FN_IP13_10, FN_IP13_11, FN_IP13_12, FN_IP13_13, FN_IP13_14, - FN_IP13_15, FN_IP13_18_16, FN_IP13_21_19, FN_IP13_22, FN_IP13_24_23, - FN_IP13_25, FN_IP13_26, FN_IP13_27, FN_IP13_30_28, FN_IP14_1_0, - FN_IP14_2, FN_IP14_3, FN_IP14_4, FN_IP14_5, FN_IP14_6, FN_IP14_7, - FN_IP14_10_8, FN_IP14_13_11, FN_IP14_16_14, FN_IP14_19_17, - FN_IP14_22_20, FN_IP14_25_23, FN_IP14_28_26, FN_IP14_31_29, - - /* GPSR7 */ - FN_IP15_17_15, FN_IP15_20_18, FN_IP15_23_21, FN_IP15_26_24, - FN_IP15_29_27, FN_IP16_2_0, FN_IP16_5_3, FN_IP16_7_6, FN_IP16_9_8, - FN_IP16_11_10, FN_IP6_9_8, FN_IP6_11_10, FN_IP6_13_12, FN_IP6_15_14, - FN_IP6_18_16, FN_IP6_20_19, FN_IP6_23_21, FN_IP6_26_24, FN_IP6_29_27, - FN_IP7_2_0, FN_IP15_8_6, FN_IP15_11_9, FN_IP15_14_12, - FN_USB0_PWEN, FN_USB0_OVC, FN_USB1_PWEN, - - /* IPSR0 - IPSR10 */ - - /* IPSR11 */ - FN_VI0_R5, FN_VI2_DATA6, FN_GLO_SDATA_B, FN_RX0_C, FN_SDA1_D, - FN_VI0_R6, FN_VI2_DATA7, FN_GLO_SS_B, FN_TX1_C, FN_SCL4_B, - FN_VI0_R7, FN_GLO_RFON_B, FN_RX1_C, FN_CAN0_RX_E, - FN_SDA4_B, FN_HRX1_D, FN_SCIFB0_RXD_D, - FN_VI1_HSYNC_N, FN_AVB_RXD0, FN_TS_SDATA0_B, FN_TX4_B, FN_SCIFA4_TXD_B, - FN_VI1_VSYNC_N, FN_AVB_RXD1, FN_TS_SCK0_B, FN_RX4_B, FN_SCIFA4_RXD_B, - FN_VI1_CLKENB, FN_AVB_RXD2, FN_TS_SDEN0_B, - FN_VI1_FIELD, FN_AVB_RXD3, FN_TS_SPSYNC0_B, - FN_VI1_CLK, FN_AVB_RXD4, FN_VI1_DATA0, FN_AVB_RXD5, - FN_VI1_DATA1, FN_AVB_RXD6, FN_VI1_DATA2, FN_AVB_RXD7, - FN_VI1_DATA3, FN_AVB_RX_ER, FN_VI1_DATA4, FN_AVB_MDIO, - FN_VI1_DATA5, FN_AVB_RX_DV, FN_VI1_DATA6, FN_AVB_MAGIC, - FN_VI1_DATA7, FN_AVB_MDC, - FN_ETH_MDIO, FN_AVB_RX_CLK, FN_SCL2_C, - FN_ETH_CRS_DV, FN_AVB_LINK, FN_SDA2_C, - - /* IPSR12 */ - FN_ETH_RX_ER, FN_AVB_CRS, FN_SCL3, FN_SCL7, - FN_ETH_RXD0, FN_AVB_PHY_INT, FN_SDA3, FN_SDA7, - FN_ETH_RXD1, FN_AVB_GTXREFCLK, FN_CAN0_TX_C, - FN_SCL2_D, FN_MSIOF1_RXD_E, - FN_ETH_LINK, FN_AVB_TXD0, FN_CAN0_RX_C, FN_SDA2_D, FN_MSIOF1_SCK_E, - FN_ETH_REFCLK, FN_AVB_TXD1, FN_SCIFA3_RXD_B, - FN_CAN1_RX_C, FN_MSIOF1_SYNC_E, - FN_ETH_TXD1, FN_AVB_TXD2, FN_SCIFA3_TXD_B, - FN_CAN1_TX_C, FN_MSIOF1_TXD_E, - FN_ETH_TX_EN, FN_AVB_TXD3, FN_TCLK1_B, FN_CAN_CLK_B, - FN_ETH_MAGIC, FN_AVB_TXD4, FN_IETX_C, - FN_ETH_TXD0, FN_AVB_TXD5, FN_IECLK_C, - FN_ETH_MDC, FN_AVB_TXD6, FN_IERX_C, - FN_STP_IVCXO27_0, FN_AVB_TXD7, FN_SCIFB2_TXD_D, - FN_ADIDATA_B, FN_MSIOF0_SYNC_C, - FN_STP_ISCLK_0, FN_AVB_TX_EN, FN_SCIFB2_RXD_D, - FN_ADICS_SAMP_B, FN_MSIOF0_SCK_C, - - /* IPSR13 */ - /* MOD_SEL */ - FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3, - FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2, FN_SEL_SCIFB_3, - FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, FN_SEL_SCIFB2_2, FN_SEL_SCIFB2_3, - FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3, - FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, - FN_SEL_SSI9_0, FN_SEL_SSI9_1, - FN_SEL_SCFA_0, FN_SEL_SCFA_1, - FN_SEL_QSP_0, FN_SEL_QSP_1, - FN_SEL_SSI7_0, FN_SEL_SSI7_1, - FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, FN_SEL_HSCIF1_2, FN_SEL_HSCIF1_3, - FN_SEL_HSCIF1_4, - FN_SEL_VI1_0, FN_SEL_VI1_1, FN_SEL_VI1_2, - FN_SEL_TMU1_0, FN_SEL_TMU1_1, - FN_SEL_LBS_0, FN_SEL_LBS_1, FN_SEL_LBS_2, FN_SEL_LBS_3, - FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3, - FN_SEL_SOF0_0, FN_SEL_SOF0_1, FN_SEL_SOF0_2, - - /* MOD_SEL2 */ - FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, FN_SEL_SCIF0_3, - FN_SEL_SCIF0_4, - FN_SEL_SCIF_0, FN_SEL_SCIF_1, - FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3, - FN_SEL_CAN0_4, FN_SEL_CAN0_5, - FN_SEL_CAN1_0, FN_SEL_CAN1_1, FN_SEL_CAN1_2, FN_SEL_CAN1_3, - FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1, - FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2, - FN_SEL_ADG_0, FN_SEL_ADG_1, - FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3, FN_SEL_FM_4, - FN_SEL_SCIFA5_0, FN_SEL_SCIFA5_1, FN_SEL_SCIFA5_2, - FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, FN_SEL_GPS_3, - FN_SEL_SCIFA4_0, FN_SEL_SCIFA4_1, FN_SEL_SCIFA4_2, - FN_SEL_SCIFA3_0, FN_SEL_SCIFA3_1, FN_SEL_SCIFA3_2, - FN_SEL_SIM_0, FN_SEL_SIM_1, - FN_SEL_SSI8_0, FN_SEL_SSI8_1, - - /* MOD_SEL3 */ - FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1, FN_SEL_HSCIF2_2, FN_SEL_HSCIF2_3, - FN_SEL_CANCLK_0, FN_SEL_CANCLK_1, FN_SEL_CANCLK_2, FN_SEL_CANCLK_3, - FN_SEL_IIC8_0, FN_SEL_IIC8_1, FN_SEL_IIC8_2, - FN_SEL_IIC7_0, FN_SEL_IIC7_1, FN_SEL_IIC7_2, - FN_SEL_IIC4_0, FN_SEL_IIC4_1, FN_SEL_IIC4_2, - FN_SEL_IIC3_0, FN_SEL_IIC3_1, FN_SEL_IIC3_2, FN_SEL_IIC3_3, - FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3, - FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, - FN_SEL_MMC_0, FN_SEL_MMC_1, - FN_SEL_SCIF5_0, FN_SEL_SCIF5_1, - FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3, - FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2, FN_SEL_IIC1_3, - FN_SEL_IIC1_4, - FN_SEL_IIC0_0, FN_SEL_IIC0_1, FN_SEL_IIC0_2, - - /* MOD_SEL4 */ - FN_SEL_SOF1_0, FN_SEL_SOF1_1, FN_SEL_SOF1_2, FN_SEL_SOF1_3, - FN_SEL_SOF1_4, - FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2, - FN_SEL_DIS_0, FN_SEL_DIS_1, FN_SEL_DIS_2, - FN_SEL_RAD_0, FN_SEL_RAD_1, - FN_SEL_RCN_0, FN_SEL_RCN_1, - FN_SEL_RSP_0, FN_SEL_RSP_1, - FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, FN_SEL_SCIF2_3, - FN_SEL_SCIF2_4, - FN_SEL_SOF2_0, FN_SEL_SOF2_1, FN_SEL_SOF2_2, FN_SEL_SOF2_3, - FN_SEL_SOF2_4, - FN_SEL_SSI1_0, FN_SEL_SSI1_1, - FN_SEL_SSI0_0, FN_SEL_SSI0_1, - FN_SEL_SSP_0, FN_SEL_SSP_1, FN_SEL_SSP_2, - PINMUX_FUNCTION_END, - - PINMUX_MARK_BEGIN, - - EX_CS0_N_MARK, RD_N_MARK, - - AUDIO_CLKA_MARK, - - VI0_CLK_MARK, VI0_DATA0_VI0_B0_MARK, VI0_DATA0_VI0_B1_MARK, - VI0_DATA0_VI0_B2_MARK, VI0_DATA0_VI0_B4_MARK, VI0_DATA0_VI0_B5_MARK, - VI0_DATA0_VI0_B6_MARK, VI0_DATA0_VI0_B7_MARK, - - USB0_PWEN_MARK, USB0_OVC_MARK, USB1_PWEN_MARK, - - /* IPSR0 IPSR10 */ - /* IPSR11 */ - VI0_R5_MARK, VI2_DATA6_MARK, GLO_SDATA_B_MARK, RX0_C_MARK, SDA1_D_MARK, - VI0_R6_MARK, VI2_DATA7_MARK, GLO_SS_B_MARK, TX1_C_MARK, SCL4_B_MARK, - VI0_R7_MARK, GLO_RFON_B_MARK, RX1_C_MARK, CAN0_RX_E_MARK, - SDA4_B_MARK, _MARK, HRX1_D_MARK, SCIFB0_RXD_D_MARK, - VI1_HSYNC_N_MARK, AVB_RXD0_MARK, TS_SDATA0_B_MARK, - TX4_B_MARK, SCIFA4_TXD_B_MARK, - VI1_VSYNC_N_MARK, AVB_RXD1_MARK, TS_SCK0_B_MARK, - RX4_B_MARK, SCIFA4_RXD_B_MARK, - VI1_CLKENB_MARK, AVB_RXD2_MARK, TS_SDEN0_B_MARK, - VI1_FIELD_MARK, AVB_RXD3_MARK, TS_SPSYNC0_B_MARK, - VI1_CLK_MARK, AVB_RXD4_MARK, VI1_DATA0_MARK, AVB_RXD5_MARK, - VI1_DATA1_MARK, AVB_RXD6_MARK, VI1_DATA2_MARK, AVB_RXD7_MARK, - VI1_DATA3_MARK, AVB_RX_ER_MARK, VI1_DATA4_MARK, AVB_MDIO_MARK, - VI1_DATA5_MARK, AVB_RX_DV_MARK, VI1_DATA6_MARK, AVB_MAGIC_MARK, - VI1_DATA7_MARK, AVB_MDC_MARK, - ETH_MDIO_MARK, AVB_RX_CLK_MARK, SCL2_C_MARK, - ETH_CRS_DV_MARK, AVB_LINK_MARK, SDA2_C_MARK, - - /* IPSR12 */ - ETH_RX_ER_MARK, AVB_CRS_MARK, SCL3_MARK, SCL7_MARK, - ETH_RXD0_MARK, AVB_PHY_INT_MARK, SDA3_MARK, SDA7_MARK, - ETH_RXD1_MARK, AVB_GTXREFCLK_MARK, CAN0_TX_C_MARK, - SCL2_D_MARK, MSIOF1_RXD_E_MARK, - ETH_LINK_MARK, AVB_TXD0_MARK, CAN0_RX_C_MARK, - SDA2_D_MARK, MSIOF1_SCK_E_MARK, - ETH_REFCLK_MARK, AVB_TXD1_MARK, SCIFA3_RXD_B_MARK, - CAN1_RX_C_MARK, MSIOF1_SYNC_E_MARK, - ETH_TXD1_MARK, AVB_TXD2_MARK, SCIFA3_TXD_B_MARK, - CAN1_TX_C_MARK, MSIOF1_TXD_E_MARK, - ETH_TX_EN_MARK, AVB_TXD3_MARK, TCLK1_B_MARK, CAN_CLK_B_MARK, - ETH_MAGIC_MARK, AVB_TXD4_MARK, IETX_C_MARK, - ETH_TXD0_MARK, AVB_TXD5_MARK, IECLK_C_MARK, - ETH_MDC_MARK, AVB_TXD6_MARK, IERX_C_MARK, - STP_IVCXO27_0_MARK, AVB_TXD7_MARK, SCIFB2_TXD_D_MARK, - ADIDATA_B_MARK, MSIOF0_SYNC_C_MARK, - STP_ISCLK_0_MARK, AVB_TX_EN_MARK, SCIFB2_RXD_D_MARK, - ADICS_SAMP_B_MARK, MSIOF0_SCK_C_MARK, - - /* IPSR13 */ - PINMUX_MARK_END, -}; - -static pinmux_enum_t pinmux_data[] = { - PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */ - - /* OTHER IPSR0 - IPSR10 */ - /* IPSR11 */ - PINMUX_IPSR_DATA(IP11_2_0, VI0_R5), - PINMUX_IPSR_DATA(IP11_2_0, VI2_DATA6), - PINMUX_IPSR_MODSEL_DATA(IP11_2_0, GLO_SDATA_B, SEL_GPS_1), - PINMUX_IPSR_MODSEL_DATA(IP11_2_0, RX0_C, SEL_SCIF0_2), - PINMUX_IPSR_MODSEL_DATA(IP11_2_0, SDA1_D, SEL_IIC1_3), - PINMUX_IPSR_DATA(IP11_5_3, VI0_R6), - PINMUX_IPSR_DATA(IP11_5_3, VI2_DATA7), - PINMUX_IPSR_MODSEL_DATA(IP11_5_3, GLO_SS_B, SEL_GPS_1), - PINMUX_IPSR_MODSEL_DATA(IP11_5_3, TX1_C, SEL_SCIF1_2), - PINMUX_IPSR_MODSEL_DATA(IP11_5_3, SCL4_B, SEL_IIC4_1), - PINMUX_IPSR_DATA(IP11_8_6, VI0_R7), - PINMUX_IPSR_MODSEL_DATA(IP11_8_6, GLO_RFON_B, SEL_GPS_1), - PINMUX_IPSR_MODSEL_DATA(IP11_8_6, RX1_C, SEL_SCIF1_2), - PINMUX_IPSR_MODSEL_DATA(IP11_8_6, CAN0_RX_E, SEL_CAN0_4), - PINMUX_IPSR_MODSEL_DATA(IP11_8_6, SDA4_B, SEL_IIC4_1), - PINMUX_IPSR_MODSEL_DATA(IP11_8_6, HRX1_D, SEL_HSCIF1_3), - PINMUX_IPSR_MODSEL_DATA(IP11_8_6, SCIFB0_RXD_D, SEL_SCIFB_3), - PINMUX_IPSR_MODSEL_DATA(IP11_11_9, VI1_HSYNC_N, SEL_VI1_0), - PINMUX_IPSR_DATA(IP11_11_9, AVB_RXD0), - PINMUX_IPSR_MODSEL_DATA(IP11_11_9, TS_SDATA0_B, SEL_TSIF0_1), - PINMUX_IPSR_MODSEL_DATA(IP11_11_9, TX4_B, SEL_SCIF4_1), - PINMUX_IPSR_MODSEL_DATA(IP11_11_9, SCIFA4_TXD_B, SEL_SCIFA4_1), - PINMUX_IPSR_MODSEL_DATA(IP11_14_12, VI1_VSYNC_N, SEL_VI1_0), - PINMUX_IPSR_DATA(IP11_14_12, AVB_RXD1), - PINMUX_IPSR_MODSEL_DATA(IP11_14_12, TS_SCK0_B, SEL_TSIF0_1), - PINMUX_IPSR_MODSEL_DATA(IP11_14_12, RX4_B, SEL_SCIF4_1), - PINMUX_IPSR_MODSEL_DATA(IP11_14_12, SCIFA4_RXD_B, SEL_SCIFA4_1), - PINMUX_IPSR_MODSEL_DATA(IP11_16_15, VI1_CLKENB, SEL_VI1_0), - PINMUX_IPSR_DATA(IP11_16_15, AVB_RXD2), - PINMUX_IPSR_MODSEL_DATA(IP11_16_15, TS_SDEN0_B, SEL_TSIF0_1), - PINMUX_IPSR_MODSEL_DATA(IP11_18_17, VI1_FIELD, SEL_VI1_0), - PINMUX_IPSR_DATA(IP11_18_17, AVB_RXD3), - PINMUX_IPSR_MODSEL_DATA(IP11_18_17, TS_SPSYNC0_B, SEL_TSIF0_1), - PINMUX_IPSR_MODSEL_DATA(IP11_19, VI1_CLK, SEL_VI1_0), - PINMUX_IPSR_DATA(IP11_19, AVB_RXD4), - PINMUX_IPSR_MODSEL_DATA(IP11_20, VI1_DATA0, SEL_VI1_0), - PINMUX_IPSR_DATA(IP11_20, AVB_RXD5), - PINMUX_IPSR_MODSEL_DATA(IP11_21, VI1_DATA1, SEL_VI1_0), - PINMUX_IPSR_DATA(IP11_21, AVB_RXD6), - PINMUX_IPSR_MODSEL_DATA(IP11_22, VI1_DATA2, SEL_VI1_0), - PINMUX_IPSR_DATA(IP11_22, AVB_RXD7), - PINMUX_IPSR_MODSEL_DATA(IP11_23, VI1_DATA3, SEL_VI1_0), - PINMUX_IPSR_DATA(IP11_23, AVB_RX_ER), - PINMUX_IPSR_MODSEL_DATA(IP11_24, VI1_DATA4, SEL_VI1_0), - PINMUX_IPSR_DATA(IP11_24, AVB_MDIO), - PINMUX_IPSR_MODSEL_DATA(IP11_25, VI1_DATA5, SEL_VI1_0), - PINMUX_IPSR_DATA(IP11_25, AVB_RX_DV), - PINMUX_IPSR_MODSEL_DATA(IP11_26, VI1_DATA6, SEL_VI1_0), - PINMUX_IPSR_DATA(IP11_26, AVB_MAGIC), - PINMUX_IPSR_MODSEL_DATA(IP11_27, VI1_DATA7, SEL_VI1_0), - PINMUX_IPSR_DATA(IP11_27, AVB_MDC), - PINMUX_IPSR_DATA(IP11_29_28, ETH_MDIO), - PINMUX_IPSR_DATA(IP11_29_28, AVB_RX_CLK), - PINMUX_IPSR_MODSEL_DATA(IP11_29_28, SCL2_C, SEL_IIC2_2), - PINMUX_IPSR_DATA(IP11_31_30, ETH_CRS_DV), - PINMUX_IPSR_DATA(IP11_31_30, AVB_LINK), - PINMUX_IPSR_MODSEL_DATA(IP11_31_30, SDA2_C, SEL_IIC2_2), - - /* IPSR12 */ - PINMUX_IPSR_DATA(IP12_1_0, ETH_RX_ER), - PINMUX_IPSR_DATA(IP12_1_0, AVB_CRS), - PINMUX_IPSR_MODSEL_DATA(IP12_1_0, SCL3, SEL_IIC3_0), - PINMUX_IPSR_MODSEL_DATA(IP12_1_0, SCL7, SEL_IIC7_0), - PINMUX_IPSR_DATA(IP12_3_2, ETH_RXD0), - PINMUX_IPSR_DATA(IP12_3_2, AVB_PHY_INT), - PINMUX_IPSR_MODSEL_DATA(IP12_3_2, SDA3, SEL_IIC3_0), - PINMUX_IPSR_MODSEL_DATA(IP12_3_2, SDA7, SEL_IIC7_0), - PINMUX_IPSR_DATA(IP12_6_4, ETH_RXD1), - PINMUX_IPSR_DATA(IP12_6_4, AVB_GTXREFCLK), - PINMUX_IPSR_MODSEL_DATA(IP12_6_4, CAN0_TX_C, SEL_CAN0_2), - PINMUX_IPSR_MODSEL_DATA(IP12_6_4, SCL2_D, SEL_IIC2_3), - PINMUX_IPSR_MODSEL_DATA(IP12_6_4, MSIOF1_RXD_E, SEL_SOF1_4), - PINMUX_IPSR_DATA(IP12_9_7, ETH_LINK), - PINMUX_IPSR_DATA(IP12_9_7, AVB_TXD0), - PINMUX_IPSR_MODSEL_DATA(IP12_9_7, CAN0_RX_C, SEL_CAN0_2), - PINMUX_IPSR_MODSEL_DATA(IP12_9_7, SDA2_D, SEL_IIC2_3), - PINMUX_IPSR_MODSEL_DATA(IP12_9_7, MSIOF1_SCK_E, SEL_SOF1_4), - PINMUX_IPSR_DATA(IP12_12_10, ETH_REFCLK), - PINMUX_IPSR_DATA(IP12_12_10, AVB_TXD1), - PINMUX_IPSR_MODSEL_DATA(IP12_12_10, SCIFA3_RXD_B, SEL_SCIFA3_1), - PINMUX_IPSR_MODSEL_DATA(IP12_12_10, CAN1_RX_C, SEL_CAN1_2), - PINMUX_IPSR_MODSEL_DATA(IP12_12_10, MSIOF1_SYNC_E, SEL_SOF1_4), - PINMUX_IPSR_DATA(IP12_15_13, ETH_TXD1), - PINMUX_IPSR_DATA(IP12_15_13, AVB_TXD2), - PINMUX_IPSR_MODSEL_DATA(IP12_15_13, SCIFA3_TXD_B, SEL_SCIFA3_1), - PINMUX_IPSR_MODSEL_DATA(IP12_15_13, CAN1_TX_C, SEL_CAN1_2), - PINMUX_IPSR_MODSEL_DATA(IP12_15_13, MSIOF1_TXD_E, SEL_SOF1_4), - PINMUX_IPSR_DATA(IP12_17_16, ETH_TX_EN), - PINMUX_IPSR_DATA(IP12_17_16, AVB_TXD3), - PINMUX_IPSR_MODSEL_DATA(IP12_17_16, TCLK1_B, SEL_TMU1_0), - PINMUX_IPSR_MODSEL_DATA(IP12_17_16, CAN_CLK_B, SEL_CANCLK_1), - PINMUX_IPSR_DATA(IP12_19_18, ETH_MAGIC), - PINMUX_IPSR_DATA(IP12_19_18, AVB_TXD4), - PINMUX_IPSR_MODSEL_DATA(IP12_19_18, IETX_C, SEL_IEB_2), - PINMUX_IPSR_DATA(IP12_21_20, ETH_TXD0), - PINMUX_IPSR_DATA(IP12_21_20, AVB_TXD5), - PINMUX_IPSR_MODSEL_DATA(IP12_21_20, IECLK_C, SEL_IEB_2), - PINMUX_IPSR_DATA(IP12_23_22, ETH_MDC), - PINMUX_IPSR_DATA(IP12_23_22, AVB_TXD6), - PINMUX_IPSR_MODSEL_DATA(IP12_23_22, IERX_C, SEL_IEB_2), - PINMUX_IPSR_MODSEL_DATA(IP12_26_24, STP_IVCXO27_0, SEL_SSP_0), - PINMUX_IPSR_DATA(IP12_26_24, AVB_TXD7), - PINMUX_IPSR_MODSEL_DATA(IP12_26_24, SCIFB2_TXD_D, SEL_SCIFB2_3), - PINMUX_IPSR_MODSEL_DATA(IP12_26_24, ADIDATA_B, SEL_RAD_1), - PINMUX_IPSR_MODSEL_DATA(IP12_26_24, MSIOF0_SYNC_C, SEL_SOF0_2), - PINMUX_IPSR_MODSEL_DATA(IP12_29_27, STP_ISCLK_0, SEL_SSP_0), - PINMUX_IPSR_DATA(IP12_29_27, AVB_TX_EN), - PINMUX_IPSR_MODSEL_DATA(IP12_29_27, SCIFB2_RXD_D, SEL_SCIFB2_3), - PINMUX_IPSR_MODSEL_DATA(IP12_29_27, ADICS_SAMP_B, SEL_RAD_1), - PINMUX_IPSR_MODSEL_DATA(IP12_29_27, MSIOF0_SCK_C, SEL_SOF0_2), - - /* IPSR13 - IPSR16 */ -}; - -static struct pinmux_gpio pinmux_gpios[] = { - PINMUX_GPIO_GP_ALL(), - - /* OTHER, IPSR0 - IPSR10 */ - /* IPSR11 */ - GPIO_FN(VI0_R5), GPIO_FN(VI2_DATA6), GPIO_FN(GLO_SDATA_B), - GPIO_FN(RX0_C), GPIO_FN(SDA1_D), - GPIO_FN(VI0_R6), GPIO_FN(VI2_DATA7), - GPIO_FN(GLO_SS_B), GPIO_FN(TX1_C), GPIO_FN(SCL4_B), - GPIO_FN(VI0_R7), GPIO_FN(GLO_RFON_B), - GPIO_FN(RX1_C), GPIO_FN(CAN0_RX_E), - GPIO_FN(SDA4_B), GPIO_FN(HRX1_D), GPIO_FN(SCIFB0_RXD_D), - GPIO_FN(VI1_HSYNC_N), GPIO_FN(AVB_RXD0), GPIO_FN(TS_SDATA0_B), - GPIO_FN(TX4_B), GPIO_FN(SCIFA4_TXD_B), - GPIO_FN(VI1_VSYNC_N), GPIO_FN(AVB_RXD1), GPIO_FN(TS_SCK0_B), - GPIO_FN(RX4_B), GPIO_FN(SCIFA4_RXD_B), - GPIO_FN(VI1_CLKENB), GPIO_FN(AVB_RXD2), GPIO_FN(TS_SDEN0_B), - GPIO_FN(VI1_FIELD), GPIO_FN(AVB_RXD3), GPIO_FN(TS_SPSYNC0_B), - GPIO_FN(VI1_CLK), GPIO_FN(AVB_RXD4), - GPIO_FN(VI1_DATA0), GPIO_FN(AVB_RXD5), - GPIO_FN(VI1_DATA1), GPIO_FN(AVB_RXD6), - GPIO_FN(VI1_DATA2), GPIO_FN(AVB_RXD7), - GPIO_FN(VI1_DATA3), GPIO_FN(AVB_RX_ER), - GPIO_FN(VI1_DATA4), GPIO_FN(AVB_MDIO), - GPIO_FN(VI1_DATA5), GPIO_FN(AVB_RX_DV), - GPIO_FN(VI1_DATA6), GPIO_FN(AVB_MAGIC), - GPIO_FN(VI1_DATA7), GPIO_FN(AVB_MDC), - GPIO_FN(ETH_MDIO), GPIO_FN(AVB_RX_CLK), GPIO_FN(SCL2_C), - GPIO_FN(ETH_CRS_DV), GPIO_FN(AVB_LINK), GPIO_FN(SDA2_C), - - /* IPSR12 */ - GPIO_FN(ETH_RX_ER), GPIO_FN(AVB_CRS), GPIO_FN(SCL3), GPIO_FN(SCL7), - GPIO_FN(ETH_RXD0), GPIO_FN(AVB_PHY_INT), GPIO_FN(SDA3), GPIO_FN(SDA7), - GPIO_FN(ETH_RXD1), GPIO_FN(AVB_GTXREFCLK), GPIO_FN(CAN0_TX_C), - GPIO_FN(SCL2_D), GPIO_FN(MSIOF1_RXD_E), - GPIO_FN(ETH_LINK), GPIO_FN(AVB_TXD0), GPIO_FN(CAN0_RX_C), - GPIO_FN(SDA2_D), GPIO_FN(MSIOF1_SCK_E), - GPIO_FN(ETH_REFCLK), GPIO_FN(AVB_TXD1), GPIO_FN(SCIFA3_RXD_B), - GPIO_FN(CAN1_RX_C), GPIO_FN(MSIOF1_SYNC_E), - GPIO_FN(ETH_TXD1), GPIO_FN(AVB_TXD2), GPIO_FN(SCIFA3_TXD_B), - GPIO_FN(CAN1_TX_C), GPIO_FN(MSIOF1_TXD_E), - GPIO_FN(ETH_TX_EN), GPIO_FN(AVB_TXD3), - GPIO_FN(TCLK1_B), GPIO_FN(CAN_CLK_B), - GPIO_FN(ETH_MAGIC), GPIO_FN(AVB_TXD4), GPIO_FN(IETX_C), - GPIO_FN(ETH_TXD0), GPIO_FN(AVB_TXD5), GPIO_FN(IECLK_C), - GPIO_FN(ETH_MDC), GPIO_FN(AVB_TXD6), GPIO_FN(IERX_C), - GPIO_FN(STP_IVCXO27_0), GPIO_FN(AVB_TXD7), GPIO_FN(SCIFB2_TXD_D), - GPIO_FN(ADIDATA_B), GPIO_FN(MSIOF0_SYNC_C), - GPIO_FN(STP_ISCLK_0), GPIO_FN(AVB_TX_EN), GPIO_FN(SCIFB2_RXD_D), - GPIO_FN(ADICS_SAMP_B), GPIO_FN(MSIOF0_SCK_C), - - /* IPSR13 - IPSR16 */ -}; - -static struct pinmux_cfg_reg pinmux_config_regs[] = { - { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1) { - GP_0_31_FN, FN_IP1_22_20, - GP_0_30_FN, FN_IP1_19_17, - GP_0_29_FN, FN_IP1_16_14, - GP_0_28_FN, FN_IP1_13_11, - GP_0_27_FN, FN_IP1_10_8, - GP_0_26_FN, FN_IP1_7_6, - GP_0_25_FN, FN_IP1_5_4, - GP_0_24_FN, FN_IP1_3_2, - GP_0_23_FN, FN_IP1_1_0, - GP_0_22_FN, FN_IP0_30_29, - GP_0_21_FN, FN_IP0_28_27, - GP_0_20_FN, FN_IP0_26_25, - GP_0_19_FN, FN_IP0_24_23, - GP_0_18_FN, FN_IP0_22_21, - GP_0_17_FN, FN_IP0_20_19, - GP_0_16_FN, FN_IP0_18_16, - GP_0_15_FN, FN_IP0_15, - GP_0_14_FN, FN_IP0_14, - GP_0_13_FN, FN_IP0_13, - GP_0_12_FN, FN_IP0_12, - GP_0_11_FN, FN_IP0_11, - GP_0_10_FN, FN_IP0_10, - GP_0_9_FN, FN_IP0_9, - GP_0_8_FN, FN_IP0_8, - GP_0_7_FN, FN_IP0_7, - GP_0_6_FN, FN_IP0_6, - GP_0_5_FN, FN_IP0_5, - GP_0_4_FN, FN_IP0_4, - GP_0_3_FN, FN_IP0_3, - GP_0_2_FN, FN_IP0_2, - GP_0_1_FN, FN_IP0_1, - GP_0_0_FN, FN_IP0_0, } - }, - { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_1_25_FN, FN_IP3_21_20, - GP_1_24_FN, FN_IP3_19_18, - GP_1_23_FN, FN_IP3_17_16, - GP_1_22_FN, FN_IP3_15_14, - GP_1_21_FN, FN_IP3_13_12, - GP_1_20_FN, FN_IP3_11_9, - GP_1_19_FN, FN_RD_N, - GP_1_18_FN, FN_IP3_8_6, - GP_1_17_FN, FN_IP3_5_3, - GP_1_16_FN, FN_IP3_2_0, - GP_1_15_FN, FN_IP2_29_27, - GP_1_14_FN, FN_IP2_26_25, - GP_1_13_FN, FN_IP2_24_23, - GP_1_12_FN, FN_EX_CS0_N, - GP_1_11_FN, FN_IP2_22_21, - GP_1_10_FN, FN_IP2_20_19, - GP_1_9_FN, FN_IP2_18_16, - GP_1_8_FN, FN_IP2_15_13, - GP_1_7_FN, FN_IP2_12_10, - GP_1_6_FN, FN_IP2_9_7, - GP_1_5_FN, FN_IP2_6_5, - GP_1_4_FN, FN_IP2_4_3, - GP_1_3_FN, FN_IP2_2_0, - GP_1_2_FN, FN_IP1_31_29, - GP_1_1_FN, FN_IP1_28_26, - GP_1_0_FN, FN_IP1_25_23, } - }, - { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1) { - GP_2_31_FN, FN_IP6_7_6, - GP_2_30_FN, FN_IP6_5_3, - GP_2_29_FN, FN_IP6_2_0, - GP_2_28_FN, FN_AUDIO_CLKA, - GP_2_27_FN, FN_IP5_31_29, - GP_2_26_FN, FN_IP5_28_26, - GP_2_25_FN, FN_IP5_25_24, - GP_2_24_FN, FN_IP5_23_22, - GP_2_23_FN, FN_IP5_21_20, - GP_2_22_FN, FN_IP5_19_17, - GP_2_21_FN, FN_IP5_16_15, - GP_2_20_FN, FN_IP5_14_12, - GP_2_19_FN, FN_IP5_11_9, - GP_2_18_FN, FN_IP5_8_6, - GP_2_17_FN, FN_IP5_5_3, - GP_2_16_FN, FN_IP5_2_0, - GP_2_15_FN, FN_IP4_30_28, - GP_2_14_FN, FN_IP4_27_26, - GP_2_13_FN, FN_IP4_25_24, - GP_2_12_FN, FN_IP4_23_22, - GP_2_11_FN, FN_IP4_21, - GP_2_10_FN, FN_IP4_20, - GP_2_9_FN, FN_IP4_19, - GP_2_8_FN, FN_IP4_18_16, - GP_2_7_FN, FN_IP4_15_13, - GP_2_6_FN, FN_IP4_12_10, - GP_2_5_FN, FN_IP4_9_8, - GP_2_4_FN, FN_IP4_7_5, - GP_2_3_FN, FN_IP4_4_2, - GP_2_2_FN, FN_IP4_1_0, - GP_2_1_FN, FN_IP3_30_28, - GP_2_0_FN, FN_IP3_27_25 } - }, - { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1) { - GP_3_31_FN, FN_IP9_18_17, - GP_3_30_FN, FN_IP9_16, - GP_3_29_FN, FN_IP9_15_13, - GP_3_28_FN, FN_IP9_12, - GP_3_27_FN, FN_IP9_11, - GP_3_26_FN, FN_IP9_10_8, - GP_3_25_FN, FN_IP9_7, - GP_3_24_FN, FN_IP9_6, - GP_3_23_FN, FN_IP9_5_3, - GP_3_22_FN, FN_IP9_2_0, - GP_3_21_FN, FN_IP8_30_28, - GP_3_20_FN, FN_IP8_27_26, - GP_3_19_FN, FN_IP8_25_24, - GP_3_18_FN, FN_IP8_23_21, - GP_3_17_FN, FN_IP8_20_18, - GP_3_16_FN, FN_IP8_17_15, - GP_3_15_FN, FN_IP8_14_12, - GP_3_14_FN, FN_IP8_11_9, - GP_3_13_FN, FN_IP8_8_6, - GP_3_12_FN, FN_IP8_5_3, - GP_3_11_FN, FN_IP8_2_0, - GP_3_10_FN, FN_IP7_29_27, - GP_3_9_FN, FN_IP7_26_24, - GP_3_8_FN, FN_IP7_23_21, - GP_3_7_FN, FN_IP7_20_19, - GP_3_6_FN, FN_IP7_18_17, - GP_3_5_FN, FN_IP7_16_15, - GP_3_4_FN, FN_IP7_14_13, - GP_3_3_FN, FN_IP7_12_11, - GP_3_2_FN, FN_IP7_10_9, - GP_3_1_FN, FN_IP7_8_6, - GP_3_0_FN, FN_IP7_5_3 } - }, - { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1) { - GP_4_31_FN, FN_IP15_5_4, - GP_4_30_FN, FN_IP15_3_2, - GP_4_29_FN, FN_IP15_1_0, - GP_4_28_FN, FN_IP11_8_6, - GP_4_27_FN, FN_IP11_5_3, - GP_4_26_FN, FN_IP11_2_0, - GP_4_25_FN, FN_IP10_31_29, - GP_4_24_FN, FN_IP10_28_27, - GP_4_23_FN, FN_IP10_26_25, - GP_4_22_FN, FN_IP10_24_22, - GP_4_21_FN, FN_IP10_21_19, - GP_4_20_FN, FN_IP10_18_17, - GP_4_19_FN, FN_IP10_16_15, - GP_4_18_FN, FN_IP10_14_12, - GP_4_17_FN, FN_IP10_11_9, - GP_4_16_FN, FN_IP10_8_6, - GP_4_15_FN, FN_IP10_5_3, - GP_4_14_FN, FN_IP10_2_0, - GP_4_13_FN, FN_IP9_31_29, - GP_4_12_FN, FN_VI0_DATA0_VI0_B7, - GP_4_11_FN, FN_VI0_DATA0_VI0_B6, - GP_4_10_FN, FN_VI0_DATA0_VI0_B5, - GP_4_9_FN, FN_VI0_DATA0_VI0_B4, - GP_4_8_FN, FN_IP9_28_27, - GP_4_7_FN, FN_VI0_DATA0_VI0_B2, - GP_4_6_FN, FN_VI0_DATA0_VI0_B1, - GP_4_5_FN, FN_VI0_DATA0_VI0_B0, - GP_4_4_FN, FN_IP9_26_25, - GP_4_3_FN, FN_IP9_24_23, - GP_4_2_FN, FN_IP9_22_21, - GP_4_1_FN, FN_IP9_20_19, - GP_4_0_FN, FN_VI0_CLK } - }, - { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1) { - GP_5_31_FN, FN_IP3_24_22, - GP_5_30_FN, FN_IP13_9_7, - GP_5_29_FN, FN_IP13_6_5, - GP_5_28_FN, FN_IP13_4_3, - GP_5_27_FN, FN_IP13_2_0, - GP_5_26_FN, FN_IP12_29_27, - GP_5_25_FN, FN_IP12_26_24, - GP_5_24_FN, FN_IP12_23_22, - GP_5_23_FN, FN_IP12_21_20, - GP_5_22_FN, FN_IP12_19_18, - GP_5_21_FN, FN_IP12_17_16, - GP_5_20_FN, FN_IP12_15_13, - GP_5_19_FN, FN_IP12_12_10, - GP_5_18_FN, FN_IP12_9_7, - GP_5_17_FN, FN_IP12_6_4, - GP_5_16_FN, FN_IP12_3_2, - GP_5_15_FN, FN_IP12_1_0, - GP_5_14_FN, FN_IP11_31_30, - GP_5_13_FN, FN_IP11_29_28, - GP_5_12_FN, FN_IP11_27, - GP_5_11_FN, FN_IP11_26, - GP_5_10_FN, FN_IP11_25, - GP_5_9_FN, FN_IP11_24, - GP_5_8_FN, FN_IP11_23, - GP_5_7_FN, FN_IP11_22, - GP_5_6_FN, FN_IP11_21, - GP_5_5_FN, FN_IP11_20, - GP_5_4_FN, FN_IP11_19, - GP_5_3_FN, FN_IP11_18_17, - GP_5_2_FN, FN_IP11_16_15, - GP_5_1_FN, FN_IP11_14_12, - GP_5_0_FN, FN_IP11_11_9 } - }, - { PINMUX_CFG_REG("GPSR6", 0xE606001C, 32, 1) { - 0, 0, - 0, 0, - GP_6_29_FN, FN_IP14_31_29, - GP_6_28_FN, FN_IP14_28_26, - GP_6_27_FN, FN_IP14_25_23, - GP_6_26_FN, FN_IP14_22_20, - GP_6_25_FN, FN_IP14_19_17, - GP_6_24_FN, FN_IP14_16_14, - GP_6_23_FN, FN_IP14_13_11, - GP_6_22_FN, FN_IP14_10_8, - GP_6_21_FN, FN_IP14_7, - GP_6_20_FN, FN_IP14_6, - GP_6_19_FN, FN_IP14_5, - GP_6_18_FN, FN_IP14_4, - GP_6_17_FN, FN_IP14_3, - GP_6_16_FN, FN_IP14_2, - GP_6_15_FN, FN_IP14_1_0, - GP_6_14_FN, FN_IP13_30_28, - GP_6_13_FN, FN_IP13_27, - GP_6_12_FN, FN_IP13_26, - GP_6_11_FN, FN_IP13_25, - GP_6_10_FN, FN_IP13_24_23, - GP_6_9_FN, FN_IP13_22, - 0, 0, - GP_6_7_FN, FN_IP13_21_19, - GP_6_6_FN, FN_IP13_18_16, - GP_6_5_FN, FN_IP13_15, - GP_6_4_FN, FN_IP13_14, - GP_6_3_FN, FN_IP13_13, - GP_6_2_FN, FN_IP13_12, - GP_6_1_FN, FN_IP13_11, - GP_6_0_FN, FN_IP13_10 } - }, - { PINMUX_CFG_REG("GPSR7", 0xE6060074, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_7_25_FN, FN_USB1_PWEN, - GP_7_24_FN, FN_USB0_OVC, - GP_7_23_FN, FN_USB0_PWEN, - GP_7_22_FN, FN_IP15_14_12, - GP_7_21_FN, FN_IP15_11_9, - GP_7_20_FN, FN_IP15_8_6, - GP_7_19_FN, FN_IP7_2_0, - GP_7_18_FN, FN_IP6_29_27, - GP_7_17_FN, FN_IP6_26_24, - GP_7_16_FN, FN_IP6_23_21, - GP_7_15_FN, FN_IP6_20_19, - GP_7_14_FN, FN_IP6_18_16, - GP_7_13_FN, FN_IP6_15_14, - GP_7_12_FN, FN_IP6_13_12, - GP_7_11_FN, FN_IP6_11_10, - GP_7_10_FN, FN_IP6_9_8, - GP_7_9_FN, FN_IP16_11_10, - GP_7_8_FN, FN_IP16_9_8, - GP_7_7_FN, FN_IP16_7_6, - GP_7_6_FN, FN_IP16_5_3, - GP_7_5_FN, FN_IP16_2_0, - GP_7_4_FN, FN_IP15_29_27, - GP_7_3_FN, FN_IP15_26_24, - GP_7_2_FN, FN_IP15_23_21, - GP_7_1_FN, FN_IP15_20_18, - GP_7_0_FN, FN_IP15_17_15 } - }, - /* IPSR0 - IPSR10 */ - { PINMUX_CFG_REG_VAR("IPSR11", 0xE606004C, 32, - 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, - 3, 3, 3, 3, 3) { - /* IP11_31_30 [2] */ - FN_ETH_CRS_DV, FN_AVB_LINK, FN_SDA2_C, 0, - /* IP11_29_28 [2] */ - FN_ETH_MDIO, FN_AVB_RX_CLK, FN_SCL2_C, 0, - /* IP11_27 [1] */ - FN_VI1_DATA7, FN_AVB_MDC, - /* IP11_26 [1] */ - FN_VI1_DATA6, FN_AVB_MAGIC, - /* IP11_25 [1] */ - FN_VI1_DATA5, FN_AVB_RX_DV, - /* IP11_24 [1] */ - FN_VI1_DATA4, FN_AVB_MDIO, - /* IP11_23 [1] */ - FN_VI1_DATA3, FN_AVB_RX_ER, - /* IP11_22 [1] */ - FN_VI1_DATA2, FN_AVB_RXD7, - /* IP11_21 [1] */ - FN_VI1_DATA1, FN_AVB_RXD6, - /* IP11_20 [1] */ - FN_VI1_DATA0, FN_AVB_RXD5, - /* IP11_19 [1] */ - FN_VI1_CLK, FN_AVB_RXD4, - /* IP11_18_17 [2] */ - FN_VI1_FIELD, FN_AVB_RXD3, FN_TS_SPSYNC0_B, 0, - /* IP11_16_15 [2] */ - FN_VI1_CLKENB, FN_AVB_RXD2, FN_TS_SDEN0_B, 0, - /* IP11_14_12 [3] */ - FN_VI1_VSYNC_N, FN_AVB_RXD1, FN_TS_SCK0_B, - FN_RX4_B, FN_SCIFA4_RXD_B, - 0, 0, 0, - /* IP11_11_9 [3] */ - FN_VI1_HSYNC_N, FN_AVB_RXD0, FN_TS_SDATA0_B, - FN_TX4_B, FN_SCIFA4_TXD_B, - 0, 0, 0, - /* IP11_8_6 [3] */ - FN_VI0_R7, FN_GLO_RFON_B, FN_RX1_C, FN_CAN0_RX_E, - FN_SDA4_B, FN_HRX1_D, FN_SCIFB0_RXD_D, 0, - /* IP11_5_3 [3] */ - FN_VI0_R6, FN_VI2_DATA7, FN_GLO_SS_B, FN_TX1_C, FN_SCL4_B, - 0, 0, 0, - /* IP11_2_0 [3] */ - FN_VI0_R5, FN_VI2_DATA6, FN_GLO_SDATA_B, FN_RX0_C, FN_SDA1_D, - 0, 0, 0, } - }, - { PINMUX_CFG_REG_VAR("IPSR12", 0xE6060050, 32, - 2, 3, 3, 2, 2, 2, 2, 3, 3, 3, 3, 2, 2) { - /* IP12_31_30 [2] */ - 0, 0, 0, 0, - /* IP12_29_27 [3] */ - FN_STP_ISCLK_0, FN_AVB_TX_EN, FN_SCIFB2_RXD_D, - FN_ADICS_SAMP_B, FN_MSIOF0_SCK_C, - 0, 0, 0, - /* IP12_26_24 [3] */ - FN_STP_IVCXO27_0, FN_AVB_TXD7, FN_SCIFB2_TXD_D, - FN_ADIDATA_B, FN_MSIOF0_SYNC_C, - 0, 0, 0, - /* IP12_23_22 [2] */ - FN_ETH_MDC, FN_AVB_TXD6, FN_IERX_C, 0, - /* IP12_21_20 [2] */ - FN_ETH_TXD0, FN_AVB_TXD5, FN_IECLK_C, 0, - /* IP12_19_18 [2] */ - FN_ETH_MAGIC, FN_AVB_TXD4, FN_IETX_C, 0, - /* IP12_17_16 [2] */ - FN_ETH_TX_EN, FN_AVB_TXD3, FN_TCLK1_B, FN_CAN_CLK_B, - /* IP12_15_13 [3] */ - FN_ETH_TXD1, FN_AVB_TXD2, FN_SCIFA3_TXD_B, - FN_CAN1_TX_C, FN_MSIOF1_TXD_E, - 0, 0, 0, - /* IP12_12_10 [3] */ - FN_ETH_REFCLK, FN_AVB_TXD1, FN_SCIFA3_RXD_B, - FN_CAN1_RX_C, FN_MSIOF1_SYNC_E, - 0, 0, 0, - /* IP12_9_7 [3] */ - FN_ETH_LINK, FN_AVB_TXD0, FN_CAN0_RX_C, - FN_SDA2_D, FN_MSIOF1_SCK_E, - 0, 0, 0, - /* IP12_6_4 [3] */ - FN_ETH_RXD1, FN_AVB_GTXREFCLK, FN_CAN0_TX_C, - FN_SCL2_D, FN_MSIOF1_RXD_E, - 0, 0, 0, - /* IP12_3_2 [2] */ - FN_ETH_RXD0, FN_AVB_PHY_INT, FN_SDA3, FN_SDA7, - /* IP12_1_0 [2] */ - FN_ETH_RX_ER, FN_AVB_CRS, FN_SCL3, FN_SCL7, } - }, - - /* IPSR13 - IPSR16 */ - - { PINMUX_CFG_REG_VAR("MOD_SEL", 0xE6060090, 32, - 1, 2, 2, 2, 3, 2, 1, 1, 1, 1, - 3, 2, 2, 2, 1, 2, 2, 2) { - /* RESEVED [1] */ - 0, 0, - /* SEL_SCIF1 [2] */ - FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3, - /* SEL_SCIFB [2] */ - FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2, FN_SEL_SCIFB_3, - /* SEL_SCIFB2 [2] */ - FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, - FN_SEL_SCIFB2_2, FN_SEL_SCIFB2_3, - /* SEL_SCIFB1 [3] */ - FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, - FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3, - 0, 0, 0, 0, - /* SEL_SCIFA1 [2] */ - FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, 0, - /* SEL_SSI9 [1] */ - FN_SEL_SSI9_0, FN_SEL_SSI9_1, - /* SEL_SCFA [1] */ - FN_SEL_SCFA_0, FN_SEL_SCFA_1, - /* SEL_QSP [1] */ - FN_SEL_QSP_0, FN_SEL_QSP_1, - /* SEL_SSI7 [1] */ - FN_SEL_SSI7_0, FN_SEL_SSI7_1, - /* SEL_HSCIF1 [3] */ - FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, FN_SEL_HSCIF1_2, - FN_SEL_HSCIF1_3, FN_SEL_HSCIF1_4, - 0, 0, 0, - /* RESEVED [2] */ - 0, 0, 0, 0, - /* SEL_VI1 [2] */ - FN_SEL_VI1_0, FN_SEL_VI1_1, FN_SEL_VI1_2, 0, - /* RESEVED [2] */ - 0, 0, 0, 0, - /* SEL_TMU [1] */ - FN_SEL_TMU1_0, FN_SEL_TMU1_1, - /* SEL_LBS [2] */ - FN_SEL_LBS_0, FN_SEL_LBS_1, FN_SEL_LBS_2, FN_SEL_LBS_3, - /* SEL_TSIF0 [2] */ - FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3, - /* SEL_SOF0 [2] */ - FN_SEL_SOF0_0, FN_SEL_SOF0_1, FN_SEL_SOF0_2, 0, } - }, - { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xE6060094, 32, - 3, 1, 1, 3, 2, 1, 1, 2, 2, - 1, 3, 2, 1, 2, 2, 2, 1, 1, 1) { - /* SEL_SCIF0 [3] */ - FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, - FN_SEL_SCIF0_3, FN_SEL_SCIF0_4, - 0, 0, 0, - /* RESEVED [1] */ - 0, 0, - /* SEL_SCIF [1] */ - FN_SEL_SCIF_0, FN_SEL_SCIF_1, - /* SEL_CAN0 [3] */ - FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3, - FN_SEL_CAN0_4, FN_SEL_CAN0_5, - 0, 0, - /* SEL_CAN1 [2] */ - FN_SEL_CAN1_0, FN_SEL_CAN1_1, FN_SEL_CAN1_2, FN_SEL_CAN1_3, - /* RESEVED [1] */ - 0, 0, - /* SEL_SCIFA2 [1] */ - FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1, - /* SEL_SCIF4 [2] */ - FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2, 0, - /* RESEVED [2] */ - 0, 0, 0, 0, - /* SEL_ADG [1] */ - FN_SEL_ADG_0, FN_SEL_ADG_1, - /* SEL_FM [3] */ - FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, - FN_SEL_FM_3, FN_SEL_FM_4, - 0, 0, 0, - /* SEL_SCIFA5 [2] */ - FN_SEL_SCIFA5_0, FN_SEL_SCIFA5_1, FN_SEL_SCIFA5_2, 0, - /* RESEVED [1] */ - 0, 0, - /* SEL_GPS [2] */ - FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, FN_SEL_GPS_3, - /* SEL_SCIFA4 [2] */ - FN_SEL_SCIFA4_0, FN_SEL_SCIFA4_1, FN_SEL_SCIFA4_2, 0, - /* SEL_SCIFA3 [2] */ - FN_SEL_SCIFA3_0, FN_SEL_SCIFA3_1, FN_SEL_SCIFA3_2, 0, - /* SEL_SIM [1] */ - FN_SEL_SIM_0, FN_SEL_SIM_1, - /* RESEVED [1] */ - 0, 0, - /* SEL_SSI8 [1] */ - FN_SEL_SSI8_0, FN_SEL_SSI8_1, } - }, - { PINMUX_CFG_REG_VAR("MOD_SEL3", 0xE6060098, 32, - 2, 2, 2, 2, 2, 2, 2, 2, - 1, 1, 2, 2, 3, 2, 2, 2, 1) { - /* SEL_HSCIF2 [2] */ - FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1, - FN_SEL_HSCIF2_2, FN_SEL_HSCIF2_3, - /* SEL_CANCLK [2] */ - FN_SEL_CANCLK_0, FN_SEL_CANCLK_1, - FN_SEL_CANCLK_2, FN_SEL_CANCLK_3, - /* SEL_IIC8 [2] */ - FN_SEL_IIC8_0, FN_SEL_IIC8_1, FN_SEL_IIC8_2, 0, - /* SEL_IIC7 [2] */ - FN_SEL_IIC7_0, FN_SEL_IIC7_1, FN_SEL_IIC7_2, 0, - /* SEL_IIC4 [2] */ - FN_SEL_IIC4_0, FN_SEL_IIC4_1, FN_SEL_IIC4_2, 0, - /* SEL_IIC3 [2] */ - FN_SEL_IIC3_0, FN_SEL_IIC3_1, FN_SEL_IIC3_2, FN_SEL_IIC3_3, - /* SEL_SCIF3 [2] */ - FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3, - /* SEL_IEB [2] */ - FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, 0, - /* SEL_MMC [1] */ - FN_SEL_MMC_0, FN_SEL_MMC_1, - /* SEL_SCIF5 [1] */ - FN_SEL_SCIF5_0, FN_SEL_SCIF5_1, - /* RESEVED [2] */ - 0, 0, 0, 0, - /* SEL_IIC2 [2] */ - FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3, - /* SEL_IIC1 [3] */ - FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2, FN_SEL_IIC1_3, - FN_SEL_IIC1_4, - 0, 0, 0, - /* SEL_IIC0 [2] */ - FN_SEL_IIC0_0, FN_SEL_IIC0_1, FN_SEL_IIC0_2, 0, - /* RESEVED [2] */ - 0, 0, 0, 0, - /* RESEVED [2] */ - 0, 0, 0, 0, - /* RESEVED [1] */ - 0, 0, } - }, - { PINMUX_CFG_REG_VAR("MOD_SEL4", 0xE606009C, 32, - 3, 2, 2, 1, 1, 1, 1, 3, 2, - 2, 3, 1, 1, 1, 2, 2, 2, 2) { - /* SEL_SOF1 [3] */ - FN_SEL_SOF1_0, FN_SEL_SOF1_1, FN_SEL_SOF1_2, FN_SEL_SOF1_3, - FN_SEL_SOF1_4, - 0, 0, 0, - /* SEL_HSCIF0 [2] */ - FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2, 0, - /* SEL_DIS [2] */ - FN_SEL_DIS_0, FN_SEL_DIS_1, FN_SEL_DIS_2, 0, - /* RESEVED [1] */ - 0, 0, - /* SEL_RAD [1] */ - FN_SEL_RAD_0, FN_SEL_RAD_1, - /* SEL_RCN [1] */ - FN_SEL_RCN_0, FN_SEL_RCN_1, - /* SEL_RSP [1] */ - FN_SEL_RSP_0, FN_SEL_RSP_1, - /* SEL_SCIF2 [3] */ - FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, - FN_SEL_SCIF2_3, FN_SEL_SCIF2_4, - 0, 0, 0, - /* RESEVED [2] */ - 0, 0, 0, 0, - /* RESEVED [2] */ - 0, 0, 0, 0, - /* SEL_SOF2 [3] */ - FN_SEL_SOF2_0, FN_SEL_SOF2_1, FN_SEL_SOF2_2, - FN_SEL_SOF2_3, FN_SEL_SOF2_4, - 0, 0, 0, - /* RESEVED [1] */ - 0, 0, - /* SEL_SSI1 [1] */ - FN_SEL_SSI1_0, FN_SEL_SSI1_1, - /* SEL_SSI0 [1] */ - FN_SEL_SSI0_0, FN_SEL_SSI0_1, - /* SEL_SSP [2] */ - FN_SEL_SSP_0, FN_SEL_SSP_1, FN_SEL_SSP_2, 0, - /* RESEVED [2] */ - 0, 0, 0, 0, - /* RESEVED [2] */ - 0, 0, 0, 0, - /* RESEVED [2] */ - 0, 0, 0, 0, } - }, - { PINMUX_CFG_REG("INOUTSEL0", 0xE6050004, 32, 1) { GP_INOUTSEL(0) } }, - { PINMUX_CFG_REG("INOUTSEL1", 0xE6051004, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_1_25_IN, GP_1_25_OUT, - GP_1_24_IN, GP_1_24_OUT, - GP_1_23_IN, GP_1_23_OUT, - GP_1_22_IN, GP_1_22_OUT, - GP_1_21_IN, GP_1_21_OUT, - GP_1_20_IN, GP_1_20_OUT, - GP_1_19_IN, GP_1_19_OUT, - GP_1_18_IN, GP_1_18_OUT, - GP_1_17_IN, GP_1_17_OUT, - GP_1_16_IN, GP_1_16_OUT, - GP_1_15_IN, GP_1_15_OUT, - GP_1_14_IN, GP_1_14_OUT, - GP_1_13_IN, GP_1_13_OUT, - GP_1_12_IN, GP_1_12_OUT, - GP_1_11_IN, GP_1_11_OUT, - GP_1_10_IN, GP_1_10_OUT, - GP_1_9_IN, GP_1_9_OUT, - GP_1_8_IN, GP_1_8_OUT, - GP_1_7_IN, GP_1_7_OUT, - GP_1_6_IN, GP_1_6_OUT, - GP_1_5_IN, GP_1_5_OUT, - GP_1_4_IN, GP_1_4_OUT, - GP_1_3_IN, GP_1_3_OUT, - GP_1_2_IN, GP_1_2_OUT, - GP_1_1_IN, GP_1_1_OUT, - GP_1_0_IN, GP_1_0_OUT, } - }, - { PINMUX_CFG_REG("INOUTSEL2", 0xE6052004, 32, 1) { GP_INOUTSEL(2) } }, - { PINMUX_CFG_REG("INOUTSEL3", 0xE6053004, 32, 1) { GP_INOUTSEL(3) } }, - { PINMUX_CFG_REG("INOUTSEL4", 0xE6054004, 32, 1) { GP_INOUTSEL(4) } }, - { PINMUX_CFG_REG("INOUTSEL5", 0xE6055004, 32, 1) { GP_INOUTSEL(5) } }, - { PINMUX_CFG_REG("INOUTSEL6", 0xE6055404, 32, 1) { GP_INOUTSEL(6) } }, - { PINMUX_CFG_REG("INOUTSEL7", 0xE6055804, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_7_25_IN, GP_7_25_OUT, - GP_7_24_IN, GP_7_24_OUT, - GP_7_23_IN, GP_7_23_OUT, - GP_7_22_IN, GP_7_22_OUT, - GP_7_21_IN, GP_7_21_OUT, - GP_7_20_IN, GP_7_20_OUT, - GP_7_19_IN, GP_7_19_OUT, - GP_7_18_IN, GP_7_18_OUT, - GP_7_17_IN, GP_7_17_OUT, - GP_7_16_IN, GP_7_16_OUT, - GP_7_15_IN, GP_7_15_OUT, - GP_7_14_IN, GP_7_14_OUT, - GP_7_13_IN, GP_7_13_OUT, - GP_7_12_IN, GP_7_12_OUT, - GP_7_11_IN, GP_7_11_OUT, - GP_7_10_IN, GP_7_10_OUT, - GP_7_9_IN, GP_7_9_OUT, - GP_7_8_IN, GP_7_8_OUT, - GP_7_7_IN, GP_7_7_OUT, - GP_7_6_IN, GP_7_6_OUT, - GP_7_5_IN, GP_7_5_OUT, - GP_7_4_IN, GP_7_4_OUT, - GP_7_3_IN, GP_7_3_OUT, - GP_7_2_IN, GP_7_2_OUT, - GP_7_1_IN, GP_7_1_OUT, - GP_7_0_IN, GP_7_0_OUT, } - }, - { }, -}; - -static struct pinmux_data_reg pinmux_data_regs[] = { - { PINMUX_DATA_REG("INDT0", 0xE6050008, 32) { GP_INDT(0) } }, - { PINMUX_DATA_REG("INDT1", 0xE6051008, 32) { - 0, 0, 0, 0, - 0, 0, GP_1_25_DATA, GP_1_24_DATA, - GP_1_23_DATA, GP_1_22_DATA, GP_1_21_DATA, GP_1_20_DATA, - GP_1_19_DATA, GP_1_18_DATA, GP_1_17_DATA, GP_1_16_DATA, - GP_1_15_DATA, GP_1_14_DATA, GP_1_13_DATA, GP_1_12_DATA, - GP_1_11_DATA, GP_1_10_DATA, GP_1_9_DATA, GP_1_8_DATA, - GP_1_7_DATA, GP_1_6_DATA, GP_1_5_DATA, GP_1_4_DATA, - GP_1_3_DATA, GP_1_2_DATA, GP_1_1_DATA, GP_1_0_DATA } - }, - { PINMUX_DATA_REG("INDT2", 0xE6052008, 32) { GP_INDT(2) } }, - { PINMUX_DATA_REG("INDT3", 0xE6053008, 32) { GP_INDT(3) } }, - { PINMUX_DATA_REG("INDT4", 0xE6054008, 32) { GP_INDT(4) } }, - { PINMUX_DATA_REG("INDT5", 0xE6055008, 32) { GP_INDT(5) } }, - { PINMUX_DATA_REG("INDT6", 0xE6055408, 32) { GP_INDT(6) } }, - { PINMUX_DATA_REG("INDT7", 0xE6055808, 32) { - 0, 0, 0, 0, - 0, 0, GP_7_25_DATA, GP_7_24_DATA, - GP_7_23_DATA, GP_7_22_DATA, GP_7_21_DATA, GP_7_20_DATA, - GP_7_19_DATA, GP_7_18_DATA, GP_7_17_DATA, GP_7_16_DATA, - GP_7_15_DATA, GP_7_14_DATA, GP_7_13_DATA, GP_7_12_DATA, - GP_7_11_DATA, GP_7_10_DATA, GP_7_9_DATA, GP_7_8_DATA, - GP_7_7_DATA, GP_7_6_DATA, GP_7_5_DATA, GP_7_4_DATA, - GP_7_3_DATA, GP_7_2_DATA, GP_7_1_DATA, GP_7_0_DATA } - }, - { }, -}; - -static struct pinmux_info r8a7791_pinmux_info = { - .name = "r8a7791_pfc", - - .unlock_reg = 0xe6060000, /* PMMR */ - - .reserved_id = PINMUX_RESERVED, - .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, - .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, - .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, - .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, - .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, - - .first_gpio = GPIO_GP_0_0, - .last_gpio = GPIO_FN_MSIOF0_SCK_C /* GPIO_FN_CAN1_RX_B */, - - .gpios = pinmux_gpios, - .cfg_regs = pinmux_config_regs, - .data_regs = pinmux_data_regs, - - .gpio_data = pinmux_data, - .gpio_data_size = ARRAY_SIZE(pinmux_data), -}; - -void r8a7791_pinmux_init(void) -{ - register_pinmux(&r8a7791_pinmux_info); -} diff --git a/arch/arm/mach-rmobile/pfc-r8a7792.c b/arch/arm/mach-rmobile/pfc-r8a7792.c deleted file mode 100644 index 693072281c4..00000000000 --- a/arch/arm/mach-rmobile/pfc-r8a7792.c +++ /dev/null @@ -1,2301 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * arch/arm/cpu/armv7/rmobile/pfc-r8a7792.c - * This file is r8a7792 processor support - PFC hardware block. - * - * Copyright (C) 2016 Renesas Electronics Corporation - */ - -#include <common.h> -#include <sh_pfc.h> -#include <asm/gpio.h> -#include "pfc-r8a7790.h" - -enum { - PINMUX_RESERVED = 0, - - PINMUX_DATA_BEGIN, - GP_ALL(DATA), - PINMUX_DATA_END, - - PINMUX_INPUT_BEGIN, - GP_ALL(IN), - PINMUX_INPUT_END, - - PINMUX_OUTPUT_BEGIN, - GP_ALL(OUT), - PINMUX_OUTPUT_END, - - PINMUX_FUNCTION_BEGIN, - GP_ALL(FN), - - /* GPSR0 */ - FN_IP0_0, FN_IP0_1, FN_IP0_2, FN_IP0_3, - FN_IP0_4, FN_IP0_5, FN_IP0_6, FN_IP0_7, - FN_IP0_8, FN_IP0_9, FN_IP0_10, FN_IP0_11, - FN_IP0_12, FN_IP0_13, FN_IP0_14, FN_IP0_15, - FN_IP0_16, FN_IP0_17, FN_IP0_18, FN_IP0_19, - FN_IP0_20, FN_IP0_21, FN_IP0_22, FN_IP0_23, - FN_IP1_0, FN_IP1_1, FN_IP1_2, FN_IP1_3, - FN_IP1_4, - - /* GPSR1 */ - FN_IP1_5, FN_IP1_6, FN_IP1_7, FN_IP1_8, - FN_IP1_9, FN_IP1_10, FN_IP1_11, FN_IP1_12, - FN_IP1_13, FN_IP1_14, FN_IP1_15, FN_IP1_16, - FN_DU1_DB2_C0_DATA12, FN_DU1_DB3_C1_DATA13, FN_DU1_DB4_C2_DATA14, FN_DU1_DB5_C3_DATA15, - FN_DU1_DB6_C4, FN_DU1_DB7_C5, FN_DU1_EXHSYNC_DU1_HSYNC, FN_DU1_EXVSYNC_DU1_VSYNC, - FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, FN_DU1_DISP, FN_DU1_CDE, - - /* GPSR2 */ - FN_D0, FN_D1, FN_D2, FN_D3, - FN_D4, FN_D5, FN_D6, FN_D7, - FN_D8, FN_D9, FN_D10, FN_D11, - FN_D12, FN_D13, FN_D14, FN_D15, - FN_A0, FN_A1, FN_A2, FN_A3, - FN_A4, FN_A5, FN_A6, FN_A7, - FN_A8, FN_A9, FN_A10, FN_A11, - FN_A12, FN_A13, FN_A14, FN_A15, - - /* GPSR3 */ - FN_A16, FN_A17, FN_A18, FN_A19, - FN_IP1_17, FN_IP1_18, FN_CS1_A26, FN_EX_CS0, - FN_EX_CS1, FN_EX_CS2, FN_EX_CS3, FN_EX_CS4, - FN_EX_CS5, FN_BS, FN_RD, FN_RD_WR, - FN_WE0, FN_WE1, FN_EX_WAIT0, FN_IRQ0, - FN_IRQ1, FN_IRQ2, FN_IRQ3, FN_IP1_19, - FN_IP1_20, FN_IP1_21, FN_IP1_22, FN_CS0, - - /* GPSR4 */ - FN_VI0_CLK, FN_VI0_CLKENB, FN_VI0_HSYNC, FN_VI0_VSYNC, - FN_VI0_D0_B0_C0, FN_VI0_D1_B1_C1, FN_VI0_D2_B2_C2, FN_VI0_D3_B3_C3, - FN_VI0_D4_B4_C4, FN_VI0_D5_B5_C5, FN_VI0_D6_B6_C6, FN_VI0_D7_B7_C7, - FN_VI0_D8_G0_Y0, FN_VI0_D9_G1_Y1, FN_VI0_D10_G2_Y2, FN_VI0_D11_G3_Y3, - FN_VI0_FIELD, - - /* GPSR5 */ - FN_VI1_CLK, FN_VI1_CLKENB, FN_VI1_HSYNC, FN_VI1_VSYNC, - FN_VI1_D0_B0_C0, FN_VI1_D1_B1_C1, FN_VI1_D2_B2_C2, FN_VI1_D3_B3_C3, - FN_VI1_D4_B4_C4, FN_VI1_D5_B5_C5, FN_VI1_D6_B6_C6, FN_VI1_D7_B7_C7, - FN_VI1_D8_G0_Y0, FN_VI1_D9_G1_Y1, FN_VI1_D10_G2_Y2, FN_VI1_D11_G3_Y3, - FN_VI1_FIELD, - - /* GPSR6 */ - FN_IP2_0, FN_IP2_1, FN_IP2_2, FN_IP2_3, - FN_IP2_4, FN_IP2_5, FN_IP2_6, FN_IP2_7, - FN_IP2_8, FN_IP2_9, FN_IP2_10, FN_IP2_11, - FN_IP2_12, FN_IP2_13, FN_IP2_14, FN_IP2_15, - FN_IP2_16, - - /* GPSR7 */ - FN_IP3_0, FN_IP3_1, FN_IP3_2, FN_IP3_3, - FN_IP3_4, FN_IP3_5, FN_IP3_6, FN_IP3_7, - FN_IP3_8, FN_IP3_9, FN_IP3_10, FN_IP3_11, - FN_IP3_12, FN_IP3_13, FN_VI3_D10_Y2, FN_IP3_14, - FN_VI3_FIELD, - - /* GPSR8 */ - FN_VI4_CLK, FN_IP4_0, FN_IP4_1, FN_IP4_3_2, - FN_IP4_4, FN_IP4_6_5, FN_IP4_8_7, FN_IP4_10_9, - FN_IP4_12_11, FN_IP4_14_13, FN_IP4_16_15, FN_IP4_18_17, - FN_IP4_20_19, FN_IP4_21, FN_IP4_22, FN_IP4_23, FN_IP4_24, - - /* GPSR9 */ - FN_VI5_CLK, FN_IP5_0, FN_IP5_1, FN_IP5_2, - FN_IP5_3, FN_IP5_4, FN_IP5_5, FN_IP5_6, - FN_IP5_7, FN_IP5_8, FN_IP5_9, FN_IP5_10, - FN_IP5_11, FN_VI5_D9_Y1, FN_VI5_D10_Y2, FN_VI5_D11_Y3, - FN_VI5_FIELD, - - /* GPSR10 */ - FN_IP6_0, FN_IP6_1, FN_HRTS0, FN_IP6_2, - FN_IP6_3, FN_IP6_4, FN_IP6_5, FN_HCTS1, - FN_IP6_6, FN_IP6_7, FN_SCK0, FN_CTS0, - FN_RTS0, FN_TX0, FN_RX0, FN_SCK1, - FN_CTS1, FN_RTS1, FN_TX1, FN_RX1, - FN_IP6_9_8, FN_IP6_11_10, FN_IP6_13_12, FN_IP6_15_14, - FN_IP6_16, FN_IP6_18_17, FN_SCIF_CLK, FN_CAN0_TX, - FN_CAN0_RX, FN_CAN_CLK, FN_CAN1_TX, FN_CAN1_RX, - - /* GPSR11 */ - FN_IP7_1_0, FN_IP7_3_2, FN_IP7_5_4, FN_IP7_6, - FN_IP7_7, FN_SD0_CLK, FN_SD0_CMD, FN_SD0_DAT0, - FN_SD0_DAT1, FN_SD0_DAT2, FN_SD0_DAT3, FN_SD0_CD, - FN_SD0_WP, FN_IP7_9_8, FN_IP7_11_10, FN_IP7_13_12, - FN_IP7_15_14, FN_IP7_16, FN_IP7_17, FN_IP7_18, - FN_IP7_19, FN_IP7_20, FN_ADICLK, FN_ADICS_SAMP, - FN_ADIDATA, FN_ADICHS0, FN_ADICHS1, FN_ADICHS2, - FN_AVS1, FN_AVS2, - - /* IPSR0 */ - FN_DU0_DR0_DATA0, FN_DU0_DR1_DATA1, FN_DU0_DR2_Y4_DATA2, FN_DU0_DR3_Y5_DATA3, - FN_DU0_DR4_Y6_DATA4, FN_DU0_DR5_Y7_DATA5, FN_DU0_DR6_Y8_DATA6, FN_DU0_DR7_Y9_DATA7, - FN_DU0_DG0_DATA8, FN_DU0_DG1_DATA9, FN_DU0_DG2_C6_DATA10, FN_DU0_DG3_C7_DATA11, - FN_DU0_DG4_Y0_DATA12, FN_DU0_DG5_Y1_DATA13, FN_DU0_DG6_Y2_DATA14, FN_DU0_DG7_Y3_DATA15, - FN_DU0_DB0, FN_DU0_DB1, FN_DU0_DB2_C0, FN_DU0_DB3_C1, - FN_DU0_DB4_C2, FN_DU0_DB5_C3, FN_DU0_DB6_C4, FN_DU0_DB7_C5, - - /* IPSR1 */ - FN_DU0_EXHSYNC_DU0_HSYNC, FN_DU0_EXVSYNC_DU0_VSYNC, FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, FN_DU0_DISP, - FN_DU0_CDE, FN_DU1_DR2_Y4_DATA0, FN_DU1_DR3_Y5_DATA1, FN_DU1_DR4_Y6_DATA2, - FN_DU1_DR5_Y7_DATA3, FN_DU1_DR6_DATA4, FN_DU1_DR7_DATA5, FN_DU1_DG2_C6_DATA6, - FN_DU1_DG3_C7_DATA7, FN_DU1_DG4_Y0_DATA8, FN_DU1_DG5_Y1_DATA9, FN_DU1_DG6_Y2_DATA10, - FN_DU1_DG7_Y3_DATA11, FN_A20, FN_MOSI_IO0, FN_A21, FN_MISO_IO1, - FN_A22, FN_IO2, FN_A23, FN_IO3, FN_A24, FN_SPCLK, FN_A25, FN_SSL, - - /* IPSR2 */ - FN_VI2_CLK, FN_AVB_RX_CLK, FN_VI2_CLKENB, FN_AVB_RX_DV, - FN_VI2_HSYNC, FN_AVB_RXD0, FN_VI2_VSYNC, FN_AVB_RXD1, - FN_VI2_D0_C0, FN_AVB_RXD2, FN_VI2_D1_C1, FN_AVB_RXD3, - FN_VI2_D2_C2, FN_AVB_RXD4, FN_VI2_D3_C3, FN_AVB_RXD5, - FN_VI2_D4_C4, FN_AVB_RXD6, FN_VI2_D5_C5, FN_AVB_RXD7, - FN_VI2_D6_C6, FN_AVB_RX_ER, FN_VI2_D7_C7, FN_AVB_COL, - FN_VI2_D8_Y0, FN_AVB_TXD3, FN_VI2_D9_Y1, FN_AVB_TX_EN, - FN_VI2_D10_Y2, FN_AVB_TXD0, FN_VI2_D11_Y3, FN_AVB_TXD1, - FN_VI2_FIELD, FN_AVB_TXD2, - - /* IPSR3 */ - FN_VI3_CLK, FN_AVB_TX_CLK, FN_VI3_CLKENB, FN_AVB_TXD4, - FN_VI3_HSYNC, FN_AVB_TXD5, FN_VI3_VSYNC, FN_AVB_TXD6, - FN_VI3_D0_C0, FN_AVB_TXD7, FN_VI3_D1_C1, FN_AVB_TX_ER, - FN_VI3_D2_C2, FN_AVB_GTX_CLK, FN_VI3_D3_C3, FN_AVB_MDC, - FN_VI3_D4_C4, FN_AVB_MDIO, FN_VI3_D5_C5, FN_AVB_LINK, - FN_VI3_D6_C6, FN_AVB_MAGIC, FN_VI3_D7_C7, FN_AVB_PHY_INT, - FN_VI3_D8_Y0, FN_AVB_CRS, FN_VI3_D9_Y1, FN_AVB_GTXREFCLK, - FN_VI3_D11_Y3, - - /* IPSR4 */ - FN_VI4_CLKENB, FN_VI0_D12_G4_Y4, FN_VI4_HSYNC, FN_VI0_D13_G5_Y5, - FN_VI4_VSYNC, FN_VI0_D14_G6_Y6, FN_VI4_D0_C0, FN_VI0_D15_G7_Y7, - FN_VI4_D1_C1, FN_VI0_D16_R0, FN_VI1_D12_G4_Y4_0, FN_VI4_D2_C2, FN_VI0_D17_R1, FN_VI1_D13_G5_Y5_0, - FN_VI4_D3_C3, FN_VI0_D18_R2, FN_VI1_D14_G6_Y6_0, FN_VI4_D4_C4, FN_VI0_D19_R3, FN_VI1_D15_G7_Y7_0, - FN_VI4_D5_C5, FN_VI0_D20_R4, FN_VI2_D12_Y4, FN_VI4_D6_C6, FN_VI0_D21_R5, FN_VI2_D13_Y5, - FN_VI4_D7_C7, FN_VI0_D22_R6, FN_VI2_D14_Y6, FN_VI4_D8_Y0, FN_VI0_D23_R7, FN_VI2_D15_Y7, - FN_VI4_D9_Y1, FN_VI3_D12_Y4, FN_VI4_D10_Y2, FN_VI3_D13_Y5, - FN_VI4_D11_Y3, FN_VI3_D14_Y6, FN_VI4_FIELD, FN_VI3_D15_Y7, - - /* IPSR5 */ - FN_VI5_CLKENB, FN_VI1_D12_G4_Y4_1, FN_VI5_HSYNC, FN_VI1_D13_G5_Y5_1, - FN_VI5_VSYNC, FN_VI1_D14_G6_Y6_1, FN_VI5_D0_C0, FN_VI1_D15_G7_Y7_1, - FN_VI5_D1_C1, FN_VI1_D16_R0, FN_VI5_D2_C2, FN_VI1_D17_R1, - FN_VI5_D3_C3, FN_VI1_D18_R2, FN_VI5_D4_C4, FN_VI1_D19_R3, - FN_VI5_D5_C5, FN_VI1_D20_R4, FN_VI5_D6_C6, FN_VI1_D21_R5, - FN_VI5_D7_C7, FN_VI1_D22_R6, FN_VI5_D8_Y0, FN_VI1_D23_R7, - - /* IPSR6 */ - FN_MSIOF0_SCK, FN_HSCK0, FN_MSIOF0_SYNC, FN_HCTS0, - FN_MSIOF0_TXD, FN_HTX0, FN_MSIOF0_RXD, FN_HRX0, - FN_MSIOF1_SCK, FN_HSCK1, FN_MSIOF1_SYNC, FN_HRTS1, - FN_MSIOF1_TXD, FN_HTX1, FN_MSIOF1_RXD, FN_HRX1, - FN_DRACK0, FN_SCK2, FN_DACK0, FN_TX2, - FN_DREQ0, FN_RX2, FN_DACK1, FN_SCK3, - FN_TX3, FN_DREQ1, FN_RX3, - - /* IPSR7 */ - FN_PWM0, FN_TCLK1, FN_FSO_CFE_0, FN_PWM1, FN_TCLK2, FN_FSO_CFE_1, - FN_PWM2, FN_TCLK3, FN_FSO_TOE, FN_PWM3, FN_PWM4, - FN_SSI_SCK3, FN_TPU0TO0, FN_SSI_WS3, FN_TPU0TO1, - FN_SSI_SDATA3, FN_TPU0TO2, FN_SSI_SCK4, FN_TPU0TO3, - FN_SSI_WS4, FN_SSI_SDATA4, FN_AUDIO_CLKOUT, FN_AUDIO_CLKA, FN_AUDIO_CLKB, - - FN_SEL_VI1_0, FN_SEL_VI1_1, - PINMUX_FUNCTION_END, - - PINMUX_MARK_BEGIN, - DU1_DB2_C0_DATA12_MARK, DU1_DB3_C1_DATA13_MARK, - DU1_DB4_C2_DATA14_MARK, DU1_DB5_C3_DATA15_MARK, - DU1_DB6_C4_MARK, DU1_DB7_C5_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK, DU1_EXVSYNC_DU1_VSYNC_MARK, - DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK, DU1_DISP_MARK, DU1_CDE_MARK, - - D0_MARK, D1_MARK, D2_MARK, D3_MARK, D4_MARK, D5_MARK, - D6_MARK, D7_MARK, D8_MARK, D9_MARK, D10_MARK, D11_MARK, - D12_MARK, D13_MARK, D14_MARK, D15_MARK, A0_MARK, A1_MARK, - A2_MARK, A3_MARK, A4_MARK, A5_MARK, A6_MARK, A7_MARK, - A8_MARK, A9_MARK, A10_MARK, A11_MARK, A12_MARK, A13_MARK, - A14_MARK, A15_MARK, - - A16_MARK, A17_MARK, A18_MARK, A19_MARK, - CS1_A26_MARK, EX_CS0_MARK, EX_CS1_MARK, EX_CS2_MARK, - EX_CS3_MARK, EX_CS4_MARK, EX_CS5_MARK, BS_MARK, - RD_MARK, RD_WR_MARK, WE0_MARK, WE1_MARK, EX_WAIT0_MARK, - IRQ0_MARK, IRQ1_MARK, IRQ2_MARK, IRQ3_MARK, CS0_MARK, - - VI0_CLK_MARK, VI0_CLKENB_MARK, VI0_HSYNC_MARK, VI0_VSYNC_MARK, - VI0_D0_B0_C0_MARK, VI0_D1_B1_C1_MARK, VI0_D2_B2_C2_MARK, VI0_D3_B3_C3_MARK, - VI0_D4_B4_C4_MARK, VI0_D5_B5_C5_MARK, VI0_D6_B6_C6_MARK, VI0_D7_B7_C7_MARK, - VI0_D8_G0_Y0_MARK, VI0_D9_G1_Y1_MARK, VI0_D10_G2_Y2_MARK, VI0_D11_G3_Y3_MARK, - VI0_FIELD_MARK, - - VI1_CLK_MARK, VI1_CLKENB_MARK, VI1_HSYNC_MARK, - VI1_VSYNC_MARK, VI1_D0_B0_C0_MARK, VI1_D1_B1_C1_MARK, - VI1_D2_B2_C2_MARK, VI1_D3_B3_C3_MARK, VI1_D4_B4_C4_MARK, - VI1_D5_B5_C5_MARK, VI1_D6_B6_C6_MARK, VI1_D7_B7_C7_MARK, - VI1_D8_G0_Y0_MARK, VI1_D9_G1_Y1_MARK, VI1_D10_G2_Y2_MARK, - VI1_D11_G3_Y3_MARK, VI1_FIELD_MARK, - - VI3_D10_Y2_MARK, VI3_FIELD_MARK, - - VI4_CLK_MARK, - - VI5_CLK_MARK, VI5_D9_Y1_MARK, VI5_D10_Y2_MARK, VI5_D11_Y3_MARK, VI5_FIELD_MARK, - - HRTS0_MARK, HCTS1_MARK, SCK0_MARK, CTS0_MARK, RTS0_MARK, TX0_MARK, - RX0_MARK, SCK1_MARK, CTS1_MARK, RTS1_MARK, TX1_MARK, RX1_MARK, - SCIF_CLK_MARK, CAN0_TX_MARK, CAN0_RX_MARK, - CAN_CLK_MARK, CAN1_TX_MARK, CAN1_RX_MARK, - - SD0_CLK_MARK, SD0_CMD_MARK, SD0_DAT0_MARK, - SD0_DAT1_MARK, SD0_DAT2_MARK, SD0_DAT3_MARK, - SD0_CD_MARK, SD0_WP_MARK, ADICLK_MARK, - ADICS_SAMP_MARK, ADIDATA_MARK, ADICHS0_MARK, - ADICHS1_MARK, ADICHS2_MARK, AVS1_MARK, AVS2_MARK, - - DU0_DR0_DATA0_MARK, DU0_DR1_DATA1_MARK, DU0_DR2_Y4_DATA2_MARK, - DU0_DR3_Y5_DATA3_MARK, DU0_DR4_Y6_DATA4_MARK, DU0_DR5_Y7_DATA5_MARK, - DU0_DR6_Y8_DATA6_MARK, DU0_DR7_Y9_DATA7_MARK, DU0_DG0_DATA8_MARK, - DU0_DG1_DATA9_MARK, DU0_DG2_C6_DATA10_MARK, DU0_DG3_C7_DATA11_MARK, - DU0_DG4_Y0_DATA12_MARK, DU0_DG5_Y1_DATA13_MARK, DU0_DG6_Y2_DATA14_MARK, - DU0_DG7_Y3_DATA15_MARK, DU0_DB0_MARK, DU0_DB1_MARK, - DU0_DB2_C0_MARK, DU0_DB3_C1_MARK, DU0_DB4_C2_MARK, - DU0_DB5_C3_MARK, DU0_DB6_C4_MARK, DU0_DB7_C5_MARK, - - DU0_EXHSYNC_DU0_HSYNC_MARK, DU0_EXVSYNC_DU0_VSYNC_MARK, - DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK, DU0_DISP_MARK, DU0_CDE_MARK, - DU1_DR2_Y4_DATA0_MARK, DU1_DR3_Y5_DATA1_MARK, DU1_DR4_Y6_DATA2_MARK, - DU1_DR5_Y7_DATA3_MARK, DU1_DR6_DATA4_MARK, DU1_DR7_DATA5_MARK, - DU1_DG2_C6_DATA6_MARK, DU1_DG3_C7_DATA7_MARK, DU1_DG4_Y0_DATA8_MARK, - DU1_DG5_Y1_DATA9_MARK, DU1_DG6_Y2_DATA10_MARK, DU1_DG7_Y3_DATA11_MARK, - A20_MARK, MOSI_IO0_MARK, A21_MARK, MISO_IO1_MARK, A22_MARK, IO2_MARK, - A23_MARK, IO3_MARK, A24_MARK, SPCLK_MARK, A25_MARK, SSL_MARK, - - VI2_CLK_MARK, AVB_RX_CLK_MARK, VI2_CLKENB_MARK, AVB_RX_DV_MARK, - VI2_HSYNC_MARK, AVB_RXD0_MARK, VI2_VSYNC_MARK, AVB_RXD1_MARK, - VI2_D0_C0_MARK, AVB_RXD2_MARK, VI2_D1_C1_MARK, AVB_RXD3_MARK, - VI2_D2_C2_MARK, AVB_RXD4_MARK, VI2_D3_C3_MARK, AVB_RXD5_MARK, - VI2_D4_C4_MARK, AVB_RXD6_MARK, VI2_D5_C5_MARK, AVB_RXD7_MARK, - VI2_D6_C6_MARK, AVB_RX_ER_MARK, VI2_D7_C7_MARK, AVB_COL_MARK, - VI2_D8_Y0_MARK, AVB_TXD3_MARK, VI2_D9_Y1_MARK, AVB_TX_EN_MARK, - VI2_D10_Y2_MARK, AVB_TXD0_MARK, VI2_D11_Y3_MARK, AVB_TXD1_MARK, - VI2_FIELD_MARK, AVB_TXD2_MARK, - - VI3_CLK_MARK, AVB_TX_CLK_MARK, VI3_CLKENB_MARK, AVB_TXD4_MARK, - VI3_HSYNC_MARK, AVB_TXD5_MARK, VI3_VSYNC_MARK, AVB_TXD6_MARK, - VI3_D0_C0_MARK, AVB_TXD7_MARK, VI3_D1_C1_MARK, AVB_TX_ER_MARK, - VI3_D2_C2_MARK, AVB_GTX_CLK_MARK, VI3_D3_C3_MARK, AVB_MDC_MARK, - VI3_D4_C4_MARK, AVB_MDIO_MARK, VI3_D5_C5_MARK, AVB_LINK_MARK, - VI3_D6_C6_MARK, AVB_MAGIC_MARK, VI3_D7_C7_MARK, AVB_PHY_INT_MARK, - VI3_D8_Y0_MARK, AVB_CRS_MARK, VI3_D9_Y1_MARK, AVB_GTXREFCLK_MARK, - VI3_D11_Y3_MARK, - - VI4_CLKENB_MARK, VI0_D12_G4_Y4_MARK, VI4_HSYNC_MARK, VI0_D13_G5_Y5_MARK, - VI4_VSYNC_MARK, VI0_D14_G6_Y6_MARK, VI4_D0_C0_MARK, VI0_D15_G7_Y7_MARK, - VI4_D1_C1_MARK, VI0_D16_R0_MARK, VI1_D12_G4_Y4_0_MARK, - VI4_D2_C2_MARK, VI0_D17_R1_MARK, VI1_D13_G5_Y5_0_MARK, - VI4_D3_C3_MARK, VI0_D18_R2_MARK, VI1_D14_G6_Y6_0_MARK, - VI4_D4_C4_MARK, VI0_D19_R3_MARK, VI1_D15_G7_Y7_0_MARK, - VI4_D5_C5_MARK, VI0_D20_R4_MARK, VI2_D12_Y4_MARK, - VI4_D6_C6_MARK, VI0_D21_R5_MARK, VI2_D13_Y5_MARK, - VI4_D7_C7_MARK, VI0_D22_R6_MARK, VI2_D14_Y6_MARK, - VI4_D8_Y0_MARK, VI0_D23_R7_MARK, VI2_D15_Y7_MARK, - VI4_D9_Y1_MARK, VI3_D12_Y4_MARK, VI4_D10_Y2_MARK, VI3_D13_Y5_MARK, - VI4_D11_Y3_MARK, VI3_D14_Y6_MARK, VI4_FIELD_MARK, VI3_D15_Y7_MARK, - - VI5_CLKENB_MARK, VI1_D12_G4_Y4_1_MARK, VI5_HSYNC_MARK, VI1_D13_G5_Y5_1_MARK, - VI5_VSYNC_MARK, VI1_D14_G6_Y6_1_MARK, VI5_D0_C0_MARK, VI1_D15_G7_Y7_1_MARK, - VI5_D1_C1_MARK, VI1_D16_R0_MARK, VI5_D2_C2_MARK, VI1_D17_R1_MARK, - VI5_D3_C3_MARK, VI1_D18_R2_MARK, VI5_D4_C4_MARK, VI1_D19_R3_MARK, - VI5_D5_C5_MARK, VI1_D20_R4_MARK, VI5_D6_C6_MARK, VI1_D21_R5_MARK, - VI5_D7_C7_MARK, VI1_D22_R6_MARK, VI5_D8_Y0_MARK, VI1_D23_R7_MARK, - - MSIOF0_SCK_MARK, HSCK0_MARK, MSIOF0_SYNC_MARK, HCTS0_MARK, - MSIOF0_TXD_MARK, HTX0_MARK, MSIOF0_RXD_MARK, HRX0_MARK, - MSIOF1_SCK_MARK, HSCK1_MARK, MSIOF1_SYNC_MARK, HRTS1_MARK, - MSIOF1_TXD_MARK, HTX1_MARK, MSIOF1_RXD_MARK, HRX1_MARK, - DRACK0_MARK, SCK2_MARK, DACK0_MARK, TX2_MARK, - DREQ0_MARK, RX2_MARK, DACK1_MARK, SCK3_MARK, - TX3_MARK, DREQ1_MARK, RX3_MARK, - - PWM0_MARK, TCLK1_MARK, FSO_CFE_0_MARK, - PWM1_MARK, TCLK2_MARK, FSO_CFE_1_MARK, - PWM2_MARK, TCLK3_MARK, FSO_TOE_MARK, - PWM3_MARK, PWM4_MARK, SSI_SCK3_MARK, TPU0TO0_MARK, - SSI_WS3_MARK, TPU0TO1_MARK, SSI_SDATA3_MARK, TPU0TO2_MARK, - SSI_SCK4_MARK, TPU0TO3_MARK, SSI_WS4_MARK, - SSI_SDATA4_MARK, AUDIO_CLKOUT_MARK, - AUDIO_CLKA_MARK, AUDIO_CLKB_MARK, - - PINMUX_MARK_END, -}; - -static pinmux_enum_t pinmux_data[] = { - PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */ - - PINMUX_DATA(DU1_DB2_C0_DATA12_MARK, FN_DU1_DB2_C0_DATA12), - PINMUX_DATA(DU1_DB3_C1_DATA13_MARK, FN_DU1_DB3_C1_DATA13), - PINMUX_DATA(DU1_DB4_C2_DATA14_MARK, FN_DU1_DB4_C2_DATA14), - PINMUX_DATA(DU1_DB5_C3_DATA15_MARK, FN_DU1_DB5_C3_DATA15), - PINMUX_DATA(DU1_DB6_C4_MARK, FN_DU1_DB6_C4), - PINMUX_DATA(DU1_DB7_C5_MARK, FN_DU1_DB7_C5), - PINMUX_DATA(DU1_EXHSYNC_DU1_HSYNC_MARK, FN_DU1_EXHSYNC_DU1_HSYNC), - PINMUX_DATA(DU1_EXVSYNC_DU1_VSYNC_MARK, FN_DU1_EXVSYNC_DU1_VSYNC), - PINMUX_DATA(DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK, FN_DU1_EXODDF_DU1_ODDF_DISP_CDE), - PINMUX_DATA(DU1_DISP_MARK, FN_DU1_DISP), - PINMUX_DATA(DU1_CDE_MARK, FN_DU1_CDE), - - PINMUX_DATA(D0_MARK, FN_D0), - PINMUX_DATA(D1_MARK, FN_D1), - PINMUX_DATA(D2_MARK, FN_D2), - PINMUX_DATA(D3_MARK, FN_D3), - PINMUX_DATA(D4_MARK, FN_D4), - PINMUX_DATA(D5_MARK, FN_D5), - PINMUX_DATA(D6_MARK, FN_D6), - PINMUX_DATA(D7_MARK, FN_D7), - PINMUX_DATA(D8_MARK, FN_D8), - PINMUX_DATA(D9_MARK, FN_D9), - PINMUX_DATA(D10_MARK, FN_D10), - PINMUX_DATA(D11_MARK, FN_D11), - PINMUX_DATA(D12_MARK, FN_D12), - PINMUX_DATA(D13_MARK, FN_D13), - PINMUX_DATA(D14_MARK, FN_D14), - PINMUX_DATA(D15_MARK, FN_D15), - PINMUX_DATA(A0_MARK, FN_A0), - PINMUX_DATA(A1_MARK, FN_A1), - PINMUX_DATA(A2_MARK, FN_A2), - PINMUX_DATA(A3_MARK, FN_A3), - PINMUX_DATA(A4_MARK, FN_A4), - PINMUX_DATA(A5_MARK, FN_A5), - PINMUX_DATA(A6_MARK, FN_A6), - PINMUX_DATA(A7_MARK, FN_A7), - PINMUX_DATA(A8_MARK, FN_A8), - PINMUX_DATA(A9_MARK, FN_A9), - PINMUX_DATA(A10_MARK, FN_A10), - PINMUX_DATA(A11_MARK, FN_A11), - PINMUX_DATA(A12_MARK, FN_A12), - PINMUX_DATA(A13_MARK, FN_A13), - PINMUX_DATA(A14_MARK, FN_A14), - PINMUX_DATA(A15_MARK, FN_A15), - - PINMUX_DATA(A16_MARK, FN_A16), - PINMUX_DATA(A17_MARK, FN_A17), - PINMUX_DATA(A18_MARK, FN_A18), - PINMUX_DATA(A19_MARK, FN_A19), - PINMUX_DATA(CS1_A26_MARK, FN_CS1_A26), - PINMUX_DATA(EX_CS0_MARK, FN_EX_CS0), - PINMUX_DATA(EX_CS1_MARK, FN_EX_CS1), - PINMUX_DATA(EX_CS2_MARK, FN_EX_CS2), - PINMUX_DATA(EX_CS3_MARK, FN_EX_CS3), - PINMUX_DATA(EX_CS4_MARK, FN_EX_CS4), - PINMUX_DATA(EX_CS5_MARK, FN_EX_CS5), - PINMUX_DATA(BS_MARK, FN_BS), - PINMUX_DATA(RD_MARK, FN_RD), - PINMUX_DATA(RD_WR_MARK, FN_RD_WR), - PINMUX_DATA(WE0_MARK, FN_WE0), - PINMUX_DATA(WE1_MARK, FN_WE1), - PINMUX_DATA(EX_WAIT0_MARK, FN_EX_WAIT0), - PINMUX_DATA(IRQ0_MARK, FN_IRQ0), - PINMUX_DATA(IRQ1_MARK, FN_IRQ1), - PINMUX_DATA(IRQ2_MARK, FN_IRQ2), - PINMUX_DATA(IRQ3_MARK, FN_IRQ3), - PINMUX_DATA(CS0_MARK, FN_CS0), - - PINMUX_DATA(VI0_CLK_MARK, FN_VI0_CLK), - PINMUX_DATA(VI0_CLKENB_MARK, FN_VI0_CLKENB), - PINMUX_DATA(VI0_HSYNC_MARK, FN_VI0_HSYNC), - PINMUX_DATA(VI0_VSYNC_MARK, FN_VI0_VSYNC), - PINMUX_DATA(VI0_D0_B0_C0_MARK, FN_VI0_D0_B0_C0), - PINMUX_DATA(VI0_D1_B1_C1_MARK, FN_VI0_D1_B1_C1), - PINMUX_DATA(VI0_D2_B2_C2_MARK, FN_VI0_D2_B2_C2), - PINMUX_DATA(VI0_D3_B3_C3_MARK, FN_VI0_D3_B3_C3), - PINMUX_DATA(VI0_D4_B4_C4_MARK, FN_VI0_D4_B4_C4), - PINMUX_DATA(VI0_D5_B5_C5_MARK, FN_VI0_D5_B5_C5), - PINMUX_DATA(VI0_D6_B6_C6_MARK, FN_VI0_D6_B6_C6), - PINMUX_DATA(VI0_D7_B7_C7_MARK, FN_VI0_D7_B7_C7), - PINMUX_DATA(VI0_D8_G0_Y0_MARK, FN_VI0_D8_G0_Y0), - PINMUX_DATA(VI0_D9_G1_Y1_MARK, FN_VI0_D9_G1_Y1), - PINMUX_DATA(VI0_D10_G2_Y2_MARK, FN_VI0_D10_G2_Y2), - PINMUX_DATA(VI0_D11_G3_Y3_MARK, FN_VI0_D11_G3_Y3), - PINMUX_DATA(VI0_FIELD_MARK, FN_VI0_FIELD), - - PINMUX_DATA(VI1_CLK_MARK, FN_VI1_CLK), - PINMUX_DATA(VI1_CLKENB_MARK, FN_VI1_CLKENB), - PINMUX_DATA(VI1_HSYNC_MARK, FN_VI1_HSYNC), - PINMUX_DATA(VI1_VSYNC_MARK, FN_VI1_VSYNC), - PINMUX_DATA(VI1_D0_B0_C0_MARK, FN_VI1_D0_B0_C0), - PINMUX_DATA(VI1_D1_B1_C1_MARK, FN_VI1_D1_B1_C1), - PINMUX_DATA(VI1_D2_B2_C2_MARK, FN_VI1_D2_B2_C2), - PINMUX_DATA(VI1_D3_B3_C3_MARK, FN_VI1_D3_B3_C3), - PINMUX_DATA(VI1_D4_B4_C4_MARK, FN_VI1_D4_B4_C4), - PINMUX_DATA(VI1_D5_B5_C5_MARK, FN_VI1_D5_B5_C5), - PINMUX_DATA(VI1_D6_B6_C6_MARK, FN_VI1_D6_B6_C6), - PINMUX_DATA(VI1_D7_B7_C7_MARK, FN_VI1_D7_B7_C7), - PINMUX_DATA(VI1_D8_G0_Y0_MARK, FN_VI1_D8_G0_Y0), - PINMUX_DATA(VI1_D9_G1_Y1_MARK, FN_VI1_D9_G1_Y1), - PINMUX_DATA(VI1_D10_G2_Y2_MARK, FN_VI1_D10_G2_Y2), - PINMUX_DATA(VI1_D11_G3_Y3_MARK, FN_VI1_D11_G3_Y3), - PINMUX_DATA(VI1_FIELD_MARK, FN_VI1_FIELD), - - PINMUX_DATA(VI3_D10_Y2_MARK, FN_VI3_D10_Y2), - PINMUX_DATA(VI3_FIELD_MARK, FN_VI3_FIELD), - - PINMUX_DATA(VI4_CLK_MARK, FN_VI4_CLK), - - PINMUX_DATA(VI5_CLK_MARK, FN_VI5_CLK), - PINMUX_DATA(VI5_D9_Y1_MARK, FN_VI5_D9_Y1), - PINMUX_DATA(VI5_D10_Y2_MARK, FN_VI5_D10_Y2), - PINMUX_DATA(VI5_D11_Y3_MARK, FN_VI5_D11_Y3), - PINMUX_DATA(VI5_FIELD_MARK, FN_VI5_FIELD), - - PINMUX_DATA(HRTS0_MARK, FN_HRTS0), - PINMUX_DATA(HCTS1_MARK, FN_HCTS1), - PINMUX_DATA(SCK0_MARK, FN_SCK0), - PINMUX_DATA(CTS0_MARK, FN_CTS0), - PINMUX_DATA(RTS0_MARK, FN_RTS0), - PINMUX_DATA(TX0_MARK, FN_TX0), - PINMUX_DATA(RX0_MARK, FN_RX0), - PINMUX_DATA(SCK1_MARK, FN_SCK1), - PINMUX_DATA(CTS1_MARK, FN_CTS1), - PINMUX_DATA(RTS1_MARK, FN_RTS1), - PINMUX_DATA(TX1_MARK, FN_TX1), - PINMUX_DATA(RX1_MARK, FN_RX1), - PINMUX_DATA(SCIF_CLK_MARK, FN_SCIF_CLK), - PINMUX_DATA(CAN0_TX_MARK, FN_CAN0_TX), - PINMUX_DATA(CAN0_RX_MARK, FN_CAN0_RX), - PINMUX_DATA(CAN_CLK_MARK, FN_CAN_CLK), - PINMUX_DATA(CAN1_TX_MARK, FN_CAN1_TX), - PINMUX_DATA(CAN1_RX_MARK, FN_CAN1_RX), - - PINMUX_DATA(SD0_CLK_MARK, FN_SD0_CLK), - PINMUX_DATA(SD0_CMD_MARK, FN_SD0_CMD), - PINMUX_DATA(SD0_DAT0_MARK, FN_SD0_DAT0), - PINMUX_DATA(SD0_DAT1_MARK, FN_SD0_DAT1), - PINMUX_DATA(SD0_DAT2_MARK, FN_SD0_DAT2), - PINMUX_DATA(SD0_DAT3_MARK, FN_SD0_DAT3), - PINMUX_DATA(SD0_CD_MARK, FN_SD0_CD), - PINMUX_DATA(SD0_WP_MARK, FN_SD0_WP), - PINMUX_DATA(ADICLK_MARK, FN_ADICLK), - PINMUX_DATA(ADICS_SAMP_MARK, FN_ADICS_SAMP), - PINMUX_DATA(ADIDATA_MARK, FN_ADIDATA), - PINMUX_DATA(ADICHS0_MARK, FN_ADICHS0), - PINMUX_DATA(ADICHS1_MARK, FN_ADICHS1), - PINMUX_DATA(ADICHS2_MARK, FN_ADICHS2), - PINMUX_DATA(AVS1_MARK, FN_AVS1), - PINMUX_DATA(AVS2_MARK, FN_AVS2), - - PINMUX_IPSR_DATA(IP0_0, DU0_DR0_DATA0), - PINMUX_IPSR_DATA(IP0_1, DU0_DR1_DATA1), - PINMUX_IPSR_DATA(IP0_2, DU0_DR2_Y4_DATA2), - PINMUX_IPSR_DATA(IP0_3, DU0_DR3_Y5_DATA3), - PINMUX_IPSR_DATA(IP0_4, DU0_DR4_Y6_DATA4), - PINMUX_IPSR_DATA(IP0_5, DU0_DR5_Y7_DATA5), - PINMUX_IPSR_DATA(IP0_6, DU0_DR6_Y8_DATA6), - PINMUX_IPSR_DATA(IP0_7, DU0_DR7_Y9_DATA7), - PINMUX_IPSR_DATA(IP0_8, DU0_DG0_DATA8), - PINMUX_IPSR_DATA(IP0_9, DU0_DG1_DATA9), - PINMUX_IPSR_DATA(IP0_10, DU0_DG2_C6_DATA10), - PINMUX_IPSR_DATA(IP0_11, DU0_DG3_C7_DATA11), - PINMUX_IPSR_DATA(IP0_12, DU0_DG4_Y0_DATA12), - PINMUX_IPSR_DATA(IP0_13, DU0_DG5_Y1_DATA13), - PINMUX_IPSR_DATA(IP0_14, DU0_DG6_Y2_DATA14), - PINMUX_IPSR_DATA(IP0_15, DU0_DG7_Y3_DATA15), - PINMUX_IPSR_DATA(IP0_16, DU0_DB0), - PINMUX_IPSR_DATA(IP0_17, DU0_DB1), - PINMUX_IPSR_DATA(IP0_18, DU0_DB2_C0), - PINMUX_IPSR_DATA(IP0_19, DU0_DB3_C1), - PINMUX_IPSR_DATA(IP0_20, DU0_DB4_C2), - PINMUX_IPSR_DATA(IP0_21, DU0_DB5_C3), - PINMUX_IPSR_DATA(IP0_22, DU0_DB6_C4), - PINMUX_IPSR_DATA(IP0_23, DU0_DB7_C5), - - PINMUX_IPSR_DATA(IP1_0, DU0_EXHSYNC_DU0_HSYNC), - PINMUX_IPSR_DATA(IP1_1, DU0_EXVSYNC_DU0_VSYNC), - PINMUX_IPSR_DATA(IP1_2, DU0_EXODDF_DU0_ODDF_DISP_CDE), - PINMUX_IPSR_DATA(IP1_3, DU0_DISP), - PINMUX_IPSR_DATA(IP1_4, DU0_CDE), - PINMUX_IPSR_DATA(IP1_5, DU1_DR2_Y4_DATA0), - PINMUX_IPSR_DATA(IP1_6, DU1_DR3_Y5_DATA1), - PINMUX_IPSR_DATA(IP1_7, DU1_DR4_Y6_DATA2), - PINMUX_IPSR_DATA(IP1_8, DU1_DR5_Y7_DATA3), - PINMUX_IPSR_DATA(IP1_9, DU1_DR6_DATA4), - PINMUX_IPSR_DATA(IP1_10, DU1_DR7_DATA5), - PINMUX_IPSR_DATA(IP1_11, DU1_DG2_C6_DATA6), - PINMUX_IPSR_DATA(IP1_12, DU1_DG3_C7_DATA7), - PINMUX_IPSR_DATA(IP1_13, DU1_DG4_Y0_DATA8), - PINMUX_IPSR_DATA(IP1_14, DU1_DG5_Y1_DATA9), - PINMUX_IPSR_DATA(IP1_15, DU1_DG6_Y2_DATA10), - PINMUX_IPSR_DATA(IP1_16, DU1_DG7_Y3_DATA11), - PINMUX_IPSR_DATA(IP1_17, A20), - PINMUX_IPSR_DATA(IP1_17, MOSI_IO0), - PINMUX_IPSR_DATA(IP1_18, A21), - PINMUX_IPSR_DATA(IP1_18, MISO_IO1), - PINMUX_IPSR_DATA(IP1_19, A22), - PINMUX_IPSR_DATA(IP1_19, IO2), - PINMUX_IPSR_DATA(IP1_20, A23), - PINMUX_IPSR_DATA(IP1_20, IO3), - PINMUX_IPSR_DATA(IP1_21, A24), - PINMUX_IPSR_DATA(IP1_21, SPCLK), - PINMUX_IPSR_DATA(IP1_22, A25), - PINMUX_IPSR_DATA(IP1_22, SSL), - - PINMUX_IPSR_DATA(IP2_0, VI2_CLK), - PINMUX_IPSR_DATA(IP2_0, AVB_RX_CLK), - PINMUX_IPSR_DATA(IP2_1, VI2_CLKENB), - PINMUX_IPSR_DATA(IP2_1, AVB_RX_DV), - PINMUX_IPSR_DATA(IP2_2, VI2_HSYNC), - PINMUX_IPSR_DATA(IP2_2, AVB_RXD0), - PINMUX_IPSR_DATA(IP2_3, VI2_VSYNC), - PINMUX_IPSR_DATA(IP2_3, AVB_RXD1), - PINMUX_IPSR_DATA(IP2_4, VI2_D0_C0), - PINMUX_IPSR_DATA(IP2_4, AVB_RXD2), - PINMUX_IPSR_DATA(IP2_5, VI2_D1_C1), - PINMUX_IPSR_DATA(IP2_5, AVB_RXD3), - PINMUX_IPSR_DATA(IP2_6, VI2_D2_C2), - PINMUX_IPSR_DATA(IP2_6, AVB_RXD4), - PINMUX_IPSR_DATA(IP2_7, VI2_D3_C3), - PINMUX_IPSR_DATA(IP2_7, AVB_RXD5), - PINMUX_IPSR_DATA(IP2_8, VI2_D4_C4), - PINMUX_IPSR_DATA(IP2_8, AVB_RXD6), - PINMUX_IPSR_DATA(IP2_9, VI2_D5_C5), - PINMUX_IPSR_DATA(IP2_9, AVB_RXD7), - PINMUX_IPSR_DATA(IP2_10, VI2_D6_C6), - PINMUX_IPSR_DATA(IP2_10, AVB_RX_ER), - PINMUX_IPSR_DATA(IP2_11, VI2_D7_C7), - PINMUX_IPSR_DATA(IP2_11, AVB_COL), - PINMUX_IPSR_DATA(IP2_12, VI2_D8_Y0), - PINMUX_IPSR_DATA(IP2_12, AVB_TXD3), - PINMUX_IPSR_DATA(IP2_13, VI2_D9_Y1), - PINMUX_IPSR_DATA(IP2_13, AVB_TX_EN), - PINMUX_IPSR_DATA(IP2_14, VI2_D10_Y2), - PINMUX_IPSR_DATA(IP2_14, AVB_TXD0), - PINMUX_IPSR_DATA(IP2_15, VI2_D11_Y3), - PINMUX_IPSR_DATA(IP2_15, AVB_TXD1), - PINMUX_IPSR_DATA(IP2_16, VI2_FIELD), - PINMUX_IPSR_DATA(IP2_16, AVB_TXD2), - - PINMUX_IPSR_DATA(IP3_0, VI3_CLK), - PINMUX_IPSR_DATA(IP3_0, AVB_TX_CLK), - PINMUX_IPSR_DATA(IP3_1, VI3_CLKENB), - PINMUX_IPSR_DATA(IP3_1, AVB_TXD4), - PINMUX_IPSR_DATA(IP3_2, VI3_HSYNC), - PINMUX_IPSR_DATA(IP3_2, AVB_TXD5), - PINMUX_IPSR_DATA(IP3_3, VI3_VSYNC), - PINMUX_IPSR_DATA(IP3_3, AVB_TXD6), - PINMUX_IPSR_DATA(IP3_4, VI3_D0_C0), - PINMUX_IPSR_DATA(IP3_4, AVB_TXD7), - PINMUX_IPSR_DATA(IP3_5, VI3_D1_C1), - PINMUX_IPSR_DATA(IP3_5, AVB_TX_ER), - PINMUX_IPSR_DATA(IP3_6, VI3_D2_C2), - PINMUX_IPSR_DATA(IP3_6, AVB_GTX_CLK), - PINMUX_IPSR_DATA(IP3_7, VI3_D3_C3), - PINMUX_IPSR_DATA(IP3_7, AVB_MDC), - PINMUX_IPSR_DATA(IP3_8, VI3_D4_C4), - PINMUX_IPSR_DATA(IP3_8, AVB_MDIO), - PINMUX_IPSR_DATA(IP3_9, VI3_D5_C5), - PINMUX_IPSR_DATA(IP3_9, AVB_LINK), - PINMUX_IPSR_DATA(IP3_10, VI3_D6_C6), - PINMUX_IPSR_DATA(IP3_10, AVB_MAGIC), - PINMUX_IPSR_DATA(IP3_11, VI3_D7_C7), - PINMUX_IPSR_DATA(IP3_11, AVB_PHY_INT), - PINMUX_IPSR_DATA(IP3_12, VI3_D8_Y0), - PINMUX_IPSR_DATA(IP3_12, AVB_CRS), - PINMUX_IPSR_DATA(IP3_13, VI3_D9_Y1), - PINMUX_IPSR_DATA(IP3_13, AVB_GTXREFCLK), - PINMUX_IPSR_DATA(IP3_14, VI3_D11_Y3), - - PINMUX_IPSR_DATA(IP4_0, VI4_CLKENB), - PINMUX_IPSR_DATA(IP4_0, VI0_D12_G4_Y4), - PINMUX_IPSR_DATA(IP4_1, VI4_HSYNC), - PINMUX_IPSR_DATA(IP4_1, VI0_D13_G5_Y5), - PINMUX_IPSR_DATA(IP4_3_2, VI4_VSYNC), - PINMUX_IPSR_DATA(IP4_3_2, VI0_D14_G6_Y6), - PINMUX_IPSR_DATA(IP4_4, VI4_D0_C0), - PINMUX_IPSR_DATA(IP4_4, VI0_D15_G7_Y7), - PINMUX_IPSR_DATA(IP4_6_5, VI4_D1_C1), - PINMUX_IPSR_DATA(IP4_6_5, VI0_D16_R0), - PINMUX_IPSR_MODSEL_DATA(IP4_6_5, VI1_D12_G4_Y4_0, SEL_VI1_0), - PINMUX_IPSR_DATA(IP4_8_7, VI4_D2_C2), - PINMUX_IPSR_DATA(IP4_8_7, VI0_D17_R1), - PINMUX_IPSR_MODSEL_DATA(IP4_8_7, VI1_D13_G5_Y5_0, SEL_VI1_0), - PINMUX_IPSR_DATA(IP4_10_9, VI4_D3_C3), - PINMUX_IPSR_DATA(IP4_10_9, VI0_D18_R2), - PINMUX_IPSR_MODSEL_DATA(IP4_10_9, VI1_D14_G6_Y6_0, SEL_VI1_0), - PINMUX_IPSR_DATA(IP4_12_11, VI4_D4_C4), - PINMUX_IPSR_DATA(IP4_12_11, VI0_D19_R3), - PINMUX_IPSR_MODSEL_DATA(IP4_12_11, VI1_D15_G7_Y7_0, SEL_VI1_0), - PINMUX_IPSR_DATA(IP4_14_13, VI4_D5_C5), - PINMUX_IPSR_DATA(IP4_14_13, VI0_D20_R4), - PINMUX_IPSR_DATA(IP4_14_13, VI2_D12_Y4), - PINMUX_IPSR_DATA(IP4_16_15, VI4_D6_C6), - PINMUX_IPSR_DATA(IP4_16_15, VI0_D21_R5), - PINMUX_IPSR_DATA(IP4_16_15, VI2_D13_Y5), - PINMUX_IPSR_DATA(IP4_18_17, VI4_D7_C7), - PINMUX_IPSR_DATA(IP4_18_17, VI0_D22_R6), - PINMUX_IPSR_DATA(IP4_18_17, VI2_D14_Y6), - PINMUX_IPSR_DATA(IP4_20_19, VI4_D8_Y0), - PINMUX_IPSR_DATA(IP4_20_19, VI0_D23_R7), - PINMUX_IPSR_DATA(IP4_20_19, VI2_D15_Y7), - PINMUX_IPSR_DATA(IP4_21, VI4_D9_Y1), - PINMUX_IPSR_DATA(IP4_21, VI3_D12_Y4), - PINMUX_IPSR_DATA(IP4_22, VI4_D10_Y2), - PINMUX_IPSR_DATA(IP4_22, VI3_D13_Y5), - PINMUX_IPSR_DATA(IP4_23, VI4_D11_Y3), - PINMUX_IPSR_DATA(IP4_23, VI3_D14_Y6), - PINMUX_IPSR_DATA(IP4_24, VI4_FIELD), - PINMUX_IPSR_DATA(IP4_24, VI3_D15_Y7), - - PINMUX_IPSR_DATA(IP5_0, VI5_CLKENB), - PINMUX_IPSR_MODSEL_DATA(IP5_0, VI1_D12_G4_Y4_1, SEL_VI1_1), - PINMUX_IPSR_DATA(IP5_1, VI5_HSYNC), - PINMUX_IPSR_MODSEL_DATA(IP5_1, VI1_D13_G5_Y5_1, SEL_VI1_1), - PINMUX_IPSR_DATA(IP5_2, VI5_VSYNC), - PINMUX_IPSR_MODSEL_DATA(IP5_2, VI1_D14_G6_Y6_1, SEL_VI1_1), - PINMUX_IPSR_DATA(IP5_3, VI5_D0_C0), - PINMUX_IPSR_MODSEL_DATA(IP5_3, VI1_D15_G7_Y7_1, SEL_VI1_1), - PINMUX_IPSR_DATA(IP5_4, VI5_D1_C1), - PINMUX_IPSR_DATA(IP5_4, VI1_D16_R0), - PINMUX_IPSR_DATA(IP5_5, VI5_D2_C2), - PINMUX_IPSR_DATA(IP5_5, VI1_D17_R1), - PINMUX_IPSR_DATA(IP5_6, VI5_D3_C3), - PINMUX_IPSR_DATA(IP5_6, VI1_D18_R2), - PINMUX_IPSR_DATA(IP5_7, VI5_D4_C4), - PINMUX_IPSR_DATA(IP5_7, VI1_D19_R3), - PINMUX_IPSR_DATA(IP5_8, VI5_D5_C5), - PINMUX_IPSR_DATA(IP5_8, VI1_D20_R4), - PINMUX_IPSR_DATA(IP5_9, VI5_D6_C6), - PINMUX_IPSR_DATA(IP5_9, VI1_D21_R5), - PINMUX_IPSR_DATA(IP5_10, VI5_D7_C7), - PINMUX_IPSR_DATA(IP5_10, VI1_D22_R6), - PINMUX_IPSR_DATA(IP5_11, VI5_D8_Y0), - PINMUX_IPSR_DATA(IP5_11, VI1_D23_R7), - - PINMUX_IPSR_DATA(IP6_0, MSIOF0_SCK), - PINMUX_IPSR_DATA(IP6_0, HSCK0), - PINMUX_IPSR_DATA(IP6_1, MSIOF0_SYNC), - PINMUX_IPSR_DATA(IP6_1, HCTS0), - PINMUX_IPSR_DATA(IP6_2, MSIOF0_TXD), - PINMUX_IPSR_DATA(IP6_2, HTX0), - PINMUX_IPSR_DATA(IP6_3, MSIOF0_RXD), - PINMUX_IPSR_DATA(IP6_3, HRX0), - PINMUX_IPSR_DATA(IP6_4, MSIOF1_SCK), - PINMUX_IPSR_DATA(IP6_4, HSCK1), - PINMUX_IPSR_DATA(IP6_5, MSIOF1_SYNC), - PINMUX_IPSR_DATA(IP6_5, HRTS1), - PINMUX_IPSR_DATA(IP6_6, MSIOF1_TXD), - PINMUX_IPSR_DATA(IP6_6, HTX1), - PINMUX_IPSR_DATA(IP6_7, MSIOF1_RXD), - PINMUX_IPSR_DATA(IP6_7, HRX1), - PINMUX_IPSR_DATA(IP6_9_8, DRACK0), - PINMUX_IPSR_DATA(IP6_9_8, SCK2), - PINMUX_IPSR_DATA(IP6_11_10, DACK0), - PINMUX_IPSR_DATA(IP6_11_10, TX2), - PINMUX_IPSR_DATA(IP6_13_12, DREQ0), - PINMUX_IPSR_DATA(IP6_13_12, RX2), - PINMUX_IPSR_DATA(IP6_15_14, DACK1), - PINMUX_IPSR_DATA(IP6_15_14, SCK3), - PINMUX_IPSR_DATA(IP6_16, TX3), - PINMUX_IPSR_DATA(IP6_18_17, DREQ1), - PINMUX_IPSR_DATA(IP6_18_17, RX3), - - PINMUX_IPSR_DATA(IP7_1_0, PWM0), - PINMUX_IPSR_DATA(IP7_1_0, TCLK1), - PINMUX_IPSR_DATA(IP7_1_0, FSO_CFE_0), - PINMUX_IPSR_DATA(IP7_3_2, PWM1), - PINMUX_IPSR_DATA(IP7_3_2, TCLK2), - PINMUX_IPSR_DATA(IP7_3_2, FSO_CFE_1), - PINMUX_IPSR_DATA(IP7_5_4, PWM2), - PINMUX_IPSR_DATA(IP7_5_4, TCLK3), - PINMUX_IPSR_DATA(IP7_5_4, FSO_TOE), - PINMUX_IPSR_DATA(IP7_6, PWM3), - PINMUX_IPSR_DATA(IP7_7, PWM4), - PINMUX_IPSR_DATA(IP7_9_8, SSI_SCK3), - PINMUX_IPSR_DATA(IP7_9_8, TPU0TO0), - PINMUX_IPSR_DATA(IP7_11_10, SSI_WS3), - PINMUX_IPSR_DATA(IP7_11_10, TPU0TO1), - PINMUX_IPSR_DATA(IP7_13_12, SSI_SDATA3), - PINMUX_IPSR_DATA(IP7_13_12, TPU0TO2), - PINMUX_IPSR_DATA(IP7_15_14, SSI_SCK4), - PINMUX_IPSR_DATA(IP7_15_14, TPU0TO3), - PINMUX_IPSR_DATA(IP7_16, SSI_WS4), - PINMUX_IPSR_DATA(IP7_17, SSI_SDATA4), - PINMUX_IPSR_DATA(IP7_18, AUDIO_CLKOUT), - PINMUX_IPSR_DATA(IP7_19, AUDIO_CLKA), - PINMUX_IPSR_DATA(IP7_20, AUDIO_CLKB), -}; - -static struct pinmux_gpio pinmux_gpios[] = { - PINMUX_GPIO_GP_ALL(), - - GPIO_FN(DU1_DB2_C0_DATA12), GPIO_FN(DU1_DB3_C1_DATA13), - GPIO_FN(DU1_DB4_C2_DATA14), GPIO_FN(DU1_DB5_C3_DATA15), - GPIO_FN(DU1_DB6_C4), GPIO_FN(DU1_DB7_C5), - GPIO_FN(DU1_EXHSYNC_DU1_HSYNC), GPIO_FN(DU1_EXVSYNC_DU1_VSYNC), - GPIO_FN(DU1_EXODDF_DU1_ODDF_DISP_CDE), GPIO_FN(DU1_DISP), GPIO_FN(DU1_CDE), - - GPIO_FN(D0), GPIO_FN(D1), GPIO_FN(D2), GPIO_FN(D3), - GPIO_FN(D4), GPIO_FN(D5), GPIO_FN(D6), GPIO_FN(D7), - GPIO_FN(D8), GPIO_FN(D9), GPIO_FN(D10), GPIO_FN(D11), - GPIO_FN(D12), GPIO_FN(D13), GPIO_FN(D14), GPIO_FN(D15), - GPIO_FN(A0), GPIO_FN(A1), GPIO_FN(A2), GPIO_FN(A3), - GPIO_FN(A4), GPIO_FN(A5), GPIO_FN(A6), GPIO_FN(A7), - GPIO_FN(A8), GPIO_FN(A9), GPIO_FN(A10), GPIO_FN(A11), - GPIO_FN(A12), GPIO_FN(A13), GPIO_FN(A14), GPIO_FN(A15), - - GPIO_FN(A16), GPIO_FN(A17), GPIO_FN(A18), GPIO_FN(A19), - GPIO_FN(CS1_A26), GPIO_FN(EX_CS0), GPIO_FN(EX_CS1), GPIO_FN(EX_CS2), - GPIO_FN(EX_CS3), GPIO_FN(EX_CS4), GPIO_FN(EX_CS5), GPIO_FN(BS), - GPIO_FN(RD), GPIO_FN(RD_WR), GPIO_FN(WE0), GPIO_FN(WE1), - GPIO_FN(EX_WAIT0), GPIO_FN(IRQ0), GPIO_FN(IRQ1), GPIO_FN(IRQ2), - GPIO_FN(IRQ3), GPIO_FN(CS0), - - GPIO_FN(VI0_CLK), GPIO_FN(VI0_CLKENB), GPIO_FN(VI0_HSYNC), - GPIO_FN(VI0_VSYNC), GPIO_FN(VI0_D0_B0_C0), GPIO_FN(VI0_D1_B1_C1), - GPIO_FN(VI0_D2_B2_C2), GPIO_FN(VI0_D3_B3_C3), GPIO_FN(VI0_D4_B4_C4), - GPIO_FN(VI0_D5_B5_C5), GPIO_FN(VI0_D6_B6_C6), GPIO_FN(VI0_D7_B7_C7), - GPIO_FN(VI0_D8_G0_Y0), GPIO_FN(VI0_D9_G1_Y1), GPIO_FN(VI0_D10_G2_Y2), - GPIO_FN(VI0_D11_G3_Y3), GPIO_FN(VI0_FIELD), - - GPIO_FN(VI1_CLK), GPIO_FN(VI1_CLKENB), GPIO_FN(VI1_HSYNC), - GPIO_FN(VI1_VSYNC), GPIO_FN(VI1_D0_B0_C0), GPIO_FN(VI1_D1_B1_C1), - GPIO_FN(VI1_D2_B2_C2), GPIO_FN(VI1_D3_B3_C3), GPIO_FN(VI1_D4_B4_C4), - GPIO_FN(VI1_D5_B5_C5), GPIO_FN(VI1_D6_B6_C6), GPIO_FN(VI1_D7_B7_C7), - GPIO_FN(VI1_D8_G0_Y0), GPIO_FN(VI1_D9_G1_Y1), GPIO_FN(VI1_D10_G2_Y2), - GPIO_FN(VI1_D11_G3_Y3), GPIO_FN(VI1_FIELD), - - GPIO_FN(VI3_D10_Y2), GPIO_FN(VI3_FIELD), - - GPIO_FN(VI4_CLK), - - GPIO_FN(VI5_CLK), GPIO_FN(VI5_D9_Y1), GPIO_FN(VI5_D10_Y2), - GPIO_FN(VI5_D11_Y3), GPIO_FN(VI5_FIELD), - - GPIO_FN(HRTS0), GPIO_FN(HCTS1), GPIO_FN(SCK0), GPIO_FN(CTS0), - GPIO_FN(RTS0), GPIO_FN(TX0), GPIO_FN(RX0), GPIO_FN(SCK1), - GPIO_FN(CTS1), GPIO_FN(RTS1), GPIO_FN(TX1), GPIO_FN(RX1), - GPIO_FN(SCIF_CLK), GPIO_FN(CAN0_TX), GPIO_FN(CAN0_RX), GPIO_FN(CAN_CLK), - GPIO_FN(CAN1_TX), GPIO_FN(CAN1_RX), - - GPIO_FN(SD0_CLK), GPIO_FN(SD0_CMD), GPIO_FN(SD0_DAT0), - GPIO_FN(SD0_DAT1), GPIO_FN(SD0_DAT2), GPIO_FN(SD0_DAT3), - GPIO_FN(SD0_CD), GPIO_FN(SD0_WP), GPIO_FN(ADICLK), - GPIO_FN(ADICS_SAMP), GPIO_FN(ADIDATA), GPIO_FN(ADICHS0), - GPIO_FN(ADICHS1), GPIO_FN(ADICHS2), GPIO_FN(AVS1), - GPIO_FN(AVS2), - - GPIO_FN(DU0_DR0_DATA0), GPIO_FN(DU0_DR1_DATA1), - GPIO_FN(DU0_DR2_Y4_DATA2), GPIO_FN(DU0_DR3_Y5_DATA3), - GPIO_FN(DU0_DR4_Y6_DATA4), GPIO_FN(DU0_DR5_Y7_DATA5), - GPIO_FN(DU0_DR6_Y8_DATA6), GPIO_FN(DU0_DR7_Y9_DATA7), - GPIO_FN(DU0_DG0_DATA8), GPIO_FN(DU0_DG1_DATA9), - GPIO_FN(DU0_DG2_C6_DATA10), GPIO_FN(DU0_DG3_C7_DATA11), - GPIO_FN(DU0_DG4_Y0_DATA12), GPIO_FN(DU0_DG5_Y1_DATA13), - GPIO_FN(DU0_DG6_Y2_DATA14), GPIO_FN(DU0_DG7_Y3_DATA15), - GPIO_FN(DU0_DB0), GPIO_FN(DU0_DB1), - GPIO_FN(DU0_DB2_C0), GPIO_FN(DU0_DB3_C1), GPIO_FN(DU0_DB4_C2), - GPIO_FN(DU0_DB5_C3), GPIO_FN(DU0_DB6_C4), GPIO_FN(DU0_DB7_C5), - - GPIO_FN(DU0_EXHSYNC_DU0_HSYNC), GPIO_FN(DU0_EXVSYNC_DU0_VSYNC), - GPIO_FN(DU0_EXODDF_DU0_ODDF_DISP_CDE), GPIO_FN(DU0_DISP), - GPIO_FN(DU0_CDE), GPIO_FN(DU1_DR2_Y4_DATA0), GPIO_FN(DU1_DR3_Y5_DATA1), - GPIO_FN(DU1_DR4_Y6_DATA2), GPIO_FN(DU1_DR5_Y7_DATA3), - GPIO_FN(DU1_DR6_DATA4), GPIO_FN(DU1_DR7_DATA5), - GPIO_FN(DU1_DG2_C6_DATA6), GPIO_FN(DU1_DG3_C7_DATA7), - GPIO_FN(DU1_DG4_Y0_DATA8), GPIO_FN(DU1_DG5_Y1_DATA9), - GPIO_FN(DU1_DG6_Y2_DATA10), GPIO_FN(DU1_DG7_Y3_DATA11), - GPIO_FN(A20), GPIO_FN(MOSI_IO0), GPIO_FN(A21), GPIO_FN(MISO_IO1), - GPIO_FN(A22), GPIO_FN(IO2), GPIO_FN(A23), GPIO_FN(IO3), - GPIO_FN(A24), GPIO_FN(SPCLK), GPIO_FN(A25), GPIO_FN(SSL), - - GPIO_FN(VI2_CLK), GPIO_FN(AVB_RX_CLK), GPIO_FN(VI2_CLKENB), - GPIO_FN(AVB_RX_DV), GPIO_FN(VI2_HSYNC), GPIO_FN(AVB_RXD0), - GPIO_FN(VI2_VSYNC), GPIO_FN(AVB_RXD1), GPIO_FN(VI2_D0_C0), - GPIO_FN(AVB_RXD2), GPIO_FN(VI2_D1_C1), GPIO_FN(AVB_RXD3), - GPIO_FN(VI2_D2_C2), GPIO_FN(AVB_RXD4), GPIO_FN(VI2_D3_C3), - GPIO_FN(AVB_RXD5), GPIO_FN(VI2_D4_C4), GPIO_FN(AVB_RXD6), - GPIO_FN(VI2_D5_C5), GPIO_FN(AVB_RXD7), GPIO_FN(VI2_D6_C6), - GPIO_FN(AVB_RX_ER), GPIO_FN(VI2_D7_C7), GPIO_FN(AVB_COL), - GPIO_FN(VI2_D8_Y0), GPIO_FN(AVB_TXD3), GPIO_FN(VI2_D9_Y1), - GPIO_FN(AVB_TX_EN), GPIO_FN(VI2_D10_Y2), GPIO_FN(AVB_TXD0), - GPIO_FN(VI2_D11_Y3), GPIO_FN(AVB_TXD1), GPIO_FN(VI2_FIELD), - GPIO_FN(AVB_TXD2), - - GPIO_FN(VI3_CLK), GPIO_FN(AVB_TX_CLK), GPIO_FN(VI3_CLKENB), - GPIO_FN(AVB_TXD4), GPIO_FN(VI3_HSYNC), GPIO_FN(AVB_TXD5), - GPIO_FN(VI3_VSYNC), GPIO_FN(AVB_TXD6), GPIO_FN(VI3_D0_C0), - GPIO_FN(AVB_TXD7), GPIO_FN(VI3_D1_C1), GPIO_FN(AVB_TX_ER), - GPIO_FN(VI3_D2_C2), GPIO_FN(AVB_GTX_CLK), GPIO_FN(VI3_D3_C3), - GPIO_FN(AVB_MDC), GPIO_FN(VI3_D4_C4), GPIO_FN(AVB_MDIO), - GPIO_FN(VI3_D5_C5), GPIO_FN(AVB_LINK), GPIO_FN(VI3_D6_C6), - GPIO_FN(AVB_MAGIC), GPIO_FN(VI3_D7_C7), GPIO_FN(AVB_PHY_INT), - GPIO_FN(VI3_D8_Y0), GPIO_FN(AVB_CRS), GPIO_FN(VI3_D9_Y1), - GPIO_FN(AVB_GTXREFCLK), GPIO_FN(VI3_D11_Y3), - - GPIO_FN(VI4_CLKENB), GPIO_FN(VI0_D12_G4_Y4), GPIO_FN(VI4_HSYNC), - GPIO_FN(VI0_D13_G5_Y5), GPIO_FN(VI4_VSYNC), GPIO_FN(VI0_D14_G6_Y6), - GPIO_FN(VI4_D0_C0), GPIO_FN(VI0_D15_G7_Y7), GPIO_FN(VI4_D1_C1), - GPIO_FN(VI0_D16_R0), GPIO_FN(VI1_D12_G4_Y4_0), GPIO_FN(VI4_D2_C2), - GPIO_FN(VI0_D17_R1), GPIO_FN(VI1_D13_G5_Y5_0), GPIO_FN(VI4_D3_C3), - GPIO_FN(VI0_D18_R2), GPIO_FN(VI1_D14_G6_Y6_0), GPIO_FN(VI4_D4_C4), - GPIO_FN(VI0_D19_R3), GPIO_FN(VI1_D15_G7_Y7_0), GPIO_FN(VI4_D5_C5), - GPIO_FN(VI0_D20_R4), GPIO_FN(VI2_D12_Y4), GPIO_FN(VI4_D6_C6), - GPIO_FN(VI0_D21_R5), GPIO_FN(VI2_D13_Y5), GPIO_FN(VI4_D7_C7), - GPIO_FN(VI0_D22_R6), GPIO_FN(VI2_D14_Y6), GPIO_FN(VI4_D8_Y0), - GPIO_FN(VI0_D23_R7), GPIO_FN(VI2_D15_Y7), GPIO_FN(VI4_D9_Y1), - GPIO_FN(VI3_D12_Y4), GPIO_FN(VI4_D10_Y2), GPIO_FN(VI3_D13_Y5), - GPIO_FN(VI4_D11_Y3), GPIO_FN(VI3_D14_Y6), GPIO_FN(VI4_FIELD), - GPIO_FN(VI3_D15_Y7), - - GPIO_FN(VI5_CLKENB), GPIO_FN(VI1_D12_G4_Y4_1), GPIO_FN(VI5_HSYNC), - GPIO_FN(VI1_D13_G5_Y5_1), GPIO_FN(VI5_VSYNC), GPIO_FN(VI1_D14_G6_Y6_1), - GPIO_FN(VI5_D0_C0), GPIO_FN(VI1_D15_G7_Y7_1), GPIO_FN(VI5_D1_C1), - GPIO_FN(VI1_D16_R0), GPIO_FN(VI5_D2_C2), GPIO_FN(VI1_D17_R1), - GPIO_FN(VI5_D3_C3), GPIO_FN(VI1_D18_R2), GPIO_FN(VI5_D4_C4), - GPIO_FN(VI1_D19_R3), GPIO_FN(VI5_D5_C5), GPIO_FN(VI1_D20_R4), - GPIO_FN(VI5_D6_C6), GPIO_FN(VI1_D21_R5), GPIO_FN(VI5_D7_C7), - GPIO_FN(VI1_D22_R6), GPIO_FN(VI5_D8_Y0), GPIO_FN(VI1_D23_R7), - - GPIO_FN(MSIOF0_SCK), GPIO_FN(HSCK0), GPIO_FN(MSIOF0_SYNC), - GPIO_FN(HCTS0), GPIO_FN(MSIOF0_TXD), GPIO_FN(HTX0), - GPIO_FN(MSIOF0_RXD), GPIO_FN(HRX0), GPIO_FN(MSIOF1_SCK), - GPIO_FN(HSCK1), GPIO_FN(MSIOF1_SYNC), GPIO_FN(HRTS1), - GPIO_FN(MSIOF1_TXD), GPIO_FN(HTX1), GPIO_FN(MSIOF1_RXD), - GPIO_FN(HRX1), GPIO_FN(DRACK0), GPIO_FN(SCK2), - GPIO_FN(DACK0), GPIO_FN(TX2), GPIO_FN(DREQ0), - GPIO_FN(RX2), GPIO_FN(DACK1), GPIO_FN(SCK3), - GPIO_FN(TX3), GPIO_FN(DREQ1), GPIO_FN(RX3), - - GPIO_FN(PWM0), GPIO_FN(TCLK1), GPIO_FN(FSO_CFE_0), - GPIO_FN(PWM1), GPIO_FN(TCLK2), GPIO_FN(FSO_CFE_1), - GPIO_FN(PWM2), GPIO_FN(TCLK3), GPIO_FN(FSO_TOE), - GPIO_FN(PWM3), GPIO_FN(PWM4), - GPIO_FN(SSI_SCK3), GPIO_FN(TPU0TO0), - GPIO_FN(SSI_WS3), GPIO_FN(TPU0TO1), - GPIO_FN(SSI_SDATA3), GPIO_FN(TPU0TO2), - GPIO_FN(SSI_SCK4), GPIO_FN(TPU0TO3), - GPIO_FN(SSI_WS4), GPIO_FN(SSI_SDATA4), - GPIO_FN(AUDIO_CLKOUT), GPIO_FN(AUDIO_CLKA), GPIO_FN(AUDIO_CLKB), - -}; - -static struct pinmux_cfg_reg pinmux_config_regs[] = { - { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - GP_0_28_FN, FN_IP1_4, - GP_0_27_FN, FN_IP1_3, - GP_0_26_FN, FN_IP1_2, - GP_0_25_FN, FN_IP1_1, - GP_0_24_FN, FN_IP1_0, - GP_0_23_FN, FN_IP0_23, - GP_0_22_FN, FN_IP0_22, - GP_0_21_FN, FN_IP0_21, - GP_0_20_FN, FN_IP0_20, - GP_0_19_FN, FN_IP0_19, - GP_0_18_FN, FN_IP0_18, - GP_0_17_FN, FN_IP0_17, - GP_0_16_FN, FN_IP0_16, - GP_0_15_FN, FN_IP0_15, - GP_0_14_FN, FN_IP0_14, - GP_0_13_FN, FN_IP0_13, - GP_0_12_FN, FN_IP0_12, - GP_0_11_FN, FN_IP0_11, - GP_0_10_FN, FN_IP0_10, - GP_0_9_FN, FN_IP0_9, - GP_0_8_FN, FN_IP0_8, - GP_0_7_FN, FN_IP0_7, - GP_0_6_FN, FN_IP0_6, - GP_0_5_FN, FN_IP0_5, - GP_0_4_FN, FN_IP0_4, - GP_0_3_FN, FN_IP0_3, - GP_0_2_FN, FN_IP0_2, - GP_0_1_FN, FN_IP0_1, - GP_0_0_FN, FN_IP0_0 } - }, - { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_1_22_FN, FN_DU1_CDE, - GP_1_21_FN, FN_DU1_DISP, - GP_1_20_FN, FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, - GP_1_19_FN, FN_DU1_EXVSYNC_DU1_VSYNC, - GP_1_18_FN, FN_DU1_EXHSYNC_DU1_HSYNC, - GP_1_17_FN, FN_DU1_DB7_C5, - GP_1_16_FN, FN_DU1_DB6_C4, - GP_1_15_FN, FN_DU1_DB5_C3_DATA15, - GP_1_14_FN, FN_DU1_DB4_C2_DATA14, - GP_1_13_FN, FN_DU1_DB3_C1_DATA13, - GP_1_12_FN, FN_DU1_DB2_C0_DATA12, - GP_1_11_FN, FN_IP1_16, - GP_1_10_FN, FN_IP1_15, - GP_1_9_FN, FN_IP1_14, - GP_1_8_FN, FN_IP1_13, - GP_1_7_FN, FN_IP1_12, - GP_1_6_FN, FN_IP1_11, - GP_1_5_FN, FN_IP1_10, - GP_1_4_FN, FN_IP1_9, - GP_1_3_FN, FN_IP1_8, - GP_1_2_FN, FN_IP1_7, - GP_1_1_FN, FN_IP1_6, - GP_1_0_FN, FN_IP1_5, } - }, - { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1) { - GP_2_31_FN, FN_A15, - GP_2_30_FN, FN_A14, - GP_2_29_FN, FN_A13, - GP_2_28_FN, FN_A12, - GP_2_27_FN, FN_A11, - GP_2_26_FN, FN_A10, - GP_2_25_FN, FN_A9, - GP_2_24_FN, FN_A8, - GP_2_23_FN, FN_A7, - GP_2_22_FN, FN_A6, - GP_2_21_FN, FN_A5, - GP_2_20_FN, FN_A4, - GP_2_19_FN, FN_A3, - GP_2_18_FN, FN_A2, - GP_2_17_FN, FN_A1, - GP_2_16_FN, FN_A0, - GP_2_15_FN, FN_D15, - GP_2_14_FN, FN_D14, - GP_2_13_FN, FN_D13, - GP_2_12_FN, FN_D12, - GP_2_11_FN, FN_D11, - GP_2_10_FN, FN_D10, - GP_2_9_FN, FN_D9, - GP_2_8_FN, FN_D8, - GP_2_7_FN, FN_D7, - GP_2_6_FN, FN_D6, - GP_2_5_FN, FN_D5, - GP_2_4_FN, FN_D4, - GP_2_3_FN, FN_D3, - GP_2_2_FN, FN_D2, - GP_2_1_FN, FN_D1, - GP_2_0_FN, FN_D0 } - }, - { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_3_27_FN, FN_CS0, - GP_3_26_FN, FN_IP1_22, - GP_3_25_FN, FN_IP1_21, - GP_3_24_FN, FN_IP1_20, - GP_3_23_FN, FN_IP1_19, - GP_3_22_FN, FN_IRQ3, - GP_3_21_FN, FN_IRQ2, - GP_3_20_FN, FN_IRQ1, - GP_3_19_FN, FN_IRQ0, - GP_3_18_FN, FN_EX_WAIT0, - GP_3_17_FN, FN_WE1, - GP_3_16_FN, FN_WE0, - GP_3_15_FN, FN_RD_WR, - GP_3_14_FN, FN_RD, - GP_3_13_FN, FN_BS, - GP_3_12_FN, FN_EX_CS5, - GP_3_11_FN, FN_EX_CS4, - GP_3_10_FN, FN_EX_CS3, - GP_3_9_FN, FN_EX_CS2, - GP_3_8_FN, FN_EX_CS1, - GP_3_7_FN, FN_EX_CS0, - GP_3_6_FN, FN_CS1_A26, - GP_3_5_FN, FN_IP1_18, - GP_3_4_FN, FN_IP1_17, - GP_3_3_FN, FN_A19, - GP_3_2_FN, FN_A18, - GP_3_1_FN, FN_A17, - GP_3_0_FN, FN_A16 } - }, - { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_4_16_FN, FN_VI0_FIELD, - GP_4_15_FN, FN_VI0_D11_G3_Y3, - GP_4_14_FN, FN_VI0_D10_G2_Y2, - GP_4_13_FN, FN_VI0_D9_G1_Y1, - GP_4_12_FN, FN_VI0_D8_G0_Y0, - GP_4_11_FN, FN_VI0_D7_B7_C7, - GP_4_10_FN, FN_VI0_D6_B6_C6, - GP_4_9_FN, FN_VI0_D5_B5_C5, - GP_4_8_FN, FN_VI0_D4_B4_C4, - GP_4_7_FN, FN_VI0_D3_B3_C3, - GP_4_6_FN, FN_VI0_D2_B2_C2, - GP_4_5_FN, FN_VI0_D1_B1_C1, - GP_4_4_FN, FN_VI0_D0_B0_C0, - GP_4_3_FN, FN_VI0_VSYNC, - GP_4_2_FN, FN_VI0_HSYNC, - GP_4_1_FN, FN_VI0_CLKENB, - GP_4_0_FN, FN_VI0_CLK } - }, - { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_5_16_FN, FN_VI1_FIELD, - GP_5_15_FN, FN_VI1_D11_G3_Y3, - GP_5_14_FN, FN_VI1_D10_G2_Y2, - GP_5_13_FN, FN_VI1_D9_G1_Y1, - GP_5_12_FN, FN_VI1_D8_G0_Y0, - GP_5_11_FN, FN_VI1_D7_B7_C7, - GP_5_10_FN, FN_VI1_D6_B6_C6, - GP_5_9_FN, FN_VI1_D5_B5_C5, - GP_5_8_FN, FN_VI1_D4_B4_C4, - GP_5_7_FN, FN_VI1_D3_B3_C3, - GP_5_6_FN, FN_VI1_D2_B2_C2, - GP_5_5_FN, FN_VI1_D1_B1_C1, - GP_5_4_FN, FN_VI1_D0_B0_C0, - GP_5_3_FN, FN_VI1_VSYNC, - GP_5_2_FN, FN_VI1_HSYNC, - GP_5_1_FN, FN_VI1_CLKENB, - GP_5_0_FN, FN_VI1_CLK } - }, - { PINMUX_CFG_REG("GPSR6", 0xE606001C, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_6_16_FN, FN_IP2_16, - GP_6_15_FN, FN_IP2_15, - GP_6_14_FN, FN_IP2_14, - GP_6_13_FN, FN_IP2_13, - GP_6_12_FN, FN_IP2_12, - GP_6_11_FN, FN_IP2_11, - GP_6_10_FN, FN_IP2_10, - GP_6_9_FN, FN_IP2_9, - GP_6_8_FN, FN_IP2_8, - GP_6_7_FN, FN_IP2_7, - GP_6_6_FN, FN_IP2_6, - GP_6_5_FN, FN_IP2_5, - GP_6_4_FN, FN_IP2_4, - GP_6_3_FN, FN_IP2_3, - GP_6_2_FN, FN_IP2_2, - GP_6_1_FN, FN_IP2_1, - GP_6_0_FN, FN_IP2_0 } - }, - { PINMUX_CFG_REG("GPSR7", 0xE6060020, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_7_16_FN, FN_VI3_FIELD, - GP_7_15_FN, FN_IP3_14, - GP_7_14_FN, FN_VI3_D10_Y2, - GP_7_13_FN, FN_IP3_13, - GP_7_12_FN, FN_IP3_12, - GP_7_11_FN, FN_IP3_11, - GP_7_10_FN, FN_IP3_10, - GP_7_9_FN, FN_IP3_9, - GP_7_8_FN, FN_IP3_8, - GP_7_7_FN, FN_IP3_7, - GP_7_6_FN, FN_IP3_6, - GP_7_5_FN, FN_IP3_5, - GP_7_4_FN, FN_IP3_4, - GP_7_3_FN, FN_IP3_3, - GP_7_2_FN, FN_IP3_2, - GP_7_1_FN, FN_IP3_1, - GP_7_0_FN, FN_IP3_0 } - }, - { PINMUX_CFG_REG("GPSR8", 0xE6060024, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_8_16_FN, FN_IP4_24, - GP_8_15_FN, FN_IP4_23, - GP_8_14_FN, FN_IP4_22, - GP_8_13_FN, FN_IP4_21, - GP_8_12_FN, FN_IP4_20_19, - GP_8_11_FN, FN_IP4_18_17, - GP_8_10_FN, FN_IP4_16_15, - GP_8_9_FN, FN_IP4_14_13, - GP_8_8_FN, FN_IP4_12_11, - GP_8_7_FN, FN_IP4_10_9, - GP_8_6_FN, FN_IP4_8_7, - GP_8_5_FN, FN_IP4_6_5, - GP_8_4_FN, FN_IP4_4, - GP_8_3_FN, FN_IP4_3_2, - GP_8_2_FN, FN_IP4_1, - GP_8_1_FN, FN_IP4_0, - GP_8_0_FN, FN_VI4_CLK } - }, - { PINMUX_CFG_REG("GPSR9", 0xE6060028, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_9_16_FN, FN_VI5_FIELD, - GP_9_15_FN, FN_VI5_D11_Y3, - GP_9_14_FN, FN_VI5_D10_Y2, - GP_9_13_FN, FN_VI5_D9_Y1, - GP_9_12_FN, FN_IP5_11, - GP_9_11_FN, FN_IP5_10, - GP_9_10_FN, FN_IP5_9, - GP_9_9_FN, FN_IP5_8, - GP_9_8_FN, FN_IP5_7, - GP_9_7_FN, FN_IP5_6, - GP_9_6_FN, FN_IP5_5, - GP_9_5_FN, FN_IP5_4, - GP_9_4_FN, FN_IP5_3, - GP_9_3_FN, FN_IP5_2, - GP_9_2_FN, FN_IP5_1, - GP_9_1_FN, FN_IP5_0, - GP_9_0_FN, FN_VI5_CLK } - }, - { PINMUX_CFG_REG("GPSR10", 0xE606002C, 32, 1) { - GP_10_31_FN, FN_CAN1_RX, - GP_10_30_FN, FN_CAN1_TX, - GP_10_29_FN, FN_CAN_CLK, - GP_10_28_FN, FN_CAN0_RX, - GP_10_27_FN, FN_CAN0_TX, - GP_10_26_FN, FN_SCIF_CLK, - GP_10_25_FN, FN_IP6_18_17, - GP_10_24_FN, FN_IP6_16, - GP_10_23_FN, FN_IP6_15_14, - GP_10_22_FN, FN_IP6_13_12, - GP_10_21_FN, FN_IP6_11_10, - GP_10_20_FN, FN_IP6_9_8, - GP_10_19_FN, FN_RX1, - GP_10_18_FN, FN_TX1, - GP_10_17_FN, FN_RTS1, - GP_10_16_FN, FN_CTS1, - GP_10_15_FN, FN_SCK1, - GP_10_14_FN, FN_RX0, - GP_10_13_FN, FN_TX0, - GP_10_12_FN, FN_RTS0, - GP_10_11_FN, FN_CTS0, - GP_10_10_FN, FN_SCK0, - GP_10_9_FN, FN_IP6_7, - GP_10_8_FN, FN_IP6_6, - GP_10_7_FN, FN_HCTS1, - GP_10_6_FN, FN_IP6_5, - GP_10_5_FN, FN_IP6_4, - GP_10_4_FN, FN_IP6_3, - GP_10_3_FN, FN_IP6_2, - GP_10_2_FN, FN_HRTS0, - GP_10_1_FN, FN_IP6_1, - GP_10_0_FN, FN_IP6_0 } - }, - { PINMUX_CFG_REG("GPSR11", 0xE6060030, 32, 1) { - 0, 0, - 0, 0, - GP_11_29_FN, FN_AVS2, - GP_11_28_FN, FN_AVS1, - GP_11_27_FN, FN_ADICHS2, - GP_11_26_FN, FN_ADICHS1, - GP_11_25_FN, FN_ADICHS0, - GP_11_24_FN, FN_ADIDATA, - GP_11_23_FN, FN_ADICS_SAMP, - GP_11_22_FN, FN_ADICLK, - GP_11_21_FN, FN_IP7_20, - GP_11_20_FN, FN_IP7_19, - GP_11_19_FN, FN_IP7_18, - GP_11_18_FN, FN_IP7_17, - GP_11_17_FN, FN_IP7_16, - GP_11_16_FN, FN_IP7_15_14, - GP_11_15_FN, FN_IP7_13_12, - GP_11_14_FN, FN_IP7_11_10, - GP_11_13_FN, FN_IP7_9_8, - GP_11_12_FN, FN_SD0_WP, - GP_11_11_FN, FN_SD0_CD, - GP_11_10_FN, FN_SD0_DAT3, - GP_11_9_FN, FN_SD0_DAT2, - GP_11_8_FN, FN_SD0_DAT1, - GP_11_7_FN, FN_SD0_DAT0, - GP_11_6_FN, FN_SD0_CMD, - GP_11_5_FN, FN_SD0_CLK, - GP_11_4_FN, FN_IP7_7, - GP_11_3_FN, FN_IP7_6, - GP_11_2_FN, FN_IP7_5_4, - GP_11_1_FN, FN_IP7_3_2, - GP_11_0_FN, FN_IP7_1_0 } - }, - /* IPSR0 */ - { PINMUX_CFG_REG("IPSR0", 0xE6060040, 32 ,1) { - /* IP0_31 [1] */ - 0, 0, - /* IP0_30 [1] */ - 0, 0, - /* IP0_29 [1] */ - 0, 0, - /* IP0_28 [1] */ - 0, 0, - /* IP0_27 [1] */ - 0, 0, - /* IP0_26 [1] */ - 0, 0, - /* IP0_25 [1] */ - 0, 0, - /* IP0_24 [1] */ - 0, 0, - /* IP0_23 [1] */ - FN_DU0_DB7_C5, 0, - /* IP0_22 [1] */ - FN_DU0_DB6_C4, 0, - /* IP0_21 [1] */ - FN_DU0_DB5_C3, 0, - /* IP0_20 [1] */ - FN_DU0_DB4_C2, 0, - /* IP0_19 [1] */ - FN_DU0_DB3_C1, 0, - /* IP0_18 [1] */ - FN_DU0_DB2_C0, 0, - /* IP0_17 [1] */ - FN_DU0_DB1, 0, - /* IP0_16 [1] */ - FN_DU0_DB0, 0, - /* IP0_15 [1] */ - FN_DU0_DG7_Y3_DATA15, 0, - /* IP0_14 [1] */ - FN_DU0_DG6_Y2_DATA14, 0, - /* IP0_13 [1] */ - FN_DU0_DG5_Y1_DATA13, 0, - /* IP0_12 [1] */ - FN_DU0_DG4_Y0_DATA12, 0, - /* IP0_11 [1] */ - FN_DU0_DG3_C7_DATA11, 0, - /* IP0_10 [1] */ - FN_DU0_DG2_C6_DATA10, 0, - /* IP0_9 [1] */ - FN_DU0_DG1_DATA9, 0, - /* IP0_8 [1] */ - FN_DU0_DG0_DATA8, 0, - /* IP0_7 [1] */ - FN_DU0_DR7_Y9_DATA7, 0, - /* IP0_6 [1] */ - FN_DU0_DR6_Y8_DATA6, 0, - /* IP0_5 [1] */ - FN_DU0_DR5_Y7_DATA5, 0, - /* IP0_4 [1] */ - FN_DU0_DR4_Y6_DATA4, 0, - /* IP0_3 [1] */ - FN_DU0_DR3_Y5_DATA3, 0, - /* IP0_2 [1] */ - FN_DU0_DR2_Y4_DATA2, 0, - /* IP0_1 [1] */ - FN_DU0_DR1_DATA1, 0, - /* IP0_0 [1] */ - FN_DU0_DR0_DATA0, 0, } - }, - /* IPSR1 */ - { PINMUX_CFG_REG("IPSR1", 0xE6060044, 32, 1) { - /* IP1_31 [1] */ - 0, 0, - /* IP1_30 [1] */ - 0, 0, - /* IP1_29 [1] */ - 0, 0, - /* IP1_28 [1] */ - 0, 0, - /* IP1_27 [1] */ - 0, 0, - /* IP1_26 [1] */ - 0, 0, - /* IP1_25 [1] */ - 0, 0, - /* IP1_24 [1] */ - 0, 0, - /* IP1_23 [1] */ - 0, 0, - /* IP1_22 [1] */ - FN_A25, FN_SSL, - /* IP1_21 [1] */ - FN_A24, FN_SPCLK, - /* IP1_20 [1] */ - FN_A23, FN_IO3, - /* IP1_19 [1] */ - FN_A22, FN_IO2, - /* IP1_18 [1] */ - FN_A21, FN_MISO_IO1, - /* IP1_17 [1] */ - FN_A20, FN_MOSI_IO0, - /* IP1_16 [1] */ - FN_DU1_DG7_Y3_DATA11, 0, - /* IP1_15 [1] */ - FN_DU1_DG6_Y2_DATA10, 0, - /* IP1_14 [1] */ - FN_DU1_DG5_Y1_DATA9, 0, - /* IP1_13 [1] */ - FN_DU1_DG4_Y0_DATA8, 0, - /* IP1_12 [1] */ - FN_DU1_DG3_C7_DATA7, 0, - /* IP1_11 [1] */ - FN_DU1_DG2_C6_DATA6, 0, - /* IP1_10 [1] */ - FN_DU1_DR7_DATA5, 0, - /* IP1_9 [1] */ - FN_DU1_DR6_DATA4, 0, - /* IP1_8 [1] */ - FN_DU1_DR5_Y7_DATA3, 0, - /* IP1_7 [1] */ - FN_DU1_DR4_Y6_DATA2, 0, - /* IP1_6 [1] */ - FN_DU1_DR3_Y5_DATA1, 0, - /* IP1_5 [1] */ - FN_DU1_DR2_Y4_DATA0, 0, - /* IP1_4 [1] */ - FN_DU0_CDE, 0, - /* IP1_3 [1] */ - FN_DU0_DISP, 0, - /* IP1_2 [1] */ - FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, 0, - /* IP1_1 [1] */ - FN_DU0_EXVSYNC_DU0_VSYNC, 0, - /* IP1_0 [1] */ - FN_DU0_EXHSYNC_DU0_HSYNC, 0, } - }, - /* IPSR2 */ - { PINMUX_CFG_REG("IPSR2", 0xE6060048, 32, 1) { - /* IP2_31 [1] */ - 0, 0, - /* IP2_30 [1] */ - 0, 0, - /* IP2_29 [1] */ - 0, 0, - /* IP2_28 [1] */ - 0, 0, - /* IP2_27 [1] */ - 0, 0, - /* IP2_26 [1] */ - 0, 0, - /* IP2_25 [1] */ - 0, 0, - /* IP2_24 [1] */ - 0, 0, - /* IP2_23 [1] */ - 0, 0, - /* IP2_22 [1] */ - 0, 0, - /* IP2_21 [1] */ - 0, 0, - /* IP2_20 [1] */ - 0, 0, - /* IP2_19 [1] */ - 0, 0, - /* IP2_18 [1] */ - 0, 0, - /* IP2_17 [1] */ - 0, 0, - /* IP2_16 [1] */ - FN_VI2_FIELD, FN_AVB_TXD2, - /* IP2_15 [1] */ - FN_VI2_D11_Y3, FN_AVB_TXD1, - /* IP2_14 [1] */ - FN_VI2_D10_Y2, FN_AVB_TXD0, - /* IP2_13 [1] */ - FN_VI2_D9_Y1, FN_AVB_TX_EN, - /* IP2_12 [1] */ - FN_VI2_D8_Y0, FN_AVB_TXD3, - /* IP2_11 [1] */ - FN_VI2_D7_C7, FN_AVB_COL, - /* IP2_10 [1] */ - FN_VI2_D6_C6, FN_AVB_RX_ER, - /* IP2_9 [1] */ - FN_VI2_D5_C5, FN_AVB_RXD7, - /* IP2_8 [1] */ - FN_VI2_D4_C4, FN_AVB_RXD6, - /* IP2_7 [1] */ - FN_VI2_D3_C3, FN_AVB_RXD5, - /* IP2_6 [1] */ - FN_VI2_D2_C2, FN_AVB_RXD4, - /* IP2_5 [1] */ - FN_VI2_D1_C1, FN_AVB_RXD3, - /* IP2_4 [1] */ - FN_VI2_D0_C0, FN_AVB_RXD2, - /* IP2_3 [1] */ - FN_VI2_VSYNC, FN_AVB_RXD1, - /* IP2_2 [1] */ - FN_VI2_HSYNC, FN_AVB_RXD0, - /* IP2_1 [1] */ - FN_VI2_CLKENB, FN_AVB_RX_DV, - /* IP2_0 [1] */ - FN_VI2_CLK, FN_AVB_RX_CLK, } - }, - /* IPSR3 */ - { PINMUX_CFG_REG("IPSR3", 0xE606004C, 32, 1) { - /* IP3_31 [1] */ - 0, 0, - /* IP3_30 [1] */ - 0, 0, - /* IP3_29 [1] */ - 0, 0, - /* IP3_28 [1] */ - 0, 0, - /* IP3_27 [1] */ - 0, 0, - /* IP3_26 [1] */ - 0, 0, - /* IP3_25 [1] */ - 0, 0, - /* IP3_24 [1] */ - 0, 0, - /* IP3_23 [1] */ - 0, 0, - /* IP3_22 [1] */ - 0, 0, - /* IP3_21 [1] */ - 0, 0, - /* IP3_20 [1] */ - 0, 0, - /* IP3_19 [1] */ - 0, 0, - /* IP3_18 [1] */ - 0, 0, - /* IP3_17 [1] */ - 0, 0, - /* IP3_16 [1] */ - 0, 0, - /* IP3_15 [1] */ - 0, 0, - /* IP3_14 [1] */ - FN_VI3_D11_Y3, 0, - /* IP3_13 [1] */ - FN_VI3_D9_Y1, FN_AVB_GTXREFCLK, - /* IP3_12 [1] */ - FN_VI3_D8_Y0, FN_AVB_CRS, - /* IP3_11 [1] */ - FN_VI3_D7_C7, FN_AVB_PHY_INT, - /* IP3_10 [1] */ - FN_VI3_D6_C6, FN_AVB_MAGIC, - /* IP3_9 [1] */ - FN_VI3_D5_C5, FN_AVB_LINK, - /* IP3_8 [1] */ - FN_VI3_D4_C4, FN_AVB_MDIO, - /* IP3_7 [1] */ - FN_VI3_D3_C3, FN_AVB_MDC, - /* IP3_6 [1] */ - FN_VI3_D2_C2, FN_AVB_GTX_CLK, - /* IP3_5 [1] */ - FN_VI3_D1_C1, FN_AVB_TX_ER, - /* IP3_4 [1] */ - FN_VI3_D0_C0, FN_AVB_TXD7, - /* IP3_3 [1] */ - FN_VI3_VSYNC, FN_AVB_TXD6, - /* IP3_2 [1] */ - FN_VI3_HSYNC, FN_AVB_TXD5, - /* IP3_1 [1] */ - FN_VI3_CLKENB, FN_AVB_TXD4, - /* IP3_0 [1] */ - FN_VI3_CLK, FN_AVB_TX_CLK,} - }, - /* IPSR4 */ - { PINMUX_CFG_REG_VAR("IPSR4", 0xE6060050, 32, - 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 1, 2, 1, 1) { - /* IP4_31 [1] */ - 0, 0, - /* IP4_30 [1] */ - 0, 0, - /* IP4_29 [1] */ - 0, 0, - /* IP4_28 [1] */ - 0, 0, - /* IP4_27 [1] */ - 0, 0, - /* IP4_26 [1] */ - 0, 0, - /* IP4_25 [1] */ - 0, 0, - /* IP4_24 [1] */ - FN_VI4_FIELD, FN_VI3_D15_Y7, - /* IP4_23 [1] */ - FN_VI4_D11_Y3, FN_VI3_D14_Y6, - /* IP4_22 [1] */ - FN_VI4_D10_Y2, FN_VI3_D13_Y5, - /* IP4_21 [1] */ - FN_VI4_D9_Y1, FN_VI3_D12_Y4, - /* IP4_20_19 [2] */ - FN_VI4_D8_Y0, FN_VI0_D23_R7, FN_VI2_D15_Y7, 0, - /* IP4_18_17 [2] */ - FN_VI4_D7_C7, FN_VI0_D22_R6, FN_VI2_D14_Y6, 0, - /* IP4_16_15 [2] */ - FN_VI4_D6_C6, FN_VI0_D21_R5, FN_VI2_D13_Y5, 0, - /* IP4_14_13 [2] */ - FN_VI4_D5_C5, FN_VI0_D20_R4, FN_VI2_D12_Y4, 0, - /* IP4_12_11 [2] */ - FN_VI4_D4_C4, FN_VI0_D19_R3, FN_VI1_D15_G7_Y7_0, 0, - /* IP4_10_9 [2] */ - FN_VI4_D3_C3, FN_VI0_D18_R2, FN_VI1_D14_G6_Y6_0, 0, - /* IP4_8_7 [2] */ - FN_VI4_D2_C2, FN_VI0_D17_R1, FN_VI1_D13_G5_Y5_0, 0, - /* IP4_6_5 [2] */ - FN_VI4_D1_C1, FN_VI0_D16_R0, FN_VI1_D12_G4_Y4_0, 0, - /* IP4_4 [1] */ - FN_VI4_D0_C0, FN_VI0_D15_G7_Y7, - /* IP4_3_2 [2] */ - FN_VI4_VSYNC, FN_VI0_D14_G6_Y6, 0, 0, - /* IP4_1 [1] */ - FN_VI4_HSYNC, FN_VI0_D13_G5_Y5, - /* IP4_0 [1] */ - FN_VI4_CLKENB, FN_VI0_D12_G4_Y4,} - }, - /* IPSR5 */ - { PINMUX_CFG_REG("IPSR5", 0xE6060054, 32, 1) { - /* IP5_31 [1] */ - 0, 0, - /* IP5_30 [1] */ - 0, 0, - /* IP5_29 [1] */ - 0, 0, - /* IP5_28 [1] */ - 0, 0, - /* IP5_27 [1] */ - 0, 0, - /* IP5_26 [1] */ - 0, 0, - /* IP5_25 [1] */ - 0, 0, - /* IP5_24 [1] */ - 0, 0, - /* IP5_23 [1] */ - 0, 0, - /* IP5_22 [1] */ - 0, 0, - /* IP5_21 [1] */ - 0, 0, - /* IP5_20 [1] */ - 0, 0, - /* IP5_19 [1] */ - 0, 0, - /* IP5_18 [1] */ - 0, 0, - /* IP5_17 [1] */ - 0, 0, - /* IP5_16 [1] */ - 0, 0, - /* IP5_15 [1] */ - 0, 0, - /* IP5_14 [1] */ - 0, 0, - /* IP5_13 [1] */ - 0, 0, - /* IP5_12 [1] */ - 0, 0, - /* IP5_11 [1] */ - FN_VI5_D8_Y0, FN_VI1_D23_R7, - /* IP5_10 [1] */ - FN_VI5_D7_C7, FN_VI1_D22_R6, - /* IP5_9 [1] */ - FN_VI5_D6_C6, FN_VI1_D21_R5, - /* IP5_8 [1] */ - FN_VI5_D5_C5, FN_VI1_D20_R4, - /* IP5_7 [1] */ - FN_VI5_D4_C4, FN_VI1_D19_R3, - /* IP5_6 [1] */ - FN_VI5_D3_C3, FN_VI1_D18_R2, - /* IP5_5 [1] */ - FN_VI5_D2_C2, FN_VI1_D17_R1, - /* IP5_4 [1] */ - FN_VI5_D1_C1, FN_VI1_D16_R0, - /* IP5_3 [1] */ - FN_VI5_D0_C0, FN_VI1_D15_G7_Y7_1, - /* IP5_2 [1] */ - FN_VI5_VSYNC, FN_VI1_D14_G6_Y6_1, - /* IP5_1 [1] */ - FN_VI5_HSYNC, FN_VI1_D13_G5_Y5_1, - /* IP5_0 [1] */ - FN_VI5_CLKENB, FN_VI1_D12_G4_Y4_1,} - }, - /* IPSR6 */ - { PINMUX_CFG_REG_VAR("IPSR6", 0xE6060058, 32, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 2, 1, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1) { - /* IP6_31 [1] */ - 0, 0, - /* IP6_30 [1] */ - 0, 0, - /* IP6_29 [1] */ - 0, 0, - /* IP6_28 [1] */ - 0, 0, - /* IP6_27 [1] */ - 0, 0, - /* IP6_26 [1] */ - 0, 0, - /* IP6_25 [1] */ - 0, 0, - /* IP6_24 [1] */ - 0, 0, - /* IP6_23 [1] */ - 0, 0, - /* IP6_22 [1] */ - 0, 0, - /* IP6_21 [1] */ - 0, 0, - /* IP6_20 [1] */ - 0, 0, - /* IP6_19 [1] */ - 0, 0, - /* IP6_18_17 [2] */ - FN_DREQ1, FN_RX3, 0, 0, - /* IP6_16 [1] */ - FN_TX3, 0, - /* IP6_15_14 [2] */ - FN_DACK1, FN_SCK3, 0, 0, - /* IP6_13_12 [2] */ - FN_DREQ0, FN_RX2, 0, 0, - /* IP6_11_10 [2] */ - FN_DACK0, FN_TX2, 0, 0, - /* IP6_9_8 [2] */ - FN_DRACK0, FN_SCK2, 0, 0, - /* IP6_7 [1] */ - FN_MSIOF1_RXD, FN_HRX1, - /* IP6_6 [1] */ - FN_MSIOF1_TXD, FN_HTX1, - /* IP6_5 [1] */ - FN_MSIOF1_SYNC, FN_HRTS1, - /* IP6_4 [1] */ - FN_MSIOF1_SCK, FN_HSCK1, - /* IP6_3 [1] */ - FN_MSIOF0_RXD, FN_HRX0, - /* IP6_2 [1] */ - FN_MSIOF0_TXD, FN_HTX0, - /* IP6_1 [1] */ - FN_MSIOF0_SYNC, FN_HCTS0, - /* IP6_0 [1] */ - FN_MSIOF0_SCK, FN_HSCK0, } - }, - /* IPSR7 */ - { PINMUX_CFG_REG_VAR("IPSR7", 0xE606005C, 32, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 2, 2, 2, 2, 1, 1, 2, 2, 2) { - /* IP7_31 [1] */ - 0, 0, - /* IP7_30 [1] */ - 0, 0, - /* IP7_29 [1] */ - 0, 0, - /* IP7_28 [1] */ - 0, 0, - /* IP7_27 [1] */ - 0, 0, - /* IP7_26 [1] */ - 0, 0, - /* IP7_25 [1] */ - 0, 0, - /* IP7_24 [1] */ - 0, 0, - /* IP7_23 [1] */ - 0, 0, - /* IP7_22 [1] */ - 0, 0, - /* IP7_21 [1] */ - 0, 0, - /* IP7_20 [1] */ - FN_AUDIO_CLKB, 0, - /* IP7_19 [1] */ - FN_AUDIO_CLKA, 0, - /* IP7_18 [1] */ - FN_AUDIO_CLKOUT, 0, - /* IP7_17 [1] */ - FN_SSI_SDATA4, 0, - /* IP7_16 [1] */ - FN_SSI_WS4, 0, - /* IP7_15_14 [2] */ - FN_SSI_SCK4, FN_TPU0TO3, 0, 0, - /* IP7_13_12 [2] */ - FN_SSI_SDATA3, FN_TPU0TO2, 0, 0, - /* IP7_11_10 [2] */ - FN_SSI_WS3, FN_TPU0TO1, 0, 0, - /* IP7_9_8 [2] */ - FN_SSI_SCK3, FN_TPU0TO0, 0, 0, - /* IP7_7 [1] */ - FN_PWM4, 0, - /* IP7_6 [1] */ - FN_PWM3, 0, - /* IP7_5_4 [2] */ - FN_PWM2, FN_TCLK3, FN_FSO_TOE, 0, - /* IP7_3_2 [2] */ - FN_PWM1, FN_TCLK2, FN_FSO_CFE_1, 0, - /* IP7_1_0 [2] */ - FN_PWM0, FN_TCLK1, FN_FSO_CFE_0, 0, } - }, - /* MOD SEL */ - { PINMUX_CFG_REG("MOD_SEL", 0xE6060140, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - /* MOD_SEL [1] */ - FN_SEL_VI1_0, FN_SEL_VI1_1, } - }, - { PINMUX_CFG_REG("INOUTSEL0", 0xE6050004, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - GP_0_28_IN, GP_0_28_OUT, - GP_0_27_IN, GP_0_27_OUT, - GP_0_26_IN, GP_0_26_OUT, - GP_0_25_IN, GP_0_25_OUT, - GP_0_24_IN, GP_0_24_OUT, - GP_0_23_IN, GP_0_23_OUT, - GP_0_22_IN, GP_0_22_OUT, - GP_0_21_IN, GP_0_21_OUT, - GP_0_20_IN, GP_0_20_OUT, - GP_0_19_IN, GP_0_19_OUT, - GP_0_18_IN, GP_0_18_OUT, - GP_0_17_IN, GP_0_17_OUT, - GP_0_16_IN, GP_0_16_OUT, - GP_0_15_IN, GP_0_15_OUT, - GP_0_14_IN, GP_0_14_OUT, - GP_0_13_IN, GP_0_13_OUT, - GP_0_12_IN, GP_0_12_OUT, - GP_0_11_IN, GP_0_11_OUT, - GP_0_10_IN, GP_0_10_OUT, - GP_0_9_IN, GP_0_9_OUT, - GP_0_8_IN, GP_0_8_OUT, - GP_0_7_IN, GP_0_7_OUT, - GP_0_6_IN, GP_0_6_OUT, - GP_0_5_IN, GP_0_5_OUT, - GP_0_4_IN, GP_0_4_OUT, - GP_0_3_IN, GP_0_3_OUT, - GP_0_2_IN, GP_0_2_OUT, - GP_0_1_IN, GP_0_1_OUT, - GP_0_0_IN, GP_0_0_OUT, } - }, - { PINMUX_CFG_REG("INOUTSEL1", 0xE6051004, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_1_22_IN, GP_1_22_OUT, - GP_1_21_IN, GP_1_21_OUT, - GP_1_20_IN, GP_1_20_OUT, - GP_1_19_IN, GP_1_19_OUT, - GP_1_18_IN, GP_1_18_OUT, - GP_1_17_IN, GP_1_17_OUT, - GP_1_16_IN, GP_1_16_OUT, - GP_1_15_IN, GP_1_15_OUT, - GP_1_14_IN, GP_1_14_OUT, - GP_1_13_IN, GP_1_13_OUT, - GP_1_12_IN, GP_1_12_OUT, - GP_1_11_IN, GP_1_11_OUT, - GP_1_10_IN, GP_1_10_OUT, - GP_1_9_IN, GP_1_9_OUT, - GP_1_8_IN, GP_1_8_OUT, - GP_1_7_IN, GP_1_7_OUT, - GP_1_6_IN, GP_1_6_OUT, - GP_1_5_IN, GP_1_5_OUT, - GP_1_4_IN, GP_1_4_OUT, - GP_1_3_IN, GP_1_3_OUT, - GP_1_2_IN, GP_1_2_OUT, - GP_1_1_IN, GP_1_1_OUT, - GP_1_0_IN, GP_1_0_OUT, } - }, - { PINMUX_CFG_REG("INOUTSEL2", 0xE6052004, 32, 1) { GP_INOUTSEL(2) } }, - { PINMUX_CFG_REG("INOUTSEL3", 0xE6053004, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_3_27_IN, GP_3_27_OUT, - GP_3_26_IN, GP_3_26_OUT, - GP_3_25_IN, GP_3_25_OUT, - GP_3_24_IN, GP_3_24_OUT, - GP_3_23_IN, GP_3_23_OUT, - GP_3_22_IN, GP_3_22_OUT, - GP_3_21_IN, GP_3_21_OUT, - GP_3_20_IN, GP_3_20_OUT, - GP_3_19_IN, GP_3_19_OUT, - GP_3_18_IN, GP_3_18_OUT, - GP_3_17_IN, GP_3_17_OUT, - GP_3_16_IN, GP_3_16_OUT, - GP_3_15_IN, GP_3_15_OUT, - GP_3_14_IN, GP_3_14_OUT, - GP_3_13_IN, GP_3_13_OUT, - GP_3_12_IN, GP_3_12_OUT, - GP_3_11_IN, GP_3_11_OUT, - GP_3_10_IN, GP_3_10_OUT, - GP_3_9_IN, GP_3_9_OUT, - GP_3_8_IN, GP_3_8_OUT, - GP_3_7_IN, GP_3_7_OUT, - GP_3_6_IN, GP_3_6_OUT, - GP_3_5_IN, GP_3_5_OUT, - GP_3_4_IN, GP_3_4_OUT, - GP_3_3_IN, GP_3_3_OUT, - GP_3_2_IN, GP_3_2_OUT, - GP_3_1_IN, GP_3_1_OUT, - GP_3_0_IN, GP_3_0_OUT, } - }, - { PINMUX_CFG_REG("INOUTSEL4", 0xE6054004, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_4_16_IN, GP_4_16_OUT, - GP_4_15_IN, GP_4_15_OUT, - GP_4_14_IN, GP_4_14_OUT, - GP_4_13_IN, GP_4_13_OUT, - GP_4_12_IN, GP_4_12_OUT, - GP_4_11_IN, GP_4_11_OUT, - GP_4_10_IN, GP_4_10_OUT, - GP_4_9_IN, GP_4_9_OUT, - GP_4_8_IN, GP_4_8_OUT, - GP_4_7_IN, GP_4_7_OUT, - GP_4_6_IN, GP_4_6_OUT, - GP_4_5_IN, GP_4_5_OUT, - GP_4_4_IN, GP_4_4_OUT, - GP_4_3_IN, GP_4_3_OUT, - GP_4_2_IN, GP_4_2_OUT, - GP_4_1_IN, GP_4_1_OUT, - GP_4_0_IN, GP_4_0_OUT, } - }, - { PINMUX_CFG_REG("INOUTSEL5", 0xE6055004, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_5_16_IN, GP_5_16_OUT, - GP_5_15_IN, GP_5_15_OUT, - GP_5_14_IN, GP_5_14_OUT, - GP_5_13_IN, GP_5_13_OUT, - GP_5_12_IN, GP_5_12_OUT, - GP_5_11_IN, GP_5_11_OUT, - GP_5_10_IN, GP_5_10_OUT, - GP_5_9_IN, GP_5_9_OUT, - GP_5_8_IN, GP_5_8_OUT, - GP_5_7_IN, GP_5_7_OUT, - GP_5_6_IN, GP_5_6_OUT, - GP_5_5_IN, GP_5_5_OUT, - GP_5_4_IN, GP_5_4_OUT, - GP_5_3_IN, GP_5_3_OUT, - GP_5_2_IN, GP_5_2_OUT, - GP_5_1_IN, GP_5_1_OUT, - GP_5_0_IN, GP_5_0_OUT, } - }, - { PINMUX_CFG_REG("INOUTSEL6", 0xE6055104, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_6_16_IN, GP_6_16_OUT, - GP_6_15_IN, GP_6_15_OUT, - GP_6_14_IN, GP_6_14_OUT, - GP_6_13_IN, GP_6_13_OUT, - GP_6_12_IN, GP_6_12_OUT, - GP_6_11_IN, GP_6_11_OUT, - GP_6_10_IN, GP_6_10_OUT, - GP_6_9_IN, GP_6_9_OUT, - GP_6_8_IN, GP_6_8_OUT, - GP_6_7_IN, GP_6_7_OUT, - GP_6_6_IN, GP_6_6_OUT, - GP_6_5_IN, GP_6_5_OUT, - GP_6_4_IN, GP_6_4_OUT, - GP_6_3_IN, GP_6_3_OUT, - GP_6_2_IN, GP_6_2_OUT, - GP_6_1_IN, GP_6_1_OUT, - GP_6_0_IN, GP_6_0_OUT, } - }, - { PINMUX_CFG_REG("INOUTSEL7", 0xE6055204, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_7_16_IN, GP_7_16_OUT, - GP_7_15_IN, GP_7_15_OUT, - GP_7_14_IN, GP_7_14_OUT, - GP_7_13_IN, GP_7_13_OUT, - GP_7_12_IN, GP_7_12_OUT, - GP_7_11_IN, GP_7_11_OUT, - GP_7_10_IN, GP_7_10_OUT, - GP_7_9_IN, GP_7_9_OUT, - GP_7_8_IN, GP_7_8_OUT, - GP_7_7_IN, GP_7_7_OUT, - GP_7_6_IN, GP_7_6_OUT, - GP_7_5_IN, GP_7_5_OUT, - GP_7_4_IN, GP_7_4_OUT, - GP_7_3_IN, GP_7_3_OUT, - GP_7_2_IN, GP_7_2_OUT, - GP_7_1_IN, GP_7_1_OUT, - GP_7_0_IN, GP_7_0_OUT, } - }, - { PINMUX_CFG_REG("INOUTSEL8", 0xE6055304, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_8_16_IN, GP_8_16_OUT, - GP_8_15_IN, GP_8_15_OUT, - GP_8_14_IN, GP_8_14_OUT, - GP_8_13_IN, GP_8_13_OUT, - GP_8_12_IN, GP_8_12_OUT, - GP_8_11_IN, GP_8_11_OUT, - GP_8_10_IN, GP_8_10_OUT, - GP_8_9_IN, GP_8_9_OUT, - GP_8_8_IN, GP_8_8_OUT, - GP_8_7_IN, GP_8_7_OUT, - GP_8_6_IN, GP_8_6_OUT, - GP_8_5_IN, GP_8_5_OUT, - GP_8_4_IN, GP_8_4_OUT, - GP_8_3_IN, GP_8_3_OUT, - GP_8_2_IN, GP_8_2_OUT, - GP_8_1_IN, GP_8_1_OUT, - GP_8_0_IN, GP_8_0_OUT, } - }, - { PINMUX_CFG_REG("INOUTSEL9", 0xE6055404, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_9_16_IN, GP_9_16_OUT, - GP_9_15_IN, GP_9_15_OUT, - GP_9_14_IN, GP_9_14_OUT, - GP_9_13_IN, GP_9_13_OUT, - GP_9_12_IN, GP_9_12_OUT, - GP_9_11_IN, GP_9_11_OUT, - GP_9_10_IN, GP_9_10_OUT, - GP_9_9_IN, GP_9_9_OUT, - GP_9_8_IN, GP_9_8_OUT, - GP_9_7_IN, GP_9_7_OUT, - GP_9_6_IN, GP_9_6_OUT, - GP_9_5_IN, GP_9_5_OUT, - GP_9_4_IN, GP_9_4_OUT, - GP_9_3_IN, GP_9_3_OUT, - GP_9_2_IN, GP_9_2_OUT, - GP_9_1_IN, GP_9_1_OUT, - GP_9_0_IN, GP_9_0_OUT, } - }, - { PINMUX_CFG_REG("INOUTSEL10", 0xE6055504, 32, 1) { GP_INOUTSEL(10) } }, - { PINMUX_CFG_REG("INOUTSEL11", 0xE6055604, 32, 1) { - 0, 0, - 0, 0, - GP_11_29_IN, GP_11_29_OUT, - GP_11_28_IN, GP_11_28_OUT, - GP_11_27_IN, GP_11_27_OUT, - GP_11_26_IN, GP_11_26_OUT, - GP_11_25_IN, GP_11_25_OUT, - GP_11_24_IN, GP_11_24_OUT, - GP_11_23_IN, GP_11_23_OUT, - GP_11_22_IN, GP_11_22_OUT, - GP_11_21_IN, GP_11_21_OUT, - GP_11_20_IN, GP_11_20_OUT, - GP_11_19_IN, GP_11_19_OUT, - GP_11_18_IN, GP_11_18_OUT, - GP_11_17_IN, GP_11_17_OUT, - GP_11_16_IN, GP_11_16_OUT, - GP_11_15_IN, GP_11_15_OUT, - GP_11_14_IN, GP_11_14_OUT, - GP_11_13_IN, GP_11_13_OUT, - GP_11_12_IN, GP_11_12_OUT, - GP_11_11_IN, GP_11_11_OUT, - GP_11_10_IN, GP_11_10_OUT, - GP_11_9_IN, GP_11_9_OUT, - GP_11_8_IN, GP_11_8_OUT, - GP_11_7_IN, GP_11_7_OUT, - GP_11_6_IN, GP_11_6_OUT, - GP_11_5_IN, GP_11_5_OUT, - GP_11_4_IN, GP_11_4_OUT, - GP_11_3_IN, GP_11_3_OUT, - GP_11_2_IN, GP_11_2_OUT, - GP_11_1_IN, GP_11_1_OUT, - GP_11_0_IN, GP_11_0_OUT, } - }, - { }, -}; - -static struct pinmux_data_reg pinmux_data_regs[] = { - { PINMUX_DATA_REG("INDT0", 0xE6050008, 32) { - 0, 0, 0, GP_0_28_DATA, - GP_0_27_DATA, GP_0_26_DATA, GP_0_25_DATA, GP_0_24_DATA, - GP_0_23_DATA, GP_0_22_DATA, GP_0_21_DATA, GP_0_20_DATA, - GP_0_19_DATA, GP_0_18_DATA, GP_0_17_DATA, GP_0_16_DATA, - GP_0_15_DATA, GP_0_14_DATA, GP_0_13_DATA, GP_0_12_DATA, - GP_0_11_DATA, GP_0_10_DATA, GP_0_9_DATA, GP_0_8_DATA, - GP_0_7_DATA, GP_0_6_DATA, GP_0_5_DATA, GP_0_4_DATA, - GP_0_3_DATA, GP_0_2_DATA, GP_0_1_DATA, GP_0_0_DATA } - }, - { PINMUX_DATA_REG("INDT1", 0xE6051008, 32) { - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, GP_1_22_DATA, GP_1_21_DATA, GP_1_20_DATA, - GP_1_19_DATA, GP_1_18_DATA, GP_1_17_DATA, GP_1_16_DATA, - GP_1_15_DATA, GP_1_14_DATA, GP_1_13_DATA, GP_1_12_DATA, - GP_1_11_DATA, GP_1_10_DATA, GP_1_9_DATA, GP_1_8_DATA, - GP_1_7_DATA, GP_1_6_DATA, GP_1_5_DATA, GP_1_4_DATA, - GP_1_3_DATA, GP_1_2_DATA, GP_1_1_DATA, GP_1_0_DATA } - }, - { PINMUX_DATA_REG("INDT2", 0xE6052008, 32) { GP_INDT(2) } }, - { PINMUX_DATA_REG("INDT3", 0xE6053008, 32) { - 0, 0, 0, 0, - GP_3_27_DATA, GP_3_26_DATA, GP_3_25_DATA, GP_3_24_DATA, - GP_3_23_DATA, GP_3_22_DATA, GP_3_21_DATA, GP_3_20_DATA, - GP_3_19_DATA, GP_3_18_DATA, GP_3_17_DATA, GP_3_16_DATA, - GP_3_15_DATA, GP_3_14_DATA, GP_3_13_DATA, GP_3_12_DATA, - GP_3_11_DATA, GP_3_10_DATA, GP_3_9_DATA, GP_3_8_DATA, - GP_3_7_DATA, GP_3_6_DATA, GP_3_5_DATA, GP_3_4_DATA, - GP_3_3_DATA, GP_3_2_DATA, GP_3_1_DATA, GP_3_0_DATA } - }, - { PINMUX_DATA_REG("INDT4", 0xE6054008, 32) { - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, GP_4_16_DATA, - GP_4_15_DATA, GP_4_14_DATA, GP_4_13_DATA, GP_4_12_DATA, - GP_4_11_DATA, GP_4_10_DATA, GP_4_9_DATA, GP_4_8_DATA, - GP_4_7_DATA, GP_4_6_DATA, GP_4_5_DATA, GP_4_4_DATA, - GP_4_3_DATA, GP_4_2_DATA, GP_4_1_DATA, GP_4_0_DATA } - }, - { PINMUX_DATA_REG("INDT5", 0xE6055008, 32) { - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, GP_5_16_DATA, - GP_5_15_DATA, GP_5_14_DATA, GP_5_13_DATA, GP_5_12_DATA, - GP_5_11_DATA, GP_5_10_DATA, GP_5_9_DATA, GP_5_8_DATA, - GP_5_7_DATA, GP_5_6_DATA, GP_5_5_DATA, GP_5_4_DATA, - GP_5_3_DATA, GP_5_2_DATA, GP_5_1_DATA, GP_5_0_DATA } - }, - { PINMUX_DATA_REG("INDT6", 0xE6055108, 32) { - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, GP_6_16_DATA, - GP_6_15_DATA, GP_6_14_DATA, GP_6_13_DATA, GP_6_12_DATA, - GP_6_11_DATA, GP_6_10_DATA, GP_6_9_DATA, GP_6_8_DATA, - GP_6_7_DATA, GP_6_6_DATA, GP_6_5_DATA, GP_6_4_DATA, - GP_6_3_DATA, GP_6_2_DATA, GP_6_1_DATA, GP_6_0_DATA } - }, - { PINMUX_DATA_REG("INDT7", 0xE6055208, 32) { - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, GP_7_16_DATA, - GP_7_15_DATA, GP_7_14_DATA, GP_7_13_DATA, GP_7_12_DATA, - GP_7_11_DATA, GP_7_10_DATA, GP_7_9_DATA, GP_7_8_DATA, - GP_7_7_DATA, GP_7_6_DATA, GP_7_5_DATA, GP_7_4_DATA, - GP_7_3_DATA, GP_7_2_DATA, GP_7_1_DATA, GP_7_0_DATA } - }, - { PINMUX_DATA_REG("INDT8", 0xE6055308, 32) { - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, GP_8_16_DATA, - GP_8_15_DATA, GP_8_14_DATA, GP_8_13_DATA, GP_8_12_DATA, - GP_8_11_DATA, GP_8_10_DATA, GP_8_9_DATA, GP_8_8_DATA, - GP_8_7_DATA, GP_8_6_DATA, GP_8_5_DATA, GP_8_4_DATA, - GP_8_3_DATA, GP_8_2_DATA, GP_8_1_DATA, GP_8_0_DATA } - }, - { PINMUX_DATA_REG("INDT9", 0xE6055408, 32) { - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, GP_9_16_DATA, - GP_9_15_DATA, GP_9_14_DATA, GP_9_13_DATA, GP_9_12_DATA, - GP_9_11_DATA, GP_9_10_DATA, GP_9_9_DATA, GP_9_8_DATA, - GP_9_7_DATA, GP_9_6_DATA, GP_9_5_DATA, GP_9_4_DATA, - GP_9_3_DATA, GP_9_2_DATA, GP_9_1_DATA, GP_9_0_DATA } - }, - { PINMUX_DATA_REG("INDT10", 0xE6055508, 32) { GP_INDT(10) } }, - { PINMUX_DATA_REG("INDT11", 0xE6055608, 32) { - 0, 0, GP_11_29_DATA, GP_11_28_DATA, - GP_11_27_DATA, GP_11_26_DATA, GP_11_25_DATA, GP_11_24_DATA, - GP_11_23_DATA, GP_11_22_DATA, GP_11_21_DATA, GP_11_20_DATA, - GP_11_19_DATA, GP_11_18_DATA, GP_11_17_DATA, GP_11_16_DATA, - GP_11_15_DATA, GP_11_14_DATA, GP_11_13_DATA, GP_11_12_DATA, - GP_11_11_DATA, GP_11_10_DATA, GP_11_9_DATA, GP_11_8_DATA, - GP_11_7_DATA, GP_11_6_DATA, GP_11_5_DATA, GP_11_4_DATA, - GP_11_3_DATA, GP_11_2_DATA, GP_11_1_DATA, GP_11_0_DATA } - }, - { }, -}; - -static struct pinmux_info r8a7792_pinmux_info = { - .name = "r8a7792_pfc", - - .unlock_reg = 0xe6060000, /* PMMR */ - - .reserved_id = PINMUX_RESERVED, - .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, - .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, - .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, - .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, - .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, - - .first_gpio = GPIO_GP_0_0, - .last_gpio = GPIO_FN_AUDIO_CLKB, - - .gpios = pinmux_gpios, - .cfg_regs = pinmux_config_regs, - .data_regs = pinmux_data_regs, - - .gpio_data = pinmux_data, - .gpio_data_size = ARRAY_SIZE(pinmux_data), -}; - -void r8a7792_pinmux_init(void) -{ - register_pinmux(&r8a7792_pinmux_info); -} - diff --git a/arch/arm/mach-rmobile/pfc-r8a7793.c b/arch/arm/mach-rmobile/pfc-r8a7793.c deleted file mode 100644 index 08cb651b0d1..00000000000 --- a/arch/arm/mach-rmobile/pfc-r8a7793.c +++ /dev/null @@ -1,1925 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * arch/arm/cpu/armv7/rmobile/pfc-r8a7793.c - * - * Copyright (C) 2013 Renesas Electronics Corporation - */ - -#include <common.h> -#include <sh_pfc.h> -#include <asm/gpio.h> - -#define CPU_32_PORT(fn, pfx, sfx) \ - PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \ - PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \ - PORT_1(fn, pfx##31, sfx) - -#define CPU_32_PORT1(fn, pfx, sfx) \ - PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \ - PORT_1(fn, pfx##20, sfx), PORT_1(fn, pfx##21, sfx), \ - PORT_1(fn, pfx##22, sfx), PORT_1(fn, pfx##23, sfx), \ - PORT_1(fn, pfx##24, sfx), PORT_1(fn, pfx##25, sfx) - -/* - * GP_0_0_DATA -> GP_7_25_DATA - * (except for GP1[26],GP1[27],GP1[28],GP1[29]),GP1[30]),GP1[31] - * GP7[26],GP7[27],GP7[28],GP7[29]),GP7[30]),GP7[31]) - */ -#define CPU_ALL_PORT(fn, pfx, sfx) \ - CPU_32_PORT(fn, pfx##_0_, sfx), \ - CPU_32_PORT1(fn, pfx##_1_, sfx), \ - CPU_32_PORT(fn, pfx##_2_, sfx), \ - CPU_32_PORT(fn, pfx##_3_, sfx), \ - CPU_32_PORT(fn, pfx##_4_, sfx), \ - CPU_32_PORT(fn, pfx##_5_, sfx), \ - CPU_32_PORT(fn, pfx##_6_, sfx), \ - CPU_32_PORT1(fn, pfx##_7_, sfx) - -#define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA) -#define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN, \ - GP##pfx##_IN, GP##pfx##_OUT) - -#define _GP_INOUTSEL(pfx, sfx) GP##pfx##_IN, GP##pfx##_OUT -#define _GP_INDT(pfx, sfx) GP##pfx##_DATA - -#define GP_ALL(str) CPU_ALL_PORT(_PORT_ALL, GP, str) -#define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, , unused) -#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, , unused) - - -#define PORT_10_REV(fn, pfx, sfx) \ - PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx), \ - PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx), \ - PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx), \ - PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx), \ - PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx) - -#define CPU_32_PORT_REV(fn, pfx, sfx) \ - PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx), \ - PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx), \ - PORT_10_REV(fn, pfx, sfx) - -#define GP_INOUTSEL(bank) CPU_32_PORT_REV(_GP_INOUTSEL, _##bank##_, unused) -#define GP_INDT(bank) CPU_32_PORT_REV(_GP_INDT, _##bank##_, unused) - -#define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn) -#define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \ - FN_##ipsr, FN_##fn) - -enum { - PINMUX_RESERVED = 0, - - PINMUX_DATA_BEGIN, - GP_ALL(DATA), - PINMUX_DATA_END, - - PINMUX_INPUT_BEGIN, - GP_ALL(IN), - PINMUX_INPUT_END, - - PINMUX_OUTPUT_BEGIN, - GP_ALL(OUT), - PINMUX_OUTPUT_END, - - PINMUX_FUNCTION_BEGIN, - GP_ALL(FN), - - /* GPSR0 */ - FN_IP0_0, FN_IP0_1, FN_IP0_2, FN_IP0_3, FN_IP0_4, FN_IP0_5, - FN_IP0_6, FN_IP0_7, FN_IP0_8, FN_IP0_9, FN_IP0_10, FN_IP0_11, - FN_IP0_12, FN_IP0_13, FN_IP0_14, FN_IP0_15, FN_IP0_18_16, FN_IP0_20_19, - FN_IP0_22_21, FN_IP0_24_23, FN_IP0_26_25, FN_IP0_28_27, FN_IP0_30_29, - FN_IP1_1_0, FN_IP1_3_2, FN_IP1_5_4, FN_IP1_7_6, FN_IP1_10_8, - FN_IP1_13_11, FN_IP1_16_14, FN_IP1_19_17, FN_IP1_22_20, - - /* GPSR1 */ - FN_IP1_25_23, FN_IP1_28_26, FN_IP1_31_29, FN_IP2_2_0, FN_IP2_4_3, - FN_IP2_6_5, FN_IP2_9_7, FN_IP2_12_10, FN_IP2_15_13, FN_IP2_18_16, - FN_IP2_20_19, FN_IP2_22_21, FN_EX_CS0_N, FN_IP2_24_23, FN_IP2_26_25, - FN_IP2_29_27, FN_IP3_2_0, FN_IP3_5_3, FN_IP3_8_6, FN_RD_N, - FN_IP3_11_9, FN_IP3_13_12, FN_IP3_15_14 , FN_IP3_17_16 , FN_IP3_19_18, - FN_IP3_21_20, - - /* GPSR2 */ - FN_IP3_27_25, FN_IP3_30_28, FN_IP4_1_0, FN_IP4_4_2, FN_IP4_7_5, - FN_IP4_9_8, FN_IP4_12_10, FN_IP4_15_13, FN_IP4_18_16, FN_IP4_19, - FN_IP4_20, FN_IP4_21, FN_IP4_23_22, FN_IP4_25_24, FN_IP4_27_26, - FN_IP4_30_28, FN_IP5_2_0, FN_IP5_5_3, FN_IP5_8_6, FN_IP5_11_9, - FN_IP5_14_12, FN_IP5_16_15, FN_IP5_19_17, FN_IP5_21_20, FN_IP5_23_22, - FN_IP5_25_24, FN_IP5_28_26, FN_IP5_31_29, FN_AUDIO_CLKA, FN_IP6_2_0, - FN_IP6_5_3, FN_IP6_7_6, - - /* GPSR3 */ - FN_IP7_5_3, FN_IP7_8_6, FN_IP7_10_9, FN_IP7_12_11, FN_IP7_14_13, - FN_IP7_16_15, FN_IP7_18_17, FN_IP7_20_19, FN_IP7_23_21, FN_IP7_26_24, - FN_IP7_29_27, FN_IP8_2_0, FN_IP8_5_3, FN_IP8_8_6, FN_IP8_11_9, - FN_IP8_14_12, FN_IP8_17_15, FN_IP8_20_18, FN_IP8_23_21, FN_IP8_25_24, - FN_IP8_27_26, FN_IP8_30_28, FN_IP9_2_0, FN_IP9_5_3, FN_IP9_6, FN_IP9_7, - FN_IP9_10_8, FN_IP9_11, FN_IP9_12, FN_IP9_15_13, FN_IP9_16, - FN_IP9_18_17, - - /* GPSR4 */ - FN_VI0_CLK, FN_IP9_20_19, FN_IP9_22_21, FN_IP9_24_23, FN_IP9_26_25, - FN_VI0_DATA0_VI0_B0, FN_VI0_DATA0_VI0_B1, FN_VI0_DATA0_VI0_B2, - FN_IP9_28_27, FN_VI0_DATA0_VI0_B4, FN_VI0_DATA0_VI0_B5, - FN_VI0_DATA0_VI0_B6, FN_VI0_DATA0_VI0_B7, FN_IP9_31_29, FN_IP10_2_0, - FN_IP10_5_3, FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_16_15, - FN_IP10_18_17, FN_IP10_21_19, FN_IP10_24_22, FN_IP10_26_25, - FN_IP10_28_27, FN_IP10_31_29, FN_IP11_2_0, FN_IP11_5_3, FN_IP11_8_6, - FN_IP15_1_0, FN_IP15_3_2, FN_IP15_5_4, - - /* GPSR5 */ - FN_IP11_11_9, FN_IP11_14_12, FN_IP11_16_15, FN_IP11_18_17, FN_IP11_19, - FN_IP11_20, FN_IP11_21, FN_IP11_22, FN_IP11_23, FN_IP11_24, - FN_IP11_25, FN_IP11_26, FN_IP11_27, FN_IP11_29_28, FN_IP11_31_30, - FN_IP12_1_0, FN_IP12_3_2, FN_IP12_6_4, FN_IP12_9_7, FN_IP12_12_10, - FN_IP12_15_13, FN_IP12_17_16, FN_IP12_19_18, FN_IP12_21_20, - FN_IP12_23_22, FN_IP12_26_24, FN_IP12_29_27, FN_IP13_2_0, FN_IP13_4_3, - FN_IP13_6_5, FN_IP13_9_7, FN_IP3_24_22, - - /* GPSR6 */ - FN_IP13_10, FN_IP13_11, FN_IP13_12, FN_IP13_13, FN_IP13_14, - FN_IP13_15, FN_IP13_18_16, FN_IP13_21_19, FN_IP13_22, FN_IP13_24_23, - FN_IP13_25, FN_IP13_26, FN_IP13_27, FN_IP13_30_28, FN_IP14_1_0, - FN_IP14_2, FN_IP14_3, FN_IP14_4, FN_IP14_5, FN_IP14_6, FN_IP14_7, - FN_IP14_10_8, FN_IP14_13_11, FN_IP14_16_14, FN_IP14_19_17, - FN_IP14_22_20, FN_IP14_25_23, FN_IP14_28_26, FN_IP14_31_29, - - /* GPSR7 */ - FN_IP15_17_15, FN_IP15_20_18, FN_IP15_23_21, FN_IP15_26_24, - FN_IP15_29_27, FN_IP16_2_0, FN_IP16_5_3, FN_IP16_7_6, FN_IP16_9_8, - FN_IP16_11_10, FN_IP6_9_8, FN_IP6_11_10, FN_IP6_13_12, FN_IP6_15_14, - FN_IP6_18_16, FN_IP6_20_19, FN_IP6_23_21, FN_IP6_26_24, FN_IP6_29_27, - FN_IP7_2_0, FN_IP15_8_6, FN_IP15_11_9, FN_IP15_14_12, - FN_USB0_PWEN, FN_USB0_OVC, FN_USB1_PWEN, - - /* IPSR 0 -5 */ - - /* IPSR6 */ - FN_AUDIO_CLKB, FN_STP_OPWM_0_B, FN_MSIOF1_SCK_B, - FN_SCIF_CLK, FN_BPFCLK_E, - FN_AUDIO_CLKC, FN_SCIFB0_SCK_C, FN_MSIOF1_SYNC_B, FN_RX2, - FN_SCIFA2_RXD, FN_FMIN_E, - FN_AUDIO_CLKOUT, FN_MSIOF1_SS1_B, FN_TX2, FN_SCIFA2_TXD, - FN_IRQ0, FN_SCIFB1_RXD_D, FN_INTC_IRQ0_N, - FN_IRQ1, FN_SCIFB1_SCK_C, FN_INTC_IRQ1_N, - FN_IRQ2, FN_SCIFB1_TXD_D, FN_INTC_IRQ2_N, - FN_IRQ3, FN_SCL4_C, FN_MSIOF2_TXD_E, FN_INTC_IRQ3_N, - FN_IRQ4, FN_HRX1_C, FN_SDA4_C, FN_MSIOF2_RXD_E, FN_INTC_IRQ4_N, - FN_IRQ5, FN_HTX1_C, FN_SCL1_E, FN_MSIOF2_SCK_E, - FN_IRQ6, FN_HSCK1_C, FN_MSIOF1_SS2_B, FN_SDA1_E, FN_MSIOF2_SYNC_E, - FN_IRQ7, FN_HCTS1_N_C, FN_MSIOF1_TXD_B, FN_GPS_CLK_C, FN_GPS_CLK_D, - FN_IRQ8, FN_HRTS1_N_C, FN_MSIOF1_RXD_B, FN_GPS_SIGN_C, FN_GPS_SIGN_D, - - /* IPSR7 - IPSR10 */ - - /* IPSR11 */ - FN_VI0_R5, FN_VI2_DATA6, FN_GLO_SDATA_B, FN_RX0_C, FN_SDA1_D, - FN_VI0_R6, FN_VI2_DATA7, FN_GLO_SS_B, FN_TX1_C, FN_SCL4_B, - FN_VI0_R7, FN_GLO_RFON_B, FN_RX1_C, FN_CAN0_RX_E, - FN_SDA4_B, FN_HRX1_D, FN_SCIFB0_RXD_D, - FN_VI1_HSYNC_N, FN_AVB_RXD0, FN_TS_SDATA0_B, FN_TX4_B, FN_SCIFA4_TXD_B, - FN_VI1_VSYNC_N, FN_AVB_RXD1, FN_TS_SCK0_B, FN_RX4_B, FN_SCIFA4_RXD_B, - FN_VI1_CLKENB, FN_AVB_RXD2, FN_TS_SDEN0_B, - FN_VI1_FIELD, FN_AVB_RXD3, FN_TS_SPSYNC0_B, - FN_VI1_CLK, FN_AVB_RXD4, FN_VI1_DATA0, FN_AVB_RXD5, - FN_VI1_DATA1, FN_AVB_RXD6, FN_VI1_DATA2, FN_AVB_RXD7, - FN_VI1_DATA3, FN_AVB_RX_ER, FN_VI1_DATA4, FN_AVB_MDIO, - FN_VI1_DATA5, FN_AVB_RX_DV, FN_VI1_DATA6, FN_AVB_MAGIC, - FN_VI1_DATA7, FN_AVB_MDC, - FN_ETH_MDIO, FN_AVB_RX_CLK, FN_SCL2_C, - FN_ETH_CRS_DV, FN_AVB_LINK, FN_SDA2_C, - - /* IPSR12 */ - FN_ETH_RX_ER, FN_AVB_CRS, FN_SCL3, FN_SCL7, - FN_ETH_RXD0, FN_AVB_PHY_INT, FN_SDA3, FN_SDA7, - FN_ETH_RXD1, FN_AVB_GTXREFCLK, FN_CAN0_TX_C, - FN_SCL2_D, FN_MSIOF1_RXD_E, - FN_ETH_LINK, FN_AVB_TXD0, FN_CAN0_RX_C, FN_SDA2_D, FN_MSIOF1_SCK_E, - FN_ETH_REFCLK, FN_AVB_TXD1, FN_SCIFA3_RXD_B, - FN_CAN1_RX_C, FN_MSIOF1_SYNC_E, - FN_ETH_TXD1, FN_AVB_TXD2, FN_SCIFA3_TXD_B, - FN_CAN1_TX_C, FN_MSIOF1_TXD_E, - FN_ETH_TX_EN, FN_AVB_TXD3, FN_TCLK1_B, FN_CAN_CLK_B, - FN_ETH_MAGIC, FN_AVB_TXD4, FN_IETX_C, - FN_ETH_TXD0, FN_AVB_TXD5, FN_IECLK_C, - FN_ETH_MDC, FN_AVB_TXD6, FN_IERX_C, - FN_STP_IVCXO27_0, FN_AVB_TXD7, FN_SCIFB2_TXD_D, - FN_ADIDATA_B, FN_MSIOF0_SYNC_C, - FN_STP_ISCLK_0, FN_AVB_TX_EN, FN_SCIFB2_RXD_D, - FN_ADICS_SAMP_B, FN_MSIOF0_SCK_C, - - /* IPSR13 */ - FN_STP_ISD_0, FN_AVB_TX_ER, FN_SCIFB2_SCK_C, - FN_ADICLK_B, FN_MSIOF0_SS1_C, - FN_STP_ISEN_0, FN_AVB_TX_CLK, FN_ADICHS0_B, FN_MSIOF0_SS2_C, - FN_STP_ISSYNC_0, FN_AVB_COL, FN_ADICHS1_B, FN_MSIOF0_RXD_C, - FN_STP_OPWM_0, FN_AVB_GTX_CLK, FN_PWM0_B, - FN_ADICHS2_B, FN_MSIOF0_TXD_C, - FN_SD0_CLK, FN_SPCLK_B, FN_SD0_CMD, FN_MOSI_IO0_B, - FN_SD0_DATA0, FN_MISO_IO1_B, FN_SD0_DATA1, FN_IO2_B, - FN_SD0_DATA2, FN_IO3_B, FN_SD0_DATA3, FN_SSL_B, - FN_SD0_CD, FN_MMC_D6_B, FN_SIM0_RST_B, FN_CAN0_RX_F, - FN_SCIFA5_TXD_B, FN_TX3_C, - FN_SD0_WP, FN_MMC_D7_B, FN_SIM0_D_B, FN_CAN0_TX_F, - FN_SCIFA5_RXD_B, FN_RX3_C, - FN_SD1_CMD, FN_REMOCON_B, FN_SD1_DATA0, FN_SPEEDIN_B, - FN_SD1_DATA1, FN_IETX_B, FN_SD1_DATA2, FN_IECLK_B, - FN_SD1_DATA3, FN_IERX_B, - FN_SD1_CD, FN_PWM0, FN_TPU_TO0, FN_SCL1_C, - - /* IPSR14 */ - FN_SD1_WP, FN_PWM1_B, FN_SDA1_C, - FN_SD2_CLK, FN_MMC_CLK, FN_SD2_CMD, FN_MMC_CMD, - FN_SD2_DATA0, FN_MMC_D0, FN_SD2_DATA1, FN_MMC_D1, - FN_SD2_DATA2, FN_MMC_D2, FN_SD2_DATA3, FN_MMC_D3, - FN_SD2_CD, FN_MMC_D4, FN_SCL8_C, FN_TX5_B, FN_SCIFA5_TXD_C, - FN_SD2_WP, FN_MMC_D5, FN_SDA8_C, FN_RX5_B, FN_SCIFA5_RXD_C, - FN_MSIOF0_SCK, FN_RX2_C, FN_ADIDATA, FN_VI1_CLK_C, FN_VI1_G0_B, - FN_MSIOF0_SYNC, FN_TX2_C, FN_ADICS_SAMP, FN_VI1_CLKENB_C, FN_VI1_G1_B, - FN_MSIOF0_TXD, FN_ADICLK, FN_VI1_FIELD_C, FN_VI1_G2_B, - FN_MSIOF0_RXD, FN_ADICHS0, FN_VI1_DATA0_C, FN_VI1_G3_B, - FN_MSIOF0_SS1, FN_MMC_D6, FN_ADICHS1, FN_TX0_E, - FN_VI1_HSYNC_N_C, FN_SCL7_C, FN_VI1_G4_B, - FN_MSIOF0_SS2, FN_MMC_D7, FN_ADICHS2, FN_RX0_E, - FN_VI1_VSYNC_N_C, FN_SDA7_C, FN_VI1_G5_B, - - /* IPSR15 */ - FN_SIM0_RST, FN_IETX, FN_CAN1_TX_D, - FN_SIM0_CLK, FN_IECLK, FN_CAN_CLK_C, - FN_SIM0_D, FN_IERX, FN_CAN1_RX_D, - FN_GPS_CLK, FN_DU1_DOTCLKIN_C, FN_AUDIO_CLKB_B, - FN_PWM5_B, FN_SCIFA3_TXD_C, - FN_GPS_SIGN, FN_TX4_C, FN_SCIFA4_TXD_C, FN_PWM5, - FN_VI1_G6_B, FN_SCIFA3_RXD_C, - FN_GPS_MAG, FN_RX4_C, FN_SCIFA4_RXD_C, FN_PWM6, - FN_VI1_G7_B, FN_SCIFA3_SCK_C, - FN_HCTS0_N, FN_SCIFB0_CTS_N, FN_GLO_I0_C, FN_TCLK1, FN_VI1_DATA1_C, - FN_HRTS0_N, FN_SCIFB0_RTS_N, FN_GLO_I1_C, FN_VI1_DATA2_C, - FN_HSCK0, FN_SCIFB0_SCK, FN_GLO_Q0_C, FN_CAN_CLK, - FN_TCLK2, FN_VI1_DATA3_C, - FN_HRX0, FN_SCIFB0_RXD, FN_GLO_Q1_C, FN_CAN0_RX_B, FN_VI1_DATA4_C, - FN_HTX0, FN_SCIFB0_TXD, FN_GLO_SCLK_C, FN_CAN0_TX_B, FN_VI1_DATA5_C, - - /* IPSR16 */ - FN_HRX1, FN_SCIFB1_RXD, FN_VI1_R0_B, FN_GLO_SDATA_C, FN_VI1_DATA6_C, - FN_HTX1, FN_SCIFB1_TXD, FN_VI1_R1_B, FN_GLO_SS_C, FN_VI1_DATA7_C, - FN_HSCK1, FN_SCIFB1_SCK, FN_MLB_CK, FN_GLO_RFON_C, - FN_HCTS1_N, FN_SCIFB1_CTS_N, FN_MLB_SIG, FN_CAN1_TX_B, - FN_HRTS1_N, FN_SCIFB1_RTS_N, FN_MLB_DAT, FN_CAN1_RX_B, - - /* MOD_SEL */ - FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3, - FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2, FN_SEL_SCIFB_3, - FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, FN_SEL_SCIFB2_2, FN_SEL_SCIFB2_3, - FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3, - FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, - FN_SEL_SSI9_0, FN_SEL_SSI9_1, - FN_SEL_SCFA_0, FN_SEL_SCFA_1, - FN_SEL_QSP_0, FN_SEL_QSP_1, - FN_SEL_SSI7_0, FN_SEL_SSI7_1, - FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, FN_SEL_HSCIF1_2, FN_SEL_HSCIF1_3, - FN_SEL_HSCIF1_4, - FN_SEL_VI1_0, FN_SEL_VI1_1, FN_SEL_VI1_2, - FN_SEL_TMU1_0, FN_SEL_TMU1_1, - FN_SEL_LBS_0, FN_SEL_LBS_1, FN_SEL_LBS_2, FN_SEL_LBS_3, - FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3, - FN_SEL_SOF0_0, FN_SEL_SOF0_1, FN_SEL_SOF0_2, - - /* MOD_SEL2 */ - FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, FN_SEL_SCIF0_3, - FN_SEL_SCIF0_4, - FN_SEL_SCIF_0, FN_SEL_SCIF_1, - FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3, - FN_SEL_CAN0_4, FN_SEL_CAN0_5, - FN_SEL_CAN1_0, FN_SEL_CAN1_1, FN_SEL_CAN1_2, FN_SEL_CAN1_3, - FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1, - FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2, - FN_SEL_ADG_0, FN_SEL_ADG_1, - FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3, FN_SEL_FM_4, - FN_SEL_SCIFA5_0, FN_SEL_SCIFA5_1, FN_SEL_SCIFA5_2, - FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, FN_SEL_GPS_3, - FN_SEL_SCIFA4_0, FN_SEL_SCIFA4_1, FN_SEL_SCIFA4_2, - FN_SEL_SCIFA3_0, FN_SEL_SCIFA3_1, FN_SEL_SCIFA3_2, - FN_SEL_SIM_0, FN_SEL_SIM_1, - FN_SEL_SSI8_0, FN_SEL_SSI8_1, - - /* MOD_SEL3 */ - FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1, FN_SEL_HSCIF2_2, FN_SEL_HSCIF2_3, - FN_SEL_CANCLK_0, FN_SEL_CANCLK_1, FN_SEL_CANCLK_2, FN_SEL_CANCLK_3, - FN_SEL_IIC8_0, FN_SEL_IIC8_1, FN_SEL_IIC8_2, - FN_SEL_IIC7_0, FN_SEL_IIC7_1, FN_SEL_IIC7_2, - FN_SEL_IIC4_0, FN_SEL_IIC4_1, FN_SEL_IIC4_2, - FN_SEL_IIC3_0, FN_SEL_IIC3_1, FN_SEL_IIC3_2, FN_SEL_IIC3_3, - FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3, - FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, - FN_SEL_MMC_0, FN_SEL_MMC_1, - FN_SEL_SCIF5_0, FN_SEL_SCIF5_1, - FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3, - FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2, FN_SEL_IIC1_3, - FN_SEL_IIC1_4, - FN_SEL_IIC0_0, FN_SEL_IIC0_1, FN_SEL_IIC0_2, - - /* MOD_SEL4 */ - FN_SEL_SOF1_0, FN_SEL_SOF1_1, FN_SEL_SOF1_2, FN_SEL_SOF1_3, - FN_SEL_SOF1_4, - FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2, - FN_SEL_DIS_0, FN_SEL_DIS_1, FN_SEL_DIS_2, - FN_SEL_RAD_0, FN_SEL_RAD_1, - FN_SEL_RCN_0, FN_SEL_RCN_1, - FN_SEL_RSP_0, FN_SEL_RSP_1, - FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, FN_SEL_SCIF2_3, - FN_SEL_SCIF2_4, - FN_SEL_SOF2_0, FN_SEL_SOF2_1, FN_SEL_SOF2_2, FN_SEL_SOF2_3, - FN_SEL_SOF2_4, - FN_SEL_SSI1_0, FN_SEL_SSI1_1, - FN_SEL_SSI0_0, FN_SEL_SSI0_1, - FN_SEL_SSP_0, FN_SEL_SSP_1, FN_SEL_SSP_2, - PINMUX_FUNCTION_END, - - PINMUX_MARK_BEGIN, - - EX_CS0_N_MARK, RD_N_MARK, - - AUDIO_CLKA_MARK, - - VI0_CLK_MARK, VI0_DATA0_VI0_B0_MARK, VI0_DATA0_VI0_B1_MARK, - VI0_DATA0_VI0_B2_MARK, VI0_DATA0_VI0_B4_MARK, VI0_DATA0_VI0_B5_MARK, - VI0_DATA0_VI0_B6_MARK, VI0_DATA0_VI0_B7_MARK, - - USB0_PWEN_MARK, USB0_OVC_MARK, USB1_PWEN_MARK, - - /* IPSR0 - 5 */ - - /* IPSR6 */ - AUDIO_CLKB_MARK, STP_OPWM_0_B_MARK, MSIOF1_SCK_B_MARK, - SCIF_CLK_MARK, BPFCLK_E_MARK, - AUDIO_CLKC_MARK, SCIFB0_SCK_C_MARK, MSIOF1_SYNC_B_MARK, RX2_MARK, - SCIFA2_RXD_MARK, FMIN_E_MARK, - AUDIO_CLKOUT_MARK, MSIOF1_SS1_B_MARK, TX2_MARK, SCIFA2_TXD_MARK, - IRQ0_MARK, SCIFB1_RXD_D_MARK, INTC_IRQ0_N_MARK, - IRQ1_MARK, SCIFB1_SCK_C_MARK, INTC_IRQ1_N_MARK, - IRQ2_MARK, SCIFB1_TXD_D_MARK, INTC_IRQ2_N_MARK, - IRQ3_MARK, SCL4_C_MARK, MSIOF2_TXD_E_MARK, INTC_IRQ3_N_MARK, - IRQ4_MARK, HRX1_C_MARK, SDA4_C_MARK, - MSIOF2_RXD_E_MARK, INTC_IRQ4_N_MARK, - IRQ5_MARK, HTX1_C_MARK, SCL1_E_MARK, MSIOF2_SCK_E_MARK, - IRQ6_MARK, HSCK1_C_MARK, MSIOF1_SS2_B_MARK, - SDA1_E_MARK, MSIOF2_SYNC_E_MARK, - IRQ7_MARK, HCTS1_N_C_MARK, MSIOF1_TXD_B_MARK, - GPS_CLK_C_MARK, GPS_CLK_D_MARK, - IRQ8_MARK, HRTS1_N_C_MARK, MSIOF1_RXD_B_MARK, - GPS_SIGN_C_MARK, GPS_SIGN_D_MARK, - - /* IPSR7 - 10 */ - - /* IPSR11 */ - VI0_R5_MARK, VI2_DATA6_MARK, GLO_SDATA_B_MARK, RX0_C_MARK, SDA1_D_MARK, - VI0_R6_MARK, VI2_DATA7_MARK, GLO_SS_B_MARK, TX1_C_MARK, SCL4_B_MARK, - VI0_R7_MARK, GLO_RFON_B_MARK, RX1_C_MARK, CAN0_RX_E_MARK, - SDA4_B_MARK, HRX1_D_MARK, SCIFB0_RXD_D_MARK, - VI1_HSYNC_N_MARK, AVB_RXD0_MARK, TS_SDATA0_B_MARK, - TX4_B_MARK, SCIFA4_TXD_B_MARK, - VI1_VSYNC_N_MARK, AVB_RXD1_MARK, TS_SCK0_B_MARK, - RX4_B_MARK, SCIFA4_RXD_B_MARK, - VI1_CLKENB_MARK, AVB_RXD2_MARK, TS_SDEN0_B_MARK, - VI1_FIELD_MARK, AVB_RXD3_MARK, TS_SPSYNC0_B_MARK, - VI1_CLK_MARK, AVB_RXD4_MARK, VI1_DATA0_MARK, AVB_RXD5_MARK, - VI1_DATA1_MARK, AVB_RXD6_MARK, VI1_DATA2_MARK, AVB_RXD7_MARK, - VI1_DATA3_MARK, AVB_RX_ER_MARK, VI1_DATA4_MARK, AVB_MDIO_MARK, - VI1_DATA5_MARK, AVB_RX_DV_MARK, VI1_DATA6_MARK, AVB_MAGIC_MARK, - VI1_DATA7_MARK, AVB_MDC_MARK, - ETH_MDIO_MARK, AVB_RX_CLK_MARK, SCL2_C_MARK, - ETH_CRS_DV_MARK, AVB_LINK_MARK, SDA2_C_MARK, - - /* IPSR12 */ - ETH_RX_ER_MARK, AVB_CRS_MARK, SCL3_MARK, SCL7_MARK, - ETH_RXD0_MARK, AVB_PHY_INT_MARK, SDA3_MARK, SDA7_MARK, - ETH_RXD1_MARK, AVB_GTXREFCLK_MARK, CAN0_TX_C_MARK, - SCL2_D_MARK, MSIOF1_RXD_E_MARK, - ETH_LINK_MARK, AVB_TXD0_MARK, CAN0_RX_C_MARK, - SDA2_D_MARK, MSIOF1_SCK_E_MARK, - ETH_REFCLK_MARK, AVB_TXD1_MARK, SCIFA3_RXD_B_MARK, - CAN1_RX_C_MARK, MSIOF1_SYNC_E_MARK, - ETH_TXD1_MARK, AVB_TXD2_MARK, SCIFA3_TXD_B_MARK, - CAN1_TX_C_MARK, MSIOF1_TXD_E_MARK, - ETH_TX_EN_MARK, AVB_TXD3_MARK, TCLK1_B_MARK, CAN_CLK_B_MARK, - ETH_MAGIC_MARK, AVB_TXD4_MARK, IETX_C_MARK, - ETH_TXD0_MARK, AVB_TXD5_MARK, IECLK_C_MARK, - ETH_MDC_MARK, AVB_TXD6_MARK, IERX_C_MARK, - STP_IVCXO27_0_MARK, AVB_TXD7_MARK, SCIFB2_TXD_D_MARK, - ADIDATA_B_MARK, MSIOF0_SYNC_C_MARK, - STP_ISCLK_0_MARK, AVB_TX_EN_MARK, SCIFB2_RXD_D_MARK, - ADICS_SAMP_B_MARK, MSIOF0_SCK_C_MARK, - - /* IPSR13 */ - STP_ISD_0_MARK, AVB_TX_ER_MARK, SCIFB2_SCK_C_MARK, - ADICLK_B_MARK, MSIOF0_SS1_C_MARK, - STP_ISEN_0_MARK, AVB_TX_CLK_MARK, ADICHS0_B_MARK, MSIOF0_SS2_C_MARK, - STP_ISSYNC_0_MARK, AVB_COL_MARK, ADICHS1_B_MARK, MSIOF0_RXD_C_MARK, - STP_OPWM_0_MARK, AVB_GTX_CLK_MARK, PWM0_B_MARK, - ADICHS2_B_MARK, MSIOF0_TXD_C_MARK, - SD0_CLK_MARK, SPCLK_B_MARK, SD0_CMD_MARK, MOSI_IO0_B_MARK, - SD0_DATA0_MARK, MISO_IO1_B_MARK, SD0_DATA1_MARK, IO2_B_MARK, - SD0_DATA2_MARK, IO3_B_MARK, SD0_DATA3_MARK, SSL_B_MARK, - SD0_CD_MARK, MMC_D6_B_MARK, SIM0_RST_B_MARK, CAN0_RX_F_MARK, - SCIFA5_TXD_B_MARK, TX3_C_MARK, - SD0_WP_MARK, MMC_D7_B_MARK, SIM0_D_B_MARK, CAN0_TX_F_MARK, - SCIFA5_RXD_B_MARK, RX3_C_MARK, - SD1_CMD_MARK, REMOCON_B_MARK, SD1_DATA0_MARK, SPEEDIN_B_MARK, - SD1_DATA1_MARK, IETX_B_MARK, SD1_DATA2_MARK, IECLK_B_MARK, - SD1_DATA3_MARK, IERX_B_MARK, - SD1_CD_MARK, PWM0_MARK, TPU_TO0_MARK, SCL1_C_MARK, - - /* IPSR14 */ - SD1_WP_MARK, PWM1_B_MARK, SDA1_C_MARK, - SD2_CLK_MARK, MMC_CLK_MARK, SD2_CMD_MARK, MMC_CMD_MARK, - SD2_DATA0_MARK, MMC_D0_MARK, SD2_DATA1_MARK, MMC_D1_MARK, - SD2_DATA2_MARK, MMC_D2_MARK, SD2_DATA3_MARK, MMC_D3_MARK, - SD2_CD_MARK, MMC_D4_MARK, SCL8_C_MARK, TX5_B_MARK, SCIFA5_TXD_C_MARK, - SD2_WP_MARK, MMC_D5_MARK, SDA8_C_MARK, RX5_B_MARK, SCIFA5_RXD_C_MARK, - MSIOF0_SCK_MARK, RX2_C_MARK, ADIDATA_MARK, - VI1_CLK_C_MARK, VI1_G0_B_MARK, - MSIOF0_SYNC_MARK, TX2_C_MARK, ADICS_SAMP_MARK, - VI1_CLKENB_C_MARK, VI1_G1_B_MARK, - MSIOF0_TXD_MARK, ADICLK_MARK, VI1_FIELD_C_MARK, VI1_G2_B_MARK, - MSIOF0_RXD_MARK, ADICHS0_MARK, VI1_DATA0_C_MARK, VI1_G3_B_MARK, - MSIOF0_SS1_MARK, MMC_D6_MARK, ADICHS1_MARK, TX0_E_MARK, - VI1_HSYNC_N_C_MARK, SCL7_C_MARK, VI1_G4_B_MARK, - MSIOF0_SS2_MARK, MMC_D7_MARK, ADICHS2_MARK, RX0_E_MARK, - VI1_VSYNC_N_C_MARK, SDA7_C_MARK, VI1_G5_B_MARK, - - /* IPSR15 */ - SIM0_RST_MARK, IETX_MARK, CAN1_TX_D_MARK, - SIM0_CLK_MARK, IECLK_MARK, CAN_CLK_C_MARK, - SIM0_D_MARK, IERX_MARK, CAN1_RX_D_MARK, - GPS_CLK_MARK, DU1_DOTCLKIN_C_MARK, AUDIO_CLKB_B_MARK, - PWM5_B_MARK, SCIFA3_TXD_C_MARK, - GPS_SIGN_MARK, TX4_C_MARK, SCIFA4_TXD_C_MARK, PWM5_MARK, - VI1_G6_B_MARK, SCIFA3_RXD_C_MARK, - GPS_MAG_MARK, RX4_C_MARK, SCIFA4_RXD_C_MARK, PWM6_MARK, - VI1_G7_B_MARK, SCIFA3_SCK_C_MARK, - HCTS0_N_MARK, SCIFB0_CTS_N_MARK, GLO_I0_C_MARK, - TCLK1_MARK, VI1_DATA1_C_MARK, - HRTS0_N_MARK, SCIFB0_RTS_N_MARK, GLO_I1_C_MARK, VI1_DATA2_C_MARK, - HSCK0_MARK, SCIFB0_SCK_MARK, GLO_Q0_C_MARK, CAN_CLK_MARK, - TCLK2_MARK, VI1_DATA3_C_MARK, - HRX0_MARK, SCIFB0_RXD_MARK, GLO_Q1_C_MARK, - CAN0_RX_B_MARK, VI1_DATA4_C_MARK, - HTX0_MARK, SCIFB0_TXD_MARK, GLO_SCLK_C_MARK, - CAN0_TX_B_MARK, VI1_DATA5_C_MARK, - - /* IPSR16 */ - HRX1_MARK, SCIFB1_RXD_MARK, VI1_R0_B_MARK, - GLO_SDATA_C_MARK, VI1_DATA6_C_MARK, - HTX1_MARK, SCIFB1_TXD_MARK, VI1_R1_B_MARK, - GLO_SS_C_MARK, VI1_DATA7_C_MARK, - HSCK1_MARK, SCIFB1_SCK_MARK, MLB_CK_MARK, GLO_RFON_C_MARK, - HCTS1_N_MARK, SCIFB1_CTS_N_MARK, MLB_SIG_MARK, CAN1_TX_B_MARK, - HRTS1_N_MARK, SCIFB1_RTS_N_MARK, MLB_DAT_MARK, CAN1_RX_B_MARK, - PINMUX_MARK_END, -}; - -static pinmux_enum_t pinmux_data[] = { - PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */ - - PINMUX_DATA(EX_CS0_N_MARK, FN_EX_CS0_N), - PINMUX_DATA(RD_N_MARK, FN_RD_N), - PINMUX_DATA(AUDIO_CLKA_MARK, FN_AUDIO_CLKA), - PINMUX_DATA(VI0_CLK_MARK, FN_VI0_CLK), - PINMUX_DATA(VI0_DATA0_VI0_B0_MARK, FN_VI0_DATA0_VI0_B0), - PINMUX_DATA(VI0_DATA0_VI0_B1_MARK, FN_VI0_DATA0_VI0_B1), - PINMUX_DATA(VI0_DATA0_VI0_B2_MARK, FN_VI0_DATA0_VI0_B2), - PINMUX_DATA(VI0_DATA0_VI0_B4_MARK, FN_VI0_DATA0_VI0_B4), - PINMUX_DATA(VI0_DATA0_VI0_B5_MARK, FN_VI0_DATA0_VI0_B5), - PINMUX_DATA(VI0_DATA0_VI0_B6_MARK, FN_VI0_DATA0_VI0_B6), - PINMUX_DATA(VI0_DATA0_VI0_B7_MARK, FN_VI0_DATA0_VI0_B7), - PINMUX_DATA(USB0_PWEN_MARK, FN_USB0_PWEN), - PINMUX_DATA(USB0_OVC_MARK, FN_USB0_OVC), - PINMUX_DATA(USB1_PWEN_MARK, FN_USB1_PWEN), - - /* IPSR0 - 5 */ - - /* IPSR6 */ - PINMUX_IPSR_MODSEL_DATA(IP6_2_0, AUDIO_CLKB, SEL_ADG_0), - PINMUX_IPSR_MODSEL_DATA(IP6_2_0, STP_OPWM_0_B, SEL_SSP_1), - PINMUX_IPSR_MODSEL_DATA(IP6_2_0, MSIOF1_SCK_B, SEL_SOF1_1), - PINMUX_IPSR_MODSEL_DATA(IP6_2_0, SCIF_CLK, SEL_SCIF_0), - PINMUX_IPSR_MODSEL_DATA(IP6_2_0, BPFCLK_E, SEL_FM_4), - PINMUX_IPSR_DATA(IP6_5_3, AUDIO_CLKC), - PINMUX_IPSR_MODSEL_DATA(IP6_5_3, SCIFB0_SCK_C, SEL_SCIFB_2), - PINMUX_IPSR_MODSEL_DATA(IP6_5_3, MSIOF1_SYNC_B, SEL_SOF1_1), - PINMUX_IPSR_MODSEL_DATA(IP6_5_3, RX2, SEL_SCIF2_0), - PINMUX_IPSR_MODSEL_DATA(IP6_5_3, SCIFA2_RXD, SEL_SCIFA2_0), - PINMUX_IPSR_MODSEL_DATA(IP6_5_3, FMIN_E, SEL_FM_4), - PINMUX_IPSR_DATA(IP6_7_6, AUDIO_CLKOUT), - PINMUX_IPSR_MODSEL_DATA(IP6_7_6, MSIOF1_SS1_B, SEL_SOF1_1), - PINMUX_IPSR_MODSEL_DATA(IP6_5_3, TX2, SEL_SCIF2_0), - PINMUX_IPSR_MODSEL_DATA(IP6_7_6, SCIFA2_TXD, SEL_SCIFA2_0), - PINMUX_IPSR_DATA(IP6_9_8, IRQ0), - PINMUX_IPSR_MODSEL_DATA(IP6_9_8, SCIFB1_RXD_D, SEL_SCIFB1_3), - PINMUX_IPSR_DATA(IP6_9_8, INTC_IRQ0_N), - PINMUX_IPSR_DATA(IP6_11_10, IRQ1), - PINMUX_IPSR_MODSEL_DATA(IP6_11_10, SCIFB1_SCK_C, SEL_SCIFB1_2), - PINMUX_IPSR_DATA(IP6_11_10, INTC_IRQ1_N), - PINMUX_IPSR_DATA(IP6_13_12, IRQ2), - PINMUX_IPSR_MODSEL_DATA(IP6_13_12, SCIFB1_TXD_D, SEL_SCIFB1_3), - PINMUX_IPSR_DATA(IP6_13_12, INTC_IRQ2_N), - PINMUX_IPSR_DATA(IP6_15_14, IRQ3), - PINMUX_IPSR_MODSEL_DATA(IP6_15_14, SCL4_C, SEL_IIC4_2), - PINMUX_IPSR_MODSEL_DATA(IP6_15_14, MSIOF2_TXD_E, SEL_SOF2_4), - PINMUX_IPSR_DATA(IP6_15_14, INTC_IRQ4_N), - PINMUX_IPSR_DATA(IP6_18_16, IRQ4), - PINMUX_IPSR_MODSEL_DATA(IP6_18_16, HRX1_C, SEL_HSCIF1_2), - PINMUX_IPSR_MODSEL_DATA(IP6_18_16, SDA4_C, SEL_IIC4_2), - PINMUX_IPSR_MODSEL_DATA(IP6_18_16, MSIOF2_RXD_E, SEL_SOF2_4), - PINMUX_IPSR_DATA(IP6_18_16, INTC_IRQ4_N), - PINMUX_IPSR_DATA(IP6_20_19, IRQ5), - PINMUX_IPSR_MODSEL_DATA(IP6_20_19, HTX1_C, SEL_HSCIF1_2), - PINMUX_IPSR_MODSEL_DATA(IP6_20_19, SCL1_E, SEL_IIC1_4), - PINMUX_IPSR_MODSEL_DATA(IP6_20_19, MSIOF2_SCK_E, SEL_SOF2_4), - PINMUX_IPSR_DATA(IP6_23_21, IRQ6), - PINMUX_IPSR_MODSEL_DATA(IP6_23_21, HSCK1_C, SEL_HSCIF1_2), - PINMUX_IPSR_MODSEL_DATA(IP6_23_21, MSIOF1_SS2_B, SEL_SOF1_1), - PINMUX_IPSR_MODSEL_DATA(IP6_23_21, SDA1_E, SEL_IIC1_4), - PINMUX_IPSR_MODSEL_DATA(IP6_23_21, MSIOF2_SYNC_E, SEL_SOF2_4), - PINMUX_IPSR_DATA(IP6_26_24, IRQ7), - PINMUX_IPSR_MODSEL_DATA(IP6_26_24, HCTS1_N_C, SEL_HSCIF1_2), - PINMUX_IPSR_MODSEL_DATA(IP6_26_24, MSIOF1_TXD_B, SEL_SOF1_1), - PINMUX_IPSR_MODSEL_DATA(IP6_26_24, GPS_CLK_C, SEL_GPS_2), - PINMUX_IPSR_MODSEL_DATA(IP6_26_24, GPS_CLK_D, SEL_GPS_3), - PINMUX_IPSR_DATA(IP6_29_27, IRQ8), - PINMUX_IPSR_MODSEL_DATA(IP6_29_27, HRTS1_N_C, SEL_HSCIF1_2), - PINMUX_IPSR_MODSEL_DATA(IP6_29_27, MSIOF1_RXD_B, SEL_SOF1_1), - PINMUX_IPSR_MODSEL_DATA(IP6_29_27, GPS_SIGN_C, SEL_GPS_2), - PINMUX_IPSR_MODSEL_DATA(IP6_29_27, GPS_SIGN_D, SEL_GPS_3), - - /* IPSR7 - 10 */ - - /* IPSR11 */ - PINMUX_IPSR_DATA(IP11_2_0, VI0_R5), - PINMUX_IPSR_DATA(IP11_2_0, VI2_DATA6), - PINMUX_IPSR_MODSEL_DATA(IP11_2_0, GLO_SDATA_B, SEL_GPS_1), - PINMUX_IPSR_MODSEL_DATA(IP11_2_0, RX0_C, SEL_SCIF0_2), - PINMUX_IPSR_MODSEL_DATA(IP11_2_0, SDA1_D, SEL_IIC1_3), - PINMUX_IPSR_DATA(IP11_5_3, VI0_R6), - PINMUX_IPSR_DATA(IP11_5_3, VI2_DATA7), - PINMUX_IPSR_MODSEL_DATA(IP11_5_3, GLO_SS_B, SEL_GPS_1), - PINMUX_IPSR_MODSEL_DATA(IP11_5_3, TX1_C, SEL_SCIF1_2), - PINMUX_IPSR_MODSEL_DATA(IP11_5_3, SCL4_B, SEL_IIC4_1), - PINMUX_IPSR_DATA(IP11_8_6, VI0_R7), - PINMUX_IPSR_MODSEL_DATA(IP11_8_6, GLO_RFON_B, SEL_GPS_1), - PINMUX_IPSR_MODSEL_DATA(IP11_8_6, RX1_C, SEL_SCIF1_2), - PINMUX_IPSR_MODSEL_DATA(IP11_8_6, CAN0_RX_E, SEL_CAN0_4), - PINMUX_IPSR_MODSEL_DATA(IP11_8_6, SDA4_B, SEL_IIC4_1), - PINMUX_IPSR_MODSEL_DATA(IP11_8_6, HRX1_D, SEL_HSCIF1_3), - PINMUX_IPSR_MODSEL_DATA(IP11_8_6, SCIFB0_RXD_D, SEL_SCIFB_3), - PINMUX_IPSR_MODSEL_DATA(IP11_11_9, VI1_HSYNC_N, SEL_VI1_0), - PINMUX_IPSR_DATA(IP11_11_9, AVB_RXD0), - PINMUX_IPSR_MODSEL_DATA(IP11_11_9, TS_SDATA0_B, SEL_TSIF0_1), - PINMUX_IPSR_MODSEL_DATA(IP11_11_9, TX4_B, SEL_SCIF4_1), - PINMUX_IPSR_MODSEL_DATA(IP11_11_9, SCIFA4_TXD_B, SEL_SCIFA4_1), - PINMUX_IPSR_MODSEL_DATA(IP11_14_12, VI1_VSYNC_N, SEL_VI1_0), - PINMUX_IPSR_DATA(IP11_14_12, AVB_RXD1), - PINMUX_IPSR_MODSEL_DATA(IP11_14_12, TS_SCK0_B, SEL_TSIF0_1), - PINMUX_IPSR_MODSEL_DATA(IP11_14_12, RX4_B, SEL_SCIF4_1), - PINMUX_IPSR_MODSEL_DATA(IP11_14_12, SCIFA4_RXD_B, SEL_SCIFA4_1), - PINMUX_IPSR_MODSEL_DATA(IP11_16_15, VI1_CLKENB, SEL_VI1_0), - PINMUX_IPSR_DATA(IP11_16_15, AVB_RXD2), - PINMUX_IPSR_MODSEL_DATA(IP11_16_15, TS_SDEN0_B, SEL_TSIF0_1), - PINMUX_IPSR_MODSEL_DATA(IP11_18_17, VI1_FIELD, SEL_VI1_0), - PINMUX_IPSR_DATA(IP11_18_17, AVB_RXD3), - PINMUX_IPSR_MODSEL_DATA(IP11_18_17, TS_SPSYNC0_B, SEL_TSIF0_1), - PINMUX_IPSR_MODSEL_DATA(IP11_19, VI1_CLK, SEL_VI1_0), - PINMUX_IPSR_DATA(IP11_19, AVB_RXD4), - PINMUX_IPSR_MODSEL_DATA(IP11_20, VI1_DATA0, SEL_VI1_0), - PINMUX_IPSR_DATA(IP11_20, AVB_RXD5), - PINMUX_IPSR_MODSEL_DATA(IP11_21, VI1_DATA1, SEL_VI1_0), - PINMUX_IPSR_DATA(IP11_21, AVB_RXD6), - PINMUX_IPSR_MODSEL_DATA(IP11_22, VI1_DATA2, SEL_VI1_0), - PINMUX_IPSR_DATA(IP11_22, AVB_RXD7), - PINMUX_IPSR_MODSEL_DATA(IP11_23, VI1_DATA3, SEL_VI1_0), - PINMUX_IPSR_DATA(IP11_23, AVB_RX_ER), - PINMUX_IPSR_MODSEL_DATA(IP11_24, VI1_DATA4, SEL_VI1_0), - PINMUX_IPSR_DATA(IP11_24, AVB_MDIO), - PINMUX_IPSR_MODSEL_DATA(IP11_25, VI1_DATA5, SEL_VI1_0), - PINMUX_IPSR_DATA(IP11_25, AVB_RX_DV), - PINMUX_IPSR_MODSEL_DATA(IP11_26, VI1_DATA6, SEL_VI1_0), - PINMUX_IPSR_DATA(IP11_26, AVB_MAGIC), - PINMUX_IPSR_MODSEL_DATA(IP11_27, VI1_DATA7, SEL_VI1_0), - PINMUX_IPSR_DATA(IP11_27, AVB_MDC), - PINMUX_IPSR_DATA(IP11_29_28, ETH_MDIO), - PINMUX_IPSR_DATA(IP11_29_28, AVB_RX_CLK), - PINMUX_IPSR_MODSEL_DATA(IP11_29_28, SCL2_C, SEL_IIC2_2), - PINMUX_IPSR_DATA(IP11_31_30, ETH_CRS_DV), - PINMUX_IPSR_DATA(IP11_31_30, AVB_LINK), - PINMUX_IPSR_MODSEL_DATA(IP11_31_30, SDA2_C, SEL_IIC2_2), - - /* IPSR12 */ - PINMUX_IPSR_DATA(IP12_1_0, ETH_RX_ER), - PINMUX_IPSR_DATA(IP12_1_0, AVB_CRS), - PINMUX_IPSR_MODSEL_DATA(IP12_1_0, SCL3, SEL_IIC3_0), - PINMUX_IPSR_MODSEL_DATA(IP12_1_0, SCL7, SEL_IIC7_0), - PINMUX_IPSR_DATA(IP12_3_2, ETH_RXD0), - PINMUX_IPSR_DATA(IP12_3_2, AVB_PHY_INT), - PINMUX_IPSR_MODSEL_DATA(IP12_3_2, SDA3, SEL_IIC3_0), - PINMUX_IPSR_MODSEL_DATA(IP12_3_2, SDA7, SEL_IIC7_0), - PINMUX_IPSR_DATA(IP12_6_4, ETH_RXD1), - PINMUX_IPSR_DATA(IP12_6_4, AVB_GTXREFCLK), - PINMUX_IPSR_MODSEL_DATA(IP12_6_4, CAN0_TX_C, SEL_CAN0_2), - PINMUX_IPSR_MODSEL_DATA(IP12_6_4, SCL2_D, SEL_IIC2_3), - PINMUX_IPSR_MODSEL_DATA(IP12_6_4, MSIOF1_RXD_E, SEL_SOF1_4), - PINMUX_IPSR_DATA(IP12_9_7, ETH_LINK), - PINMUX_IPSR_DATA(IP12_9_7, AVB_TXD0), - PINMUX_IPSR_MODSEL_DATA(IP12_9_7, CAN0_RX_C, SEL_CAN0_2), - PINMUX_IPSR_MODSEL_DATA(IP12_9_7, SDA2_D, SEL_IIC2_3), - PINMUX_IPSR_MODSEL_DATA(IP12_9_7, MSIOF1_SCK_E, SEL_SOF1_4), - PINMUX_IPSR_DATA(IP12_12_10, ETH_REFCLK), - PINMUX_IPSR_DATA(IP12_12_10, AVB_TXD1), - PINMUX_IPSR_MODSEL_DATA(IP12_12_10, SCIFA3_RXD_B, SEL_SCIFA3_1), - PINMUX_IPSR_MODSEL_DATA(IP12_12_10, CAN1_RX_C, SEL_CAN1_2), - PINMUX_IPSR_MODSEL_DATA(IP12_12_10, MSIOF1_SYNC_E, SEL_SOF1_4), - PINMUX_IPSR_DATA(IP12_15_13, ETH_TXD1), - PINMUX_IPSR_DATA(IP12_15_13, AVB_TXD2), - PINMUX_IPSR_MODSEL_DATA(IP12_15_13, SCIFA3_TXD_B, SEL_SCIFA3_1), - PINMUX_IPSR_MODSEL_DATA(IP12_15_13, CAN1_TX_C, SEL_CAN1_2), - PINMUX_IPSR_MODSEL_DATA(IP12_15_13, MSIOF1_TXD_E, SEL_SOF1_4), - PINMUX_IPSR_DATA(IP12_17_16, ETH_TX_EN), - PINMUX_IPSR_DATA(IP12_17_16, AVB_TXD3), - PINMUX_IPSR_MODSEL_DATA(IP12_17_16, TCLK1_B, SEL_TMU1_0), - PINMUX_IPSR_MODSEL_DATA(IP12_17_16, CAN_CLK_B, SEL_CANCLK_1), - PINMUX_IPSR_DATA(IP12_19_18, ETH_MAGIC), - PINMUX_IPSR_DATA(IP12_19_18, AVB_TXD4), - PINMUX_IPSR_MODSEL_DATA(IP12_19_18, IETX_C, SEL_IEB_2), - PINMUX_IPSR_DATA(IP12_21_20, ETH_TXD0), - PINMUX_IPSR_DATA(IP12_21_20, AVB_TXD5), - PINMUX_IPSR_MODSEL_DATA(IP12_21_20, IECLK_C, SEL_IEB_2), - PINMUX_IPSR_DATA(IP12_23_22, ETH_MDC), - PINMUX_IPSR_DATA(IP12_23_22, AVB_TXD6), - PINMUX_IPSR_MODSEL_DATA(IP12_23_22, IERX_C, SEL_IEB_2), - PINMUX_IPSR_MODSEL_DATA(IP12_26_24, STP_IVCXO27_0, SEL_SSP_0), - PINMUX_IPSR_DATA(IP12_26_24, AVB_TXD7), - PINMUX_IPSR_MODSEL_DATA(IP12_26_24, SCIFB2_TXD_D, SEL_SCIFB2_3), - PINMUX_IPSR_MODSEL_DATA(IP12_26_24, ADIDATA_B, SEL_RAD_1), - PINMUX_IPSR_MODSEL_DATA(IP12_26_24, MSIOF0_SYNC_C, SEL_SOF0_2), - PINMUX_IPSR_MODSEL_DATA(IP12_29_27, STP_ISCLK_0, SEL_SSP_0), - PINMUX_IPSR_DATA(IP12_29_27, AVB_TX_EN), - PINMUX_IPSR_MODSEL_DATA(IP12_29_27, SCIFB2_RXD_D, SEL_SCIFB2_3), - PINMUX_IPSR_MODSEL_DATA(IP12_29_27, ADICS_SAMP_B, SEL_RAD_1), - PINMUX_IPSR_MODSEL_DATA(IP12_29_27, MSIOF0_SCK_C, SEL_SOF0_2), - - /* IPSR13 */ - PINMUX_IPSR_MODSEL_DATA(IP13_2_0, STP_ISD_0, SEL_SSP_0), - PINMUX_IPSR_DATA(IP13_2_0, AVB_TX_ER), - PINMUX_IPSR_MODSEL_DATA(IP13_2_0, SCIFB2_SCK_C, SEL_SCIFB2_2), - PINMUX_IPSR_MODSEL_DATA(IP13_2_0, ADICLK_B, SEL_RAD_1), - PINMUX_IPSR_MODSEL_DATA(IP13_2_0, MSIOF0_SS1_C, SEL_SOF0_2), - PINMUX_IPSR_MODSEL_DATA(IP13_4_3, STP_ISEN_0, SEL_SSP_0), - PINMUX_IPSR_DATA(IP13_4_3, AVB_TX_CLK), - PINMUX_IPSR_MODSEL_DATA(IP13_4_3, ADICHS0_B, SEL_RAD_1), - PINMUX_IPSR_MODSEL_DATA(IP13_4_3, MSIOF0_SS2_C, SEL_SOF0_2), - PINMUX_IPSR_MODSEL_DATA(IP13_6_5, STP_ISSYNC_0, SEL_SSP_0), - PINMUX_IPSR_DATA(IP13_6_5, AVB_COL), - PINMUX_IPSR_MODSEL_DATA(IP13_6_5, ADICHS1_B, SEL_RAD_1), - PINMUX_IPSR_MODSEL_DATA(IP13_6_5, MSIOF0_RXD_C, SEL_SOF0_2), - PINMUX_IPSR_MODSEL_DATA(IP13_9_7, STP_OPWM_0, SEL_SSP_0), - PINMUX_IPSR_DATA(IP13_9_7, AVB_GTX_CLK), - PINMUX_IPSR_DATA(IP13_9_7, PWM0_B), - PINMUX_IPSR_MODSEL_DATA(IP13_9_7, ADICHS2_B, SEL_RAD_1), - PINMUX_IPSR_MODSEL_DATA(IP13_9_7, MSIOF0_TXD_C, SEL_SOF0_2), - PINMUX_IPSR_DATA(IP13_10, SD0_CLK), - PINMUX_IPSR_MODSEL_DATA(IP13_10, SPCLK_B, SEL_QSP_1), - PINMUX_IPSR_DATA(IP13_11, SD0_CMD), - PINMUX_IPSR_MODSEL_DATA(IP13_11, MOSI_IO0_B, SEL_QSP_1), - PINMUX_IPSR_DATA(IP13_12, SD0_DATA0), - PINMUX_IPSR_MODSEL_DATA(IP13_12, MISO_IO1_B, SEL_QSP_1), - PINMUX_IPSR_DATA(IP13_13, SD0_DATA1), - PINMUX_IPSR_MODSEL_DATA(IP13_13, IO2_B, SEL_QSP_1), - PINMUX_IPSR_DATA(IP13_14, SD0_DATA2), - PINMUX_IPSR_MODSEL_DATA(IP13_14, IO3_B, SEL_QSP_1), - PINMUX_IPSR_DATA(IP13_15, SD0_DATA3), - PINMUX_IPSR_MODSEL_DATA(IP13_15, SSL_B, SEL_QSP_1), - PINMUX_IPSR_DATA(IP13_18_16, SD0_CD), - PINMUX_IPSR_MODSEL_DATA(IP13_18_16, MMC_D6_B, SEL_MMC_1), - PINMUX_IPSR_MODSEL_DATA(IP13_18_16, SIM0_RST_B, SEL_SIM_1), - PINMUX_IPSR_MODSEL_DATA(IP13_18_16, CAN0_RX_F, SEL_CAN0_5), - PINMUX_IPSR_MODSEL_DATA(IP13_18_16, SCIFA5_TXD_B, SEL_SCIFA5_1), - PINMUX_IPSR_MODSEL_DATA(IP13_18_16, TX3_C, SEL_SCIF3_2), - PINMUX_IPSR_DATA(IP13_21_19, SD0_WP), - PINMUX_IPSR_MODSEL_DATA(IP13_21_19, MMC_D7_B, SEL_MMC_1), - PINMUX_IPSR_MODSEL_DATA(IP13_21_19, SIM0_D_B, SEL_SIM_1), - PINMUX_IPSR_MODSEL_DATA(IP13_21_19, CAN0_TX_F, SEL_CAN0_5), - PINMUX_IPSR_MODSEL_DATA(IP13_21_19, SCIFA5_RXD_B, SEL_SCIFA5_1), - PINMUX_IPSR_MODSEL_DATA(IP13_21_19, RX3_C, SEL_SCIF3_2), - PINMUX_IPSR_DATA(IP13_22, SD1_CMD), - PINMUX_IPSR_MODSEL_DATA(IP13_22, REMOCON_B, SEL_RCN_1), - PINMUX_IPSR_DATA(IP13_24_23, SD1_DATA0), - PINMUX_IPSR_MODSEL_DATA(IP13_24_23, SPEEDIN_B, SEL_RSP_1), - PINMUX_IPSR_DATA(IP13_25, SD1_DATA1), - PINMUX_IPSR_MODSEL_DATA(IP13_25, IETX_B, SEL_IEB_1), - PINMUX_IPSR_DATA(IP13_26, SD1_DATA2), - PINMUX_IPSR_MODSEL_DATA(IP13_26, IECLK_B, SEL_IEB_1), - PINMUX_IPSR_DATA(IP13_27, SD1_DATA3), - PINMUX_IPSR_MODSEL_DATA(IP13_27, IERX_B, SEL_IEB_1), - PINMUX_IPSR_DATA(IP13_30_28, SD1_CD), - PINMUX_IPSR_DATA(IP13_30_28, PWM0), - PINMUX_IPSR_DATA(IP13_30_28, TPU_TO0), - PINMUX_IPSR_MODSEL_DATA(IP13_30_28, SCL1_C, SEL_IIC1_2), - - /* IPSR14 */ - PINMUX_IPSR_DATA(IP14_1_0, SD1_WP), - PINMUX_IPSR_DATA(IP14_1_0, PWM1_B), - PINMUX_IPSR_MODSEL_DATA(IP14_1_0, SDA1_C, SEL_IIC1_2), - PINMUX_IPSR_DATA(IP14_2, SD2_CLK), - PINMUX_IPSR_DATA(IP14_2, MMC_CLK), - PINMUX_IPSR_DATA(IP14_3, SD2_CMD), - PINMUX_IPSR_DATA(IP14_3, MMC_CMD), - PINMUX_IPSR_DATA(IP14_4, SD2_DATA0), - PINMUX_IPSR_DATA(IP14_4, MMC_D0), - PINMUX_IPSR_DATA(IP14_5, SD2_DATA1), - PINMUX_IPSR_DATA(IP14_5, MMC_D1), - PINMUX_IPSR_DATA(IP14_6, SD2_DATA2), - PINMUX_IPSR_DATA(IP14_6, MMC_D2), - PINMUX_IPSR_DATA(IP14_7, SD2_DATA3), - PINMUX_IPSR_DATA(IP14_7, MMC_D3), - PINMUX_IPSR_DATA(IP14_10_8, SD2_CD), - PINMUX_IPSR_DATA(IP14_10_8, MMC_D4), - PINMUX_IPSR_MODSEL_DATA(IP14_10_8, SCL8_C, SEL_IIC8_2), - PINMUX_IPSR_MODSEL_DATA(IP14_10_8, TX5_B, SEL_SCIF5_1), - PINMUX_IPSR_MODSEL_DATA(IP14_10_8, SCIFA5_TXD_C, SEL_SCIFA5_2), - PINMUX_IPSR_DATA(IP14_13_11, SD2_WP), - PINMUX_IPSR_DATA(IP14_13_11, MMC_D5), - PINMUX_IPSR_MODSEL_DATA(IP14_13_11, SDA8_C, SEL_IIC8_2), - PINMUX_IPSR_MODSEL_DATA(IP14_13_11, RX5_B, SEL_SCIF5_1), - PINMUX_IPSR_MODSEL_DATA(IP14_13_11, SCIFA5_RXD_C, SEL_SCIFA5_2), - PINMUX_IPSR_MODSEL_DATA(IP14_16_14, MSIOF0_SCK, SEL_SOF0_0), - PINMUX_IPSR_MODSEL_DATA(IP14_16_14, RX2_C, SEL_SCIF2_2), - PINMUX_IPSR_MODSEL_DATA(IP14_16_14, ADIDATA, SEL_RAD_0), - PINMUX_IPSR_MODSEL_DATA(IP14_16_14, VI1_CLK_C, SEL_VI1_2), - PINMUX_IPSR_DATA(IP14_16_14, VI1_G0_B), - PINMUX_IPSR_MODSEL_DATA(IP14_19_17, MSIOF0_SYNC, SEL_SOF0_0), - PINMUX_IPSR_MODSEL_DATA(IP14_19_17, TX2_C, SEL_SCIF2_2), - PINMUX_IPSR_MODSEL_DATA(IP14_19_17, ADICS_SAMP, SEL_RAD_0), - PINMUX_IPSR_MODSEL_DATA(IP14_19_17, VI1_CLKENB_C, SEL_VI1_2), - PINMUX_IPSR_DATA(IP14_19_17, VI1_G1_B), - PINMUX_IPSR_MODSEL_DATA(IP14_22_20, MSIOF0_TXD, SEL_SOF0_0), - PINMUX_IPSR_MODSEL_DATA(IP14_22_20, ADICLK, SEL_RAD_0), - PINMUX_IPSR_MODSEL_DATA(IP14_22_20, VI1_FIELD_C, SEL_VI1_2), - PINMUX_IPSR_DATA(IP14_22_20, VI1_G2_B), - PINMUX_IPSR_MODSEL_DATA(IP14_25_23, MSIOF0_RXD, SEL_SOF0_0), - PINMUX_IPSR_MODSEL_DATA(IP14_25_23, ADICHS0, SEL_RAD_0), - PINMUX_IPSR_MODSEL_DATA(IP14_25_23, VI1_DATA0_C, SEL_VI1_2), - PINMUX_IPSR_DATA(IP14_25_23, VI1_G3_B), - PINMUX_IPSR_MODSEL_DATA(IP14_28_26, MSIOF0_SS1, SEL_SOF0_0), - PINMUX_IPSR_MODSEL_DATA(IP14_28_26, MMC_D6, SEL_MMC_0), - PINMUX_IPSR_MODSEL_DATA(IP14_28_26, ADICHS1, SEL_RAD_0), - PINMUX_IPSR_MODSEL_DATA(IP14_28_26, TX0_E, SEL_SCIF0_4), - PINMUX_IPSR_MODSEL_DATA(IP14_28_26, VI1_HSYNC_N_C, SEL_VI1_2), - PINMUX_IPSR_MODSEL_DATA(IP14_28_26, SCL7_C, SEL_IIC7_2), - PINMUX_IPSR_DATA(IP14_28_26, VI1_G4_B), - PINMUX_IPSR_MODSEL_DATA(IP14_31_29, MSIOF0_SS2, SEL_SOF0_0), - PINMUX_IPSR_MODSEL_DATA(IP14_31_29, MMC_D7, SEL_MMC_0), - PINMUX_IPSR_MODSEL_DATA(IP14_31_29, ADICHS2, SEL_RAD_0), - PINMUX_IPSR_MODSEL_DATA(IP14_31_29, RX0_E, SEL_SCIF0_4), - PINMUX_IPSR_MODSEL_DATA(IP14_31_29, VI1_VSYNC_N_C, SEL_VI1_2), - PINMUX_IPSR_MODSEL_DATA(IP14_31_29, SDA7_C, SEL_IIC7_2), - PINMUX_IPSR_DATA(IP14_31_29, VI1_G5_B), - - /* IPSR15 */ - PINMUX_IPSR_MODSEL_DATA(IP15_1_0, SIM0_RST, SEL_SIM_0), - PINMUX_IPSR_MODSEL_DATA(IP15_1_0, IETX, SEL_IEB_0), - PINMUX_IPSR_MODSEL_DATA(IP15_1_0, CAN1_TX_D, SEL_CAN1_3), - PINMUX_IPSR_DATA(IP15_3_2, SIM0_CLK), - PINMUX_IPSR_MODSEL_DATA(IP15_3_2, IECLK, SEL_IEB_0), - PINMUX_IPSR_MODSEL_DATA(IP15_3_2, CAN_CLK_C, SEL_CANCLK_2), - PINMUX_IPSR_MODSEL_DATA(IP15_5_4, SIM0_D, SEL_SIM_0), - PINMUX_IPSR_MODSEL_DATA(IP15_5_4, IERX, SEL_IEB_0), - PINMUX_IPSR_MODSEL_DATA(IP15_5_4, CAN1_RX_D, SEL_CAN1_3), - PINMUX_IPSR_MODSEL_DATA(IP15_8_6, GPS_CLK, SEL_GPS_0), - PINMUX_IPSR_MODSEL_DATA(IP15_8_6, DU1_DOTCLKIN_C, SEL_DIS_2), - PINMUX_IPSR_MODSEL_DATA(IP15_8_6, AUDIO_CLKB_B, SEL_ADG_1), - PINMUX_IPSR_DATA(IP15_8_6, PWM5_B), - PINMUX_IPSR_MODSEL_DATA(IP15_8_6, SCIFA3_TXD_C, SEL_SCIFA3_2), - PINMUX_IPSR_MODSEL_DATA(IP15_11_9, GPS_SIGN, SEL_GPS_0), - PINMUX_IPSR_MODSEL_DATA(IP15_11_9, TX4_C, SEL_SCIF4_2), - PINMUX_IPSR_MODSEL_DATA(IP15_11_9, SCIFA4_TXD_C, SEL_SCIFA4_2), - PINMUX_IPSR_DATA(IP15_11_9, PWM5), - PINMUX_IPSR_DATA(IP15_11_9, VI1_G6_B), - PINMUX_IPSR_MODSEL_DATA(IP15_11_9, SCIFA3_RXD_C, SEL_SCIFA3_2), - PINMUX_IPSR_MODSEL_DATA(IP15_14_12, GPS_MAG, SEL_GPS_0), - PINMUX_IPSR_MODSEL_DATA(IP15_14_12, RX4_C, SEL_SCIF4_2), - PINMUX_IPSR_MODSEL_DATA(IP15_14_12, SCIFA4_RXD_C, SEL_SCIFA4_2), - PINMUX_IPSR_DATA(IP15_14_12, PWM6), - PINMUX_IPSR_DATA(IP15_14_12, VI1_G7_B), - PINMUX_IPSR_MODSEL_DATA(IP15_14_12, SCIFA3_SCK_C, SEL_SCIFA3_2), - PINMUX_IPSR_MODSEL_DATA(IP15_17_15, HCTS0_N, SEL_HSCIF0_0), - PINMUX_IPSR_MODSEL_DATA(IP15_17_15, SCIFB0_CTS_N, SEL_SCIFB_0), - PINMUX_IPSR_MODSEL_DATA(IP15_17_15, GLO_I0_C, SEL_GPS_2), - PINMUX_IPSR_MODSEL_DATA(IP15_17_15, TCLK1, SEL_TMU1_0), - PINMUX_IPSR_MODSEL_DATA(IP15_17_15, VI1_DATA1_C, SEL_VI1_2), - PINMUX_IPSR_MODSEL_DATA(IP15_20_18, HRTS0_N, SEL_HSCIF0_0), - PINMUX_IPSR_MODSEL_DATA(IP15_20_18, SCIFB0_RTS_N, SEL_SCIFB_0), - PINMUX_IPSR_MODSEL_DATA(IP15_20_18, GLO_I1_C, SEL_GPS_2), - PINMUX_IPSR_MODSEL_DATA(IP15_20_18, VI1_DATA2_C, SEL_VI1_2), - PINMUX_IPSR_MODSEL_DATA(IP15_23_21, HSCK0, SEL_HSCIF0_0), - PINMUX_IPSR_MODSEL_DATA(IP15_23_21, SCIFB0_SCK, SEL_SCIFB_0), - PINMUX_IPSR_MODSEL_DATA(IP15_23_21, GLO_Q0_C, SEL_GPS_2), - PINMUX_IPSR_MODSEL_DATA(IP15_23_21, CAN_CLK, SEL_CANCLK_0), - PINMUX_IPSR_DATA(IP15_23_21, TCLK2), - PINMUX_IPSR_MODSEL_DATA(IP15_23_21, VI1_DATA3_C, SEL_VI1_2), - PINMUX_IPSR_MODSEL_DATA(IP15_26_24, HRX0, SEL_HSCIF0_0), - PINMUX_IPSR_MODSEL_DATA(IP15_26_24, SCIFB0_RXD, SEL_SCIFB_0), - PINMUX_IPSR_MODSEL_DATA(IP15_26_24, GLO_Q1_C, SEL_GPS_2), - PINMUX_IPSR_MODSEL_DATA(IP15_26_24, CAN0_RX_B, SEL_CAN0_1), - PINMUX_IPSR_MODSEL_DATA(IP15_26_24, VI1_DATA4_C, SEL_VI1_2), - PINMUX_IPSR_MODSEL_DATA(IP15_29_27, HTX0, SEL_HSCIF0_0), - PINMUX_IPSR_MODSEL_DATA(IP15_29_27, SCIFB0_TXD, SEL_SCIFB_0), - PINMUX_IPSR_MODSEL_DATA(IP15_29_27, GLO_SCLK_C, SEL_GPS_2), - PINMUX_IPSR_MODSEL_DATA(IP15_29_27, CAN0_TX_B, SEL_CAN0_1), - PINMUX_IPSR_MODSEL_DATA(IP15_29_27, VI1_DATA5_C, SEL_VI1_2), - - /* IPSR16 */ - PINMUX_IPSR_MODSEL_DATA(IP16_2_0, HRX1, SEL_HSCIF1_0), - PINMUX_IPSR_MODSEL_DATA(IP16_2_0, SCIFB1_RXD, SEL_SCIFB1_0), - PINMUX_IPSR_DATA(IP16_2_0, VI1_R0_B), - PINMUX_IPSR_MODSEL_DATA(IP16_2_0, GLO_SDATA_C, SEL_GPS_2), - PINMUX_IPSR_MODSEL_DATA(IP16_2_0, VI1_DATA6_C, SEL_VI1_2), - PINMUX_IPSR_MODSEL_DATA(IP16_5_3, HTX1, SEL_HSCIF1_0), - PINMUX_IPSR_MODSEL_DATA(IP16_5_3, SCIFB1_TXD, SEL_SCIFB1_0), - PINMUX_IPSR_DATA(IP16_5_3, VI1_R1_B), - PINMUX_IPSR_MODSEL_DATA(IP16_5_3, GLO_SS_C, SEL_GPS_2), - PINMUX_IPSR_MODSEL_DATA(IP16_5_3, VI1_DATA7_C, SEL_VI1_2), - PINMUX_IPSR_MODSEL_DATA(IP16_7_6, HSCK1, SEL_HSCIF1_0), - PINMUX_IPSR_MODSEL_DATA(IP16_7_6, SCIFB1_SCK, SEL_SCIFB1_0), - PINMUX_IPSR_DATA(IP16_7_6, MLB_CK), - PINMUX_IPSR_MODSEL_DATA(IP16_7_6, GLO_RFON_C, SEL_GPS_2), - PINMUX_IPSR_MODSEL_DATA(IP16_9_8, HCTS1_N, SEL_HSCIF1_0), - PINMUX_IPSR_DATA(IP16_9_8, SCIFB1_CTS_N), - PINMUX_IPSR_DATA(IP16_9_8, MLB_SIG), - PINMUX_IPSR_MODSEL_DATA(IP16_9_8, CAN1_TX_B, SEL_CAN1_1), - PINMUX_IPSR_MODSEL_DATA(IP16_11_10, HRTS1_N, SEL_HSCIF1_0), - PINMUX_IPSR_DATA(IP16_11_10, SCIFB1_RTS_N), - PINMUX_IPSR_DATA(IP16_11_10, MLB_DAT), - PINMUX_IPSR_MODSEL_DATA(IP16_11_10, CAN1_RX_B, SEL_CAN1_1), -}; - -static struct pinmux_gpio pinmux_gpios[] = { - PINMUX_GPIO_GP_ALL(), - - GPIO_FN(EX_CS0_N), GPIO_FN(RD_N), GPIO_FN(AUDIO_CLKA), - GPIO_FN(VI0_CLK), GPIO_FN(VI0_DATA0_VI0_B0), - GPIO_FN(VI0_DATA0_VI0_B1), GPIO_FN(VI0_DATA0_VI0_B2), - GPIO_FN(VI0_DATA0_VI0_B4), GPIO_FN(VI0_DATA0_VI0_B5), - GPIO_FN(VI0_DATA0_VI0_B6), GPIO_FN(VI0_DATA0_VI0_B7), - GPIO_FN(USB0_PWEN), GPIO_FN(USB0_OVC), GPIO_FN(USB1_PWEN), - - /* IPSR0 - 5 */ - - /* IPSR6 */ - GPIO_FN(AUDIO_CLKB), GPIO_FN(STP_OPWM_0_B), GPIO_FN(MSIOF1_SCK_B), - GPIO_FN(SCIF_CLK), GPIO_FN(BPFCLK_E), - GPIO_FN(AUDIO_CLKC), GPIO_FN(SCIFB0_SCK_C), - GPIO_FN(MSIOF1_SYNC_B), GPIO_FN(RX2), - GPIO_FN(SCIFA2_RXD), GPIO_FN(FMIN_E), - GPIO_FN(AUDIO_CLKOUT), GPIO_FN(MSIOF1_SS1_B), - GPIO_FN(TX2), GPIO_FN(SCIFA2_TXD), - GPIO_FN(IRQ0), GPIO_FN(SCIFB1_RXD_D), GPIO_FN(INTC_IRQ0_N), - GPIO_FN(IRQ1), GPIO_FN(SCIFB1_SCK_C), GPIO_FN(INTC_IRQ1_N), - GPIO_FN(IRQ2), GPIO_FN(SCIFB1_TXD_D), GPIO_FN(INTC_IRQ2_N), - GPIO_FN(IRQ3), GPIO_FN(SCL4_C), - GPIO_FN(MSIOF2_TXD_E), GPIO_FN(INTC_IRQ3_N), - GPIO_FN(IRQ4), GPIO_FN(HRX1_C), GPIO_FN(SDA4_C), - GPIO_FN(MSIOF2_RXD_E), GPIO_FN(INTC_IRQ4_N), - GPIO_FN(IRQ5), GPIO_FN(HTX1_C), GPIO_FN(SCL1_E), GPIO_FN(MSIOF2_SCK_E), - GPIO_FN(IRQ6), GPIO_FN(HSCK1_C), GPIO_FN(MSIOF1_SS2_B), - GPIO_FN(SDA1_E), GPIO_FN(MSIOF2_SYNC_E), - GPIO_FN(IRQ7), GPIO_FN(HCTS1_N_C), GPIO_FN(MSIOF1_TXD_B), - GPIO_FN(GPS_CLK_C), GPIO_FN(GPS_CLK_D), - GPIO_FN(IRQ8), GPIO_FN(HRTS1_N_C), GPIO_FN(MSIOF1_RXD_B), - GPIO_FN(GPS_SIGN_C), GPIO_FN(GPS_SIGN_D), - - /* IPSR7 - 10 */ - - /* IPSR11 */ - GPIO_FN(VI0_R5), GPIO_FN(VI2_DATA6), GPIO_FN(GLO_SDATA_B), - GPIO_FN(RX0_C), GPIO_FN(SDA1_D), - GPIO_FN(VI0_R6), GPIO_FN(VI2_DATA7), - GPIO_FN(GLO_SS_B), GPIO_FN(TX1_C), GPIO_FN(SCL4_B), - GPIO_FN(VI0_R7), GPIO_FN(GLO_RFON_B), - GPIO_FN(RX1_C), GPIO_FN(CAN0_RX_E), - GPIO_FN(SDA4_B), GPIO_FN(HRX1_D), GPIO_FN(SCIFB0_RXD_D), - GPIO_FN(VI1_HSYNC_N), GPIO_FN(AVB_RXD0), GPIO_FN(TS_SDATA0_B), - GPIO_FN(TX4_B), GPIO_FN(SCIFA4_TXD_B), - GPIO_FN(VI1_VSYNC_N), GPIO_FN(AVB_RXD1), GPIO_FN(TS_SCK0_B), - GPIO_FN(RX4_B), GPIO_FN(SCIFA4_RXD_B), - GPIO_FN(VI1_CLKENB), GPIO_FN(AVB_RXD2), GPIO_FN(TS_SDEN0_B), - GPIO_FN(VI1_FIELD), GPIO_FN(AVB_RXD3), GPIO_FN(TS_SPSYNC0_B), - GPIO_FN(VI1_CLK), GPIO_FN(AVB_RXD4), - GPIO_FN(VI1_DATA0), GPIO_FN(AVB_RXD5), - GPIO_FN(VI1_DATA1), GPIO_FN(AVB_RXD6), - GPIO_FN(VI1_DATA2), GPIO_FN(AVB_RXD7), - GPIO_FN(VI1_DATA3), GPIO_FN(AVB_RX_ER), - GPIO_FN(VI1_DATA4), GPIO_FN(AVB_MDIO), - GPIO_FN(VI1_DATA5), GPIO_FN(AVB_RX_DV), - GPIO_FN(VI1_DATA6), GPIO_FN(AVB_MAGIC), - GPIO_FN(VI1_DATA7), GPIO_FN(AVB_MDC), - GPIO_FN(ETH_MDIO), GPIO_FN(AVB_RX_CLK), GPIO_FN(SCL2_C), - GPIO_FN(ETH_CRS_DV), GPIO_FN(AVB_LINK), GPIO_FN(SDA2_C), - - /* IPSR12 */ - GPIO_FN(ETH_RX_ER), GPIO_FN(AVB_CRS), GPIO_FN(SCL3), GPIO_FN(SCL7), - GPIO_FN(ETH_RXD0), GPIO_FN(AVB_PHY_INT), GPIO_FN(SDA3), GPIO_FN(SDA7), - GPIO_FN(ETH_RXD1), GPIO_FN(AVB_GTXREFCLK), GPIO_FN(CAN0_TX_C), - GPIO_FN(SCL2_D), GPIO_FN(MSIOF1_RXD_E), - GPIO_FN(ETH_LINK), GPIO_FN(AVB_TXD0), GPIO_FN(CAN0_RX_C), - GPIO_FN(SDA2_D), GPIO_FN(MSIOF1_SCK_E), - GPIO_FN(ETH_REFCLK), GPIO_FN(AVB_TXD1), GPIO_FN(SCIFA3_RXD_B), - GPIO_FN(CAN1_RX_C), GPIO_FN(MSIOF1_SYNC_E), - GPIO_FN(ETH_TXD1), GPIO_FN(AVB_TXD2), GPIO_FN(SCIFA3_TXD_B), - GPIO_FN(CAN1_TX_C), GPIO_FN(MSIOF1_TXD_E), - GPIO_FN(ETH_TX_EN), GPIO_FN(AVB_TXD3), - GPIO_FN(TCLK1_B), GPIO_FN(CAN_CLK_B), - GPIO_FN(ETH_MAGIC), GPIO_FN(AVB_TXD4), GPIO_FN(IETX_C), - GPIO_FN(ETH_TXD0), GPIO_FN(AVB_TXD5), GPIO_FN(IECLK_C), - GPIO_FN(ETH_MDC), GPIO_FN(AVB_TXD6), GPIO_FN(IERX_C), - GPIO_FN(STP_IVCXO27_0), GPIO_FN(AVB_TXD7), GPIO_FN(SCIFB2_TXD_D), - GPIO_FN(ADIDATA_B), GPIO_FN(MSIOF0_SYNC_C), - GPIO_FN(STP_ISCLK_0), GPIO_FN(AVB_TX_EN), GPIO_FN(SCIFB2_RXD_D), - GPIO_FN(ADICS_SAMP_B), GPIO_FN(MSIOF0_SCK_C), - - /* IPSR13 */ - GPIO_FN(STP_ISD_0), GPIO_FN(AVB_TX_ER), GPIO_FN(SCIFB2_SCK_C), - GPIO_FN(ADICLK_B), GPIO_FN(MSIOF0_SS1_C), - GPIO_FN(STP_ISEN_0), GPIO_FN(AVB_TX_CLK), - GPIO_FN(ADICHS0_B), GPIO_FN(MSIOF0_SS2_C), - GPIO_FN(STP_ISSYNC_0), GPIO_FN(AVB_COL), - GPIO_FN(ADICHS1_B), GPIO_FN(MSIOF0_RXD_C), - GPIO_FN(STP_OPWM_0), GPIO_FN(AVB_GTX_CLK), GPIO_FN(PWM0_B), - GPIO_FN(ADICHS2_B), GPIO_FN(MSIOF0_TXD_C), - GPIO_FN(SD0_CLK), GPIO_FN(SPCLK_B), - GPIO_FN(SD0_CMD), GPIO_FN(MOSI_IO0_B), - GPIO_FN(SD0_DATA0), GPIO_FN(MISO_IO1_B), - GPIO_FN(SD0_DATA1), GPIO_FN(IO2_B), - GPIO_FN(SD0_DATA2), GPIO_FN(IO3_B), GPIO_FN(SD0_DATA3), GPIO_FN(SSL_B), - GPIO_FN(SD0_CD), GPIO_FN(MMC_D6_B), - GPIO_FN(SIM0_RST_B), GPIO_FN(CAN0_RX_F), - GPIO_FN(SCIFA5_TXD_B), GPIO_FN(TX3_C), - GPIO_FN(SD0_WP), GPIO_FN(MMC_D7_B), - GPIO_FN(SIM0_D_B), GPIO_FN(CAN0_TX_F), - GPIO_FN(SCIFA5_RXD_B), GPIO_FN(RX3_C), - GPIO_FN(SD1_CMD), GPIO_FN(REMOCON_B), - GPIO_FN(SD1_DATA0), GPIO_FN(SPEEDIN_B), - GPIO_FN(SD1_DATA1), GPIO_FN(IETX_B), - GPIO_FN(SD1_DATA2), GPIO_FN(IECLK_B), - GPIO_FN(SD1_DATA3), GPIO_FN(IERX_B), - GPIO_FN(SD1_CD), GPIO_FN(PWM0), GPIO_FN(TPU_TO0), GPIO_FN(SCL1_C), - - /* IPSR14 */ - GPIO_FN(SD1_WP), GPIO_FN(PWM1_B), GPIO_FN(SDA1_C), - GPIO_FN(SD2_CLK), GPIO_FN(MMC_CLK), GPIO_FN(SD2_CMD), GPIO_FN(MMC_CMD), - GPIO_FN(SD2_DATA0), GPIO_FN(MMC_D0), - GPIO_FN(SD2_DATA1), GPIO_FN(MMC_D1), - GPIO_FN(SD2_DATA2), GPIO_FN(MMC_D2), - GPIO_FN(SD2_DATA3), GPIO_FN(MMC_D3), - GPIO_FN(SD2_CD), GPIO_FN(MMC_D4), GPIO_FN(SCL8_C), - GPIO_FN(TX5_B), GPIO_FN(SCIFA5_TXD_C), - GPIO_FN(SD2_WP), GPIO_FN(MMC_D5), GPIO_FN(SDA8_C), - GPIO_FN(RX5_B), GPIO_FN(SCIFA5_RXD_C), - GPIO_FN(MSIOF0_SCK), GPIO_FN(RX2_C), GPIO_FN(ADIDATA), - GPIO_FN(VI1_CLK_C), GPIO_FN(VI1_G0_B), - GPIO_FN(MSIOF0_SYNC), GPIO_FN(TX2_C), GPIO_FN(ADICS_SAMP), - GPIO_FN(VI1_CLKENB_C), GPIO_FN(VI1_G1_B), - GPIO_FN(MSIOF0_TXD), GPIO_FN(ADICLK), - GPIO_FN(VI1_FIELD_C), GPIO_FN(VI1_G2_B), - GPIO_FN(MSIOF0_RXD), GPIO_FN(ADICHS0), - GPIO_FN(VI1_DATA0_C), GPIO_FN(VI1_G3_B), - GPIO_FN(MSIOF0_SS1), GPIO_FN(MMC_D6), GPIO_FN(ADICHS1), GPIO_FN(TX0_E), - GPIO_FN(VI1_HSYNC_N_C), GPIO_FN(SCL7_C), GPIO_FN(VI1_G4_B), - GPIO_FN(MSIOF0_SS2), GPIO_FN(MMC_D7), GPIO_FN(ADICHS2), GPIO_FN(RX0_E), - GPIO_FN(VI1_VSYNC_N_C), GPIO_FN(SDA7_C), GPIO_FN(VI1_G5_B), - - /* IPSR15 */ - GPIO_FN(SIM0_RST), GPIO_FN(IETX), GPIO_FN(CAN1_TX_D), - GPIO_FN(SIM0_CLK), GPIO_FN(IECLK), GPIO_FN(CAN_CLK_C), - GPIO_FN(SIM0_D), GPIO_FN(IERX), GPIO_FN(CAN1_RX_D), - GPIO_FN(GPS_CLK), GPIO_FN(DU1_DOTCLKIN_C), GPIO_FN(AUDIO_CLKB_B), - GPIO_FN(PWM5_B), GPIO_FN(SCIFA3_TXD_C), - GPIO_FN(GPS_SIGN), GPIO_FN(TX4_C), - GPIO_FN(SCIFA4_TXD_C), GPIO_FN(PWM5), - GPIO_FN(VI1_G6_B), GPIO_FN(SCIFA3_RXD_C), - GPIO_FN(GPS_MAG), GPIO_FN(RX4_C), GPIO_FN(SCIFA4_RXD_C), GPIO_FN(PWM6), - GPIO_FN(VI1_G7_B), GPIO_FN(SCIFA3_SCK_C), - GPIO_FN(HCTS0_N), GPIO_FN(SCIFB0_CTS_N), GPIO_FN(GLO_I0_C), - GPIO_FN(TCLK1), GPIO_FN(VI1_DATA1_C), - GPIO_FN(HRTS0_N), GPIO_FN(SCIFB0_RTS_N), - GPIO_FN(GLO_I1_C), GPIO_FN(VI1_DATA2_C), - GPIO_FN(HSCK0), GPIO_FN(SCIFB0_SCK), - GPIO_FN(GLO_Q0_C), GPIO_FN(CAN_CLK), - GPIO_FN(TCLK2), GPIO_FN(VI1_DATA3_C), - GPIO_FN(HRX0), GPIO_FN(SCIFB0_RXD), GPIO_FN(GLO_Q1_C), - GPIO_FN(CAN0_RX_B), GPIO_FN(VI1_DATA4_C), - GPIO_FN(HTX0), GPIO_FN(SCIFB0_TXD), GPIO_FN(GLO_SCLK_C), - GPIO_FN(CAN0_TX_B), GPIO_FN(VI1_DATA5_C), - - /* IPSR16 */ - GPIO_FN(HRX1), GPIO_FN(SCIFB1_RXD), GPIO_FN(VI1_R0_B), - GPIO_FN(GLO_SDATA_C), GPIO_FN(VI1_DATA6_C), - GPIO_FN(HTX1), GPIO_FN(SCIFB1_TXD), GPIO_FN(VI1_R1_B), - GPIO_FN(GLO_SS_C), GPIO_FN(VI1_DATA7_C), - GPIO_FN(HSCK1), GPIO_FN(SCIFB1_SCK), - GPIO_FN(MLB_CK), GPIO_FN(GLO_RFON_C), - GPIO_FN(HCTS1_N), GPIO_FN(SCIFB1_CTS_N), - GPIO_FN(MLB_SIG), GPIO_FN(CAN1_TX_B), - GPIO_FN(HRTS1_N), GPIO_FN(SCIFB1_RTS_N), - GPIO_FN(MLB_DAT), GPIO_FN(CAN1_RX_B), -}; - -static struct pinmux_cfg_reg pinmux_config_regs[] = { - { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1) { - GP_0_31_FN, FN_IP1_22_20, - GP_0_30_FN, FN_IP1_19_17, - GP_0_29_FN, FN_IP1_16_14, - GP_0_28_FN, FN_IP1_13_11, - GP_0_27_FN, FN_IP1_10_8, - GP_0_26_FN, FN_IP1_7_6, - GP_0_25_FN, FN_IP1_5_4, - GP_0_24_FN, FN_IP1_3_2, - GP_0_23_FN, FN_IP1_1_0, - GP_0_22_FN, FN_IP0_30_29, - GP_0_21_FN, FN_IP0_28_27, - GP_0_20_FN, FN_IP0_26_25, - GP_0_19_FN, FN_IP0_24_23, - GP_0_18_FN, FN_IP0_22_21, - GP_0_17_FN, FN_IP0_20_19, - GP_0_16_FN, FN_IP0_18_16, - GP_0_15_FN, FN_IP0_15, - GP_0_14_FN, FN_IP0_14, - GP_0_13_FN, FN_IP0_13, - GP_0_12_FN, FN_IP0_12, - GP_0_11_FN, FN_IP0_11, - GP_0_10_FN, FN_IP0_10, - GP_0_9_FN, FN_IP0_9, - GP_0_8_FN, FN_IP0_8, - GP_0_7_FN, FN_IP0_7, - GP_0_6_FN, FN_IP0_6, - GP_0_5_FN, FN_IP0_5, - GP_0_4_FN, FN_IP0_4, - GP_0_3_FN, FN_IP0_3, - GP_0_2_FN, FN_IP0_2, - GP_0_1_FN, FN_IP0_1, - GP_0_0_FN, FN_IP0_0, } - }, - { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_1_25_FN, FN_IP3_21_20, - GP_1_24_FN, FN_IP3_19_18, - GP_1_23_FN, FN_IP3_17_16, - GP_1_22_FN, FN_IP3_15_14, - GP_1_21_FN, FN_IP3_13_12, - GP_1_20_FN, FN_IP3_11_9, - GP_1_19_FN, FN_RD_N, - GP_1_18_FN, FN_IP3_8_6, - GP_1_17_FN, FN_IP3_5_3, - GP_1_16_FN, FN_IP3_2_0, - GP_1_15_FN, FN_IP2_29_27, - GP_1_14_FN, FN_IP2_26_25, - GP_1_13_FN, FN_IP2_24_23, - GP_1_12_FN, FN_EX_CS0_N, - GP_1_11_FN, FN_IP2_22_21, - GP_1_10_FN, FN_IP2_20_19, - GP_1_9_FN, FN_IP2_18_16, - GP_1_8_FN, FN_IP2_15_13, - GP_1_7_FN, FN_IP2_12_10, - GP_1_6_FN, FN_IP2_9_7, - GP_1_5_FN, FN_IP2_6_5, - GP_1_4_FN, FN_IP2_4_3, - GP_1_3_FN, FN_IP2_2_0, - GP_1_2_FN, FN_IP1_31_29, - GP_1_1_FN, FN_IP1_28_26, - GP_1_0_FN, FN_IP1_25_23, } - }, - { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1) { - GP_2_31_FN, FN_IP6_7_6, - GP_2_30_FN, FN_IP6_5_3, - GP_2_29_FN, FN_IP6_2_0, - GP_2_28_FN, FN_AUDIO_CLKA, - GP_2_27_FN, FN_IP5_31_29, - GP_2_26_FN, FN_IP5_28_26, - GP_2_25_FN, FN_IP5_25_24, - GP_2_24_FN, FN_IP5_23_22, - GP_2_23_FN, FN_IP5_21_20, - GP_2_22_FN, FN_IP5_19_17, - GP_2_21_FN, FN_IP5_16_15, - GP_2_20_FN, FN_IP5_14_12, - GP_2_19_FN, FN_IP5_11_9, - GP_2_18_FN, FN_IP5_8_6, - GP_2_17_FN, FN_IP5_5_3, - GP_2_16_FN, FN_IP5_2_0, - GP_2_15_FN, FN_IP4_30_28, - GP_2_14_FN, FN_IP4_27_26, - GP_2_13_FN, FN_IP4_25_24, - GP_2_12_FN, FN_IP4_23_22, - GP_2_11_FN, FN_IP4_21, - GP_2_10_FN, FN_IP4_20, - GP_2_9_FN, FN_IP4_19, - GP_2_8_FN, FN_IP4_18_16, - GP_2_7_FN, FN_IP4_15_13, - GP_2_6_FN, FN_IP4_12_10, - GP_2_5_FN, FN_IP4_9_8, - GP_2_4_FN, FN_IP4_7_5, - GP_2_3_FN, FN_IP4_4_2, - GP_2_2_FN, FN_IP4_1_0, - GP_2_1_FN, FN_IP3_30_28, - GP_2_0_FN, FN_IP3_27_25 } - }, - { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1) { - GP_3_31_FN, FN_IP9_18_17, - GP_3_30_FN, FN_IP9_16, - GP_3_29_FN, FN_IP9_15_13, - GP_3_28_FN, FN_IP9_12, - GP_3_27_FN, FN_IP9_11, - GP_3_26_FN, FN_IP9_10_8, - GP_3_25_FN, FN_IP9_7, - GP_3_24_FN, FN_IP9_6, - GP_3_23_FN, FN_IP9_5_3, - GP_3_22_FN, FN_IP9_2_0, - GP_3_21_FN, FN_IP8_30_28, - GP_3_20_FN, FN_IP8_27_26, - GP_3_19_FN, FN_IP8_25_24, - GP_3_18_FN, FN_IP8_23_21, - GP_3_17_FN, FN_IP8_20_18, - GP_3_16_FN, FN_IP8_17_15, - GP_3_15_FN, FN_IP8_14_12, - GP_3_14_FN, FN_IP8_11_9, - GP_3_13_FN, FN_IP8_8_6, - GP_3_12_FN, FN_IP8_5_3, - GP_3_11_FN, FN_IP8_2_0, - GP_3_10_FN, FN_IP7_29_27, - GP_3_9_FN, FN_IP7_26_24, - GP_3_8_FN, FN_IP7_23_21, - GP_3_7_FN, FN_IP7_20_19, - GP_3_6_FN, FN_IP7_18_17, - GP_3_5_FN, FN_IP7_16_15, - GP_3_4_FN, FN_IP7_14_13, - GP_3_3_FN, FN_IP7_12_11, - GP_3_2_FN, FN_IP7_10_9, - GP_3_1_FN, FN_IP7_8_6, - GP_3_0_FN, FN_IP7_5_3 } - }, - { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1) { - GP_4_31_FN, FN_IP15_5_4, - GP_4_30_FN, FN_IP15_3_2, - GP_4_29_FN, FN_IP15_1_0, - GP_4_28_FN, FN_IP11_8_6, - GP_4_27_FN, FN_IP11_5_3, - GP_4_26_FN, FN_IP11_2_0, - GP_4_25_FN, FN_IP10_31_29, - GP_4_24_FN, FN_IP10_28_27, - GP_4_23_FN, FN_IP10_26_25, - GP_4_22_FN, FN_IP10_24_22, - GP_4_21_FN, FN_IP10_21_19, - GP_4_20_FN, FN_IP10_18_17, - GP_4_19_FN, FN_IP10_16_15, - GP_4_18_FN, FN_IP10_14_12, - GP_4_17_FN, FN_IP10_11_9, - GP_4_16_FN, FN_IP10_8_6, - GP_4_15_FN, FN_IP10_5_3, - GP_4_14_FN, FN_IP10_2_0, - GP_4_13_FN, FN_IP9_31_29, - GP_4_12_FN, FN_VI0_DATA0_VI0_B7, - GP_4_11_FN, FN_VI0_DATA0_VI0_B6, - GP_4_10_FN, FN_VI0_DATA0_VI0_B5, - GP_4_9_FN, FN_VI0_DATA0_VI0_B4, - GP_4_8_FN, FN_IP9_28_27, - GP_4_7_FN, FN_VI0_DATA0_VI0_B2, - GP_4_6_FN, FN_VI0_DATA0_VI0_B1, - GP_4_5_FN, FN_VI0_DATA0_VI0_B0, - GP_4_4_FN, FN_IP9_26_25, - GP_4_3_FN, FN_IP9_24_23, - GP_4_2_FN, FN_IP9_22_21, - GP_4_1_FN, FN_IP9_20_19, - GP_4_0_FN, FN_VI0_CLK } - }, - { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1) { - GP_5_31_FN, FN_IP3_24_22, - GP_5_30_FN, FN_IP13_9_7, - GP_5_29_FN, FN_IP13_6_5, - GP_5_28_FN, FN_IP13_4_3, - GP_5_27_FN, FN_IP13_2_0, - GP_5_26_FN, FN_IP12_29_27, - GP_5_25_FN, FN_IP12_26_24, - GP_5_24_FN, FN_IP12_23_22, - GP_5_23_FN, FN_IP12_21_20, - GP_5_22_FN, FN_IP12_19_18, - GP_5_21_FN, FN_IP12_17_16, - GP_5_20_FN, FN_IP12_15_13, - GP_5_19_FN, FN_IP12_12_10, - GP_5_18_FN, FN_IP12_9_7, - GP_5_17_FN, FN_IP12_6_4, - GP_5_16_FN, FN_IP12_3_2, - GP_5_15_FN, FN_IP12_1_0, - GP_5_14_FN, FN_IP11_31_30, - GP_5_13_FN, FN_IP11_29_28, - GP_5_12_FN, FN_IP11_27, - GP_5_11_FN, FN_IP11_26, - GP_5_10_FN, FN_IP11_25, - GP_5_9_FN, FN_IP11_24, - GP_5_8_FN, FN_IP11_23, - GP_5_7_FN, FN_IP11_22, - GP_5_6_FN, FN_IP11_21, - GP_5_5_FN, FN_IP11_20, - GP_5_4_FN, FN_IP11_19, - GP_5_3_FN, FN_IP11_18_17, - GP_5_2_FN, FN_IP11_16_15, - GP_5_1_FN, FN_IP11_14_12, - GP_5_0_FN, FN_IP11_11_9 } - }, - { PINMUX_CFG_REG("GPSR6", 0xE606001C, 32, 1) { - 0, 0, - 0, 0, - GP_6_29_FN, FN_IP14_31_29, - GP_6_28_FN, FN_IP14_28_26, - GP_6_27_FN, FN_IP14_25_23, - GP_6_26_FN, FN_IP14_22_20, - GP_6_25_FN, FN_IP14_19_17, - GP_6_24_FN, FN_IP14_16_14, - GP_6_23_FN, FN_IP14_13_11, - GP_6_22_FN, FN_IP14_10_8, - GP_6_21_FN, FN_IP14_7, - GP_6_20_FN, FN_IP14_6, - GP_6_19_FN, FN_IP14_5, - GP_6_18_FN, FN_IP14_4, - GP_6_17_FN, FN_IP14_3, - GP_6_16_FN, FN_IP14_2, - GP_6_15_FN, FN_IP14_1_0, - GP_6_14_FN, FN_IP13_30_28, - GP_6_13_FN, FN_IP13_27, - GP_6_12_FN, FN_IP13_26, - GP_6_11_FN, FN_IP13_25, - GP_6_10_FN, FN_IP13_24_23, - GP_6_9_FN, FN_IP13_22, - 0, 0, - GP_6_7_FN, FN_IP13_21_19, - GP_6_6_FN, FN_IP13_18_16, - GP_6_5_FN, FN_IP13_15, - GP_6_4_FN, FN_IP13_14, - GP_6_3_FN, FN_IP13_13, - GP_6_2_FN, FN_IP13_12, - GP_6_1_FN, FN_IP13_11, - GP_6_0_FN, FN_IP13_10 } - }, - { PINMUX_CFG_REG("GPSR7", 0xE6060074, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_7_25_FN, FN_USB1_PWEN, - GP_7_24_FN, FN_USB0_OVC, - GP_7_23_FN, FN_USB0_PWEN, - GP_7_22_FN, FN_IP15_14_12, - GP_7_21_FN, FN_IP15_11_9, - GP_7_20_FN, FN_IP15_8_6, - GP_7_19_FN, FN_IP7_2_0, - GP_7_18_FN, FN_IP6_29_27, - GP_7_17_FN, FN_IP6_26_24, - GP_7_16_FN, FN_IP6_23_21, - GP_7_15_FN, FN_IP6_20_19, - GP_7_14_FN, FN_IP6_18_16, - GP_7_13_FN, FN_IP6_15_14, - GP_7_12_FN, FN_IP6_13_12, - GP_7_11_FN, FN_IP6_11_10, - GP_7_10_FN, FN_IP6_9_8, - GP_7_9_FN, FN_IP16_11_10, - GP_7_8_FN, FN_IP16_9_8, - GP_7_7_FN, FN_IP16_7_6, - GP_7_6_FN, FN_IP16_5_3, - GP_7_5_FN, FN_IP16_2_0, - GP_7_4_FN, FN_IP15_29_27, - GP_7_3_FN, FN_IP15_26_24, - GP_7_2_FN, FN_IP15_23_21, - GP_7_1_FN, FN_IP15_20_18, - GP_7_0_FN, FN_IP15_17_15 } - }, - - /* IPSR0 - 5 */ - - { PINMUX_CFG_REG_VAR("IPSR6", 0xE6060038, 32, - 2, 3, 3, 3, 2, 3, 2, 2, 2, 2, 2, 3, 3) { - /* IP6_31_30 [2] */ - 0, 0, 0, 0, - /* IP6_29_27 [3] */ - FN_IRQ8, FN_HRTS1_N_C, FN_MSIOF1_RXD_B, - FN_GPS_SIGN_C, FN_GPS_SIGN_D, - 0, 0, 0, - /* IP6_26_24 [3] */ - FN_IRQ7, FN_HCTS1_N_C, FN_MSIOF1_TXD_B, - FN_GPS_CLK_C, FN_GPS_CLK_D, - 0, 0, 0, - /* IP6_23_21 [3] */ - FN_IRQ6, FN_HSCK1_C, FN_MSIOF1_SS2_B, - FN_SDA1_E, FN_MSIOF2_SYNC_E, - 0, 0, 0, - /* IP6_20_19 [2] */ - FN_IRQ5, FN_HTX1_C, FN_SCL1_E, FN_MSIOF2_SCK_E, - /* IP6_18_16 [3] */ - FN_IRQ4, FN_HRX1_C, FN_SDA4_C, FN_MSIOF2_RXD_E, FN_INTC_IRQ4_N, - 0, 0, 0, - /* IP6_15_14 [2] */ - FN_IRQ3, FN_SCL4_C, FN_MSIOF2_TXD_E, FN_INTC_IRQ3_N, - /* IP6_13_12 [2] */ - FN_IRQ2, FN_SCIFB1_TXD_D, FN_INTC_IRQ2_N, 0, - /* IP6_11_10 [2] */ - FN_IRQ1, FN_SCIFB1_SCK_C, FN_INTC_IRQ1_N, 0, - /* IP6_9_8 [2] */ - FN_IRQ0, FN_SCIFB1_RXD_D, FN_INTC_IRQ0_N, 0, - /* IP6_7_6 [2] */ - FN_AUDIO_CLKOUT, FN_MSIOF1_SS1_B, FN_TX2, FN_SCIFA2_TXD, - /* IP6_5_3 [3] */ - FN_AUDIO_CLKC, FN_SCIFB0_SCK_C, FN_MSIOF1_SYNC_B, FN_RX2, - FN_SCIFA2_RXD, FN_FMIN_E, - 0, 0, - /* IP6_2_0 [3] */ - FN_AUDIO_CLKB, FN_STP_OPWM_0_B, FN_MSIOF1_SCK_B, - FN_SCIF_CLK, 0, FN_BPFCLK_E, - 0, 0, } - }, - - /* IPSR7 - 10 */ - - { PINMUX_CFG_REG_VAR("IPSR11", 0xE606004C, 32, - 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, - 3, 3, 3, 3, 3) { - /* IP11_31_30 [2] */ - FN_ETH_CRS_DV, FN_AVB_LINK, FN_SDA2_C, 0, - /* IP11_29_28 [2] */ - FN_ETH_MDIO, FN_AVB_RX_CLK, FN_SCL2_C, 0, - /* IP11_27 [1] */ - FN_VI1_DATA7, FN_AVB_MDC, - /* IP11_26 [1] */ - FN_VI1_DATA6, FN_AVB_MAGIC, - /* IP11_25 [1] */ - FN_VI1_DATA5, FN_AVB_RX_DV, - /* IP11_24 [1] */ - FN_VI1_DATA4, FN_AVB_MDIO, - /* IP11_23 [1] */ - FN_VI1_DATA3, FN_AVB_RX_ER, - /* IP11_22 [1] */ - FN_VI1_DATA2, FN_AVB_RXD7, - /* IP11_21 [1] */ - FN_VI1_DATA1, FN_AVB_RXD6, - /* IP11_20 [1] */ - FN_VI1_DATA0, FN_AVB_RXD5, - /* IP11_19 [1] */ - FN_VI1_CLK, FN_AVB_RXD4, - /* IP11_18_17 [2] */ - FN_VI1_FIELD, FN_AVB_RXD3, FN_TS_SPSYNC0_B, 0, - /* IP11_16_15 [2] */ - FN_VI1_CLKENB, FN_AVB_RXD2, FN_TS_SDEN0_B, 0, - /* IP11_14_12 [3] */ - FN_VI1_VSYNC_N, FN_AVB_RXD1, FN_TS_SCK0_B, - FN_RX4_B, FN_SCIFA4_RXD_B, - 0, 0, 0, - /* IP11_11_9 [3] */ - FN_VI1_HSYNC_N, FN_AVB_RXD0, FN_TS_SDATA0_B, - FN_TX4_B, FN_SCIFA4_TXD_B, - 0, 0, 0, - /* IP11_8_6 [3] */ - FN_VI0_R7, FN_GLO_RFON_B, FN_RX1_C, FN_CAN0_RX_E, - FN_SDA4_B, FN_HRX1_D, FN_SCIFB0_RXD_D, 0, - /* IP11_5_3 [3] */ - FN_VI0_R6, FN_VI2_DATA7, FN_GLO_SS_B, FN_TX1_C, FN_SCL4_B, - 0, 0, 0, - /* IP11_2_0 [3] */ - FN_VI0_R5, FN_VI2_DATA6, FN_GLO_SDATA_B, FN_RX0_C, FN_SDA1_D, - 0, 0, 0, } - }, - { PINMUX_CFG_REG_VAR("IPSR12", 0xE6060050, 32, - 2, 3, 3, 2, 2, 2, 2, 3, 3, 3, 3, 2, 2) { - /* IP12_31_30 [2] */ - 0, 0, 0, 0, - /* IP12_29_27 [3] */ - FN_STP_ISCLK_0, FN_AVB_TX_EN, FN_SCIFB2_RXD_D, - FN_ADICS_SAMP_B, FN_MSIOF0_SCK_C, - 0, 0, 0, - /* IP12_26_24 [3] */ - FN_STP_IVCXO27_0, FN_AVB_TXD7, FN_SCIFB2_TXD_D, - FN_ADIDATA_B, FN_MSIOF0_SYNC_C, - 0, 0, 0, - /* IP12_23_22 [2] */ - FN_ETH_MDC, FN_AVB_TXD6, FN_IERX_C, 0, - /* IP12_21_20 [2] */ - FN_ETH_TXD0, FN_AVB_TXD5, FN_IECLK_C, 0, - /* IP12_19_18 [2] */ - FN_ETH_MAGIC, FN_AVB_TXD4, FN_IETX_C, 0, - /* IP12_17_16 [2] */ - FN_ETH_TX_EN, FN_AVB_TXD3, FN_TCLK1_B, FN_CAN_CLK_B, - /* IP12_15_13 [3] */ - FN_ETH_TXD1, FN_AVB_TXD2, FN_SCIFA3_TXD_B, - FN_CAN1_TX_C, FN_MSIOF1_TXD_E, - 0, 0, 0, - /* IP12_12_10 [3] */ - FN_ETH_REFCLK, FN_AVB_TXD1, FN_SCIFA3_RXD_B, - FN_CAN1_RX_C, FN_MSIOF1_SYNC_E, - 0, 0, 0, - /* IP12_9_7 [3] */ - FN_ETH_LINK, FN_AVB_TXD0, FN_CAN0_RX_C, - FN_SDA2_D, FN_MSIOF1_SCK_E, - 0, 0, 0, - /* IP12_6_4 [3] */ - FN_ETH_RXD1, FN_AVB_GTXREFCLK, FN_CAN0_TX_C, - FN_SCL2_D, FN_MSIOF1_RXD_E, - 0, 0, 0, - /* IP12_3_2 [2] */ - FN_ETH_RXD0, FN_AVB_PHY_INT, FN_SDA3, FN_SDA7, - /* IP12_1_0 [2] */ - FN_ETH_RX_ER, FN_AVB_CRS, FN_SCL3, FN_SCL7, } - }, - { PINMUX_CFG_REG_VAR("IPSR13", 0xE6060054, 32, - 1, 3, 1, 1, 1, 2, 1, 3, 3, 1, 1, 1, 1, 1, 1, - 3, 2, 2, 3) { - /* IP13_31 [1] */ - 0, 0, - /* IP13_30_28 [3] */ - FN_SD1_CD, FN_PWM0, FN_TPU_TO0, FN_SCL1_C, - 0, 0, 0, 0, - /* IP13_27 [1] */ - FN_SD1_DATA3, FN_IERX_B, - /* IP13_26 [1] */ - FN_SD1_DATA2, FN_IECLK_B, - /* IP13_25 [1] */ - FN_SD1_DATA1, FN_IETX_B, - /* IP13_24_23 [2] */ - FN_SD1_DATA0, FN_SPEEDIN_B, 0, 0, - /* IP13_22 [1] */ - FN_SD1_CMD, FN_REMOCON_B, - /* IP13_21_19 [3] */ - FN_SD0_WP, FN_MMC_D7_B, FN_SIM0_D_B, FN_CAN0_TX_F, - FN_SCIFA5_RXD_B, FN_RX3_C, - 0, 0, - /* IP13_18_16 [3] */ - FN_SD0_CD, FN_MMC_D6_B, FN_SIM0_RST_B, FN_CAN0_RX_F, - FN_SCIFA5_TXD_B, FN_TX3_C, - 0, 0, - /* IP13_15 [1] */ - FN_SD0_DATA3, FN_SSL_B, - /* IP13_14 [1] */ - FN_SD0_DATA2, FN_IO3_B, - /* IP13_13 [1] */ - FN_SD0_DATA1, FN_IO2_B, - /* IP13_12 [1] */ - FN_SD0_DATA0, FN_MISO_IO1_B, - /* IP13_11 [1] */ - FN_SD0_CMD, FN_MOSI_IO0_B, - /* IP13_10 [1] */ - FN_SD0_CLK, FN_SPCLK_B, - /* IP13_9_7 [3] */ - FN_STP_OPWM_0, FN_AVB_GTX_CLK, FN_PWM0_B, - FN_ADICHS2_B, FN_MSIOF0_TXD_C, - 0, 0, 0, - /* IP13_6_5 [2] */ - FN_STP_ISSYNC_0, FN_AVB_COL, FN_ADICHS1_B, FN_MSIOF0_RXD_C, - /* IP13_4_3 [2] */ - FN_STP_ISEN_0, FN_AVB_TX_CLK, FN_ADICHS0_B, FN_MSIOF0_SS2_C, - /* IP13_2_0 [3] */ - FN_STP_ISD_0, FN_AVB_TX_ER, FN_SCIFB2_SCK_C, - FN_ADICLK_B, FN_MSIOF0_SS1_C, - 0, 0, 0, } - }, - { PINMUX_CFG_REG_VAR("IPSR14", 0xE6060058, 32, - 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 2) { - /* IP14_31_29 [3] */ - FN_MSIOF0_SS2, FN_MMC_D7, FN_ADICHS2, FN_RX0_E, - FN_VI1_VSYNC_N_C, FN_SDA7_C, FN_VI1_G5_B, 0, - /* IP14_28_26 [3] */ - FN_MSIOF0_SS1, FN_MMC_D6, FN_ADICHS1, FN_TX0_E, - FN_VI1_HSYNC_N_C, FN_SCL7_C, FN_VI1_G4_B, 0, - /* IP14_25_23 [3] */ - FN_MSIOF0_RXD, FN_ADICHS0, 0, FN_VI1_DATA0_C, FN_VI1_G3_B, - 0, 0, 0, - /* IP14_22_20 [3] */ - FN_MSIOF0_TXD, FN_ADICLK, 0, FN_VI1_FIELD_C, FN_VI1_G2_B, - 0, 0, 0, - /* IP14_19_17 [3] */ - FN_MSIOF0_SYNC, FN_TX2_C, FN_ADICS_SAMP, 0, - FN_VI1_CLKENB_C, FN_VI1_G1_B, - 0, 0, - /* IP14_16_14 [3] */ - FN_MSIOF0_SCK, FN_RX2_C, FN_ADIDATA, 0, - FN_VI1_CLK_C, FN_VI1_G0_B, - 0, 0, - /* IP14_13_11 [3] */ - FN_SD2_WP, FN_MMC_D5, FN_SDA8_C, FN_RX5_B, FN_SCIFA5_RXD_C, - 0, 0, 0, - /* IP14_10_8 [3] */ - FN_SD2_CD, FN_MMC_D4, FN_SCL8_C, FN_TX5_B, FN_SCIFA5_TXD_C, - 0, 0, 0, - /* IP14_7 [1] */ - FN_SD2_DATA3, FN_MMC_D3, - /* IP14_6 [1] */ - FN_SD2_DATA2, FN_MMC_D2, - /* IP14_5 [1] */ - FN_SD2_DATA1, FN_MMC_D1, - /* IP14_4 [1] */ - FN_SD2_DATA0, FN_MMC_D0, - /* IP14_3 [1] */ - FN_SD2_CMD, FN_MMC_CMD, - /* IP14_2 [1] */ - FN_SD2_CLK, FN_MMC_CLK, - /* IP14_1_0 [2] */ - FN_SD1_WP, FN_PWM1_B, FN_SDA1_C, 0, } - }, - { PINMUX_CFG_REG_VAR("IPSR15", 0xE606005C, 32, - 2, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2) { - /* IP15_31_30 [2] */ - 0, 0, 0, 0, - /* IP15_29_27 [3] */ - FN_HTX0, FN_SCIFB0_TXD, 0, FN_GLO_SCLK_C, - FN_CAN0_TX_B, FN_VI1_DATA5_C, - 0, 0, - /* IP15_26_24 [3] */ - FN_HRX0, FN_SCIFB0_RXD, 0, FN_GLO_Q1_C, - FN_CAN0_RX_B, FN_VI1_DATA4_C, - 0, 0, - /* IP15_23_21 [3] */ - FN_HSCK0, FN_SCIFB0_SCK, 0, FN_GLO_Q0_C, FN_CAN_CLK, - FN_TCLK2, FN_VI1_DATA3_C, 0, - /* IP15_20_18 [3] */ - FN_HRTS0_N, FN_SCIFB0_RTS_N, 0, FN_GLO_I1_C, FN_VI1_DATA2_C, - 0, 0, 0, - /* IP15_17_15 [3] */ - FN_HCTS0_N, FN_SCIFB0_CTS_N, 0, FN_GLO_I0_C, - FN_TCLK1, FN_VI1_DATA1_C, - 0, 0, - /* IP15_14_12 [3] */ - FN_GPS_MAG, FN_RX4_C, FN_SCIFA4_RXD_C, FN_PWM6, - FN_VI1_G7_B, FN_SCIFA3_SCK_C, - 0, 0, - /* IP15_11_9 [3] */ - FN_GPS_SIGN, FN_TX4_C, FN_SCIFA4_TXD_C, FN_PWM5, - FN_VI1_G6_B, FN_SCIFA3_RXD_C, - 0, 0, - /* IP15_8_6 [3] */ - FN_GPS_CLK, FN_DU1_DOTCLKIN_C, FN_AUDIO_CLKB_B, - FN_PWM5_B, FN_SCIFA3_TXD_C, - 0, 0, 0, - /* IP15_5_4 [2] */ - FN_SIM0_D, FN_IERX, FN_CAN1_RX_D, 0, - /* IP15_3_2 [2] */ - FN_SIM0_CLK, FN_IECLK, FN_CAN_CLK_C, 0, - /* IP15_1_0 [2] */ - FN_SIM0_RST, FN_IETX, FN_CAN1_TX_D, 0, } - }, - { PINMUX_CFG_REG_VAR("IPSR16", 0xE6060160, 32, - 4, 4, 4, 4, 4, 2, 2, 2, 3, 3) { - /* IP16_31_28 [4] */ - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - /* IP16_27_24 [4] */ - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - /* IP16_23_20 [4] */ - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - /* IP16_19_16 [4] */ - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - /* IP16_15_12 [4] */ - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - /* IP16_11_10 [2] */ - FN_HRTS1_N, FN_SCIFB1_RTS_N, FN_MLB_DAT, FN_CAN1_RX_B, - /* IP16_9_8 [2] */ - FN_HCTS1_N, FN_SCIFB1_CTS_N, FN_MLB_SIG, FN_CAN1_TX_B, - /* IP16_7_6 [2] */ - FN_HSCK1, FN_SCIFB1_SCK, FN_MLB_CK, FN_GLO_RFON_C, - /* IP16_5_3 [3] */ - FN_HTX1, FN_SCIFB1_TXD, FN_VI1_R1_B, - FN_GLO_SS_C, FN_VI1_DATA7_C, - 0, 0, 0, - /* IP16_2_0 [3] */ - FN_HRX1, FN_SCIFB1_RXD, FN_VI1_R0_B, - FN_GLO_SDATA_C, FN_VI1_DATA6_C, - 0, 0, 0, } - }, - { PINMUX_CFG_REG_VAR("MOD_SEL", 0xE6060090, 32, - 1, 2, 2, 2, 3, 2, 1, 1, 1, 1, - 3, 2, 2, 2, 1, 2, 2, 2) { - /* RESEVED [1] */ - 0, 0, - /* SEL_SCIF1 [2] */ - FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3, - /* SEL_SCIFB [2] */ - FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2, FN_SEL_SCIFB_3, - /* SEL_SCIFB2 [2] */ - FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, - FN_SEL_SCIFB2_2, FN_SEL_SCIFB2_3, - /* SEL_SCIFB1 [3] */ - FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, - FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3, - 0, 0, 0, 0, - /* SEL_SCIFA1 [2] */ - FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, 0, - /* SEL_SSI9 [1] */ - FN_SEL_SSI9_0, FN_SEL_SSI9_1, - /* SEL_SCFA [1] */ - FN_SEL_SCFA_0, FN_SEL_SCFA_1, - /* SEL_QSP [1] */ - FN_SEL_QSP_0, FN_SEL_QSP_1, - /* SEL_SSI7 [1] */ - FN_SEL_SSI7_0, FN_SEL_SSI7_1, - /* SEL_HSCIF1 [3] */ - FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, FN_SEL_HSCIF1_2, - FN_SEL_HSCIF1_3, FN_SEL_HSCIF1_4, - 0, 0, 0, - /* RESEVED [2] */ - 0, 0, 0, 0, - /* SEL_VI1 [2] */ - FN_SEL_VI1_0, FN_SEL_VI1_1, FN_SEL_VI1_2, 0, - /* RESEVED [2] */ - 0, 0, 0, 0, - /* SEL_TMU [1] */ - FN_SEL_TMU1_0, FN_SEL_TMU1_1, - /* SEL_LBS [2] */ - FN_SEL_LBS_0, FN_SEL_LBS_1, FN_SEL_LBS_2, FN_SEL_LBS_3, - /* SEL_TSIF0 [2] */ - FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3, - /* SEL_SOF0 [2] */ - FN_SEL_SOF0_0, FN_SEL_SOF0_1, FN_SEL_SOF0_2, 0, } - }, - { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xE6060094, 32, - 3, 1, 1, 3, 2, 1, 1, 2, 2, - 1, 3, 2, 1, 2, 2, 2, 1, 1, 1) { - /* SEL_SCIF0 [3] */ - FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, - FN_SEL_SCIF0_3, FN_SEL_SCIF0_4, - 0, 0, 0, - /* RESEVED [1] */ - 0, 0, - /* SEL_SCIF [1] */ - FN_SEL_SCIF_0, FN_SEL_SCIF_1, - /* SEL_CAN0 [3] */ - FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3, - FN_SEL_CAN0_4, FN_SEL_CAN0_5, - 0, 0, - /* SEL_CAN1 [2] */ - FN_SEL_CAN1_0, FN_SEL_CAN1_1, FN_SEL_CAN1_2, FN_SEL_CAN1_3, - /* RESEVED [1] */ - 0, 0, - /* SEL_SCIFA2 [1] */ - FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1, - /* SEL_SCIF4 [2] */ - FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2, 0, - /* RESEVED [2] */ - 0, 0, 0, 0, - /* SEL_ADG [1] */ - FN_SEL_ADG_0, FN_SEL_ADG_1, - /* SEL_FM [3] */ - FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, - FN_SEL_FM_3, FN_SEL_FM_4, - 0, 0, 0, - /* SEL_SCIFA5 [2] */ - FN_SEL_SCIFA5_0, FN_SEL_SCIFA5_1, FN_SEL_SCIFA5_2, 0, - /* RESEVED [1] */ - 0, 0, - /* SEL_GPS [2] */ - FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, FN_SEL_GPS_3, - /* SEL_SCIFA4 [2] */ - FN_SEL_SCIFA4_0, FN_SEL_SCIFA4_1, FN_SEL_SCIFA4_2, 0, - /* SEL_SCIFA3 [2] */ - FN_SEL_SCIFA3_0, FN_SEL_SCIFA3_1, FN_SEL_SCIFA3_2, 0, - /* SEL_SIM [1] */ - FN_SEL_SIM_0, FN_SEL_SIM_1, - /* RESEVED [1] */ - 0, 0, - /* SEL_SSI8 [1] */ - FN_SEL_SSI8_0, FN_SEL_SSI8_1, } - }, - { PINMUX_CFG_REG_VAR("MOD_SEL3", 0xE6060098, 32, - 2, 2, 2, 2, 2, 2, 2, 2, - 1, 1, 2, 2, 3, 2, 2, 2, 1) { - /* SEL_HSCIF2 [2] */ - FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1, - FN_SEL_HSCIF2_2, FN_SEL_HSCIF2_3, - /* SEL_CANCLK [2] */ - FN_SEL_CANCLK_0, FN_SEL_CANCLK_1, - FN_SEL_CANCLK_2, FN_SEL_CANCLK_3, - /* SEL_IIC8 [2] */ - FN_SEL_IIC8_0, FN_SEL_IIC8_1, FN_SEL_IIC8_2, 0, - /* SEL_IIC7 [2] */ - FN_SEL_IIC7_0, FN_SEL_IIC7_1, FN_SEL_IIC7_2, 0, - /* SEL_IIC4 [2] */ - FN_SEL_IIC4_0, FN_SEL_IIC4_1, FN_SEL_IIC4_2, 0, - /* SEL_IIC3 [2] */ - FN_SEL_IIC3_0, FN_SEL_IIC3_1, FN_SEL_IIC3_2, FN_SEL_IIC3_3, - /* SEL_SCIF3 [2] */ - FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3, - /* SEL_IEB [2] */ - FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, 0, - /* SEL_MMC [1] */ - FN_SEL_MMC_0, FN_SEL_MMC_1, - /* SEL_SCIF5 [1] */ - FN_SEL_SCIF5_0, FN_SEL_SCIF5_1, - /* RESEVED [2] */ - 0, 0, 0, 0, - /* SEL_IIC2 [2] */ - FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3, - /* SEL_IIC1 [3] */ - FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2, FN_SEL_IIC1_3, - FN_SEL_IIC1_4, - 0, 0, 0, - /* SEL_IIC0 [2] */ - FN_SEL_IIC0_0, FN_SEL_IIC0_1, FN_SEL_IIC0_2, 0, - /* RESEVED [2] */ - 0, 0, 0, 0, - /* RESEVED [2] */ - 0, 0, 0, 0, - /* RESEVED [1] */ - 0, 0, } - }, - { PINMUX_CFG_REG_VAR("MOD_SEL4", 0xE606009C, 32, - 3, 2, 2, 1, 1, 1, 1, 3, 2, - 2, 3, 1, 1, 1, 2, 2, 2, 2) { - /* SEL_SOF1 [3] */ - FN_SEL_SOF1_0, FN_SEL_SOF1_1, FN_SEL_SOF1_2, FN_SEL_SOF1_3, - FN_SEL_SOF1_4, - 0, 0, 0, - /* SEL_HSCIF0 [2] */ - FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2, 0, - /* SEL_DIS [2] */ - FN_SEL_DIS_0, FN_SEL_DIS_1, FN_SEL_DIS_2, 0, - /* RESEVED [1] */ - 0, 0, - /* SEL_RAD [1] */ - FN_SEL_RAD_0, FN_SEL_RAD_1, - /* SEL_RCN [1] */ - FN_SEL_RCN_0, FN_SEL_RCN_1, - /* SEL_RSP [1] */ - FN_SEL_RSP_0, FN_SEL_RSP_1, - /* SEL_SCIF2 [3] */ - FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, - FN_SEL_SCIF2_3, FN_SEL_SCIF2_4, - 0, 0, 0, - /* RESEVED [2] */ - 0, 0, 0, 0, - /* RESEVED [2] */ - 0, 0, 0, 0, - /* SEL_SOF2 [3] */ - FN_SEL_SOF2_0, FN_SEL_SOF2_1, FN_SEL_SOF2_2, - FN_SEL_SOF2_3, FN_SEL_SOF2_4, - 0, 0, 0, - /* RESEVED [1] */ - 0, 0, - /* SEL_SSI1 [1] */ - FN_SEL_SSI1_0, FN_SEL_SSI1_1, - /* SEL_SSI0 [1] */ - FN_SEL_SSI0_0, FN_SEL_SSI0_1, - /* SEL_SSP [2] */ - FN_SEL_SSP_0, FN_SEL_SSP_1, FN_SEL_SSP_2, 0, - /* RESEVED [2] */ - 0, 0, 0, 0, - /* RESEVED [2] */ - 0, 0, 0, 0, - /* RESEVED [2] */ - 0, 0, 0, 0, } - }, - { PINMUX_CFG_REG("INOUTSEL0", 0xE6050004, 32, 1) { GP_INOUTSEL(0) } }, - { PINMUX_CFG_REG("INOUTSEL1", 0xE6051004, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_1_25_IN, GP_1_25_OUT, - GP_1_24_IN, GP_1_24_OUT, - GP_1_23_IN, GP_1_23_OUT, - GP_1_22_IN, GP_1_22_OUT, - GP_1_21_IN, GP_1_21_OUT, - GP_1_20_IN, GP_1_20_OUT, - GP_1_19_IN, GP_1_19_OUT, - GP_1_18_IN, GP_1_18_OUT, - GP_1_17_IN, GP_1_17_OUT, - GP_1_16_IN, GP_1_16_OUT, - GP_1_15_IN, GP_1_15_OUT, - GP_1_14_IN, GP_1_14_OUT, - GP_1_13_IN, GP_1_13_OUT, - GP_1_12_IN, GP_1_12_OUT, - GP_1_11_IN, GP_1_11_OUT, - GP_1_10_IN, GP_1_10_OUT, - GP_1_9_IN, GP_1_9_OUT, - GP_1_8_IN, GP_1_8_OUT, - GP_1_7_IN, GP_1_7_OUT, - GP_1_6_IN, GP_1_6_OUT, - GP_1_5_IN, GP_1_5_OUT, - GP_1_4_IN, GP_1_4_OUT, - GP_1_3_IN, GP_1_3_OUT, - GP_1_2_IN, GP_1_2_OUT, - GP_1_1_IN, GP_1_1_OUT, - GP_1_0_IN, GP_1_0_OUT, } - }, - { PINMUX_CFG_REG("INOUTSEL2", 0xE6052004, 32, 1) { GP_INOUTSEL(2) } }, - { PINMUX_CFG_REG("INOUTSEL3", 0xE6053004, 32, 1) { GP_INOUTSEL(3) } }, - { PINMUX_CFG_REG("INOUTSEL4", 0xE6054004, 32, 1) { GP_INOUTSEL(4) } }, - { PINMUX_CFG_REG("INOUTSEL5", 0xE6055004, 32, 1) { GP_INOUTSEL(5) } }, - { PINMUX_CFG_REG("INOUTSEL6", 0xE6055404, 32, 1) { GP_INOUTSEL(6) } }, - { PINMUX_CFG_REG("INOUTSEL7", 0xE6055804, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_7_25_IN, GP_7_25_OUT, - GP_7_24_IN, GP_7_24_OUT, - GP_7_23_IN, GP_7_23_OUT, - GP_7_22_IN, GP_7_22_OUT, - GP_7_21_IN, GP_7_21_OUT, - GP_7_20_IN, GP_7_20_OUT, - GP_7_19_IN, GP_7_19_OUT, - GP_7_18_IN, GP_7_18_OUT, - GP_7_17_IN, GP_7_17_OUT, - GP_7_16_IN, GP_7_16_OUT, - GP_7_15_IN, GP_7_15_OUT, - GP_7_14_IN, GP_7_14_OUT, - GP_7_13_IN, GP_7_13_OUT, - GP_7_12_IN, GP_7_12_OUT, - GP_7_11_IN, GP_7_11_OUT, - GP_7_10_IN, GP_7_10_OUT, - GP_7_9_IN, GP_7_9_OUT, - GP_7_8_IN, GP_7_8_OUT, - GP_7_7_IN, GP_7_7_OUT, - GP_7_6_IN, GP_7_6_OUT, - GP_7_5_IN, GP_7_5_OUT, - GP_7_4_IN, GP_7_4_OUT, - GP_7_3_IN, GP_7_3_OUT, - GP_7_2_IN, GP_7_2_OUT, - GP_7_1_IN, GP_7_1_OUT, - GP_7_0_IN, GP_7_0_OUT, } - }, - { }, -}; - -static struct pinmux_data_reg pinmux_data_regs[] = { - { PINMUX_DATA_REG("INDT0", 0xE6050008, 32) { GP_INDT(0) } }, - { PINMUX_DATA_REG("INDT1", 0xE6051008, 32) { - 0, 0, 0, 0, - 0, 0, GP_1_25_DATA, GP_1_24_DATA, - GP_1_23_DATA, GP_1_22_DATA, GP_1_21_DATA, GP_1_20_DATA, - GP_1_19_DATA, GP_1_18_DATA, GP_1_17_DATA, GP_1_16_DATA, - GP_1_15_DATA, GP_1_14_DATA, GP_1_13_DATA, GP_1_12_DATA, - GP_1_11_DATA, GP_1_10_DATA, GP_1_9_DATA, GP_1_8_DATA, - GP_1_7_DATA, GP_1_6_DATA, GP_1_5_DATA, GP_1_4_DATA, - GP_1_3_DATA, GP_1_2_DATA, GP_1_1_DATA, GP_1_0_DATA } - }, - { PINMUX_DATA_REG("INDT2", 0xE6052008, 32) { GP_INDT(2) } }, - { PINMUX_DATA_REG("INDT3", 0xE6053008, 32) { GP_INDT(3) } }, - { PINMUX_DATA_REG("INDT4", 0xE6054008, 32) { GP_INDT(4) } }, - { PINMUX_DATA_REG("INDT5", 0xE6055008, 32) { GP_INDT(5) } }, - { PINMUX_DATA_REG("INDT6", 0xE6055408, 32) { GP_INDT(6) } }, - { PINMUX_DATA_REG("INDT7", 0xE6055808, 32) { - 0, 0, 0, 0, - 0, 0, GP_7_25_DATA, GP_7_24_DATA, - GP_7_23_DATA, GP_7_22_DATA, GP_7_21_DATA, GP_7_20_DATA, - GP_7_19_DATA, GP_7_18_DATA, GP_7_17_DATA, GP_7_16_DATA, - GP_7_15_DATA, GP_7_14_DATA, GP_7_13_DATA, GP_7_12_DATA, - GP_7_11_DATA, GP_7_10_DATA, GP_7_9_DATA, GP_7_8_DATA, - GP_7_7_DATA, GP_7_6_DATA, GP_7_5_DATA, GP_7_4_DATA, - GP_7_3_DATA, GP_7_2_DATA, GP_7_1_DATA, GP_7_0_DATA } - }, - { }, -}; - -static struct pinmux_info r8a7793_pinmux_info = { - .name = "r8a7793_pfc", - - .unlock_reg = 0xe6060000, /* PMMR */ - - .reserved_id = PINMUX_RESERVED, - .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, - .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, - .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, - .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, - .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, - - .first_gpio = GPIO_GP_0_0, - .last_gpio = GPIO_FN_CAN1_RX_B, - - .gpios = pinmux_gpios, - .cfg_regs = pinmux_config_regs, - .data_regs = pinmux_data_regs, - - .gpio_data = pinmux_data, - .gpio_data_size = ARRAY_SIZE(pinmux_data), -}; - -void r8a7793_pinmux_init(void) -{ - register_pinmux(&r8a7793_pinmux_info); -} diff --git a/arch/arm/mach-rmobile/pfc-r8a7794.c b/arch/arm/mach-rmobile/pfc-r8a7794.c deleted file mode 100644 index 13bf97bc304..00000000000 --- a/arch/arm/mach-rmobile/pfc-r8a7794.c +++ /dev/null @@ -1,1650 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * arch/arm/cpu/armv7/rmobile/pfc-r8a7794.c - * This file is r8a7794 processor support - PFC hardware block. - * - * Copyright (C) 2014 Renesas Electronics Corporation - */ - -#include <common.h> -#include <sh_pfc.h> -#include <asm/gpio.h> - -#define CPU_32_PORT(fn, pfx, sfx) \ - PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \ - PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \ - PORT_1(fn, pfx##31, sfx) - -#define CPU_26_PORT(fn, pfx, sfx) \ - PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \ - PORT_1(fn, pfx##20, sfx), PORT_1(fn, pfx##21, sfx), \ - PORT_1(fn, pfx##22, sfx), PORT_1(fn, pfx##23, sfx), \ - PORT_1(fn, pfx##24, sfx), PORT_1(fn, pfx##25, sfx) - -#define CPU_28_PORT(fn, pfx, sfx) \ - PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \ - PORT_1(fn, pfx##20, sfx), PORT_1(fn, pfx##21, sfx), \ - PORT_1(fn, pfx##22, sfx), PORT_1(fn, pfx##23, sfx), \ - PORT_1(fn, pfx##24, sfx), PORT_1(fn, pfx##25, sfx), \ - PORT_1(fn, pfx##26, sfx), PORT_1(fn, pfx##27, sfx) - -/* - * GP_0_0_DATA -> GP_6_25_DATA - * (except for GP1[26],GP1[27],GP1[28],GP1[29]),GP1[30],GP1[31] - * GP5[28],GP5[29]),GP5[30],GP5[31],GP6[26],GP6[27],GP6[28], - * GP6[29]),GP6[30],GP6[31]) - */ -#define CPU_ALL_PORT(fn, pfx, sfx) \ - CPU_32_PORT(fn, pfx##_0_, sfx), \ - CPU_26_PORT(fn, pfx##_1_, sfx), \ - CPU_32_PORT(fn, pfx##_2_, sfx), \ - CPU_32_PORT(fn, pfx##_3_, sfx), \ - CPU_32_PORT(fn, pfx##_4_, sfx), \ - CPU_28_PORT(fn, pfx##_5_, sfx), \ - CPU_26_PORT(fn, pfx##_6_, sfx) - -#define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA) -#define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN, \ - GP##pfx##_IN, GP##pfx##_OUT) - -#define _GP_INOUTSEL(pfx, sfx) GP##pfx##_IN, GP##pfx##_OUT -#define _GP_INDT(pfx, sfx) GP##pfx##_DATA - -#define GP_ALL(str) CPU_ALL_PORT(_PORT_ALL, GP, str) -#define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, , unused) -#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, , unused) - - -#define PORT_10_REV(fn, pfx, sfx) \ - PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx), \ - PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx), \ - PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx), \ - PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx), \ - PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx) - -#define CPU_32_PORT_REV(fn, pfx, sfx) \ - PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx), \ - PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx), \ - PORT_10_REV(fn, pfx, sfx) - -#define GP_INOUTSEL(bank) CPU_32_PORT_REV(_GP_INOUTSEL, _##bank##_, unused) -#define GP_INDT(bank) CPU_32_PORT_REV(_GP_INDT, _##bank##_, unused) - -#define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn) -#define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \ - FN_##ipsr, FN_##fn) - -enum { - PINMUX_RESERVED = 0, - - PINMUX_DATA_BEGIN, - GP_ALL(DATA), - PINMUX_DATA_END, - - PINMUX_INPUT_BEGIN, - GP_ALL(IN), - PINMUX_INPUT_END, - - PINMUX_OUTPUT_BEGIN, - GP_ALL(OUT), - PINMUX_OUTPUT_END, - - PINMUX_FUNCTION_BEGIN, - GP_ALL(FN), - - /* GPSR0 */ - FN_IP0_23_22, FN_IP0_24, FN_IP0_25, FN_IP0_27_26, FN_IP0_29_28, - FN_IP0_31_30, FN_IP1_1_0, FN_IP1_3_2, FN_IP1_5_4, FN_IP1_7_6, - FN_IP1_10_8, FN_IP1_12_11, FN_IP1_14_13, FN_IP1_17_15, FN_IP1_19_18, - FN_IP1_21_20, FN_IP1_23_22, FN_IP1_24, FN_A2, FN_IP1_26, FN_IP1_27, - FN_IP1_29_28, FN_IP1_31_30, FN_IP2_1_0, FN_IP2_3_2, FN_IP2_5_4, - FN_IP2_7_6, FN_IP2_9_8, FN_IP2_11_10, FN_IP2_13_12, FN_IP2_15_14, - FN_IP2_17_16, - - /* GPSR1 */ - FN_IP2_20_18, FN_IP2_23_21, FN_IP2_26_24, FN_IP2_29_27, FN_IP2_31_30, - FN_IP3_1_0, FN_IP3_3_2, FN_IP3_5_4, FN_IP3_7_6, FN_IP3_9_8, FN_IP3_10, - FN_IP3_11, FN_IP3_12, FN_IP3_14_13, FN_IP3_17_15, FN_IP3_20_18, - FN_IP3_23_21, FN_IP3_26_24, FN_IP3_29_27, FN_IP3_30, FN_IP3_31, - FN_WE0_N, FN_WE1_N, FN_IP4_1_0 , FN_IP7_31, FN_DACK0, - - /* GPSR2 */ - FN_IP4_4_2, FN_IP4_7_5, FN_IP4_9_8, FN_IP4_11_10, FN_IP4_13_12, - FN_IP4_15_14, FN_IP4_17_16, FN_IP4_19_18, FN_IP4_22_20, FN_IP4_25_23, - FN_IP4_27_26, FN_IP4_29_28, FN_IP4_31_30, FN_IP5_1_0, FN_IP5_3_2, - FN_IP5_5_4, FN_IP5_8_6, FN_IP5_11_9, FN_IP5_13_12, FN_IP5_15_14, - FN_IP5_17_16, FN_IP5_19_18, FN_IP5_21_20, FN_IP5_23_22, FN_IP5_25_24, - FN_IP5_27_26, FN_IP5_29_28, FN_IP5_31_30, FN_IP6_1_0, FN_IP6_3_2, - FN_IP6_5_4, FN_IP6_7_6, - - /* GPSR3 */ - FN_IP6_8, FN_IP6_9, FN_IP6_10, FN_IP6_11, FN_IP6_12, FN_IP6_13, - FN_IP6_14, FN_IP6_15, FN_IP6_16, FN_IP6_19_17, FN_IP6_22_20, - FN_IP6_25_23, FN_IP6_28_26, FN_IP6_31_29, FN_IP7_2_0, FN_IP7_5_3, - FN_IP7_8_6, FN_IP7_11_9, FN_IP7_14_12, FN_IP7_17_15, FN_IP7_20_18, - FN_IP7_23_21, FN_IP7_26_24, FN_IP7_29_27, FN_IP8_2_0, FN_IP8_5_3, - FN_IP8_8_6, FN_IP8_11_9, FN_IP8_14_12, FN_IP8_16_15, FN_IP8_19_17, - FN_IP8_22_20, - - /* GPSR4 */ - FN_IP8_25_23, FN_IP8_28_26, FN_IP8_31_29, FN_IP9_2_0, FN_IP9_5_3, - FN_IP9_8_6, FN_IP9_11_9, FN_IP9_14_12, FN_IP9_16_15, FN_IP9_18_17, - FN_IP9_21_19, FN_IP9_24_22, FN_IP9_27_25, FN_IP9_30_28, FN_IP10_2_0, - FN_IP10_5_3, FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_17_15, - FN_IP10_20_18, FN_IP10_23_21, FN_IP10_26_24, FN_IP10_29_27, - FN_IP10_31_30, FN_IP11_2_0, FN_IP11_5_3, FN_IP11_7_6, FN_IP11_10_8, - FN_IP11_13_11, FN_IP11_15_14, FN_IP11_17_16, - - /* GPSR5 */ - FN_IP11_20_18, FN_IP11_23_21, FN_IP11_26_24, FN_IP11_29_27, FN_IP12_2_0, - FN_IP12_5_3, FN_IP12_8_6, FN_IP12_10_9, FN_IP12_12_11, FN_IP12_14_13, - FN_IP12_17_15, FN_IP12_20_18, FN_IP12_23_21, FN_IP12_26_24, - FN_IP12_29_27, FN_IP13_2_0, FN_IP13_5_3, FN_IP13_8_6, FN_IP13_11_9, - FN_IP13_14_12, FN_IP13_17_15, FN_IP13_20_18, FN_IP13_23_21, - FN_IP13_26_24, FN_USB0_PWEN, FN_USB0_OVC, FN_USB1_PWEN, FN_USB1_OVC, - - /* GPSR6 */ - FN_SD0_CLK, FN_SD0_CMD, FN_SD0_DATA0, FN_SD0_DATA1, FN_SD0_DATA2, - FN_SD0_DATA3, FN_SD0_CD, FN_SD0_WP, FN_SD1_CLK, FN_SD1_CMD, - FN_SD1_DATA0, FN_SD1_DATA1, FN_SD1_DATA2, FN_SD1_DATA3, FN_IP0_0, - FN_IP0_9_8, FN_IP0_10, FN_IP0_11, FN_IP0_12, FN_IP0_13, FN_IP0_14, - FN_IP0_15, FN_IP0_16, FN_IP0_17, FN_IP0_19_18, FN_IP0_21_20, - - /* IPSR0 */ - FN_SD1_CD, FN_CAN0_RX, FN_SD1_WP, FN_IRQ7, FN_CAN0_TX, FN_MMC_CLK, - FN_SD2_CLK, FN_MMC_CMD, FN_SD2_CMD, FN_MMC_D0, FN_SD2_DATA0, FN_MMC_D1, - FN_SD2_DATA1, FN_MMC_D2, FN_SD2_DATA2, FN_MMC_D3, FN_SD2_DATA3, - FN_MMC_D4, FN_SD2_CD, FN_MMC_D5, FN_SD2_WP, FN_MMC_D6, FN_SCIF0_RXD, - FN_I2C2_SCL_B, FN_CAN1_RX, FN_MMC_D7, FN_SCIF0_TXD, FN_I2C2_SDA_B, - FN_CAN1_TX, FN_D0, FN_SCIFA3_SCK_B, FN_IRQ4, FN_D1, FN_SCIFA3_RXD_B, - FN_D2, FN_SCIFA3_TXD_B, FN_D3, FN_I2C3_SCL_B, FN_SCIF5_RXD_B, FN_D4, - FN_I2C3_SDA_B, FN_SCIF5_TXD_B, FN_D5, FN_SCIF4_RXD_B, FN_I2C0_SCL_D, - - /* - * From IPSR1 to IPSR5 have been removed because they does not use. - */ - - /* IPSR6 */ - FN_DU0_EXVSYNC_DU0_VSYNC, FN_QSTB_QHE, FN_CC50_STATE28, - FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, FN_QCPV_QDE, FN_CC50_STATE29, - FN_DU0_DISP, FN_QPOLA, FN_CC50_STATE30, FN_DU0_CDE, FN_QPOLB, - FN_CC50_STATE31, FN_VI0_CLK, FN_AVB_RX_CLK, FN_VI0_DATA0_VI0_B0, - FN_AVB_RX_DV, FN_VI0_DATA1_VI0_B1, FN_AVB_RXD0, FN_VI0_DATA2_VI0_B2, - FN_AVB_RXD1, FN_VI0_DATA3_VI0_B3, FN_AVB_RXD2, FN_VI0_DATA4_VI0_B4, - FN_AVB_RXD3, FN_VI0_DATA5_VI0_B5, FN_AVB_RXD4, FN_VI0_DATA6_VI0_B6, - FN_AVB_RXD5, FN_VI0_DATA7_VI0_B7, FN_AVB_RXD6, FN_VI0_CLKENB, - FN_I2C3_SCL, FN_SCIFA5_RXD_C, FN_IETX_C, FN_AVB_RXD7, FN_VI0_FIELD, - FN_I2C3_SDA, FN_SCIFA5_TXD_C, FN_IECLK_C, FN_AVB_RX_ER, FN_VI0_HSYNC_N, - FN_SCIF0_RXD_B, FN_I2C0_SCL_C, FN_IERX_C, FN_AVB_COL, FN_VI0_VSYNC_N, - FN_SCIF0_TXD_B, FN_I2C0_SDA_C, FN_AUDIO_CLKOUT_B, FN_AVB_TX_EN, - FN_ETH_MDIO, FN_VI0_G0, FN_MSIOF2_RXD_B, FN_IIC0_SCL_D, FN_AVB_TX_CLK, - FN_ADIDATA, FN_AD_DI, - - /* IPSR7 */ - FN_ETH_CRS_DV, FN_VI0_G1, FN_MSIOF2_TXD_B, FN_IIC0_SDA_D, FN_AVB_TXD0, - FN_ADICS_SAMP, FN_AD_DO, FN_ETH_RX_ER, FN_VI0_G2, FN_MSIOF2_SCK_B, - FN_CAN0_RX_B, FN_AVB_TXD1, FN_ADICLK, FN_AD_CLK, FN_ETH_RXD0, FN_VI0_G3, - FN_MSIOF2_SYNC_B, FN_CAN0_TX_B, FN_AVB_TXD2, FN_ADICHS0, FN_AD_NCS_N, - FN_ETH_RXD1, FN_VI0_G4, FN_MSIOF2_SS1_B, FN_SCIF4_RXD_D, FN_AVB_TXD3, - FN_ADICHS1, FN_ETH_LINK, FN_VI0_G5, FN_MSIOF2_SS2_B, FN_SCIF4_TXD_D, - FN_AVB_TXD4, FN_ADICHS2, FN_ETH_REFCLK, FN_VI0_G6, FN_SCIF2_SCK_C, - FN_AVB_TXD5, FN_SSI_SCK5_B, FN_ETH_TXD1, FN_VI0_G7, FN_SCIF2_RXD_C, - FN_IIC1_SCL_D, FN_AVB_TXD6, FN_SSI_WS5_B, FN_ETH_TX_EN, FN_VI0_R0, - FN_SCIF2_TXD_C, FN_IIC1_SDA_D, FN_AVB_TXD7, FN_SSI_SDATA5_B, - FN_ETH_MAGIC, FN_VI0_R1, FN_SCIF3_SCK_B, FN_AVB_TX_ER, FN_SSI_SCK6_B, - FN_ETH_TXD0, FN_VI0_R2, FN_SCIF3_RXD_B, FN_I2C4_SCL_E, FN_AVB_GTX_CLK, - FN_SSI_WS6_B, FN_DREQ0_N, FN_SCIFB1_RXD, - - /* IPSR8 */ - FN_ETH_MDC, FN_VI0_R3, FN_SCIF3_TXD_B, FN_I2C4_SDA_E, FN_AVB_MDC, - FN_SSI_SDATA6_B, FN_HSCIF0_HRX, FN_VI0_R4, FN_I2C1_SCL_C, - FN_AUDIO_CLKA_B, FN_AVB_MDIO, FN_SSI_SCK78_B, FN_HSCIF0_HTX, - FN_VI0_R5, FN_I2C1_SDA_C, FN_AUDIO_CLKB_B, FN_AVB_LINK, FN_SSI_WS78_B, - FN_HSCIF0_HCTS_N, FN_VI0_R6, FN_SCIF0_RXD_D, FN_I2C0_SCL_E, - FN_AVB_MAGIC, FN_SSI_SDATA7_B, FN_HSCIF0_HRTS_N, FN_VI0_R7, - FN_SCIF0_TXD_D, FN_I2C0_SDA_E, FN_AVB_PHY_INT, FN_SSI_SDATA8_B, - FN_HSCIF0_HSCK, FN_SCIF_CLK_B, FN_AVB_CRS, FN_AUDIO_CLKC_B, - FN_I2C0_SCL, FN_SCIF0_RXD_C, FN_PWM5, FN_TCLK1_B, FN_AVB_GTXREFCLK, - FN_CAN1_RX_D, FN_TPUTO0_B, FN_I2C0_SDA, FN_SCIF0_TXD_C, FN_TPUTO0, - FN_CAN_CLK, FN_DVC_MUTE, FN_CAN1_TX_D, FN_I2C1_SCL, FN_SCIF4_RXD, - FN_PWM5_B, FN_DU1_DR0, FN_RIF1_SYNC_B, FN_TS_SDATA_D, FN_TPUTO1_B, - FN_I2C1_SDA, FN_SCIF4_TXD, FN_IRQ5, FN_DU1_DR1, FN_RIF1_CLK_B, - FN_TS_SCK_D, FN_BPFCLK_C, FN_MSIOF0_RXD, FN_SCIF5_RXD, FN_I2C2_SCL_C, - FN_DU1_DR2, FN_RIF1_D0_B, FN_TS_SDEN_D, FN_FMCLK_C, FN_RDS_CLK, - - /* - * From IPSR9 to IPSR10 have been removed because they does not use. - */ - - /* IPSR11 */ - FN_SSI_WS5, FN_SCIFA3_RXD, FN_I2C3_SCL_C, FN_DU1_DOTCLKOUT0, - FN_CAN_DEBUGOUT11, FN_SSI_SDATA5, FN_SCIFA3_TXD, FN_I2C3_SDA_C, - FN_DU1_DOTCLKOUT1, FN_CAN_DEBUGOUT12, FN_SSI_SCK6, FN_SCIFA1_SCK_B, - FN_DU1_EXHSYNC_DU1_HSYNC, FN_CAN_DEBUGOUT13, FN_SSI_WS6, - FN_SCIFA1_RXD_B, FN_I2C4_SCL_C, FN_DU1_EXVSYNC_DU1_VSYNC, - FN_CAN_DEBUGOUT14, FN_SSI_SDATA6, FN_SCIFA1_TXD_B, FN_I2C4_SDA_C, - FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, FN_CAN_DEBUGOUT15, FN_SSI_SCK78, - FN_SCIFA2_SCK_B, FN_IIC0_SDA_C, FN_DU1_DISP, FN_SSI_WS78, - FN_SCIFA2_RXD_B, FN_IIC0_SCL_C, FN_DU1_CDE, FN_SSI_SDATA7, - FN_SCIFA2_TXD_B, FN_IRQ8, FN_AUDIO_CLKA_D, FN_CAN_CLK_D, FN_PCMOE_N, - FN_SSI_SCK0129, FN_MSIOF1_RXD_B, FN_SCIF5_RXD_D, FN_ADIDATA_B, - FN_AD_DI_B, FN_PCMWE_N, FN_SSI_WS0129, FN_MSIOF1_TXD_B, FN_SCIF5_TXD_D, - FN_ADICS_SAMP_B, FN_AD_DO_B, FN_SSI_SDATA0, FN_MSIOF1_SCK_B, FN_PWM0_B, - FN_ADICLK_B, FN_AD_CLK_B, - - /* - * From IPSR12 to IPSR13 have been removed because they does not use. - */ - - /* MOD_SEL */ - FN_SEL_ADG_0, FN_SEL_ADG_1, FN_SEL_ADG_2, FN_SEL_ADG_3, - FN_SEL_ADI_0, FN_SEL_ADI_1, FN_SEL_CAN_0, FN_SEL_CAN_1, - FN_SEL_CAN_2, FN_SEL_CAN_3, FN_SEL_DARC_0, FN_SEL_DARC_1, - FN_SEL_DARC_2, FN_SEL_DARC_3, FN_SEL_DARC_4, FN_SEL_DR0_0, - FN_SEL_DR0_1, FN_SEL_DR1_0, FN_SEL_DR1_1, FN_SEL_DR2_0, FN_SEL_DR2_1, - FN_SEL_DR3_0, FN_SEL_DR3_1, FN_SEL_ETH_0, FN_SEL_ETH_1, FN_SEL_FSN_0, - FN_SEL_FSN_1, FN_SEL_I2C00_0, FN_SEL_I2C00_1, FN_SEL_I2C00_2, - FN_SEL_I2C00_3, FN_SEL_I2C00_4, FN_SEL_I2C01_0, FN_SEL_I2C01_1, - FN_SEL_I2C01_2, FN_SEL_I2C01_3, FN_SEL_I2C01_4, FN_SEL_I2C02_0, - FN_SEL_I2C02_1, FN_SEL_I2C02_2, FN_SEL_I2C02_3, FN_SEL_I2C02_4, - FN_SEL_I2C03_0, FN_SEL_I2C03_1, FN_SEL_I2C03_2, FN_SEL_I2C03_3, - FN_SEL_I2C03_4, FN_SEL_I2C04_0, FN_SEL_I2C04_1, FN_SEL_I2C04_2, - FN_SEL_I2C04_3, FN_SEL_I2C04_4, FN_SEL_IIC00_0, FN_SEL_IIC00_1, - FN_SEL_IIC00_2, FN_SEL_IIC00_3, FN_SEL_AVB_0, FN_SEL_AVB_1, - - /* MOD_SEL2 */ - FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, FN_SEL_IIC01_0, - FN_SEL_IIC01_1, FN_SEL_IIC01_2, FN_SEL_IIC01_3, FN_SEL_LBS_0, - FN_SEL_LBS_1, FN_SEL_MSI1_0, FN_SEL_MSI1_1, FN_SEL_MSI2_0, - FN_SEL_MSI2_1, FN_SEL_RAD_0, FN_SEL_RAD_1, FN_SEL_RCN_0, - FN_SEL_RCN_1, FN_SEL_RSP_0, FN_SEL_RSP_1, FN_SEL_SCIFA0_0, - FN_SEL_SCIFA0_1, FN_SEL_SCIFA0_2, FN_SEL_SCIFA0_3, FN_SEL_SCIFA1_0, - FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1, - FN_SEL_SCIFA3_0, FN_SEL_SCIFA3_1, FN_SEL_SCIFA4_0, FN_SEL_SCIFA4_1, - FN_SEL_SCIFA4_2, FN_SEL_SCIFA4_3, FN_SEL_SCIFA5_0, FN_SEL_SCIFA5_1, - FN_SEL_SCIFA5_2, FN_SEL_SCIFA5_3, FN_SEL_SPDM_0, FN_SEL_SPDM_1, - FN_SEL_TMU_0, FN_SEL_TMU_1, FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, - FN_SEL_TSIF0_2, FN_SEL_TSIF0_3, FN_SEL_CAN0_0, FN_SEL_CAN0_1, - FN_SEL_CAN0_2, FN_SEL_CAN0_3, FN_SEL_CAN1_0, FN_SEL_CAN1_1, - FN_SEL_CAN1_2, FN_SEL_CAN1_3, FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, - FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, FN_SEL_RDS_0, FN_SEL_RDS_1, - FN_SEL_RDS_2, FN_SEL_RDS_3, - - /* MOD_SEL3 */ - FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, FN_SEL_SCIF0_3, - FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF2_0, - FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, - FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2, FN_SEL_SCIF4_3, - FN_SEL_SCIF4_4, FN_SEL_SCIF5_0, FN_SEL_SCIF5_1, FN_SEL_SCIF5_2, - FN_SEL_SCIF5_3, FN_SEL_SSI1_0, FN_SEL_SSI1_1, FN_SEL_SSI2_0, - FN_SEL_SSI2_1, FN_SEL_SSI4_0, FN_SEL_SSI4_1, FN_SEL_SSI5_0, - FN_SEL_SSI5_1, FN_SEL_SSI6_0, FN_SEL_SSI6_1, FN_SEL_SSI7_0, - FN_SEL_SSI7_1, FN_SEL_SSI8_0, FN_SEL_SSI8_1, FN_SEL_SSI9_0, - FN_SEL_SSI9_1, - PINMUX_FUNCTION_END, - - PINMUX_MARK_BEGIN, - A2_MARK, WE0_N_MARK, WE1_N_MARK, DACK0_MARK, - - USB0_PWEN_MARK, USB0_OVC_MARK, USB1_PWEN_MARK, USB1_OVC_MARK, - - SD0_CLK_MARK, SD0_CMD_MARK, SD0_DATA0_MARK, SD0_DATA1_MARK, - SD0_DATA2_MARK, SD0_DATA3_MARK, SD0_CD_MARK, SD0_WP_MARK, - - SD1_CLK_MARK, SD1_CMD_MARK, SD1_DATA0_MARK, SD1_DATA1_MARK, - SD1_DATA2_MARK, SD1_DATA3_MARK, - - /* IPSR0 */ - SD1_CD_MARK, CAN0_RX_MARK, SD1_WP_MARK, IRQ7_MARK, CAN0_TX_MARK, - MMC_CLK_MARK, SD2_CLK_MARK, MMC_CMD_MARK, SD2_CMD_MARK, MMC_D0_MARK, - SD2_DATA0_MARK, MMC_D1_MARK, SD2_DATA1_MARK, MMC_D2_MARK, - SD2_DATA2_MARK, MMC_D3_MARK, SD2_DATA3_MARK, MMC_D4_MARK, SD2_CD_MARK, - MMC_D5_MARK, SD2_WP_MARK, MMC_D6_MARK, SCIF0_RXD_MARK, I2C2_SCL_B_MARK, - CAN1_RX_MARK, MMC_D7_MARK, SCIF0_TXD_MARK, I2C2_SDA_B_MARK, - CAN1_TX_MARK, D0_MARK, SCIFA3_SCK_B_MARK, IRQ4_MARK, D1_MARK, - SCIFA3_RXD_B_MARK, D2_MARK, SCIFA3_TXD_B_MARK, D3_MARK, I2C3_SCL_B_MARK, - SCIF5_RXD_B_MARK, D4_MARK, I2C3_SDA_B_MARK, SCIF5_TXD_B_MARK, D5_MARK, - SCIF4_RXD_B_MARK, I2C0_SCL_D_MARK, - - /* - * From IPSR1 to IPSR5 have been removed because they does not use. - */ - - /* IPSR6 */ - DU0_EXVSYNC_DU0_VSYNC_MARK, QSTB_QHE_MARK, CC50_STATE28_MARK, - DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK, QCPV_QDE_MARK, CC50_STATE29_MARK, - DU0_DISP_MARK, QPOLA_MARK, CC50_STATE30_MARK, DU0_CDE_MARK, QPOLB_MARK, - CC50_STATE31_MARK, VI0_CLK_MARK, AVB_RX_CLK_MARK, VI0_DATA0_VI0_B0_MARK, - AVB_RX_DV_MARK, VI0_DATA1_VI0_B1_MARK, AVB_RXD0_MARK, - VI0_DATA2_VI0_B2_MARK, AVB_RXD1_MARK, VI0_DATA3_VI0_B3_MARK, - AVB_RXD2_MARK, VI0_DATA4_VI0_B4_MARK, AVB_RXD3_MARK, - VI0_DATA5_VI0_B5_MARK, AVB_RXD4_MARK, VI0_DATA6_VI0_B6_MARK, - AVB_RXD5_MARK, VI0_DATA7_VI0_B7_MARK, AVB_RXD6_MARK, VI0_CLKENB_MARK, - I2C3_SCL_MARK, SCIFA5_RXD_C_MARK, IETX_C_MARK, AVB_RXD7_MARK, - VI0_FIELD_MARK, I2C3_SDA_MARK, SCIFA5_TXD_C_MARK, IECLK_C_MARK, - AVB_RX_ER_MARK, VI0_HSYNC_N_MARK, SCIF0_RXD_B_MARK, I2C0_SCL_C_MARK, - IERX_C_MARK, AVB_COL_MARK, VI0_VSYNC_N_MARK, SCIF0_TXD_B_MARK, - I2C0_SDA_C_MARK, AUDIO_CLKOUT_B_MARK, AVB_TX_EN_MARK, ETH_MDIO_MARK, - VI0_G0_MARK, MSIOF2_RXD_B_MARK, IIC0_SCL_D_MARK, AVB_TX_CLK_MARK, - ADIDATA_MARK, AD_DI_MARK, - - /* IPSR7 */ - ETH_CRS_DV_MARK, VI0_G1_MARK, MSIOF2_TXD_B_MARK, IIC0_SDA_D_MARK, - AVB_TXD0_MARK, ADICS_SAMP_MARK, AD_DO_MARK, ETH_RX_ER_MARK, VI0_G2_MARK, - MSIOF2_SCK_B_MARK, CAN0_RX_B_MARK, AVB_TXD1_MARK, ADICLK_MARK, - AD_CLK_MARK, ETH_RXD0_MARK, VI0_G3_MARK, MSIOF2_SYNC_B_MARK, - CAN0_TX_B_MARK, AVB_TXD2_MARK, ADICHS0_MARK, AD_NCS_N_MARK, - ETH_RXD1_MARK, VI0_G4_MARK, MSIOF2_SS1_B_MARK, SCIF4_RXD_D_MARK, - AVB_TXD3_MARK, ADICHS1_MARK, ETH_LINK_MARK, VI0_G5_MARK, - MSIOF2_SS2_B_MARK, SCIF4_TXD_D_MARK, AVB_TXD4_MARK, ADICHS2_MARK, - ETH_REFCLK_MARK, VI0_G6_MARK, SCIF2_SCK_C_MARK, AVB_TXD5_MARK, - SSI_SCK5_B_MARK, ETH_TXD1_MARK, VI0_G7_MARK, SCIF2_RXD_C_MARK, - IIC1_SCL_D_MARK, AVB_TXD6_MARK, SSI_WS5_B_MARK, ETH_TX_EN_MARK, - VI0_R0_MARK, SCIF2_TXD_C_MARK, IIC1_SDA_D_MARK, AVB_TXD7_MARK, - SSI_SDATA5_B_MARK, ETH_MAGIC_MARK, VI0_R1_MARK, SCIF3_SCK_B_MARK, - AVB_TX_ER_MARK, SSI_SCK6_B_MARK, ETH_TXD0_MARK, VI0_R2_MARK, - SCIF3_RXD_B_MARK, I2C4_SCL_E_MARK, AVB_GTX_CLK_MARK, SSI_WS6_B_MARK, - DREQ0_N_MARK, SCIFB1_RXD_MARK, - - /* IPSR8 */ - ETH_MDC_MARK, VI0_R3_MARK, SCIF3_TXD_B_MARK, I2C4_SDA_E_MARK, - AVB_MDC_MARK, SSI_SDATA6_B_MARK, HSCIF0_HRX_MARK, VI0_R4_MARK, - I2C1_SCL_C_MARK, AUDIO_CLKA_B_MARK, AVB_MDIO_MARK, SSI_SCK78_B_MARK, - HSCIF0_HTX_MARK, VI0_R5_MARK, I2C1_SDA_C_MARK, AUDIO_CLKB_B_MARK, - AVB_LINK_MARK, SSI_WS78_B_MARK, HSCIF0_HCTS_N_MARK, VI0_R6_MARK, - SCIF0_RXD_D_MARK, I2C0_SCL_E_MARK, AVB_MAGIC_MARK, SSI_SDATA7_B_MARK, - HSCIF0_HRTS_N_MARK, VI0_R7_MARK, SCIF0_TXD_D_MARK, I2C0_SDA_E_MARK, - AVB_PHY_INT_MARK, SSI_SDATA8_B_MARK, - HSCIF0_HSCK_MARK, SCIF_CLK_B_MARK, AVB_CRS_MARK, AUDIO_CLKC_B_MARK, - I2C0_SCL_MARK, SCIF0_RXD_C_MARK, PWM5_MARK, TCLK1_B_MARK, - AVB_GTXREFCLK_MARK, CAN1_RX_D_MARK, TPUTO0_B_MARK, I2C0_SDA_MARK, - SCIF0_TXD_C_MARK, TPUTO0_MARK, CAN_CLK_MARK, DVC_MUTE_MARK, - CAN1_TX_D_MARK, I2C1_SCL_MARK, SCIF4_RXD_MARK, PWM5_B_MARK, - DU1_DR0_MARK, RIF1_SYNC_B_MARK, TS_SDATA_D_MARK, TPUTO1_B_MARK, - I2C1_SDA_MARK, SCIF4_TXD_MARK, IRQ5_MARK, DU1_DR1_MARK, RIF1_CLK_B_MARK, - TS_SCK_D_MARK, BPFCLK_C_MARK, MSIOF0_RXD_MARK, SCIF5_RXD_MARK, - I2C2_SCL_C_MARK, DU1_DR2_MARK, RIF1_D0_B_MARK, TS_SDEN_D_MARK, - FMCLK_C_MARK, RDS_CLK_MARK, - - /* - * From IPSR9 to IPSR10 have been removed because they does not use. - */ - - /* IPSR11 */ - SSI_WS5_MARK, SCIFA3_RXD_MARK, I2C3_SCL_C_MARK, DU1_DOTCLKOUT0_MARK, - CAN_DEBUGOUT11_MARK, SSI_SDATA5_MARK, SCIFA3_TXD_MARK, I2C3_SDA_C_MARK, - DU1_DOTCLKOUT1_MARK, CAN_DEBUGOUT12_MARK, SSI_SCK6_MARK, - SCIFA1_SCK_B_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK, CAN_DEBUGOUT13_MARK, - SSI_WS6_MARK, SCIFA1_RXD_B_MARK, I2C4_SCL_C_MARK, - DU1_EXVSYNC_DU1_VSYNC_MARK, CAN_DEBUGOUT14_MARK, SSI_SDATA6_MARK, - SCIFA1_TXD_B_MARK, I2C4_SDA_C_MARK, DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK, - CAN_DEBUGOUT15_MARK, SSI_SCK78_MARK, SCIFA2_SCK_B_MARK, IIC0_SDA_C_MARK, - DU1_DISP_MARK, SSI_WS78_MARK, SCIFA2_RXD_B_MARK, IIC0_SCL_C_MARK, - DU1_CDE_MARK, SSI_SDATA7_MARK, SCIFA2_TXD_B_MARK, IRQ8_MARK, - AUDIO_CLKA_D_MARK, CAN_CLK_D_MARK, PCMOE_N_MARK, SSI_SCK0129_MARK, - MSIOF1_RXD_B_MARK, SCIF5_RXD_D_MARK, ADIDATA_B_MARK, AD_DI_B_MARK, - PCMWE_N_MARK, SSI_WS0129_MARK, MSIOF1_TXD_B_MARK, SCIF5_TXD_D_MARK, - ADICS_SAMP_B_MARK, AD_DO_B_MARK, SSI_SDATA0_MARK, MSIOF1_SCK_B_MARK, - PWM0_B_MARK, ADICLK_B_MARK, AD_CLK_B_MARK, - - /* - * From IPSR12 to IPSR13 have been removed because they does not use. - */ - - PINMUX_MARK_END, -}; - -static pinmux_enum_t pinmux_data[] = { - PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */ - - PINMUX_DATA(A2_MARK, FN_A2), - PINMUX_DATA(WE0_N_MARK, FN_WE0_N), - PINMUX_DATA(WE1_N_MARK, FN_WE1_N), - PINMUX_DATA(DACK0_MARK, FN_DACK0), - PINMUX_DATA(USB0_PWEN_MARK, FN_USB0_PWEN), - PINMUX_DATA(USB0_OVC_MARK, FN_USB0_OVC), - PINMUX_DATA(USB1_PWEN_MARK, FN_USB1_PWEN), - PINMUX_DATA(USB1_OVC_MARK, FN_USB1_OVC), - PINMUX_DATA(SD0_CLK_MARK, FN_SD0_CLK), - PINMUX_DATA(SD0_CMD_MARK, FN_SD0_CMD), - PINMUX_DATA(SD0_DATA0_MARK, FN_SD0_DATA0), - PINMUX_DATA(SD0_DATA1_MARK, FN_SD0_DATA1), - PINMUX_DATA(SD0_DATA2_MARK, FN_SD0_DATA2), - PINMUX_DATA(SD0_DATA3_MARK, FN_SD0_DATA3), - PINMUX_DATA(SD0_CD_MARK, FN_SD0_CD), - PINMUX_DATA(SD0_WP_MARK, FN_SD0_WP), - PINMUX_DATA(SD1_CLK_MARK, FN_SD1_CLK), - PINMUX_DATA(SD1_CMD_MARK, FN_SD1_CMD), - PINMUX_DATA(SD1_DATA0_MARK, FN_SD1_DATA0), - PINMUX_DATA(SD1_DATA1_MARK, FN_SD1_DATA1), - PINMUX_DATA(SD1_DATA2_MARK, FN_SD1_DATA2), - PINMUX_DATA(SD1_DATA3_MARK, FN_SD1_DATA3), - - /* IPSR0 */ - PINMUX_IPSR_DATA(IP0_0, SD1_CD), - PINMUX_IPSR_MODSEL_DATA(IP0_0, CAN0_RX, SEL_CAN0_0), - PINMUX_IPSR_DATA(IP0_9_8, SD1_WP), - PINMUX_IPSR_DATA(IP0_9_8, IRQ7), - PINMUX_IPSR_MODSEL_DATA(IP0_9_8, CAN0_TX, SEL_CAN0_0), - PINMUX_IPSR_DATA(IP0_10, MMC_CLK), - PINMUX_IPSR_DATA(IP0_10, SD2_CLK), - PINMUX_IPSR_DATA(IP0_11, MMC_CMD), - PINMUX_IPSR_DATA(IP0_11, SD2_CMD), - PINMUX_IPSR_DATA(IP0_12, MMC_D0), - PINMUX_IPSR_DATA(IP0_12, SD2_DATA0), - PINMUX_IPSR_DATA(IP0_13, MMC_D1), - PINMUX_IPSR_DATA(IP0_13, SD2_DATA1), - PINMUX_IPSR_DATA(IP0_14, MMC_D2), - PINMUX_IPSR_DATA(IP0_14, SD2_DATA2), - PINMUX_IPSR_DATA(IP0_15, MMC_D3), - PINMUX_IPSR_DATA(IP0_15, SD2_DATA3), - PINMUX_IPSR_DATA(IP0_16, MMC_D4), - PINMUX_IPSR_DATA(IP0_16, SD2_CD), - PINMUX_IPSR_DATA(IP0_17, MMC_D5), - PINMUX_IPSR_DATA(IP0_17, SD2_WP), - PINMUX_IPSR_DATA(IP0_19_18, MMC_D6), - PINMUX_IPSR_MODSEL_DATA(IP0_19_18, SCIF0_RXD, SEL_SCIF0_0), - PINMUX_IPSR_MODSEL_DATA(IP0_19_18, I2C2_SCL_B, SEL_I2C02_1), - PINMUX_IPSR_MODSEL_DATA(IP0_19_18, CAN1_RX, SEL_CAN1_0), - PINMUX_IPSR_DATA(IP0_21_20, MMC_D7), - PINMUX_IPSR_MODSEL_DATA(IP0_21_20, SCIF0_TXD, SEL_SCIF0_0), - PINMUX_IPSR_MODSEL_DATA(IP0_21_20, I2C2_SDA_B, SEL_I2C02_1), - PINMUX_IPSR_MODSEL_DATA(IP0_21_20, CAN1_TX, SEL_CAN1_0), - PINMUX_IPSR_DATA(IP0_23_22, D0), - PINMUX_IPSR_MODSEL_DATA(IP0_23_22, SCIFA3_SCK_B, SEL_SCIFA3_1), - PINMUX_IPSR_DATA(IP0_23_22, IRQ4), - PINMUX_IPSR_DATA(IP0_24, D1), - PINMUX_IPSR_MODSEL_DATA(IP0_24, SCIFA3_RXD_B, SEL_SCIFA3_1), - PINMUX_IPSR_DATA(IP0_25, D2), - PINMUX_IPSR_MODSEL_DATA(IP0_25, SCIFA3_TXD_B, SEL_SCIFA3_1), - PINMUX_IPSR_DATA(IP0_27_26, D3), - PINMUX_IPSR_MODSEL_DATA(IP0_27_26, I2C3_SCL_B, SEL_I2C03_1), - PINMUX_IPSR_MODSEL_DATA(IP0_27_26, SCIF5_RXD_B, SEL_SCIF5_1), - PINMUX_IPSR_DATA(IP0_29_28, D4), - PINMUX_IPSR_MODSEL_DATA(IP0_29_28, I2C3_SDA_B, SEL_I2C03_1), - PINMUX_IPSR_MODSEL_DATA(IP0_29_28, SCIF5_TXD_B, SEL_SCIF5_1), - PINMUX_IPSR_DATA(IP0_31_30, D5), - PINMUX_IPSR_MODSEL_DATA(IP0_31_30, SCIF4_RXD_B, SEL_SCIF4_1), - PINMUX_IPSR_MODSEL_DATA(IP0_31_30, I2C0_SCL_D, SEL_I2C00_3), - - /* - * From IPSR1 to IPSR5 have been removed because they does not use. - */ - - /* IPSR6 */ - PINMUX_IPSR_DATA(IP6_1_0, DU0_EXVSYNC_DU0_VSYNC), - PINMUX_IPSR_DATA(IP6_1_0, QSTB_QHE), - PINMUX_IPSR_DATA(IP6_1_0, CC50_STATE28), - PINMUX_IPSR_DATA(IP6_3_2, DU0_EXODDF_DU0_ODDF_DISP_CDE), - PINMUX_IPSR_DATA(IP6_3_2, QCPV_QDE), - PINMUX_IPSR_DATA(IP6_3_2, CC50_STATE29), - PINMUX_IPSR_DATA(IP6_5_4, DU0_DISP), - PINMUX_IPSR_DATA(IP6_5_4, QPOLA), - PINMUX_IPSR_DATA(IP6_5_4, CC50_STATE30), - PINMUX_IPSR_DATA(IP6_7_6, DU0_CDE), - PINMUX_IPSR_DATA(IP6_7_6, QPOLB), - PINMUX_IPSR_DATA(IP6_7_6, CC50_STATE31), - PINMUX_IPSR_DATA(IP6_8, VI0_CLK), - PINMUX_IPSR_DATA(IP6_8, AVB_RX_CLK), - PINMUX_IPSR_DATA(IP6_9, VI0_DATA0_VI0_B0), - PINMUX_IPSR_DATA(IP6_9, AVB_RX_DV), - PINMUX_IPSR_DATA(IP6_10, VI0_DATA1_VI0_B1), - PINMUX_IPSR_DATA(IP6_10, AVB_RXD0), - PINMUX_IPSR_DATA(IP6_11, VI0_DATA2_VI0_B2), - PINMUX_IPSR_DATA(IP6_11, AVB_RXD1), - PINMUX_IPSR_DATA(IP6_12, VI0_DATA3_VI0_B3), - PINMUX_IPSR_DATA(IP6_12, AVB_RXD2), - PINMUX_IPSR_DATA(IP6_13, VI0_DATA4_VI0_B4), - PINMUX_IPSR_DATA(IP6_13, AVB_RXD3), - PINMUX_IPSR_DATA(IP6_14, VI0_DATA5_VI0_B5), - PINMUX_IPSR_DATA(IP6_14, AVB_RXD4), - PINMUX_IPSR_DATA(IP6_15, VI0_DATA6_VI0_B6), - PINMUX_IPSR_DATA(IP6_15, AVB_RXD5), - PINMUX_IPSR_DATA(IP6_16, VI0_DATA7_VI0_B7), - PINMUX_IPSR_DATA(IP6_16, AVB_RXD6), - PINMUX_IPSR_DATA(IP6_19_17, VI0_CLKENB), - PINMUX_IPSR_MODSEL_DATA(IP6_19_17, I2C3_SCL, SEL_I2C03_0), - PINMUX_IPSR_MODSEL_DATA(IP6_19_17, SCIFA5_RXD_C, SEL_SCIFA5_2), - PINMUX_IPSR_MODSEL_DATA(IP6_19_17, IETX_C, SEL_IEB_2), - PINMUX_IPSR_DATA(IP6_19_17, AVB_RXD7), - PINMUX_IPSR_DATA(IP6_22_20, VI0_FIELD), - PINMUX_IPSR_MODSEL_DATA(IP6_22_20, I2C3_SDA, SEL_I2C03_0), - PINMUX_IPSR_MODSEL_DATA(IP6_22_20, SCIFA5_TXD_C, SEL_SCIFA5_2), - PINMUX_IPSR_MODSEL_DATA(IP6_22_20, IECLK_C, SEL_IEB_2), - PINMUX_IPSR_DATA(IP6_22_20, AVB_RX_ER), - PINMUX_IPSR_DATA(IP6_25_23, VI0_HSYNC_N), - PINMUX_IPSR_MODSEL_DATA(IP6_25_23, SCIF0_RXD_B, SEL_SCIF0_1), - PINMUX_IPSR_MODSEL_DATA(IP6_25_23, I2C0_SCL_C, SEL_I2C00_2), - PINMUX_IPSR_MODSEL_DATA(IP6_25_23, IERX_C, SEL_IEB_2), - PINMUX_IPSR_DATA(IP6_25_23, AVB_COL), - PINMUX_IPSR_DATA(IP6_28_26, VI0_VSYNC_N), - PINMUX_IPSR_MODSEL_DATA(IP6_28_26, SCIF0_TXD_B, SEL_SCIF0_1), - PINMUX_IPSR_MODSEL_DATA(IP6_28_26, I2C0_SDA_C, SEL_I2C00_2), - PINMUX_IPSR_MODSEL_DATA(IP6_28_26, AUDIO_CLKOUT_B, SEL_ADG_1), - PINMUX_IPSR_DATA(IP6_28_26, AVB_TX_EN), - PINMUX_IPSR_MODSEL_DATA(IP6_31_29, ETH_MDIO, SEL_ETH_0), - PINMUX_IPSR_DATA(IP6_31_29, VI0_G0), - PINMUX_IPSR_MODSEL_DATA(IP6_31_29, MSIOF2_RXD_B, SEL_MSI2_1), - PINMUX_IPSR_MODSEL_DATA(IP6_31_29, IIC0_SCL_D, SEL_IIC00_3), - PINMUX_IPSR_DATA(IP6_31_29, AVB_TX_CLK), - PINMUX_IPSR_MODSEL_DATA(IP6_31_29, ADIDATA, SEL_RAD_0), - PINMUX_IPSR_MODSEL_DATA(IP6_31_29, AD_DI, SEL_ADI_0), - - /* IPSR7 */ - PINMUX_IPSR_MODSEL_DATA(IP7_2_0, ETH_CRS_DV, SEL_ETH_0), - PINMUX_IPSR_DATA(IP7_2_0, VI0_G1), - PINMUX_IPSR_MODSEL_DATA(IP7_2_0, MSIOF2_TXD_B, SEL_MSI2_1), - PINMUX_IPSR_MODSEL_DATA(IP7_2_0, IIC0_SDA_D, SEL_IIC00_3), - PINMUX_IPSR_DATA(IP7_2_0, AVB_TXD0), - PINMUX_IPSR_MODSEL_DATA(IP7_2_0, ADICS_SAMP, SEL_RAD_0), - PINMUX_IPSR_MODSEL_DATA(IP7_2_0, AD_DO, SEL_ADI_0), - PINMUX_IPSR_MODSEL_DATA(IP7_5_3, ETH_RX_ER, SEL_ETH_0), - PINMUX_IPSR_DATA(IP7_5_3, VI0_G2), - PINMUX_IPSR_MODSEL_DATA(IP7_5_3, MSIOF2_SCK_B, SEL_MSI2_1), - PINMUX_IPSR_MODSEL_DATA(IP7_5_3, CAN0_RX_B, SEL_CAN0_1), - PINMUX_IPSR_DATA(IP7_5_3, AVB_TXD1), - PINMUX_IPSR_MODSEL_DATA(IP7_5_3, ADICLK, SEL_RAD_0), - PINMUX_IPSR_MODSEL_DATA(IP7_5_3, AD_CLK, SEL_ADI_0), - PINMUX_IPSR_MODSEL_DATA(IP7_8_6, ETH_RXD0, SEL_ETH_0), - PINMUX_IPSR_DATA(IP7_8_6, VI0_G3), - PINMUX_IPSR_MODSEL_DATA(IP7_8_6, MSIOF2_SYNC_B, SEL_MSI2_1), - PINMUX_IPSR_MODSEL_DATA(IP7_8_6, CAN0_TX_B, SEL_CAN0_1), - PINMUX_IPSR_DATA(IP7_8_6, AVB_TXD2), - PINMUX_IPSR_MODSEL_DATA(IP7_8_6, ADICHS0, SEL_RAD_0), - PINMUX_IPSR_MODSEL_DATA(IP7_8_6, AD_NCS_N, SEL_ADI_0), - PINMUX_IPSR_MODSEL_DATA(IP7_11_9, ETH_RXD1, SEL_ETH_0), - PINMUX_IPSR_DATA(IP7_11_9, VI0_G4), - PINMUX_IPSR_MODSEL_DATA(IP7_11_9, MSIOF2_SS1_B, SEL_MSI2_1), - PINMUX_IPSR_MODSEL_DATA(IP7_11_9, SCIF4_RXD_D, SEL_SCIF4_3), - PINMUX_IPSR_DATA(IP7_11_9, AVB_TXD3), - PINMUX_IPSR_MODSEL_DATA(IP7_11_9, ADICHS1, SEL_RAD_0), - PINMUX_IPSR_MODSEL_DATA(IP7_14_12, ETH_LINK, SEL_ETH_0), - PINMUX_IPSR_DATA(IP7_14_12, VI0_G5), - PINMUX_IPSR_MODSEL_DATA(IP7_14_12, MSIOF2_SS2_B, SEL_MSI2_1), - PINMUX_IPSR_MODSEL_DATA(IP7_14_12, SCIF4_TXD_D, SEL_SCIF4_3), - PINMUX_IPSR_DATA(IP7_14_12, AVB_TXD4), - PINMUX_IPSR_MODSEL_DATA(IP7_14_12, ADICHS2, SEL_RAD_0), - PINMUX_IPSR_MODSEL_DATA(IP7_17_15, ETH_REFCLK, SEL_ETH_0), - PINMUX_IPSR_DATA(IP7_17_15, VI0_G6), - PINMUX_IPSR_MODSEL_DATA(IP7_17_15, SCIF2_SCK_C, SEL_SCIF2_2), - PINMUX_IPSR_DATA(IP7_17_15, AVB_TXD5), - PINMUX_IPSR_MODSEL_DATA(IP7_17_15, SSI_SCK5_B, SEL_SSI5_1), - PINMUX_IPSR_MODSEL_DATA(IP7_20_18, ETH_TXD1, SEL_ETH_0), - PINMUX_IPSR_DATA(IP7_20_18, VI0_G7), - PINMUX_IPSR_MODSEL_DATA(IP7_20_18, SCIF2_RXD_C, SEL_SCIF2_2), - PINMUX_IPSR_MODSEL_DATA(IP7_20_18, IIC1_SCL_D, SEL_IIC01_3), - PINMUX_IPSR_DATA(IP7_20_18, AVB_TXD6), - PINMUX_IPSR_MODSEL_DATA(IP7_20_18, SSI_WS5_B, SEL_SSI5_1), - PINMUX_IPSR_MODSEL_DATA(IP7_23_21, ETH_TX_EN, SEL_ETH_0), - PINMUX_IPSR_DATA(IP7_23_21, VI0_R0), - PINMUX_IPSR_MODSEL_DATA(IP7_23_21, SCIF2_TXD_C, SEL_SCIF2_2), - PINMUX_IPSR_MODSEL_DATA(IP7_23_21, IIC1_SDA_D, SEL_IIC01_3), - PINMUX_IPSR_DATA(IP7_23_21, AVB_TXD7), - PINMUX_IPSR_MODSEL_DATA(IP7_23_21, SSI_SDATA5_B, SEL_SSI5_1), - PINMUX_IPSR_MODSEL_DATA(IP7_26_24, ETH_MAGIC, SEL_ETH_0), - PINMUX_IPSR_DATA(IP7_26_24, VI0_R1), - PINMUX_IPSR_MODSEL_DATA(IP7_26_24, SCIF3_SCK_B, SEL_SCIF3_1), - PINMUX_IPSR_DATA(IP7_26_24, AVB_TX_ER), - PINMUX_IPSR_MODSEL_DATA(IP7_26_24, SSI_SCK6_B, SEL_SSI6_1), - PINMUX_IPSR_MODSEL_DATA(IP7_29_27, ETH_TXD0, SEL_ETH_0), - PINMUX_IPSR_DATA(IP7_29_27, VI0_R2), - PINMUX_IPSR_MODSEL_DATA(IP7_29_27, SCIF3_RXD_B, SEL_SCIF3_1), - PINMUX_IPSR_MODSEL_DATA(IP7_29_27, I2C4_SCL_E, SEL_I2C04_4), - PINMUX_IPSR_DATA(IP7_29_27, AVB_GTX_CLK), - PINMUX_IPSR_MODSEL_DATA(IP7_29_27, SSI_WS6_B, SEL_SSI6_1), - PINMUX_IPSR_DATA(IP7_31, DREQ0_N), - PINMUX_IPSR_DATA(IP7_31, SCIFB1_RXD), - - /* IPSR8 */ - PINMUX_IPSR_MODSEL_DATA(IP8_2_0, ETH_MDC, SEL_ETH_0), - PINMUX_IPSR_DATA(IP8_2_0, VI0_R3), - PINMUX_IPSR_MODSEL_DATA(IP8_2_0, SCIF3_TXD_B, SEL_SCIF3_1), - PINMUX_IPSR_MODSEL_DATA(IP8_2_0, I2C4_SDA_E, SEL_I2C04_4), - PINMUX_IPSR_DATA(IP8_2_0, AVB_MDC), - PINMUX_IPSR_MODSEL_DATA(IP8_2_0, SSI_SDATA6_B, SEL_SSI6_1), - PINMUX_IPSR_MODSEL_DATA(IP8_5_3, HSCIF0_HRX, SEL_HSCIF0_0), - PINMUX_IPSR_DATA(IP8_5_3, VI0_R4), - PINMUX_IPSR_MODSEL_DATA(IP8_5_3, I2C1_SCL_C, SEL_I2C01_2), - PINMUX_IPSR_MODSEL_DATA(IP8_5_3, AUDIO_CLKA_B, SEL_ADG_1), - PINMUX_IPSR_DATA(IP8_5_3, AVB_MDIO), - PINMUX_IPSR_MODSEL_DATA(IP8_5_3, SSI_SCK78_B, SEL_SSI7_1), - PINMUX_IPSR_MODSEL_DATA(IP8_8_6, HSCIF0_HTX, SEL_HSCIF0_0), - PINMUX_IPSR_DATA(IP8_8_6, VI0_R5), - PINMUX_IPSR_MODSEL_DATA(IP8_8_6, I2C1_SDA_C, SEL_I2C01_2), - PINMUX_IPSR_MODSEL_DATA(IP8_8_6, AUDIO_CLKB_B, SEL_ADG_1), - PINMUX_IPSR_DATA(IP8_5_3, AVB_LINK), - PINMUX_IPSR_MODSEL_DATA(IP8_8_6, SSI_WS78_B, SEL_SSI7_1), - PINMUX_IPSR_DATA(IP8_11_9, HSCIF0_HCTS_N), - PINMUX_IPSR_DATA(IP8_11_9, VI0_R6), - PINMUX_IPSR_MODSEL_DATA(IP8_11_9, SCIF0_RXD_D, SEL_SCIF0_3), - PINMUX_IPSR_MODSEL_DATA(IP8_11_9, I2C0_SCL_E, SEL_I2C00_4), - PINMUX_IPSR_DATA(IP8_11_9, AVB_MAGIC), - PINMUX_IPSR_MODSEL_DATA(IP8_11_9, SSI_SDATA7_B, SEL_SSI7_1), - PINMUX_IPSR_DATA(IP8_14_12, HSCIF0_HRTS_N), - PINMUX_IPSR_DATA(IP8_14_12, VI0_R7), - PINMUX_IPSR_MODSEL_DATA(IP8_14_12, SCIF0_TXD_D, SEL_SCIF0_3), - PINMUX_IPSR_MODSEL_DATA(IP8_14_12, I2C0_SDA_E, SEL_I2C00_4), - PINMUX_IPSR_DATA(IP8_14_12, AVB_PHY_INT), - PINMUX_IPSR_MODSEL_DATA(IP8_14_12, SSI_SDATA8_B, SEL_SSI8_1), - PINMUX_IPSR_MODSEL_DATA(IP8_16_15, HSCIF0_HSCK, SEL_HSCIF0_0), - PINMUX_IPSR_MODSEL_DATA(IP8_16_15, SCIF_CLK_B, SEL_SCIF0_1), - PINMUX_IPSR_DATA(IP8_16_15, AVB_CRS), - PINMUX_IPSR_MODSEL_DATA(IP8_16_15, AUDIO_CLKC_B, SEL_ADG_1), - PINMUX_IPSR_MODSEL_DATA(IP8_19_17, I2C0_SCL, SEL_I2C00_0), - PINMUX_IPSR_MODSEL_DATA(IP8_19_17, SCIF0_RXD_C, SEL_SCIF0_2), - PINMUX_IPSR_DATA(IP8_19_17, PWM5), - PINMUX_IPSR_MODSEL_DATA(IP8_19_17, TCLK1_B, SEL_TMU_1), - PINMUX_IPSR_DATA(IP8_19_17, AVB_GTXREFCLK), - PINMUX_IPSR_MODSEL_DATA(IP8_19_17, CAN1_RX_D, SEL_CAN1_3), - PINMUX_IPSR_DATA(IP8_19_17, TPUTO0_B), - PINMUX_IPSR_MODSEL_DATA(IP8_22_20, I2C0_SDA, SEL_I2C00_0), - PINMUX_IPSR_MODSEL_DATA(IP8_22_20, SCIF0_TXD_C, SEL_SCIF0_2), - PINMUX_IPSR_DATA(IP8_22_20, TPUTO0), - PINMUX_IPSR_MODSEL_DATA(IP8_22_20, CAN_CLK, SEL_CAN_0), - PINMUX_IPSR_DATA(IP8_22_20, DVC_MUTE), - PINMUX_IPSR_MODSEL_DATA(IP8_22_20, CAN1_TX_D, SEL_CAN1_3), - PINMUX_IPSR_MODSEL_DATA(IP8_25_23, I2C1_SCL, SEL_I2C01_0), - PINMUX_IPSR_MODSEL_DATA(IP8_25_23, SCIF4_RXD, SEL_SCIF4_0), - PINMUX_IPSR_DATA(IP8_25_23, PWM5_B), - PINMUX_IPSR_DATA(IP8_25_23, DU1_DR0), - PINMUX_IPSR_MODSEL_DATA(IP8_25_23, RIF1_SYNC_B, SEL_DR2_1), - PINMUX_IPSR_MODSEL_DATA(IP8_25_23, TS_SDATA_D, SEL_TSIF0_3), - PINMUX_IPSR_DATA(IP8_25_23, TPUTO1_B), - PINMUX_IPSR_MODSEL_DATA(IP8_28_26, I2C1_SDA, SEL_I2C01_0), - PINMUX_IPSR_MODSEL_DATA(IP8_28_26, SCIF4_TXD, SEL_SCIF4_0), - PINMUX_IPSR_DATA(IP8_28_26, IRQ5), - PINMUX_IPSR_DATA(IP8_28_26, DU1_DR1), - PINMUX_IPSR_MODSEL_DATA(IP8_28_26, RIF1_CLK_B, SEL_DR2_1), - PINMUX_IPSR_MODSEL_DATA(IP8_28_26, TS_SCK_D, SEL_TSIF0_3), - PINMUX_IPSR_MODSEL_DATA(IP8_28_26, BPFCLK_C, SEL_DARC_2), - PINMUX_IPSR_DATA(IP8_31_29, MSIOF0_RXD), - PINMUX_IPSR_MODSEL_DATA(IP8_31_29, SCIF5_RXD, SEL_SCIF5_0), - PINMUX_IPSR_MODSEL_DATA(IP8_31_29, I2C2_SCL_C, SEL_I2C02_2), - PINMUX_IPSR_DATA(IP8_31_29, DU1_DR2), - PINMUX_IPSR_MODSEL_DATA(IP8_31_29, RIF1_D0_B, SEL_DR2_1), - PINMUX_IPSR_MODSEL_DATA(IP8_31_29, TS_SDEN_D, SEL_TSIF0_3), - PINMUX_IPSR_MODSEL_DATA(IP8_31_29, FMCLK_C, SEL_DARC_2), - PINMUX_IPSR_MODSEL_DATA(IP8_31_29, RDS_CLK, SEL_RDS_0), - - /* - * From IPSR9 to IPSR10 have been removed because they does not use. - */ - - /* IPSR11 */ - PINMUX_IPSR_MODSEL_DATA(IP11_2_0, SSI_WS5, SEL_SSI5_0), - PINMUX_IPSR_MODSEL_DATA(IP11_2_0, SCIFA3_RXD, SEL_SCIFA3_0), - PINMUX_IPSR_MODSEL_DATA(IP11_2_0, I2C3_SCL_C, SEL_I2C03_2), - PINMUX_IPSR_DATA(IP11_2_0, DU1_DOTCLKOUT0), - PINMUX_IPSR_DATA(IP11_2_0, CAN_DEBUGOUT11), - PINMUX_IPSR_MODSEL_DATA(IP11_5_3, SSI_SDATA5, SEL_SSI5_0), - PINMUX_IPSR_MODSEL_DATA(IP11_5_3, SCIFA3_TXD, SEL_SCIFA3_0), - PINMUX_IPSR_MODSEL_DATA(IP11_5_3, I2C3_SDA_C, SEL_I2C03_2), - PINMUX_IPSR_DATA(IP11_5_3, DU1_DOTCLKOUT1), - PINMUX_IPSR_DATA(IP11_5_3, CAN_DEBUGOUT12), - PINMUX_IPSR_MODSEL_DATA(IP11_7_6, SSI_SCK6, SEL_SSI6_0), - PINMUX_IPSR_MODSEL_DATA(IP11_7_6, SCIFA1_SCK_B, SEL_SCIFA1_1), - PINMUX_IPSR_DATA(IP11_7_6, DU1_EXHSYNC_DU1_HSYNC), - PINMUX_IPSR_DATA(IP11_7_6, CAN_DEBUGOUT13), - PINMUX_IPSR_MODSEL_DATA(IP11_10_8, SSI_WS6, SEL_SSI6_0), - PINMUX_IPSR_MODSEL_DATA(IP11_10_8, SCIFA1_RXD_B, SEL_SCIFA1_1), - PINMUX_IPSR_MODSEL_DATA(IP11_10_8, I2C4_SCL_C, SEL_I2C04_2), - PINMUX_IPSR_DATA(IP11_10_8, DU1_EXVSYNC_DU1_VSYNC), - PINMUX_IPSR_DATA(IP11_10_8, CAN_DEBUGOUT14), - PINMUX_IPSR_MODSEL_DATA(IP11_13_11, SSI_SDATA6, SEL_SSI6_0), - PINMUX_IPSR_MODSEL_DATA(IP11_13_11, SCIFA1_TXD_B, SEL_SCIFA1_1), - PINMUX_IPSR_MODSEL_DATA(IP11_13_11, I2C4_SDA_C, SEL_I2C04_2), - PINMUX_IPSR_DATA(IP11_13_11, DU1_EXODDF_DU1_ODDF_DISP_CDE), - PINMUX_IPSR_DATA(IP11_13_11, CAN_DEBUGOUT15), - PINMUX_IPSR_MODSEL_DATA(IP11_15_14, SSI_SCK78, SEL_SSI7_0), - PINMUX_IPSR_MODSEL_DATA(IP11_15_14, SCIFA2_SCK_B, SEL_SCIFA2_1), - PINMUX_IPSR_MODSEL_DATA(IP11_15_14, IIC0_SDA_C, SEL_IIC00_2), - PINMUX_IPSR_DATA(IP11_15_14, DU1_DISP), - PINMUX_IPSR_MODSEL_DATA(IP11_17_16, SSI_WS78, SEL_SSI7_0), - PINMUX_IPSR_MODSEL_DATA(IP11_17_16, SCIFA2_RXD_B, SEL_SCIFA2_1), - PINMUX_IPSR_MODSEL_DATA(IP11_17_16, IIC0_SCL_C, SEL_IIC00_2), - PINMUX_IPSR_DATA(IP11_17_16, DU1_CDE), - PINMUX_IPSR_MODSEL_DATA(IP11_20_18, SSI_SDATA7, SEL_SSI7_0), - PINMUX_IPSR_MODSEL_DATA(IP11_20_18, SCIFA2_TXD_B, SEL_SCIFA2_1), - PINMUX_IPSR_DATA(IP11_20_18, IRQ8), - PINMUX_IPSR_MODSEL_DATA(IP11_20_18, AUDIO_CLKA_D, SEL_ADG_3), - PINMUX_IPSR_MODSEL_DATA(IP11_20_18, CAN_CLK_D, SEL_CAN_3), - PINMUX_IPSR_DATA(IP11_20_18, PCMOE_N), - PINMUX_IPSR_DATA(IP11_23_21, SSI_SCK0129), - PINMUX_IPSR_MODSEL_DATA(IP11_23_21, MSIOF1_RXD_B, SEL_MSI1_1), - PINMUX_IPSR_MODSEL_DATA(IP11_23_21, SCIF5_RXD_D, SEL_SCIF5_3), - PINMUX_IPSR_MODSEL_DATA(IP11_23_21, ADIDATA_B, SEL_RAD_1), - PINMUX_IPSR_MODSEL_DATA(IP11_23_21, AD_DI_B, SEL_ADI_1), - PINMUX_IPSR_DATA(IP11_23_21, PCMWE_N), - PINMUX_IPSR_DATA(IP11_26_24, SSI_WS0129), - PINMUX_IPSR_MODSEL_DATA(IP11_26_24, MSIOF1_TXD_B, SEL_MSI1_1), - PINMUX_IPSR_MODSEL_DATA(IP11_26_24, SCIF5_TXD_D, SEL_SCIF5_3), - PINMUX_IPSR_MODSEL_DATA(IP11_26_24, ADICS_SAMP_B, SEL_RAD_1), - PINMUX_IPSR_MODSEL_DATA(IP11_26_24, AD_DO_B, SEL_ADI_1), - PINMUX_IPSR_DATA(IP11_29_27, SSI_SDATA0), - PINMUX_IPSR_MODSEL_DATA(IP11_29_27, MSIOF1_SCK_B, SEL_MSI1_1), - PINMUX_IPSR_DATA(IP11_29_27, PWM0_B), - PINMUX_IPSR_MODSEL_DATA(IP11_29_27, ADICLK_B, SEL_RAD_1), - PINMUX_IPSR_MODSEL_DATA(IP11_29_27, AD_CLK_B, SEL_ADI_1), - - /* - * From IPSR12 to IPSR13 have been removed because they does not use. - */ -}; - -static struct pinmux_gpio pinmux_gpios[] = { - PINMUX_GPIO_GP_ALL(), - - GPIO_FN(A2), GPIO_FN(WE0_N), GPIO_FN(WE1_N), GPIO_FN(DACK0), - GPIO_FN(USB0_PWEN), GPIO_FN(USB0_OVC), GPIO_FN(USB1_PWEN), - GPIO_FN(USB1_OVC), GPIO_FN(SD0_CLK), GPIO_FN(SD0_CMD), - GPIO_FN(SD0_DATA0), GPIO_FN(SD0_DATA1), GPIO_FN(SD0_DATA2), - GPIO_FN(SD0_DATA3), GPIO_FN(SD0_CD), GPIO_FN(SD0_WP), - GPIO_FN(SD1_CLK), GPIO_FN(SD1_CMD), GPIO_FN(SD1_DATA0), - GPIO_FN(SD1_DATA1), GPIO_FN(SD1_DATA2), GPIO_FN(SD1_DATA3), - - /* IPSR0 */ - GPIO_FN(SD1_CD), GPIO_FN(CAN0_RX), GPIO_FN(SD1_WP), GPIO_FN(IRQ7), - GPIO_FN(CAN0_TX), GPIO_FN(MMC_CLK), GPIO_FN(SD2_CLK), GPIO_FN(MMC_CMD), - GPIO_FN(SD2_CMD), GPIO_FN(MMC_D0), GPIO_FN(SD2_DATA0), GPIO_FN(MMC_D1), - GPIO_FN(SD2_DATA1), GPIO_FN(MMC_D2), GPIO_FN(SD2_DATA2), - GPIO_FN(MMC_D3), GPIO_FN(SD2_DATA3), GPIO_FN(MMC_D4), - GPIO_FN(SD2_CD), GPIO_FN(MMC_D5), GPIO_FN(SD2_WP), GPIO_FN(MMC_D6), - GPIO_FN(SCIF0_RXD), GPIO_FN(I2C2_SCL_B), GPIO_FN(CAN1_RX), - GPIO_FN(MMC_D7), GPIO_FN(SCIF0_TXD), GPIO_FN(I2C2_SDA_B), - GPIO_FN(CAN1_TX), GPIO_FN(D0), GPIO_FN(SCIFA3_SCK_B), GPIO_FN(IRQ4), - GPIO_FN(D1), GPIO_FN(SCIFA3_RXD_B), GPIO_FN(D2), GPIO_FN(SCIFA3_TXD_B), - GPIO_FN(D3), GPIO_FN(I2C3_SCL_B), GPIO_FN(SCIF5_RXD_B), GPIO_FN(D4), - GPIO_FN(I2C3_SDA_B), GPIO_FN(SCIF5_TXD_B), GPIO_FN(D5), - GPIO_FN(SCIF4_RXD_B), GPIO_FN(I2C0_SCL_D), - - /* - * From IPSR1 to IPSR5 have been removed because they does not use. - */ - - /* IPSR6 */ - GPIO_FN(DU0_EXVSYNC_DU0_VSYNC), GPIO_FN(QSTB_QHE), - GPIO_FN(CC50_STATE28), GPIO_FN(DU0_EXODDF_DU0_ODDF_DISP_CDE), - GPIO_FN(QCPV_QDE), GPIO_FN(CC50_STATE29), GPIO_FN(DU0_DISP), - GPIO_FN(QPOLA), GPIO_FN(CC50_STATE30), GPIO_FN(DU0_CDE), GPIO_FN(QPOLB), - GPIO_FN(CC50_STATE31), GPIO_FN(VI0_CLK), GPIO_FN(AVB_RX_CLK), - GPIO_FN(VI0_DATA0_VI0_B0), GPIO_FN(AVB_RX_DV), - GPIO_FN(VI0_DATA1_VI0_B1), GPIO_FN(AVB_RXD0), GPIO_FN(VI0_DATA2_VI0_B2), - GPIO_FN(AVB_RXD1), GPIO_FN(VI0_DATA3_VI0_B3), GPIO_FN(AVB_RXD2), - GPIO_FN(VI0_DATA4_VI0_B4), GPIO_FN(AVB_RXD3), GPIO_FN(VI0_DATA5_VI0_B5), - GPIO_FN(AVB_RXD4), GPIO_FN(VI0_DATA6_VI0_B6), GPIO_FN(AVB_RXD5), - GPIO_FN(VI0_DATA7_VI0_B7), GPIO_FN(AVB_RXD6), GPIO_FN(VI0_CLKENB), - GPIO_FN(I2C3_SCL), GPIO_FN(SCIFA5_RXD_C), GPIO_FN(IETX_C), - GPIO_FN(AVB_RXD7), GPIO_FN(VI0_FIELD), GPIO_FN(I2C3_SDA), - GPIO_FN(SCIFA5_TXD_C), GPIO_FN(IECLK_C), GPIO_FN(AVB_RX_ER), - GPIO_FN(VI0_HSYNC_N), GPIO_FN(SCIF0_RXD_B), GPIO_FN(I2C0_SCL_C), - GPIO_FN(IERX_C), GPIO_FN(AVB_COL), GPIO_FN(VI0_VSYNC_N), - GPIO_FN(SCIF0_TXD_B), GPIO_FN(I2C0_SDA_C), GPIO_FN(AUDIO_CLKOUT_B), - GPIO_FN(AVB_TX_EN), GPIO_FN(ETH_MDIO), GPIO_FN(VI0_G0), - GPIO_FN(MSIOF2_RXD_B), GPIO_FN(IIC0_SCL_D), GPIO_FN(AVB_TX_CLK), - GPIO_FN(ADIDATA), GPIO_FN(AD_DI), - - /* IPSR7 */ - GPIO_FN(ETH_CRS_DV), GPIO_FN(VI0_G1), GPIO_FN(MSIOF2_TXD_B), - GPIO_FN(IIC0_SDA_D), GPIO_FN(AVB_TXD0), GPIO_FN(ADICS_SAMP), - GPIO_FN(AD_DO), GPIO_FN(ETH_RX_ER), GPIO_FN(VI0_G2), - GPIO_FN(MSIOF2_SCK_B), GPIO_FN(CAN0_RX_B), GPIO_FN(AVB_TXD1), - GPIO_FN(ADICLK), GPIO_FN(AD_CLK), GPIO_FN(ETH_RXD0), GPIO_FN(VI0_G3), - GPIO_FN(MSIOF2_SYNC_B), GPIO_FN(CAN0_TX_B), GPIO_FN(AVB_TXD2), - GPIO_FN(ADICHS0), GPIO_FN(AD_NCS_N), GPIO_FN(ETH_RXD1), - GPIO_FN(VI0_G4), GPIO_FN(MSIOF2_SS1_B), GPIO_FN(SCIF4_RXD_D), - GPIO_FN(AVB_TXD3), GPIO_FN(ADICHS1), GPIO_FN(ETH_LINK), GPIO_FN(VI0_G5), - GPIO_FN(MSIOF2_SS2_B), GPIO_FN(SCIF4_TXD_D), GPIO_FN(AVB_TXD4), - GPIO_FN(ADICHS2), GPIO_FN(ETH_REFCLK), GPIO_FN(VI0_G6), - GPIO_FN(SCIF2_SCK_C), GPIO_FN(AVB_TXD5), GPIO_FN(SSI_SCK5_B), - GPIO_FN(ETH_TXD1), GPIO_FN(VI0_G7), GPIO_FN(SCIF2_RXD_C), - GPIO_FN(IIC1_SCL_D), GPIO_FN(AVB_TXD6), GPIO_FN(SSI_WS5_B), - GPIO_FN(ETH_TX_EN), GPIO_FN(VI0_R0), GPIO_FN(SCIF2_TXD_C), - GPIO_FN(IIC1_SDA_D), GPIO_FN(AVB_TXD7), GPIO_FN(SSI_SDATA5_B), - GPIO_FN(ETH_MAGIC), GPIO_FN(VI0_R1), GPIO_FN(SCIF3_SCK_B), - GPIO_FN(AVB_TX_ER), GPIO_FN(SSI_SCK6_B), GPIO_FN(ETH_TXD0), - GPIO_FN(VI0_R2), GPIO_FN(SCIF3_RXD_B), GPIO_FN(I2C4_SCL_E), - GPIO_FN(AVB_GTX_CLK), GPIO_FN(SSI_WS6_B), GPIO_FN(DREQ0_N), - GPIO_FN(SCIFB1_RXD), - - /* IPSR8 */ - GPIO_FN(ETH_MDC), GPIO_FN(VI0_R3), GPIO_FN(SCIF3_TXD_B), - GPIO_FN(I2C4_SDA_E), GPIO_FN(AVB_MDC), GPIO_FN(SSI_SDATA6_B), - GPIO_FN(HSCIF0_HRX), GPIO_FN(VI0_R4), GPIO_FN(I2C1_SCL_C), - GPIO_FN(AUDIO_CLKA_B), GPIO_FN(AVB_MDIO), GPIO_FN(SSI_SCK78_B), - GPIO_FN(HSCIF0_HTX), GPIO_FN(VI0_R5), GPIO_FN(I2C1_SDA_C), - GPIO_FN(AUDIO_CLKB_B), GPIO_FN(AVB_LINK), GPIO_FN(SSI_WS78_B), - GPIO_FN(HSCIF0_HCTS_N), GPIO_FN(VI0_R6), GPIO_FN(SCIF0_RXD_D), - GPIO_FN(I2C0_SCL_E), GPIO_FN(AVB_MAGIC), GPIO_FN(SSI_SDATA7_B), - GPIO_FN(HSCIF0_HRTS_N), GPIO_FN(VI0_R7), GPIO_FN(SCIF0_TXD_D), - GPIO_FN(I2C0_SDA_E), GPIO_FN(AVB_PHY_INT), GPIO_FN(SSI_SDATA8_B), - GPIO_FN(HSCIF0_HSCK), GPIO_FN(SCIF_CLK_B), GPIO_FN(AVB_CRS), - GPIO_FN(AUDIO_CLKC_B), GPIO_FN(I2C0_SCL), GPIO_FN(SCIF0_RXD_C), - GPIO_FN(PWM5), GPIO_FN(TCLK1_B), GPIO_FN(AVB_GTXREFCLK), - GPIO_FN(CAN1_RX_D), GPIO_FN(TPUTO0_B), GPIO_FN(I2C0_SDA), - GPIO_FN(SCIF0_TXD_C), GPIO_FN(TPUTO0), GPIO_FN(CAN_CLK), - GPIO_FN(DVC_MUTE), GPIO_FN(CAN1_TX_D), GPIO_FN(I2C1_SCL), - GPIO_FN(SCIF4_RXD), GPIO_FN(PWM5_B), GPIO_FN(DU1_DR0), - GPIO_FN(RIF1_SYNC_B), GPIO_FN(TS_SDATA_D), GPIO_FN(TPUTO1_B), - GPIO_FN(I2C1_SDA), GPIO_FN(SCIF4_TXD), GPIO_FN(IRQ5), - GPIO_FN(DU1_DR1), GPIO_FN(RIF1_CLK_B), GPIO_FN(TS_SCK_D), - GPIO_FN(BPFCLK_C), GPIO_FN(MSIOF0_RXD), GPIO_FN(SCIF5_RXD), - GPIO_FN(I2C2_SCL_C), GPIO_FN(DU1_DR2), GPIO_FN(RIF1_D0_B), - GPIO_FN(TS_SDEN_D), GPIO_FN(FMCLK_C), GPIO_FN(RDS_CLK), - - /* - * From IPSR9 to IPSR10 have been removed because they does not use. - */ - - /* IPSR11 */ - GPIO_FN(SSI_WS5), GPIO_FN(SCIFA3_RXD), GPIO_FN(I2C3_SCL_C), - GPIO_FN(DU1_DOTCLKOUT0), GPIO_FN(CAN_DEBUGOUT11), GPIO_FN(SSI_SDATA5), - GPIO_FN(SCIFA3_TXD), GPIO_FN(I2C3_SDA_C), GPIO_FN(DU1_DOTCLKOUT1), - GPIO_FN(CAN_DEBUGOUT12), GPIO_FN(SSI_SCK6), GPIO_FN(SCIFA1_SCK_B), - GPIO_FN(DU1_EXHSYNC_DU1_HSYNC), GPIO_FN(CAN_DEBUGOUT13), - GPIO_FN(SSI_WS6), GPIO_FN(SCIFA1_RXD_B), GPIO_FN(I2C4_SCL_C), - GPIO_FN(DU1_EXVSYNC_DU1_VSYNC), GPIO_FN(CAN_DEBUGOUT14), - GPIO_FN(SSI_SDATA6), GPIO_FN(SCIFA1_TXD_B), GPIO_FN(I2C4_SDA_C), - GPIO_FN(DU1_EXODDF_DU1_ODDF_DISP_CDE), GPIO_FN(CAN_DEBUGOUT15), - GPIO_FN(SSI_SCK78), GPIO_FN(SCIFA2_SCK_B), GPIO_FN(IIC0_SDA_C), - GPIO_FN(DU1_DISP), GPIO_FN(SSI_WS78), GPIO_FN(SCIFA2_RXD_B), - GPIO_FN(IIC0_SCL_C), GPIO_FN(DU1_CDE), GPIO_FN(SSI_SDATA7), - GPIO_FN(SCIFA2_TXD_B), GPIO_FN(IRQ8), GPIO_FN(AUDIO_CLKA_D), - GPIO_FN(CAN_CLK_D), GPIO_FN(PCMOE_N), GPIO_FN(SSI_SCK0129), - GPIO_FN(MSIOF1_RXD_B), GPIO_FN(SCIF5_RXD_D), GPIO_FN(ADIDATA_B), - GPIO_FN(AD_DI_B), GPIO_FN(PCMWE_N), GPIO_FN(SSI_WS0129), - GPIO_FN(MSIOF1_TXD_B), GPIO_FN(SCIF5_TXD_D), GPIO_FN(ADICS_SAMP_B), - GPIO_FN(AD_DO_B), GPIO_FN(SSI_SDATA0), GPIO_FN(MSIOF1_SCK_B), - GPIO_FN(PWM0_B), GPIO_FN(ADICLK_B), GPIO_FN(AD_CLK_B), - - /* - * From IPSR12 to IPSR13 have been removed because they does not use. - */ -}; - -static struct pinmux_cfg_reg pinmux_config_regs[] = { - { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1) { - GP_0_31_FN, FN_IP2_17_16, - GP_0_30_FN, FN_IP2_15_14, - GP_0_29_FN, FN_IP2_13_12, - GP_0_28_FN, FN_IP2_11_10, - GP_0_27_FN, FN_IP2_9_8, - GP_0_26_FN, FN_IP2_7_6, - GP_0_25_FN, FN_IP2_5_4, - GP_0_24_FN, FN_IP2_3_2, - GP_0_23_FN, FN_IP2_1_0, - GP_0_22_FN, FN_IP1_31_30, - GP_0_21_FN, FN_IP1_29_28, - GP_0_20_FN, FN_IP1_27, - GP_0_19_FN, FN_IP1_26, - GP_0_18_FN, FN_A2, - GP_0_17_FN, FN_IP1_24, - GP_0_16_FN, FN_IP1_23_22, - GP_0_15_FN, FN_IP1_21_20, - GP_0_14_FN, FN_IP1_19_18, - GP_0_13_FN, FN_IP1_17_15, - GP_0_12_FN, FN_IP1_14_13, - GP_0_11_FN, FN_IP1_12_11, - GP_0_10_FN, FN_IP1_10_8, - GP_0_9_FN, FN_IP1_7_6, - GP_0_8_FN, FN_IP1_5_4, - GP_0_7_FN, FN_IP1_3_2, - GP_0_6_FN, FN_IP1_1_0, - GP_0_5_FN, FN_IP0_31_30, - GP_0_4_FN, FN_IP0_29_28, - GP_0_3_FN, FN_IP0_27_26, - GP_0_2_FN, FN_IP0_25, - GP_0_1_FN, FN_IP0_24, - GP_0_0_FN, FN_IP0_23_22, } - }, - { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_1_25_FN, FN_DACK0, - GP_1_24_FN, FN_IP7_31, - GP_1_23_FN, FN_IP4_1_0, - GP_1_22_FN, FN_WE1_N, - GP_1_21_FN, FN_WE0_N, - GP_1_20_FN, FN_IP3_31, - GP_1_19_FN, FN_IP3_30, - GP_1_18_FN, FN_IP3_29_27, - GP_1_17_FN, FN_IP3_26_24, - GP_1_16_FN, FN_IP3_23_21, - GP_1_15_FN, FN_IP3_20_18, - GP_1_14_FN, FN_IP3_17_15, - GP_1_13_FN, FN_IP3_14_13, - GP_1_12_FN, FN_IP3_12, - GP_1_11_FN, FN_IP3_11, - GP_1_10_FN, FN_IP3_10, - GP_1_9_FN, FN_IP3_9_8, - GP_1_8_FN, FN_IP3_7_6, - GP_1_7_FN, FN_IP3_5_4, - GP_1_6_FN, FN_IP3_3_2, - GP_1_5_FN, FN_IP3_1_0, - GP_1_4_FN, FN_IP2_31_30, - GP_1_3_FN, FN_IP2_29_27, - GP_1_2_FN, FN_IP2_26_24, - GP_1_1_FN, FN_IP2_23_21, - GP_1_0_FN, FN_IP2_20_18, } - }, - { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1) { - GP_2_31_FN, FN_IP6_7_6, - GP_2_30_FN, FN_IP6_5_4, - GP_2_29_FN, FN_IP6_3_2, - GP_2_28_FN, FN_IP6_1_0, - GP_2_27_FN, FN_IP5_31_30, - GP_2_26_FN, FN_IP5_29_28, - GP_2_25_FN, FN_IP5_27_26, - GP_2_24_FN, FN_IP5_25_24, - GP_2_23_FN, FN_IP5_23_22, - GP_2_22_FN, FN_IP5_21_20, - GP_2_21_FN, FN_IP5_19_18, - GP_2_20_FN, FN_IP5_17_16, - GP_2_19_FN, FN_IP5_15_14, - GP_2_18_FN, FN_IP5_13_12, - GP_2_17_FN, FN_IP5_11_9, - GP_2_16_FN, FN_IP5_8_6, - GP_2_15_FN, FN_IP5_5_4, - GP_2_14_FN, FN_IP5_3_2, - GP_2_13_FN, FN_IP5_1_0, - GP_2_12_FN, FN_IP4_31_30, - GP_2_11_FN, FN_IP4_29_28, - GP_2_10_FN, FN_IP4_27_26, - GP_2_9_FN, FN_IP4_25_23, - GP_2_8_FN, FN_IP4_22_20, - GP_2_7_FN, FN_IP4_19_18, - GP_2_6_FN, FN_IP4_17_16, - GP_2_5_FN, FN_IP4_15_14, - GP_2_4_FN, FN_IP4_13_12, - GP_2_3_FN, FN_IP4_11_10, - GP_2_2_FN, FN_IP4_9_8, - GP_2_1_FN, FN_IP4_7_5, - GP_2_0_FN, FN_IP4_4_2 } - }, - { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1) { - GP_3_31_FN, FN_IP8_22_20, - GP_3_30_FN, FN_IP8_19_17, - GP_3_29_FN, FN_IP8_16_15, - GP_3_28_FN, FN_IP8_14_12, - GP_3_27_FN, FN_IP8_11_9, - GP_3_26_FN, FN_IP8_8_6, - GP_3_25_FN, FN_IP8_5_3, - GP_3_24_FN, FN_IP8_2_0, - GP_3_23_FN, FN_IP7_29_27, - GP_3_22_FN, FN_IP7_26_24, - GP_3_21_FN, FN_IP7_23_21, - GP_3_20_FN, FN_IP7_20_18, - GP_3_19_FN, FN_IP7_17_15, - GP_3_18_FN, FN_IP7_14_12, - GP_3_17_FN, FN_IP7_11_9, - GP_3_16_FN, FN_IP7_8_6, - GP_3_15_FN, FN_IP7_5_3, - GP_3_14_FN, FN_IP7_2_0, - GP_3_13_FN, FN_IP6_31_29, - GP_3_12_FN, FN_IP6_28_26, - GP_3_11_FN, FN_IP6_25_23, - GP_3_10_FN, FN_IP6_22_20, - GP_3_9_FN, FN_IP6_19_17, - GP_3_8_FN, FN_IP6_16, - GP_3_7_FN, FN_IP6_15, - GP_3_6_FN, FN_IP6_14, - GP_3_5_FN, FN_IP6_13, - GP_3_4_FN, FN_IP6_12, - GP_3_3_FN, FN_IP6_11, - GP_3_2_FN, FN_IP6_10, - GP_3_1_FN, FN_IP6_9, - GP_3_0_FN, FN_IP6_8 } - }, - { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1) { - GP_4_31_FN, FN_IP11_17_16, - GP_4_30_FN, FN_IP11_15_14, - GP_4_29_FN, FN_IP11_13_11, - GP_4_28_FN, FN_IP11_10_8, - GP_4_27_FN, FN_IP11_7_6, - GP_4_26_FN, FN_IP11_5_3, - GP_4_25_FN, FN_IP11_2_0, - GP_4_24_FN, FN_IP10_31_30, - GP_4_23_FN, FN_IP10_29_27, - GP_4_22_FN, FN_IP10_26_24, - GP_4_21_FN, FN_IP10_23_21, - GP_4_20_FN, FN_IP10_20_18, - GP_4_19_FN, FN_IP10_17_15, - GP_4_18_FN, FN_IP10_14_12, - GP_4_17_FN, FN_IP10_11_9, - GP_4_16_FN, FN_IP10_8_6, - GP_4_15_FN, FN_IP10_5_3, - GP_4_14_FN, FN_IP10_2_0, - GP_4_13_FN, FN_IP9_30_28, - GP_4_12_FN, FN_IP9_27_25, - GP_4_11_FN, FN_IP9_24_22, - GP_4_10_FN, FN_IP9_21_19, - GP_4_9_FN, FN_IP9_18_17, - GP_4_8_FN, FN_IP9_16_15, - GP_4_7_FN, FN_IP9_14_12, - GP_4_6_FN, FN_IP9_11_9, - GP_4_5_FN, FN_IP9_8_6, - GP_4_4_FN, FN_IP9_5_3, - GP_4_3_FN, FN_IP9_2_0, - GP_4_2_FN, FN_IP8_31_29, - GP_4_1_FN, FN_IP8_28_26, - GP_4_0_FN, FN_IP8_25_23 } - }, - { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_5_27_FN, FN_USB1_OVC, - GP_5_26_FN, FN_USB1_PWEN, - GP_5_25_FN, FN_USB0_OVC, - GP_5_24_FN, FN_USB0_PWEN, - GP_5_23_FN, FN_IP13_26_24, - GP_5_22_FN, FN_IP13_23_21, - GP_5_21_FN, FN_IP13_20_18, - GP_5_20_FN, FN_IP13_17_15, - GP_5_19_FN, FN_IP13_14_12, - GP_5_18_FN, FN_IP13_11_9, - GP_5_17_FN, FN_IP13_8_6, - GP_5_16_FN, FN_IP13_5_3, - GP_5_15_FN, FN_IP13_2_0, - GP_5_14_FN, FN_IP12_29_27, - GP_5_13_FN, FN_IP12_26_24, - GP_5_12_FN, FN_IP12_23_21, - GP_5_11_FN, FN_IP12_20_18, - GP_5_10_FN, FN_IP12_17_15, - GP_5_9_FN, FN_IP12_14_13, - GP_5_8_FN, FN_IP12_12_11, - GP_5_7_FN, FN_IP12_10_9, - GP_5_6_FN, FN_IP12_8_6, - GP_5_5_FN, FN_IP12_5_3, - GP_5_4_FN, FN_IP12_2_0, - GP_5_3_FN, FN_IP11_29_27, - GP_5_2_FN, FN_IP11_26_24, - GP_5_1_FN, FN_IP11_23_21, - GP_5_0_FN, FN_IP11_20_18 } - }, - { PINMUX_CFG_REG("GPSR6", 0xE606001C, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_6_25_FN, FN_IP0_21_20, - GP_6_24_FN, FN_IP0_19_18, - GP_6_23_FN, FN_IP0_17, - GP_6_22_FN, FN_IP0_16, - GP_6_21_FN, FN_IP0_15, - GP_6_20_FN, FN_IP0_14, - GP_6_19_FN, FN_IP0_13, - GP_6_18_FN, FN_IP0_12, - GP_6_17_FN, FN_IP0_11, - GP_6_16_FN, FN_IP0_10, - GP_6_15_FN, FN_IP0_9_8, - GP_6_14_FN, FN_IP0_0, - GP_6_13_FN, FN_SD1_DATA3, - GP_6_12_FN, FN_SD1_DATA2, - GP_6_11_FN, FN_SD1_DATA1, - GP_6_10_FN, FN_SD1_DATA0, - GP_6_9_FN, FN_SD1_CMD, - GP_6_8_FN, FN_SD1_CLK, - GP_6_7_FN, FN_SD0_WP, - GP_6_6_FN, FN_SD0_CD, - GP_6_5_FN, FN_SD0_DATA3, - GP_6_4_FN, FN_SD0_DATA2, - GP_6_3_FN, FN_SD0_DATA1, - GP_6_2_FN, FN_SD0_DATA0, - GP_6_1_FN, FN_SD0_CMD, - GP_6_0_FN, FN_SD0_CLK } - }, - { PINMUX_CFG_REG_VAR("IPSR0", 0xE6060020, 32, - 2, 2, 2, 1, 1, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, - 2, 1, 1, 1, 1, 1, 1, 1, 1) { - /* IP0_31_30 [2] */ - FN_D5, FN_SCIF4_RXD_B, FN_I2C0_SCL_D, 0, - /* IP0_29_28 [2] */ - FN_D4, FN_I2C3_SDA_B, FN_SCIF5_TXD_B, 0, - /* IP0_27_26 [2] */ - FN_D3, FN_I2C3_SCL_B, FN_SCIF5_RXD_B, 0, - /* IP0_25 [1] */ - FN_D2, FN_SCIFA3_TXD_B, - /* IP0_24 [1] */ - FN_D1, FN_SCIFA3_RXD_B, - /* IP0_23_22 [2] */ - FN_D0, FN_SCIFA3_SCK_B, FN_IRQ4, 0, - /* IP0_21_20 [2] */ - FN_MMC_D7, FN_SCIF0_TXD, FN_I2C2_SDA_B, FN_CAN1_TX, - /* IP0_19_18 [2] */ - FN_MMC_D6, FN_SCIF0_RXD, FN_I2C2_SCL_B, FN_CAN1_RX, - /* IP0_17 [1] */ - FN_MMC_D5, FN_SD2_WP, - /* IP0_16 [1] */ - FN_MMC_D4, FN_SD2_CD, - /* IP0_15 [1] */ - FN_MMC_D3, FN_SD2_DATA3, - /* IP0_14 [1] */ - FN_MMC_D2, FN_SD2_DATA2, - /* IP0_13 [1] */ - FN_MMC_D1, FN_SD2_DATA1, - /* IP0_12 [1] */ - FN_MMC_D0, FN_SD2_DATA0, - /* IP0_11 [1] */ - FN_MMC_CMD, FN_SD2_CMD, - /* IP0_10 [1] */ - FN_MMC_CLK, FN_SD2_CLK, - /* IP0_9_8 [2] */ - FN_SD1_WP, FN_IRQ7, FN_CAN0_TX, 0, - /* IP0_7 [1] */ - 0, 0, - /* IP0_6 [1] */ - 0, 0, - /* IP0_5 [1] */ - 0, 0, - /* IP0_4 [1] */ - 0, 0, - /* IP0_3 [1] */ - 0, 0, - /* IP0_2 [1] */ - 0, 0, - /* IP0_1 [1] */ - 0, 0, - /* IP0_0 [1] */ - FN_SD1_CD, FN_CAN0_RX, } - }, - - /* - * From IPSR1 to IPSR5 have been removed because they does not use. - */ - - { PINMUX_CFG_REG_VAR("IPSR6", 0xE6060038, 32, - 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, - 2, 2) { - /* IP6_31_29 [3] */ - FN_ETH_MDIO, FN_VI0_G0, FN_MSIOF2_RXD_B, FN_IIC0_SCL_D, - FN_AVB_TX_CLK, FN_ADIDATA, FN_AD_DI, 0, - /* IP6_28_26 [3] */ - FN_VI0_VSYNC_N, FN_SCIF0_TXD_B, FN_I2C0_SDA_C, - FN_AUDIO_CLKOUT_B, FN_AVB_TX_EN, 0, 0, 0, - /* IP6_25_23 [3] */ - FN_VI0_HSYNC_N, FN_SCIF0_RXD_B, FN_I2C0_SCL_C, FN_IERX_C, - FN_AVB_COL, 0, 0, 0, - /* IP6_22_20 [3] */ - FN_VI0_FIELD, FN_I2C3_SDA, FN_SCIFA5_TXD_C, FN_IECLK_C, - FN_AVB_RX_ER, 0, 0, 0, - /* IP6_19_17 [3] */ - FN_VI0_CLKENB, FN_I2C3_SCL, FN_SCIFA5_RXD_C, FN_IETX_C, - FN_AVB_RXD7, 0, 0, 0, - /* IP6_16 [1] */ - FN_VI0_DATA7_VI0_B7, FN_AVB_RXD6, - /* IP6_15 [1] */ - FN_VI0_DATA6_VI0_B6, FN_AVB_RXD5, - /* IP6_14 [1] */ - FN_VI0_DATA5_VI0_B5, FN_AVB_RXD4, - /* IP6_13 [1] */ - FN_VI0_DATA4_VI0_B4, FN_AVB_RXD3, - /* IP6_12 [1] */ - FN_VI0_DATA3_VI0_B3, FN_AVB_RXD2, - /* IP6_11 [1] */ - FN_VI0_DATA2_VI0_B2, FN_AVB_RXD1, - /* IP6_10 [1] */ - FN_VI0_DATA1_VI0_B1, FN_AVB_RXD0, - /* IP6_9 [1] */ - FN_VI0_DATA0_VI0_B0, FN_AVB_RX_DV, - /* IP6_8 [1] */ - FN_VI0_CLK, FN_AVB_RX_CLK, - /* IP6_7_6 [2] */ - FN_DU0_CDE, FN_QPOLB, FN_CC50_STATE31, 0, - /* IP6_5_4 [2] */ - FN_DU0_DISP, FN_QPOLA, FN_CC50_STATE30, 0, - /* IP6_3_2 [2] */ - FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, FN_QCPV_QDE, FN_CC50_STATE29, - /* IP6_1_0 [2] */ - FN_DU0_EXVSYNC_DU0_VSYNC, FN_QSTB_QHE, FN_CC50_STATE28, 0, } - }, - { PINMUX_CFG_REG_VAR("IPSR7", 0xE606003C, 32, - 1, 1, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3) { - /* IP7_31 [1] */ - FN_DREQ0_N, FN_SCIFB1_RXD, - /* IP7_30 [1] */ - 0, 0, - /* IP7_29_27 [3] */ - FN_ETH_TXD0, FN_VI0_R2, FN_SCIF3_RXD_B, FN_I2C4_SCL_E, - FN_AVB_GTX_CLK, FN_SSI_WS6_B, 0, 0, - /* IP7_26_24 [3] */ - FN_ETH_MAGIC, FN_VI0_R1, FN_SCIF3_SCK_B, FN_AVB_TX_ER, - FN_SSI_SCK6_B, 0, 0, 0, - /* IP7_23_21 [3] */ - FN_ETH_TX_EN, FN_VI0_R0, FN_SCIF2_TXD_C, FN_IIC1_SDA_D, - FN_AVB_TXD7, FN_SSI_SDATA5_B, 0, 0, - /* IP7_20_18 [3] */ - FN_ETH_TXD1, FN_VI0_G7, FN_SCIF2_RXD_C, FN_IIC1_SCL_D, - FN_AVB_TXD6, FN_SSI_WS5_B, 0, 0, - /* IP7_17_15 [3] */ - FN_ETH_REFCLK, FN_VI0_G6, FN_SCIF2_SCK_C, FN_AVB_TXD5, - FN_SSI_SCK5_B, 0, 0, 0, - /* IP7_14_12 [3] */ - FN_ETH_LINK, FN_VI0_G5, FN_MSIOF2_SS2_B, FN_SCIF4_TXD_D, - FN_AVB_TXD4, FN_ADICHS2, 0, 0, - /* IP7_11_9 [3] */ - FN_ETH_RXD1, FN_VI0_G4, FN_MSIOF2_SS1_B, FN_SCIF4_RXD_D, - FN_AVB_TXD3, FN_ADICHS1, 0, 0, - /* IP7_8_6 [3] */ - FN_ETH_RXD0, FN_VI0_G3, FN_MSIOF2_SYNC_B, FN_CAN0_TX_B, - FN_AVB_TXD2, FN_ADICHS0, FN_AD_NCS_N, 0, - /* IP7_5_3 [3] */ - FN_ETH_RX_ER, FN_VI0_G2, FN_MSIOF2_SCK_B, FN_CAN0_RX_B, - FN_AVB_TXD1, FN_ADICLK, FN_AD_CLK, 0, - /* IP7_2_0 [3] */ - FN_ETH_CRS_DV, FN_VI0_G1, FN_MSIOF2_TXD_B, FN_IIC0_SDA_D, - FN_AVB_TXD0, FN_ADICS_SAMP, FN_AD_DO, 0, } - }, - { PINMUX_CFG_REG_VAR("IPSR8", 0xE6060040, 32, - 3, 3, 3, 3, 3, 2, 3, 3, 3, 3, 3) { - /* IP8_31_29 [3] */ - FN_MSIOF0_RXD, FN_SCIF5_RXD, FN_I2C2_SCL_C, FN_DU1_DR2, - FN_RIF1_D0_B, FN_TS_SDEN_D, FN_FMCLK_C, FN_RDS_CLK, - /* IP8_28_26 [3] */ - FN_I2C1_SDA, FN_SCIF4_TXD, FN_IRQ5, FN_DU1_DR1, - FN_RIF1_CLK_B, FN_TS_SCK_D, FN_BPFCLK_C, 0, - /* IP8_25_23 [3] */ - FN_I2C1_SCL, FN_SCIF4_RXD, FN_PWM5_B, FN_DU1_DR0, - FN_RIF1_SYNC_B, FN_TS_SDATA_D, FN_TPUTO1_B, 0, - /* IP8_22_20 [3] */ - FN_I2C0_SDA, FN_SCIF0_TXD_C, FN_TPUTO0, FN_CAN_CLK, - FN_DVC_MUTE, FN_CAN1_TX_D, 0, 0, - /* IP8_19_17 [3] */ - FN_I2C0_SCL, FN_SCIF0_RXD_C, FN_PWM5, FN_TCLK1_B, - FN_AVB_GTXREFCLK, FN_CAN1_RX_D, FN_TPUTO0_B, 0, - /* IP8_16_15 [2] */ - FN_HSCIF0_HSCK, FN_SCIF_CLK_B, FN_AVB_CRS, FN_AUDIO_CLKC_B, - /* IP8_14_12 [3] */ - FN_HSCIF0_HRTS_N, FN_VI0_R7, FN_SCIF0_TXD_D, FN_I2C0_SDA_E, - FN_AVB_PHY_INT, FN_SSI_SDATA8_B, 0, 0, - /* IP8_11_9 [3] */ - FN_HSCIF0_HCTS_N, FN_VI0_R6, FN_SCIF0_RXD_D, FN_I2C0_SCL_E, - FN_AVB_MAGIC, FN_SSI_SDATA7_B, 0, 0, - /* IP8_8_6 [3] */ - FN_HSCIF0_HTX, FN_VI0_R5, FN_I2C1_SDA_C, FN_AUDIO_CLKB_B, - FN_AVB_LINK, FN_SSI_WS78_B, 0, 0, - /* IP8_5_3 [3] */ - FN_HSCIF0_HRX, FN_VI0_R4, FN_I2C1_SCL_C, FN_AUDIO_CLKA_B, - FN_AVB_MDIO, FN_SSI_SCK78_B, 0, 0, - /* IP8_2_0 [3] */ - FN_ETH_MDC, FN_VI0_R3, FN_SCIF3_TXD_B, FN_I2C4_SDA_E, - FN_AVB_MDC, FN_SSI_SDATA6_B, 0, 0, } - }, - - /* - * From IPSR9 to IPSR10 have been removed because they does not use. - */ - - { PINMUX_CFG_REG_VAR("IPSR11", 0xE606004C, 32, - 2, 3, 3, 3, 3, 2, 2, 3, 3, 2, 3, 3) { - /* IP11_31_30 [2] */ - 0, 0, 0, 0, - /* IP11_29_27 [3] */ - FN_SSI_SDATA0, FN_MSIOF1_SCK_B, FN_PWM0_B, FN_ADICLK_B, - FN_AD_CLK_B, 0, 0, 0, - /* IP11_26_24 [3] */ - FN_SSI_WS0129, FN_MSIOF1_TXD_B, FN_SCIF5_TXD_D, FN_ADICS_SAMP_B, - FN_AD_DO_B, 0, 0, 0, - /* IP11_23_21 [3] */ - FN_SSI_SCK0129, FN_MSIOF1_RXD_B, FN_SCIF5_RXD_D, FN_ADIDATA_B, - FN_AD_DI_B, FN_PCMWE_N, 0, 0, - /* IP11_20_18 [3] */ - FN_SSI_SDATA7, FN_SCIFA2_TXD_B, FN_IRQ8, FN_AUDIO_CLKA_D, - FN_CAN_CLK_D, FN_PCMOE_N, 0, 0, - /* IP11_17_16 [2] */ - FN_SSI_WS78, FN_SCIFA2_RXD_B, FN_IIC0_SCL_C, FN_DU1_CDE, - /* IP11_15_14 [2] */ - FN_SSI_SCK78, FN_SCIFA2_SCK_B, FN_IIC0_SDA_C, FN_DU1_DISP, - /* IP11_13_11 [3] */ - FN_SSI_SDATA6, FN_SCIFA1_TXD_B, FN_I2C4_SDA_C, - FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, FN_CAN_DEBUGOUT15, 0, 0, 0, - /* IP11_10_8 [3] */ - FN_SSI_WS6, FN_SCIFA1_RXD_B, FN_I2C4_SCL_C, - FN_DU1_EXVSYNC_DU1_VSYNC, FN_CAN_DEBUGOUT14, 0, 0, 0, - /* IP11_7_6 [2] */ - FN_SSI_SCK6, FN_SCIFA1_SCK_B, FN_DU1_EXHSYNC_DU1_HSYNC, - FN_CAN_DEBUGOUT13, - /* IP11_5_3 [3] */ - FN_SSI_SDATA5, FN_SCIFA3_TXD, FN_I2C3_SDA_C, FN_DU1_DOTCLKOUT1, - FN_CAN_DEBUGOUT12, 0, 0, 0, - /* IP11_2_0 [3] */ - FN_SSI_WS5, FN_SCIFA3_RXD, FN_I2C3_SCL_C, FN_DU1_DOTCLKOUT0, - FN_CAN_DEBUGOUT11, 0, 0, 0, } - }, - - /* - * From IPSR12 to IPSR13 have been removed because they does not use. - */ - - { PINMUX_CFG_REG_VAR("MOD_SEL", 0xE6060090, 32, - 2, 1, 2, 3, 1, 1, 1, 1, 1, 1, 3, 3, 3, 3, 3, - 2, 1) { - /* SEL_ADG [2] */ - FN_SEL_ADG_0, FN_SEL_ADG_1, FN_SEL_ADG_2, FN_SEL_ADG_3, - /* SEL_ADI [1] */ - FN_SEL_ADI_0, FN_SEL_ADI_1, - /* SEL_CAN [2] */ - FN_SEL_CAN_0, FN_SEL_CAN_1, FN_SEL_CAN_2, FN_SEL_CAN_3, - /* SEL_DARC [3] */ - FN_SEL_DARC_0, FN_SEL_DARC_1, FN_SEL_DARC_2, FN_SEL_DARC_3, - FN_SEL_DARC_4, 0, 0, 0, - /* SEL_DR0 [1] */ - FN_SEL_DR0_0, FN_SEL_DR0_1, - /* SEL_DR1 [1] */ - FN_SEL_DR1_0, FN_SEL_DR1_1, - /* SEL_DR2 [1] */ - FN_SEL_DR2_0, FN_SEL_DR2_1, - /* SEL_DR3 [1] */ - FN_SEL_DR3_0, FN_SEL_DR3_1, - /* SEL_ETH [1] */ - FN_SEL_ETH_0, FN_SEL_ETH_1, - /* SLE_FSN [1] */ - FN_SEL_FSN_0, FN_SEL_FSN_1, - /* SEL_IC200 [3] */ - FN_SEL_I2C00_0, FN_SEL_I2C00_1, FN_SEL_I2C00_2, FN_SEL_I2C00_3, - FN_SEL_I2C00_4, 0, 0, 0, - /* SEL_I2C01 [3] */ - FN_SEL_I2C01_0, FN_SEL_I2C01_1, FN_SEL_I2C01_2, FN_SEL_I2C01_3, - FN_SEL_I2C01_4, 0, 0, 0, - /* SEL_I2C02 [3] */ - FN_SEL_I2C02_0, FN_SEL_I2C02_1, FN_SEL_I2C02_2, FN_SEL_I2C02_3, - FN_SEL_I2C02_4, 0, 0, 0, - /* SEL_I2C03 [3] */ - FN_SEL_I2C03_0, FN_SEL_I2C03_1, FN_SEL_I2C03_2, FN_SEL_I2C03_3, - FN_SEL_I2C03_4, 0, 0, 0, - /* SEL_I2C04 [3] */ - FN_SEL_I2C04_0, FN_SEL_I2C04_1, FN_SEL_I2C04_2, FN_SEL_I2C04_3, - FN_SEL_I2C04_4, 0, 0, 0, - /* SEL_IIC00 [2] */ - FN_SEL_IIC00_0, FN_SEL_IIC00_1, FN_SEL_IIC00_2, FN_SEL_IIC00_3, - /* SEL_AVB [1] */ - FN_SEL_AVB_0, FN_SEL_AVB_1, } - }, - { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xE6060094, 32, - 2, 2, 1, 1, 1, 1, 1, 1, 2, 2, 1, 1, 2, 2, 1, 1, - 2, 2, 2, 1, 1, 2) { - /* SEL_IEB [2] */ - FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, 0, - /* SEL_IIC0 [2] */ - FN_SEL_IIC01_0, FN_SEL_IIC01_1, FN_SEL_IIC01_2, FN_SEL_IIC01_3, - /* SEL_LBS [1] */ - FN_SEL_LBS_0, FN_SEL_LBS_1, - /* SEL_MSI1 [1] */ - FN_SEL_MSI1_0, FN_SEL_MSI1_1, - /* SEL_MSI2 [1] */ - FN_SEL_MSI2_0, FN_SEL_MSI2_1, - /* SEL_RAD [1] */ - FN_SEL_RAD_0, FN_SEL_RAD_1, - /* SEL_RCN [1] */ - FN_SEL_RCN_0, FN_SEL_RCN_1, - /* SEL_RSP [1] */ - FN_SEL_RSP_0, FN_SEL_RSP_1, - /* SEL_SCIFA0 [2] */ - FN_SEL_SCIFA0_0, FN_SEL_SCIFA0_1, FN_SEL_SCIFA0_2, - FN_SEL_SCIFA0_3, - /* SEL_SCIFA1 [2] */ - FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, 0, - /* SEL_SCIFA2 [1] */ - FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1, - /* SEL_SCIFA3 [1] */ - FN_SEL_SCIFA3_0, FN_SEL_SCIFA3_1, - /* SEL_SCIFA4 [2] */ - FN_SEL_SCIFA4_0, FN_SEL_SCIFA4_1, FN_SEL_SCIFA4_2, - FN_SEL_SCIFA4_3, - /* SEL_SCIFA5 [2] */ - FN_SEL_SCIFA5_0, FN_SEL_SCIFA5_1, FN_SEL_SCIFA5_2, - FN_SEL_SCIFA5_3, - /* SEL_SPDM [1] */ - FN_SEL_SPDM_0, FN_SEL_SPDM_1, - /* SEL_TMU [1] */ - FN_SEL_TMU_0, FN_SEL_TMU_1, - /* SEL_TSIF0 [2] */ - FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3, - /* SEL_CAN0 [2] */ - FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3, - /* SEL_CAN1 [2] */ - FN_SEL_CAN1_0, FN_SEL_CAN1_1, FN_SEL_CAN1_2, FN_SEL_CAN1_3, - /* SEL_HSCIF0 [1] */ - FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, - /* SEL_HSCIF1 [1] */ - FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, - /* SEL_RDS [2] */ - FN_SEL_RDS_0, FN_SEL_RDS_1, FN_SEL_RDS_2, FN_SEL_RDS_3, } - }, - { PINMUX_CFG_REG_VAR("MOD_SEL3", 0xE6060098, 32, - 2, 2, 2, 1, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) { - /* SEL_SCIF0 [2] */ - FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, FN_SEL_SCIF0_3, - /* SEL_SCIF1 [2] */ - FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, 0, - /* SEL_SCIF2 [2] */ - FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, 0, - /* SEL_SCIF3 [1] */ - FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, - /* SEL_SCIF4 [3] */ - FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2, FN_SEL_SCIF4_3, - FN_SEL_SCIF4_4, 0, 0, 0, - /* SEL_SCIF5 [2] */ - FN_SEL_SCIF5_0, FN_SEL_SCIF5_1, FN_SEL_SCIF5_2, FN_SEL_SCIF5_3, - /* SEL_SSI1 [1] */ - FN_SEL_SSI1_0, FN_SEL_SSI1_1, - /* SEL_SSI2 [1] */ - FN_SEL_SSI2_0, FN_SEL_SSI2_1, - /* SEL_SSI4 [1] */ - FN_SEL_SSI4_0, FN_SEL_SSI4_1, - /* SEL_SSI5 [1] */ - FN_SEL_SSI5_0, FN_SEL_SSI5_1, - /* SEL_SSI6 [1] */ - FN_SEL_SSI6_0, FN_SEL_SSI6_1, - /* SEL_SSI7 [1] */ - FN_SEL_SSI7_0, FN_SEL_SSI7_1, - /* SEL_SSI8 [1] */ - FN_SEL_SSI8_0, FN_SEL_SSI8_1, - /* SEL_SSI9 [1] */ - FN_SEL_SSI9_0, FN_SEL_SSI9_1, - /* RESEVED [1] */ - 0, 0, - /* RESEVED [1] */ - 0, 0, - /* RESEVED [1] */ - 0, 0, - /* RESEVED [1] */ - 0, 0, - /* RESEVED [1] */ - 0, 0, - /* RESEVED [1] */ - 0, 0, - /* RESEVED [1] */ - 0, 0, - /* RESEVED [1] */ - 0, 0, - /* RESEVED [1] */ - 0, 0, - /* RESEVED [1] */ - 0, 0, - /* RESEVED [1] */ - 0, 0, - /* RESEVED [1] */ - 0, 0, } - }, - { PINMUX_CFG_REG("INOUTSEL0", 0xE6050004, 32, 1) { GP_INOUTSEL(0) } }, - { PINMUX_CFG_REG("INOUTSEL1", 0xE6051004, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_1_25_IN, GP_1_25_OUT, - GP_1_24_IN, GP_1_24_OUT, - GP_1_23_IN, GP_1_23_OUT, - GP_1_22_IN, GP_1_22_OUT, - GP_1_21_IN, GP_1_21_OUT, - GP_1_20_IN, GP_1_20_OUT, - GP_1_19_IN, GP_1_19_OUT, - GP_1_18_IN, GP_1_18_OUT, - GP_1_17_IN, GP_1_17_OUT, - GP_1_16_IN, GP_1_16_OUT, - GP_1_15_IN, GP_1_15_OUT, - GP_1_14_IN, GP_1_14_OUT, - GP_1_13_IN, GP_1_13_OUT, - GP_1_12_IN, GP_1_12_OUT, - GP_1_11_IN, GP_1_11_OUT, - GP_1_10_IN, GP_1_10_OUT, - GP_1_9_IN, GP_1_9_OUT, - GP_1_8_IN, GP_1_8_OUT, - GP_1_7_IN, GP_1_7_OUT, - GP_1_6_IN, GP_1_6_OUT, - GP_1_5_IN, GP_1_5_OUT, - GP_1_4_IN, GP_1_4_OUT, - GP_1_3_IN, GP_1_3_OUT, - GP_1_2_IN, GP_1_2_OUT, - GP_1_1_IN, GP_1_1_OUT, - GP_1_0_IN, GP_1_0_OUT, } - }, - { PINMUX_CFG_REG("INOUTSEL2", 0xE6052004, 32, 1) { GP_INOUTSEL(2) } }, - { PINMUX_CFG_REG("INOUTSEL3", 0xE6053004, 32, 1) { GP_INOUTSEL(3) } }, - { PINMUX_CFG_REG("INOUTSEL4", 0xE6054004, 32, 1) { GP_INOUTSEL(4) } }, - { PINMUX_CFG_REG("INOUTSEL5", 0xE6055004, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_5_27_IN, GP_5_27_OUT, - GP_5_26_IN, GP_5_26_OUT, - GP_5_25_IN, GP_5_25_OUT, - GP_5_24_IN, GP_5_24_OUT, - GP_5_23_IN, GP_5_23_OUT, - GP_5_22_IN, GP_5_22_OUT, - GP_5_21_IN, GP_5_21_OUT, - GP_5_20_IN, GP_5_20_OUT, - GP_5_19_IN, GP_5_19_OUT, - GP_5_18_IN, GP_5_18_OUT, - GP_5_17_IN, GP_5_17_OUT, - GP_5_16_IN, GP_5_16_OUT, - GP_5_15_IN, GP_5_15_OUT, - GP_5_14_IN, GP_5_14_OUT, - GP_5_13_IN, GP_5_13_OUT, - GP_5_12_IN, GP_5_12_OUT, - GP_5_11_IN, GP_5_11_OUT, - GP_5_10_IN, GP_5_10_OUT, - GP_5_9_IN, GP_5_9_OUT, - GP_5_8_IN, GP_5_8_OUT, - GP_5_7_IN, GP_5_7_OUT, - GP_5_6_IN, GP_5_6_OUT, - GP_5_5_IN, GP_5_5_OUT, - GP_5_4_IN, GP_5_4_OUT, - GP_5_3_IN, GP_5_3_OUT, - GP_5_2_IN, GP_5_2_OUT, - GP_5_1_IN, GP_5_1_OUT, - GP_5_0_IN, GP_5_0_OUT, } - }, - { PINMUX_CFG_REG("INOUTSEL6", 0xE6055404, 32, 1) { - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_6_25_IN, GP_6_25_OUT, - GP_6_24_IN, GP_6_24_OUT, - GP_6_23_IN, GP_6_23_OUT, - GP_6_22_IN, GP_6_22_OUT, - GP_6_21_IN, GP_6_21_OUT, - GP_6_20_IN, GP_6_20_OUT, - GP_6_19_IN, GP_6_19_OUT, - GP_6_18_IN, GP_6_18_OUT, - GP_6_17_IN, GP_6_17_OUT, - GP_6_16_IN, GP_6_16_OUT, - GP_6_15_IN, GP_6_15_OUT, - GP_6_14_IN, GP_6_14_OUT, - GP_6_13_IN, GP_6_13_OUT, - GP_6_12_IN, GP_6_12_OUT, - GP_6_11_IN, GP_6_11_OUT, - GP_6_10_IN, GP_6_10_OUT, - GP_6_9_IN, GP_6_9_OUT, - GP_6_8_IN, GP_6_8_OUT, - GP_6_7_IN, GP_6_7_OUT, - GP_6_6_IN, GP_6_6_OUT, - GP_6_5_IN, GP_6_5_OUT, - GP_6_4_IN, GP_6_4_OUT, - GP_6_3_IN, GP_6_3_OUT, - GP_6_2_IN, GP_6_2_OUT, - GP_6_1_IN, GP_6_1_OUT, - GP_6_0_IN, GP_6_0_OUT, } - }, - { }, -}; - -static struct pinmux_data_reg pinmux_data_regs[] = { - { PINMUX_DATA_REG("INDT0", 0xE6050008, 32) { GP_INDT(0) } }, - { PINMUX_DATA_REG("INDT1", 0xE6051008, 32) { - 0, 0, 0, 0, - 0, 0, GP_1_25_DATA, GP_1_24_DATA, - GP_1_23_DATA, GP_1_22_DATA, GP_1_21_DATA, GP_1_20_DATA, - GP_1_19_DATA, GP_1_18_DATA, GP_1_17_DATA, GP_1_16_DATA, - GP_1_15_DATA, GP_1_14_DATA, GP_1_13_DATA, GP_1_12_DATA, - GP_1_11_DATA, GP_1_10_DATA, GP_1_9_DATA, GP_1_8_DATA, - GP_1_7_DATA, GP_1_6_DATA, GP_1_5_DATA, GP_1_4_DATA, - GP_1_3_DATA, GP_1_2_DATA, GP_1_1_DATA, GP_1_0_DATA } - }, - { PINMUX_DATA_REG("INDT2", 0xE6052008, 32) { GP_INDT(2) } }, - { PINMUX_DATA_REG("INDT3", 0xE6053008, 32) { GP_INDT(3) } }, - { PINMUX_DATA_REG("INDT4", 0xE6054008, 32) { GP_INDT(4) } }, - { PINMUX_DATA_REG("INDT5", 0xE6055008, 32) { - 0, 0, 0, 0, - GP_5_27_DATA, GP_5_26_DATA, GP_5_25_DATA, GP_5_24_DATA, - GP_5_23_DATA, GP_5_22_DATA, GP_5_21_DATA, GP_5_20_DATA, - GP_5_19_DATA, GP_5_18_DATA, GP_5_17_DATA, GP_5_16_DATA, - GP_5_15_DATA, GP_5_14_DATA, GP_5_13_DATA, GP_5_12_DATA, - GP_5_11_DATA, GP_5_10_DATA, GP_5_9_DATA, GP_5_8_DATA, - GP_5_7_DATA, GP_5_6_DATA, GP_5_5_DATA, GP_5_4_DATA, - GP_5_3_DATA, GP_5_2_DATA, GP_5_1_DATA, GP_5_0_DATA } - }, - { PINMUX_DATA_REG("INDT6", 0xE6055408, 32) { - 0, 0, 0, 0, - 0, 0, GP_6_25_DATA, GP_6_24_DATA, - GP_6_23_DATA, GP_6_22_DATA, GP_6_21_DATA, GP_6_20_DATA, - GP_6_19_DATA, GP_6_18_DATA, GP_6_17_DATA, GP_6_16_DATA, - GP_6_15_DATA, GP_6_14_DATA, GP_6_13_DATA, GP_6_12_DATA, - GP_6_11_DATA, GP_6_10_DATA, GP_6_9_DATA, GP_6_8_DATA, - GP_6_7_DATA, GP_6_6_DATA, GP_6_5_DATA, GP_6_4_DATA, - GP_6_3_DATA, GP_6_2_DATA, GP_6_1_DATA, GP_6_0_DATA } - }, - { }, -}; - -static struct pinmux_info r8a7794_pinmux_info = { - .name = "r8a7794_pfc", - - .unlock_reg = 0xe6060000, /* PMMR */ - - .reserved_id = PINMUX_RESERVED, - .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, - .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, - .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, - .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, - .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, - - .first_gpio = GPIO_GP_0_0, - .last_gpio = GPIO_FN_AD_CLK_B, - - .gpios = pinmux_gpios, - .cfg_regs = pinmux_config_regs, - .data_regs = pinmux_data_regs, - - .gpio_data = pinmux_data, - .gpio_data_size = ARRAY_SIZE(pinmux_data), -}; - -void r8a7794_pinmux_init(void) -{ - register_pinmux(&r8a7794_pinmux_info); -} diff --git a/arch/arm/mach-rockchip/rk3128-board.c b/arch/arm/mach-rockchip/rk3128-board.c index 48cd8ba81e0..7fd667a0b8e 100644 --- a/arch/arm/mach-rockchip/rk3128-board.c +++ b/arch/arm/mach-rockchip/rk3128-board.c @@ -111,8 +111,8 @@ int board_usb_cleanup(int index, enum usb_init_type init) } #endif -#if defined(CONFIG_USB_FUNCTION_FASTBOOT) -int fb_set_reboot_flag(void) +#if CONFIG_IS_ENABLED(FASTBOOT) +int fastboot_set_reboot_flag(void) { struct rk3128_grf *grf; diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c index 99a60c4e2ee..7366d45ab6c 100644 --- a/arch/arm/mach-rockchip/rk322x-board.c +++ b/arch/arm/mach-rockchip/rk322x-board.c @@ -139,8 +139,8 @@ int board_usb_cleanup(int index, enum usb_init_type init) } #endif -#if defined(CONFIG_USB_FUNCTION_FASTBOOT) -int fb_set_reboot_flag(void) +#if CONFIG_IS_ENABLED(FASTBOOT) +int fastboot_set_reboot_flag(void) { struct rk322x_grf *grf; diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdragon/Kconfig index d55dc1aaa1d..bfd99db6e27 100644 --- a/arch/arm/mach-snapdragon/Kconfig +++ b/arch/arm/mach-snapdragon/Kconfig @@ -3,6 +3,12 @@ if ARCH_SNAPDRAGON config SYS_SOC default "snapdragon" +config SYS_MALLOC_F_LEN + default 0x2000 + +config SPL_SYS_MALLOC_F_LEN + default 0x2000 + choice prompt "Snapdragon board select" diff --git a/arch/arm/mach-snapdragon/Makefile b/arch/arm/mach-snapdragon/Makefile index 1c23dc52cfb..1d35fea9126 100644 --- a/arch/arm/mach-snapdragon/Makefile +++ b/arch/arm/mach-snapdragon/Makefile @@ -6,4 +6,6 @@ obj-$(CONFIG_TARGET_DRAGONBOARD820C) += clock-apq8096.o obj-$(CONFIG_TARGET_DRAGONBOARD820C) += sysmap-apq8096.o obj-$(CONFIG_TARGET_DRAGONBOARD410C) += clock-apq8016.o obj-$(CONFIG_TARGET_DRAGONBOARD410C) += sysmap-apq8016.o +obj-$(CONFIG_TARGET_DRAGONBOARD410C) += pinctrl-apq8016.o +obj-$(CONFIG_TARGET_DRAGONBOARD410C) += pinctrl-snapdragon.o obj-y += clock-snapdragon.o diff --git a/arch/arm/mach-snapdragon/clock-apq8016.c b/arch/arm/mach-snapdragon/clock-apq8016.c index 9c0cc1c22cc..6e4a0ccb90a 100644 --- a/arch/arm/mach-snapdragon/clock-apq8016.c +++ b/arch/arm/mach-snapdragon/clock-apq8016.c @@ -17,7 +17,6 @@ /* GPLL0 clock control registers */ #define GPLL0_STATUS_ACTIVE BIT(17) -#define APCS_GPLL_ENA_VOTE_GPLL0 BIT(0) static const struct bcr_regs sdc_regs[] = { { @@ -36,11 +35,17 @@ static const struct bcr_regs sdc_regs[] = { } }; -static struct gpll0_ctrl gpll0_ctrl = { +static struct pll_vote_clk gpll0_vote_clk = { .status = GPLL0_STATUS, .status_bit = GPLL0_STATUS_ACTIVE, .ena_vote = APCS_GPLL_ENA_VOTE, - .vote_bit = APCS_GPLL_ENA_VOTE_GPLL0, + .vote_bit = BIT(0), +}; + +static struct vote_clk gcc_blsp1_ahb_clk = { + .cbcr_reg = BLSP1_AHB_CBCR, + .ena_vote = APCS_CLOCK_BRANCH_ENA_VOTE, + .vote_bit = BIT(10), }; /* SDHCI */ @@ -55,7 +60,7 @@ static int clk_init_sdc(struct msm_clk_priv *priv, int slot, uint rate) /* 800Mhz/div, gpll0 */ clk_rcg_set_rate_mnd(priv->base, &sdc_regs[slot], div, 0, 0, CFG_CLK_SRC_GPLL0); - clk_enable_gpll0(priv->base, &gpll0_ctrl); + clk_enable_gpll0(priv->base, &gpll0_vote_clk); clk_enable_cbc(priv->base + SDCC_APPS_CBCR(slot)); return rate; @@ -72,12 +77,16 @@ static const struct bcr_regs uart2_regs = { /* UART: 115200 */ static int clk_init_uart(struct msm_clk_priv *priv) { - /* Enable iface clk */ - clk_enable_cbc(priv->base + BLSP1_AHB_CBCR); + /* Enable AHB clock */ + clk_enable_vote_clk(priv->base, &gcc_blsp1_ahb_clk); + /* 7372800 uart block clock @ GPLL0 */ clk_rcg_set_rate_mnd(priv->base, &uart2_regs, 1, 144, 15625, CFG_CLK_SRC_GPLL0); - clk_enable_gpll0(priv->base, &gpll0_ctrl); + + /* Vote for gpll0 clock */ + clk_enable_gpll0(priv->base, &gpll0_vote_clk); + /* Enable core clk */ clk_enable_cbc(priv->base + BLSP1_UART2_APPS_CBCR); diff --git a/arch/arm/mach-snapdragon/clock-apq8096.c b/arch/arm/mach-snapdragon/clock-apq8096.c index 008649a4c6b..628c38785b6 100644 --- a/arch/arm/mach-snapdragon/clock-apq8096.c +++ b/arch/arm/mach-snapdragon/clock-apq8096.c @@ -27,7 +27,7 @@ static const struct bcr_regs sdc_regs = { .D = SDCC2_D, }; -static const struct gpll0_ctrl gpll0_ctrl = { +static const struct pll_vote_clk gpll0_vote_clk = { .status = GPLL0_STATUS, .status_bit = GPLL0_STATUS_ACTIVE, .ena_vote = APCS_GPLL_ENA_VOTE, @@ -41,7 +41,7 @@ static int clk_init_sdc(struct msm_clk_priv *priv, uint rate) clk_enable_cbc(priv->base + SDCC2_AHB_CBCR); clk_rcg_set_rate_mnd(priv->base, &sdc_regs, div, 0, 0, CFG_CLK_SRC_GPLL0); - clk_enable_gpll0(priv->base, &gpll0_ctrl); + clk_enable_gpll0(priv->base, &gpll0_vote_clk); clk_enable_cbc(priv->base + SDCC2_APPS_CBCR); return rate; diff --git a/arch/arm/mach-snapdragon/clock-snapdragon.c b/arch/arm/mach-snapdragon/clock-snapdragon.c index f738f57043c..85526186c60 100644 --- a/arch/arm/mach-snapdragon/clock-snapdragon.c +++ b/arch/arm/mach-snapdragon/clock-snapdragon.c @@ -30,7 +30,7 @@ void clk_enable_cbc(phys_addr_t cbcr) ; } -void clk_enable_gpll0(phys_addr_t base, const struct gpll0_ctrl *gpll0) +void clk_enable_gpll0(phys_addr_t base, const struct pll_vote_clk *gpll0) { if (readl(base + gpll0->status) & gpll0->status_bit) return; /* clock already enabled */ @@ -41,6 +41,21 @@ void clk_enable_gpll0(phys_addr_t base, const struct gpll0_ctrl *gpll0) ; } +#define BRANCH_ON_VAL (0) +#define BRANCH_NOC_FSM_ON_VAL BIT(29) +#define BRANCH_CHECK_MASK GENMASK(31, 28) + +void clk_enable_vote_clk(phys_addr_t base, const struct vote_clk *vclk) +{ + u32 val; + + setbits_le32(base + vclk->ena_vote, vclk->vote_bit); + do { + val = readl(base + vclk->cbcr_reg); + val &= BRANCH_CHECK_MASK; + } while ((val != BRANCH_ON_VAL) && (val != BRANCH_NOC_FSM_ON_VAL)); +} + #define APPS_CMD_RGCR_UPDATE BIT(0) /* Update clock command via CMD_RGCR */ diff --git a/arch/arm/mach-snapdragon/clock-snapdragon.h b/arch/arm/mach-snapdragon/clock-snapdragon.h index 2cff4f8a06c..58fab40a2e4 100644 --- a/arch/arm/mach-snapdragon/clock-snapdragon.h +++ b/arch/arm/mach-snapdragon/clock-snapdragon.h @@ -11,13 +11,18 @@ #define CFG_CLK_SRC_GPLL0 (1 << 8) #define CFG_CLK_SRC_MASK (7 << 8) -struct gpll0_ctrl { +struct pll_vote_clk { uintptr_t status; int status_bit; uintptr_t ena_vote; int vote_bit; }; +struct vote_clk { + uintptr_t cbcr_reg; + uintptr_t ena_vote; + int vote_bit; +}; struct bcr_regs { uintptr_t cfg_rcgr; uintptr_t cmd_rcgr; @@ -30,9 +35,10 @@ struct msm_clk_priv { phys_addr_t base; }; -void clk_enable_gpll0(phys_addr_t base, const struct gpll0_ctrl *pll0); +void clk_enable_gpll0(phys_addr_t base, const struct pll_vote_clk *gpll0); void clk_bcr_update(phys_addr_t apps_cmd_rgcr); void clk_enable_cbc(phys_addr_t cbcr); +void clk_enable_vote_clk(phys_addr_t base, const struct vote_clk *vclk); void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs, int div, int m, int n, int source); diff --git a/arch/arm/mach-snapdragon/include/mach/sysmap-apq8016.h b/arch/arm/mach-snapdragon/include/mach/sysmap-apq8016.h index ae784387fa1..520e2e6bd7c 100644 --- a/arch/arm/mach-snapdragon/include/mach/sysmap-apq8016.h +++ b/arch/arm/mach-snapdragon/include/mach/sysmap-apq8016.h @@ -13,6 +13,7 @@ /* Clocks: (from CLK_CTL_BASE) */ #define GPLL0_STATUS (0x2101C) #define APCS_GPLL_ENA_VOTE (0x45000) +#define APCS_CLOCK_BRANCH_ENA_VOTE (0x45004) #define SDCC_BCR(n) ((n * 0x1000) + 0x41000) #define SDCC_CMD_RCGR(n) ((n * 0x1000) + 0x41004) diff --git a/arch/arm/mach-snapdragon/pinctrl-apq8016.c b/arch/arm/mach-snapdragon/pinctrl-apq8016.c new file mode 100644 index 00000000000..bdb755d0e49 --- /dev/null +++ b/arch/arm/mach-snapdragon/pinctrl-apq8016.c @@ -0,0 +1,62 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Qualcomm APQ8016 pinctrl + * + * (C) Copyright 2018 Ramon Fried <ramon.fried@gmail.com> + * + */ + +#include "pinctrl-snapdragon.h" +#include <common.h> + +#define MAX_PIN_NAME_LEN 32 +static char pin_name[MAX_PIN_NAME_LEN]; +static const char * const msm_pinctrl_pins[] = { + "SDC1_CLK", + "SDC1_CMD", + "SDC1_DATA", + "SDC2_CLK", + "SDC2_CMD", + "SDC2_DATA", + "QDSD_CLK", + "QDSD_CMD", + "QDSD_DATA0", + "QDSD_DATA1", + "QDSD_DATA2", + "QDSD_DATA3", +}; + +static const struct pinctrl_function msm_pinctrl_functions[] = { + {"blsp1_uart", 2}, +}; + +static const char *apq8016_get_function_name(struct udevice *dev, + unsigned int selector) +{ + return msm_pinctrl_functions[selector].name; +} + +static const char *apq8016_get_pin_name(struct udevice *dev, + unsigned int selector) +{ + if (selector < 130) { + snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector); + return pin_name; + } else { + return msm_pinctrl_pins[selector - 130]; + } +} + +static unsigned int apq8016_get_function_mux(unsigned int selector) +{ + return msm_pinctrl_functions[selector].val; +} + +struct msm_pinctrl_data apq8016_data = { + .pin_count = 140, + .functions_count = ARRAY_SIZE(msm_pinctrl_functions), + .get_function_name = apq8016_get_function_name, + .get_function_mux = apq8016_get_function_mux, + .get_pin_name = apq8016_get_pin_name, +}; + diff --git a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c new file mode 100644 index 00000000000..5365ccdb70c --- /dev/null +++ b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c @@ -0,0 +1,128 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * TLMM driver for Qualcomm APQ8016, APQ8096 + * + * (C) Copyright 2018 Ramon Fried <ramon.fried@gmail.com> + * + */ + +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <asm/io.h> +#include <dm/pinctrl.h> +#include "pinctrl-snapdragon.h" + +struct msm_pinctrl_priv { + phys_addr_t base; + struct msm_pinctrl_data *data; +}; + +#define GPIO_CONFIG_OFFSET(x) ((x) * 0x1000) +#define TLMM_GPIO_PULL_MASK GENMASK(1, 0) +#define TLMM_FUNC_SEL_MASK GENMASK(5, 2) +#define TLMM_DRV_STRENGTH_MASK GENMASK(8, 6) +#define TLMM_GPIO_ENABLE BIT(9) + +static const struct pinconf_param msm_conf_params[] = { + { "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 3 }, + { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 }, +}; + +static int msm_get_functions_count(struct udevice *dev) +{ + struct msm_pinctrl_priv *priv = dev_get_priv(dev); + + return priv->data->functions_count; +} + +static int msm_get_pins_count(struct udevice *dev) +{ + struct msm_pinctrl_priv *priv = dev_get_priv(dev); + + return priv->data->pin_count; +} + +static const char *msm_get_function_name(struct udevice *dev, + unsigned int selector) +{ + struct msm_pinctrl_priv *priv = dev_get_priv(dev); + + return priv->data->get_function_name(dev, selector); +} + +static int msm_pinctrl_probe(struct udevice *dev) +{ + struct msm_pinctrl_priv *priv = dev_get_priv(dev); + + priv->base = devfdt_get_addr(dev); + priv->data = (struct msm_pinctrl_data *)dev->driver_data; + + return priv->base == FDT_ADDR_T_NONE ? -EINVAL : 0; +} + +static const char *msm_get_pin_name(struct udevice *dev, unsigned int selector) +{ + struct msm_pinctrl_priv *priv = dev_get_priv(dev); + + return priv->data->get_pin_name(dev, selector); +} + +static int msm_pinmux_set(struct udevice *dev, unsigned int pin_selector, + unsigned int func_selector) +{ + struct msm_pinctrl_priv *priv = dev_get_priv(dev); + + clrsetbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector), + TLMM_FUNC_SEL_MASK | TLMM_GPIO_ENABLE, + priv->data->get_function_mux(func_selector) << 2); + return 0; +} + +static int msm_pinconf_set(struct udevice *dev, unsigned int pin_selector, + unsigned int param, unsigned int argument) +{ + struct msm_pinctrl_priv *priv = dev_get_priv(dev); + + switch (param) { + case PIN_CONFIG_DRIVE_STRENGTH: + clrsetbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector), + TLMM_DRV_STRENGTH_MASK, argument << 6); + break; + case PIN_CONFIG_BIAS_DISABLE: + clrbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector), + TLMM_GPIO_PULL_MASK); + break; + default: + return 0; + } + + return 0; +} + +static struct pinctrl_ops msm_pinctrl_ops = { + .get_pins_count = msm_get_pins_count, + .get_pin_name = msm_get_pin_name, + .set_state = pinctrl_generic_set_state, + .pinmux_set = msm_pinmux_set, + .pinconf_num_params = ARRAY_SIZE(msm_conf_params), + .pinconf_params = msm_conf_params, + .pinconf_set = msm_pinconf_set, + .get_functions_count = msm_get_functions_count, + .get_function_name = msm_get_function_name, +}; + +static const struct udevice_id msm_pinctrl_ids[] = { + { .compatible = "qcom,tlmm-msm8916", .data = (ulong)&apq8016_data }, + { .compatible = "qcom,tlmm-apq8016", .data = (ulong)&apq8016_data }, + { } +}; + +U_BOOT_DRIVER(pinctrl_snapdraon) = { + .name = "pinctrl_msm", + .id = UCLASS_PINCTRL, + .of_match = msm_pinctrl_ids, + .priv_auto_alloc_size = sizeof(struct msm_pinctrl_priv), + .ops = &msm_pinctrl_ops, + .probe = msm_pinctrl_probe, +}; diff --git a/arch/arm/mach-snapdragon/pinctrl-snapdragon.h b/arch/arm/mach-snapdragon/pinctrl-snapdragon.h new file mode 100644 index 00000000000..c47d988af4c --- /dev/null +++ b/arch/arm/mach-snapdragon/pinctrl-snapdragon.h @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Qualcomm Pin control + * + * (C) Copyright 2018 Ramon Fried <ramon.fried@gmail.com> + * + */ +#ifndef _PINCTRL_SNAPDRAGON_H +#define _PINCTRL_SNAPDRAGON_H + +#include <common.h> + +struct msm_pinctrl_data { + int pin_count; + int functions_count; + const char *(*get_function_name)(struct udevice *dev, + unsigned int selector); + unsigned int (*get_function_mux)(unsigned int selector); + const char *(*get_pin_name)(struct udevice *dev, + unsigned int selector); +}; + +struct pinctrl_function { + const char *name; + int val; +}; + +extern struct msm_pinctrl_data apq8016_data; + +#endif diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index afc38d5da9e..b8fc81b20c2 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -1,35 +1,5 @@ if ARCH_SOCFPGA -config SPL_LIBCOMMON_SUPPORT - default y - -config SPL_LIBDISK_SUPPORT - default y - -config SPL_LIBGENERIC_SUPPORT - default y - -config SPL_MMC_SUPPORT - default y if DM_MMC - -config SPL_NAND_SUPPORT - default y if SPL_NAND_DENALI - -config SPL_SERIAL_SUPPORT - default y - -config SPL_SPI_FLASH_SUPPORT - default y if SPL_SPI_SUPPORT - -config SPL_SPI_SUPPORT - default y if DM_SPI - -config SPL_WATCHDOG_SUPPORT - default y - -config SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE - default y - config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE default 0xa2 @@ -40,6 +10,7 @@ config TARGET_SOCFPGA_ARRIA5 config TARGET_SOCFPGA_ARRIA10 bool select SPL_BOARD_INIT if SPL + select ALTERA_SDRAM config TARGET_SOCFPGA_CYCLONE5 bool diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile index 89b4fdf0f7f..61f5778de57 100644 --- a/arch/arm/mach-socfpga/Makefile +++ b/arch/arm/mach-socfpga/Makefile @@ -28,6 +28,13 @@ obj-y += pinmux_arria10.o obj-y += reset_manager_arria10.o endif +ifdef CONFIG_TARGET_SOCFPGA_STRATIX10 +obj-y += clock_manager_s10.o +obj-y += reset_manager_s10.o +obj-y += system_manager_s10.o +obj-y += wrap_pinmux_config_s10.o +obj-y += wrap_pll_config_s10.o +endif ifdef CONFIG_SPL_BUILD obj-y += spl.o ifdef CONFIG_TARGET_SOCFPGA_GEN5 diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-socfpga/board.c index c23ac4ead3e..189e12a6683 100644 --- a/arch/arm/mach-socfpga/board.c +++ b/arch/arm/mach-socfpga/board.c @@ -7,7 +7,10 @@ #include <common.h> #include <errno.h> +#include <fdtdec.h> #include <asm/arch/reset_manager.h> +#include <asm/arch/clock_manager.h> +#include <asm/arch/misc.h> #include <asm/io.h> #include <usb.h> @@ -25,6 +28,21 @@ int board_init(void) /* Address of boot parameters for ATAG (if ATAG is used) */ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; +#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10) + /* configuring the clock based on handoff */ + cm_basic_init(gd->fdt_blob); + + /* Add device descriptor to FPGA device table */ + socfpga_fpga_add(); +#endif + + return 0; +} + +int dram_init_banksize(void) +{ + fdtdec_setup_memory_banksize(); + return 0; } diff --git a/arch/arm/mach-socfpga/clock_manager.c b/arch/arm/mach-socfpga/clock_manager.c index bc2c0f8854a..59ede59b599 100644 --- a/arch/arm/mach-socfpga/clock_manager.c +++ b/arch/arm/mach-socfpga/clock_manager.c @@ -20,7 +20,7 @@ void cm_wait_for_lock(u32 mask) do { #if defined(CONFIG_TARGET_SOCFPGA_GEN5) inter_val = readl(&clock_manager_base->inter) & mask; -#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) +#else inter_val = readl(&clock_manager_base->stat) & mask; #endif /* Wait for stable lock */ @@ -51,7 +51,7 @@ int set_cpu_clk_info(void) #if defined(CONFIG_TARGET_SOCFPGA_GEN5) gd->bd->bi_ddr_freq = cm_get_sdram_clk_hz() / 1000000; -#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) +#else gd->bd->bi_ddr_freq = 0; #endif diff --git a/arch/arm/mach-socfpga/clock_manager_arria10.c b/arch/arm/mach-socfpga/clock_manager_arria10.c index 4ee6a82b5f7..defa2f6261b 100644 --- a/arch/arm/mach-socfpga/clock_manager_arria10.c +++ b/arch/arm/mach-socfpga/clock_manager_arria10.c @@ -9,6 +9,9 @@ #include <dm.h> #include <asm/arch/clock_manager.h> +static const struct socfpga_clock_manager *clock_manager_base = + (struct socfpga_clock_manager *)SOCFPGA_CLKMGR_ADDRESS; + static u32 eosc1_hz; static u32 cb_intosc_hz; static u32 f2s_free_hz; @@ -64,89 +67,150 @@ struct perpll_cfg { u32 cntr8clk_cnt; u32 cntr8clk_src; u32 cntr9clk_cnt; + u32 cntr9clk_src; u32 emacctl_emac0sel; u32 emacctl_emac1sel; u32 emacctl_emac2sel; u32 gpiodiv_gpiodbclk; }; -struct alteragrp_cfg { - u32 nocclk; - u32 mpuclk; +struct strtou32 { + const char *str; + const u32 val; }; -static const struct socfpga_clock_manager *clock_manager_base = - (struct socfpga_clock_manager *)SOCFPGA_CLKMGR_ADDRESS; +static const struct strtou32 mainpll_cfg_tab[] = { + { "vco0-psrc", offsetof(struct mainpll_cfg, vco0_psrc) }, + { "vco1-denom", offsetof(struct mainpll_cfg, vco1_denom) }, + { "vco1-numer", offsetof(struct mainpll_cfg, vco1_numer) }, + { "mpuclk-cnt", offsetof(struct mainpll_cfg, mpuclk_cnt) }, + { "mpuclk-src", offsetof(struct mainpll_cfg, mpuclk_src) }, + { "nocclk-cnt", offsetof(struct mainpll_cfg, nocclk_cnt) }, + { "nocclk-src", offsetof(struct mainpll_cfg, nocclk_src) }, + { "cntr2clk-cnt", offsetof(struct mainpll_cfg, cntr2clk_cnt) }, + { "cntr3clk-cnt", offsetof(struct mainpll_cfg, cntr3clk_cnt) }, + { "cntr4clk-cnt", offsetof(struct mainpll_cfg, cntr4clk_cnt) }, + { "cntr5clk-cnt", offsetof(struct mainpll_cfg, cntr5clk_cnt) }, + { "cntr6clk-cnt", offsetof(struct mainpll_cfg, cntr6clk_cnt) }, + { "cntr7clk-cnt", offsetof(struct mainpll_cfg, cntr7clk_cnt) }, + { "cntr7clk-src", offsetof(struct mainpll_cfg, cntr7clk_src) }, + { "cntr8clk-cnt", offsetof(struct mainpll_cfg, cntr8clk_cnt) }, + { "cntr9clk-cnt", offsetof(struct mainpll_cfg, cntr9clk_cnt) }, + { "cntr9clk-src", offsetof(struct mainpll_cfg, cntr9clk_src) }, + { "cntr15clk-cnt", offsetof(struct mainpll_cfg, cntr15clk_cnt) }, + { "nocdiv-l4mainclk", offsetof(struct mainpll_cfg, nocdiv_l4mainclk) }, + { "nocdiv-l4mpclk", offsetof(struct mainpll_cfg, nocdiv_l4mpclk) }, + { "nocdiv-l4spclk", offsetof(struct mainpll_cfg, nocdiv_l4spclk) }, + { "nocdiv-csatclk", offsetof(struct mainpll_cfg, nocdiv_csatclk) }, + { "nocdiv-cstraceclk", offsetof(struct mainpll_cfg, nocdiv_cstraceclk) }, + { "nocdiv-cspdbgclk", offsetof(struct mainpll_cfg, nocdiv_cspdbclk) }, +}; + +static const struct strtou32 perpll_cfg_tab[] = { + { "vco0-psrc", offsetof(struct perpll_cfg, vco0_psrc) }, + { "vco1-denom", offsetof(struct perpll_cfg, vco1_denom) }, + { "vco1-numer", offsetof(struct perpll_cfg, vco1_numer) }, + { "cntr2clk-cnt", offsetof(struct perpll_cfg, cntr2clk_cnt) }, + { "cntr2clk-src", offsetof(struct perpll_cfg, cntr2clk_src) }, + { "cntr3clk-cnt", offsetof(struct perpll_cfg, cntr3clk_cnt) }, + { "cntr3clk-src", offsetof(struct perpll_cfg, cntr3clk_src) }, + { "cntr4clk-cnt", offsetof(struct perpll_cfg, cntr4clk_cnt) }, + { "cntr4clk-src", offsetof(struct perpll_cfg, cntr4clk_src) }, + { "cntr5clk-cnt", offsetof(struct perpll_cfg, cntr5clk_cnt) }, + { "cntr5clk-src", offsetof(struct perpll_cfg, cntr5clk_src) }, + { "cntr6clk-cnt", offsetof(struct perpll_cfg, cntr6clk_cnt) }, + { "cntr6clk-src", offsetof(struct perpll_cfg, cntr6clk_src) }, + { "cntr7clk-cnt", offsetof(struct perpll_cfg, cntr7clk_cnt) }, + { "cntr8clk-cnt", offsetof(struct perpll_cfg, cntr8clk_cnt) }, + { "cntr8clk-src", offsetof(struct perpll_cfg, cntr8clk_src) }, + { "cntr9clk-cnt", offsetof(struct perpll_cfg, cntr9clk_cnt) }, + { "emacctl-emac0sel", offsetof(struct perpll_cfg, emacctl_emac0sel) }, + { "emacctl-emac1sel", offsetof(struct perpll_cfg, emacctl_emac1sel) }, + { "emacctl-emac2sel", offsetof(struct perpll_cfg, emacctl_emac2sel) }, + { "gpiodiv-gpiodbclk", offsetof(struct perpll_cfg, gpiodiv_gpiodbclk) }, +}; + +static const struct strtou32 alteragrp_cfg_tab[] = { + { "nocclk", offsetof(struct mainpll_cfg, nocclk) }, + { "mpuclk", offsetof(struct mainpll_cfg, mpuclk) }, +}; + +struct strtopu32 { + const char *str; + u32 *p; +}; + +const struct strtopu32 dt_to_val[] = { + { "/clocks/altera_arria10_hps_eosc1", &eosc1_hz}, + { "/clocks/altera_arria10_hps_cb_intosc_ls", &cb_intosc_hz}, + { "/clocks/altera_arria10_hps_f2h_free", &f2s_free_hz}, +}; -static int of_to_struct(const void *blob, int node, int cfg_len, void *cfg) +static int of_to_struct(const void *blob, int node, const struct strtou32 *cfg_tab, + int cfg_tab_len, void *cfg) { - if (fdtdec_get_int_array(blob, node, "altr,of_reg_value", - (u32 *)cfg, cfg_len)) { - /* could not find required property */ - return -EINVAL; + int i; + u32 val; + + for (i = 0; i < cfg_tab_len; i++) { + if (fdtdec_get_int_array(blob, node, cfg_tab[i].str, &val, 1)) { + /* could not find required property */ + return -EINVAL; + } + *(u32 *)(cfg + cfg_tab[i].val) = val; } return 0; } -static int of_get_input_clks(const void *blob, int node, u32 *val) +static void of_get_input_clks(const void *blob) { - *val = fdtdec_get_uint(blob, node, "clock-frequency", 0); - if (!*val) - return -EINVAL; + int node, i; - return 0; + for (i = 0; i < ARRAY_SIZE(dt_to_val); i++) { + node = fdt_path_offset(blob, dt_to_val[i].str); + + if (node < 0) + continue; + + fdtdec_get_int_array(blob, node, "clock-frequency", + dt_to_val[i].p, 1); + } } static int of_get_clk_cfg(const void *blob, struct mainpll_cfg *main_cfg, - struct perpll_cfg *per_cfg, - struct alteragrp_cfg *altrgrp_cfg) + struct perpll_cfg *per_cfg) { int node, child, len; const char *node_name; - node = fdtdec_next_compatible(blob, 0, COMPAT_ALTERA_SOCFPGA_CLK); + of_get_input_clks(blob); + + node = fdtdec_next_compatible(blob, 0, COMPAT_ALTERA_SOCFPGA_CLK_INIT); + if (node < 0) return -EINVAL; child = fdt_first_subnode(blob, node); - if (child < 0) - return -EINVAL; - child = fdt_first_subnode(blob, child); if (child < 0) return -EINVAL; node_name = fdt_get_name(blob, child, &len); while (node_name) { - if (!strcmp(node_name, "osc1")) { - if (of_get_input_clks(blob, child, &eosc1_hz)) + if (!strcmp(node_name, "mainpll")) { + if (of_to_struct(blob, child, mainpll_cfg_tab, + ARRAY_SIZE(mainpll_cfg_tab), main_cfg)) return -EINVAL; - } else if (!strcmp(node_name, "cb_intosc_ls_clk")) { - if (of_get_input_clks(blob, child, &cb_intosc_hz)) + } else if (!strcmp(node_name, "perpll")) { + if (of_to_struct(blob, child, perpll_cfg_tab, + ARRAY_SIZE(perpll_cfg_tab), per_cfg)) return -EINVAL; - } else if (!strcmp(node_name, "f2s_free_clk")) { - if (of_get_input_clks(blob, child, &f2s_free_hz)) + } else if (!strcmp(node_name, "alteragrp")) { + if (of_to_struct(blob, child, alteragrp_cfg_tab, + ARRAY_SIZE(alteragrp_cfg_tab), main_cfg)) return -EINVAL; - } else if (!strcmp(node_name, "main_pll")) { - if (of_to_struct(blob, child, - sizeof(*main_cfg)/sizeof(u32), - main_cfg)) - return -EINVAL; - } else if (!strcmp(node_name, "periph_pll")) { - if (of_to_struct(blob, child, - sizeof(*per_cfg)/sizeof(u32), - per_cfg)) - return -EINVAL; - } else if (!strcmp(node_name, "altera")) { - if (of_to_struct(blob, child, - sizeof(*altrgrp_cfg)/sizeof(u32), - altrgrp_cfg)) - return -EINVAL; - - main_cfg->mpuclk = altrgrp_cfg->mpuclk; - main_cfg->nocclk = altrgrp_cfg->nocclk; } child = fdt_next_subnode(blob, child); @@ -878,15 +942,13 @@ int cm_basic_init(const void *blob) { struct mainpll_cfg main_cfg; struct perpll_cfg per_cfg; - struct alteragrp_cfg altrgrp_cfg; int rval; /* initialize to zero for use case of optional node */ memset(&main_cfg, 0, sizeof(main_cfg)); memset(&per_cfg, 0, sizeof(per_cfg)); - memset(&altrgrp_cfg, 0, sizeof(altrgrp_cfg)); - rval = of_get_clk_cfg(blob, &main_cfg, &per_cfg, &altrgrp_cfg); + rval = of_get_clk_cfg(blob, &main_cfg, &per_cfg); if (rval) return rval; diff --git a/arch/arm/mach-socfpga/clock_manager_s10.c b/arch/arm/mach-socfpga/clock_manager_s10.c new file mode 100644 index 00000000000..3ba2a00c02a --- /dev/null +++ b/arch/arm/mach-socfpga/clock_manager_s10.c @@ -0,0 +1,380 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2016-2018 Intel Corporation <www.intel.com> + * + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/clock_manager.h> +#include <asm/arch/handoff_s10.h> +#include <asm/arch/system_manager.h> + +DECLARE_GLOBAL_DATA_PTR; + +static const struct socfpga_clock_manager *clock_manager_base = + (struct socfpga_clock_manager *)SOCFPGA_CLKMGR_ADDRESS; +static const struct socfpga_system_manager *sysmgr_regs = + (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS; + +/* + * function to write the bypass register which requires a poll of the + * busy bit + */ +static void cm_write_bypass_mainpll(u32 val) +{ + writel(val, &clock_manager_base->main_pll.bypass); + cm_wait_for_fsm(); +} + +static void cm_write_bypass_perpll(u32 val) +{ + writel(val, &clock_manager_base->per_pll.bypass); + cm_wait_for_fsm(); +} + +/* function to write the ctrl register which requires a poll of the busy bit */ +static void cm_write_ctrl(u32 val) +{ + writel(val, &clock_manager_base->ctrl); + cm_wait_for_fsm(); +} + +/* + * Setup clocks while making no assumptions about previous state of the clocks. + */ +void cm_basic_init(const struct cm_config * const cfg) +{ + u32 mdiv, refclkdiv, mscnt, hscnt, vcocalib; + + if (cfg == 0) + return; + + /* Put all plls in bypass */ + cm_write_bypass_mainpll(CLKMGR_BYPASS_MAINPLL_ALL); + cm_write_bypass_perpll(CLKMGR_BYPASS_PERPLL_ALL); + + /* setup main PLL dividers where calculate the vcocalib value */ + mdiv = (cfg->main_pll_fdbck >> CLKMGR_FDBCK_MDIV_OFFSET) & + CLKMGR_FDBCK_MDIV_MASK; + refclkdiv = (cfg->main_pll_pllglob >> CLKMGR_PLLGLOB_REFCLKDIV_OFFSET) & + CLKMGR_PLLGLOB_REFCLKDIV_MASK; + mscnt = CLKMGR_MSCNT_CONST / (CLKMGR_MDIV_CONST + mdiv) / refclkdiv; + hscnt = (mdiv + CLKMGR_MDIV_CONST) * mscnt / refclkdiv - + CLKMGR_HSCNT_CONST; + vcocalib = (hscnt & CLKMGR_VCOCALIB_HSCNT_MASK) | + ((mscnt & CLKMGR_VCOCALIB_MSCNT_MASK) << + CLKMGR_VCOCALIB_MSCNT_OFFSET); + + writel((cfg->main_pll_pllglob & ~CLKMGR_PLLGLOB_PD_MASK & + ~CLKMGR_PLLGLOB_RST_MASK), + &clock_manager_base->main_pll.pllglob); + writel(cfg->main_pll_fdbck, &clock_manager_base->main_pll.fdbck); + writel(vcocalib, &clock_manager_base->main_pll.vcocalib); + writel(cfg->main_pll_pllc0, &clock_manager_base->main_pll.pllc0); + writel(cfg->main_pll_pllc1, &clock_manager_base->main_pll.pllc1); + writel(cfg->main_pll_nocdiv, &clock_manager_base->main_pll.nocdiv); + + /* setup peripheral PLL dividers */ + /* calculate the vcocalib value */ + mdiv = (cfg->per_pll_fdbck >> CLKMGR_FDBCK_MDIV_OFFSET) & + CLKMGR_FDBCK_MDIV_MASK; + refclkdiv = (cfg->per_pll_pllglob >> CLKMGR_PLLGLOB_REFCLKDIV_OFFSET) & + CLKMGR_PLLGLOB_REFCLKDIV_MASK; + mscnt = CLKMGR_MSCNT_CONST / (CLKMGR_MDIV_CONST + mdiv) / refclkdiv; + hscnt = (mdiv + CLKMGR_MDIV_CONST) * mscnt / refclkdiv - + CLKMGR_HSCNT_CONST; + vcocalib = (hscnt & CLKMGR_VCOCALIB_HSCNT_MASK) | + ((mscnt & CLKMGR_VCOCALIB_MSCNT_MASK) << + CLKMGR_VCOCALIB_MSCNT_OFFSET); + + writel((cfg->per_pll_pllglob & ~CLKMGR_PLLGLOB_PD_MASK & + ~CLKMGR_PLLGLOB_RST_MASK), + &clock_manager_base->per_pll.pllglob); + writel(cfg->per_pll_fdbck, &clock_manager_base->per_pll.fdbck); + writel(vcocalib, &clock_manager_base->per_pll.vcocalib); + writel(cfg->per_pll_pllc0, &clock_manager_base->per_pll.pllc0); + writel(cfg->per_pll_pllc1, &clock_manager_base->per_pll.pllc1); + writel(cfg->per_pll_emacctl, &clock_manager_base->per_pll.emacctl); + writel(cfg->per_pll_gpiodiv, &clock_manager_base->per_pll.gpiodiv); + + /* Take both PLL out of reset and power up */ + setbits_le32(&clock_manager_base->main_pll.pllglob, + CLKMGR_PLLGLOB_PD_MASK | CLKMGR_PLLGLOB_RST_MASK); + setbits_le32(&clock_manager_base->per_pll.pllglob, + CLKMGR_PLLGLOB_PD_MASK | CLKMGR_PLLGLOB_RST_MASK); + +#define LOCKED_MASK \ + (CLKMGR_STAT_MAINPLL_LOCKED | \ + CLKMGR_STAT_PERPLL_LOCKED) + + cm_wait_for_lock(LOCKED_MASK); + + /* + * Dividers for C2 to C9 only init after PLLs are lock. As dividers + * only take effect upon value change, we shall set a maximum value as + * default value. + */ + writel(0xff, &clock_manager_base->main_pll.mpuclk); + writel(0xff, &clock_manager_base->main_pll.nocclk); + writel(0xff, &clock_manager_base->main_pll.cntr2clk); + writel(0xff, &clock_manager_base->main_pll.cntr3clk); + writel(0xff, &clock_manager_base->main_pll.cntr4clk); + writel(0xff, &clock_manager_base->main_pll.cntr5clk); + writel(0xff, &clock_manager_base->main_pll.cntr6clk); + writel(0xff, &clock_manager_base->main_pll.cntr7clk); + writel(0xff, &clock_manager_base->main_pll.cntr8clk); + writel(0xff, &clock_manager_base->main_pll.cntr9clk); + writel(0xff, &clock_manager_base->per_pll.cntr2clk); + writel(0xff, &clock_manager_base->per_pll.cntr3clk); + writel(0xff, &clock_manager_base->per_pll.cntr4clk); + writel(0xff, &clock_manager_base->per_pll.cntr5clk); + writel(0xff, &clock_manager_base->per_pll.cntr6clk); + writel(0xff, &clock_manager_base->per_pll.cntr7clk); + writel(0xff, &clock_manager_base->per_pll.cntr8clk); + writel(0xff, &clock_manager_base->per_pll.cntr9clk); + + writel(cfg->main_pll_mpuclk, &clock_manager_base->main_pll.mpuclk); + writel(cfg->main_pll_nocclk, &clock_manager_base->main_pll.nocclk); + writel(cfg->main_pll_cntr2clk, &clock_manager_base->main_pll.cntr2clk); + writel(cfg->main_pll_cntr3clk, &clock_manager_base->main_pll.cntr3clk); + writel(cfg->main_pll_cntr4clk, &clock_manager_base->main_pll.cntr4clk); + writel(cfg->main_pll_cntr5clk, &clock_manager_base->main_pll.cntr5clk); + writel(cfg->main_pll_cntr6clk, &clock_manager_base->main_pll.cntr6clk); + writel(cfg->main_pll_cntr7clk, &clock_manager_base->main_pll.cntr7clk); + writel(cfg->main_pll_cntr8clk, &clock_manager_base->main_pll.cntr8clk); + writel(cfg->main_pll_cntr9clk, &clock_manager_base->main_pll.cntr9clk); + writel(cfg->per_pll_cntr2clk, &clock_manager_base->per_pll.cntr2clk); + writel(cfg->per_pll_cntr3clk, &clock_manager_base->per_pll.cntr3clk); + writel(cfg->per_pll_cntr4clk, &clock_manager_base->per_pll.cntr4clk); + writel(cfg->per_pll_cntr5clk, &clock_manager_base->per_pll.cntr5clk); + writel(cfg->per_pll_cntr6clk, &clock_manager_base->per_pll.cntr6clk); + writel(cfg->per_pll_cntr7clk, &clock_manager_base->per_pll.cntr7clk); + writel(cfg->per_pll_cntr8clk, &clock_manager_base->per_pll.cntr8clk); + writel(cfg->per_pll_cntr9clk, &clock_manager_base->per_pll.cntr9clk); + + /* Take all PLLs out of bypass */ + cm_write_bypass_mainpll(0); + cm_write_bypass_perpll(0); + + /* clear safe mode / out of boot mode */ + cm_write_ctrl(readl(&clock_manager_base->ctrl) + & ~(CLKMGR_CTRL_SAFEMODE)); + + /* Now ungate non-hw-managed clocks */ + writel(~0, &clock_manager_base->main_pll.en); + writel(~0, &clock_manager_base->per_pll.en); + + /* Clear the loss of lock bits (write 1 to clear) */ + writel(CLKMGR_INTER_PERPLLLOST_MASK | CLKMGR_INTER_MAINPLLLOST_MASK, + &clock_manager_base->intrclr); +} + +static unsigned long cm_get_main_vco_clk_hz(void) +{ + unsigned long fref, refdiv, mdiv, reg, vco; + + reg = readl(&clock_manager_base->main_pll.pllglob); + + fref = (reg >> CLKMGR_PLLGLOB_VCO_PSRC_OFFSET) & + CLKMGR_PLLGLOB_VCO_PSRC_MASK; + switch (fref) { + case CLKMGR_VCO_PSRC_EOSC1: + fref = cm_get_osc_clk_hz(); + break; + case CLKMGR_VCO_PSRC_INTOSC: + fref = cm_get_intosc_clk_hz(); + break; + case CLKMGR_VCO_PSRC_F2S: + fref = cm_get_fpga_clk_hz(); + break; + } + + refdiv = (reg >> CLKMGR_PLLGLOB_REFCLKDIV_OFFSET) & + CLKMGR_PLLGLOB_REFCLKDIV_MASK; + + reg = readl(&clock_manager_base->main_pll.fdbck); + mdiv = (reg >> CLKMGR_FDBCK_MDIV_OFFSET) & CLKMGR_FDBCK_MDIV_MASK; + + vco = fref / refdiv; + vco = vco * (CLKMGR_MDIV_CONST + mdiv); + return vco; +} + +static unsigned long cm_get_per_vco_clk_hz(void) +{ + unsigned long fref, refdiv, mdiv, reg, vco; + + reg = readl(&clock_manager_base->per_pll.pllglob); + + fref = (reg >> CLKMGR_PLLGLOB_VCO_PSRC_OFFSET) & + CLKMGR_PLLGLOB_VCO_PSRC_MASK; + switch (fref) { + case CLKMGR_VCO_PSRC_EOSC1: + fref = cm_get_osc_clk_hz(); + break; + case CLKMGR_VCO_PSRC_INTOSC: + fref = cm_get_intosc_clk_hz(); + break; + case CLKMGR_VCO_PSRC_F2S: + fref = cm_get_fpga_clk_hz(); + break; + } + + refdiv = (reg >> CLKMGR_PLLGLOB_REFCLKDIV_OFFSET) & + CLKMGR_PLLGLOB_REFCLKDIV_MASK; + + reg = readl(&clock_manager_base->per_pll.fdbck); + mdiv = (reg >> CLKMGR_FDBCK_MDIV_OFFSET) & CLKMGR_FDBCK_MDIV_MASK; + + vco = fref / refdiv; + vco = vco * (CLKMGR_MDIV_CONST + mdiv); + return vco; +} + +unsigned long cm_get_mpu_clk_hz(void) +{ + unsigned long clock = readl(&clock_manager_base->main_pll.mpuclk); + + clock = (clock >> CLKMGR_CLKSRC_OFFSET) & CLKMGR_CLKSRC_MASK; + + switch (clock) { + case CLKMGR_CLKSRC_MAIN: + clock = cm_get_main_vco_clk_hz(); + clock /= (readl(&clock_manager_base->main_pll.pllc0) & + CLKMGR_PLLC0_DIV_MASK); + break; + + case CLKMGR_CLKSRC_PER: + clock = cm_get_per_vco_clk_hz(); + clock /= (readl(&clock_manager_base->per_pll.pllc0) & + CLKMGR_CLKCNT_MSK); + break; + + case CLKMGR_CLKSRC_OSC1: + clock = cm_get_osc_clk_hz(); + break; + + case CLKMGR_CLKSRC_INTOSC: + clock = cm_get_intosc_clk_hz(); + break; + + case CLKMGR_CLKSRC_FPGA: + clock = cm_get_fpga_clk_hz(); + break; + } + + clock /= 1 + (readl(&clock_manager_base->main_pll.mpuclk) & + CLKMGR_CLKCNT_MSK); + return clock; +} + +unsigned int cm_get_l3_main_clk_hz(void) +{ + u32 clock = readl(&clock_manager_base->main_pll.nocclk); + + clock = (clock >> CLKMGR_CLKSRC_OFFSET) & CLKMGR_CLKSRC_MASK; + + switch (clock) { + case CLKMGR_CLKSRC_MAIN: + clock = cm_get_main_vco_clk_hz(); + clock /= (readl(&clock_manager_base->main_pll.pllc1) & + CLKMGR_PLLC0_DIV_MASK); + break; + + case CLKMGR_CLKSRC_PER: + clock = cm_get_per_vco_clk_hz(); + clock /= (readl(&clock_manager_base->per_pll.pllc1) & + CLKMGR_CLKCNT_MSK); + break; + + case CLKMGR_CLKSRC_OSC1: + clock = cm_get_osc_clk_hz(); + break; + + case CLKMGR_CLKSRC_INTOSC: + clock = cm_get_intosc_clk_hz(); + break; + + case CLKMGR_CLKSRC_FPGA: + clock = cm_get_fpga_clk_hz(); + break; + } + + clock /= 1 + (readl(&clock_manager_base->main_pll.nocclk) & + CLKMGR_CLKCNT_MSK); + return clock; +} + +unsigned int cm_get_mmc_controller_clk_hz(void) +{ + u32 clock = readl(&clock_manager_base->per_pll.cntr6clk); + + clock = (clock >> CLKMGR_CLKSRC_OFFSET) & CLKMGR_CLKSRC_MASK; + + switch (clock) { + case CLKMGR_CLKSRC_MAIN: + clock = cm_get_l3_main_clk_hz(); + clock /= 1 + (readl(&clock_manager_base->main_pll.cntr6clk) & + CLKMGR_CLKCNT_MSK); + break; + + case CLKMGR_CLKSRC_PER: + clock = cm_get_l3_main_clk_hz(); + clock /= 1 + (readl(&clock_manager_base->per_pll.cntr6clk) & + CLKMGR_CLKCNT_MSK); + break; + + case CLKMGR_CLKSRC_OSC1: + clock = cm_get_osc_clk_hz(); + break; + + case CLKMGR_CLKSRC_INTOSC: + clock = cm_get_intosc_clk_hz(); + break; + + case CLKMGR_CLKSRC_FPGA: + clock = cm_get_fpga_clk_hz(); + break; + } + return clock / 4; +} + +unsigned int cm_get_l4_sp_clk_hz(void) +{ + u32 clock = cm_get_l3_main_clk_hz(); + + clock /= (1 << ((readl(&clock_manager_base->main_pll.nocdiv) >> + CLKMGR_NOCDIV_L4SPCLK_OFFSET) & CLKMGR_CLKCNT_MSK)); + return clock; +} + +unsigned int cm_get_qspi_controller_clk_hz(void) +{ + return readl(&sysmgr_regs->boot_scratch_cold0); +} + +unsigned int cm_get_spi_controller_clk_hz(void) +{ + u32 clock = cm_get_l3_main_clk_hz(); + + clock /= (1 << ((readl(&clock_manager_base->main_pll.nocdiv) >> + CLKMGR_NOCDIV_L4MAIN_OFFSET) & CLKMGR_CLKCNT_MSK)); + return clock; +} + +unsigned int cm_get_l4_sys_free_clk_hz(void) +{ + return cm_get_l3_main_clk_hz() / 4; +} + +void cm_print_clock_quick_summary(void) +{ + printf("MPU %d kHz\n", (u32)(cm_get_mpu_clk_hz() / 1000)); + printf("L3 main %d kHz\n", cm_get_l3_main_clk_hz() / 1000); + printf("Main VCO %d kHz\n", (u32)(cm_get_main_vco_clk_hz() / 1000)); + printf("Per VCO %d kHz\n", (u32)(cm_get_per_vco_clk_hz() / 1000)); + printf("EOSC1 %d kHz\n", cm_get_osc_clk_hz() / 1000); + printf("HPS MMC %d kHz\n", cm_get_mmc_controller_clk_hz() / 1000); + printf("UART %d kHz\n", cm_get_l4_sp_clk_hz() / 1000); +} diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_s10.h b/arch/arm/mach-socfpga/include/mach/base_addr_s10.h index 2c6e412f612..1f549d7e70f 100644 --- a/arch/arm/mach-socfpga/include/mach/base_addr_s10.h +++ b/arch/arm/mach-socfpga/include/mach/base_addr_s10.h @@ -6,9 +6,11 @@ #ifndef _SOCFPGA_S10_BASE_HARDWARE_H_ #define _SOCFPGA_S10_BASE_HARDWARE_H_ +#define SOCFPGA_CCU_ADDRESS 0xf7000000 #define SOCFPGA_SDR_SCHEDULER_ADDRESS 0xf8000400 #define SOCFPGA_HMC_MMR_IO48_ADDRESS 0xf8010000 #define SOCFPGA_SDR_ADDRESS 0xf8011000 +#define SOCFPGA_FW_MPU_DDR_SCR_ADDRESS 0xf8020100 #define SOCFPGA_SMMU_ADDRESS 0xfa000000 #define SOCFPGA_MAILBOX_ADDRESS 0xffa30000 #define SOCFPGA_UART0_ADDRESS 0xffc02000 @@ -17,12 +19,21 @@ #define SOCFPGA_SPTIMER1_ADDRESS 0xffc03100 #define SOCFPGA_SYSTIMER0_ADDRESS 0xffd00000 #define SOCFPGA_SYSTIMER1_ADDRESS 0xffd00100 +#define SOCFPGA_L4WD0_ADDRESS 0xffd00200 +#define SOCFPGA_L4WD1_ADDRESS 0xffd00300 +#define SOCFPGA_L4WD2_ADDRESS 0xffd00400 +#define SOCFPGA_L4WD3_ADDRESS 0xffd00500 #define SOCFPGA_GTIMER_SEC_ADDRESS 0xffd01000 #define SOCFPGA_GTIMER_NSEC_ADDRESS 0xffd02000 #define SOCFPGA_CLKMGR_ADDRESS 0xffd10000 #define SOCFPGA_RSTMGR_ADDRESS 0xffd11000 #define SOCFPGA_SYSMGR_ADDRESS 0xffd12000 #define SOCFPGA_PINMUX_DEDICATED_IO_ADDRESS 0xffd13000 +#define SOCFPGA_FIREWALL_L4_PER 0xffd21000 +#define SOCFPGA_FIREWALL_L4_SYS 0xffd21100 +#define SOCFPGA_FIREWALL_SOC2FPGA 0xffd21200 +#define SOCFPGA_FIREWALL_LWSOC2FPGA 0xffd21300 +#define SOCFPGA_FIREWALL_TCU 0xffd21400 #define SOCFPGA_DMANONSECURE_ADDRESS 0xffda0000 #define SOCFPGA_DMASECURE_ADDRESS 0xffda1000 #define SOCFPGA_OCRAM_ADDRESS 0xffe00000 diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager.h b/arch/arm/mach-socfpga/include/mach/clock_manager.h index 3ace040d156..dd80e3a7672 100644 --- a/arch/arm/mach-socfpga/include/mach/clock_manager.h +++ b/arch/arm/mach-socfpga/include/mach/clock_manager.h @@ -16,6 +16,8 @@ void cm_print_clock_quick_summary(void); #include <asm/arch/clock_manager_gen5.h> #elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) #include <asm/arch/clock_manager_arria10.h> +#elif defined(CONFIG_TARGET_SOCFPGA_STRATIX10) +#include <asm/arch/clock_manager_s10.h> #endif #endif /* _CLOCK_MANAGER_H_ */ diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h b/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h index a3289ee2dac..cb2306e5bcc 100644 --- a/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h +++ b/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h @@ -107,7 +107,7 @@ unsigned int cm_get_spi_controller_clk_hz(void); #define CLKMGR_ALTERAGRP_MPU_CLK_OFFSET 0x140 #define CLKMGR_MAINPLL_NOC_CLK_OFFSET 0x144 -#define LOCKED_MASK (CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_SET_MSK | \ +#define LOCKED_MASK (CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_SET_MSK | \ CLKMGR_CLKMGR_STAT_PERPLLLOCKED_SET_MSK) /* value */ diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h b/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h new file mode 100644 index 00000000000..24b20de011d --- /dev/null +++ b/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h @@ -0,0 +1,210 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * Copyright (C) 2016-2018 Intel Corporation <www.intel.com> + * + */ + +#ifndef _CLOCK_MANAGER_S10_ +#define _CLOCK_MANAGER_S10_ + +/* Clock speed accessors */ +unsigned long cm_get_mpu_clk_hz(void); +unsigned long cm_get_sdram_clk_hz(void); +unsigned int cm_get_l4_sp_clk_hz(void); +unsigned int cm_get_mmc_controller_clk_hz(void); +unsigned int cm_get_qspi_controller_clk_hz(void); +unsigned int cm_get_spi_controller_clk_hz(void); +const unsigned int cm_get_osc_clk_hz(void); +const unsigned int cm_get_f2s_per_ref_clk_hz(void); +const unsigned int cm_get_f2s_sdr_ref_clk_hz(void); +const unsigned int cm_get_intosc_clk_hz(void); +const unsigned int cm_get_fpga_clk_hz(void); + +#define CLKMGR_EOSC1_HZ 25000000 +#define CLKMGR_INTOSC_HZ 460000000 +#define CLKMGR_FPGA_CLK_HZ 50000000 + +/* Clock configuration accessors */ +const struct cm_config * const cm_get_default_config(void); + +struct cm_config { + /* main group */ + u32 main_pll_mpuclk; + u32 main_pll_nocclk; + u32 main_pll_cntr2clk; + u32 main_pll_cntr3clk; + u32 main_pll_cntr4clk; + u32 main_pll_cntr5clk; + u32 main_pll_cntr6clk; + u32 main_pll_cntr7clk; + u32 main_pll_cntr8clk; + u32 main_pll_cntr9clk; + u32 main_pll_nocdiv; + u32 main_pll_pllglob; + u32 main_pll_fdbck; + u32 main_pll_pllc0; + u32 main_pll_pllc1; + u32 spare; + + /* peripheral group */ + u32 per_pll_cntr2clk; + u32 per_pll_cntr3clk; + u32 per_pll_cntr4clk; + u32 per_pll_cntr5clk; + u32 per_pll_cntr6clk; + u32 per_pll_cntr7clk; + u32 per_pll_cntr8clk; + u32 per_pll_cntr9clk; + u32 per_pll_emacctl; + u32 per_pll_gpiodiv; + u32 per_pll_pllglob; + u32 per_pll_fdbck; + u32 per_pll_pllc0; + u32 per_pll_pllc1; + + /* incoming clock */ + u32 hps_osc_clk_hz; + u32 fpga_clk_hz; +}; + +void cm_basic_init(const struct cm_config * const cfg); + +struct socfpga_clock_manager_main_pll { + u32 en; + u32 ens; + u32 enr; + u32 bypass; + u32 bypasss; + u32 bypassr; + u32 mpuclk; + u32 nocclk; + u32 cntr2clk; + u32 cntr3clk; + u32 cntr4clk; + u32 cntr5clk; + u32 cntr6clk; + u32 cntr7clk; + u32 cntr8clk; + u32 cntr9clk; + u32 nocdiv; + u32 pllglob; + u32 fdbck; + u32 mem; + u32 memstat; + u32 pllc0; + u32 pllc1; + u32 vcocalib; + u32 _pad_0x90_0xA0[5]; +}; + +struct socfpga_clock_manager_per_pll { + u32 en; + u32 ens; + u32 enr; + u32 bypass; + u32 bypasss; + u32 bypassr; + u32 cntr2clk; + u32 cntr3clk; + u32 cntr4clk; + u32 cntr5clk; + u32 cntr6clk; + u32 cntr7clk; + u32 cntr8clk; + u32 cntr9clk; + u32 emacctl; + u32 gpiodiv; + u32 pllglob; + u32 fdbck; + u32 mem; + u32 memstat; + u32 pllc0; + u32 pllc1; + u32 vcocalib; + u32 _pad_0x100_0x124[10]; +}; + +struct socfpga_clock_manager { + u32 ctrl; + u32 stat; + u32 testioctrl; + u32 intrgen; + u32 intrmsk; + u32 intrclr; + u32 intrsts; + u32 intrstk; + u32 intrraw; + u32 _pad_0x24_0x2c[3]; + struct socfpga_clock_manager_main_pll main_pll; + struct socfpga_clock_manager_per_pll per_pll; +}; + +#define CLKMGR_CTRL_SAFEMODE BIT(0) +#define CLKMGR_BYPASS_MAINPLL_ALL 0x00000007 +#define CLKMGR_BYPASS_PERPLL_ALL 0x0000007f + +#define CLKMGR_INTER_MAINPLLLOCKED_MASK 0x00000001 +#define CLKMGR_INTER_PERPLLLOCKED_MASK 0x00000002 +#define CLKMGR_INTER_MAINPLLLOST_MASK 0x00000004 +#define CLKMGR_INTER_PERPLLLOST_MASK 0x00000008 +#define CLKMGR_STAT_BUSY BIT(0) +#define CLKMGR_STAT_MAINPLL_LOCKED BIT(8) +#define CLKMGR_STAT_PERPLL_LOCKED BIT(9) + +#define CLKMGR_PLLGLOB_PD_MASK 0x00000001 +#define CLKMGR_PLLGLOB_RST_MASK 0x00000002 +#define CLKMGR_PLLGLOB_VCO_PSRC_MASK 0X3 +#define CLKMGR_PLLGLOB_VCO_PSRC_OFFSET 16 +#define CLKMGR_VCO_PSRC_EOSC1 0 +#define CLKMGR_VCO_PSRC_INTOSC 1 +#define CLKMGR_VCO_PSRC_F2S 2 +#define CLKMGR_PLLGLOB_REFCLKDIV_MASK 0X3f +#define CLKMGR_PLLGLOB_REFCLKDIV_OFFSET 8 + +#define CLKMGR_CLKSRC_MASK 0x7 +#define CLKMGR_CLKSRC_OFFSET 16 +#define CLKMGR_CLKSRC_MAIN 0 +#define CLKMGR_CLKSRC_PER 1 +#define CLKMGR_CLKSRC_OSC1 2 +#define CLKMGR_CLKSRC_INTOSC 3 +#define CLKMGR_CLKSRC_FPGA 4 +#define CLKMGR_CLKCNT_MSK 0x7ff + +#define CLKMGR_FDBCK_MDIV_MASK 0xff +#define CLKMGR_FDBCK_MDIV_OFFSET 24 + +#define CLKMGR_PLLC0_DIV_MASK 0xff +#define CLKMGR_PLLC1_DIV_MASK 0xff +#define CLKMGR_PLLC0_EN_OFFSET 27 +#define CLKMGR_PLLC1_EN_OFFSET 24 + +#define CLKMGR_NOCDIV_L4MAIN_OFFSET 0 +#define CLKMGR_NOCDIV_L4MPCLK_OFFSET 8 +#define CLKMGR_NOCDIV_L4SPCLK_OFFSET 16 +#define CLKMGR_NOCDIV_CSATCLK_OFFSET 24 +#define CLKMGR_NOCDIV_CSTRACECLK_OFFSET 26 +#define CLKMGR_NOCDIV_CSPDBGCLK_OFFSET 28 + +#define CLKMGR_NOCDIV_L4SPCLK_MASK 0X3 +#define CLKMGR_NOCDIV_DIV1 0 +#define CLKMGR_NOCDIV_DIV2 1 +#define CLKMGR_NOCDIV_DIV4 2 +#define CLKMGR_NOCDIV_DIV8 3 +#define CLKMGR_CSPDBGCLK_DIV1 0 +#define CLKMGR_CSPDBGCLK_DIV4 1 + +#define CLKMGR_MSCNT_CONST 200 +#define CLKMGR_MDIV_CONST 6 +#define CLKMGR_HSCNT_CONST 9 + +#define CLKMGR_VCOCALIB_MSCNT_MASK 0xff +#define CLKMGR_VCOCALIB_MSCNT_OFFSET 9 +#define CLKMGR_VCOCALIB_HSCNT_MASK 0xff + +#define CLKMGR_EMACCTL_EMAC0SEL_OFFSET 26 +#define CLKMGR_EMACCTL_EMAC1SEL_OFFSET 27 +#define CLKMGR_EMACCTL_EMAC2SEL_OFFSET 28 + +#define CLKMGR_PERPLLGRP_EN_SDMMCCLK_MASK 0x00000020 + +#endif /* _CLOCK_MANAGER_S10_ */ diff --git a/arch/arm/mach-socfpga/include/mach/handoff_s10.h b/arch/arm/mach-socfpga/include/mach/handoff_s10.h new file mode 100644 index 00000000000..ba0f1fd1b2c --- /dev/null +++ b/arch/arm/mach-socfpga/include/mach/handoff_s10.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * Copyright (C) 2016-2018 Intel Corporation <www.intel.com> + * + */ + +#ifndef _HANDOFF_S10_H_ +#define _HANDOFF_S10_H_ + +/* + * Offset for HW handoff from Quartus tools + */ +#define S10_HANDOFF_BASE 0xFFE3F000 +#define S10_HANDOFF_MUX (S10_HANDOFF_BASE + 0x10) +#define S10_HANDOFF_IOCTL (S10_HANDOFF_BASE + 0x1A0) +#define S10_HANDOFF_FPGA (S10_HANDOFF_BASE + 0x330) +#define S10_HANODFF_DELAY (S10_HANDOFF_BASE + 0x3F0) +#define S10_HANDOFF_CLOCK (S10_HANDOFF_BASE + 0x580) +#define S10_HANDOFF_MISC (S10_HANDOFF_BASE + 0x610) +#define S10_HANDOFF_MAGIC_MUX 0x504D5558 +#define S10_HANDOFF_MAGIC_IOCTL 0x494F4354 +#define S10_HANDOFF_MAGIC_FPGA 0x46504741 +#define S10_HANDOFF_MAGIC_DELAY 0x444C4159 +#define S10_HANDOFF_MAGIC_CLOCK 0x434C4B53 +#define S10_HANDOFF_MAGIC_MISC 0x4D495343 +#define S10_HANDOFF_OFFSET_LENGTH 0x4 +#define S10_HANDOFF_OFFSET_DATA 0x10 + +#define S10_HANDOFF_CLOCK_OSC (S10_HANDOFF_BASE + 0x608) +#define S10_HANDOFF_CLOCK_FPGA (S10_HANDOFF_BASE + 0x60C) + +#define S10_HANDOFF_SIZE 4096 + +#endif /* _HANDOFF_S10_H_ */ diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager.h b/arch/arm/mach-socfpga/include/mach/reset_manager.h index 7cfed7d001a..d9e0b33c601 100644 --- a/arch/arm/mach-socfpga/include/mach/reset_manager.h +++ b/arch/arm/mach-socfpga/include/mach/reset_manager.h @@ -10,12 +10,10 @@ void reset_cpu(ulong addr); void socfpga_per_reset(u32 reset, int set); void socfpga_per_reset_all(void); +int socfpga_eth_reset_common(void (*resetfn)(const u8 of_reset_id, + const u8 phymode)); -#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET) -#define RSTMGR_CTRL_SWWARMRSTREQ_LSB 2 -#else #define RSTMGR_CTRL_SWWARMRSTREQ_LSB 1 -#endif /* * Define a reset identifier, from which a permodrst bank ID @@ -44,6 +42,8 @@ void socfpga_per_reset_all(void); #include <asm/arch/reset_manager_gen5.h> #elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) #include <asm/arch/reset_manager_arria10.h> +#elif defined(CONFIG_TARGET_SOCFPGA_STRATIX10) +#include <asm/arch/reset_manager_s10.h> #endif #endif /* _RESET_MANAGER_H_ */ diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h new file mode 100644 index 00000000000..6182d5fa3f4 --- /dev/null +++ b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h @@ -0,0 +1,116 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * Copyright (C) 2016-2018 Intel Corporation <www.intel.com> + * + */ + +#ifndef _RESET_MANAGER_S10_ +#define _RESET_MANAGER_S10_ + +void reset_cpu(ulong addr); +void reset_deassert_peripherals_handoff(void); + +void socfpga_bridges_reset(int enable); + +void socfpga_per_reset(u32 reset, int set); +void socfpga_per_reset_all(void); + +struct socfpga_reset_manager { + u32 status; + u32 mpu_rst_stat; + u32 misc_stat; + u32 padding1; + u32 hdsk_en; + u32 hdsk_req; + u32 hdsk_ack; + u32 hdsk_stall; + u32 mpumodrst; + u32 per0modrst; + u32 per1modrst; + u32 brgmodrst; + u32 padding2; + u32 cold_mod_reset; + u32 padding3; + u32 dbg_mod_reset; + u32 tap_mod_reset; + u32 padding4; + u32 padding5; + u32 brg_warm_mask; + u32 padding6[3]; + u32 tst_stat; + u32 padding7; + u32 hdsk_timeout; + u32 mpul2flushtimeout; + u32 dbghdsktimeout; +}; + +#define RSTMGR_MPUMODRST_CORE0 0 +#define RSTMGR_PER0MODRST_OCP_MASK 0x0020bf00 +#define RSTMGR_BRGMODRST_DDRSCH_MASK 0X00000040 + +/* + * Define a reset identifier, from which a permodrst bank ID + * and reset ID can be extracted using the subsequent macros + * RSTMGR_RESET() and RSTMGR_BANK(). + */ +#define RSTMGR_BANK_OFFSET 8 +#define RSTMGR_BANK_MASK 0x7 +#define RSTMGR_RESET_OFFSET 0 +#define RSTMGR_RESET_MASK 0x1f +#define RSTMGR_DEFINE(_bank, _offset) \ + ((_bank) << RSTMGR_BANK_OFFSET) | ((_offset) << RSTMGR_RESET_OFFSET) + +/* Extract reset ID from the reset identifier. */ +#define RSTMGR_RESET(_reset) \ + (((_reset) >> RSTMGR_RESET_OFFSET) & RSTMGR_RESET_MASK) + +/* Extract bank ID from the reset identifier. */ +#define RSTMGR_BANK(_reset) \ + (((_reset) >> RSTMGR_BANK_OFFSET) & RSTMGR_BANK_MASK) + +/* + * SocFPGA Stratix10 reset IDs, bank mapping is as follows: + * 0 ... mpumodrst + * 1 ... per0modrst + * 2 ... per1modrst + * 3 ... brgmodrst + */ +#define RSTMGR_EMAC0 RSTMGR_DEFINE(1, 0) +#define RSTMGR_EMAC1 RSTMGR_DEFINE(1, 1) +#define RSTMGR_EMAC2 RSTMGR_DEFINE(1, 2) +#define RSTMGR_USB0 RSTMGR_DEFINE(1, 3) +#define RSTMGR_USB1 RSTMGR_DEFINE(1, 4) +#define RSTMGR_NAND RSTMGR_DEFINE(1, 5) +#define RSTMGR_SDMMC RSTMGR_DEFINE(1, 7) +#define RSTMGR_EMAC0_OCP RSTMGR_DEFINE(1, 8) +#define RSTMGR_EMAC1_OCP RSTMGR_DEFINE(1, 9) +#define RSTMGR_EMAC2_OCP RSTMGR_DEFINE(1, 10) +#define RSTMGR_USB0_OCP RSTMGR_DEFINE(1, 11) +#define RSTMGR_USB1_OCP RSTMGR_DEFINE(1, 12) +#define RSTMGR_NAND_OCP RSTMGR_DEFINE(1, 13) +#define RSTMGR_SDMMC_OCP RSTMGR_DEFINE(1, 15) +#define RSTMGR_DMA RSTMGR_DEFINE(1, 16) +#define RSTMGR_SPIM0 RSTMGR_DEFINE(1, 17) +#define RSTMGR_SPIM1 RSTMGR_DEFINE(1, 18) +#define RSTMGR_L4WD0 RSTMGR_DEFINE(2, 0) +#define RSTMGR_L4WD1 RSTMGR_DEFINE(2, 1) +#define RSTMGR_L4WD2 RSTMGR_DEFINE(2, 2) +#define RSTMGR_L4WD3 RSTMGR_DEFINE(2, 3) +#define RSTMGR_OSC1TIMER0 RSTMGR_DEFINE(2, 4) +#define RSTMGR_I2C0 RSTMGR_DEFINE(2, 8) +#define RSTMGR_I2C1 RSTMGR_DEFINE(2, 9) +#define RSTMGR_I2C2 RSTMGR_DEFINE(2, 10) +#define RSTMGR_I2C3 RSTMGR_DEFINE(2, 11) +#define RSTMGR_I2C4 RSTMGR_DEFINE(2, 12) +#define RSTMGR_UART0 RSTMGR_DEFINE(2, 16) +#define RSTMGR_UART1 RSTMGR_DEFINE(2, 17) +#define RSTMGR_GPIO0 RSTMGR_DEFINE(2, 24) +#define RSTMGR_GPIO1 RSTMGR_DEFINE(2, 25) +#define RSTMGR_SDR RSTMGR_DEFINE(3, 6) + +void socfpga_emac_manage_reset(const unsigned int of_reset_id, u32 state); + +/* Create a human-readable reference to SoCFPGA reset. */ +#define SOCFPGA_RESET(_name) RSTMGR_##_name + +#endif /* _RESET_MANAGER_S10_ */ diff --git a/arch/arm/mach-socfpga/include/mach/scu.h b/arch/arm/mach-socfpga/include/mach/scu.h index 27224b1a87f..b684a550192 100644 --- a/arch/arm/mach-socfpga/include/mach/scu.h +++ b/arch/arm/mach-socfpga/include/mach/scu.h @@ -14,8 +14,8 @@ struct scu_registers { u32 _pad_0x10_0x3c[12]; /* 0x10 */ u32 fsar; /* 0x40 */ u32 fear; - u32 _pad_0x48_0x50[2]; - u32 acr; /* 0x54 */ + u32 _pad_0x48_0x4c[2]; + u32 acr; /* 0x50 */ u32 sacr; }; diff --git a/arch/arm/mach-socfpga/include/mach/sdram.h b/arch/arm/mach-socfpga/include/mach/sdram.h index a58872c3d92..79cb9e6064a 100644 --- a/arch/arm/mach-socfpga/include/mach/sdram.h +++ b/arch/arm/mach-socfpga/include/mach/sdram.h @@ -7,435 +7,11 @@ #ifndef __ASSEMBLY__ -unsigned long sdram_calculate_size(void); -int sdram_mmr_init_full(unsigned int sdr_phy_reg); -int sdram_calibration_full(void); - -const struct socfpga_sdram_config *socfpga_get_sdram_config(void); - -void socfpga_get_seq_ac_init(const u32 **init, unsigned int *nelem); -void socfpga_get_seq_inst_init(const u32 **init, unsigned int *nelem); -const struct socfpga_sdram_rw_mgr_config *socfpga_get_sdram_rwmgr_config(void); -const struct socfpga_sdram_io_config *socfpga_get_sdram_io_config(void); -const struct socfpga_sdram_misc_config *socfpga_get_sdram_misc_config(void); - -#define SDR_CTRLGRP_ADDRESS (SOCFPGA_SDR_ADDRESS | 0x5000) - -struct socfpga_sdr_ctrl { - u32 ctrl_cfg; - u32 dram_timing1; - u32 dram_timing2; - u32 dram_timing3; - u32 dram_timing4; /* 0x10 */ - u32 lowpwr_timing; - u32 dram_odt; - u32 extratime1; - u32 __padding0[3]; - u32 dram_addrw; /* 0x2c */ - u32 dram_if_width; /* 0x30 */ - u32 dram_dev_width; - u32 dram_sts; - u32 dram_intr; - u32 sbe_count; /* 0x40 */ - u32 dbe_count; - u32 err_addr; - u32 drop_count; - u32 drop_addr; /* 0x50 */ - u32 lowpwr_eq; - u32 lowpwr_ack; - u32 static_cfg; - u32 ctrl_width; /* 0x60 */ - u32 cport_width; - u32 cport_wmap; - u32 cport_rmap; - u32 rfifo_cmap; /* 0x70 */ - u32 wfifo_cmap; - u32 cport_rdwr; - u32 port_cfg; - u32 fpgaport_rst; /* 0x80 */ - u32 __padding1; - u32 fifo_cfg; - u32 protport_default; - u32 prot_rule_addr; /* 0x90 */ - u32 prot_rule_id; - u32 prot_rule_data; - u32 prot_rule_rdwr; - u32 __padding2[3]; - u32 mp_priority; /* 0xac */ - u32 mp_weight0; /* 0xb0 */ - u32 mp_weight1; - u32 mp_weight2; - u32 mp_weight3; - u32 mp_pacing0; /* 0xc0 */ - u32 mp_pacing1; - u32 mp_pacing2; - u32 mp_pacing3; - u32 mp_threshold0; /* 0xd0 */ - u32 mp_threshold1; - u32 mp_threshold2; - u32 __padding3[29]; - u32 phy_ctrl0; /* 0x150 */ - u32 phy_ctrl1; - u32 phy_ctrl2; -}; - -/* SDRAM configuration structure for the SPL. */ -struct socfpga_sdram_config { - u32 ctrl_cfg; - u32 dram_timing1; - u32 dram_timing2; - u32 dram_timing3; - u32 dram_timing4; - u32 lowpwr_timing; - u32 dram_odt; - u32 extratime1; - u32 dram_addrw; - u32 dram_if_width; - u32 dram_dev_width; - u32 dram_intr; - u32 lowpwr_eq; - u32 static_cfg; - u32 ctrl_width; - u32 cport_width; - u32 cport_wmap; - u32 cport_rmap; - u32 rfifo_cmap; - u32 wfifo_cmap; - u32 cport_rdwr; - u32 port_cfg; - u32 fpgaport_rst; - u32 fifo_cfg; - u32 mp_priority; - u32 mp_weight0; - u32 mp_weight1; - u32 mp_weight2; - u32 mp_weight3; - u32 mp_pacing0; - u32 mp_pacing1; - u32 mp_pacing2; - u32 mp_pacing3; - u32 mp_threshold0; - u32 mp_threshold1; - u32 mp_threshold2; - u32 phy_ctrl0; -}; - -struct socfpga_sdram_rw_mgr_config { - u8 activate_0_and_1; - u8 activate_0_and_1_wait1; - u8 activate_0_and_1_wait2; - u8 activate_1; - u8 clear_dqs_enable; - u8 guaranteed_read; - u8 guaranteed_read_cont; - u8 guaranteed_write; - u8 guaranteed_write_wait0; - u8 guaranteed_write_wait1; - u8 guaranteed_write_wait2; - u8 guaranteed_write_wait3; - u8 idle; - u8 idle_loop1; - u8 idle_loop2; - u8 init_reset_0_cke_0; - u8 init_reset_1_cke_0; - u8 lfsr_wr_rd_bank_0; - u8 lfsr_wr_rd_bank_0_data; - u8 lfsr_wr_rd_bank_0_dqs; - u8 lfsr_wr_rd_bank_0_nop; - u8 lfsr_wr_rd_bank_0_wait; - u8 lfsr_wr_rd_bank_0_wl_1; - u8 lfsr_wr_rd_dm_bank_0; - u8 lfsr_wr_rd_dm_bank_0_data; - u8 lfsr_wr_rd_dm_bank_0_dqs; - u8 lfsr_wr_rd_dm_bank_0_nop; - u8 lfsr_wr_rd_dm_bank_0_wait; - u8 lfsr_wr_rd_dm_bank_0_wl_1; - u8 mrs0_dll_reset; - u8 mrs0_dll_reset_mirr; - u8 mrs0_user; - u8 mrs0_user_mirr; - u8 mrs1; - u8 mrs1_mirr; - u8 mrs2; - u8 mrs2_mirr; - u8 mrs3; - u8 mrs3_mirr; - u8 precharge_all; - u8 read_b2b; - u8 read_b2b_wait1; - u8 read_b2b_wait2; - u8 refresh_all; - u8 rreturn; - u8 sgle_read; - u8 zqcl; - - u8 true_mem_data_mask_width; - u8 mem_address_mirroring; - u8 mem_data_mask_width; - u8 mem_data_width; - u8 mem_dq_per_read_dqs; - u8 mem_dq_per_write_dqs; - u8 mem_if_read_dqs_width; - u8 mem_if_write_dqs_width; - u8 mem_number_of_cs_per_dimm; - u8 mem_number_of_ranks; - u8 mem_virtual_groups_per_read_dqs; - u8 mem_virtual_groups_per_write_dqs; -}; - -struct socfpga_sdram_io_config { - u16 delay_per_opa_tap; - u8 delay_per_dchain_tap; - u8 delay_per_dqs_en_dchain_tap; - u8 dll_chain_length; - u8 dqdqs_out_phase_max; - u8 dqs_en_delay_max; - u8 dqs_en_delay_offset; - u8 dqs_en_phase_max; - u8 dqs_in_delay_max; - u8 dqs_in_reserve; - u8 dqs_out_reserve; - u8 io_in_delay_max; - u8 io_out1_delay_max; - u8 io_out2_delay_max; - u8 shift_dqs_en_when_shift_dqs; -}; - -struct socfpga_sdram_misc_config { - u32 reg_file_init_seq_signature; - u8 afi_rate_ratio; - u8 calib_lfifo_offset; - u8 calib_vfifo_offset; - u8 enable_super_quick_calibration; - u8 max_latency_count_width; - u8 read_valid_fifo_size; - u8 tinit_cntr0_val; - u8 tinit_cntr1_val; - u8 tinit_cntr2_val; - u8 treset_cntr0_val; - u8 treset_cntr1_val; - u8 treset_cntr2_val; -}; - -#define SDR_CTRLGRP_CTRLCFG_NODMPINS_LSB 23 -#define SDR_CTRLGRP_CTRLCFG_NODMPINS_MASK 0x00800000 -#define SDR_CTRLGRP_CTRLCFG_DQSTRKEN_LSB 22 -#define SDR_CTRLGRP_CTRLCFG_DQSTRKEN_MASK 0x00400000 -#define SDR_CTRLGRP_CTRLCFG_STARVELIMIT_LSB 16 -#define SDR_CTRLGRP_CTRLCFG_STARVELIMIT_MASK 0x003f0000 -#define SDR_CTRLGRP_CTRLCFG_REORDEREN_LSB 15 -#define SDR_CTRLGRP_CTRLCFG_REORDEREN_MASK 0x00008000 -#define SDR_CTRLGRP_CTRLCFG_ECCCORREN_LSB 11 -#define SDR_CTRLGRP_CTRLCFG_ECCCORREN_MASK 0x00000800 -#define SDR_CTRLGRP_CTRLCFG_ECCEN_LSB 10 -#define SDR_CTRLGRP_CTRLCFG_ECCEN_MASK 0x00000400 -#define SDR_CTRLGRP_CTRLCFG_ADDRORDER_LSB 8 -#define SDR_CTRLGRP_CTRLCFG_ADDRORDER_MASK 0x00000300 -#define SDR_CTRLGRP_CTRLCFG_MEMBL_LSB 3 -#define SDR_CTRLGRP_CTRLCFG_MEMBL_MASK 0x000000f8 -#define SDR_CTRLGRP_CTRLCFG_MEMTYPE_LSB 0 -#define SDR_CTRLGRP_CTRLCFG_MEMTYPE_MASK 0x00000007 -/* Register template: sdr::ctrlgrp::dramtiming1 */ -#define SDR_CTRLGRP_DRAMTIMING1_TRFC_LSB 24 -#define SDR_CTRLGRP_DRAMTIMING1_TRFC_MASK 0xff000000 -#define SDR_CTRLGRP_DRAMTIMING1_TFAW_LSB 18 -#define SDR_CTRLGRP_DRAMTIMING1_TFAW_MASK 0x00fc0000 -#define SDR_CTRLGRP_DRAMTIMING1_TRRD_LSB 14 -#define SDR_CTRLGRP_DRAMTIMING1_TRRD_MASK 0x0003c000 -#define SDR_CTRLGRP_DRAMTIMING1_TCL_LSB 9 -#define SDR_CTRLGRP_DRAMTIMING1_TCL_MASK 0x00003e00 -#define SDR_CTRLGRP_DRAMTIMING1_TAL_LSB 4 -#define SDR_CTRLGRP_DRAMTIMING1_TAL_MASK 0x000001f0 -#define SDR_CTRLGRP_DRAMTIMING1_TCWL_LSB 0 -#define SDR_CTRLGRP_DRAMTIMING1_TCWL_MASK 0x0000000f -/* Register template: sdr::ctrlgrp::dramtiming2 */ -#define SDR_CTRLGRP_DRAMTIMING2_TWTR_LSB 25 -#define SDR_CTRLGRP_DRAMTIMING2_TWTR_MASK 0x1e000000 -#define SDR_CTRLGRP_DRAMTIMING2_TWR_LSB 21 -#define SDR_CTRLGRP_DRAMTIMING2_TWR_MASK 0x01e00000 -#define SDR_CTRLGRP_DRAMTIMING2_TRP_LSB 17 -#define SDR_CTRLGRP_DRAMTIMING2_TRP_MASK 0x001e0000 -#define SDR_CTRLGRP_DRAMTIMING2_TRCD_LSB 13 -#define SDR_CTRLGRP_DRAMTIMING2_TRCD_MASK 0x0001e000 -#define SDR_CTRLGRP_DRAMTIMING2_TREFI_LSB 0 -#define SDR_CTRLGRP_DRAMTIMING2_TREFI_MASK 0x00001fff -/* Register template: sdr::ctrlgrp::dramtiming3 */ -#define SDR_CTRLGRP_DRAMTIMING3_TCCD_LSB 19 -#define SDR_CTRLGRP_DRAMTIMING3_TCCD_MASK 0x00780000 -#define SDR_CTRLGRP_DRAMTIMING3_TMRD_LSB 15 -#define SDR_CTRLGRP_DRAMTIMING3_TMRD_MASK 0x00078000 -#define SDR_CTRLGRP_DRAMTIMING3_TRC_LSB 9 -#define SDR_CTRLGRP_DRAMTIMING3_TRC_MASK 0x00007e00 -#define SDR_CTRLGRP_DRAMTIMING3_TRAS_LSB 4 -#define SDR_CTRLGRP_DRAMTIMING3_TRAS_MASK 0x000001f0 -#define SDR_CTRLGRP_DRAMTIMING3_TRTP_LSB 0 -#define SDR_CTRLGRP_DRAMTIMING3_TRTP_MASK 0x0000000f -/* Register template: sdr::ctrlgrp::dramtiming4 */ -#define SDR_CTRLGRP_DRAMTIMING4_MINPWRSAVECYCLES_LSB 20 -#define SDR_CTRLGRP_DRAMTIMING4_MINPWRSAVECYCLES_MASK 0x00f00000 -#define SDR_CTRLGRP_DRAMTIMING4_PWRDOWNEXIT_LSB 10 -#define SDR_CTRLGRP_DRAMTIMING4_PWRDOWNEXIT_MASK 0x000ffc00 -#define SDR_CTRLGRP_DRAMTIMING4_SELFRFSHEXIT_LSB 0 -#define SDR_CTRLGRP_DRAMTIMING4_SELFRFSHEXIT_MASK 0x000003ff -/* Register template: sdr::ctrlgrp::lowpwrtiming */ -#define SDR_CTRLGRP_LOWPWRTIMING_CLKDISABLECYCLES_LSB 16 -#define SDR_CTRLGRP_LOWPWRTIMING_CLKDISABLECYCLES_MASK 0x000f0000 -#define SDR_CTRLGRP_LOWPWRTIMING_AUTOPDCYCLES_LSB 0 -#define SDR_CTRLGRP_LOWPWRTIMING_AUTOPDCYCLES_MASK 0x0000ffff -/* Register template: sdr::ctrlgrp::dramaddrw */ -#define SDR_CTRLGRP_DRAMADDRW_CSBITS_LSB 13 -#define SDR_CTRLGRP_DRAMADDRW_CSBITS_MASK 0x0000e000 -#define SDR_CTRLGRP_DRAMADDRW_BANKBITS_LSB 10 -#define SDR_CTRLGRP_DRAMADDRW_BANKBITS_MASK 0x00001c00 -#define SDR_CTRLGRP_DRAMADDRW_ROWBITS_LSB 5 -#define SDR_CTRLGRP_DRAMADDRW_ROWBITS_MASK 0x000003e0 -#define SDR_CTRLGRP_DRAMADDRW_COLBITS_LSB 0 -#define SDR_CTRLGRP_DRAMADDRW_COLBITS_MASK 0x0000001f -/* Register template: sdr::ctrlgrp::dramifwidth */ -#define SDR_CTRLGRP_DRAMIFWIDTH_IFWIDTH_LSB 0 -#define SDR_CTRLGRP_DRAMIFWIDTH_IFWIDTH_MASK 0x000000ff -/* Register template: sdr::ctrlgrp::dramdevwidth */ -#define SDR_CTRLGRP_DRAMDEVWIDTH_DEVWIDTH_LSB 0 -#define SDR_CTRLGRP_DRAMDEVWIDTH_DEVWIDTH_MASK 0x0000000f -/* Register template: sdr::ctrlgrp::dramintr */ -#define SDR_CTRLGRP_DRAMINTR_INTREN_LSB 0 -#define SDR_CTRLGRP_DRAMINTR_INTREN_MASK 0x00000001 -#define SDR_CTRLGRP_LOWPWREQ_SELFRFSHMASK_LSB 4 -#define SDR_CTRLGRP_LOWPWREQ_SELFRFSHMASK_MASK 0x00000030 -/* Register template: sdr::ctrlgrp::staticcfg */ -#define SDR_CTRLGRP_STATICCFG_APPLYCFG_LSB 3 -#define SDR_CTRLGRP_STATICCFG_APPLYCFG_MASK 0x00000008 -#define SDR_CTRLGRP_STATICCFG_USEECCASDATA_LSB 2 -#define SDR_CTRLGRP_STATICCFG_USEECCASDATA_MASK 0x00000004 -#define SDR_CTRLGRP_STATICCFG_MEMBL_LSB 0 -#define SDR_CTRLGRP_STATICCFG_MEMBL_MASK 0x00000003 -/* Register template: sdr::ctrlgrp::ctrlwidth */ -#define SDR_CTRLGRP_CTRLWIDTH_CTRLWIDTH_LSB 0 -#define SDR_CTRLGRP_CTRLWIDTH_CTRLWIDTH_MASK 0x00000003 -/* Register template: sdr::ctrlgrp::cportwidth */ -#define SDR_CTRLGRP_CPORTWIDTH_CMDPORTWIDTH_LSB 0 -#define SDR_CTRLGRP_CPORTWIDTH_CMDPORTWIDTH_MASK 0x000fffff -/* Register template: sdr::ctrlgrp::cportwmap */ -#define SDR_CTRLGRP_CPORTWMAP_CPORTWFIFOMAP_LSB 0 -#define SDR_CTRLGRP_CPORTWMAP_CPORTWFIFOMAP_MASK 0x3fffffff -/* Register template: sdr::ctrlgrp::cportrmap */ -#define SDR_CTRLGRP_CPORTRMAP_CPORTRFIFOMAP_LSB 0 -#define SDR_CTRLGRP_CPORTRMAP_CPORTRFIFOMAP_MASK 0x3fffffff -/* Register template: sdr::ctrlgrp::rfifocmap */ -#define SDR_CTRLGRP_RFIFOCMAP_RFIFOCPORTMAP_LSB 0 -#define SDR_CTRLGRP_RFIFOCMAP_RFIFOCPORTMAP_MASK 0x00ffffff -/* Register template: sdr::ctrlgrp::wfifocmap */ -#define SDR_CTRLGRP_WFIFOCMAP_WFIFOCPORTMAP_LSB 0 -#define SDR_CTRLGRP_WFIFOCMAP_WFIFOCPORTMAP_MASK 0x00ffffff -/* Register template: sdr::ctrlgrp::cportrdwr */ -#define SDR_CTRLGRP_CPORTRDWR_CPORTRDWR_LSB 0 -#define SDR_CTRLGRP_CPORTRDWR_CPORTRDWR_MASK 0x000fffff -/* Register template: sdr::ctrlgrp::portcfg */ -#define SDR_CTRLGRP_PORTCFG_AUTOPCHEN_LSB 10 -#define SDR_CTRLGRP_PORTCFG_AUTOPCHEN_MASK 0x000ffc00 -#define SDR_CTRLGRP_PORTCFG_PORTPROTOCOL_LSB 0 -#define SDR_CTRLGRP_PORTCFG_PORTPROTOCOL_MASK 0x000003ff -/* Register template: sdr::ctrlgrp::fifocfg */ -#define SDR_CTRLGRP_FIFOCFG_INCSYNC_LSB 10 -#define SDR_CTRLGRP_FIFOCFG_INCSYNC_MASK 0x00000400 -#define SDR_CTRLGRP_FIFOCFG_SYNCMODE_LSB 0 -#define SDR_CTRLGRP_FIFOCFG_SYNCMODE_MASK 0x000003ff -/* Register template: sdr::ctrlgrp::mppriority */ -#define SDR_CTRLGRP_MPPRIORITY_USERPRIORITY_LSB 0 -#define SDR_CTRLGRP_MPPRIORITY_USERPRIORITY_MASK 0x3fffffff -/* Register template: sdr::ctrlgrp::mpweight::mpweight_0 */ -#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_0_STATICWEIGHT_31_0_LSB 0 -#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_0_STATICWEIGHT_31_0_MASK 0xffffffff -/* Register template: sdr::ctrlgrp::mpweight::mpweight_1 */ -#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_1_SUMOFWEIGHTS_13_0_LSB 18 -#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_1_SUMOFWEIGHTS_13_0_MASK 0xfffc0000 -#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_1_STATICWEIGHT_49_32_LSB 0 -#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_1_STATICWEIGHT_49_32_MASK 0x0003ffff -/* Register template: sdr::ctrlgrp::mpweight::mpweight_2 */ -#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_2_SUMOFWEIGHTS_45_14_LSB 0 -#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_2_SUMOFWEIGHTS_45_14_MASK 0xffffffff -/* Register template: sdr::ctrlgrp::mpweight::mpweight_3 */ -#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_3_SUMOFWEIGHTS_63_46_LSB 0 -#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_3_SUMOFWEIGHTS_63_46_MASK 0x0003ffff -/* Register template: sdr::ctrlgrp::mppacing::mppacing_0 */ -#define SDR_CTRLGRP_MPPACING_MPPACING_0_THRESHOLD1_31_0_LSB 0 -#define SDR_CTRLGRP_MPPACING_MPPACING_0_THRESHOLD1_31_0_MASK 0xffffffff -/* Register template: sdr::ctrlgrp::mppacing::mppacing_1 */ -#define SDR_CTRLGRP_MPPACING_MPPACING_1_THRESHOLD2_3_0_LSB 28 -#define SDR_CTRLGRP_MPPACING_MPPACING_1_THRESHOLD2_3_0_MASK 0xf0000000 -#define SDR_CTRLGRP_MPPACING_MPPACING_1_THRESHOLD1_59_32_LSB 0 -#define SDR_CTRLGRP_MPPACING_MPPACING_1_THRESHOLD1_59_32_MASK 0x0fffffff -/* Register template: sdr::ctrlgrp::mppacing::mppacing_2 */ -#define SDR_CTRLGRP_MPPACING_MPPACING_2_THRESHOLD2_35_4_LSB 0 -#define SDR_CTRLGRP_MPPACING_MPPACING_2_THRESHOLD2_35_4_MASK 0xffffffff -/* Register template: sdr::ctrlgrp::mppacing::mppacing_3 */ -#define SDR_CTRLGRP_MPPACING_MPPACING_3_THRESHOLD2_59_36_LSB 0 -#define SDR_CTRLGRP_MPPACING_MPPACING_3_THRESHOLD2_59_36_MASK 0x00ffffff -/* Register template: sdr::ctrlgrp::mpthresholdrst::mpthresholdrst_0 */ -#define \ -SDR_CTRLGRP_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0_LSB 0 -#define \ -SDR_CTRLGRP_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0_MASK \ -0xffffffff -/* Register template: sdr::ctrlgrp::mpthresholdrst::mpthresholdrst_1 */ -#define \ -SDR_CTRLGRP_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32_LSB 0 -#define \ -SDR_CTRLGRP_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32_MASK \ -0xffffffff -/* Register template: sdr::ctrlgrp::mpthresholdrst::mpthresholdrst_2 */ -#define \ -SDR_CTRLGRP_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64_LSB 0 -#define \ -SDR_CTRLGRP_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64_MASK \ -0x0000ffff -/* Register template: sdr::ctrlgrp::remappriority */ -#define SDR_CTRLGRP_REMAPPRIORITY_PRIORITYREMAP_LSB 0 -#define SDR_CTRLGRP_REMAPPRIORITY_PRIORITYREMAP_MASK 0x000000ff -/* Register template: sdr::ctrlgrp::phyctrl::phyctrl_0 */ -#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_SAMPLECOUNT_19_0_LSB 12 -#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_SAMPLECOUNT_19_0_WIDTH 20 -#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_SAMPLECOUNT_19_0_SET(x) \ - (((x) << 12) & 0xfffff000) -#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_ADDLATSEL_SET(x) \ - (((x) << 10) & 0x00000c00) -#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_DQSLOGICDELAYEN_SET(x) \ - (((x) << 6) & 0x000000c0) -#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_RESETDELAYEN_SET(x) \ - (((x) << 8) & 0x00000100) -#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_LPDDRDIS_SET(x) \ - (((x) << 9) & 0x00000200) -#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_DQSDELAYEN_SET(x) \ - (((x) << 4) & 0x00000030) -#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_DQDELAYEN_SET(x) \ - (((x) << 2) & 0x0000000c) -#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_ACDELAYEN_SET(x) \ - (((x) << 0) & 0x00000003) -/* Register template: sdr::ctrlgrp::phyctrl::phyctrl_1 */ -#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_1_LONGIDLESAMPLECOUNT_19_0_WIDTH 20 -#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_1_LONGIDLESAMPLECOUNT_19_0_SET(x) \ - (((x) << 12) & 0xfffff000) -#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_1_SAMPLECOUNT_31_20_SET(x) \ - (((x) << 0) & 0x00000fff) -/* Register template: sdr::ctrlgrp::phyctrl::phyctrl_2 */ -#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_2_LONGIDLESAMPLECOUNT_31_20_SET(x) \ - (((x) << 0) & 0x00000fff) -/* Register template: sdr::ctrlgrp::dramodt */ -#define SDR_CTRLGRP_DRAMODT_READ_LSB 4 -#define SDR_CTRLGRP_DRAMODT_READ_MASK 0x000000f0 -#define SDR_CTRLGRP_DRAMODT_WRITE_LSB 0 -#define SDR_CTRLGRP_DRAMODT_WRITE_MASK 0x0000000f -/* Field instance: sdr::ctrlgrp::dramsts */ -#define SDR_CTRLGRP_DRAMSTS_DBEERR_MASK 0x00000008 -#define SDR_CTRLGRP_DRAMSTS_SBEERR_MASK 0x00000004 -/* Register template: sdr::ctrlgrp::extratime1 */ -#define SDR_CTRLGRP_EXTRATIME1_RD_TO_WR_LSB 20 -#define SDR_CTRLGRP_EXTRATIME1_RD_TO_WR_BC_LSB 24 -#define SDR_CTRLGRP_EXTRATIME1_RD_TO_WR_DIFF_LSB 28 - -/* SDRAM width macro for configuration with ECC */ -#define SDRAM_WIDTH_32BIT_WITH_ECC 40 -#define SDRAM_WIDTH_16BIT_WITH_ECC 24 +#if defined(CONFIG_TARGET_SOCFPGA_GEN5) +#include <asm/arch/sdram_gen5.h> +#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) +#include <asm/arch/sdram_arria10.h> +#endif #endif #endif /* _SDRAM_H_ */ diff --git a/arch/arm/mach-socfpga/include/mach/sdram_arria10.h b/arch/arm/mach-socfpga/include/mach/sdram_arria10.h index 8ae8d1bc962..25b82fb2858 100644 --- a/arch/arm/mach-socfpga/include/mach/sdram_arria10.h +++ b/arch/arm/mach-socfpga/include/mach/sdram_arria10.h @@ -7,6 +7,7 @@ #define _SOCFPGA_SDRAM_ARRIA10_H_ #ifndef __ASSEMBLY__ +int ddr_calibration_sequence(void); struct socfpga_ecc_hmc { u32 ip_rev_id; @@ -203,6 +204,7 @@ struct socfpga_io48_mmr { u32 niosreserve1; u32 niosreserve2; }; + #endif /*__ASSEMBLY__*/ #define IO48_MMR_CTRLCFG0_DB2_BURST_LENGTH_MASK 0x1F000000 diff --git a/arch/arm/mach-socfpga/include/mach/sdram_gen5.h b/arch/arm/mach-socfpga/include/mach/sdram_gen5.h new file mode 100644 index 00000000000..a238d5d17fe --- /dev/null +++ b/arch/arm/mach-socfpga/include/mach/sdram_gen5.h @@ -0,0 +1,441 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright Altera Corporation (C) 2014-2015 + */ +#ifndef _SOCFPGA_SDRAM_GEN5_H_ +#define _SOCFPGA_SDRAM_GEN5_H_ + +#ifndef __ASSEMBLY__ + +unsigned long sdram_calculate_size(void); +int sdram_mmr_init_full(unsigned int sdr_phy_reg); +int sdram_calibration_full(void); + +const struct socfpga_sdram_config *socfpga_get_sdram_config(void); + +void socfpga_get_seq_ac_init(const u32 **init, unsigned int *nelem); +void socfpga_get_seq_inst_init(const u32 **init, unsigned int *nelem); +const struct socfpga_sdram_rw_mgr_config *socfpga_get_sdram_rwmgr_config(void); +const struct socfpga_sdram_io_config *socfpga_get_sdram_io_config(void); +const struct socfpga_sdram_misc_config *socfpga_get_sdram_misc_config(void); + +#define SDR_CTRLGRP_ADDRESS (SOCFPGA_SDR_ADDRESS | 0x5000) + +struct socfpga_sdr_ctrl { + u32 ctrl_cfg; + u32 dram_timing1; + u32 dram_timing2; + u32 dram_timing3; + u32 dram_timing4; /* 0x10 */ + u32 lowpwr_timing; + u32 dram_odt; + u32 extratime1; + u32 __padding0[3]; + u32 dram_addrw; /* 0x2c */ + u32 dram_if_width; /* 0x30 */ + u32 dram_dev_width; + u32 dram_sts; + u32 dram_intr; + u32 sbe_count; /* 0x40 */ + u32 dbe_count; + u32 err_addr; + u32 drop_count; + u32 drop_addr; /* 0x50 */ + u32 lowpwr_eq; + u32 lowpwr_ack; + u32 static_cfg; + u32 ctrl_width; /* 0x60 */ + u32 cport_width; + u32 cport_wmap; + u32 cport_rmap; + u32 rfifo_cmap; /* 0x70 */ + u32 wfifo_cmap; + u32 cport_rdwr; + u32 port_cfg; + u32 fpgaport_rst; /* 0x80 */ + u32 __padding1; + u32 fifo_cfg; + u32 protport_default; + u32 prot_rule_addr; /* 0x90 */ + u32 prot_rule_id; + u32 prot_rule_data; + u32 prot_rule_rdwr; + u32 __padding2[3]; + u32 mp_priority; /* 0xac */ + u32 mp_weight0; /* 0xb0 */ + u32 mp_weight1; + u32 mp_weight2; + u32 mp_weight3; + u32 mp_pacing0; /* 0xc0 */ + u32 mp_pacing1; + u32 mp_pacing2; + u32 mp_pacing3; + u32 mp_threshold0; /* 0xd0 */ + u32 mp_threshold1; + u32 mp_threshold2; + u32 __padding3[29]; + u32 phy_ctrl0; /* 0x150 */ + u32 phy_ctrl1; + u32 phy_ctrl2; +}; + +/* SDRAM configuration structure for the SPL. */ +struct socfpga_sdram_config { + u32 ctrl_cfg; + u32 dram_timing1; + u32 dram_timing2; + u32 dram_timing3; + u32 dram_timing4; + u32 lowpwr_timing; + u32 dram_odt; + u32 extratime1; + u32 dram_addrw; + u32 dram_if_width; + u32 dram_dev_width; + u32 dram_intr; + u32 lowpwr_eq; + u32 static_cfg; + u32 ctrl_width; + u32 cport_width; + u32 cport_wmap; + u32 cport_rmap; + u32 rfifo_cmap; + u32 wfifo_cmap; + u32 cport_rdwr; + u32 port_cfg; + u32 fpgaport_rst; + u32 fifo_cfg; + u32 mp_priority; + u32 mp_weight0; + u32 mp_weight1; + u32 mp_weight2; + u32 mp_weight3; + u32 mp_pacing0; + u32 mp_pacing1; + u32 mp_pacing2; + u32 mp_pacing3; + u32 mp_threshold0; + u32 mp_threshold1; + u32 mp_threshold2; + u32 phy_ctrl0; +}; + +struct socfpga_sdram_rw_mgr_config { + u8 activate_0_and_1; + u8 activate_0_and_1_wait1; + u8 activate_0_and_1_wait2; + u8 activate_1; + u8 clear_dqs_enable; + u8 guaranteed_read; + u8 guaranteed_read_cont; + u8 guaranteed_write; + u8 guaranteed_write_wait0; + u8 guaranteed_write_wait1; + u8 guaranteed_write_wait2; + u8 guaranteed_write_wait3; + u8 idle; + u8 idle_loop1; + u8 idle_loop2; + u8 init_reset_0_cke_0; + u8 init_reset_1_cke_0; + u8 lfsr_wr_rd_bank_0; + u8 lfsr_wr_rd_bank_0_data; + u8 lfsr_wr_rd_bank_0_dqs; + u8 lfsr_wr_rd_bank_0_nop; + u8 lfsr_wr_rd_bank_0_wait; + u8 lfsr_wr_rd_bank_0_wl_1; + u8 lfsr_wr_rd_dm_bank_0; + u8 lfsr_wr_rd_dm_bank_0_data; + u8 lfsr_wr_rd_dm_bank_0_dqs; + u8 lfsr_wr_rd_dm_bank_0_nop; + u8 lfsr_wr_rd_dm_bank_0_wait; + u8 lfsr_wr_rd_dm_bank_0_wl_1; + u8 mrs0_dll_reset; + u8 mrs0_dll_reset_mirr; + u8 mrs0_user; + u8 mrs0_user_mirr; + u8 mrs1; + u8 mrs1_mirr; + u8 mrs2; + u8 mrs2_mirr; + u8 mrs3; + u8 mrs3_mirr; + u8 precharge_all; + u8 read_b2b; + u8 read_b2b_wait1; + u8 read_b2b_wait2; + u8 refresh_all; + u8 rreturn; + u8 sgle_read; + u8 zqcl; + + u8 true_mem_data_mask_width; + u8 mem_address_mirroring; + u8 mem_data_mask_width; + u8 mem_data_width; + u8 mem_dq_per_read_dqs; + u8 mem_dq_per_write_dqs; + u8 mem_if_read_dqs_width; + u8 mem_if_write_dqs_width; + u8 mem_number_of_cs_per_dimm; + u8 mem_number_of_ranks; + u8 mem_virtual_groups_per_read_dqs; + u8 mem_virtual_groups_per_write_dqs; +}; + +struct socfpga_sdram_io_config { + u16 delay_per_opa_tap; + u8 delay_per_dchain_tap; + u8 delay_per_dqs_en_dchain_tap; + u8 dll_chain_length; + u8 dqdqs_out_phase_max; + u8 dqs_en_delay_max; + u8 dqs_en_delay_offset; + u8 dqs_en_phase_max; + u8 dqs_in_delay_max; + u8 dqs_in_reserve; + u8 dqs_out_reserve; + u8 io_in_delay_max; + u8 io_out1_delay_max; + u8 io_out2_delay_max; + u8 shift_dqs_en_when_shift_dqs; +}; + +struct socfpga_sdram_misc_config { + u32 reg_file_init_seq_signature; + u8 afi_rate_ratio; + u8 calib_lfifo_offset; + u8 calib_vfifo_offset; + u8 enable_super_quick_calibration; + u8 max_latency_count_width; + u8 read_valid_fifo_size; + u8 tinit_cntr0_val; + u8 tinit_cntr1_val; + u8 tinit_cntr2_val; + u8 treset_cntr0_val; + u8 treset_cntr1_val; + u8 treset_cntr2_val; +}; + +#define SDR_CTRLGRP_CTRLCFG_NODMPINS_LSB 23 +#define SDR_CTRLGRP_CTRLCFG_NODMPINS_MASK 0x00800000 +#define SDR_CTRLGRP_CTRLCFG_DQSTRKEN_LSB 22 +#define SDR_CTRLGRP_CTRLCFG_DQSTRKEN_MASK 0x00400000 +#define SDR_CTRLGRP_CTRLCFG_STARVELIMIT_LSB 16 +#define SDR_CTRLGRP_CTRLCFG_STARVELIMIT_MASK 0x003f0000 +#define SDR_CTRLGRP_CTRLCFG_REORDEREN_LSB 15 +#define SDR_CTRLGRP_CTRLCFG_REORDEREN_MASK 0x00008000 +#define SDR_CTRLGRP_CTRLCFG_ECCCORREN_LSB 11 +#define SDR_CTRLGRP_CTRLCFG_ECCCORREN_MASK 0x00000800 +#define SDR_CTRLGRP_CTRLCFG_ECCEN_LSB 10 +#define SDR_CTRLGRP_CTRLCFG_ECCEN_MASK 0x00000400 +#define SDR_CTRLGRP_CTRLCFG_ADDRORDER_LSB 8 +#define SDR_CTRLGRP_CTRLCFG_ADDRORDER_MASK 0x00000300 +#define SDR_CTRLGRP_CTRLCFG_MEMBL_LSB 3 +#define SDR_CTRLGRP_CTRLCFG_MEMBL_MASK 0x000000f8 +#define SDR_CTRLGRP_CTRLCFG_MEMTYPE_LSB 0 +#define SDR_CTRLGRP_CTRLCFG_MEMTYPE_MASK 0x00000007 +/* Register template: sdr::ctrlgrp::dramtiming1 */ +#define SDR_CTRLGRP_DRAMTIMING1_TRFC_LSB 24 +#define SDR_CTRLGRP_DRAMTIMING1_TRFC_MASK 0xff000000 +#define SDR_CTRLGRP_DRAMTIMING1_TFAW_LSB 18 +#define SDR_CTRLGRP_DRAMTIMING1_TFAW_MASK 0x00fc0000 +#define SDR_CTRLGRP_DRAMTIMING1_TRRD_LSB 14 +#define SDR_CTRLGRP_DRAMTIMING1_TRRD_MASK 0x0003c000 +#define SDR_CTRLGRP_DRAMTIMING1_TCL_LSB 9 +#define SDR_CTRLGRP_DRAMTIMING1_TCL_MASK 0x00003e00 +#define SDR_CTRLGRP_DRAMTIMING1_TAL_LSB 4 +#define SDR_CTRLGRP_DRAMTIMING1_TAL_MASK 0x000001f0 +#define SDR_CTRLGRP_DRAMTIMING1_TCWL_LSB 0 +#define SDR_CTRLGRP_DRAMTIMING1_TCWL_MASK 0x0000000f +/* Register template: sdr::ctrlgrp::dramtiming2 */ +#define SDR_CTRLGRP_DRAMTIMING2_TWTR_LSB 25 +#define SDR_CTRLGRP_DRAMTIMING2_TWTR_MASK 0x1e000000 +#define SDR_CTRLGRP_DRAMTIMING2_TWR_LSB 21 +#define SDR_CTRLGRP_DRAMTIMING2_TWR_MASK 0x01e00000 +#define SDR_CTRLGRP_DRAMTIMING2_TRP_LSB 17 +#define SDR_CTRLGRP_DRAMTIMING2_TRP_MASK 0x001e0000 +#define SDR_CTRLGRP_DRAMTIMING2_TRCD_LSB 13 +#define SDR_CTRLGRP_DRAMTIMING2_TRCD_MASK 0x0001e000 +#define SDR_CTRLGRP_DRAMTIMING2_TREFI_LSB 0 +#define SDR_CTRLGRP_DRAMTIMING2_TREFI_MASK 0x00001fff +/* Register template: sdr::ctrlgrp::dramtiming3 */ +#define SDR_CTRLGRP_DRAMTIMING3_TCCD_LSB 19 +#define SDR_CTRLGRP_DRAMTIMING3_TCCD_MASK 0x00780000 +#define SDR_CTRLGRP_DRAMTIMING3_TMRD_LSB 15 +#define SDR_CTRLGRP_DRAMTIMING3_TMRD_MASK 0x00078000 +#define SDR_CTRLGRP_DRAMTIMING3_TRC_LSB 9 +#define SDR_CTRLGRP_DRAMTIMING3_TRC_MASK 0x00007e00 +#define SDR_CTRLGRP_DRAMTIMING3_TRAS_LSB 4 +#define SDR_CTRLGRP_DRAMTIMING3_TRAS_MASK 0x000001f0 +#define SDR_CTRLGRP_DRAMTIMING3_TRTP_LSB 0 +#define SDR_CTRLGRP_DRAMTIMING3_TRTP_MASK 0x0000000f +/* Register template: sdr::ctrlgrp::dramtiming4 */ +#define SDR_CTRLGRP_DRAMTIMING4_MINPWRSAVECYCLES_LSB 20 +#define SDR_CTRLGRP_DRAMTIMING4_MINPWRSAVECYCLES_MASK 0x00f00000 +#define SDR_CTRLGRP_DRAMTIMING4_PWRDOWNEXIT_LSB 10 +#define SDR_CTRLGRP_DRAMTIMING4_PWRDOWNEXIT_MASK 0x000ffc00 +#define SDR_CTRLGRP_DRAMTIMING4_SELFRFSHEXIT_LSB 0 +#define SDR_CTRLGRP_DRAMTIMING4_SELFRFSHEXIT_MASK 0x000003ff +/* Register template: sdr::ctrlgrp::lowpwrtiming */ +#define SDR_CTRLGRP_LOWPWRTIMING_CLKDISABLECYCLES_LSB 16 +#define SDR_CTRLGRP_LOWPWRTIMING_CLKDISABLECYCLES_MASK 0x000f0000 +#define SDR_CTRLGRP_LOWPWRTIMING_AUTOPDCYCLES_LSB 0 +#define SDR_CTRLGRP_LOWPWRTIMING_AUTOPDCYCLES_MASK 0x0000ffff +/* Register template: sdr::ctrlgrp::dramaddrw */ +#define SDR_CTRLGRP_DRAMADDRW_CSBITS_LSB 13 +#define SDR_CTRLGRP_DRAMADDRW_CSBITS_MASK 0x0000e000 +#define SDR_CTRLGRP_DRAMADDRW_BANKBITS_LSB 10 +#define SDR_CTRLGRP_DRAMADDRW_BANKBITS_MASK 0x00001c00 +#define SDR_CTRLGRP_DRAMADDRW_ROWBITS_LSB 5 +#define SDR_CTRLGRP_DRAMADDRW_ROWBITS_MASK 0x000003e0 +#define SDR_CTRLGRP_DRAMADDRW_COLBITS_LSB 0 +#define SDR_CTRLGRP_DRAMADDRW_COLBITS_MASK 0x0000001f +/* Register template: sdr::ctrlgrp::dramifwidth */ +#define SDR_CTRLGRP_DRAMIFWIDTH_IFWIDTH_LSB 0 +#define SDR_CTRLGRP_DRAMIFWIDTH_IFWIDTH_MASK 0x000000ff +/* Register template: sdr::ctrlgrp::dramdevwidth */ +#define SDR_CTRLGRP_DRAMDEVWIDTH_DEVWIDTH_LSB 0 +#define SDR_CTRLGRP_DRAMDEVWIDTH_DEVWIDTH_MASK 0x0000000f +/* Register template: sdr::ctrlgrp::dramintr */ +#define SDR_CTRLGRP_DRAMINTR_INTREN_LSB 0 +#define SDR_CTRLGRP_DRAMINTR_INTREN_MASK 0x00000001 +#define SDR_CTRLGRP_LOWPWREQ_SELFRFSHMASK_LSB 4 +#define SDR_CTRLGRP_LOWPWREQ_SELFRFSHMASK_MASK 0x00000030 +/* Register template: sdr::ctrlgrp::staticcfg */ +#define SDR_CTRLGRP_STATICCFG_APPLYCFG_LSB 3 +#define SDR_CTRLGRP_STATICCFG_APPLYCFG_MASK 0x00000008 +#define SDR_CTRLGRP_STATICCFG_USEECCASDATA_LSB 2 +#define SDR_CTRLGRP_STATICCFG_USEECCASDATA_MASK 0x00000004 +#define SDR_CTRLGRP_STATICCFG_MEMBL_LSB 0 +#define SDR_CTRLGRP_STATICCFG_MEMBL_MASK 0x00000003 +/* Register template: sdr::ctrlgrp::ctrlwidth */ +#define SDR_CTRLGRP_CTRLWIDTH_CTRLWIDTH_LSB 0 +#define SDR_CTRLGRP_CTRLWIDTH_CTRLWIDTH_MASK 0x00000003 +/* Register template: sdr::ctrlgrp::cportwidth */ +#define SDR_CTRLGRP_CPORTWIDTH_CMDPORTWIDTH_LSB 0 +#define SDR_CTRLGRP_CPORTWIDTH_CMDPORTWIDTH_MASK 0x000fffff +/* Register template: sdr::ctrlgrp::cportwmap */ +#define SDR_CTRLGRP_CPORTWMAP_CPORTWFIFOMAP_LSB 0 +#define SDR_CTRLGRP_CPORTWMAP_CPORTWFIFOMAP_MASK 0x3fffffff +/* Register template: sdr::ctrlgrp::cportrmap */ +#define SDR_CTRLGRP_CPORTRMAP_CPORTRFIFOMAP_LSB 0 +#define SDR_CTRLGRP_CPORTRMAP_CPORTRFIFOMAP_MASK 0x3fffffff +/* Register template: sdr::ctrlgrp::rfifocmap */ +#define SDR_CTRLGRP_RFIFOCMAP_RFIFOCPORTMAP_LSB 0 +#define SDR_CTRLGRP_RFIFOCMAP_RFIFOCPORTMAP_MASK 0x00ffffff +/* Register template: sdr::ctrlgrp::wfifocmap */ +#define SDR_CTRLGRP_WFIFOCMAP_WFIFOCPORTMAP_LSB 0 +#define SDR_CTRLGRP_WFIFOCMAP_WFIFOCPORTMAP_MASK 0x00ffffff +/* Register template: sdr::ctrlgrp::cportrdwr */ +#define SDR_CTRLGRP_CPORTRDWR_CPORTRDWR_LSB 0 +#define SDR_CTRLGRP_CPORTRDWR_CPORTRDWR_MASK 0x000fffff +/* Register template: sdr::ctrlgrp::portcfg */ +#define SDR_CTRLGRP_PORTCFG_AUTOPCHEN_LSB 10 +#define SDR_CTRLGRP_PORTCFG_AUTOPCHEN_MASK 0x000ffc00 +#define SDR_CTRLGRP_PORTCFG_PORTPROTOCOL_LSB 0 +#define SDR_CTRLGRP_PORTCFG_PORTPROTOCOL_MASK 0x000003ff +/* Register template: sdr::ctrlgrp::fifocfg */ +#define SDR_CTRLGRP_FIFOCFG_INCSYNC_LSB 10 +#define SDR_CTRLGRP_FIFOCFG_INCSYNC_MASK 0x00000400 +#define SDR_CTRLGRP_FIFOCFG_SYNCMODE_LSB 0 +#define SDR_CTRLGRP_FIFOCFG_SYNCMODE_MASK 0x000003ff +/* Register template: sdr::ctrlgrp::mppriority */ +#define SDR_CTRLGRP_MPPRIORITY_USERPRIORITY_LSB 0 +#define SDR_CTRLGRP_MPPRIORITY_USERPRIORITY_MASK 0x3fffffff +/* Register template: sdr::ctrlgrp::mpweight::mpweight_0 */ +#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_0_STATICWEIGHT_31_0_LSB 0 +#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_0_STATICWEIGHT_31_0_MASK 0xffffffff +/* Register template: sdr::ctrlgrp::mpweight::mpweight_1 */ +#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_1_SUMOFWEIGHTS_13_0_LSB 18 +#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_1_SUMOFWEIGHTS_13_0_MASK 0xfffc0000 +#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_1_STATICWEIGHT_49_32_LSB 0 +#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_1_STATICWEIGHT_49_32_MASK 0x0003ffff +/* Register template: sdr::ctrlgrp::mpweight::mpweight_2 */ +#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_2_SUMOFWEIGHTS_45_14_LSB 0 +#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_2_SUMOFWEIGHTS_45_14_MASK 0xffffffff +/* Register template: sdr::ctrlgrp::mpweight::mpweight_3 */ +#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_3_SUMOFWEIGHTS_63_46_LSB 0 +#define SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_3_SUMOFWEIGHTS_63_46_MASK 0x0003ffff +/* Register template: sdr::ctrlgrp::mppacing::mppacing_0 */ +#define SDR_CTRLGRP_MPPACING_MPPACING_0_THRESHOLD1_31_0_LSB 0 +#define SDR_CTRLGRP_MPPACING_MPPACING_0_THRESHOLD1_31_0_MASK 0xffffffff +/* Register template: sdr::ctrlgrp::mppacing::mppacing_1 */ +#define SDR_CTRLGRP_MPPACING_MPPACING_1_THRESHOLD2_3_0_LSB 28 +#define SDR_CTRLGRP_MPPACING_MPPACING_1_THRESHOLD2_3_0_MASK 0xf0000000 +#define SDR_CTRLGRP_MPPACING_MPPACING_1_THRESHOLD1_59_32_LSB 0 +#define SDR_CTRLGRP_MPPACING_MPPACING_1_THRESHOLD1_59_32_MASK 0x0fffffff +/* Register template: sdr::ctrlgrp::mppacing::mppacing_2 */ +#define SDR_CTRLGRP_MPPACING_MPPACING_2_THRESHOLD2_35_4_LSB 0 +#define SDR_CTRLGRP_MPPACING_MPPACING_2_THRESHOLD2_35_4_MASK 0xffffffff +/* Register template: sdr::ctrlgrp::mppacing::mppacing_3 */ +#define SDR_CTRLGRP_MPPACING_MPPACING_3_THRESHOLD2_59_36_LSB 0 +#define SDR_CTRLGRP_MPPACING_MPPACING_3_THRESHOLD2_59_36_MASK 0x00ffffff +/* Register template: sdr::ctrlgrp::mpthresholdrst::mpthresholdrst_0 */ +#define \ +SDR_CTRLGRP_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0_LSB 0 +#define \ +SDR_CTRLGRP_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0_MASK \ +0xffffffff +/* Register template: sdr::ctrlgrp::mpthresholdrst::mpthresholdrst_1 */ +#define \ +SDR_CTRLGRP_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32_LSB 0 +#define \ +SDR_CTRLGRP_MPTHRESHOLDRST_1_THRESHOLDRSTCYCLES_63_32_MASK \ +0xffffffff +/* Register template: sdr::ctrlgrp::mpthresholdrst::mpthresholdrst_2 */ +#define \ +SDR_CTRLGRP_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64_LSB 0 +#define \ +SDR_CTRLGRP_MPTHRESHOLDRST_2_THRESHOLDRSTCYCLES_79_64_MASK \ +0x0000ffff +/* Register template: sdr::ctrlgrp::remappriority */ +#define SDR_CTRLGRP_REMAPPRIORITY_PRIORITYREMAP_LSB 0 +#define SDR_CTRLGRP_REMAPPRIORITY_PRIORITYREMAP_MASK 0x000000ff +/* Register template: sdr::ctrlgrp::phyctrl::phyctrl_0 */ +#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_SAMPLECOUNT_19_0_LSB 12 +#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_SAMPLECOUNT_19_0_WIDTH 20 +#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_SAMPLECOUNT_19_0_SET(x) \ + (((x) << 12) & 0xfffff000) +#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_ADDLATSEL_SET(x) \ + (((x) << 10) & 0x00000c00) +#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_DQSLOGICDELAYEN_SET(x) \ + (((x) << 6) & 0x000000c0) +#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_RESETDELAYEN_SET(x) \ + (((x) << 8) & 0x00000100) +#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_LPDDRDIS_SET(x) \ + (((x) << 9) & 0x00000200) +#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_DQSDELAYEN_SET(x) \ + (((x) << 4) & 0x00000030) +#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_DQDELAYEN_SET(x) \ + (((x) << 2) & 0x0000000c) +#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_ACDELAYEN_SET(x) \ + (((x) << 0) & 0x00000003) +/* Register template: sdr::ctrlgrp::phyctrl::phyctrl_1 */ +#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_1_LONGIDLESAMPLECOUNT_19_0_WIDTH 20 +#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_1_LONGIDLESAMPLECOUNT_19_0_SET(x) \ + (((x) << 12) & 0xfffff000) +#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_1_SAMPLECOUNT_31_20_SET(x) \ + (((x) << 0) & 0x00000fff) +/* Register template: sdr::ctrlgrp::phyctrl::phyctrl_2 */ +#define SDR_CTRLGRP_PHYCTRL_PHYCTRL_2_LONGIDLESAMPLECOUNT_31_20_SET(x) \ + (((x) << 0) & 0x00000fff) +/* Register template: sdr::ctrlgrp::dramodt */ +#define SDR_CTRLGRP_DRAMODT_READ_LSB 4 +#define SDR_CTRLGRP_DRAMODT_READ_MASK 0x000000f0 +#define SDR_CTRLGRP_DRAMODT_WRITE_LSB 0 +#define SDR_CTRLGRP_DRAMODT_WRITE_MASK 0x0000000f +/* Field instance: sdr::ctrlgrp::dramsts */ +#define SDR_CTRLGRP_DRAMSTS_DBEERR_MASK 0x00000008 +#define SDR_CTRLGRP_DRAMSTS_SBEERR_MASK 0x00000004 +/* Register template: sdr::ctrlgrp::extratime1 */ +#define SDR_CTRLGRP_EXTRATIME1_RD_TO_WR_LSB 20 +#define SDR_CTRLGRP_EXTRATIME1_RD_TO_WR_BC_LSB 24 +#define SDR_CTRLGRP_EXTRATIME1_RD_TO_WR_DIFF_LSB 28 + +/* SDRAM width macro for configuration with ECC */ +#define SDRAM_WIDTH_32BIT_WITH_ECC 40 +#define SDRAM_WIDTH_16BIT_WITH_ECC 24 + +#endif +#endif /* _SOCFPGA_SDRAM_GEN5_H_ */ diff --git a/arch/arm/mach-socfpga/include/mach/system_manager.h b/arch/arm/mach-socfpga/include/mach/system_manager.h index fbe2a8be289..7e76df74b7f 100644 --- a/arch/arm/mach-socfpga/include/mach/system_manager.h +++ b/arch/arm/mach-socfpga/include/mach/system_manager.h @@ -6,6 +6,9 @@ #ifndef _SYSTEM_MANAGER_H_ #define _SYSTEM_MANAGER_H_ +#if defined(CONFIG_TARGET_SOCFPGA_STRATIX10) +#include <asm/arch/system_manager_s10.h> +#else #define SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGPINMUX BIT(0) #define SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGIO BIT(1) #define SYSMGR_ECC_OCRAM_EN BIT(0) @@ -88,5 +91,5 @@ #define SYSMGR_GET_BOOTINFO_BSEL(bsel) \ (((bsel) >> SYSMGR_BOOTINFO_BSEL_SHIFT) & 7) - +#endif #endif /* _SYSTEM_MANAGER_H_ */ diff --git a/arch/arm/mach-socfpga/include/mach/system_manager_s10.h b/arch/arm/mach-socfpga/include/mach/system_manager_s10.h new file mode 100644 index 00000000000..813dff2153b --- /dev/null +++ b/arch/arm/mach-socfpga/include/mach/system_manager_s10.h @@ -0,0 +1,176 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * Copyright (C) 2016-2018 Intel Corporation <www.intel.com> + * + */ + +#ifndef _SYSTEM_MANAGER_S10_ +#define _SYSTEM_MANAGER_S10_ + +void sysmgr_pinmux_init(void); +void populate_sysmgr_fpgaintf_module(void); +void populate_sysmgr_pinmux(void); +void sysmgr_pinmux_table_sel(const u32 **table, unsigned int *table_len); +void sysmgr_pinmux_table_ctrl(const u32 **table, unsigned int *table_len); +void sysmgr_pinmux_table_fpga(const u32 **table, unsigned int *table_len); +void sysmgr_pinmux_table_delay(const u32 **table, unsigned int *table_len); + +struct socfpga_system_manager { + /* System Manager Module */ + u32 siliconid1; /* 0x00 */ + u32 siliconid2; + u32 wddbg; + u32 _pad_0xc; + u32 mpu_status; /* 0x10 */ + u32 mpu_ace; + u32 _pad_0x18_0x1c[2]; + u32 dma; /* 0x20 */ + u32 dma_periph; + /* SDMMC Controller Group */ + u32 sdmmcgrp_ctrl; + u32 sdmmcgrp_l3master; + /* NAND Flash Controller Register Group */ + u32 nandgrp_bootstrap; /* 0x30 */ + u32 nandgrp_l3master; + /* USB Controller Group */ + u32 usb0_l3master; + u32 usb1_l3master; + /* EMAC Group */ + u32 emac_gbl; /* 0x40 */ + u32 emac0; + u32 emac1; + u32 emac2; + u32 emac0_ace; /* 0x50 */ + u32 emac1_ace; + u32 emac2_ace; + u32 nand_axuser; + u32 _pad_0x60_0x64[2]; /* 0x60 */ + /* FPGA interface Group */ + u32 fpgaintf_en_1; + u32 fpgaintf_en_2; + u32 fpgaintf_en_3; /* 0x70 */ + u32 dma_l3master; + u32 etr_l3master; + u32 _pad_0x7c; + u32 sec_ctrl_slt; /* 0x80 */ + u32 osc_trim; + u32 _pad_0x88_0x8c[2]; + /* ECC Group */ + u32 ecc_intmask_value; /* 0x90 */ + u32 ecc_intmask_set; + u32 ecc_intmask_clr; + u32 ecc_intstatus_serr; + u32 ecc_intstatus_derr; /* 0xa0 */ + u32 _pad_0xa4_0xac[3]; + u32 noc_addr_remap; /* 0xb0 */ + u32 hmc_clk; + u32 io_pa_ctrl; + u32 _pad_0xbc; + /* NOC Group */ + u32 noc_timeout; /* 0xc0 */ + u32 noc_idlereq_set; + u32 noc_idlereq_clr; + u32 noc_idlereq_value; + u32 noc_idleack; /* 0xd0 */ + u32 noc_idlestatus; + u32 fpga2soc_ctrl; + u32 fpga_config; + u32 iocsrclk_gate; /* 0xe0 */ + u32 gpo; + u32 gpi; + u32 _pad_0xec; + u32 mpu; /* 0xf0 */ + u32 sdm_hps_spare; + u32 hps_sdm_spare; + u32 _pad_0xfc_0x1fc[65]; + /* Boot scratch register group */ + u32 boot_scratch_cold0; /* 0x200 */ + u32 boot_scratch_cold1; + u32 boot_scratch_cold2; + u32 boot_scratch_cold3; + u32 boot_scratch_cold4; /* 0x210 */ + u32 boot_scratch_cold5; + u32 boot_scratch_cold6; + u32 boot_scratch_cold7; + u32 boot_scratch_cold8; /* 0x220 */ + u32 boot_scratch_cold9; + u32 _pad_0x228_0xffc[886]; + /* Pin select and pin control group */ + u32 pinsel0[40]; /* 0x1000 */ + u32 _pad_0x10a0_0x10fc[24]; + u32 pinsel40[8]; + u32 _pad_0x1120_0x112c[4]; + u32 ioctrl0[28]; + u32 _pad_0x11a0_0x11fc[24]; + u32 ioctrl28[20]; + u32 _pad_0x1250_0x12fc[44]; + /* Use FPGA mux */ + u32 rgmii0usefpga; /* 0x1300 */ + u32 rgmii1usefpga; + u32 rgmii2usefpga; + u32 i2c0usefpga; + u32 i2c1usefpga; + u32 i2c_emac0_usefpga; + u32 i2c_emac1_usefpga; + u32 i2c_emac2_usefpga; + u32 nandusefpga; + u32 _pad_0x1324; + u32 spim0usefpga; + u32 spim1usefpga; + u32 spis0usefpga; + u32 spis1usefpga; + u32 uart0usefpga; + u32 uart1usefpga; + u32 mdio0usefpga; + u32 mdio1usefpga; + u32 mdio2usefpga; + u32 _pad_0x134c; + u32 jtagusefpga; + u32 sdmmcusefpga; + u32 hps_osc_clk; + u32 _pad_0x135c_0x13fc[41]; + u32 iodelay0[40]; + u32 _pad_0x14a0_0x14fc[24]; + u32 iodelay40[8]; + +}; + +#define SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGPINMUX BIT(0) +#define SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGIO BIT(1) +#define SYSMGR_ECC_OCRAM_EN BIT(0) +#define SYSMGR_ECC_OCRAM_SERR BIT(3) +#define SYSMGR_ECC_OCRAM_DERR BIT(4) +#define SYSMGR_FPGAINTF_USEFPGA 0x1 + +#define SYSMGR_FPGAINTF_NAND BIT(4) +#define SYSMGR_FPGAINTF_SDMMC BIT(8) +#define SYSMGR_FPGAINTF_SPIM0 BIT(16) +#define SYSMGR_FPGAINTF_SPIM1 BIT(24) +#define SYSMGR_FPGAINTF_EMAC0 (0x11 << 0) +#define SYSMGR_FPGAINTF_EMAC1 (0x11 << 8) +#define SYSMGR_FPGAINTF_EMAC2 (0x11 << 16) + +#define SYSMGR_SDMMC_SMPLSEL_SHIFT 4 +#define SYSMGR_SDMMC_DRVSEL_SHIFT 0 + +/* EMAC Group Bit definitions */ +#define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII 0x0 +#define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII 0x1 +#define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RMII 0x2 + +#define SYSMGR_EMACGRP_CTRL_PHYSEL0_LSB 0 +#define SYSMGR_EMACGRP_CTRL_PHYSEL1_LSB 2 +#define SYSMGR_EMACGRP_CTRL_PHYSEL_MASK 0x3 + +#define SYSMGR_NOC_H2F_MSK 0x00000001 +#define SYSMGR_NOC_LWH2F_MSK 0x00000010 +#define SYSMGR_HMC_CLK_STATUS_MSK 0x00000001 + +#define SYSMGR_DMA_IRQ_NS 0xFF000000 +#define SYSMGR_DMA_MGR_NS 0x00010000 + +#define SYSMGR_DMAPERIPH_ALL_NS 0xFFFFFFFF + +#define SYSMGR_WDDBG_PAUSE_ALL_CPU 0x0F0F0F0F + +#endif /* _SYSTEM_MANAGER_S10_ */ diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c index 5c27f1984ef..fca86507f18 100644 --- a/arch/arm/mach-socfpga/misc.c +++ b/arch/arm/mach-socfpga/misc.c @@ -22,8 +22,10 @@ DECLARE_GLOBAL_DATA_PTR; +#ifdef CONFIG_SYS_L2_PL310 static const struct pl310_regs *const pl310 = (struct pl310_regs *)CONFIG_SYS_PL310_BASE; +#endif struct bsel bsel_str[] = { { "rsvd", "Reserved", }, @@ -52,6 +54,7 @@ void enable_caches(void) #endif } +#ifdef CONFIG_SYS_L2_PL310 void v7_outer_cache_enable(void) { /* Disable the L2 cache */ @@ -72,6 +75,7 @@ void v7_outer_cache_disable(void) /* Disable the L2 cache */ clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); } +#endif #if defined(CONFIG_SYS_CONSOLE_IS_IN_ENV) && \ defined(CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE) @@ -135,3 +139,68 @@ int arch_cpu_init(void) return 0; } + +#ifdef CONFIG_ETH_DESIGNWARE +static int dwmac_phymode_to_modereg(const char *phymode, u32 *modereg) +{ + if (!phymode) + return -EINVAL; + + if (!strcmp(phymode, "mii") || !strcmp(phymode, "gmii")) { + *modereg = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII; + return 0; + } + + if (!strcmp(phymode, "rgmii")) { + *modereg = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII; + return 0; + } + + if (!strcmp(phymode, "rmii")) { + *modereg = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RMII; + return 0; + } + + return -EINVAL; +} + +int socfpga_eth_reset_common(void (*resetfn)(const u8 of_reset_id, + const u8 phymode)) +{ + const void *fdt = gd->fdt_blob; + struct fdtdec_phandle_args args; + const char *phy_mode; + u32 phy_modereg; + int nodes[2]; /* Max. two GMACs */ + int ret, count; + int i, node; + + count = fdtdec_find_aliases_for_id(fdt, "ethernet", + COMPAT_ALTERA_SOCFPGA_DWMAC, + nodes, ARRAY_SIZE(nodes)); + for (i = 0; i < count; i++) { + node = nodes[i]; + if (node <= 0) + continue; + + ret = fdtdec_parse_phandle_with_args(fdt, node, "resets", + "#reset-cells", 1, 0, + &args); + if (ret || (args.args_count != 1)) { + debug("GMAC%i: Failed to parse DT 'resets'!\n", i); + continue; + } + + phy_mode = fdt_getprop(fdt, node, "phy-mode", NULL); + ret = dwmac_phymode_to_modereg(phy_mode, &phy_modereg); + if (ret) { + debug("GMAC%i: Failed to parse DT 'phy-mode'!\n", i); + continue; + } + + resetfn(args.args[0], phy_modereg); + } + + return 0; +} +#endif diff --git a/arch/arm/mach-socfpga/misc_arria10.c b/arch/arm/mach-socfpga/misc_arria10.c index f9095683124..47a9d50ef13 100644 --- a/arch/arm/mach-socfpga/misc_arria10.c +++ b/arch/arm/mach-socfpga/misc_arria10.c @@ -41,8 +41,7 @@ static struct socfpga_system_manager *sysmgr_regs = * DesignWare Ethernet initialization */ #ifdef CONFIG_ETH_DESIGNWARE -void dwmac_deassert_reset(const unsigned int of_reset_id, - const u32 phymode) +static void arria10_dwmac_reset(const u8 of_reset_id, const u8 phymode) { u32 reset; @@ -64,6 +63,20 @@ void dwmac_deassert_reset(const unsigned int of_reset_id, /* Release the EMAC controller from reset */ socfpga_per_reset(reset, 0); } + +static int socfpga_eth_reset(void) +{ + /* Put all GMACs into RESET state. */ + socfpga_per_reset(SOCFPGA_RESET(EMAC0), 1); + socfpga_per_reset(SOCFPGA_RESET(EMAC1), 1); + socfpga_per_reset(SOCFPGA_RESET(EMAC2), 1); + return socfpga_eth_reset_common(arria10_dwmac_reset); +}; +#else +static int socfpga_eth_reset(void) +{ + return 0; +}; #endif #if defined(CONFIG_SPL_BUILD) @@ -91,11 +104,6 @@ int arch_early_init_r(void) /* assert reset to all except L4WD0 and L4TIMER0 */ socfpga_per_reset_all(); - /* configuring the clock based on handoff */ - /* TODO: Add call to cm_basic_init() */ - - /* Add device descriptor to FPGA device table */ - socfpga_fpga_add(); return 0; } #else @@ -251,6 +259,6 @@ int print_cpuinfo(void) #ifdef CONFIG_ARCH_MISC_INIT int arch_misc_init(void) { - return 0; + return socfpga_eth_reset(); } #endif diff --git a/arch/arm/mach-socfpga/misc_gen5.c b/arch/arm/mach-socfpga/misc_gen5.c index b9db3aef09c..434373404e3 100644 --- a/arch/arm/mach-socfpga/misc_gen5.c +++ b/arch/arm/mach-socfpga/misc_gen5.c @@ -38,8 +38,7 @@ static struct scu_registers *scu_regs = * DesignWare Ethernet initialization */ #ifdef CONFIG_ETH_DESIGNWARE -void dwmac_deassert_reset(const unsigned int of_reset_id, - const u32 phymode) +static void gen5_dwmac_reset(const u8 of_reset_id, const u8 phymode) { u32 physhift, reset; @@ -63,71 +62,13 @@ void dwmac_deassert_reset(const unsigned int of_reset_id, socfpga_per_reset(reset, 0); } -static u32 dwmac_phymode_to_modereg(const char *phymode, u32 *modereg) -{ - if (!phymode) - return -EINVAL; - - if (!strcmp(phymode, "mii") || !strcmp(phymode, "gmii")) { - *modereg = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII; - return 0; - } - - if (!strcmp(phymode, "rgmii")) { - *modereg = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII; - return 0; - } - - if (!strcmp(phymode, "rmii")) { - *modereg = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RMII; - return 0; - } - - return -EINVAL; -} - static int socfpga_eth_reset(void) { - const void *fdt = gd->fdt_blob; - struct fdtdec_phandle_args args; - const char *phy_mode; - u32 phy_modereg; - int nodes[2]; /* Max. two GMACs */ - int ret, count; - int i, node; - - /* Put both GMACs into RESET state. */ + /* Put all GMACs into RESET state. */ socfpga_per_reset(SOCFPGA_RESET(EMAC0), 1); socfpga_per_reset(SOCFPGA_RESET(EMAC1), 1); - - count = fdtdec_find_aliases_for_id(fdt, "ethernet", - COMPAT_ALTERA_SOCFPGA_DWMAC, - nodes, ARRAY_SIZE(nodes)); - for (i = 0; i < count; i++) { - node = nodes[i]; - if (node <= 0) - continue; - - ret = fdtdec_parse_phandle_with_args(fdt, node, "resets", - "#reset-cells", 1, 0, - &args); - if (ret || (args.args_count != 1)) { - debug("GMAC%i: Failed to parse DT 'resets'!\n", i); - continue; - } - - phy_mode = fdt_getprop(fdt, node, "phy-mode", NULL); - ret = dwmac_phymode_to_modereg(phy_mode, &phy_modereg); - if (ret) { - debug("GMAC%i: Failed to parse DT 'phy-mode'!\n", i); - continue; - } - - dwmac_deassert_reset(args.args[0], phy_modereg); - } - - return 0; -} + return socfpga_eth_reset_common(gen5_dwmac_reset); +}; #else static int socfpga_eth_reset(void) { @@ -264,12 +205,8 @@ int arch_early_init_r(void) setbits_le32(&scu_regs->sacr, 0xfff); /* Configure the L2 controller to make SDRAM start at 0 */ -#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET - writel(0x2, &nic301_regs->remap); -#else writel(0x1, &nic301_regs->remap); /* remap.mpuzero */ writel(0x1, &pl310->pl310_addr_filter_start); -#endif /* Add device descriptor to FPGA device table */ socfpga_fpga_add(); diff --git a/arch/arm/mach-socfpga/reset_manager.c b/arch/arm/mach-socfpga/reset_manager.c index 1389c82169b..e0a01ed07a5 100644 --- a/arch/arm/mach-socfpga/reset_manager.c +++ b/arch/arm/mach-socfpga/reset_manager.c @@ -8,8 +8,16 @@ #include <asm/io.h> #include <asm/arch/reset_manager.h> +#if defined(CONFIG_TARGET_SOCFPGA_STRATIX10) +#include <asm/arch/mailbox_s10.h> +#endif + +DECLARE_GLOBAL_DATA_PTR; + +#if !defined(CONFIG_TARGET_SOCFPGA_STRATIX10) static const struct socfpga_reset_manager *reset_manager_base = (void *)SOCFPGA_RSTMGR_ADDRESS; +#endif /* * Write the reset manager register to cause reset @@ -17,8 +25,13 @@ static const struct socfpga_reset_manager *reset_manager_base = void reset_cpu(ulong addr) { /* request a warm reset */ +#if defined(CONFIG_TARGET_SOCFPGA_STRATIX10) + puts("Mailbox: Issuing mailbox cmd REBOOT_HPS\n"); + mbox_reset_cold(); +#else writel(1 << RSTMGR_CTRL_SWWARMRSTREQ_LSB, &reset_manager_base->ctrl); +#endif /* * infinite loop here as watchdog will trigger and reset * the processor diff --git a/arch/arm/mach-socfpga/reset_manager_arria10.c b/arch/arm/mach-socfpga/reset_manager_arria10.c index 99e2b8e6e63..b4434f2ded1 100644 --- a/arch/arm/mach-socfpga/reset_manager_arria10.c +++ b/arch/arm/mach-socfpga/reset_manager_arria10.c @@ -316,13 +316,6 @@ void socfpga_per_reset_all(void) setbits_le32(&reset_manager_base->per0modrst, mask_ecc_ocp); } -#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET) -int socfpga_bridges_reset(void) -{ - /* For SoCFPGA-VT, this is NOP. */ - return 0; -} -#else int socfpga_bridges_reset(void) { int ret; @@ -379,4 +372,3 @@ int socfpga_bridges_reset(void) return 0; } -#endif diff --git a/arch/arm/mach-socfpga/reset_manager_gen5.c b/arch/arm/mach-socfpga/reset_manager_gen5.c index b261a944868..25baef79bc2 100644 --- a/arch/arm/mach-socfpga/reset_manager_gen5.c +++ b/arch/arm/mach-socfpga/reset_manager_gen5.c @@ -69,14 +69,6 @@ void reset_deassert_peripherals_handoff(void) writel(0, &reset_manager_base->per_mod_reset); } -#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET) -void socfpga_bridges_reset(int enable) -{ - /* For SoCFPGA-VT, this is NOP. */ - return; -} -#else - #define L3REGS_REMAP_LWHPS2FPGA_MASK 0x10 #define L3REGS_REMAP_HPS2FPGA_MASK 0x08 #define L3REGS_REMAP_OCRAM_MASK 0x01 @@ -110,4 +102,3 @@ void socfpga_bridges_reset(int enable) } return; } -#endif diff --git a/arch/arm/mach-socfpga/reset_manager_s10.c b/arch/arm/mach-socfpga/reset_manager_s10.c new file mode 100644 index 00000000000..5cc83367407 --- /dev/null +++ b/arch/arm/mach-socfpga/reset_manager_s10.c @@ -0,0 +1,140 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2016-2018 Intel Corporation <www.intel.com> + * + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/reset_manager.h> +#include <asm/arch/system_manager.h> +#include <dt-bindings/reset/altr,rst-mgr-s10.h> + +DECLARE_GLOBAL_DATA_PTR; + +static const struct socfpga_reset_manager *reset_manager_base = + (void *)SOCFPGA_RSTMGR_ADDRESS; +static const struct socfpga_system_manager *system_manager_base = + (void *)SOCFPGA_SYSMGR_ADDRESS; + +/* Assert or de-assert SoCFPGA reset manager reset. */ +void socfpga_per_reset(u32 reset, int set) +{ + const void *reg; + + if (RSTMGR_BANK(reset) == 0) + reg = &reset_manager_base->mpumodrst; + else if (RSTMGR_BANK(reset) == 1) + reg = &reset_manager_base->per0modrst; + else if (RSTMGR_BANK(reset) == 2) + reg = &reset_manager_base->per1modrst; + else if (RSTMGR_BANK(reset) == 3) + reg = &reset_manager_base->brgmodrst; + else /* Invalid reset register, do nothing */ + return; + + if (set) + setbits_le32(reg, 1 << RSTMGR_RESET(reset)); + else + clrbits_le32(reg, 1 << RSTMGR_RESET(reset)); +} + +/* + * Assert reset on every peripheral but L4WD0. + * Watchdog must be kept intact to prevent glitches + * and/or hangs. + */ +void socfpga_per_reset_all(void) +{ + const u32 l4wd0 = 1 << RSTMGR_RESET(SOCFPGA_RESET(L4WD0)); + + /* disable all except OCP and l4wd0. OCP disable later */ + writel(~(l4wd0 | RSTMGR_PER0MODRST_OCP_MASK), + &reset_manager_base->per0modrst); + writel(~l4wd0, &reset_manager_base->per0modrst); + writel(0xffffffff, &reset_manager_base->per1modrst); +} + +void socfpga_bridges_reset(int enable) +{ + if (enable) { + /* clear idle request to all bridges */ + setbits_le32(&system_manager_base->noc_idlereq_clr, ~0); + + /* Release bridges from reset state per handoff value */ + clrbits_le32(&reset_manager_base->brgmodrst, ~0); + + /* Poll until all idleack to 0 */ + while (readl(&system_manager_base->noc_idleack)) + ; + } else { + /* set idle request to all bridges */ + writel(~0, &system_manager_base->noc_idlereq_set); + + /* Enable the NOC timeout */ + writel(1, &system_manager_base->noc_timeout); + + /* Poll until all idleack to 1 */ + while ((readl(&system_manager_base->noc_idleack) ^ + (SYSMGR_NOC_H2F_MSK | SYSMGR_NOC_LWH2F_MSK))) + ; + + /* Poll until all idlestatus to 1 */ + while ((readl(&system_manager_base->noc_idlestatus) ^ + (SYSMGR_NOC_H2F_MSK | SYSMGR_NOC_LWH2F_MSK))) + ; + + /* Put all bridges (except NOR DDR scheduler) into reset */ + setbits_le32(&reset_manager_base->brgmodrst, + ~RSTMGR_BRGMODRST_DDRSCH_MASK); + + /* Disable NOC timeout */ + writel(0, &system_manager_base->noc_timeout); + } +} + +/* of_reset_id: emac reset id + * state: 0 - disable reset, !0 - enable reset + */ +void socfpga_emac_manage_reset(const unsigned int of_reset_id, u32 state) +{ + u32 reset_emac; + u32 reset_emacocp; + + /* hardcode this now */ + switch (of_reset_id) { + case EMAC0_RESET: + reset_emac = SOCFPGA_RESET(EMAC0); + reset_emacocp = SOCFPGA_RESET(EMAC0_OCP); + break; + case EMAC1_RESET: + reset_emac = SOCFPGA_RESET(EMAC1); + reset_emacocp = SOCFPGA_RESET(EMAC1_OCP); + break; + case EMAC2_RESET: + reset_emac = SOCFPGA_RESET(EMAC2); + reset_emacocp = SOCFPGA_RESET(EMAC2_OCP); + break; + default: + printf("GMAC: Invalid reset ID (%i)!\n", of_reset_id); + hang(); + break; + } + + /* Reset ECC OCP first */ + socfpga_per_reset(reset_emacocp, state); + + /* Release the EMAC controller from reset */ + socfpga_per_reset(reset_emac, state); +} + +/* + * Release peripherals from reset based on handoff + */ +void reset_deassert_peripherals_handoff(void) +{ + writel(0, &reset_manager_base->per1modrst); + /* Enable OCP first */ + writel(~RSTMGR_PER0MODRST_OCP_MASK, &reset_manager_base->per0modrst); + writel(0, &reset_manager_base->per0modrst); +} diff --git a/arch/arm/mach-socfpga/spl.c b/arch/arm/mach-socfpga/spl.c index 4b86eadd815..0c9d7388e68 100644 --- a/arch/arm/mach-socfpga/spl.c +++ b/arch/arm/mach-socfpga/spl.c @@ -14,6 +14,7 @@ #include <asm/arch/system_manager.h> #include <asm/arch/freeze_controller.h> #include <asm/arch/clock_manager.h> +#include <asm/arch/misc.h> #include <asm/arch/scan_manager.h> #include <asm/arch/sdram.h> #include <asm/arch/scu.h> @@ -78,9 +79,7 @@ static void socfpga_nic301_slave_ns(void) void board_init_f(ulong dummy) { -#ifndef CONFIG_SOCFPGA_VIRTUAL_TARGET const struct cm_config *cm_default_cfg = cm_get_default_config(); -#endif unsigned long sdram_size; unsigned long reg; @@ -107,7 +106,6 @@ void board_init_f(ulong dummy) writel(0x1, &nic301_regs->remap); /* remap.mpuzero */ writel(0x1, &pl310->pl310_addr_filter_start); -#ifndef CONFIG_SOCFPGA_VIRTUAL_TARGET debug("Freezing all I/O banks\n"); /* freeze all IO banks */ sys_mgr_frzctrl_freeze_req(); @@ -142,8 +140,6 @@ void board_init_f(ulong dummy) sysmgr_pinmux_init(); sysmgr_config_warmrstcfgio(0); -#endif /* CONFIG_SOCFPGA_VIRTUAL_TARGET */ - /* De-assert reset for peripherals and bridges based on handoff */ reset_deassert_peripherals_handoff(); socfpga_bridges_reset(0); @@ -196,6 +192,11 @@ void spl_board_init(void) /* enable console uart printing */ preloader_console_init(); + + WATCHDOG_RESET(); + + /* Add device descriptor to FPGA device table */ + socfpga_fpga_add(); } void board_init_f(ulong dummy) diff --git a/arch/arm/mach-socfpga/system_manager_s10.c b/arch/arm/mach-socfpga/system_manager_s10.c new file mode 100644 index 00000000000..122828c9ce4 --- /dev/null +++ b/arch/arm/mach-socfpga/system_manager_s10.c @@ -0,0 +1,91 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2016-2018 Intel Corporation <www.intel.com> + * + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/system_manager.h> + +DECLARE_GLOBAL_DATA_PTR; + +static struct socfpga_system_manager *sysmgr_regs = + (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS; + +/* + * Configure all the pin muxes + */ +void sysmgr_pinmux_init(void) +{ + populate_sysmgr_pinmux(); + populate_sysmgr_fpgaintf_module(); +} + +/* + * Populate the value for SYSMGR.FPGAINTF.MODULE based on pinmux setting. + * The value is not wrote to SYSMGR.FPGAINTF.MODULE but + * CONFIG_SYSMGR_ISWGRP_HANDOFF. + */ +void populate_sysmgr_fpgaintf_module(void) +{ + u32 handoff_val = 0; + + /* Enable the signal for those HPS peripherals that use FPGA. */ + if (readl(&sysmgr_regs->nandusefpga) == SYSMGR_FPGAINTF_USEFPGA) + handoff_val |= SYSMGR_FPGAINTF_NAND; + if (readl(&sysmgr_regs->sdmmcusefpga) == SYSMGR_FPGAINTF_USEFPGA) + handoff_val |= SYSMGR_FPGAINTF_SDMMC; + if (readl(&sysmgr_regs->spim0usefpga) == SYSMGR_FPGAINTF_USEFPGA) + handoff_val |= SYSMGR_FPGAINTF_SPIM0; + if (readl(&sysmgr_regs->spim1usefpga) == SYSMGR_FPGAINTF_USEFPGA) + handoff_val |= SYSMGR_FPGAINTF_SPIM1; + writel(handoff_val, &sysmgr_regs->fpgaintf_en_2); + + handoff_val = 0; + if (readl(&sysmgr_regs->rgmii0usefpga) == SYSMGR_FPGAINTF_USEFPGA) + handoff_val |= SYSMGR_FPGAINTF_EMAC0; + if (readl(&sysmgr_regs->rgmii1usefpga) == SYSMGR_FPGAINTF_USEFPGA) + handoff_val |= SYSMGR_FPGAINTF_EMAC1; + if (readl(&sysmgr_regs->rgmii2usefpga) == SYSMGR_FPGAINTF_USEFPGA) + handoff_val |= SYSMGR_FPGAINTF_EMAC2; + writel(handoff_val, &sysmgr_regs->fpgaintf_en_3); +} + +/* + * Configure all the pin muxes + */ +void populate_sysmgr_pinmux(void) +{ + const u32 *sys_mgr_table_u32; + unsigned int len, i; + + /* setup the pin sel */ + sysmgr_pinmux_table_sel(&sys_mgr_table_u32, &len); + for (i = 0; i < len; i = i + 2) { + writel(sys_mgr_table_u32[i + 1], + sys_mgr_table_u32[i] + (u8 *)&sysmgr_regs->pinsel0[0]); + } + + /* setup the pin ctrl */ + sysmgr_pinmux_table_ctrl(&sys_mgr_table_u32, &len); + for (i = 0; i < len; i = i + 2) { + writel(sys_mgr_table_u32[i + 1], + sys_mgr_table_u32[i] + (u8 *)&sysmgr_regs->ioctrl0[0]); + } + + /* setup the fpga use */ + sysmgr_pinmux_table_fpga(&sys_mgr_table_u32, &len); + for (i = 0; i < len; i = i + 2) { + writel(sys_mgr_table_u32[i + 1], + sys_mgr_table_u32[i] + + (u8 *)&sysmgr_regs->rgmii0usefpga); + } + + /* setup the IO delay */ + sysmgr_pinmux_table_delay(&sys_mgr_table_u32, &len); + for (i = 0; i < len; i = i + 2) { + writel(sys_mgr_table_u32[i + 1], + sys_mgr_table_u32[i] + (u8 *)&sysmgr_regs->iodelay0[0]); + } +} diff --git a/arch/arm/mach-socfpga/wrap_pinmux_config_s10.c b/arch/arm/mach-socfpga/wrap_pinmux_config_s10.c new file mode 100644 index 00000000000..0b497ec30c5 --- /dev/null +++ b/arch/arm/mach-socfpga/wrap_pinmux_config_s10.c @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2016-2018 Intel Corporation <www.intel.com> + * + */ + +#include <common.h> +#include <errno.h> +#include <asm/io.h> +#include <asm/arch/handoff_s10.h> + +static void sysmgr_pinmux_handoff_read(void *handoff_address, + const u32 **table, + unsigned int *table_len) +{ + unsigned int handoff_entry = (swab32(readl(handoff_address + + S10_HANDOFF_OFFSET_LENGTH)) - + S10_HANDOFF_OFFSET_DATA) / + sizeof(unsigned int); + unsigned int handoff_chunk[handoff_entry], temp, i; + + if (swab32(readl(S10_HANDOFF_MUX)) == S10_HANDOFF_MAGIC_MUX) { + /* using handoff from Quartus tools if exists */ + for (i = 0; i < handoff_entry; i++) { + temp = readl(handoff_address + + S10_HANDOFF_OFFSET_DATA + (i * 4)); + handoff_chunk[i] = swab32(temp); + } + *table = handoff_chunk; + *table_len = ARRAY_SIZE(handoff_chunk); + } +} + +void sysmgr_pinmux_table_sel(const u32 **table, unsigned int *table_len) +{ + sysmgr_pinmux_handoff_read((void *)S10_HANDOFF_MUX, table, + table_len); +} + +void sysmgr_pinmux_table_ctrl(const u32 **table, unsigned int *table_len) +{ + sysmgr_pinmux_handoff_read((void *)S10_HANDOFF_IOCTL, table, + table_len); +} + +void sysmgr_pinmux_table_fpga(const u32 **table, unsigned int *table_len) +{ + sysmgr_pinmux_handoff_read((void *)S10_HANDOFF_FPGA, table, + table_len); +} + +void sysmgr_pinmux_table_delay(const u32 **table, unsigned int *table_len) +{ + sysmgr_pinmux_handoff_read((void *)S10_HANODFF_DELAY, table, + table_len); +} diff --git a/arch/arm/mach-socfpga/wrap_pll_config_s10.c b/arch/arm/mach-socfpga/wrap_pll_config_s10.c new file mode 100644 index 00000000000..7cafc7dcfc9 --- /dev/null +++ b/arch/arm/mach-socfpga/wrap_pll_config_s10.c @@ -0,0 +1,59 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2016-2018 Intel Corporation <www.intel.com> + * + */ + +#include <common.h> +#include <asm/arch/clock_manager.h> +#include <asm/io.h> +#include <asm/arch/handoff_s10.h> +#include <asm/arch/system_manager.h> + +static const struct socfpga_system_manager *sysmgr_regs = + (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS; + +const struct cm_config * const cm_get_default_config(void) +{ + struct cm_config *cm_handoff_cfg = (struct cm_config *) + (S10_HANDOFF_CLOCK + S10_HANDOFF_OFFSET_DATA); + u32 *conversion = (u32 *)cm_handoff_cfg; + u32 i; + u32 handoff_clk = readl(S10_HANDOFF_CLOCK); + + if (swab32(handoff_clk) == S10_HANDOFF_MAGIC_CLOCK) { + writel(swab32(handoff_clk), S10_HANDOFF_CLOCK); + for (i = 0; i < (sizeof(*cm_handoff_cfg) / sizeof(u32)); i++) + conversion[i] = swab32(conversion[i]); + return cm_handoff_cfg; + } else if (handoff_clk == S10_HANDOFF_MAGIC_CLOCK) { + return cm_handoff_cfg; + } + + return NULL; +} + +const unsigned int cm_get_osc_clk_hz(void) +{ +#ifdef CONFIG_SPL_BUILD + u32 clock = readl(S10_HANDOFF_CLOCK_OSC); + + writel(clock, &sysmgr_regs->boot_scratch_cold1); +#endif + return readl(&sysmgr_regs->boot_scratch_cold1); +} + +const unsigned int cm_get_intosc_clk_hz(void) +{ + return CLKMGR_INTOSC_HZ; +} + +const unsigned int cm_get_fpga_clk_hz(void) +{ +#ifdef CONFIG_SPL_BUILD + u32 clock = readl(S10_HANDOFF_CLOCK_FPGA); + + writel(clock, &sysmgr_regs->boot_scratch_cold2); +#endif + return readl(&sysmgr_regs->boot_scratch_cold2); +} diff --git a/arch/arm/mach-stm32/Kconfig b/arch/arm/mach-stm32/Kconfig index 13532843fbc..759f5451766 100644 --- a/arch/arm/mach-stm32/Kconfig +++ b/arch/arm/mach-stm32/Kconfig @@ -48,6 +48,7 @@ config STM32F7 imply SPL_OS_BOOT select SPL_PINCTRL select SPL_RAM + select SPL_RESET_SUPPORT select SPL_SERIAL_SUPPORT select SPL_SYS_MALLOC_SIMPLE select SPL_TIMER diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index ccbeb5c3881..abceeded24a 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -54,4 +54,19 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2 source "board/st/stm32mp1/Kconfig" +# currently activated for debug / should be deactivated for real product +if DEBUG_UART + +config DEBUG_UART_BOARD_INIT + default y + +# debug on UART4 by default +config DEBUG_UART_BASE + default 0x40010000 + +# clock source is HSI on reset +config DEBUG_UART_CLOCK + default 64000000 +endif + endif diff --git a/arch/arm/mach-stm32mp/Makefile b/arch/arm/mach-stm32mp/Makefile index 08ee642d908..f59ced5ee1b 100644 --- a/arch/arm/mach-stm32mp/Makefile +++ b/arch/arm/mach-stm32mp/Makefile @@ -1,4 +1,4 @@ -# SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause +# SPDX-License-Identifier: GPL-2.0+ # # Copyright (C) 2018, STMicroelectronics - All Rights Reserved # @@ -7,6 +7,10 @@ obj-y += cpu.o obj-y += dram_init.o obj-y += syscon.o -obj-$(CONFIG_SPL_BUILD) += spl.o +ifdef CONFIG_SPL_BUILD +obj-y += spl.o +else +obj-y += bsec.o +endif obj-$(CONFIG_ARMV7_PSCI) += psci.o obj-$(CONFIG_$(SPL_)DM_REGULATOR) += pwr_regulator.o diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c new file mode 100644 index 00000000000..0e152efc045 --- /dev/null +++ b/arch/arm/mach-stm32mp/bsec.c @@ -0,0 +1,431 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018, STMicroelectronics - All Rights Reserved + */ + +#include <common.h> +#include <dm.h> +#include <misc.h> +#include <asm/io.h> +#include <linux/iopoll.h> + +#define BSEC_OTP_MAX_VALUE 95 + +#define BSEC_TIMEOUT_US 10000 + +/* BSEC REGISTER OFFSET (base relative) */ +#define BSEC_OTP_CONF_OFF 0x000 +#define BSEC_OTP_CTRL_OFF 0x004 +#define BSEC_OTP_WRDATA_OFF 0x008 +#define BSEC_OTP_STATUS_OFF 0x00C +#define BSEC_OTP_LOCK_OFF 0x010 +#define BSEC_DISTURBED_OFF 0x01C +#define BSEC_ERROR_OFF 0x034 +#define BSEC_SPLOCK_OFF 0x064 /* Program safmem sticky lock */ +#define BSEC_SWLOCK_OFF 0x07C /* write in OTP sticky lock */ +#define BSEC_SRLOCK_OFF 0x094 /* shadowing sticky lock */ +#define BSEC_OTP_DATA_OFF 0x200 + +/* BSEC_CONFIGURATION Register MASK */ +#define BSEC_CONF_POWER_UP 0x001 + +/* BSEC_CONTROL Register */ +#define BSEC_READ 0x000 +#define BSEC_WRITE 0x100 + +/* LOCK Register */ +#define OTP_LOCK_MASK 0x1F +#define OTP_LOCK_BANK_SHIFT 0x05 +#define OTP_LOCK_BIT_MASK 0x01 + +/* STATUS Register */ +#define BSEC_MODE_BUSY_MASK 0x08 +#define BSEC_MODE_PROGFAIL_MASK 0x10 +#define BSEC_MODE_PWR_MASK 0x20 + +/* + * OTP Lock services definition + * Value must corresponding to the bit number in the register + */ +#define BSEC_LOCK_PROGRAM 0x04 + +/** + * bsec_check_error() - Check status of one otp + * @base: base address of bsec IP + * @otp: otp number (0 - BSEC_OTP_MAX_VALUE) + * Return: 0 if no error, -EAGAIN or -ENOTSUPP + */ +static u32 bsec_check_error(u32 base, u32 otp) +{ + u32 bit; + u32 bank; + + bit = 1 << (otp & OTP_LOCK_MASK); + bank = ((otp >> OTP_LOCK_BANK_SHIFT) & OTP_LOCK_MASK) * sizeof(u32); + + if (readl(base + BSEC_DISTURBED_OFF + bank) & bit) + return -EAGAIN; + else if (readl(base + BSEC_ERROR_OFF + bank) & bit) + return -ENOTSUPP; + + return 0; +} + +/** + * bsec_lock() - manage lock for each type SR/SP/SW + * @address: address of bsec IP register + * @otp: otp number (0 - BSEC_OTP_MAX_VALUE) + * Return: true if locked else false + */ +static bool bsec_read_lock(u32 address, u32 otp) +{ + u32 bit; + u32 bank; + + bit = 1 << (otp & OTP_LOCK_MASK); + bank = ((otp >> OTP_LOCK_BANK_SHIFT) & OTP_LOCK_MASK) * sizeof(u32); + + return !!(readl(address + bank) & bit); +} + +/** + * bsec_read_SR_lock() - read SR lock (Shadowing) + * @base: base address of bsec IP + * @otp: otp number (0 - BSEC_OTP_MAX_VALUE) + * Return: true if locked else false + */ +static bool bsec_read_SR_lock(u32 base, u32 otp) +{ + return bsec_read_lock(base + BSEC_SRLOCK_OFF, otp); +} + +/** + * bsec_read_SP_lock() - read SP lock (program Lock) + * @base: base address of bsec IP + * @otp: otp number (0 - BSEC_OTP_MAX_VALUE) + * Return: true if locked else false + */ +static bool bsec_read_SP_lock(u32 base, u32 otp) +{ + return bsec_read_lock(base + BSEC_SPLOCK_OFF, otp); +} + +/** + * bsec_SW_lock() - manage SW lock (Write in Shadow) + * @base: base address of bsec IP + * @otp: otp number (0 - BSEC_OTP_MAX_VALUE) + * Return: true if locked else false + */ +static bool bsec_read_SW_lock(u32 base, u32 otp) +{ + return bsec_read_lock(base + BSEC_SWLOCK_OFF, otp); +} + +/** + * bsec_power_safmem() - Activate or deactivate safmem power + * @base: base address of bsec IP + * @power: true to power up , false to power down + * Return: 0 if succeed + */ +static int bsec_power_safmem(u32 base, bool power) +{ + u32 val; + u32 mask; + + if (power) { + setbits_le32(base + BSEC_OTP_CONF_OFF, BSEC_CONF_POWER_UP); + mask = BSEC_MODE_PWR_MASK; + } else { + clrbits_le32(base + BSEC_OTP_CONF_OFF, BSEC_CONF_POWER_UP); + mask = 0; + } + + /* waiting loop */ + return readl_poll_timeout(base + BSEC_OTP_STATUS_OFF, + val, (val & BSEC_MODE_PWR_MASK) == mask, + BSEC_TIMEOUT_US); +} + +/** + * bsec_shadow_register() - copy safmen otp to bsec data + * @base: base address of bsec IP + * @otp: otp number (0 - BSEC_OTP_MAX_VALUE) + * Return: 0 if no error + */ +static int bsec_shadow_register(u32 base, u32 otp) +{ + u32 val; + int ret; + bool power_up = false; + + /* check if shadowing of otp is locked */ + if (bsec_read_SR_lock(base, otp)) + pr_debug("bsec : OTP %d is locked and refreshed with 0\n", otp); + + /* check if safemem is power up */ + val = readl(base + BSEC_OTP_STATUS_OFF); + if (!(val & BSEC_MODE_PWR_MASK)) { + ret = bsec_power_safmem(base, true); + if (ret) + return ret; + power_up = 1; + } + /* set BSEC_OTP_CTRL_OFF with the otp value*/ + writel(otp | BSEC_READ, base + BSEC_OTP_CTRL_OFF); + + /* check otp status*/ + ret = readl_poll_timeout(base + BSEC_OTP_STATUS_OFF, + val, (val & BSEC_MODE_BUSY_MASK) == 0, + BSEC_TIMEOUT_US); + if (ret) + return ret; + + ret = bsec_check_error(base, otp); + + if (power_up) + bsec_power_safmem(base, false); + + return ret; +} + +/** + * bsec_read_shadow() - read an otp data value from shadow + * @base: base address of bsec IP + * @val: read value + * @otp: otp number (0 - BSEC_OTP_MAX_VALUE) + * Return: 0 if no error + */ +static int bsec_read_shadow(u32 base, u32 *val, u32 otp) +{ + *val = readl(base + BSEC_OTP_DATA_OFF + otp * sizeof(u32)); + + return bsec_check_error(base, otp); +} + +/** + * bsec_write_shadow() - write value in BSEC data register in shadow + * @base: base address of bsec IP + * @val: value to write + * @otp: otp number (0 - BSEC_OTP_MAX_VALUE) + * Return: 0 if no error + */ +static int bsec_write_shadow(u32 base, u32 val, u32 otp) +{ + /* check if programming of otp is locked */ + if (bsec_read_SW_lock(base, otp)) + pr_debug("bsec : OTP %d is lock, write will be ignore\n", otp); + + writel(val, base + BSEC_OTP_DATA_OFF + otp * sizeof(u32)); + + return bsec_check_error(base, otp); +} + +/** + * bsec_program_otp() - program a bit in SAFMEM + * @base: base address of bsec IP + * @val: value to program + * @otp: otp number (0 - BSEC_OTP_MAX_VALUE) + * after the function the otp data is not refreshed in shadow + * Return: 0 if no error + */ +static int bsec_program_otp(long base, u32 val, u32 otp) +{ + u32 ret; + bool power_up = false; + + if (bsec_read_SP_lock(base, otp)) + pr_debug("bsec : OTP %d locked, prog will be ignore\n", otp); + + if (readl(base + BSEC_OTP_LOCK_OFF) & (1 << BSEC_LOCK_PROGRAM)) + pr_debug("bsec : Global lock, prog will be ignore\n"); + + /* check if safemem is power up */ + if (!(readl(base + BSEC_OTP_STATUS_OFF) & BSEC_MODE_PWR_MASK)) { + ret = bsec_power_safmem(base, true); + if (ret) + return ret; + + power_up = true; + } + /* set value in write register*/ + writel(val, base + BSEC_OTP_WRDATA_OFF); + + /* set BSEC_OTP_CTRL_OFF with the otp value */ + writel(otp | BSEC_WRITE, base + BSEC_OTP_CTRL_OFF); + + /* check otp status*/ + ret = readl_poll_timeout(base + BSEC_OTP_STATUS_OFF, + val, (val & BSEC_MODE_BUSY_MASK) == 0, + BSEC_TIMEOUT_US); + if (ret) + return ret; + + if (val & BSEC_MODE_PROGFAIL_MASK) + ret = -EACCES; + else + ret = bsec_check_error(base, otp); + + if (power_up) + bsec_power_safmem(base, false); + + return ret; +} + +/* BSEC MISC driver *******************************************************/ +struct stm32mp_bsec_platdata { + u32 base; +}; + +static int stm32mp_bsec_read_otp(struct udevice *dev, u32 *val, u32 otp) +{ + struct stm32mp_bsec_platdata *plat = dev_get_platdata(dev); + u32 tmp_data = 0; + int ret; + + /* read current shadow value */ + ret = bsec_read_shadow(plat->base, &tmp_data, otp); + if (ret) + return ret; + + /* copy otp in shadow */ + ret = bsec_shadow_register(plat->base, otp); + if (ret) + return ret; + + ret = bsec_read_shadow(plat->base, val, otp); + if (ret) + return ret; + + /* restore shadow value */ + ret = bsec_write_shadow(plat->base, tmp_data, otp); + return ret; +} + +static int stm32mp_bsec_read_shadow(struct udevice *dev, u32 *val, u32 otp) +{ + struct stm32mp_bsec_platdata *plat = dev_get_platdata(dev); + + return bsec_read_shadow(plat->base, val, otp); +} + +static int stm32mp_bsec_write_otp(struct udevice *dev, u32 val, u32 otp) +{ + struct stm32mp_bsec_platdata *plat = dev_get_platdata(dev); + + return bsec_program_otp(plat->base, val, otp); +} + +static int stm32mp_bsec_write_shadow(struct udevice *dev, u32 val, u32 otp) +{ + struct stm32mp_bsec_platdata *plat = dev_get_platdata(dev); + + return bsec_write_shadow(plat->base, val, otp); +} + +static int stm32mp_bsec_read(struct udevice *dev, int offset, + void *buf, int size) +{ + int ret; + int i; + bool shadow = true; + int nb_otp = size / sizeof(u32); + int otp; + + if (offset >= STM32_BSEC_OTP_OFFSET) { + offset -= STM32_BSEC_OTP_OFFSET; + shadow = false; + } + otp = offset / sizeof(u32); + + if (otp < 0 || (otp + nb_otp - 1) > BSEC_OTP_MAX_VALUE) { + dev_err(dev, "wrong value for otp, max value : %i\n", + BSEC_OTP_MAX_VALUE); + return -EINVAL; + } + + for (i = otp; i < (otp + nb_otp); i++) { + u32 *addr = &((u32 *)buf)[i - otp]; + + if (shadow) + ret = stm32mp_bsec_read_shadow(dev, addr, i); + else + ret = stm32mp_bsec_read_otp(dev, addr, i); + + if (ret) + break; + } + return ret; +} + +static int stm32mp_bsec_write(struct udevice *dev, int offset, + const void *buf, int size) +{ + int ret = 0; + int i; + bool shadow = true; + int nb_otp = size / sizeof(u32); + int otp; + + if (offset >= STM32_BSEC_OTP_OFFSET) { + offset -= STM32_BSEC_OTP_OFFSET; + shadow = false; + } + otp = offset / sizeof(u32); + + if (otp < 0 || (otp + nb_otp - 1) > BSEC_OTP_MAX_VALUE) { + dev_err(dev, "wrong value for otp, max value : %d\n", + BSEC_OTP_MAX_VALUE); + return -EINVAL; + } + + for (i = otp; i < otp + nb_otp; i++) { + u32 *val = &((u32 *)buf)[i - otp]; + + if (shadow) + ret = stm32mp_bsec_write_shadow(dev, *val, i); + else + ret = stm32mp_bsec_write_otp(dev, *val, i); + if (ret) + break; + } + return ret; +} + +static const struct misc_ops stm32mp_bsec_ops = { + .read = stm32mp_bsec_read, + .write = stm32mp_bsec_write, +}; + +static int stm32mp_bsec_ofdata_to_platdata(struct udevice *dev) +{ + struct stm32mp_bsec_platdata *plat = dev_get_platdata(dev); + + plat->base = (u32)dev_read_addr_ptr(dev); + + return 0; +} + +static const struct udevice_id stm32mp_bsec_ids[] = { + { .compatible = "st,stm32mp-bsec" }, + {} +}; + +U_BOOT_DRIVER(stm32mp_bsec) = { + .name = "stm32mp_bsec", + .id = UCLASS_MISC, + .of_match = stm32mp_bsec_ids, + .ofdata_to_platdata = stm32mp_bsec_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct stm32mp_bsec_platdata), + .ops = &stm32mp_bsec_ops, + .flags = DM_FLAG_PRE_RELOC, +}; + +/* bsec IP is not present in device tee, manage IP address by platdata */ +static struct stm32mp_bsec_platdata stm32_bsec_platdata = { + .base = STM32_BSEC_BASE, +}; + +U_BOOT_DEVICE(stm32mp_bsec) = { + .name = "stm32mp_bsec", + .platdata = &stm32_bsec_platdata, +}; diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index dfcbbd23146..0e01f8e6138 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -4,9 +4,13 @@ */ #include <common.h> #include <clk.h> +#include <debug_uart.h> +#include <environment.h> +#include <misc.h> #include <asm/io.h> #include <asm/arch/stm32.h> #include <asm/arch/sys_proto.h> +#include <dm/device.h> #include <dm/uclass.h> /* RCC register */ @@ -50,6 +54,10 @@ #define BOOTROM_INSTANCE_MASK GENMASK(31, 16) #define BOOTROM_INSTANCE_SHIFT 16 +/* BSEC OTP index */ +#define BSEC_OTP_SERIAL 13 +#define BSEC_OTP_MAC 57 + #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) static void security_init(void) { @@ -152,6 +160,8 @@ static u32 get_bootmode(void) */ int arch_cpu_init(void) { + u32 boot_mode; + /* early armv7 timer init: needed for polling */ timer_init(); @@ -160,8 +170,17 @@ int arch_cpu_init(void) security_init(); #endif + /* get bootmode from BootRom context: saved in TAMP register */ - get_bootmode(); + boot_mode = get_bootmode(); + + if ((boot_mode & TAMP_BOOT_DEVICE_MASK) == BOOT_SERIAL_UART) + gd->flags |= GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE; +#if defined(CONFIG_DEBUG_UART) && \ + (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)) + else + debug_uart_init(); +#endif return 0; } @@ -262,9 +281,83 @@ static void setup_boot_mode(void) } } +/* + * If there is no MAC address in the environment, then it will be initialized + * (silently) from the value in the OTP. + */ +static int setup_mac_address(void) +{ +#if defined(CONFIG_NET) + int ret; + int i; + u32 otp[2]; + uchar enetaddr[6]; + struct udevice *dev; + + /* MAC already in environment */ + if (eth_env_get_enetaddr("ethaddr", enetaddr)) + return 0; + + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_GET_DRIVER(stm32mp_bsec), + &dev); + if (ret) + return ret; + + ret = misc_read(dev, BSEC_OTP_MAC * 4 + STM32_BSEC_OTP_OFFSET, + otp, sizeof(otp)); + if (ret) + return ret; + + for (i = 0; i < 6; i++) + enetaddr[i] = ((uint8_t *)&otp)[i]; + + if (!is_valid_ethaddr(enetaddr)) { + pr_err("invalid MAC address in OTP %pM", enetaddr); + return -EINVAL; + } + pr_debug("OTP MAC address = %pM\n", enetaddr); + ret = !eth_env_set_enetaddr("ethaddr", enetaddr); + if (!ret) + pr_err("Failed to set mac address %pM from OTP: %d\n", + enetaddr, ret); +#endif + + return 0; +} + +static int setup_serial_number(void) +{ + char serial_string[25]; + u32 otp[3] = {0, 0, 0 }; + struct udevice *dev; + int ret; + + if (env_get("serial#")) + return 0; + + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_GET_DRIVER(stm32mp_bsec), + &dev); + if (ret) + return ret; + + ret = misc_read(dev, BSEC_OTP_SERIAL * 4 + STM32_BSEC_OTP_OFFSET, + otp, sizeof(otp)); + if (ret) + return ret; + + sprintf(serial_string, "%08x%08x%08x", otp[0], otp[1], otp[2]); + env_set("serial#", serial_string); + + return 0; +} + int arch_misc_init(void) { setup_boot_mode(); + setup_mac_address(); + setup_serial_number(); return 0; } diff --git a/arch/arm/mach-stm32mp/include/mach/stm32.h b/arch/arm/mach-stm32mp/include/mach/stm32.h index a8142013b08..5d0bdca1787 100644 --- a/arch/arm/mach-stm32mp/include/mach/stm32.h +++ b/arch/arm/mach-stm32mp/include/mach/stm32.h @@ -13,10 +13,23 @@ #define STM32_RCC_BASE 0x50000000 #define STM32_PWR_BASE 0x50001000 #define STM32_DBGMCU_BASE 0x50081000 +#define STM32_BSEC_BASE 0x5C005000 #define STM32_TZC_BASE 0x5C006000 #define STM32_ETZPC_BASE 0x5C007000 #define STM32_TAMP_BASE 0x5C00A000 +#ifdef CONFIG_DEBUG_UART_BASE +/* hardcoded value can be only used for DEBUG UART */ +#define STM32_USART1_BASE 0x5C000000 +#define STM32_USART2_BASE 0x4000E000 +#define STM32_USART3_BASE 0x4000F000 +#define STM32_UART4_BASE 0x40010000 +#define STM32_UART5_BASE 0x40011000 +#define STM32_USART6_BASE 0x44003000 +#define STM32_UART7_BASE 0x40018000 +#define STM32_UART8_BASE 0x40019000 +#endif + #define STM32_SYSRAM_BASE 0x2FFC0000 #define STM32_SYSRAM_SIZE SZ_256K @@ -83,5 +96,9 @@ enum boot_device { #define TAMP_BOOT_DEVICE_MASK GENMASK(7, 4) #define TAMP_BOOT_INSTANCE_MASK GENMASK(3, 0) +/* offset used for BSEC driver: misc_read and misc_write */ +#define STM32_BSEC_SHADOW_OFFSET 0x0 +#define STM32_BSEC_OTP_OFFSET 0x80000000 + #endif /* __ASSEMBLY__*/ #endif /* _MACH_STM32_H_ */ diff --git a/arch/arm/mach-stm32mp/spl.c b/arch/arm/mach-stm32mp/spl.c index b56f0c5381c..790973e8b6e 100644 --- a/arch/arm/mach-stm32mp/spl.c +++ b/arch/arm/mach-stm32mp/spl.c @@ -14,9 +14,6 @@ u32 spl_boot_device(void) boot_mode = (readl(TAMP_BOOT_CONTEXT) & TAMP_BOOT_MODE_MASK) >> TAMP_BOOT_MODE_SHIFT; - clrsetbits_le32(TAMP_BOOT_CONTEXT, - TAMP_BOOT_MODE_MASK, - boot_mode << TAMP_BOOT_MODE_SHIFT); switch (boot_mode) { case BOOT_FLASH_SD_1: diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index f0c9d1b0584..a3f77230286 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -124,6 +124,7 @@ endif config MACH_SUNXI_H3_H5 bool select DM_I2C + select PHY_SUN4I_USB select SUNXI_DE2 select SUNXI_DRAM_DW select SUNXI_DRAM_DW_32BIT @@ -138,6 +139,7 @@ config MACH_SUN4I bool "sun4i (Allwinner A10)" select CPU_V7A select ARM_CORTEX_CPU_IS_UP + select PHY_SUN4I_USB select DRAM_SUN4I select SUNXI_GEN_SUN4I select SUPPORT_SPL @@ -147,6 +149,7 @@ config MACH_SUN5I select CPU_V7A select ARM_CORTEX_CPU_IS_UP select DRAM_SUN4I + select PHY_SUN4I_USB select SUNXI_GEN_SUN4I select SUPPORT_SPL imply CONS_INDEX_2 if !DM_SERIAL @@ -158,6 +161,7 @@ config MACH_SUN6I select CPU_V7_HAS_VIRT select ARCH_SUPPORT_PSCI select DRAM_SUN6I + select PHY_SUN4I_USB select SUN6I_P2WI select SUN6I_PRCM select SUNXI_GEN_SUN6I @@ -171,6 +175,7 @@ config MACH_SUN7I select CPU_V7_HAS_VIRT select ARCH_SUPPORT_PSCI select DRAM_SUN4I + select PHY_SUN4I_USB select SUNXI_GEN_SUN4I select SUPPORT_SPL select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT @@ -182,6 +187,7 @@ config MACH_SUN8I_A23 select CPU_V7_HAS_VIRT select ARCH_SUPPORT_PSCI select DRAM_SUN8I_A23 + select PHY_SUN4I_USB select SUNXI_GEN_SUN6I select SUPPORT_SPL select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT @@ -194,6 +200,7 @@ config MACH_SUN8I_A33 select CPU_V7_HAS_VIRT select ARCH_SUPPORT_PSCI select DRAM_SUN8I_A33 + select PHY_SUN4I_USB select SUNXI_GEN_SUN6I select SUPPORT_SPL select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT @@ -203,6 +210,7 @@ config MACH_SUN8I_A83T bool "sun8i (Allwinner A83T)" select CPU_V7A select DRAM_SUN8I_A83T + select PHY_SUN4I_USB select SUNXI_GEN_SUN6I select MMC_SUNXI_HAS_NEW_MODE select SUPPORT_SPL @@ -253,6 +261,7 @@ config MACH_SUN50I bool "sun50i (Allwinner A64)" select ARM64 select DM_I2C + select PHY_SUN4I_USB select SUNXI_DE2 select SUNXI_GEN_SUN6I select SUNXI_HIGH_SRAM diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile index 1e261bdc872..4c752491a15 100644 --- a/arch/arm/mach-sunxi/Makefile +++ b/arch/arm/mach-sunxi/Makefile @@ -11,9 +11,6 @@ obj-y += clock.o obj-y += cpu_info.o obj-y += dram_helpers.o obj-y += pinmux.o -ifndef CONFIG_MACH_SUN9I -obj-y += usb_phy.o -endif obj-$(CONFIG_SUN6I_P2WI) += p2wi.o obj-$(CONFIG_SUN6I_PRCM) += prcm.o obj-$(CONFIG_AXP_PMIC_BUS) += pmic_bus.o diff --git a/arch/arm/mach-sunxi/usb_phy.c b/arch/arm/mach-sunxi/usb_phy.c deleted file mode 100644 index 318e225528d..00000000000 --- a/arch/arm/mach-sunxi/usb_phy.c +++ /dev/null @@ -1,406 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Sunxi usb-phy code - * - * Copyright (C) 2015 Hans de Goede <hdegoede@redhat.com> - * Copyright (C) 2014 Roman Byshko <rbyshko@gmail.com> - * - * Based on code from - * Allwinner Technology Co., Ltd. <www.allwinnertech.com> - */ - -#include <common.h> -#include <asm/arch/clock.h> -#include <asm/arch/cpu.h> -#include <asm/arch/usb_phy.h> -#include <asm/gpio.h> -#include <asm/io.h> -#include <errno.h> - -#if defined(CONFIG_MACH_SUN4I) || \ - defined(CONFIG_MACH_SUN5I) || \ - defined(CONFIG_MACH_SUN6I) || \ - defined(CONFIG_MACH_SUN7I) || \ - defined(CONFIG_MACH_SUN8I_A23) || \ - defined(CONFIG_MACH_SUN9I) -#define SUNXI_USB_CSR 0x404 -#else -#define SUNXI_USB_CSR 0x410 -#endif - -#define SUNXI_USB_PMU_IRQ_ENABLE 0x800 -#define SUNXI_USB_PASSBY_EN 1 - -#define SUNXI_EHCI_AHB_ICHR8_EN (1 << 10) -#define SUNXI_EHCI_AHB_INCR4_BURST_EN (1 << 9) -#define SUNXI_EHCI_AHB_INCRX_ALIGN_EN (1 << 8) -#define SUNXI_EHCI_ULPI_BYPASS_EN (1 << 0) - -#define REG_PHY_UNK_H3 0x420 -#define REG_PMU_UNK_H3 0x810 - -/* A83T specific control bits for PHY0 */ -#define SUNXI_PHY_CTL_VBUSVLDEXT BIT(5) -#define SUNXI_PHY_CTL_SIDDQ BIT(3) - -/* A83T HSIC specific bits */ -#define SUNXI_EHCI_HS_FORCE BIT(20) -#define SUNXI_EHCI_CONNECT_DET BIT(17) -#define SUNXI_EHCI_CONNECT_INT BIT(16) -#define SUNXI_EHCI_HSIC BIT(1) - -static struct sunxi_usb_phy { - int usb_rst_mask; - int gpio_vbus; - int gpio_vbus_det; - int gpio_id_det; - int id; - int init_count; - int power_on_count; - ulong base; -} sunxi_usb_phy[] = { - { - .usb_rst_mask = CCM_USB_CTRL_PHY0_RST | CCM_USB_CTRL_PHY0_CLK, - .id = 0, - .base = SUNXI_USB0_BASE, - }, - { - .usb_rst_mask = CCM_USB_CTRL_PHY1_RST | CCM_USB_CTRL_PHY1_CLK, - .id = 1, - .base = SUNXI_USB1_BASE, - }, -#if CONFIG_SUNXI_USB_PHYS >= 3 - { -#ifdef CONFIG_MACH_SUN8I_A83T - .usb_rst_mask = CCM_USB_CTRL_HSIC_RST | CCM_USB_CTRL_HSIC_CLK | - CCM_USB_CTRL_12M_CLK, -#else - .usb_rst_mask = CCM_USB_CTRL_PHY2_RST | CCM_USB_CTRL_PHY2_CLK, -#endif - .id = 2, - .base = SUNXI_USB2_BASE, - }, -#endif -#if CONFIG_SUNXI_USB_PHYS >= 4 - { - .usb_rst_mask = CCM_USB_CTRL_PHY3_RST | CCM_USB_CTRL_PHY3_CLK, - .id = 3, - .base = SUNXI_USB3_BASE, - } -#endif -}; - -static int initial_usb_scan_delay = CONFIG_INITIAL_USB_SCAN_DELAY; - -static int get_vbus_gpio(int index) -{ - switch (index) { - case 0: return sunxi_name_to_gpio(CONFIG_USB0_VBUS_PIN); - case 1: return sunxi_name_to_gpio(CONFIG_USB1_VBUS_PIN); - case 2: return sunxi_name_to_gpio(CONFIG_USB2_VBUS_PIN); - case 3: return sunxi_name_to_gpio(CONFIG_USB3_VBUS_PIN); - } - return -EINVAL; -} - -static int get_vbus_detect_gpio(int index) -{ - switch (index) { - case 0: return sunxi_name_to_gpio(CONFIG_USB0_VBUS_DET); - } - return -EINVAL; -} - -static int get_id_detect_gpio(int index) -{ - switch (index) { - case 0: return sunxi_name_to_gpio(CONFIG_USB0_ID_DET); - } - return -EINVAL; -} - -__maybe_unused static void usb_phy_write(struct sunxi_usb_phy *phy, int addr, - int data, int len) -{ - int j = 0, usbc_bit = 0; - void *dest = (void *)SUNXI_USB0_BASE + SUNXI_USB_CSR; - -#ifdef CONFIG_MACH_SUN8I_A33 - /* CSR needs to be explicitly initialized to 0 on A33 */ - writel(0, dest); -#endif - - usbc_bit = 1 << (phy->id * 2); - for (j = 0; j < len; j++) { - /* set the bit address to be written */ - clrbits_le32(dest, 0xff << 8); - setbits_le32(dest, (addr + j) << 8); - - clrbits_le32(dest, usbc_bit); - /* set data bit */ - if (data & 0x1) - setbits_le32(dest, 1 << 7); - else - clrbits_le32(dest, 1 << 7); - - setbits_le32(dest, usbc_bit); - - clrbits_le32(dest, usbc_bit); - - data >>= 1; - } -} - -#if defined(CONFIG_MACH_SUNXI_H3_H5) || defined(CONFIG_MACH_SUN50I) -static void sunxi_usb_phy_config(struct sunxi_usb_phy *phy) -{ -#if defined CONFIG_MACH_SUNXI_H3_H5 - if (phy->id == 0) - clrbits_le32(SUNXI_USBPHY_BASE + REG_PHY_UNK_H3, 0x01); -#endif - clrbits_le32(phy->base + REG_PMU_UNK_H3, 0x02); -} -#elif defined CONFIG_MACH_SUN8I_A83T -static void sunxi_usb_phy_config(struct sunxi_usb_phy *phy) -{ -} -#else -static void sunxi_usb_phy_config(struct sunxi_usb_phy *phy) -{ - /* The following comments are machine - * translated from Chinese, you have been warned! - */ - - /* Regulation 45 ohms */ - if (phy->id == 0) - usb_phy_write(phy, 0x0c, 0x01, 1); - - /* adjust PHY's magnitude and rate */ - usb_phy_write(phy, 0x20, 0x14, 5); - - /* threshold adjustment disconnect */ -#if defined CONFIG_MACH_SUN5I || defined CONFIG_MACH_SUN7I - usb_phy_write(phy, 0x2a, 2, 2); -#else - usb_phy_write(phy, 0x2a, 3, 2); -#endif - - return; -} -#endif - -static void sunxi_usb_phy_passby(struct sunxi_usb_phy *phy, int enable) -{ - unsigned long bits = 0; - void *addr; - - addr = (void *)phy->base + SUNXI_USB_PMU_IRQ_ENABLE; - - bits = SUNXI_EHCI_AHB_ICHR8_EN | - SUNXI_EHCI_AHB_INCR4_BURST_EN | - SUNXI_EHCI_AHB_INCRX_ALIGN_EN | - SUNXI_EHCI_ULPI_BYPASS_EN; - -#ifdef CONFIG_MACH_SUN8I_A83T - if (phy->id == 2) - bits |= SUNXI_EHCI_HS_FORCE | - SUNXI_EHCI_CONNECT_INT | - SUNXI_EHCI_HSIC; -#endif - - if (enable) - setbits_le32(addr, bits); - else - clrbits_le32(addr, bits); - - return; -} - -void sunxi_usb_phy_enable_squelch_detect(int index, int enable) -{ -#ifndef CONFIG_MACH_SUN8I_A83T - struct sunxi_usb_phy *phy = &sunxi_usb_phy[index]; - - usb_phy_write(phy, 0x3c, enable ? 0 : 2, 2); -#endif -} - -void sunxi_usb_phy_init(int index) -{ - struct sunxi_usb_phy *phy = &sunxi_usb_phy[index]; - struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; - - phy->init_count++; - if (phy->init_count != 1) - return; - - setbits_le32(&ccm->usb_clk_cfg, phy->usb_rst_mask); - - sunxi_usb_phy_config(phy); - - if (phy->id != 0) - sunxi_usb_phy_passby(phy, SUNXI_USB_PASSBY_EN); - -#ifdef CONFIG_MACH_SUN8I_A83T - if (phy->id == 0) { - setbits_le32(SUNXI_USB0_BASE + SUNXI_USB_CSR, - SUNXI_PHY_CTL_VBUSVLDEXT); - clrbits_le32(SUNXI_USB0_BASE + SUNXI_USB_CSR, - SUNXI_PHY_CTL_SIDDQ); - } -#endif -} - -void sunxi_usb_phy_exit(int index) -{ - struct sunxi_usb_phy *phy = &sunxi_usb_phy[index]; - struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; - - phy->init_count--; - if (phy->init_count != 0) - return; - - if (phy->id != 0) - sunxi_usb_phy_passby(phy, !SUNXI_USB_PASSBY_EN); - -#ifdef CONFIG_MACH_SUN8I_A83T - if (phy->id == 0) { - setbits_le32(SUNXI_USB0_BASE + SUNXI_USB_CSR, - SUNXI_PHY_CTL_SIDDQ); - } -#endif - - clrbits_le32(&ccm->usb_clk_cfg, phy->usb_rst_mask); -} - -void sunxi_usb_phy_power_on(int index) -{ - struct sunxi_usb_phy *phy = &sunxi_usb_phy[index]; - - if (initial_usb_scan_delay) { - mdelay(initial_usb_scan_delay); - initial_usb_scan_delay = 0; - } - - phy->power_on_count++; - if (phy->power_on_count != 1) - return; - - if (phy->gpio_vbus >= 0) - gpio_set_value(phy->gpio_vbus, 1); -} - -void sunxi_usb_phy_power_off(int index) -{ - struct sunxi_usb_phy *phy = &sunxi_usb_phy[index]; - - phy->power_on_count--; - if (phy->power_on_count != 0) - return; - - if (phy->gpio_vbus >= 0) - gpio_set_value(phy->gpio_vbus, 0); -} - -int sunxi_usb_phy_vbus_detect(int index) -{ - struct sunxi_usb_phy *phy = &sunxi_usb_phy[index]; - int err, retries = 3; - - if (phy->gpio_vbus_det < 0) - return phy->gpio_vbus_det; - - err = gpio_get_value(phy->gpio_vbus_det); - /* - * Vbus may have been provided by the board and just been turned of - * some milliseconds ago on reset, what we're measuring then is a - * residual charge on Vbus, sleep a bit and try again. - */ - while (err > 0 && retries--) { - mdelay(100); - err = gpio_get_value(phy->gpio_vbus_det); - } - - return err; -} - -int sunxi_usb_phy_id_detect(int index) -{ - struct sunxi_usb_phy *phy = &sunxi_usb_phy[index]; - - if (phy->gpio_id_det < 0) - return phy->gpio_id_det; - - return gpio_get_value(phy->gpio_id_det); -} - -int sunxi_usb_phy_probe(void) -{ - struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; - struct sunxi_usb_phy *phy; - int i, ret = 0; - - for (i = 0; i < CONFIG_SUNXI_USB_PHYS; i++) { - phy = &sunxi_usb_phy[i]; - - phy->gpio_vbus = get_vbus_gpio(i); - if (phy->gpio_vbus >= 0) { - ret = gpio_request(phy->gpio_vbus, "usb_vbus"); - if (ret) - return ret; - ret = gpio_direction_output(phy->gpio_vbus, 0); - if (ret) - return ret; - } - - phy->gpio_vbus_det = get_vbus_detect_gpio(i); - if (phy->gpio_vbus_det >= 0) { - ret = gpio_request(phy->gpio_vbus_det, "usb_vbus_det"); - if (ret) - return ret; - ret = gpio_direction_input(phy->gpio_vbus_det); - if (ret) - return ret; - } - - phy->gpio_id_det = get_id_detect_gpio(i); - if (phy->gpio_id_det >= 0) { - ret = gpio_request(phy->gpio_id_det, "usb_id_det"); - if (ret) - return ret; - ret = gpio_direction_input(phy->gpio_id_det); - if (ret) - return ret; - sunxi_gpio_set_pull(phy->gpio_id_det, - SUNXI_GPIO_PULL_UP); - } - } - - setbits_le32(&ccm->usb_clk_cfg, CCM_USB_CTRL_PHYGATE); - - return 0; -} - -int sunxi_usb_phy_remove(void) -{ - struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; - struct sunxi_usb_phy *phy; - int i; - - clrbits_le32(&ccm->usb_clk_cfg, CCM_USB_CTRL_PHYGATE); - - for (i = 0; i < CONFIG_SUNXI_USB_PHYS; i++) { - phy = &sunxi_usb_phy[i]; - - if (phy->gpio_vbus >= 0) - gpio_free(phy->gpio_vbus); - - if (phy->gpio_vbus_det >= 0) - gpio_free(phy->gpio_vbus_det); - - if (phy->gpio_id_det >= 0) - gpio_free(phy->gpio_id_det); - } - - return 0; -} diff --git a/arch/arm/mach-uniphier/board_late_init.c b/arch/arm/mach-uniphier/board_late_init.c index 9dff3f16a06..6a995728d4b 100644 --- a/arch/arm/mach-uniphier/board_late_init.c +++ b/arch/arm/mach-uniphier/board_late_init.c @@ -38,7 +38,7 @@ static int uniphier_set_fdt_file(void) char dtb_name[256]; int buf_len = sizeof(dtb_name); - if (env_get("fdt_file")) + if (env_get("fdtfile")) return 0; /* do nothing if it is already set */ compat = fdt_stringlist_get(gd->fdt_blob, 0, "compatible", 0, NULL); @@ -56,7 +56,7 @@ static int uniphier_set_fdt_file(void) strncat(dtb_name, ".dtb", buf_len); - return env_set("fdt_file", dtb_name); + return env_set("fdtfile", dtb_name); } int board_late_init(void) diff --git a/arch/nds32/include/asm/bitops.h b/arch/nds32/include/asm/bitops.h index 7ee37c37bc8..f1cdcf3e65d 100644 --- a/arch/nds32/include/asm/bitops.h +++ b/arch/nds32/include/asm/bitops.h @@ -44,6 +44,8 @@ static inline void __set_bit(int nr, void *addr) *a |= mask; } +#define PLATFORM__SET_BIT + extern void clear_bit(int nr, void *addr); static inline void __clear_bit(int nr, void *addr) @@ -59,6 +61,8 @@ static inline void __clear_bit(int nr, void *addr) local_irq_restore(flags); } +#define PLATFORM__CLEAR_BIT + extern void change_bit(int nr, void *addr); static inline void __change_bit(int nr, void *addr) diff --git a/arch/nios2/include/asm/bitops/non-atomic.h b/arch/nios2/include/asm/bitops/non-atomic.h index 697cc2b7e0f..f746819b43b 100644 --- a/arch/nios2/include/asm/bitops/non-atomic.h +++ b/arch/nios2/include/asm/bitops/non-atomic.h @@ -20,6 +20,8 @@ static inline void __set_bit(int nr, volatile unsigned long *addr) *p |= mask; } +#define PLATFORM__SET_BIT + static inline void __clear_bit(int nr, volatile unsigned long *addr) { unsigned long mask = BIT_MASK(nr); @@ -28,6 +30,8 @@ static inline void __clear_bit(int nr, volatile unsigned long *addr) *p &= ~mask; } +#define PLATFORM__CLEAR_BIT + /** * __change_bit - Toggle a bit in memory * @nr: the bit to change diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index c50be37c979..20a43d88e37 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -8,12 +8,12 @@ choice prompt "Target select" optional -config TARGET_NX25_AE250 - bool "Support nx25-ae250" +config TARGET_AX25_AE350 + bool "Support ax25-ae350" endchoice -source "board/AndesTech/nx25-ae250/Kconfig" +source "board/AndesTech/ax25-ae350/Kconfig" choice prompt "CPU selection" diff --git a/arch/riscv/config.mk b/arch/riscv/config.mk index a7448e2095a..219e66683d2 100644 --- a/arch/riscv/config.mk +++ b/arch/riscv/config.mk @@ -19,15 +19,20 @@ endif ifdef CONFIG_32BIT PLATFORM_LDFLAGS += -m $(32bit-emul) +EFI_LDS := elf_riscv32_efi.lds endif ifdef CONFIG_64BIT PLATFORM_LDFLAGS += -m $(64bit-emul) +EFI_LDS := elf_riscv64_efi.lds endif CONFIG_STANDALONE_LOAD_ADDR = 0x00000000 \ -T $(srctree)/examples/standalone/riscv.lds PLATFORM_CPPFLAGS += -ffixed-gp -fpic -PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -gdwarf-2 +PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -gdwarf-2 -ffunction-sections LDFLAGS_u-boot += --gc-sections -static -pie + +EFI_CRT0 := crt0_riscv_efi.o +EFI_RELOC := reloc_riscv_efi.o diff --git a/arch/riscv/cpu/nx25/Makefile b/arch/riscv/cpu/ax25/Makefile index c3f164c1226..c3f164c1226 100644 --- a/arch/riscv/cpu/nx25/Makefile +++ b/arch/riscv/cpu/ax25/Makefile diff --git a/arch/riscv/cpu/nx25/cpu.c b/arch/riscv/cpu/ax25/cpu.c index 091e9ef59e0..ab05b57d4fb 100644 --- a/arch/riscv/cpu/nx25/cpu.c +++ b/arch/riscv/cpu/ax25/cpu.c @@ -28,5 +28,5 @@ int cleanup_before_linux(void) int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { disable_interrupts(); - panic("nx25-ae250 wdt not support yet.\n"); + panic("ax25-ae350 wdt not support yet.\n"); } diff --git a/arch/riscv/cpu/nx25/start.S b/arch/riscv/cpu/ax25/start.S index 7cd7755190c..7cd7755190c 100644 --- a/arch/riscv/cpu/nx25/start.S +++ b/arch/riscv/cpu/ax25/start.S diff --git a/arch/riscv/cpu/nx25/u-boot.lds b/arch/riscv/cpu/ax25/u-boot.lds index 86ebc9f4bb4..1589babf6c3 100644 --- a/arch/riscv/cpu/nx25/u-boot.lds +++ b/arch/riscv/cpu/ax25/u-boot.lds @@ -11,7 +11,7 @@ SECTIONS . = ALIGN(4); .text : { - arch/riscv/cpu/nx25/start.o (.text) + arch/riscv/cpu/ax25/start.o (.text) *(.text) } @@ -39,6 +39,22 @@ SECTIONS . = ALIGN(4); + .efi_runtime : { + __efi_runtime_start = .; + *(efi_runtime_text) + *(efi_runtime_data) + __efi_runtime_stop = .; + } + + .efi_runtime_rel : { + __efi_runtime_rel_start = .; + *(.relaefi_runtime_text) + *(.relaefi_runtime_data) + __efi_runtime_rel_stop = .; + } + + . = ALIGN(4); + /DISCARD/ : { *(.rela.plt*) } .rela.dyn : { __rel_dyn_start = .; diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile index 793677524a3..a1b06ffc6f0 100644 --- a/arch/riscv/dts/Makefile +++ b/arch/riscv/dts/Makefile @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0+ -dtb-$(CONFIG_TARGET_NX25_AE250) += ae250.dtb +dtb-$(CONFIG_TARGET_AX25_AE350) += ae350.dtb targets += $(dtb-y) DTC_FLAGS += -R 4 -p 0x1000 diff --git a/arch/riscv/dts/ae250.dts b/arch/riscv/dts/ae250.dts deleted file mode 100644 index 9a38345e360..00000000000 --- a/arch/riscv/dts/ae250.dts +++ /dev/null @@ -1,97 +0,0 @@ -/dts-v1/; -/ { - compatible = "riscv32 nx25"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&intc>; - - aliases { - uart0 = &serial0; - ethernet0 = &mac0; - spi0 = &spi; - } ; - - chosen { - bootargs = "console=ttyS0,38400n8 earlyprintk=uart8250-32bit,0xf0300000 debug loglevel=7"; - stdout-path = "uart0:38400n8"; - tick-timer = &timer0; - }; - - memory@0 { - device_type = "memory"; - reg = <0x00000000 0x40000000>; - }; - - spiclk: virt_100mhz { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <100000000>; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - cpu@0 { - compatible = "andestech,n13"; - reg = <0>; - /* FIXME: to fill correct frqeuency */ - clock-frequency = <60000000>; - }; - }; - - intc: interrupt-controller { - compatible = "andestech,atnointc010"; - #interrupt-cells = <1>; - interrupt-controller; - }; - - serial0: serial@f0300000 { - compatible = "andestech,uart16550", "ns16550a"; - reg = <0xf0300000 0x1000>; - interrupts = <7 4>; - clock-frequency = <19660800>; - reg-shift = <2>; - reg-offset = <32>; - no-loopback-test = <1>; - }; - - timer0: timer@f0400000 { - compatible = "andestech,atcpit100"; - reg = <0xf0400000 0x1000>; - interrupts = <2 4>; - clock-frequency = <40000000>; - }; - - mac0: mac@e0100000 { - compatible = "andestech,atmac100"; - reg = <0xe0100000 0x1000>; - interrupts = <25 4>; - }; - - mmc0: mmc@f0e00000 { - compatible = "andestech,atsdc010"; - max-frequency = <100000000>; - fifo-depth = <0x10>; - reg = <0xf0e00000 0x1000>; - interrupts = <17 4>; - cap-sd-highspeed; - }; - - spi: spi@f0b00000 { - compatible = "andestech,atcspi200"; - reg = <0xf0b00000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - num-cs = <1>; - clocks = <&spiclk>; - interrupts = <3 4>; - flash@0 { - compatible = "spi-flash"; - spi-max-frequency = <50000000>; - reg = <0>; - spi-cpol; - spi-cpha; - }; - }; - -}; diff --git a/arch/riscv/dts/ae350.dts b/arch/riscv/dts/ae350.dts new file mode 100644 index 00000000000..2927e4151b0 --- /dev/null +++ b/arch/riscv/dts/ae350.dts @@ -0,0 +1,149 @@ +/dts-v1/; + +/ { + #address-cells = <2>; + #size-cells = <2>; + compatible = "andestech,ax25"; + model = "andestech,ax25"; + + aliases { + uart0 = &serial0; + spi0 = &spi; + } ; + + chosen { + bootargs = "console=ttyS0,38400n8 earlyprintk=uart8250-32bit,0xf0300000 debug loglevel=7"; + stdout-path = "uart0:38400n8"; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + timebase-frequency = <10000000>; + CPU0: cpu@0 { + device_type = "cpu"; + reg = <0>; + status = "okay"; + compatible = "riscv"; + riscv,isa = "rv64imafdc"; + mmu-type = "riscv,sv39"; + clock-frequency = <60000000>; + CPU0_intc: interrupt-controller { + #interrupt-cells = <1>; + interrupt-controller; + compatible = "riscv,cpu-intc"; + }; + }; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x00000000 0x0 0x40000000>; + }; + + soc { + #address-cells = <2>; + #size-cells = <2>; + compatible = "andestech,riscv-ae350-soc"; + ranges; + }; + + plmt0@e6000000 { + compatible = "riscv,plmt0"; + interrupts-extended = <&CPU0_intc 7>; + reg = <0x0 0xe6000000 0x0 0x100000>; + }; + + plic0: interrupt-controller@e4000000 { + compatible = "riscv,plic0"; + #address-cells = <2>; + #interrupt-cells = <2>; + interrupt-controller; + reg = <0x0 0xe4000000 0x0 0x2000000>; + riscv,ndev=<31>; + interrupts-extended = <&CPU0_intc 11 &CPU0_intc 9>; + }; + + plic1: interrupt-controller@e6400000 { + compatible = "riscv,plic1"; + #address-cells = <2>; + #interrupt-cells = <2>; + interrupt-controller; + reg = <0x0 0xe6400000 0x0 0x400000>; + riscv,ndev=<1>; + interrupts-extended = <&CPU0_intc 3>; + }; + + spiclk: virt_100mhz { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <100000000>; + }; + + timer0: timer@f0400000 { + compatible = "andestech,atcpit100"; + reg = <0x0 0xf0400000 0x0 0x1000>; + clock-frequency = <40000000>; + interrupts = <3 4>; + interrupt-parent = <&plic0>; + }; + + serial0: serial@f0300000 { + compatible = "andestech,uart16550", "ns16550a"; + reg = <0x0 0xf0300000 0x0 0x1000>; + interrupts = <9 4>; + clock-frequency = <19660800>; + reg-shift = <2>; + reg-offset = <32>; + no-loopback-test = <1>; + interrupt-parent = <&plic0>; + }; + + mac0: mac@e0100000 { + compatible = "andestech,atmac100"; + reg = <0x0 0xe0100000 0x0 0x1000>; + interrupts = <19 4>; + interrupt-parent = <&plic0>; + }; + + mmc0: mmc@f0e00000 { + compatible = "andestech,atfsdc010"; + max-frequency = <100000000>; + clock-freq-min-max = <400000 100000000>; + fifo-depth = <0x10>; + reg = <0x0 0xf0e00000 0x0 0x1000>; + interrupts = <18 4>; + cap-sd-highspeed; + interrupt-parent = <&plic0>; + }; + + smc0: smc@e0400000 { + compatible = "andestech,atfsmc020"; + reg = <0x0 0xe0400000 0x0 0x1000>; + }; + + nor@0,0 { + compatible = "cfi-flash"; + reg = <0x0 0x88000000 0x0 0x1000>; + bank-width = <2>; + device-width = <1>; + }; + + spi: spi@f0b00000 { + compatible = "andestech,atcspi200"; + reg = <0x0 0xf0b00000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + num-cs = <1>; + clocks = <&spiclk>; + interrupts = <3 4>; + interrupt-parent = <&plic0>; + flash@0 { + compatible = "spi-flash"; + spi-max-frequency = <50000000>; + reg = <0>; + spi-cpol; + spi-cpha; + }; + }; +}; diff --git a/arch/riscv/include/asm/bitops.h b/arch/riscv/include/asm/bitops.h index 55d420fdfb5..536629bbecb 100644 --- a/arch/riscv/include/asm/bitops.h +++ b/arch/riscv/include/asm/bitops.h @@ -42,6 +42,8 @@ static inline void __set_bit(int nr, void *addr) *a |= mask; } +#define PLATFORM__SET_BIT + static inline void __clear_bit(int nr, void *addr) { int *a = (int *)addr; @@ -52,6 +54,8 @@ static inline void __clear_bit(int nr, void *addr) *a &= ~mask; } +#define PLATFORM__CLEAR_BIT + static inline void __change_bit(int nr, void *addr) { int mask; diff --git a/arch/riscv/include/asm/mach-types.h b/arch/riscv/include/asm/mach-types.h index 93afff70b35..f219cedfd31 100644 --- a/arch/riscv/include/asm/mach-types.h +++ b/arch/riscv/include/asm/mach-types.h @@ -12,18 +12,18 @@ extern unsigned int __machine_arch_type; #endif -#define MACH_TYPE_AE250 1 +#define MACH_TYPE_AE350 1 -#ifdef CONFIG_ARCH_AE250 +#ifdef CONFIG_ARCH_AE350 # ifdef machine_arch_type # undef machine_arch_type # define machine_arch_type __machine_arch_type # else -# define machine_arch_type MACH_TYPE_AE250 +# define machine_arch_type MACH_TYPE_AE350 # endif -# define machine_is_ae250() (machine_arch_type == MACH_TYPE_AE250) +# define machine_is_ae350() (machine_arch_type == MACH_TYPE_AE350) #else -# define machine_is_ae250() (1) +# define machine_is_ae350() (1) #endif #endif /* __ASM_RISCV_MACH_TYPE_H */ diff --git a/arch/riscv/include/asm/setjmp.h b/arch/riscv/include/asm/setjmp.h new file mode 100644 index 00000000000..72383d43303 --- /dev/null +++ b/arch/riscv/include/asm/setjmp.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2018 Alexander Graf <agraf@suse.de> + */ + +#ifndef _SETJMP_H_ +#define _SETJMP_H_ 1 + +/* + * This really should be opaque, but the EFI implementation wrongly + * assumes that a 'struct jmp_buf_data' is defined. + */ +struct jmp_buf_data { + /* x2, x8, x9, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, sp */ + unsigned long s_regs[12]; /* s0 - s11 */ + unsigned long ra; + unsigned long sp; +}; + +typedef struct jmp_buf_data jmp_buf[1]; + +int setjmp(jmp_buf jmp); +void longjmp(jmp_buf jmp, int ret); + +#endif /* _SETJMP_H_ */ diff --git a/arch/riscv/include/asm/u-boot-riscv.h b/arch/riscv/include/asm/u-boot-riscv.h index c4c068f9e24..49febd58810 100644 --- a/arch/riscv/include/asm/u-boot-riscv.h +++ b/arch/riscv/include/asm/u-boot-riscv.h @@ -16,5 +16,6 @@ int cleanup_before_linux(void); /* board/.../... */ int board_init(void); +void board_quiesce_devices(void); #endif /* _U_BOOT_RISCV_H_ */ diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile index 0b671f70863..cc562f935a7 100644 --- a/arch/riscv/lib/Makefile +++ b/arch/riscv/lib/Makefile @@ -10,3 +10,15 @@ obj-$(CONFIG_CMD_BOOTM) += bootm.o obj-$(CONFIG_CMD_GO) += boot.o obj-y += cache.o obj-y += interrupts.o +obj-y += setjmp.o + +# For building EFI apps +CFLAGS_$(EFI_CRT0) := $(CFLAGS_EFI) +CFLAGS_REMOVE_$(EFI_CRT0) := $(CFLAGS_NON_EFI) + +CFLAGS_$(EFI_RELOC) := $(CFLAGS_EFI) +CFLAGS_REMOVE_$(EFI_RELOC) := $(CFLAGS_NON_EFI) + +extra-$(CONFIG_CMD_BOOTEFI_HELLO_COMPILE) += $(EFI_CRT0) $(EFI_RELOC) +extra-$(CONFIG_CMD_BOOTEFI_SELFTEST) += $(EFI_CRT0) $(EFI_RELOC) +extra-$(CONFIG_EFI) += $(EFI_CRT0) $(EFI_RELOC) diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c index 8ede0485d47..2610a57bbff 100644 --- a/arch/riscv/lib/bootm.c +++ b/arch/riscv/lib/bootm.c @@ -15,6 +15,10 @@ DECLARE_GLOBAL_DATA_PTR; +__weak void board_quiesce_devices(void) +{ +} + int arch_fixup_fdt(void *blob) { return 0; diff --git a/arch/riscv/lib/crt0_riscv_efi.S b/arch/riscv/lib/crt0_riscv_efi.S new file mode 100644 index 00000000000..18f61f515ac --- /dev/null +++ b/arch/riscv/lib/crt0_riscv_efi.S @@ -0,0 +1,151 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * crt0-efi-riscv.S - PE/COFF header for RISC-V EFI applications + * + * Copright (C) 2014 Linaro Ltd. <ard.biesheuvel@linaro.org> + * Copright (C) 2018 Alexander Graf <agraf@suse.de> + * + * This file is inspired by arch/arm/lib/crt0_aarch64_efi.S + */ + +#include <asm-generic/pe.h> + +#if __riscv_xlen == 64 +#define SIZE_LONG 8 +#define SAVE_LONG(reg, idx) sd reg, (idx*SIZE_LONG)(sp) +#define LOAD_LONG(reg, idx) ld reg, (idx*SIZE_LONG)(sp) +#define PE_MACHINE 0x5064 +#else +#define SIZE_LONG 4 +#define SAVE_LONG(reg, idx) sw reg, (idx*SIZE_LONG)(sp) +#define LOAD_LONG(reg, idx) lw reg, (idx*SIZE_LONG)(sp) +#define PE_MACHINE 0x5032 +#endif + + + .section .text.head + + /* + * Magic "MZ" signature for PE/COFF + */ + .globl ImageBase +ImageBase: + .ascii "MZ" + .skip 58 /* 'MZ' + pad + offset == 64 */ + .long pe_header - ImageBase /* Offset to the PE header */ +pe_header: + .ascii "PE" + .short 0 +coff_header: + .short PE_MACHINE /* RISC-V 64/32-bit */ + .short 2 /* nr_sections */ + .long 0 /* TimeDateStamp */ + .long 0 /* PointerToSymbolTable */ + .long 1 /* NumberOfSymbols */ + .short section_table - optional_header /* SizeOfOptionalHeader */ + /* + * Characteristics: IMAGE_FILE_DEBUG_STRIPPED | + * IMAGE_FILE_EXECUTABLE_IMAGE | IMAGE_FILE_LINE_NUMS_STRIPPED + */ + .short 0x206 +optional_header: + .short 0x20b /* PE32+ format */ + .byte 0x02 /* MajorLinkerVersion */ + .byte 0x14 /* MinorLinkerVersion */ + .long _edata - _start /* SizeOfCode */ + .long 0 /* SizeOfInitializedData */ + .long 0 /* SizeOfUninitializedData */ + .long _start - ImageBase /* AddressOfEntryPoint */ + .long _start - ImageBase /* BaseOfCode */ + +extra_header_fields: + .quad 0 /* ImageBase */ + .long 0x20 /* SectionAlignment */ + .long 0x8 /* FileAlignment */ + .short 0 /* MajorOperatingSystemVersion */ + .short 0 /* MinorOperatingSystemVersion */ + .short 0 /* MajorImageVersion */ + .short 0 /* MinorImageVersion */ + .short 0 /* MajorSubsystemVersion */ + .short 0 /* MinorSubsystemVersion */ + .long 0 /* Win32VersionValue */ + + .long _edata - ImageBase /* SizeOfImage */ + + /* + * Everything before the kernel image is considered part of the header + */ + .long _start - ImageBase /* SizeOfHeaders */ + .long 0 /* CheckSum */ + .short IMAGE_SUBSYSTEM_EFI_APPLICATION /* Subsystem */ + .short 0 /* DllCharacteristics */ + .quad 0 /* SizeOfStackReserve */ + .quad 0 /* SizeOfStackCommit */ + .quad 0 /* SizeOfHeapReserve */ + .quad 0 /* SizeOfHeapCommit */ + .long 0 /* LoaderFlags */ + .long 0x6 /* NumberOfRvaAndSizes */ + + .quad 0 /* ExportTable */ + .quad 0 /* ImportTable */ + .quad 0 /* ResourceTable */ + .quad 0 /* ExceptionTable */ + .quad 0 /* CertificationTable */ + .quad 0 /* BaseRelocationTable */ + + /* Section table */ +section_table: + + /* + * The EFI application loader requires a relocation section + * because EFI applications must be relocatable. This is a + * dummy section as far as we are concerned. + */ + .ascii ".reloc" + .byte 0 + .byte 0 /* end of 0 padding of section name */ + .long 0 + .long 0 + .long 0 /* SizeOfRawData */ + .long 0 /* PointerToRawData */ + .long 0 /* PointerToRelocations */ + .long 0 /* PointerToLineNumbers */ + .short 0 /* NumberOfRelocations */ + .short 0 /* NumberOfLineNumbers */ + .long 0x42100040 /* Characteristics (section flags) */ + + + .ascii ".text" + .byte 0 + .byte 0 + .byte 0 /* end of 0 padding of section name */ + .long _edata - _start /* VirtualSize */ + .long _start - ImageBase /* VirtualAddress */ + .long _edata - _start /* SizeOfRawData */ + .long _start - ImageBase /* PointerToRawData */ + + .long 0 /* PointerToRelocations (0 for executables) */ + .long 0 /* PointerToLineNumbers (0 for executables) */ + .short 0 /* NumberOfRelocations (0 for executables) */ + .short 0 /* NumberOfLineNumbers (0 for executables) */ + .long 0xe0500020 /* Characteristics (section flags) */ + +_start: + addi sp, sp, -(SIZE_LONG * 3) + SAVE_LONG(a0, 0) + SAVE_LONG(a1, 1) + SAVE_LONG(ra, 2) + + lla a0, ImageBase + lla a1, _DYNAMIC + call _relocate + bne a0, zero, 0f + + LOAD_LONG(a1, 1) + LOAD_LONG(a0, 0) + call efi_main + + LOAD_LONG(ra, 2) + +0: addi sp, sp, (SIZE_LONG * 3) + ret diff --git a/arch/riscv/lib/elf_riscv32_efi.lds b/arch/riscv/lib/elf_riscv32_efi.lds new file mode 100644 index 00000000000..629705fc280 --- /dev/null +++ b/arch/riscv/lib/elf_riscv32_efi.lds @@ -0,0 +1,71 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * U-Boot riscv32 EFI linker script + * + * SPDX-License-Identifier: BSD-2-Clause + * + * Modified from arch/arm/lib/elf_aarch64_efi.lds + */ + +OUTPUT_FORMAT("elf32-littleriscv", "elf32-littleriscv", "elf32-littleriscv") +OUTPUT_ARCH(riscv) +ENTRY(_start) +SECTIONS +{ + .text 0x0 : { + _text = .; + *(.text.head) + *(.text) + *(.text.*) + *(.gnu.linkonce.t.*) + *(.srodata) + *(.rodata*) + . = ALIGN(16); + } + _etext = .; + _text_size = . - _text; + .dynamic : { *(.dynamic) } + .data : { + _data = .; + *(.sdata) + *(.data) + *(.data1) + *(.data.*) + *(.got.plt) + *(.got) + + /* + * The EFI loader doesn't seem to like a .bss section, so we + * stick it all into .data: + */ + . = ALIGN(16); + _bss = .; + *(.sbss) + *(.scommon) + *(.dynbss) + *(.bss) + *(.bss.*) + *(COMMON) + . = ALIGN(16); + _bss_end = .; + _edata = .; + } + .rela.dyn : { *(.rela.dyn) } + .rela.plt : { *(.rela.plt) } + .rela.got : { *(.rela.got) } + .rela.data : { *(.rela.data) *(.rela.data*) } + _data_size = . - _etext; + + . = ALIGN(4096); + .dynsym : { *(.dynsym) } + . = ALIGN(4096); + .dynstr : { *(.dynstr) } + . = ALIGN(4096); + .note.gnu.build-id : { *(.note.gnu.build-id) } + /DISCARD/ : { + *(.rel.reloc) + *(.eh_frame) + *(.note.GNU-stack) + } + .comment 0 : { *(.comment) } +} diff --git a/arch/riscv/lib/elf_riscv64_efi.lds b/arch/riscv/lib/elf_riscv64_efi.lds new file mode 100644 index 00000000000..aece030c37b --- /dev/null +++ b/arch/riscv/lib/elf_riscv64_efi.lds @@ -0,0 +1,71 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * U-Boot riscv64 EFI linker script + * + * SPDX-License-Identifier: BSD-2-Clause + * + * Modified from arch/arm/lib/elf_aarch64_efi.lds + */ + +OUTPUT_FORMAT("elf64-littleriscv", "elf64-littleriscv", "elf64-littleriscv") +OUTPUT_ARCH(riscv) +ENTRY(_start) +SECTIONS +{ + .text 0x0 : { + _text = .; + *(.text.head) + *(.text) + *(.text.*) + *(.gnu.linkonce.t.*) + *(.srodata) + *(.rodata*) + . = ALIGN(16); + } + _etext = .; + _text_size = . - _text; + .dynamic : { *(.dynamic) } + .data : { + _data = .; + *(.sdata) + *(.data) + *(.data1) + *(.data.*) + *(.got.plt) + *(.got) + + /* + * The EFI loader doesn't seem to like a .bss section, so we + * stick it all into .data: + */ + . = ALIGN(16); + _bss = .; + *(.sbss) + *(.scommon) + *(.dynbss) + *(.bss) + *(.bss.*) + *(COMMON) + . = ALIGN(16); + _bss_end = .; + _edata = .; + } + .rela.dyn : { *(.rela.dyn) } + .rela.plt : { *(.rela.plt) } + .rela.got : { *(.rela.got) } + .rela.data : { *(.rela.data) *(.rela.data*) } + _data_size = . - _etext; + + . = ALIGN(4096); + .dynsym : { *(.dynsym) } + . = ALIGN(4096); + .dynstr : { *(.dynstr) } + . = ALIGN(4096); + .note.gnu.build-id : { *(.note.gnu.build-id) } + /DISCARD/ : { + *(.rel.reloc) + *(.eh_frame) + *(.note.GNU-stack) + } + .comment 0 : { *(.comment) } +} diff --git a/arch/riscv/lib/reloc_riscv_efi.c b/arch/riscv/lib/reloc_riscv_efi.c new file mode 100644 index 00000000000..8b4b2b1d8f6 --- /dev/null +++ b/arch/riscv/lib/reloc_riscv_efi.c @@ -0,0 +1,98 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* reloc_riscv.c - position independent ELF shared object relocator + Copyright (C) 2018 Alexander Graf <agraf@suse.de> + Copyright (C) 2014 Linaro Ltd. <ard.biesheuvel@linaro.org> + Copyright (C) 1999 Hewlett-Packard Co. + Contributed by David Mosberger <davidm@hpl.hp.com>. + + All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions + are met: + + * Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above + copyright notice, this list of conditions and the following + disclaimer in the documentation and/or other materials + provided with the distribution. + * Neither the name of Hewlett-Packard Co. nor the names of its + contributors may be used to endorse or promote products derived + from this software without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS + BE LIABLE FOR ANYDIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, + OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR + TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + SUCH DAMAGE. +*/ + +#include <efi.h> + +#include <elf.h> + +#if __riscv_xlen == 64 +#define Elf_Dyn Elf64_Dyn +#define Elf_Rela Elf64_Rela +#define ELF_R_TYPE ELF64_R_TYPE +#else +#define Elf_Dyn Elf32_Dyn +#define Elf_Rela Elf32_Rela +#define ELF_R_TYPE ELF32_R_TYPE +#endif + +efi_status_t _relocate(long ldbase, Elf_Dyn *dyn, efi_handle_t image, + struct efi_system_table *systab) +{ + long relsz = 0, relent = 0; + Elf_Rela *rel = 0; + unsigned long *addr; + int i; + + for (i = 0; dyn[i].d_tag != DT_NULL; ++i) { + switch (dyn[i].d_tag) { + case DT_RELA: + rel = (Elf_Rela *)((ulong)dyn[i].d_un.d_ptr + ldbase); + break; + case DT_RELASZ: + relsz = dyn[i].d_un.d_val; + break; + case DT_RELAENT: + relent = dyn[i].d_un.d_val; + break; + default: + break; + } + } + + if (!rel && relent == 0) + return EFI_SUCCESS; + + if (!rel || relent == 0) + return EFI_LOAD_ERROR; + + while (relsz > 0) { + /* apply the relocs */ + switch (ELF_R_TYPE(rel->r_info)) { + case R_RISCV_RELATIVE: + addr = (ulong *)(ldbase + rel->r_offset); + *addr = ldbase + rel->r_addend; + break; + default: + /* Panic */ + while (1) ; + } + rel = (Elf_Rela *)((char *)rel + relent); + relsz -= relent; + } + return EFI_SUCCESS; +} diff --git a/arch/riscv/lib/setjmp.S b/arch/riscv/lib/setjmp.S new file mode 100644 index 00000000000..8f5a6a23aad --- /dev/null +++ b/arch/riscv/lib/setjmp.S @@ -0,0 +1,65 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) 2018 Alexander Graf <agraf@suse.de> + */ + +#include <config.h> +#include <linux/linkage.h> + +#ifdef CONFIG_CPU_RISCV_64 +#define STORE_IDX(reg, idx) sd reg, (idx*8)(a0) +#define LOAD_IDX(reg, idx) ld reg, (idx*8)(a0) +#else +#define STORE_IDX(reg, idx) sw reg, (idx*4)(a0) +#define LOAD_IDX(reg, idx) lw reg, (idx*4)(a0) +#endif + +.pushsection .text.setjmp, "ax" +ENTRY(setjmp) + /* Preserve all callee-saved registers and the SP */ + STORE_IDX(s0, 0) + STORE_IDX(s1, 1) + STORE_IDX(s2, 2) + STORE_IDX(s3, 3) + STORE_IDX(s4, 4) + STORE_IDX(s5, 5) + STORE_IDX(s6, 6) + STORE_IDX(s7, 7) + STORE_IDX(s8, 8) + STORE_IDX(s9, 9) + STORE_IDX(s10, 10) + STORE_IDX(s11, 11) + STORE_IDX(ra, 12) + STORE_IDX(sp, 13) + li a0, 0 + ret +ENDPROC(setjmp) +.popsection + +.pushsection .text.longjmp, "ax" +ENTRY(longjmp) + LOAD_IDX(s0, 0) + LOAD_IDX(s1, 1) + LOAD_IDX(s2, 2) + LOAD_IDX(s3, 3) + LOAD_IDX(s4, 4) + LOAD_IDX(s5, 5) + LOAD_IDX(s6, 6) + LOAD_IDX(s7, 7) + LOAD_IDX(s8, 8) + LOAD_IDX(s9, 9) + LOAD_IDX(s10, 10) + LOAD_IDX(s11, 11) + LOAD_IDX(ra, 12) + LOAD_IDX(sp, 13) + + /* Move the return value in place, but return 1 if passed 0. */ + beq a1, zero, longjmp_1 + mv a0, a1 + ret + + longjmp_1: + li a0, 1 + ret +ENDPROC(longjmp) +.popsection diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c index d4ad020012e..cde0b055a67 100644 --- a/arch/sandbox/cpu/cpu.c +++ b/arch/sandbox/cpu/cpu.c @@ -9,6 +9,7 @@ #include <linux/libfdt.h> #include <os.h> #include <asm/io.h> +#include <asm/setjmp.h> #include <asm/state.h> #include <dm/root.h> @@ -164,3 +165,15 @@ ulong timer_get_boot_us(void) return (count - base_count) / 1000; } + +int setjmp(jmp_buf jmp) +{ + return os_setjmp((ulong *)jmp, sizeof(*jmp)); +} + +void longjmp(jmp_buf jmp, int ret) +{ + os_longjmp((ulong *)jmp, ret); + while (1) + ; +} diff --git a/arch/sandbox/cpu/os.c b/arch/sandbox/cpu/os.c index d76d0211a2d..5839932b005 100644 --- a/arch/sandbox/cpu/os.c +++ b/arch/sandbox/cpu/os.c @@ -7,6 +7,7 @@ #include <errno.h> #include <fcntl.h> #include <getopt.h> +#include <setjmp.h> #include <stdio.h> #include <stdint.h> #include <stdlib.h> @@ -628,3 +629,25 @@ void os_localtime(struct rtc_time *rt) rt->tm_yday = tm->tm_yday; rt->tm_isdst = tm->tm_isdst; } + +int os_setjmp(ulong *jmp, int size) +{ + jmp_buf dummy; + + /* + * We cannot rely on the struct name that jmp_buf uses, so use a + * local variable here + */ + if (size < sizeof(dummy)) { + printf("setjmp: jmpbuf is too small (%d bytes, need %d)\n", + size, sizeof(jmp_buf)); + return -ENOSPC; + } + + return setjmp((struct __jmp_buf_tag *)jmp); +} + +void os_longjmp(ulong *jmp, int ret) +{ + longjmp((struct __jmp_buf_tag *)jmp, ret); +} diff --git a/arch/sandbox/cpu/u-boot.lds b/arch/sandbox/cpu/u-boot.lds index f97abdfa050..3a6cf55eb99 100644 --- a/arch/sandbox/cpu/u-boot.lds +++ b/arch/sandbox/cpu/u-boot.lds @@ -18,6 +18,35 @@ SECTIONS __u_boot_sandbox_option_end = .; __bss_start = .; + + .__efi_runtime_start : { + *(.__efi_runtime_start) + } + + .efi_runtime : { + *(efi_runtime_text) + *(efi_runtime_data) + } + + .__efi_runtime_stop : { + *(.__efi_runtime_stop) + } + + .efi_runtime_rel_start : + { + *(.__efi_runtime_rel_start) + } + + .efi_runtime_rel : { + *(.relefi_runtime_text) + *(.relefi_runtime_data) + } + + .efi_runtime_rel_stop : + { + *(.__efi_runtime_rel_stop) + } + } INSERT BEFORE .data; diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts index 1fb8225fbb2..0ea2452742d 100644 --- a/arch/sandbox/dts/sandbox.dts +++ b/arch/sandbox/dts/sandbox.dts @@ -115,6 +115,10 @@ sandbox_pmic: sandbox_pmic { reg = <0x40>; }; + + mc34708: pmic@41 { + reg = <0x41>; + }; }; lcd { @@ -238,6 +242,10 @@ compatible = "google,sandbox-tpm"; }; + tpm2 { + compatible = "sandbox,tpm2"; + }; + triangle { compatible = "demo-shape"; colour = "cyan"; diff --git a/arch/sandbox/dts/sandbox64.dts b/arch/sandbox/dts/sandbox64.dts index d6efc011de5..48e420e721e 100644 --- a/arch/sandbox/dts/sandbox64.dts +++ b/arch/sandbox/dts/sandbox64.dts @@ -115,6 +115,10 @@ sandbox_pmic: sandbox_pmic { reg = <0x40>; }; + + mc34708: pmic@41 { + reg = <0x41>; + }; }; lcd { @@ -238,6 +242,10 @@ compatible = "google,sandbox-tpm"; }; + tpm2 { + compatible = "sandbox,tpm2"; + }; + triangle { compatible = "demo-shape"; colour = "cyan"; diff --git a/arch/sandbox/dts/sandbox_pmic.dtsi b/arch/sandbox/dts/sandbox_pmic.dtsi index 8a85cb9d6c0..403656f25e5 100644 --- a/arch/sandbox/dts/sandbox_pmic.dtsi +++ b/arch/sandbox/dts/sandbox_pmic.dtsi @@ -81,3 +81,36 @@ regulator-max-microvolt = <1500000>; }; }; + +&mc34708 { + compatible = "fsl,mc34708"; + + pmic_emul { + compatible = "sandbox,i2c-pmic"; + + reg-defaults = /bits/ 8 < + 0x00 0x80 0x08 0xff 0xff 0xff 0x2e 0x01 0x08 + 0x40 0x80 0x81 0x5f 0xff 0xfb 0x1e 0x80 0x18 + 0x00 0x00 0x0e 0x00 0x00 0x14 0x00 0x00 0x00 + 0x00 0x00 0x20 0x00 0x01 0x3a 0x00 0x00 0x00 + 0x00 0x00 0x00 0x00 0x00 0x40 0x00 0x00 0x00 + 0x42 0x21 0x00 0x00 0x00 0x00 0x00 0x00 0x00 + 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x30 0x5f + 0x01 0xff 0xff 0x00 0x00 0x00 0x00 0x7f 0xff + 0x92 0x49 0x24 0x59 0x6d 0x34 0x18 0xc1 0x8c + 0x00 0x60 0x18 0x51 0x48 0x45 0x14 0x51 0x45 + 0x00 0x06 0x32 0x00 0x00 0x00 0x06 0x9c 0x99 + 0x00 0x38 0x0a 0x00 0x38 0x0a 0x00 0x38 0x0a + 0x00 0x38 0x0a 0x84 0x00 0x00 0x00 0x00 0x00 + 0x80 0x90 0x8f 0xf8 0x00 0x04 0x00 0x00 0x00 + 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 + 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 + 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 + 0x01 0x31 0x7e 0x2b 0x03 0xfd 0xc0 0x36 0x1b + 0x60 0x06 0x00 0x00 0x00 0x00 0x00 0x00 0x00 + 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 + 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 + 0x00 0x00 0x00 + >; + }; +}; diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 683b1970e0a..5752bf547e6 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -27,10 +27,10 @@ testfdt3 = "/b-test"; testfdt5 = "/some-bus/c-test@5"; testfdt8 = "/a-test"; - fdt_dummy0 = "/translation-test@8000/dev@0,0"; - fdt_dummy1 = "/translation-test@8000/dev@1,100"; - fdt_dummy2 = "/translation-test@8000/dev@2,200"; - fdt_dummy3 = "/translation-test@8000/noxlatebus@3,300/dev@42"; + fdt-dummy0 = "/translation-test@8000/dev@0,0"; + fdt-dummy1 = "/translation-test@8000/dev@1,100"; + fdt-dummy2 = "/translation-test@8000/dev@2,200"; + fdt-dummy3 = "/translation-test@8000/noxlatebus@3,300/dev@42"; usb0 = &usb_0; usb1 = &usb_1; usb2 = &usb_2; @@ -227,6 +227,10 @@ sandbox_pmic: sandbox_pmic { reg = <0x40>; }; + + mc34708: pmic@41 { + reg = <0x41>; + }; }; adc@0 { @@ -418,6 +422,10 @@ clock-frequency = <1000000>; }; + tpm2 { + compatible = "sandbox,tpm2"; + }; + uart0: serial { compatible = "sandbox,serial"; u-boot,dm-pre-reloc; diff --git a/arch/sandbox/include/asm/setjmp.h b/arch/sandbox/include/asm/setjmp.h new file mode 100644 index 00000000000..1fe37c91cc3 --- /dev/null +++ b/arch/sandbox/include/asm/setjmp.h @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) 2018 Google, Inc + * Written by Simon Glass <sjg@chromium.org> + */ + +#ifndef _SETJMP_H_ +#define _SETJMP_H_ + +struct jmp_buf_data { + /* + * We're not sure how long this should be: + * + * amd64: 200 bytes + * arm64: 392 bytes + * armhf: 392 bytes + * + * So allow space for all of those, plus some extra. + * We don't need to worry about 16-byte alignment, since this does not + * run on Windows. + */ + ulong data[128]; +}; + +typedef struct jmp_buf_data jmp_buf[1]; + +int setjmp(jmp_buf jmp); +__noreturn void longjmp(jmp_buf jmp, int ret); + +#endif /* _SETJMP_H_ */ diff --git a/arch/sandbox/lib/Makefile b/arch/sandbox/lib/Makefile index 52eef2e662e..b4ff717e784 100644 --- a/arch/sandbox/lib/Makefile +++ b/arch/sandbox/lib/Makefile @@ -5,7 +5,7 @@ # (C) Copyright 2002-2006 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. -obj-y += interrupts.o +obj-y += interrupts.o sections.o obj-$(CONFIG_PCI) += pci_io.o obj-$(CONFIG_CMD_BOOTM) += bootm.o obj-$(CONFIG_CMD_BOOTZ) += bootm.o diff --git a/arch/sandbox/lib/sections.c b/arch/sandbox/lib/sections.c new file mode 100644 index 00000000000..697a8167ddf --- /dev/null +++ b/arch/sandbox/lib/sections.c @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2013 Albert ARIBAUD <albert.u.boot@aribaud.net> + * + */ + +char __efi_runtime_start[0] __attribute__((section(".__efi_runtime_start"))); +char __efi_runtime_stop[0] __attribute__((section(".__efi_runtime_stop"))); +char __efi_runtime_rel_start[0] + __attribute__((section(".__efi_runtime_rel_start"))); +char __efi_runtime_rel_stop[0] + __attribute__((section(".__efi_runtime_rel_stop"))); diff --git a/arch/x86/config.mk b/arch/x86/config.mk index 97db03deeed..5f77f98e60a 100644 --- a/arch/x86/config.mk +++ b/arch/x86/config.mk @@ -86,9 +86,9 @@ else PLATFORM_CPPFLAGS += -D__I386__ endif -ifneq ($(CONFIG_EFI_STUB)$(CONFIG_CMD_BOOTEFI_HELLO_COMPILE),) +ifdef CONFIG_EFI_STUB -ifneq ($(CONFIG_EFI_STUB_64BIT),) +ifdef CONFIG_EFI_STUB_64BIT EFI_LDS := elf_x86_64_efi.lds EFI_CRT0 := crt0_x86_64_efi.o EFI_RELOC := reloc_x86_64_efi.o @@ -98,10 +98,22 @@ EFI_CRT0 := crt0_ia32_efi.o EFI_RELOC := reloc_ia32_efi.o endif +else + ifdef CONFIG_X86_64 -EFI_TARGET := --target=efi-app-x86_64 +EFI_LDS := elf_x86_64_efi.lds +EFI_CRT0 := crt0_x86_64_efi.o +EFI_RELOC := reloc_x86_64_efi.o else -EFI_TARGET := --target=efi-app-ia32 +EFI_LDS := elf_ia32_efi.lds +EFI_CRT0 := crt0_ia32_efi.o +EFI_RELOC := reloc_ia32_efi.o +endif + endif +ifdef CONFIG_X86_64 +EFI_TARGET := --target=efi-app-x86_64 +else +EFI_TARGET := --target=efi-app-ia32 endif diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h index f97dc664391..196fcf9d3f6 100644 --- a/arch/x86/include/asm/bitops.h +++ b/arch/x86/include/asm/bitops.h @@ -61,6 +61,8 @@ static __inline__ void __set_bit(int nr, volatile void * addr) :"Ir" (nr)); } +#define PLATFORM__SET_BIT + /** * clear_bit - Clears a bit in memory * @nr: Bit to clear diff --git a/arch/x86/include/asm/u-boot-x86.h b/arch/x86/include/asm/u-boot-x86.h index 9be45846a53..2340ef83323 100644 --- a/arch/x86/include/asm/u-boot-x86.h +++ b/arch/x86/include/asm/u-boot-x86.h @@ -84,7 +84,6 @@ static inline __attribute__((no_instrument_function)) uint64_t rdtsc(void) /* board/... */ void timer_set_tsc_base(uint64_t new_base); uint64_t timer_get_tsc(void); -void board_quiesce_devices(void); void quick_ram_check(void); diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile index 51d451f9522..5a64f6eddc7 100644 --- a/arch/x86/lib/Makefile +++ b/arch/x86/lib/Makefile @@ -68,8 +68,18 @@ extra-$(CONFIG_EFI_STUB_64BIT) += crt0_x86_64_efi.o reloc_x86_64_efi.o endif -ifneq ($(CONFIG_EFI_STUB)$(CONFIG_CMD_BOOTEFI_HELLO_COMPILE),) +ifdef CONFIG_EFI_STUB + ifeq ($(CONFIG_$(SPL_)X86_64),) extra-y += $(EFI_CRT0) $(EFI_RELOC) endif + +else + +ifndef CONFIG_SPL_BUILD +ifneq ($(CONFIG_CMD_BOOTEFI_SELFTEST)$(CONFIG_CMD_BOOTEFI_HELLO_COMPILE),) +extra-y += $(EFI_CRT0) $(EFI_RELOC) +endif +endif + endif diff --git a/arch/x86/lib/bootm.c b/arch/x86/lib/bootm.c index 533ba075bb1..54c22fe6de3 100644 --- a/arch/x86/lib/bootm.c +++ b/arch/x86/lib/bootm.c @@ -27,10 +27,6 @@ DECLARE_GLOBAL_DATA_PTR; #define COMMAND_LINE_OFFSET 0x9000 -__weak void board_quiesce_devices(void) -{ -} - void bootm_announce_and_cleanup(void) { printf("\nStarting kernel ...\n\n"); diff --git a/board/AndesTech/nx25-ae250/Kconfig b/board/AndesTech/ax25-ae350/Kconfig index 2fb3234bad4..bb69ea34892 100644 --- a/board/AndesTech/nx25-ae250/Kconfig +++ b/board/AndesTech/ax25-ae350/Kconfig @@ -1,19 +1,19 @@ -if TARGET_NX25_AE250 +if TARGET_AX25_AE350 config SYS_CPU - default "nx25" + default "ax25" config SYS_BOARD - default "nx25-ae250" + default "ax25-ae350" config SYS_VENDOR default "AndesTech" config SYS_SOC - default "ae250" + default "ae350" config SYS_CONFIG_NAME - default "nx25-ae250" + default "ax25-ae350" config ENV_SIZE default 0x2000 if ENV_IS_IN_SPI_FLASH diff --git a/board/AndesTech/ax25-ae350/MAINTAINERS b/board/AndesTech/ax25-ae350/MAINTAINERS new file mode 100644 index 00000000000..508c6ace721 --- /dev/null +++ b/board/AndesTech/ax25-ae350/MAINTAINERS @@ -0,0 +1,6 @@ +AX25-AE350 BOARD +M: Rick Chen <rick@andestech.com> +S: Maintained +F: board/AndesTech/ax25-ae350/ +F: include/configs/ax25-ae350.h +F: configs/ax25-ae350_defconfig diff --git a/board/AndesTech/nx25-ae250/Makefile b/board/AndesTech/ax25-ae350/Makefile index e30b2d3c270..0e4ba8d7029 100644 --- a/board/AndesTech/nx25-ae250/Makefile +++ b/board/AndesTech/ax25-ae350/Makefile @@ -3,4 +3,4 @@ # Copyright (C) 2017 Andes Technology Corporation. # Rick Chen, Andes Technology Corporation <rick@andestech.com> -obj-y := nx25-ae250.o +obj-y := ax25-ae350.o diff --git a/board/AndesTech/nx25-ae250/nx25-ae250.c b/board/AndesTech/ax25-ae350/ax25-ae350.c index 4bb618b32c2..fd5aaa1579a 100644 --- a/board/AndesTech/nx25-ae250/nx25-ae250.c +++ b/board/AndesTech/ax25-ae350/ax25-ae350.c @@ -10,6 +10,8 @@ #include <netdev.h> #endif #include <linux/io.h> +#include <faraday/ftsmc020.h> +#include <fdtdec.h> DECLARE_GLOBAL_DATA_PTR; @@ -19,7 +21,7 @@ DECLARE_GLOBAL_DATA_PTR; int board_init(void) { - gd->bd->bi_arch_number = MACH_TYPE_AE250; + gd->bd->bi_arch_number = MACH_TYPE_AE350; gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400; return 0; @@ -72,3 +74,35 @@ void *board_fdt_blob_setup(void) return (void *)CONFIG_SYS_FDT_BASE; } + +int smc_init(void) +{ + int node = -1; + const char *compat = "andestech,atfsmc020"; + void *blob = (void *)gd->fdt_blob; + fdt_addr_t addr; + struct ftsmc020_bank *regs; + + node = fdt_node_offset_by_compatible(blob, -1, compat); + if (node < 0) + return -FDT_ERR_NOTFOUND; + + addr = fdtdec_get_addr(blob, node, "reg"); + + if (addr == FDT_ADDR_T_NONE) + return -EINVAL; + + regs = (struct ftsmc020_bank *)addr; + regs->cr &= ~FTSMC020_BANK_WPROT; + + return 0; +} + +#ifdef CONFIG_BOARD_EARLY_INIT_F +int board_early_init_f(void) +{ + smc_init(); + + return 0; +} +#endif diff --git a/board/AndesTech/nx25-ae250/MAINTAINERS b/board/AndesTech/nx25-ae250/MAINTAINERS deleted file mode 100644 index 1bff127c645..00000000000 --- a/board/AndesTech/nx25-ae250/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -NX25-AE250 BOARD -M: Rick Chen <rick@andestech.com> -S: Maintained -F: board/AndesTech/nx25-ae250/ -F: include/configs/nx25-ae250.h -F: configs/nx25-ae250_defconfig diff --git a/board/alliedtelesis/SBx81LIFKW/Kconfig b/board/alliedtelesis/SBx81LIFKW/Kconfig new file mode 100644 index 00000000000..5c2609b7f46 --- /dev/null +++ b/board/alliedtelesis/SBx81LIFKW/Kconfig @@ -0,0 +1,12 @@ +if TARGET_SBx81LIFKW + +config SYS_BOARD + default "SBx81LIFKW" + +config SYS_VENDOR + default "alliedtelesis" + +config SYS_CONFIG_NAME + default "SBx81LIFKW" + +endif diff --git a/board/alliedtelesis/SBx81LIFKW/MAINTAINERS b/board/alliedtelesis/SBx81LIFKW/MAINTAINERS new file mode 100644 index 00000000000..31ccec0e9b7 --- /dev/null +++ b/board/alliedtelesis/SBx81LIFKW/MAINTAINERS @@ -0,0 +1,7 @@ +SBx81LIFKW BOARD +M: Chris Packham <chris.packham@alliedtelesis.co.nz> +S: Maintained +F: board/alliedtelesis/SBx81LIFKW/ +F: include/configs/SBx81LIFKW +F: configs/SBx81LIFKW_defconfig +F: arch/arm/dts/kirkwood-atl-sbx81lifkw.dts diff --git a/board/alliedtelesis/SBx81LIFKW/Makefile b/board/alliedtelesis/SBx81LIFKW/Makefile new file mode 100644 index 00000000000..806020ed854 --- /dev/null +++ b/board/alliedtelesis/SBx81LIFKW/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2010, 2018 +# Allied Telesis <www.alliedtelesis.com> +# + +obj-y += sbx81lifkw.o diff --git a/board/alliedtelesis/SBx81LIFKW/kwbimage.cfg b/board/alliedtelesis/SBx81LIFKW/kwbimage.cfg new file mode 100644 index 00000000000..9726f15e28b --- /dev/null +++ b/board/alliedtelesis/SBx81LIFKW/kwbimage.cfg @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2018 Allied Telesis +# +# Refer docs/README.kwimage for more details about how-to configure +# and create kirkwood boot image +# + +# Boot Media configurations +BOOT_FROM spi # Boot from SPI flash + +# SOC registers configuration using bootrom header extension +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed +DATA 0xffd100e0 0x1b1b1b1b +DATA 0xffd20134 0xffffffff +DATA 0xffd20138 0x009fffff +DATA 0xffd20154 0x00000000 +DATA 0xffd2014c 0x00000000 +DATA 0xffd20148 0x00000001 + +# Dram initalization for 1 x x16 +# DDR II Micron part number MT47H64M16HR-3 +# MClk 333MHz, Size 128MB, ECC disable +# +DATA 0xffd01400 0x43000618 +DATA 0xffd01404 0x35143000 +DATA 0xffd01408 0x11012227 +DATA 0xffd0140c 0x00000819 +DATA 0xffd01410 0x0000000d +DATA 0xffd01414 0x00000000 +DATA 0xffd01418 0x00000000 +DATA 0xffd0141c 0x00000632 +DATA 0xffd01420 0x00000040 +DATA 0xffd01424 0x0000f07f +DATA 0xffd01500 0x00000000 # SDRAM CS[0] Base address at 0x00000000 +DATA 0xffd01504 0x07FFFFF1 # SDRAM CS[0] Size 128MiB +DATA 0xffd01508 0x10000000 +DATA 0xffd0150c 0x00FFFFF4 # SDRAM CS[1] Size, window disabled +DATA 0xffd01514 0x00FFFFF8 # SDRAM CS[2] Size, window disabled +DATA 0xffd0151c 0x00FFFFFC # SDRAM CS[3] Size, window disabled +DATA 0xffd01494 0x00030000 +DATA 0xffd01498 0x00000000 +DATA 0xffd0149c 0x0000e803 +DATA 0xffd01480 0x00000001 + +# End of Header extension +DATA 0x0 0x0 diff --git a/board/alliedtelesis/SBx81LIFKW/sbx81lifkw.c b/board/alliedtelesis/SBx81LIFKW/sbx81lifkw.c new file mode 100644 index 00000000000..e58bbf07ef1 --- /dev/null +++ b/board/alliedtelesis/SBx81LIFKW/sbx81lifkw.c @@ -0,0 +1,197 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2010, 2018 + * Allied Telesis <www.alliedtelesis.com> + */ + +#include <common.h> +#include <linux/io.h> +#include <miiphy.h> +#include <netdev.h> +#include <asm/arch/cpu.h> +#include <asm/arch/soc.h> +#include <asm/arch/mpp.h> +#include <asm/arch/gpio.h> + +/* Note: GPIO differences between specific boards + * + * We're trying to avoid having multiple build targets for all the Kirkwood + * based boards one area where things tend to differ is GPIO usage. For the + * most part the GPIOs driven by the bootloader are similar enough in function + * that there is no harm in driving them. + * + * XZ4 XS6 XS16 GS24A GT40 GP24A GT24A + * GPIO39 - INT(<) NC MUX_RST_N(>) NC POE_DIS_N(>) NC + */ + +#define SBX81LIFKW_OE_LOW ~(BIT(31) | BIT(30) | BIT(28) | BIT(27) | \ + BIT(18) | BIT(17) | BIT(13) | BIT(12) | \ + BIT(10)) +#define SBX81LIFKW_OE_HIGH ~(BIT(0) | BIT(1) | BIT(7)) +#define SBX81LIFKW_OE_VAL_LOW (BIT(31) | BIT(30) | BIT(28) | BIT(27)) +#define SBX81LIFKW_OE_VAL_HIGH (BIT(0) | BIT(1)) + +#define MV88E6097_RESET 27 + +DECLARE_GLOBAL_DATA_PTR; + +struct led { + u32 reg; + u32 value; + u32 mask; +}; + +struct led amber_solid = { + MVEBU_GPIO0_BASE, + BIT(10), + BIT(18) | BIT(10) +}; + +struct led green_solid = { + MVEBU_GPIO0_BASE, + BIT(18) | BIT(10), + BIT(18) | BIT(10) +}; + +struct led amber_flash = { + MVEBU_GPIO0_BASE, + 0, + BIT(18) | BIT(10) +}; + +struct led green_flash = { + MVEBU_GPIO0_BASE, + BIT(18), + BIT(18) | BIT(10) +}; + +static void status_led_set(struct led *led) +{ + clrsetbits_le32(led->reg, led->mask, led->value); +} + +int board_early_init_f(void) +{ + /* + * default gpio configuration + * There are maximum 64 gpios controlled through 2 sets of registers + * the below configuration configures mainly initial LED status + */ + mvebu_config_gpio(SBX81LIFKW_OE_VAL_LOW, + SBX81LIFKW_OE_VAL_HIGH, + SBX81LIFKW_OE_LOW, SBX81LIFKW_OE_HIGH); + + /* Multi-Purpose Pins Functionality configuration */ + static const u32 kwmpp_config[] = { + MPP0_SPI_SCn, + MPP1_SPI_MOSI, + MPP2_SPI_SCK, + MPP3_SPI_MISO, + MPP4_UART0_RXD, + MPP5_UART0_TXD, + MPP6_SYSRST_OUTn, + MPP7_PEX_RST_OUTn, + MPP8_TW_SDA, + MPP9_TW_SCK, + MPP10_GPO, + MPP11_GPIO, + MPP12_GPO, + MPP13_GPIO, + MPP14_GPIO, + MPP15_UART0_RTS, + MPP16_UART0_CTS, + MPP17_GPIO, + MPP18_GPO, + MPP19_GPO, + MPP20_GPIO, + MPP21_GPIO, + MPP22_GPIO, + MPP23_GPIO, + MPP24_GPIO, + MPP25_GPIO, + MPP26_GPIO, + MPP27_GPIO, + MPP28_GPIO, + MPP29_GPIO, + MPP30_GPIO, + MPP31_GPIO, + MPP32_GPIO, + MPP33_GPIO, + MPP34_GPIO, + MPP35_GPIO, + MPP36_GPIO, + MPP37_GPIO, + MPP38_GPIO, + MPP39_GPIO, + MPP40_GPIO, + MPP41_GPIO, + MPP42_GPIO, + MPP43_GPIO, + MPP44_GPIO, + MPP45_GPIO, + MPP46_GPIO, + MPP47_GPIO, + MPP48_GPIO, + MPP49_GPIO, + 0 + }; + + kirkwood_mpp_conf(kwmpp_config, NULL); + return 0; +} + +int board_init(void) +{ + /* Power-down unused subsystems. The required + * subsystems are: + * + * GE0 b0 + * PEX0 PHY b1 + * PEX0.0 b2 + * TSU b5 + * SDRAM b6 + * RUNIT b7 + */ + writel((BIT(0) | BIT(1) | BIT(2) | + BIT(5) | BIT(6) | BIT(7)), + KW_CPU_REG_BASE + 0x1c); + + /* address of boot parameters */ + gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; + + status_led_set(&amber_solid); + + return 0; +} + +#ifdef CONFIG_RESET_PHY_R +/* automatically defined by kirkwood config.h */ +void reset_phy(void) +{ +} +#endif + +#ifdef CONFIG_MV88E61XX_SWITCH +int mv88e61xx_hw_reset(struct phy_device *phydev) +{ + /* Ensure the 88e6097 gets at least 10ms Reset + */ + kw_gpio_set_value(MV88E6097_RESET, 0); + mdelay(20); + kw_gpio_set_value(MV88E6097_RESET, 1); + mdelay(20); + + phydev->advertising = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full; + + return 0; +} +#endif + +#ifdef CONFIG_MISC_INIT_R +int misc_init_r(void) +{ + status_led_set(&green_flash); + + return 0; +} +#endif diff --git a/board/amazon/kc1/kc1.c b/board/amazon/kc1/kc1.c index d9ca18363cd..031fd110923 100644 --- a/board/amazon/kc1/kc1.c +++ b/board/amazon/kc1/kc1.c @@ -161,7 +161,7 @@ void get_board_serial(struct tag_serialnr *serialnr) omap_die_id_get_board_serial(serialnr); } -int fb_set_reboot_flag(void) +int fastboot_set_reboot_flag(void) { return omap_reboot_mode_store("b"); } diff --git a/board/bitmain/antminer_s9/MAINTAINERS b/board/bitmain/antminer_s9/MAINTAINERS new file mode 100644 index 00000000000..302dd4807f3 --- /dev/null +++ b/board/bitmain/antminer_s9/MAINTAINERS @@ -0,0 +1,6 @@ +Bitmain Antminer S9 +M: Michal Simek <monstr@monstr.eu> +S: Maintained +F: board/bitmain/antminer_s9 +F: include/configs/bitmain_antminer_s9.h +F: configs/bitmain_antminer_s9_defconfig diff --git a/board/bitmain/antminer_s9/Makefile b/board/bitmain/antminer_s9/Makefile new file mode 100644 index 00000000000..93a1e77f72b --- /dev/null +++ b/board/bitmain/antminer_s9/Makefile @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0 + +obj-y := board.o + +# Remove quotes +hw-platform-y :=$(shell echo $(CONFIG_DEFAULT_DEVICE_TREE)) + +obj-$(CONFIG_SPL_BUILD) += $(hw-platform-y)/ps7_init_gpl.o diff --git a/board/bitmain/antminer_s9/bitmain-antminer-s9/ps7_init_gpl.c b/board/bitmain/antminer_s9/bitmain-antminer-s9/ps7_init_gpl.c new file mode 100644 index 00000000000..aee202996d1 --- /dev/null +++ b/board/bitmain/antminer_s9/bitmain-antminer-s9/ps7_init_gpl.c @@ -0,0 +1,280 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * (C) Copyright 2018 Michal Simek + */ + +#include <asm/arch/ps7_init_gpl.h> + +static unsigned long ps7_pll_init_data_3_0[] = { + EMIT_MASKWRITE(0xf8000008, 0x0000ffff, 0x0000df0d), + EMIT_MASKWRITE(0xf8000110, 0x003ffff0, 0x000fa220), + EMIT_MASKWRITE(0xf8000100, 0x0007f000, 0x00028000), + EMIT_MASKWRITE(0xf8000100, 0x00000010, 0x00000010), + EMIT_MASKWRITE(0xf8000100, 0x00000001, 0x00000001), + EMIT_MASKWRITE(0xf8000100, 0x00000001, 0x00000000), + EMIT_MASKPOLL(0xf800010c, 0x00000001), + EMIT_MASKWRITE(0xf8000100, 0x00000010, 0x00000000), + EMIT_MASKWRITE(0xf8000120, 0x1f003f30, 0x1f000200), + EMIT_MASKWRITE(0xf8000114, 0x003ffff0, 0x0012c220), + EMIT_MASKWRITE(0xf8000104, 0x0007f000, 0x00020000), + EMIT_MASKWRITE(0xf8000104, 0x00000010, 0x00000010), + EMIT_MASKWRITE(0xf8000104, 0x00000001, 0x000000), + EMIT_MASKWRITE(0xf8000104, 0x00000001, 0x00000000), + EMIT_MASKPOLL(0xf800010c, 0x00000002), + EMIT_MASKWRITE(0xf8000104, 0x00000010, 0x00000000), + EMIT_MASKWRITE(0xf8000124, 0xfff00003, 0x0c200003), + EMIT_MASKWRITE(0xf8000118, 0x003ffff0, 0x001452c0), + EMIT_MASKWRITE(0xf8000108, 0x0007f000, 0x0001e000), + EMIT_MASKWRITE(0xf8000108, 0x00000010, 0x00000010), + EMIT_MASKWRITE(0xf8000108, 0x00000001, 0x00000001), + EMIT_MASKWRITE(0xf8000108, 0x00000001, 0x00000000), + EMIT_MASKPOLL(0xf800010c, 0x00000004), + EMIT_MASKWRITE(0xf8000108, 0x00000010, 0x00000000), + EMIT_MASKWRITE(0xf8000004, 0x0000ffff, 0x0000767b), + EMIT_EXIT(), +}; + +static unsigned long ps7_clock_init_data_3_0[] = { + EMIT_MASKWRITE(0xf8000008, 0x0000ffff, 0x0000df0d), + EMIT_MASKWRITE(0xf8000128, 0x03f03f01, 0x00302301), + EMIT_MASKWRITE(0xf8000138, 0x00000011, 0x00000001), + EMIT_MASKWRITE(0xf8000140, 0x03f03f71, 0x00100801), + EMIT_MASKWRITE(0xf8000148, 0x00003f31, 0x00000a01), + EMIT_MASKWRITE(0xf8000150, 0x00003f33, 0x00002801), + EMIT_MASKWRITE(0xf8000154, 0x00003f33, 0x00001402), + EMIT_MASKWRITE(0xf8000168, 0x00003f31, 0x00000501), + EMIT_MASKWRITE(0xf8000170, 0x03f03f30, 0x00101400), + EMIT_MASKWRITE(0xf8000180, 0x03f03f30, 0x00100a00), + EMIT_MASKWRITE(0xf8000190, 0x03f03f30, 0x00101e00), + EMIT_MASKWRITE(0xf80001a0, 0x03f03f30, 0x00101400), + EMIT_MASKWRITE(0xf80001c4, 0x00000001, 0x00000001), + EMIT_MASKWRITE(0xf800012c, 0x01ffcccd, 0x016c044d), + EMIT_MASKWRITE(0xf8000004, 0x0000ffff, 0x0000767b), + EMIT_EXIT(), +}; + +static unsigned long ps7_ddr_init_data_3_0[] = { + EMIT_MASKWRITE(0xf8006000, 0x0001ffff, 0x00000080), + EMIT_MASKWRITE(0xf8006004, 0x0007ffff, 0x00001081), + EMIT_MASKWRITE(0xf8006008, 0x03ffffff, 0x03c0780f), + EMIT_MASKWRITE(0xf800600c, 0x03ffffff, 0x02001001), + EMIT_MASKWRITE(0xf8006010, 0x03ffffff, 0x00014001), + EMIT_MASKWRITE(0xf8006014, 0x001fffff, 0x0004281b), + EMIT_MASKWRITE(0xf8006018, 0xf7ffffff, 0x44e458d1), + EMIT_MASKWRITE(0xf800601c, 0xffffffff, 0xb2023584), + EMIT_MASKWRITE(0xf8006020, 0x7fdffffc, 0x2b08b2d0), + EMIT_MASKWRITE(0xf8006024, 0x0fffffc3, 0x00000000), + EMIT_MASKWRITE(0xf8006028, 0x00003fff, 0x00002007), + EMIT_MASKWRITE(0xf800602c, 0xffffffff, 0x00000000), + EMIT_MASKWRITE(0xf8006030, 0xffffffff, 0x00040970), + EMIT_MASKWRITE(0xf8006034, 0x13ff3fff, 0x000116d4), + EMIT_MASKWRITE(0xf8006038, 0x00000003, 0x00000000), + EMIT_MASKWRITE(0xf800603c, 0x000fffff, 0x00000777), + EMIT_MASKWRITE(0xf8006040, 0xffffffff, 0xfff00000), + EMIT_MASKWRITE(0xf8006044, 0x0fffffff, 0x0f666666), + EMIT_MASKWRITE(0xf8006048, 0x0003f03f, 0x0003c008), + EMIT_MASKWRITE(0xf8006050, 0xff0f8fff, 0x77010800), + EMIT_MASKWRITE(0xf8006058, 0x00010000, 0x00000000), + EMIT_MASKWRITE(0xf800605c, 0x0000ffff, 0x00005003), + EMIT_MASKWRITE(0xf8006060, 0x000017ff, 0x0000003e), + EMIT_MASKWRITE(0xf8006064, 0x00021fe0, 0x00020000), + EMIT_MASKWRITE(0xf8006068, 0x03ffffff, 0x00284545), + EMIT_MASKWRITE(0xf800606c, 0x0000ffff, 0x00001610), + EMIT_MASKWRITE(0xf8006078, 0x03ffffff, 0x00466111), + EMIT_MASKWRITE(0xf800607c, 0x000fffff, 0x00032222), + EMIT_MASKWRITE(0xf80060a4, 0xffffffff, 0x10200802), + EMIT_MASKWRITE(0xf80060a8, 0x0fffffff, 0x0690cb73), + EMIT_MASKWRITE(0xf80060ac, 0x000001ff, 0x000001fe), + EMIT_MASKWRITE(0xf80060b0, 0x1fffffff, 0x1cffffff), + EMIT_MASKWRITE(0xf80060b4, 0x00000200, 0x00000200), + EMIT_MASKWRITE(0xf80060b8, 0x01ffffff, 0x0020006a), + EMIT_MASKWRITE(0xf80060c4, 0x00000003, 0x00000003), + EMIT_MASKWRITE(0xf80060c4, 0x00000003, 0x00000000), + EMIT_MASKWRITE(0xf80060c8, 0x000000ff, 0x00000000), + EMIT_MASKWRITE(0xf80060dc, 0x00000001, 0x00000000), + EMIT_MASKWRITE(0xf80060f0, 0x0000ffff, 0x00000000), + EMIT_MASKWRITE(0xf80060f4, 0x0000000f, 0x00000008), + EMIT_MASKWRITE(0xf8006114, 0x000000ff, 0x00000000), + EMIT_MASKWRITE(0xf8006118, 0x7fffffcf, 0x40000001), + EMIT_MASKWRITE(0xf800611c, 0x7fffffcf, 0x40000001), + EMIT_MASKWRITE(0xf8006120, 0x7fffffcf, 0x40000001), + EMIT_MASKWRITE(0xf8006124, 0x7fffffcf, 0x40000001), + EMIT_MASKWRITE(0xf800612c, 0x000fffff, 0x0002c000), + EMIT_MASKWRITE(0xf8006130, 0x000fffff, 0x0002c400), + EMIT_MASKWRITE(0xf8006134, 0x000fffff, 0x0002f003), + EMIT_MASKWRITE(0xf8006138, 0x000fffff, 0x0002ec03), + EMIT_MASKWRITE(0xf8006140, 0x000fffff, 0x00000035), + EMIT_MASKWRITE(0xf8006144, 0x000fffff, 0x00000035), + EMIT_MASKWRITE(0xf8006148, 0x000fffff, 0x00000035), + EMIT_MASKWRITE(0xf800614c, 0x000fffff, 0x00000035), + EMIT_MASKWRITE(0xf8006154, 0x000fffff, 0x00000077), + EMIT_MASKWRITE(0xf8006158, 0x000fffff, 0x00000077), + EMIT_MASKWRITE(0xf800615c, 0x000fffff, 0x00000083), + EMIT_MASKWRITE(0xf8006160, 0x000fffff, 0x00000083), + EMIT_MASKWRITE(0xf8006168, 0x001fffff, 0x00000105), + EMIT_MASKWRITE(0xf800616c, 0x001fffff, 0x00000106), + EMIT_MASKWRITE(0xf8006170, 0x001fffff, 0x00000111), + EMIT_MASKWRITE(0xf8006174, 0x001fffff, 0x00000110), + EMIT_MASKWRITE(0xf800617c, 0x000fffff, 0x000000b7), + EMIT_MASKWRITE(0xf8006180, 0x000fffff, 0x000000b7), + EMIT_MASKWRITE(0xf8006184, 0x000fffff, 0x000000c3), + EMIT_MASKWRITE(0xf8006188, 0x000fffff, 0x000000c3), + EMIT_MASKWRITE(0xf8006190, 0x6ffffefe, 0x00040080), + EMIT_MASKWRITE(0xf8006194, 0x000fffff, 0x0001fd01), + EMIT_MASKWRITE(0xf8006204, 0xffffffff, 0x00000000), + EMIT_MASKWRITE(0xf8006208, 0x000703ff, 0x000003ff), + EMIT_MASKWRITE(0xf800620c, 0x000703ff, 0x000003ff), + EMIT_MASKWRITE(0xf8006210, 0x000703ff, 0x000003ff), + EMIT_MASKWRITE(0xf8006214, 0x000703ff, 0x000003ff), + EMIT_MASKWRITE(0xf8006218, 0x000f03ff, 0x000003ff), + EMIT_MASKWRITE(0xf800621c, 0x000f03ff, 0x000003ff), + EMIT_MASKWRITE(0xf8006220, 0x000f03ff, 0x000003ff), + EMIT_MASKWRITE(0xf8006224, 0x000f03ff, 0x000003ff), + EMIT_MASKWRITE(0xf80062a8, 0x00000ff5, 0x00000000), + EMIT_MASKWRITE(0xf80062ac, 0xffffffff, 0x00000000), + EMIT_MASKWRITE(0xf80062b0, 0x003fffff, 0x00005125), + EMIT_MASKWRITE(0xf80062b4, 0x0003ffff, 0x000012a8), + EMIT_MASKPOLL(0xf8000b74, 0x00002000), + EMIT_MASKWRITE(0xf8006000, 0x0001ffff, 0x00000081), + EMIT_MASKPOLL(0xf8006054, 0x00000007), + EMIT_EXIT(), +}; + +static unsigned long ps7_mio_init_data_3_0[] = { + EMIT_MASKWRITE(0xf8000008, 0x0000ffff, 0x0000df0d), + EMIT_MASKWRITE(0xf8000b40, 0x00000fff, 0x00000600), + EMIT_MASKWRITE(0xf8000b44, 0x00000fff, 0x00000600), + EMIT_MASKWRITE(0xf8000b48, 0x00000fff, 0x00000672), + EMIT_MASKWRITE(0xf8000b4c, 0x00000fff, 0x00000672), + EMIT_MASKWRITE(0xf8000b50, 0x00000fff, 0x00000674), + EMIT_MASKWRITE(0xf8000b54, 0x00000fff, 0x00000674), + EMIT_MASKWRITE(0xf8000b58, 0x00000fff, 0x00000600), + EMIT_MASKWRITE(0xf8000b5c, 0xffffffff, 0x0018c068), + EMIT_MASKWRITE(0xf8000b60, 0xffffffff, 0x00f98068), + EMIT_MASKWRITE(0xf8000b64, 0xffffffff, 0x00f98068), + EMIT_MASKWRITE(0xf8000b68, 0xffffffff, 0x00f98068), + EMIT_MASKWRITE(0xf8000b6c, 0x00007fff, 0x00000205), + EMIT_MASKWRITE(0xf8000b70, 0x00000001, 0x00000001), + EMIT_MASKWRITE(0xf8000b70, 0x00000021, 0x00000020), + EMIT_MASKWRITE(0xf8000b70, 0x07feffff, 0x00000823), + EMIT_MASKWRITE(0xf8000700, 0x00003fff, 0x00000610), + EMIT_MASKWRITE(0xf8000704, 0x00003fff, 0x00000600), + EMIT_MASKWRITE(0xf8000708, 0x00003fff, 0x00000610), + EMIT_MASKWRITE(0xf800070c, 0x00003fff, 0x00000610), + EMIT_MASKWRITE(0xf8000710, 0x00003fff, 0x00000610), + EMIT_MASKWRITE(0xf8000714, 0x00003fff, 0x00000610), + EMIT_MASKWRITE(0xf8000718, 0x00003fff, 0x00000610), + EMIT_MASKWRITE(0xf800071c, 0x00003fff, 0x00000610), + EMIT_MASKWRITE(0xf8000720, 0x00003fff, 0x00000610), + EMIT_MASKWRITE(0xf8000724, 0x00003fff, 0x00000610), + EMIT_MASKWRITE(0xf8000728, 0x00003fff, 0x00000610), + EMIT_MASKWRITE(0xf800072c, 0x00003fff, 0x00000610), + EMIT_MASKWRITE(0xf8000730, 0x00003fff, 0x00000610), + EMIT_MASKWRITE(0xf8000734, 0x00003fff, 0x00000610), + EMIT_MASKWRITE(0xf8000738, 0x00003fff, 0x00000611), + EMIT_MASKWRITE(0xf800073c, 0x00003fff, 0x00000600), + EMIT_MASKWRITE(0xf8000740, 0x00003fff, 0x00000202), + EMIT_MASKWRITE(0xf8000744, 0x00003fff, 0x00000202), + EMIT_MASKWRITE(0xf8000748, 0x00003fff, 0x00000202), + EMIT_MASKWRITE(0xf800074c, 0x00003fff, 0x00000202), + EMIT_MASKWRITE(0xf8000750, 0x00003fff, 0x00000202), + EMIT_MASKWRITE(0xf8000754, 0x00003fff, 0x00000202), + EMIT_MASKWRITE(0xf8000758, 0x00003fff, 0x00000203), + EMIT_MASKWRITE(0xf800075c, 0x00003fff, 0x00000203), + EMIT_MASKWRITE(0xf8000760, 0x00003fff, 0x00000203), + EMIT_MASKWRITE(0xf8000764, 0x00003fff, 0x00000203), + EMIT_MASKWRITE(0xf8000768, 0x00003fff, 0x00000203), + EMIT_MASKWRITE(0xf800076c, 0x00003fff, 0x00000203), + EMIT_MASKWRITE(0xf8000770, 0x00003fff, 0x00000200), + EMIT_MASKWRITE(0xf8000774, 0x00003fff, 0x00000200), + EMIT_MASKWRITE(0xf8000778, 0x00003fff, 0x00000200), + EMIT_MASKWRITE(0xf800077c, 0x00003fff, 0x00000200), + EMIT_MASKWRITE(0xf8000780, 0x00003fff, 0x00000200), + EMIT_MASKWRITE(0xf8000784, 0x00003fff, 0x00000200), + EMIT_MASKWRITE(0xf8000788, 0x00003fff, 0x00000200), + EMIT_MASKWRITE(0xf800078c, 0x00003fff, 0x00000200), + EMIT_MASKWRITE(0xf8000790, 0x00003fff, 0x00000200), + EMIT_MASKWRITE(0xf8000794, 0x00003fff, 0x00000200), + EMIT_MASKWRITE(0xf8000798, 0x00003fff, 0x00000200), + EMIT_MASKWRITE(0xf800079c, 0x00003fff, 0x00000200), + EMIT_MASKWRITE(0xf80007a0, 0x00003fff, 0x00000280), + EMIT_MASKWRITE(0xf80007a4, 0x00003fff, 0x00000280), + EMIT_MASKWRITE(0xf80007a8, 0x00003fff, 0x00000280), + EMIT_MASKWRITE(0xf80007ac, 0x00003fff, 0x00000280), + EMIT_MASKWRITE(0xf80007b0, 0x00003fff, 0x00000280), + EMIT_MASKWRITE(0xf80007b4, 0x00003fff, 0x00000280), + EMIT_MASKWRITE(0xf80007b8, 0x00003f01, 0x00000201), + EMIT_MASKWRITE(0xf80007bc, 0x00003fff, 0x00000200), + EMIT_MASKWRITE(0xf80007c0, 0x00003fff, 0x000002e0), + EMIT_MASKWRITE(0xf80007c4, 0x00003fff, 0x000002e1), + EMIT_MASKWRITE(0xf80007c8, 0x00003f01, 0x00000201), + EMIT_MASKWRITE(0xf80007cc, 0x00003fff, 0x00000200), + EMIT_MASKWRITE(0xf80007d0, 0x00003fff, 0x00000280), + EMIT_MASKWRITE(0xf80007d4, 0x00003fff, 0x00000280), + EMIT_MASKWRITE(0xf8000830, 0x003f003f, 0x002e0032), + EMIT_MASKWRITE(0xf8000004, 0x0000ffff, 0x0000767b), + EMIT_EXIT(), +}; + +static unsigned long ps7_peripherals_init_data_3_0[] = { + EMIT_MASKWRITE(0xf8000008, 0x0000ffff, 0x0000df0d), + EMIT_MASKWRITE(0xf8000b48, 0x00000180, 0x00000180), + EMIT_MASKWRITE(0xf8000b4c, 0x00000180, 0x00000180), + EMIT_MASKWRITE(0xf8000b50, 0x00000180, 0x00000180), + EMIT_MASKWRITE(0xf8000b54, 0x00000180, 0x00000180), + EMIT_MASKWRITE(0xf8000004, 0x0000ffff, 0x0000767b), + EMIT_MASKWRITE(0xe0001034, 0x000000ff, 0x00000006), + EMIT_MASKWRITE(0xe0001018, 0x0000ffff, 0x0000003e), + EMIT_MASKWRITE(0xe0001000, 0x000001ff, 0x00000017), + EMIT_MASKWRITE(0xe0001004, 0x000003ff, 0x00000020), + EMIT_MASKWRITE(0xe000d000, 0x00080000, 0x00080000), + EMIT_MASKWRITE(0xf8007000, 0x20000000, 0x00000000), + EMIT_MASKWRITE(0xe000e014, 0x00ffffff, 0x00449144), + EMIT_MASKWRITE(0xe000e018, 0x00000003, 0x00000000), + EMIT_MASKWRITE(0xe000e010, 0x03e00000, 0x02400000), + EMIT_MASKDELAY(0xf8f00200, 0x00000001), + EMIT_MASKDELAY(0xf8f00200, 0x00000001), + EMIT_MASKDELAY(0xf8f00200, 0x00000001), + EMIT_MASKDELAY(0xf8f00200, 0x00000001), + EMIT_MASKDELAY(0xf8f00200, 0x00000001), + EMIT_MASKDELAY(0xf8f00200, 0x00000001), + EMIT_EXIT(), +}; + +static unsigned long ps7_post_config_3_0[] = { + EMIT_MASKWRITE(0xf8000008, 0x0000ffff, 0x0000df0d), + EMIT_MASKWRITE(0xf8000900, 0x0000000f, 0x0000000f), + EMIT_MASKWRITE(0xf8000240, 0xffffffff, 0x00000000), + EMIT_MASKWRITE(0xf8008000, 0x00000001, 0x00000001), + EMIT_MASKWRITE(0xf8008014, 0x00000001, 0x00000001), + EMIT_MASKWRITE(0xf8000004, 0x0000ffff, 0x0000767b), + EMIT_EXIT(), +}; + +int ps7_init(void) +{ + int ret; + + ret = ps7_config(ps7_mio_init_data_3_0); + if (ret != PS7_INIT_SUCCESS) + return ret; + ret = ps7_config(ps7_pll_init_data_3_0); + if (ret != PS7_INIT_SUCCESS) + return ret; + ret = ps7_config(ps7_clock_init_data_3_0); + if (ret != PS7_INIT_SUCCESS) + return ret; + ret = ps7_config(ps7_ddr_init_data_3_0); + if (ret != PS7_INIT_SUCCESS) + return ret; + ret = ps7_config(ps7_peripherals_init_data_3_0); + if (ret != PS7_INIT_SUCCESS) + return ret; + + return PS7_INIT_SUCCESS; +} + +int ps7_post_config(void) +{ + return ps7_config(ps7_post_config_3_0); +} diff --git a/board/bitmain/antminer_s9/board.c b/board/bitmain/antminer_s9/board.c new file mode 100644 index 00000000000..bb7cef318da --- /dev/null +++ b/board/bitmain/antminer_s9/board.c @@ -0,0 +1,2 @@ +// SPDX-License-Identifier: GPL-2.0 +#include "../../xilinx/zynq/board.c" diff --git a/board/bticino/mamoj/Kconfig b/board/bticino/mamoj/Kconfig new file mode 100644 index 00000000000..e5aec589c87 --- /dev/null +++ b/board/bticino/mamoj/Kconfig @@ -0,0 +1,12 @@ +if TARGET_MX6DL_MAMOJ + +config SYS_BOARD + default "mamoj" + +config SYS_VENDOR + default "bticino" + +config SYS_CONFIG_NAME + default "imx6dl-mamoj" + +endif diff --git a/board/bticino/mamoj/MAINTAINERS b/board/bticino/mamoj/MAINTAINERS new file mode 100644 index 00000000000..c35b387a820 --- /dev/null +++ b/board/bticino/mamoj/MAINTAINERS @@ -0,0 +1,10 @@ +MX6DL_MAMOJ BOARD +M: Jagan Teki <jagan@amarulasolutions.com> +M: Raffaele RECALCATI <raffaele.recalcati@bticino.it> +M: Simone CIANNI <simone.cianni@bticino.it> +S: Maintained +F: board/bticino/mamoj +F: include/configs/imx6dl-mamoj.h +F: configs/imx6dl_mamoj_defconfig +F: arch/arm/dts/imx6dl-mamoj.dts +F: arch/arm/dts/imx6dl-mamoj-u-boot.dtsi diff --git a/board/bticino/mamoj/Makefile b/board/bticino/mamoj/Makefile new file mode 100644 index 00000000000..f1ddda48918 --- /dev/null +++ b/board/bticino/mamoj/Makefile @@ -0,0 +1,8 @@ +# Copyright (C) 2018 BTicino +# Copyright (C) 2017 Amarula Solutions B.V. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := mamoj.o +obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/board/bticino/mamoj/README b/board/bticino/mamoj/README new file mode 100644 index 00000000000..5333c72537a --- /dev/null +++ b/board/bticino/mamoj/README @@ -0,0 +1,124 @@ +BTicino Mamoj board: +=================== + +Build: + + $ make mrproper + $ make imx6dl_mamoj_defconfig + $ make + + This will generate the SPL image called SPL and the u-boot-dtb.img. + +The following methods can be used for booting Mamoj boards: + +1. USB SDP boot + +2. eMMC boot (via DFU) + +3. Falcon mode + +1. USB SDP boot: +--------------- + + - Build imx_usb_loader + + $ git clone git://github.com/boundarydevices/imx_usb_loader.git + $ cd imx_usb_loader + $ make + + - Build the BSP and copy SPL, u-boot-dtb.img in imx_usb_loader directory + + - Put the board in "Serial Download Mode" + + - Plug-in USB-to-Serial, Open minicom 1152008N1 and USB OTG cables to Host + + - Turn-on board + + - Identify VID/PID using lsusb + + Bus 001 Device 010: ID 15a2:0061 Freescale Semiconductor, Inc. i.MX 6Solo/6DualLite SystemOnChip in RecoveryMode + + - Update the conf files + + imx_usb.conf + 0x15a2:0x0061, mx6_usb_rom.conf, 0x0525:0xb4a4, mx6_usb_sdp_spl.conf + + mx6_usb_rom.conf + mx6_usb + hid,1024,0x910000,0x10000000,512M,0x00900000,0x40000 + SPL:jump header2 + + mx6_usb_sdp_spl.conf + mx6_spl_sdp + hid,uboot_header,1024,0x910000,0x10000000,512M,0x00900000,0x40000 + u-boot-dtb.img:jump header2 + + - Launch the loader + + $ ./imx_usb + + We can see U-Boot boot from USB SDP on minicom + +2. eMMC boot via DFU: +-------------------- + + Once booted from USB SDP, program the eMMC as below(make sure to connect USB OTG) + + - Change eMMC partition config + + => mmc partconf 2 1 0 0 + + - Partition eMMC on host + + => ums 0 mmc 2 + + Host will able to detect the eMMC disk as UMS, partition the same. + + - Program SPL + + => setenv dfu_alt_info $dfu_alt_info_spl + => dfu 0 mmc 2 + + At Host + + # dfu-util -D SPL -a spl + + - Program u-boot-dtb.img + + => setenv dfu_alt_info $dfu_alt_info_uboot + => dfu 0 mmc 2 + + At Host + + # dfu-util -D u-boot-dtb.img -a u-boot + + Poweroff and Poweron the board and see U-Boot booting from eMMC. + +3. Falcon mode: +-------------- + + - Skip 10M space and create dual partitions for eMMC, start sector is 20480 + + Partition Map for MMC device 2 -- Partition Type: DOS + + Part Start Sector Num Sectors UUID Type + 1 20480 131072 c52e78be-01 83 + 2 151552 7581696 c52e78be-02 83 + + - Write uImage + + => fatload mmc 2:1 $kernel_addr_r uImage + => mmc write $kernel_addr_r 0x1000 0x4000 + + - Write dtb and args + + => setenv bootargs console=ttymxc2,115200 root=/dev/mmcblk0p2 rootfstype=ext4 rootwait rw quiet + => fatload mmc 2:1 $fdt_addr_r imx6dl-mamoj.dtb + => spl export fdt $kernel_addr_r - $fdt_addr_r + => mmc write 0x13000000 0x800 0x800 + + Poweroff and Poweron the board and see Linux booting directly after SPL. + +-- +Jagan Teki <jagan@amarulasolutions.com> +03/12/18 diff --git a/board/bticino/mamoj/mamoj.c b/board/bticino/mamoj/mamoj.c new file mode 100644 index 00000000000..6ad7e31092b --- /dev/null +++ b/board/bticino/mamoj/mamoj.c @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Simone CIANNI <simone.cianni@bticino.it> + * Copyright (C) 2018 Raffaele RECALCATI <raffaele.recalcati@bticino.it> + * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com> + */ + +#include <common.h> +#include <asm/arch/sys_proto.h> + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + /* Address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + return 0; +} + +int dram_init(void) +{ + gd->ram_size = imx_ddr_size(); + + return 0; +} diff --git a/board/bticino/mamoj/spl.c b/board/bticino/mamoj/spl.c new file mode 100644 index 00000000000..c53bdce0ceb --- /dev/null +++ b/board/bticino/mamoj/spl.c @@ -0,0 +1,171 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Simone CIANNI <simone.cianni@bticino.it> + * Copyright (C) 2018 Raffaele RECALCATI <raffaele.recalcati@bticino.it> + * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com> + */ + +#include <common.h> +#include <spl.h> + +#include <asm/io.h> +#include <linux/sizes.h> + +#include <asm/arch/clock.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/iomux.h> +#include <asm/arch/mx6-ddr.h> +#include <asm/arch/mx6-pins.h> +#include <asm/arch/sys_proto.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define IMX6SDL_DRIVE_STRENGTH 0x28 +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +static iomux_v3_cfg_t const uart3_pads[] = { + IOMUX_PADS(PAD_EIM_D24__UART3_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D25__UART3_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), +}; + +#ifdef CONFIG_SPL_OS_BOOT +int spl_start_uboot(void) +{ + /* break into full u-boot on 'c' */ + if (serial_tstc() && serial_getc() == 'c') + return 1; + + return 0; +} +#endif + +struct mx6sdl_iomux_ddr_regs mx6sdl_ddr_ioregs = { + .dram_sdclk_0 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdclk_1 = IMX6SDL_DRIVE_STRENGTH, + .dram_cas = IMX6SDL_DRIVE_STRENGTH, + .dram_ras = IMX6SDL_DRIVE_STRENGTH, + .dram_reset = IMX6SDL_DRIVE_STRENGTH, + .dram_sdcke0 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdcke1 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdba2 = 0x00000000, + .dram_sdodt0 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdodt1 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdqs0 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdqs1 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdqs2 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdqs3 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdqs4 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdqs5 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdqs6 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdqs7 = IMX6SDL_DRIVE_STRENGTH, + .dram_dqm0 = IMX6SDL_DRIVE_STRENGTH, + .dram_dqm1 = IMX6SDL_DRIVE_STRENGTH, + .dram_dqm2 = IMX6SDL_DRIVE_STRENGTH, + .dram_dqm3 = IMX6SDL_DRIVE_STRENGTH, + .dram_dqm4 = IMX6SDL_DRIVE_STRENGTH, + .dram_dqm5 = IMX6SDL_DRIVE_STRENGTH, + .dram_dqm6 = IMX6SDL_DRIVE_STRENGTH, + .dram_dqm7 = IMX6SDL_DRIVE_STRENGTH, +}; + +struct mx6sdl_iomux_grp_regs mx6sdl_grp_ioregs = { + .grp_ddr_type = 0x000c0000, + .grp_ddrmode_ctl = 0x00020000, + .grp_ddrpke = 0x00000000, + .grp_addds = IMX6SDL_DRIVE_STRENGTH, + .grp_ctlds = IMX6SDL_DRIVE_STRENGTH, + .grp_ddrmode = 0x00020000, + .grp_b0ds = IMX6SDL_DRIVE_STRENGTH, + .grp_b1ds = IMX6SDL_DRIVE_STRENGTH, + .grp_b2ds = IMX6SDL_DRIVE_STRENGTH, + .grp_b3ds = IMX6SDL_DRIVE_STRENGTH, + .grp_b4ds = IMX6SDL_DRIVE_STRENGTH, + .grp_b5ds = IMX6SDL_DRIVE_STRENGTH, + .grp_b6ds = IMX6SDL_DRIVE_STRENGTH, + .grp_b7ds = IMX6SDL_DRIVE_STRENGTH, +}; + +static struct mx6_ddr3_cfg mt41k128m16jt_125 = { + .mem_speed = 1600, + .density = 4, + .width = 32, + .banks = 8, + .rowaddr = 14, + .coladdr = 10, + .pagesz = 2, + .trcd = 1375, + .trcmin = 4875, + .trasmin = 3500, + .SRT = 0, +}; + +static struct mx6_mmdc_calibration mx6dl_mmdc_calib = { + .p0_mpwldectrl0 = 0x0042004b, + .p0_mpwldectrl1 = 0x0038003c, + .p0_mpdgctrl0 = 0x42340230, + .p0_mpdgctrl1 = 0x0228022c, + .p0_mprddlctl = 0x42444646, + .p0_mpwrdlctl = 0x38382e2e, +}; + +static struct mx6_ddr_sysinfo mem_dl = { + .dsize = 1, + .cs1_mirror = 0, + /* config for full 4GB range so that get_mem_size() works */ + .cs_density = 32, + .ncs = 1, + .bi_on = 1, + .rtt_nom = 1, + .rtt_wr = 1, + .ralat = 5, + .walat = 0, + .mif3_mode = 3, + .rst_to_cke = 0x23, + .sde_to_rst = 0x10, + .refsel = 1, + .refr = 7, +}; + +static void spl_dram_init(void) +{ + mx6sdl_dram_iocfg(64, &mx6sdl_ddr_ioregs, &mx6sdl_grp_ioregs); + mx6_dram_cfg(&mem_dl, &mx6dl_mmdc_calib, &mt41k128m16jt_125); + + udelay(100); +} + +static void ccgr_init(void) +{ + struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + + writel(0x00003f3f, &ccm->CCGR0); + writel(0x0030fc00, &ccm->CCGR1); + writel(0x000fc000, &ccm->CCGR2); + writel(0x3f300000, &ccm->CCGR3); + writel(0xff00f300, &ccm->CCGR4); + writel(0x0f0000c3, &ccm->CCGR5); + writel(0x000003cc, &ccm->CCGR6); +} + +void board_init_f(ulong dummy) +{ + ccgr_init(); + + /* setup AIPS and disable watchdog */ + arch_cpu_init(); + + gpr_init(); + + /* iomux */ + SETUP_IOMUX_PADS(uart3_pads); + + /* setup GP timer */ + timer_init(); + + /* UART clocks enabled and gd valid - init serial console */ + preloader_console_init(); + + /* DDR initialization */ + spl_dram_init(); +} diff --git a/board/eets/pdu001/Kconfig b/board/eets/pdu001/Kconfig index f28ba6e7bff..e64ae28875b 100644 --- a/board/eets/pdu001/Kconfig +++ b/board/eets/pdu001/Kconfig @@ -19,7 +19,7 @@ config SYS_CONFIG_NAME choice prompt "State of Run LED" - default PDU001_RUN_LED_RED + default RUN_LED_RED help The PDU001 has a bi-color (red/green) LED labeled 'Run' which can be used to indicate the operating state of the board. By diff --git a/board/emulation/qemu-arm/qemu-arm.c b/board/emulation/qemu-arm/qemu-arm.c index 6ec42001706..085cbbef994 100644 --- a/board/emulation/qemu-arm/qemu-arm.c +++ b/board/emulation/qemu-arm/qemu-arm.c @@ -28,7 +28,7 @@ static struct mm_region qemu_arm64_mem_map[] = { /* RAM */ .virt = 0x40000000UL, .phys = 0x40000000UL, - .size = 0xc0000000UL, + .size = 255UL * SZ_1G, .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE }, { diff --git a/board/engicam/imx6q/MAINTAINERS b/board/engicam/imx6q/MAINTAINERS index 71f794586fa..6b46378c54e 100644 --- a/board/engicam/imx6q/MAINTAINERS +++ b/board/engicam/imx6q/MAINTAINERS @@ -9,12 +9,21 @@ F: configs/imx6dl_icore_nand_defconfig F: configs/imx6qdl_icore_rqs_defconfig F: configs/imx6qdl_icore_mipi_defconfig F: configs/imx6qdl_icore_nand_defconfig +F: arch/arm/dts/imx6qdl.dtsi +F: arch/arm/dts/imx6qdl-u-boot.dtsi F: arch/arm/dts/imx6qdl-icore.dtsi +F: arch/arm/dts/imx6qdl-icore-u-boot.dtsi F: arch/arm/dts/imx6q-icore.dts +F: arch/arm/dts/imx6q-icore-u-boot.dtsi F: arch/arm/dts/imx6dl-icore.dts +F: arch/arm/dts/imx6dl-icore-u-boot.dtsi F: arch/arm/dts/imx6qdl-icore-rqs.dtsi +F: arch/arm/dts/imx6qdl-icore-rqs-u-boot.dtsi F: arch/arm/dts/imx6q-icore-rqs.dts +F: arch/arm/dts/imx6q-icore-rqs-u-boot.dtsi F: arch/arm/dts/imx6dl-icore-rqs.dts +F: arch/arm/dts/imx6dl-icore-rqs-u-boot.dtsi F: arch/arm/dts/imx6dl-icore-mipi.dts +F: arch/arm/dts/imx6dl-icore-mipi-u-boot.dtsi F: arch/arm/dts/imx6q-icore-mipi.dts -F: arch/arm/dts/imx6qdl-icore.dtsi +F: arch/arm/dts/imx6q-icore-mipi-u-boot.dtsi diff --git a/board/engicam/imx6ul/MAINTAINERS b/board/engicam/imx6ul/MAINTAINERS index 73dbec88e24..88db309aec1 100644 --- a/board/engicam/imx6ul/MAINTAINERS +++ b/board/engicam/imx6ul/MAINTAINERS @@ -8,7 +8,12 @@ F: configs/imx6ul_geam_nand_defconfig F: configs/imx6ul_isiot_emmc_defconfig F: configs/imx6ul_isiot_mmc_defconfig F: configs/imx6ul_isiot_nand_defconfig +F: arch/arm/dts/imx6ul.dtsi +F: arch/arm/dts/imx6ul-u-boot.dtsi F: arch/arm/dts/imx6ul-geam-kit.dts +F: arch/arm/dts/imx6ul-geam-kit-u-boot.dtsi F: arch/arm/dts/imx6ul-isiot.dtsi +F: arch/arm/dts/imx6ul-isiot-u-boot.dtsi F: arch/arm/dts/imx6ul-isiot-emmc.dts +F: arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi F: arch/arm/dts/imx6ul-isiot-nand.dts diff --git a/board/gdsys/a38x/controlcenterdc.c b/board/gdsys/a38x/controlcenterdc.c index 320bc100c9d..824a08f12af 100644 --- a/board/gdsys/a38x/controlcenterdc.c +++ b/board/gdsys/a38x/controlcenterdc.c @@ -7,7 +7,7 @@ #include <common.h> #include <dm.h> #include <miiphy.h> -#include <tpm.h> +#include <tpm-v1.h> #include <asm/io.h> #include <asm/arch/cpu.h> #include <asm-generic/gpio.h> diff --git a/board/gdsys/a38x/hre.c b/board/gdsys/a38x/hre.c index 961316cab78..34c4df71b25 100644 --- a/board/gdsys/a38x/hre.c +++ b/board/gdsys/a38x/hre.c @@ -9,7 +9,7 @@ #include <fs.h> #include <i2c.h> #include <mmc.h> -#include <tpm.h> +#include <tpm-v1.h> #include <u-boot/sha1.h> #include <asm/byteorder.h> #include <asm/unaligned.h> diff --git a/board/gdsys/a38x/keyprogram.c b/board/gdsys/a38x/keyprogram.c index f6a2747fb25..1fb5306b50f 100644 --- a/board/gdsys/a38x/keyprogram.c +++ b/board/gdsys/a38x/keyprogram.c @@ -5,7 +5,7 @@ */ #include <common.h> -#include <tpm.h> +#include <tpm-v1.h> #include <malloc.h> #include <linux/ctype.h> #include <asm/unaligned.h> diff --git a/board/gdsys/p1022/controlcenterd-id.c b/board/gdsys/p1022/controlcenterd-id.c index 87edf92f43a..7e082dff052 100644 --- a/board/gdsys/p1022/controlcenterd-id.c +++ b/board/gdsys/p1022/controlcenterd-id.c @@ -15,7 +15,7 @@ #include <fs.h> #include <i2c.h> #include <mmc.h> -#include <tpm.h> +#include <tpm-v1.h> #include <u-boot/sha1.h> #include <asm/byteorder.h> #include <asm/unaligned.h> diff --git a/board/ge/bx50v3/Kconfig b/board/ge/bx50v3/Kconfig index d50dece18ee..993b0559302 100644 --- a/board/ge/bx50v3/Kconfig +++ b/board/ge/bx50v3/Kconfig @@ -1,4 +1,4 @@ -if TARGET_GE_B450V3 || TARGET_GE_B650V3 || TARGET_GE_B850V3 +if TARGET_GE_BX50V3 config IMX_CONFIG default "board/ge/bx50v3/bx50v3.cfg" diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c index 05142eba51c..b2d065c1b80 100644 --- a/board/ge/bx50v3/bx50v3.c +++ b/board/ge/bx50v3/bx50v3.c @@ -33,6 +33,11 @@ #include "../../../drivers/net/e1000.h" DECLARE_GLOBAL_DATA_PTR; +struct vpd_cache; + +static int confidx = 3; /* Default to b850v3. */ +static struct vpd_cache vpd; + #ifndef CONFIG_SYS_I2C_EEPROM_ADDR # define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 @@ -361,20 +366,21 @@ int board_cfb_skip(void) return 0; } -static int detect_baseboard(struct display_info_t const *dev) +static int is_b850v3(void) { - if (IS_ENABLED(CONFIG_TARGET_GE_B450V3) || - IS_ENABLED(CONFIG_TARGET_GE_B650V3)) - return 1; + return confidx == 3; +} - return 0; +static int detect_lcd(struct display_info_t const *dev) +{ + return !is_b850v3(); } struct display_info_t const displays[] = {{ .bus = -1, .addr = -1, .pixfmt = IPU_PIX_FMT_RGB24, - .detect = detect_baseboard, + .detect = detect_lcd, .enable = NULL, .mode = { .name = "G121X1-L03", @@ -492,6 +498,8 @@ static void setup_display_bx50v3(void) struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; + enable_videopll(); + /* When a reset/reboot is performed the display power needs to be turned * off for atleast 500ms. The boot time is ~300ms, we need to wait for * an additional 200ms here. Unfortunately we use external PMIC for @@ -593,23 +601,16 @@ static void process_vpd(struct vpd_cache *vpd) switch (vpd->product_id) { case VPD_PRODUCT_B450: env_set("confidx", "1"); + i210_index = 0; + fec_index = 1; break; case VPD_PRODUCT_B650: env_set("confidx", "2"); - break; - case VPD_PRODUCT_B850: - env_set("confidx", "3"); - break; - } - - switch (vpd->product_id) { - case VPD_PRODUCT_B450: - /* fall thru */ - case VPD_PRODUCT_B650: i210_index = 0; fec_index = 1; break; case VPD_PRODUCT_B850: + env_set("confidx", "3"); i210_index = 1; fec_index = 2; break; @@ -624,7 +625,6 @@ static void process_vpd(struct vpd_cache *vpd) static int read_vpd(uint eeprom_bus) { - struct vpd_cache vpd; int res; int size = 1024; uint8_t *data; @@ -644,7 +644,6 @@ static int read_vpd(uint eeprom_bus) if (res == 0) { memset(&vpd, 0, sizeof(vpd)); vpd_reader(size, data, &vpd, vpd_callback); - process_vpd(&vpd); } free(data); @@ -684,7 +683,7 @@ int board_early_init_f(void) setup_iomux_uart(); #if defined(CONFIG_VIDEO_IPUV3) - if (IS_ENABLED(CONFIG_TARGET_GE_B850V3)) + if (is_b850v3()) /* Set LDB clock to Video PLL */ select_ldb_di_clock_source(MXC_PLL5_CLK); else @@ -694,12 +693,35 @@ int board_early_init_f(void) return 0; } +static void set_confidx(const struct vpd_cache* vpd) +{ + switch (vpd->product_id) { + case VPD_PRODUCT_B450: + confidx = 1; + break; + case VPD_PRODUCT_B650: + confidx = 2; + break; + case VPD_PRODUCT_B850: + confidx = 3; + break; + } +} + int board_init(void) { + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); + setup_i2c(3, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info3); + + read_vpd(CONFIG_SYS_I2C_EEPROM_BUS); + + set_confidx(&vpd); + gpio_direction_output(SUS_S3_OUT, 1); gpio_direction_output(WIFI_EN, 1); #if defined(CONFIG_VIDEO_IPUV3) - if (IS_ENABLED(CONFIG_TARGET_GE_B850V3)) + if (is_b850v3()) setup_display_b850v3(); else setup_display_bx50v3(); @@ -710,10 +732,6 @@ int board_init(void) #ifdef CONFIG_MXC_SPI setup_spi(); #endif - setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); - setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); - setup_i2c(3, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info3); - return 0; } @@ -779,12 +797,15 @@ void pmic_init(void) int board_late_init(void) { - read_vpd(CONFIG_SYS_I2C_EEPROM_BUS); + process_vpd(&vpd); #ifdef CONFIG_CMD_BMODE add_board_boot_modes(board_boot_modes); #endif + if (is_b850v3()) + env_set("videoargs", "video=DP-1:1024x768@60 video=HDMI-A-1:1024x768@60"); + /* board specific pmic init */ pmic_init(); diff --git a/board/k+p/kp_imx53/Kconfig b/board/k+p/kp_imx53/Kconfig new file mode 100644 index 00000000000..017c1e30d88 --- /dev/null +++ b/board/k+p/kp_imx53/Kconfig @@ -0,0 +1,15 @@ +if TARGET_KP_IMX53 + +config SYS_BOARD + default "kp_imx53" + +config SYS_VENDOR + default "k+p" + +config SYS_SOC + default "mx5" + +config SYS_CONFIG_NAME + default "kp_imx53" + +endif diff --git a/board/k+p/kp_imx53/MAINTAINERS b/board/k+p/kp_imx53/MAINTAINERS new file mode 100644 index 00000000000..c105a93e707 --- /dev/null +++ b/board/k+p/kp_imx53/MAINTAINERS @@ -0,0 +1,6 @@ +KP_IMX53_HSC BOARD +M: Lukasz Majewski <lukma@denx.de> +S: Maintained +F: board/k+p/kp_imx53/ +F: include/configs/kp_imx53.h +F: configs/kp_imx53_defconfig diff --git a/board/k+p/kp_imx53/Makefile b/board/k+p/kp_imx53/Makefile new file mode 100644 index 00000000000..66629c98ab9 --- /dev/null +++ b/board/k+p/kp_imx53/Makefile @@ -0,0 +1,8 @@ +# +# Copyright (C) 2018, DENX Software Engineering +# Lukasz Majewski <lukma@denx.de> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += kp_imx53.o kp_id_rev.o diff --git a/board/k+p/kp_imx53/kp_id_rev.c b/board/k+p/kp_imx53/kp_id_rev.c new file mode 100644 index 00000000000..e8f51769f66 --- /dev/null +++ b/board/k+p/kp_imx53/kp_id_rev.c @@ -0,0 +1,120 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de + * + * Based on code developed by: + * + * Copyright (C) 2012 TQ-Systems GmbH + * Daniel Gericke <daniel.gericke@tqs.de> + */ + +#include <common.h> +#include <environment.h> +#include <i2c.h> +#include "kp_id_rev.h" + +static int eeprom_has_been_read; +static struct id_eeprom eeprom; + +void show_eeprom(void) +{ + char safe_string[33]; + int i; + u8 *p; + + puts("Module EEPROM:\n"); + /* ID */ + for (i = 0; i <= sizeof(eeprom.id) && 0xff != eeprom.id[i]; ++i) + safe_string[i] = eeprom.id[i]; + safe_string[i] = '\0'; + + if (!strncmp(safe_string, "TQM", 3)) { + printf(" ID: %s\n", safe_string); + env_set("boardtype", safe_string); + } else { + puts(" unknown hardware variant\n"); + } + + /* Serial number */ + for (i = 0; (sizeof(eeprom.serial) >= i) && + (eeprom.serial[i] >= 0x30) && + (eeprom.serial[i] <= 0x39); ++i) + safe_string[i] = eeprom.serial[i]; + safe_string[i] = '\0'; + + if (strlen(safe_string) == 8) { + printf(" SN: %s\n", safe_string); + env_set("serial#", safe_string); + } else { + puts(" unknown serial number\n"); + } + + /* MAC address */ + p = eeprom.mac; + if (!is_valid_ethaddr(p)) { + printf(" Not valid ETH EEPROM addr!\n"); + return; + } + + printf(" MAC: %02x:%02x:%02x:%02x:%02x:%02x\n", + p[0], p[1], p[2], p[3], p[4], p[5]); + + eth_env_set_enetaddr("ethaddr", p); +} + +int read_eeprom(void) +{ + struct udevice *dev; + int ret; + + if (eeprom_has_been_read) + return 0; + + ret = i2c_get_chip_for_busnum(CONFIG_SYS_EEPROM_BUS_NUM, + CONFIG_SYS_I2C_EEPROM_ADDR, + CONFIG_SYS_I2C_EEPROM_ADDR_LEN, &dev); + if (ret) { + printf("Cannot find EEPROM !\n"); + return ret; + } + + ret = dm_i2c_read(dev, 0x0, (uchar *)&eeprom, sizeof(eeprom)); + + eeprom_has_been_read = (ret == 0) ? 1 : 0; + return ret; +} + +int read_board_id(void) +{ + unsigned char rev_id = 0x42; + char rev_str[32], buf[8]; + struct udevice *dev; + int ret; + + ret = i2c_get_chip_for_busnum(2, 0x22, 1, &dev); + if (ret) { + printf("Cannot find pcf8574 IO expander !\n"); + return ret; + } + + dm_i2c_read(dev, 0x0, &rev_id, sizeof(rev_id)); + + sprintf(rev_str, "%02X", rev_id); + if (rev_id & 0x80) { + printf("BBoard:4x00 Rev:%s\n", rev_str); + env_set("boardtype", "ddc"); + env_set("fit_config", "imx53_kb_conf"); + } else { + printf("BBoard:40x0 Rev:%s\n", rev_str); + env_set("boardtype", "hsc"); + env_set("fit_config", "imx53_kb_40x0_conf"); + } + + sprintf(buf, "kp-%s", env_get("boardtype")); + env_set("boardname", buf); + env_set("boardsoc", "imx53"); + env_set("kb53_rev", rev_str); + + return 0; +} diff --git a/board/k+p/kp_imx53/kp_id_rev.h b/board/k+p/kp_imx53/kp_id_rev.h new file mode 100644 index 00000000000..aa64173926c --- /dev/null +++ b/board/k+p/kp_imx53/kp_id_rev.h @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2018 + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de + * + * Based on code developed by: + * + * Copyright (C) 2012 TQ-Systems GmbH + * Daniel Gericke <daniel.gericke@tqs.de> + */ + +#ifndef __KP_ID_REV_H_ +#define __KP_ID_REV_H_ + +struct id_eeprom { + u8 hrcw_primary[0x20]; + u8 mac[6]; /* 0x20 ... 0x25 */ + u8 rsv1[10]; + u8 serial[8]; /* 0x30 ... 0x37 */ + u8 rsv2[8]; + u8 id[0x40]; /* 0x40 ... 0x7f */ +} __packed; + +void show_eeprom(void); +int read_eeprom(void); +int read_board_id(void); +#endif /* __KP_ID_REV_H_ */ diff --git a/board/k+p/kp_imx53/kp_imx53.c b/board/k+p/kp_imx53/kp_imx53.c new file mode 100644 index 00000000000..c80eed36c62 --- /dev/null +++ b/board/k+p/kp_imx53/kp_imx53.c @@ -0,0 +1,211 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/clock.h> +#include <asm/arch/iomux-mx53.h> +#include <asm/arch/clock.h> +#include <asm/gpio.h> +#include <mmc.h> +#include <fsl_esdhc.h> +#include <power/pmic.h> +#include <fsl_pmic.h> +#include "kp_id_rev.h" + +#define VBUS_PWR_EN IMX_GPIO_NR(7, 8) +#define PHY_nRST IMX_GPIO_NR(7, 6) +#define BOOSTER_OFF IMX_GPIO_NR(2, 23) + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + u32 size; + + size = get_ram_size((void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); + gd->ram_size = size; + + return 0; +} + +int dram_init_banksize(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + return 0; +} + +u32 get_board_rev(void) +{ + struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE; + struct fuse_bank *bank = &iim->bank[0]; + struct fuse_bank0_regs *fuse = + (struct fuse_bank0_regs *)bank->fuse_regs; + + int rev = readl(&fuse->gp[6]); + + return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8; +} + +#ifdef CONFIG_USB_EHCI_MX5 +int board_ehci_hcd_init(int port) +{ + gpio_request(VBUS_PWR_EN, "VBUS_PWR_EN"); + gpio_direction_output(VBUS_PWR_EN, 1); + return 0; +} +#endif + +#ifdef CONFIG_FSL_ESDHC +struct fsl_esdhc_cfg esdhc_cfg[] = { + {MMC_SDHC3_BASE_ADDR}, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + return 1; /* eMMC is always present */ +} + +#define SD_CMD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \ + PAD_CTL_PUS_100K_UP) +#define SD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | \ + PAD_CTL_DSE_HIGH) + +int board_mmc_init(bd_t *bis) +{ + int ret; + + static const iomux_v3_cfg_t sd3_pads[] = { + NEW_PAD_CTRL(MX53_PAD_PATA_RESET_B__ESDHC3_CMD, + SD_CMD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_PATA_IORDY__ESDHC3_CLK, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA8__ESDHC3_DAT0, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA9__ESDHC3_DAT1, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA10__ESDHC3_DAT2, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA11__ESDHC3_DAT3, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA0__ESDHC3_DAT4, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA1__ESDHC3_DAT5, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA2__ESDHC3_DAT6, SD_PAD_CTRL), + NEW_PAD_CTRL(MX53_PAD_PATA_DATA3__ESDHC3_DAT7, SD_PAD_CTRL), + }; + + esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + imx_iomux_v3_setup_multiple_pads(sd3_pads, ARRAY_SIZE(sd3_pads)); + + ret = fsl_esdhc_initialize(bis, &esdhc_cfg[0]); + if (ret) + return ret; + + return 0; +} +#endif + +static int power_init(void) +{ + struct udevice *dev; + int ret; + + ret = pmic_get("mc34708", &dev); + if (ret) { + printf("%s: mc34708 not found !\n", __func__); + return ret; + } + + /* Set VDDGP to 1.110V for 800 MHz on SW1 */ + pmic_clrsetbits(dev, REG_SW_0, SWx_VOLT_MASK_MC34708, + SWx_1_110V_MC34708); + + /* Set VCC as 1.30V on SW2 */ + pmic_clrsetbits(dev, REG_SW_1, SWx_VOLT_MASK_MC34708, + SWx_1_300V_MC34708); + + /* Set global reset timer to 4s */ + pmic_clrsetbits(dev, REG_POWER_CTL2, TIMER_MASK_MC34708, + TIMER_4S_MC34708); + + return ret; +} + +static void setup_clocks(void) +{ + int ret; + u32 ref_clk = MXC_HCLK; + /* + * CPU clock set to 800MHz and DDR to 400MHz + */ + ret = mxc_set_clock(ref_clk, 800, MXC_ARM_CLK); + if (ret) + printf("CPU: Switch CPU clock to 800MHZ failed\n"); + + ret = mxc_set_clock(ref_clk, 400, MXC_PERIPH_CLK); + ret |= mxc_set_clock(ref_clk, 400, MXC_DDR_CLK); + if (ret) + printf("CPU: Switch DDR clock to 400MHz failed\n"); +} + +static void setup_ups(void) +{ + gpio_request(BOOSTER_OFF, "BOOSTER_OFF"); + gpio_direction_output(BOOSTER_OFF, 0); +} + +int board_early_init_f(void) +{ + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +int board_init(void) +{ + gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; + + return 0; +} + +void eth_phy_reset(void) +{ + gpio_request(PHY_nRST, "PHY_nRST"); + gpio_direction_output(PHY_nRST, 1); + udelay(50); + gpio_set_value(PHY_nRST, 0); + udelay(400); + gpio_set_value(PHY_nRST, 1); + udelay(50); +} + +int board_late_init(void) +{ + int ret = 0; + + setup_ups(); + + if (!power_init()) + setup_clocks(); + + ret = read_eeprom(); + if (ret) + printf("Error %d reading EEPROM content!\n", ret); + + eth_phy_reset(); + + show_eeprom(); + read_board_id(); + + return ret; +} diff --git a/board/lego/ev3/README b/board/lego/ev3/README index 1a50ca9d035..da62a649bad 100644 --- a/board/lego/ev3/README +++ b/board/lego/ev3/README @@ -9,14 +9,34 @@ Booting ======= The EV3 contains a bootloader in EEPROM that loads u-boot.bin from address 0x0 -of the spi flash memory. Using the default configuration, u-boot will check to -see if there is a boot.scr file on the first FAT partition of the mmc. If there -is, it will run the script and boot the kernel from the uImage file also in -the FAT partition. Otherwise, it will load a kernel and rootfs from the flash. -The kernel must be stored at address 0x50000 on the flash and have a maximum -size of 3MiB. The rootfs must be a squasfs image and stored at 0x350000 in the -flash and have a maximum size of 9.3MiB. The flash starting at 0xCB0000 is -reserved for user data. +of the SPI flash memory (with a size of 256KiB!). Because the EEPROM is read- +only and it takes care of low level configuration (PLL and DDR), we don't use +U-Boot to produce an SPL image. + +Using the default configuration, U-Boot had a boot scrips that works as follows: + +* Check to see if microSD card is present +* If it is, try to load boot.scr from the first FAT partition +* If loading boot.scr was successful, run it +* Otherwise, try loading uEnv.txt +* If loading uEnv.txt was successful, import it +* If there is a uenvcmd variable (from uEnv.txt), run it +* Try to load uImage from the first FAT partition +* If it was successful, try to load da850-lego-ev3.dtb +* If loading uImage was successful, boot it (DT is optional) +* If none of the above was successful, try booting from flash + +Suggested Flash Memory Layout +============================= + +The following is based on the default U-Boot configuration: + +| Image (file) | Start Addr. | Max. Size | ++--------------------+-------------+-------------------+ +| u-boot.bin | 0x0 | 0x40000 (256KiB) | +| da850-lego-ev3.dtb | 0x40000 | 0x10000 (64KiB) | +| uImage | 0x50000 | 0x400000 (4MiB) | +| rootfs (squashfs) | 0x450000 | 0xa00000 (10MiB) | Writing image to flash ====================== diff --git a/board/lego/ev3/legoev3.c b/board/lego/ev3/legoev3.c index 5e70363588d..423c2fa44b9 100644 --- a/board/lego/ev3/legoev3.c +++ b/board/lego/ev3/legoev3.c @@ -14,8 +14,6 @@ #include <common.h> #include <i2c.h> -#include <net.h> -#include <netdev.h> #include <spi.h> #include <spi_flash.h> #include <asm/arch/hardware.h> @@ -132,6 +130,11 @@ void get_board_serial(struct tag_serialnr *serialnr) int board_early_init_f(void) { + /* enable the console UART */ + writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | + DAVINCI_UART_PWREMU_MGMT_UTRST), + &davinci_uart1_ctrl_regs->pwremu_mgmt); + /* * Power on required peripherals * ARM does not have access by default to PSC0 and PSC1 @@ -157,7 +160,7 @@ int board_init(void) /* setup the SUSPSRC for ARM to control emulation suspend */ writel(readl(&davinci_syscfg_regs->suspsrc) & - ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C | + ~(DAVINCI_SYSCFG_SUSPSRC_I2C | DAVINCI_SYSCFG_SUSPSRC_SPI0 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 | DAVINCI_SYSCFG_SUSPSRC_UART1), &davinci_syscfg_regs->suspsrc); @@ -166,10 +169,5 @@ int board_init(void) if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes))) return 1; - /* enable the console UART */ - writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST | - DAVINCI_UART_PWREMU_MGMT_UTRST), - &davinci_uart1_ctrl_regs->pwremu_mgmt); - return 0; } diff --git a/board/lg/sniper/sniper.c b/board/lg/sniper/sniper.c index 34a7a11f053..a7de4c21674 100644 --- a/board/lg/sniper/sniper.c +++ b/board/lg/sniper/sniper.c @@ -173,7 +173,7 @@ void reset_misc(void) omap_reboot_mode_store(reboot_mode); } -int fb_set_reboot_flag(void) +int fastboot_set_reboot_flag(void) { return omap_reboot_mode_store("b"); } diff --git a/board/qualcomm/dragonboard410c/MAINTAINERS b/board/qualcomm/dragonboard410c/MAINTAINERS index 70723ac5b76..a43f1c878ed 100644 --- a/board/qualcomm/dragonboard410c/MAINTAINERS +++ b/board/qualcomm/dragonboard410c/MAINTAINERS @@ -1,5 +1,5 @@ DRAGONBOARD410C BOARD -M: Jorge Ramirez-Ortiz <jramirez@baylibre.com> +M: Ramon Fried <ramon.fried@gmail.com> S: Maintained F: board/qualcomm/dragonboard410c/ F: include/configs/dragonboard410c.h diff --git a/board/renesas/blanche/Makefile b/board/renesas/blanche/Makefile index bdbfb291ecd..21986af472c 100644 --- a/board/renesas/blanche/Makefile +++ b/board/renesas/blanche/Makefile @@ -6,4 +6,4 @@ # SPDX-License-Identifier: GPL-2.0 # -obj-y := blanche.o qos.o ../rcar-common/common.o +obj-y := blanche.o qos.o diff --git a/board/renesas/blanche/blanche.c b/board/renesas/blanche/blanche.c index fb1c93973a5..7d48d0faf95 100644 --- a/board/renesas/blanche/blanche.c +++ b/board/renesas/blanche/blanche.c @@ -7,114 +7,40 @@ */ #include <common.h> -#include <malloc.h> -#include <netdev.h> +#include <asm/arch/mmc.h> +#include <asm/arch/rcar-mstp.h> +#include <asm/arch/rmobile.h> +#include <asm/arch/sh_sdhi.h> +#include <asm/arch/sys_proto.h> +#include <asm/gpio.h> +#include <asm/io.h> +#include <asm/mach-types.h> +#include <asm/processor.h> #include <dm.h> #include <dm/platform_data/serial_sh.h> #include <environment.h> -#include <asm/processor.h> -#include <asm/mach-types.h> -#include <asm/io.h> +#include <i2c.h> #include <linux/errno.h> -#include <asm/arch/sys_proto.h> -#include <asm/gpio.h> -#include <asm/arch/rmobile.h> -#include <asm/arch/rcar-mstp.h> -#include <asm/arch/mmc.h> -#include <asm/arch/sh_sdhi.h> +#include <malloc.h> #include <miiphy.h> -#include <i2c.h> #include <mmc.h> +#include <netdev.h> #include "qos.h" DECLARE_GLOBAL_DATA_PTR; -struct pin_db { - u32 addr; /* register address */ - u32 mask; /* mask value */ - u32 val; /* setting value */ -}; - -#define PMMR 0xE6060000 -#define GPSR0 0xE6060004 -#define GPSR1 0xE6060008 -#define GPSR4 0xE6060014 -#define GPSR5 0xE6060018 -#define GPSR6 0xE606001C -#define GPSR7 0xE6060020 -#define GPSR8 0xE6060024 -#define GPSR9 0xE6060028 -#define GPSR10 0xE606002C -#define GPSR11 0xE6060030 -#define IPSR6 0xE6060058 -#define PUPR2 0xE6060108 -#define PUPR3 0xE606010C -#define PUPR4 0xE6060110 -#define PUPR5 0xE6060114 -#define PUPR7 0xE606011C -#define PUPR9 0xE6060124 -#define PUPR10 0xE6060128 -#define PUPR11 0xE606012C - #define CPG_PLL1CR 0xE6150028 #define CPG_PLL3CR 0xE61500DC -#define SetREG(x) \ - writel((readl((x)->addr) & ~((x)->mask)) | ((x)->val), (x)->addr) - -#define SetGuardREG(x) \ -{ \ - u32 val; \ - val = (readl((x)->addr) & ~((x)->mask)) | ((x)->val); \ - writel(~val, PMMR); \ - writel(val, (x)->addr); \ -} - -struct pin_db pin_guard[] = { - { GPSR0, 0xFFFFFFFF, 0x0BFFFFFF }, - { GPSR1, 0xFFFFFFFF, 0x002FFFFF }, - { GPSR4, 0xFFFFFFFF, 0x00000FFF }, - { GPSR5, 0xFFFFFFFF, 0x00010FFF }, - { GPSR6, 0xFFFFFFFF, 0x00010FFF }, - { GPSR7, 0xFFFFFFFF, 0x00010FFF }, - { GPSR8, 0xFFFFFFFF, 0x00010FFF }, - { GPSR9, 0xFFFFFFFF, 0x00010FFF }, - { GPSR10, 0xFFFFFFFF, 0x04006000 }, - { GPSR11, 0xFFFFFFFF, 0x303FEFE0 }, - { IPSR6, 0xFFFFFFFF, 0x0002000E }, -}; +#define TMU0_MSTP125 BIT(25) +#define QSPI_MSTP917 BIT(17) -struct pin_db pin_tbl[] = { - { PUPR2, 0xFFFFFFFF, 0x00000000 }, - { PUPR3, 0xFFFFFFFF, 0x0803FF40 }, - { PUPR4, 0xFFFFFFFF, 0x0000FFFF }, - { PUPR5, 0xFFFFFFFF, 0x00010FFF }, - { PUPR7, 0xFFFFFFFF, 0x0001AFFF }, - { PUPR9, 0xFFFFFFFF, 0x0001CFFF }, - { PUPR10, 0xFFFFFFFF, 0xC0438001 }, - { PUPR11, 0xFFFFFFFF, 0x0FC00007 }, +struct reg_config { + u16 off; + u32 val; }; -void pin_init(void) -{ - struct pin_db *db; - - for (db = pin_guard; db < &pin_guard[sizeof(pin_guard)/sizeof(struct pin_db)]; db++) { - SetGuardREG(db); - } - for (db = pin_tbl; db < &pin_tbl[sizeof(pin_tbl) /sizeof(struct pin_db)]; db++) { - SetREG(db); - } -} - -#define s_init_wait(cnt) \ - ({ \ - volatile u32 i = 0x10000 * cnt; \ - while (i > 0) \ - i--; \ - }) - -void s_init(void) +static void blanche_init_sys(void) { struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE; struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE; @@ -129,299 +55,277 @@ void s_init(void) /* Watchdog init */ writel(0xA5A5A500, &rwdt->rwtcsra); writel(0xA5A5A500, &swdt->swtcsra); +} - /* QoS(Quality-of-Service) Init */ - qos_init(); +static void blanche_init_pfc(void) +{ + static const struct reg_config pfc_with_unlock[] = { + { 0x0004, 0x0bffffff }, + { 0x0008, 0x002fffff }, + { 0x0014, 0x00000fff }, + { 0x0018, 0x00010fff }, + { 0x001c, 0x00010fff }, + { 0x0020, 0x00010fff }, + { 0x0024, 0x00010fff }, + { 0x0028, 0x00010fff }, + { 0x002c, 0x04006000 }, + { 0x0030, 0x303fefe0 }, + { 0x0058, 0x0002000e }, + }; + + static const struct reg_config pfc_without_unlock[] = { + { 0x0108, 0x00000000 }, + { 0x010c, 0x0803FF40 }, + { 0x0110, 0x0000FFFF }, + { 0x0114, 0x00010FFF }, + { 0x011c, 0x0001AFFF }, + { 0x0124, 0x0001CFFF }, + { 0x0128, 0xC0438001 }, + { 0x012c, 0x0FC00007 }, + }; + + static const u32 pfc_base = 0xe6060000; + + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(pfc_with_unlock); i++) { + writel(~pfc_with_unlock[i].val, pfc_base); + writel(pfc_with_unlock[i].val, + pfc_base | pfc_with_unlock[i].off); + } + + for (i = 0; i < ARRAY_SIZE(pfc_without_unlock); i++) + writel(pfc_without_unlock[i].val, + pfc_base | pfc_without_unlock[i].off); +} - /* SCIF Init */ - pin_init(); +static void blanche_init_lbsc(void) +{ + static const struct reg_config lbsc_config[] = { + { 0x00, 0x00000020 }, + { 0x08, 0x00002020 }, + { 0x30, 0x2a103320 }, + { 0x38, 0x19102110 }, + }; + + static const u32 lbsc_base = 0xfec00200; + + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(lbsc_config); i++) { + writel(lbsc_config[i].val, + lbsc_base | lbsc_config[i].off); + writel(lbsc_config[i].val, + lbsc_base | (lbsc_config[i].off + 4)); + } +} #if defined(CONFIG_MTD_NOR_FLASH) - struct rcar_lbsc *lbsc = (struct rcar_lbsc *)LBSC_BASE; - struct rcar_dbsc3 *dbsc3_0 = (struct rcar_dbsc3 *)DBSC3_0_BASE; +static void dbsc_wait(u16 reg) +{ + static const u32 dbsc3_0_base = DBSC3_0_BASE; - /* LBSC */ - writel(0x00000020, &lbsc->cs0ctrl); - writel(0x00000020, &lbsc->cs1ctrl); - writel(0x00002020, &lbsc->ecs0ctrl); - writel(0x00002020, &lbsc->ecs1ctrl); + while (!(readl(dbsc3_0_base + reg) & BIT(0))) + ; +} - writel(0x2A103320, &lbsc->cswcr0); - writel(0x2A103320, &lbsc->cswcr1); - writel(0x19102110, &lbsc->ecswcr0); - writel(0x19102110, &lbsc->ecswcr1); +static void blanche_init_dbsc(void) +{ + static const struct reg_config dbsc_config1[] = { + { 0x0280, 0x0000a55a }, + { 0x0018, 0x21000000 }, + { 0x0018, 0x11000000 }, + { 0x0018, 0x10000000 }, + { 0x0290, 0x00000001 }, + { 0x02a0, 0x80000000 }, + { 0x0290, 0x00000004 }, + }; + + static const struct reg_config dbsc_config2[] = { + { 0x0290, 0x00000006 }, + { 0x02a0, 0x0001c000 }, + }; + + static const struct reg_config dbsc_config4[] = { + { 0x0290, 0x0000000f }, + { 0x02a0, 0x00181ee4 }, + { 0x0290, 0x00000010 }, + { 0x02a0, 0xf00464db }, + { 0x0290, 0x00000061 }, + { 0x02a0, 0x0000008d }, + { 0x0290, 0x00000001 }, + { 0x02a0, 0x00000073 }, + { 0x0020, 0x00000007 }, + { 0x0024, 0x0f030a02 }, + { 0x0030, 0x00000001 }, + { 0x00b0, 0x00000000 }, + { 0x0040, 0x0000000b }, + { 0x0044, 0x00000008 }, + { 0x0048, 0x00000000 }, + { 0x0050, 0x0000000b }, + { 0x0054, 0x000c000b }, + { 0x0058, 0x00000027 }, + { 0x005c, 0x0000001c }, + { 0x0060, 0x00000006 }, + { 0x0064, 0x00000020 }, + { 0x0068, 0x00000008 }, + { 0x006c, 0x0000000c }, + { 0x0070, 0x00000009 }, + { 0x0074, 0x00000012 }, + { 0x0078, 0x000000d0 }, + { 0x007c, 0x00140005 }, + { 0x0080, 0x00050004 }, + { 0x0084, 0x70233005 }, + { 0x0088, 0x000c0000 }, + { 0x008c, 0x00000300 }, + { 0x0090, 0x00000040 }, + { 0x0100, 0x00000001 }, + { 0x00c0, 0x00020001 }, + { 0x00c8, 0x20082004 }, + { 0x0380, 0x00020002 }, + { 0x0390, 0x0000001f }, + }; + + static const struct reg_config dbsc_config5[] = { + { 0x0244, 0x00000011 }, + { 0x0290, 0x00000003 }, + { 0x02a0, 0x0300c4e1 }, + { 0x0290, 0x00000023 }, + { 0x02a0, 0x00fcdb60 }, + { 0x0290, 0x00000011 }, + { 0x02a0, 0x1000040b }, + { 0x0290, 0x00000012 }, + { 0x02a0, 0x9d9cbb66 }, + { 0x0290, 0x00000013 }, + { 0x02a0, 0x1a868400 }, + { 0x0290, 0x00000014 }, + { 0x02a0, 0x300214d8 }, + { 0x0290, 0x00000015 }, + { 0x02a0, 0x00000d70 }, + { 0x0290, 0x00000016 }, + { 0x02a0, 0x00000004 }, + { 0x0290, 0x00000017 }, + { 0x02a0, 0x00000018 }, + { 0x0290, 0x0000001a }, + { 0x02a0, 0x910035c7 }, + { 0x0290, 0x00000004 }, + }; + + static const struct reg_config dbsc_config6[] = { + { 0x0290, 0x00000001 }, + { 0x02a0, 0x00000181 }, + { 0x0018, 0x11000000 }, + { 0x0290, 0x00000004 }, + }; + + static const struct reg_config dbsc_config7[] = { + { 0x0290, 0x00000001 }, + { 0x02a0, 0x0000fe01 }, + { 0x0304, 0x00000000 }, + { 0x00f4, 0x01004c20 }, + { 0x00f8, 0x014000aa }, + { 0x00e0, 0x00000140 }, + { 0x00e4, 0x00081860 }, + { 0x00e8, 0x00010000 }, + { 0x0290, 0x00000004 }, + }; + + static const struct reg_config dbsc_config8[] = { + { 0x0014, 0x00000001 }, + { 0x0010, 0x00000001 }, + { 0x0280, 0x00000000 }, + }; + + static const u32 dbsc3_0_base = DBSC3_0_BASE; + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(dbsc_config1); i++) + writel(dbsc_config1[i].val, dbsc3_0_base | dbsc_config1[i].off); + + dbsc_wait(0x2a0); + + for (i = 0; i < ARRAY_SIZE(dbsc_config2); i++) + writel(dbsc_config2[i].val, dbsc3_0_base | dbsc_config2[i].off); + + for (i = 0; i < ARRAY_SIZE(dbsc_config4); i++) + writel(dbsc_config4[i].val, dbsc3_0_base | dbsc_config4[i].off); + + dbsc_wait(0x240); + + for (i = 0; i < ARRAY_SIZE(dbsc_config5); i++) + writel(dbsc_config5[i].val, dbsc3_0_base | dbsc_config5[i].off); + + dbsc_wait(0x2a0); + + for (i = 0; i < ARRAY_SIZE(dbsc_config6); i++) + writel(dbsc_config6[i].val, dbsc3_0_base | dbsc_config6[i].off); + + dbsc_wait(0x2a0); + + for (i = 0; i < ARRAY_SIZE(dbsc_config7); i++) + writel(dbsc_config7[i].val, dbsc3_0_base | dbsc_config7[i].off); + + dbsc_wait(0x2a0); + + for (i = 0; i < ARRAY_SIZE(dbsc_config8); i++) + writel(dbsc_config8[i].val, dbsc3_0_base | dbsc_config8[i].off); - /* DBSC3 */ - s_init_wait(10); +} - writel(0x0000A55A, &dbsc3_0->dbpdlck); - - writel(0x21000000, &dbsc3_0->dbcmd); /* opc=RstH (RESET => H) */ - writel(0x11000000, &dbsc3_0->dbcmd); /* opc=PDXt(CKE=H) */ - writel(0x10000000, &dbsc3_0->dbcmd); /* opc=PDEn(CKE=L) */ - - /* Stop Auto-Calibration */ - writel(0x00000001, &dbsc3_0->dbpdrga); - writel(0x80000000, &dbsc3_0->dbpdrgd); - - writel(0x00000004, &dbsc3_0->dbpdrga); - while ((readl(&dbsc3_0->dbpdrgd) & 0x00000001) != 0x00000001); - - /* PLLCR: PLL Control Register */ - writel(0x00000006, &dbsc3_0->dbpdrga); - writel(0x0001C000, &dbsc3_0->dbpdrgd); // > DDR1440 - - /* DXCCR: DATX8 Common Configuration Register */ - writel(0x0000000F, &dbsc3_0->dbpdrga); - writel(0x00181EE4, &dbsc3_0->dbpdrgd); - - /* DSGCR :DDR System General Configuration Register */ - writel(0x00000010, &dbsc3_0->dbpdrga); - writel(0xF00464DB, &dbsc3_0->dbpdrgd); - - writel(0x00000061, &dbsc3_0->dbpdrga); - writel(0x0000008D, &dbsc3_0->dbpdrgd); - - /* Re-Execute ZQ calibration */ - writel(0x00000001, &dbsc3_0->dbpdrga); - writel(0x00000073, &dbsc3_0->dbpdrgd); - - writel(0x00000007, &dbsc3_0->dbkind); - writel(0x0F030A02, &dbsc3_0->dbconf0); - writel(0x00000001, &dbsc3_0->dbphytype); - writel(0x00000000, &dbsc3_0->dbbl); - - writel(0x0000000B, &dbsc3_0->dbtr0); // tCL=11 - writel(0x00000008, &dbsc3_0->dbtr1); // tCWL=8 - writel(0x00000000, &dbsc3_0->dbtr2); // tAL=0 - writel(0x0000000B, &dbsc3_0->dbtr3); // tRCD=11 - writel(0x000C000B, &dbsc3_0->dbtr4); // tRPA=12,tRP=11 - writel(0x00000027, &dbsc3_0->dbtr5); // tRC = 39 - writel(0x0000001C, &dbsc3_0->dbtr6); // tRAS = 28 - writel(0x00000006, &dbsc3_0->dbtr7); // tRRD = 6 - writel(0x00000020, &dbsc3_0->dbtr8); // tRFAW = 32 - writel(0x00000008, &dbsc3_0->dbtr9); // tRDPR = 8 - writel(0x0000000C, &dbsc3_0->dbtr10); // tWR = 12 - writel(0x00000009, &dbsc3_0->dbtr11); // tRDWR = 9 - writel(0x00000012, &dbsc3_0->dbtr12); // tWRRD = 18 - writel(0x000000D0, &dbsc3_0->dbtr13); // tRFC = 208 - writel(0x00140005, &dbsc3_0->dbtr14); - writel(0x00050004, &dbsc3_0->dbtr15); - writel(0x70233005, &dbsc3_0->dbtr16); /* DQL = 35, WDQL = 5 */ - writel(0x000C0000, &dbsc3_0->dbtr17); - writel(0x00000300, &dbsc3_0->dbtr18); - writel(0x00000040, &dbsc3_0->dbtr19); - writel(0x00000001, &dbsc3_0->dbrnk0); - writel(0x00020001, &dbsc3_0->dbadj0); - writel(0x20082004, &dbsc3_0->dbadj2); /* blanche QoS rev0.1 */ - writel(0x00020002, &dbsc3_0->dbwt0cnf0); /* 1600 */ - writel(0x0000001F, &dbsc3_0->dbwt0cnf4); - - while ((readl(&dbsc3_0->dbdfistat) & 0x00000001) != 0x00000001); - writel(0x00000011, &dbsc3_0->dbdficnt); - - /* PGCR1 :PHY General Configuration Register 1 */ - writel(0x00000003, &dbsc3_0->dbpdrga); - writel(0x0300C4E1, &dbsc3_0->dbpdrgd); /* DDR3 */ - - /* PGCR2: PHY General Configuration Registers 2 */ - writel(0x00000023, &dbsc3_0->dbpdrga); - writel(0x00FCDB60, &dbsc3_0->dbpdrgd); - - writel(0x00000011, &dbsc3_0->dbpdrga); - writel(0x1000040B, &dbsc3_0->dbpdrgd); - - /* DTPR0 :DRAM Timing Parameters Register 0 */ - writel(0x00000012, &dbsc3_0->dbpdrga); - writel(0x9D9CBB66, &dbsc3_0->dbpdrgd); - - /* DTPR1 :DRAM Timing Parameters Register 1 */ - writel(0x00000013, &dbsc3_0->dbpdrga); - writel(0x1A868400, &dbsc3_0->dbpdrgd); - - /* DTPR2 ::DRAM Timing Parameters Register 2 */ - writel(0x00000014, &dbsc3_0->dbpdrga); - writel(0x300214D8, &dbsc3_0->dbpdrgd); - - /* MR0 :Mode Register 0 */ - writel(0x00000015, &dbsc3_0->dbpdrga); - writel(0x00000D70, &dbsc3_0->dbpdrgd); - - /* MR1 :Mode Register 1 */ - writel(0x00000016, &dbsc3_0->dbpdrga); - writel(0x00000004, &dbsc3_0->dbpdrgd); /* DRAM Drv 40ohm */ - - /* MR2 :Mode Register 2 */ - writel(0x00000017, &dbsc3_0->dbpdrga); - writel(0x00000018, &dbsc3_0->dbpdrgd); /* CWL=8 */ - - /* VREF(ZQCAL) */ - writel(0x0000001A, &dbsc3_0->dbpdrga); - writel(0x910035C7, &dbsc3_0->dbpdrgd); - - /* PGSR0 :PHY General Status Registers 0 */ - writel(0x00000004, &dbsc3_0->dbpdrga); - while ((readl(&dbsc3_0->dbpdrgd) & 0x00000001) != 0x00000001); - - /* DRAM Init (set MRx etc) */ - writel(0x00000001, &dbsc3_0->dbpdrga); - writel(0x00000181, &dbsc3_0->dbpdrgd); - - /* CKE = H */ - writel(0x11000000, &dbsc3_0->dbcmd); /* opc=PDXt(CKE=H) */ - - /* PGSR0 :PHY General Status Registers 0 */ - writel(0x00000004, &dbsc3_0->dbpdrga); - while ((readl(&dbsc3_0->dbpdrgd) & 0x00000001) != 0x00000001); - - /* RAM ACC Training */ - writel(0x00000001, &dbsc3_0->dbpdrga); - writel(0x0000FE01, &dbsc3_0->dbpdrgd); - - /* Bus control 0 */ - writel(0x00000000, &dbsc3_0->dbbs0cnt1); - /* DDR3 Calibration set */ - writel(0x01004C20, &dbsc3_0->dbcalcnf); - /* DDR3 Calibration timing */ - writel(0x014000AA, &dbsc3_0->dbcaltr); - /* Refresh */ - writel(0x00000140, &dbsc3_0->dbrfcnf0); - writel(0x00081860, &dbsc3_0->dbrfcnf1); - writel(0x00010000, &dbsc3_0->dbrfcnf2); - - /* PGSR0 :PHY General Status Registers 0 */ - writel(0x00000004, &dbsc3_0->dbpdrga); - while ((readl(&dbsc3_0->dbpdrgd) & 0x00000001) != 0x00000001); - - /* Enable Auto-Refresh */ - writel(0x00000001, &dbsc3_0->dbrfen); - /* Permit DDR-Access */ - writel(0x00000001, &dbsc3_0->dbacen); - - /* This locks the access to the PHY unit registers */ - writel(0x00000000, &dbsc3_0->dbpdlck); -#endif /* CONFIG_MTD_NOR_FLASH */ +static void s_init_wait(volatile unsigned int cnt) +{ + volatile u32 i = cnt * 0x10000; + while (i-- > 0) + ; } +#endif -#define TMU0_MSTP125 (1 << 25) -#define SCIF0_MSTP721 (1 << 21) -#define SDHI0_MSTP314 (1 << 14) -#define QSPI_MSTP917 (1 << 17) +void s_init(void) +{ + blanche_init_sys(); + qos_init(); + blanche_init_pfc(); + blanche_init_lbsc(); +#if defined(CONFIG_MTD_NOR_FLASH) + s_init_wait(10); + blanche_init_dbsc(); +#endif /* CONFIG_MTD_NOR_FLASH */ +} int board_early_init_f(void) { /* TMU0 */ mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); - /* SCIF0 */ - mstp_clrbits_le32(MSTPSR7, SMSTPCR7, SCIF0_MSTP721); - /* SDHI0 */ - mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SDHI0_MSTP314); /* QSPI */ mstp_clrbits_le32(MSTPSR9, SMSTPCR9, QSPI_MSTP917); return 0; } -DECLARE_GLOBAL_DATA_PTR; int board_init(void) { /* adress of boot parameters */ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; - /* Init PFC controller */ - r8a7792_pinmux_init(); - - gpio_request(GPIO_FN_D0, NULL); - gpio_request(GPIO_FN_D1, NULL); - gpio_request(GPIO_FN_D2, NULL); - gpio_request(GPIO_FN_D3, NULL); - gpio_request(GPIO_FN_D4, NULL); - gpio_request(GPIO_FN_D5, NULL); - gpio_request(GPIO_FN_D6, NULL); - gpio_request(GPIO_FN_D7, NULL); - gpio_request(GPIO_FN_D8, NULL); - gpio_request(GPIO_FN_D9, NULL); - gpio_request(GPIO_FN_D10, NULL); - gpio_request(GPIO_FN_D11, NULL); - gpio_request(GPIO_FN_D12, NULL); - gpio_request(GPIO_FN_D13, NULL); - gpio_request(GPIO_FN_D14, NULL); - gpio_request(GPIO_FN_D15, NULL); - gpio_request(GPIO_FN_A0, NULL); - gpio_request(GPIO_FN_A1, NULL); - gpio_request(GPIO_FN_A2, NULL); - gpio_request(GPIO_FN_A3, NULL); - gpio_request(GPIO_FN_A4, NULL); - gpio_request(GPIO_FN_A5, NULL); - gpio_request(GPIO_FN_A6, NULL); - gpio_request(GPIO_FN_A7, NULL); - gpio_request(GPIO_FN_A8, NULL); - gpio_request(GPIO_FN_A9, NULL); - gpio_request(GPIO_FN_A10, NULL); - gpio_request(GPIO_FN_A11, NULL); - gpio_request(GPIO_FN_A12, NULL); - gpio_request(GPIO_FN_A13, NULL); - gpio_request(GPIO_FN_A14, NULL); - gpio_request(GPIO_FN_A15, NULL); - gpio_request(GPIO_FN_A16, NULL); - gpio_request(GPIO_FN_A17, NULL); - gpio_request(GPIO_FN_A18, NULL); - gpio_request(GPIO_FN_A19, NULL); -#if !defined(CONFIG_MTD_NOR_FLASH) - gpio_request(GPIO_FN_MOSI_IO0, NULL); - gpio_request(GPIO_FN_MISO_IO1, NULL); - gpio_request(GPIO_FN_IO2, NULL); - gpio_request(GPIO_FN_IO3, NULL); - gpio_request(GPIO_FN_SPCLK, NULL); - gpio_request(GPIO_FN_SSL, NULL); -#else /* CONFIG_MTD_NOR_FLASH */ - gpio_request(GPIO_FN_A20, NULL); - gpio_request(GPIO_FN_A21, NULL); - gpio_request(GPIO_FN_A22, NULL); - gpio_request(GPIO_FN_A23, NULL); - gpio_request(GPIO_FN_A24, NULL); - gpio_request(GPIO_FN_A25, NULL); -#endif /* CONFIG_MTD_NOR_FLASH */ - - gpio_request(GPIO_FN_CS1_A26, NULL); - gpio_request(GPIO_FN_EX_CS0, NULL); - gpio_request(GPIO_FN_EX_CS1, NULL); - gpio_request(GPIO_FN_BS, NULL); - gpio_request(GPIO_FN_RD, NULL); - gpio_request(GPIO_FN_WE0, NULL); - gpio_request(GPIO_FN_WE1, NULL); - gpio_request(GPIO_FN_EX_WAIT0, NULL); - gpio_request(GPIO_FN_IRQ0, NULL); - gpio_request(GPIO_FN_IRQ2, NULL); - gpio_request(GPIO_FN_IRQ3, NULL); - gpio_request(GPIO_FN_CS0, NULL); - - /* Init timer */ - timer_init(); - return 0; } -/* - Added for BLANCHE(R-CarV2H board) -*/ +/* Added for BLANCHE(R-CarV2H board) */ int board_eth_init(bd_t *bis) { int rc = 0; #ifdef CONFIG_SMC911X -#define STR_ENV_ETHADDR "ethaddr" - struct eth_device *dev; uchar eth_addr[6]; rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); - if (!eth_env_get_enetaddr(STR_ENV_ETHADDR, eth_addr)) { + if (!eth_env_get_enetaddr("ethaddr", eth_addr)) { dev = eth_get_dev_by_index(0); if (dev) { - eth_env_set_enetaddr(STR_ENV_ETHADDR, dev->enetaddr); + eth_env_set_enetaddr("ethaddr", dev->enetaddr); } else { printf("blanche: Couldn't get eth device\n"); rc = -1; @@ -433,36 +337,17 @@ int board_eth_init(bd_t *bis) return rc; } -int board_mmc_init(bd_t *bis) +int dram_init(void) { - int ret = -ENODEV; - -#ifdef CONFIG_SH_SDHI - gpio_request(GPIO_FN_SD0_DAT0, NULL); - gpio_request(GPIO_FN_SD0_DAT1, NULL); - gpio_request(GPIO_FN_SD0_DAT2, NULL); - gpio_request(GPIO_FN_SD0_DAT3, NULL); - gpio_request(GPIO_FN_SD0_CLK, NULL); - gpio_request(GPIO_FN_SD0_CMD, NULL); - gpio_request(GPIO_FN_SD0_CD, NULL); - - gpio_request(GPIO_GP_11_12, NULL); - gpio_direction_output(GPIO_GP_11_12, 1); /* power on */ + if (fdtdec_setup_memory_size() != 0) + return -EINVAL; - - ret = sh_sdhi_init(CONFIG_SYS_SH_SDHI0_BASE, 0, - SH_SDHI_QUIRK_16BIT_BUF); - - if (ret) - return ret; -#endif - return ret; + return 0; } -int dram_init(void) +int dram_init_banksize(void) { - gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; - gd->ram_size = CONFIG_SYS_SDRAM_SIZE; + fdtdec_setup_memory_banksize(); return 0; } @@ -470,15 +355,3 @@ int dram_init(void) void reset_cpu(ulong addr) { } - -static const struct sh_serial_platdata serial_platdata = { - .base = SCIF0_BASE, - .type = PORT_SCIF, - .clk = 14745600, - .clk_mode = EXT_CLK, -}; - -U_BOOT_DEVICE(blanche_serials) = { - .name = "serial_sh", - .platdata = &serial_platdata, -}; diff --git a/board/renesas/ebisu/Kconfig b/board/renesas/ebisu/Kconfig new file mode 100644 index 00000000000..f500a94c9a3 --- /dev/null +++ b/board/renesas/ebisu/Kconfig @@ -0,0 +1,15 @@ +if TARGET_EBISU + +config SYS_SOC + default "rmobile" + +config SYS_BOARD + default "ebisu" + +config SYS_VENDOR + default "renesas" + +config SYS_CONFIG_NAME + default "ebisu" + +endif diff --git a/board/renesas/ebisu/MAINTAINERS b/board/renesas/ebisu/MAINTAINERS new file mode 100644 index 00000000000..facad520cad --- /dev/null +++ b/board/renesas/ebisu/MAINTAINERS @@ -0,0 +1,6 @@ +EBISU BOARD +M: Marek Vasut <marek.vasut+renesas@gmail.com> +S: Maintained +F: board/renesas/ebisu/ +F: include/configs/ebisu.h +F: configs/r8a77990_ebisu_defconfig diff --git a/board/renesas/ebisu/Makefile b/board/renesas/ebisu/Makefile new file mode 100644 index 00000000000..2741035c576 --- /dev/null +++ b/board/renesas/ebisu/Makefile @@ -0,0 +1,9 @@ +# +# board/renesas/ebisu/Makefile +# +# Copyright (C) 2018 Renesas Electronics Corporation +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := ebisu.o diff --git a/board/renesas/ebisu/ebisu.c b/board/renesas/ebisu/ebisu.c new file mode 100644 index 00000000000..fdff2a82861 --- /dev/null +++ b/board/renesas/ebisu/ebisu.c @@ -0,0 +1,86 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * board/renesas/ebisu/ebisu.c + * This file is Ebisu board support. + * + * Copyright (C) 2018 Marek Vasut <marek.vasut+renesas@gmail.com> + */ + +#include <common.h> +#include <malloc.h> +#include <netdev.h> +#include <dm.h> +#include <dm/platform_data/serial_sh.h> +#include <asm/processor.h> +#include <asm/mach-types.h> +#include <asm/io.h> +#include <linux/errno.h> +#include <asm/arch/sys_proto.h> +#include <asm/gpio.h> +#include <asm/arch/gpio.h> +#include <asm/arch/rmobile.h> +#include <asm/arch/rcar-mstp.h> +#include <asm/arch/sh_sdhi.h> +#include <i2c.h> +#include <mmc.h> + +DECLARE_GLOBAL_DATA_PTR; + +void s_init(void) +{ +} + +#define TMU0_MSTP125 BIT(25) /* secure */ + +int board_early_init_f(void) +{ + /* TMU0 */ + mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); + + return 0; +} + +int board_init(void) +{ + /* adress of boot parameters */ + gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000; + + return 0; +} + +int dram_init(void) +{ + if (fdtdec_setup_memory_size() != 0) + return -EINVAL; + + return 0; +} + +int dram_init_banksize(void) +{ + fdtdec_setup_memory_banksize(); + + return 0; +} + +#define RST_BASE 0xE6160000 +#define RST_CA57RESCNT (RST_BASE + 0x40) +#define RST_CA53RESCNT (RST_BASE + 0x44) +#define RST_RSTOUTCR (RST_BASE + 0x58) +#define RST_CA57_CODE 0xA5A5000F +#define RST_CA53_CODE 0x5A5A000F + +void reset_cpu(ulong addr) +{ + unsigned long midr, cputype; + + asm volatile("mrs %0, midr_el1" : "=r" (midr)); + cputype = (midr >> 4) & 0xfff; + + if (cputype == 0xd03) + writel(RST_CA53_CODE, RST_CA53RESCNT); + else if (cputype == 0xd07) + writel(RST_CA57_CODE, RST_CA57RESCNT); + else + hang(); +} diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c index ede303d4ebf..4e1386c8a22 100644 --- a/board/solidrun/clearfog/clearfog.c +++ b/board/solidrun/clearfog/clearfog.c @@ -32,22 +32,6 @@ DECLARE_GLOBAL_DATA_PTR; #define BOARD_GPP_POL_LOW 0x0 #define BOARD_GPP_POL_MID 0x0 -/* IO expander on Marvell GP board includes e.g. fan enabling */ -struct marvell_io_exp { - u8 chip; - u8 addr; - u8 val; -}; - -static struct marvell_io_exp io_exp[] = { - { 0x20, 2, 0x40 }, /* Deassert both mini pcie reset signals */ - { 0x20, 6, 0xf9 }, - { 0x20, 2, 0x46 }, /* rst signals and ena USB3 current limiter */ - { 0x20, 6, 0xb9 }, - { 0x20, 3, 0x00 }, /* Set SFP_TX_DIS to zero */ - { 0x20, 7, 0xbf }, /* Drive SFP_TX_DIS to zero */ -}; - static struct serdes_map board_serdes_map[] = { {SATA0, SERDES_SPEED_3_GBPS, SERDES_DEFAULT_MODE, 0, 0}, {SGMII1, SERDES_SPEED_1_25_GBPS, SERDES_DEFAULT_MODE, 0, 0}, @@ -126,8 +110,6 @@ int board_early_init_f(void) int board_init(void) { - int i; - /* Address of boot parameters */ gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; @@ -142,10 +124,6 @@ int board_init(void) setbits_le32(MVEBU_GPIO0_BASE + 0x0, BIT(19)); mdelay(10); - /* Init I2C IO expanders */ - for (i = 0; i < ARRAY_SIZE(io_exp); i++) - i2c_write(io_exp[i].chip, io_exp[i].addr, 1, &io_exp[i].val, 1); - return 0; } diff --git a/board/st/stm32mp1/board.c b/board/st/stm32mp1/board.c index 956768f0447..5f31ea99f59 100644 --- a/board/st/stm32mp1/board.c +++ b/board/st/stm32mp1/board.c @@ -10,6 +10,33 @@ #include <power/pmic.h> #include <power/stpmu1.h> +#ifdef CONFIG_DEBUG_UART_BOARD_INIT +void board_debug_uart_init(void) +{ +#if (CONFIG_DEBUG_UART_BASE == STM32_UART4_BASE) + +#define RCC_MP_APB1ENSETR (STM32_RCC_BASE + 0x0A00) +#define RCC_MP_AHB4ENSETR (STM32_RCC_BASE + 0x0A28) + + /* UART4 clock enable */ + setbits_le32(RCC_MP_APB1ENSETR, BIT(16)); + +#define GPIOG_BASE 0x50008000 + /* GPIOG clock enable */ + writel(BIT(6), RCC_MP_AHB4ENSETR); + /* GPIO configuration for EVAL board + * => Uart4 TX = G11 + */ + writel(0xffbfffff, GPIOG_BASE + 0x00); + writel(0x00006000, GPIOG_BASE + 0x24); +#else + +#error("CONFIG_DEBUG_UART_BASE: not supported value") + +#endif +} +#endif + #ifdef CONFIG_PMIC_STPMU1 int board_ddr_power_init(void) { diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 1bb2fa8f518..e90c87b560e 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -116,6 +116,12 @@ M: Paul Kocialkowski <contact@paulk.fr> S: Maintained F: configs/Ainol_AW1_defconfig +AMARULA A64-RELIC +M: Jagan Teki <jagan@amarulasolutions.com> +S: Maintained +F: configs/amarula_a64_relic_defconfig +F: arch/arm/dts/sun50i-a64-amarula-relic.dts + AMPE A76 BOARD M: Paul Kocialkowski <contact@paulk.fr> S: Maintained diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 3d364c6db58..5ed1b8bae18 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -11,8 +11,11 @@ */ #include <common.h> +#include <dm.h> #include <mmc.h> #include <axp_pmic.h> +#include <generic-phy.h> +#include <phy-sun4i-usb.h> #include <asm/arch/clock.h> #include <asm/arch/cpu.h> #include <asm/arch/display.h> @@ -20,7 +23,6 @@ #include <asm/arch/gpio.h> #include <asm/arch/mmc.h> #include <asm/arch/spl.h> -#include <asm/arch/usb_phy.h> #ifndef CONFIG_ARM64 #include <asm/armv7.h> #endif @@ -595,7 +597,35 @@ void sunxi_board_init(void) #ifdef CONFIG_USB_GADGET int g_dnl_board_usb_cable_connected(void) { - return sunxi_usb_phy_vbus_detect(0); + struct udevice *dev; + struct phy phy; + int ret; + + ret = uclass_get_device(UCLASS_USB_DEV_GENERIC, 0, &dev); + if (ret) { + pr_err("%s: Cannot find USB device\n", __func__); + return ret; + } + + ret = generic_phy_get_by_name(dev, "usb", &phy); + if (ret) { + pr_err("failed to get %s USB PHY\n", dev->name); + return ret; + } + + ret = generic_phy_init(&phy); + if (ret) { + pr_err("failed to init %s USB PHY\n", dev->name); + return ret; + } + + ret = sun4i_usb_phy_vbus_detect(&phy); + if (ret == 1) { + pr_err("A charger is plugged into the OTG\n"); + return -ENODEV; + } + + return ret; } #endif @@ -743,12 +773,6 @@ int misc_init_r(void) setup_environment(gd->fdt_blob); -#ifndef CONFIG_MACH_SUN9I - ret = sunxi_usb_phy_probe(); - if (ret) - return ret; -#endif - #ifdef CONFIG_USB_ETHER usb_ether_init(); #endif diff --git a/board/synopsys/emdk/Kconfig b/board/synopsys/emdk/Kconfig new file mode 100644 index 00000000000..a9b834dbfdd --- /dev/null +++ b/board/synopsys/emdk/Kconfig @@ -0,0 +1,12 @@ +if TARGET_EMDK + +config SYS_BOARD + default "emdk" + +config SYS_VENDOR + default "synopsys" + +config SYS_CONFIG_NAME + default "emdk" + +endif diff --git a/board/synopsys/emdk/MAINTAINERS b/board/synopsys/emdk/MAINTAINERS new file mode 100644 index 00000000000..605e3384457 --- /dev/null +++ b/board/synopsys/emdk/MAINTAINERS @@ -0,0 +1,5 @@ +EM DEVELOPMENT KIT BOARD +M: Alexey Brodkin <abrodkin@synopsys.com> +S: Maintained +F: board/synopsys/emdk/ +F: configs/emdk_defconfig diff --git a/board/synopsys/emdk/Makefile b/board/synopsys/emdk/Makefile new file mode 100644 index 00000000000..4926c4e3073 --- /dev/null +++ b/board/synopsys/emdk/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (C) 2018 Synopsys, Inc. All rights reserved. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += emdk.o diff --git a/board/synopsys/emdk/emdk.c b/board/synopsys/emdk/emdk.c new file mode 100644 index 00000000000..bbb946a700b --- /dev/null +++ b/board/synopsys/emdk/emdk.c @@ -0,0 +1,92 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Synopsys, Inc. All rights reserved. + */ + +#include <common.h> +#include <dwmmc.h> +#include <malloc.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define ARC_PERIPHERAL_BASE 0xF0000000 +#define SDIO_BASE (ARC_PERIPHERAL_BASE + 0x10000) + +int board_mmc_init(bd_t *bis) +{ + struct dwmci_host *host = NULL; + + host = malloc(sizeof(struct dwmci_host)); + if (!host) { + printf("dwmci_host malloc fail!\n"); + return 1; + } + + memset(host, 0, sizeof(struct dwmci_host)); + host->name = "Synopsys Mobile storage"; + host->ioaddr = (void *)SDIO_BASE; + host->buswidth = 4; + host->dev_index = 0; + host->bus_hz = 50000000; + + add_dwmci(host, host->bus_hz / 2, 400000); + + return 0; +} + +#define CREG_BASE 0xF0001000 +#define CREG_BOOT_OFFSET 0 +#define CREG_BOOT_WP_OFFSET 8 + +#define CGU_BASE 0xF0000000 +#define CGU_IP_SW_RESET 0x0FF0 + +void reset_cpu(ulong addr) +{ + writel(1, (u32 *)(CGU_BASE + CGU_IP_SW_RESET)); + while (1) + ; /* loop forever till reset */ +} + +static int do_emdk_rom(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) +{ + u32 creg_boot = readl((u32 *)(CREG_BASE + CREG_BOOT_OFFSET)); + + if (!strcmp(argv[1], "unlock")) + creg_boot &= ~BIT(CREG_BOOT_WP_OFFSET); + else if (!strcmp(argv[1], "lock")) + creg_boot |= BIT(CREG_BOOT_WP_OFFSET); + else + return CMD_RET_USAGE; + + writel(creg_boot, (u32 *)(CREG_BASE + CREG_BOOT_OFFSET)); + + return CMD_RET_SUCCESS; +} + +cmd_tbl_t cmd_emdk[] = { + U_BOOT_CMD_MKENT(rom, 2, 0, do_emdk_rom, "", ""), +}; + +static int do_emdk(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) +{ + cmd_tbl_t *c; + + c = find_cmd_tbl(argv[1], cmd_emdk, ARRAY_SIZE(cmd_emdk)); + + /* Strip off leading 'emdk' command */ + argc--; + argv++; + + if (c == NULL || argc > c->maxargs) + return CMD_RET_USAGE; + + return c->cmd(cmdtp, flag, argc, argv); +} + +U_BOOT_CMD( + emdk, CONFIG_SYS_MAXARGS, 0, do_emdk, + "Synopsys EMDK specific commands", + "rom unlock - Unlock non-volatile memory for writing\n" + "emdk rom lock - Lock non-volatile memory to prevent writing\n" +); diff --git a/board/technexion/twister/twister.c b/board/technexion/twister/twister.c index 1166886e1d3..0590e5f8afe 100644 --- a/board/technexion/twister/twister.c +++ b/board/technexion/twister/twister.c @@ -18,10 +18,8 @@ #include <spl.h> #include <mmc.h> #include <asm/gpio.h> -#ifdef CONFIG_USB_EHCI_HCD #include <usb.h> #include <asm/ehci-omap.h> -#endif #include "twister.h" DECLARE_GLOBAL_DATA_PTR; @@ -45,7 +43,7 @@ static const u32 gpmc_XR16L2751[] = { XR16L2751_GPMC_CONFIG6, }; -#ifdef CONFIG_USB_EHCI_HCD +#ifdef CONFIG_USB_EHCI_OMAP static struct omap_usbhs_board_data usbhs_bdata = { .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, @@ -118,19 +116,20 @@ void set_muxconf_regs(void) int board_eth_init(bd_t *bis) { +#ifdef CONFIG_DRIVER_TI_EMAC davinci_emac_initialize(); - +#endif /* init cs for extern lan */ enable_gpmc_cs_config(gpmc_smc911, &gpmc_cfg->cs[5], CONFIG_SMC911X_BASE, GPMC_SIZE_16M); - if (smc911x_initialize(0, CONFIG_SMC911X_BASE) <= 0) - printf("\nError initializing SMC911x controlleri\n"); - +#ifdef CONFIG_SMC911X + return smc911x_initialize(0, CONFIG_SMC911X_BASE); +#else return 0; +#endif } -#if defined(CONFIG_MMC_OMAP_HS) && \ - !defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_MMC_OMAP_HS) int board_mmc_init(bd_t *bis) { return omap_mmc_init(0, 0, 0, -1, -1); diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c index fd9d20779be..177a3246c3d 100644 --- a/board/ti/am57xx/board.c +++ b/board/ti/am57xx/board.c @@ -1178,5 +1178,15 @@ void board_tee_image_process(ulong tee_image, size_t tee_size) secure_tee_install((u32)tee_image); } +#if CONFIG_IS_ENABLED(FASTBOOT) && !CONFIG_IS_ENABLED(ENV_IS_NOWHERE) +int fastboot_set_reboot_flag(void) +{ + printf("Setting reboot to fastboot flag ...\n"); + env_set("dofastboot", "1"); + env_save(); + return 0; +} +#endif + U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_TEE, board_tee_image_process); #endif diff --git a/board/ti/common/Kconfig b/board/ti/common/Kconfig index c21eb8c2d2e..b1956b81003 100644 --- a/board/ti/common/Kconfig +++ b/board/ti/common/Kconfig @@ -25,7 +25,6 @@ config TI_COMMON_CMD_OPTIONS imply CMD_EXT2 imply CMD_EXT4 imply CMD_EXT4_WRITE - imply CMD_FASTBOOT if FASTBOOT imply CMD_FAT imply FAT_WRITE if CMD_FAT imply CMD_FS_GENERIC diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c index 6918f4de01f..bbe54450aee 100644 --- a/board/ti/dra7xx/evm.c +++ b/board/ti/dra7xx/evm.c @@ -1188,5 +1188,15 @@ void board_tee_image_process(ulong tee_image, size_t tee_size) secure_tee_install((u32)tee_image); } +#if CONFIG_IS_ENABLED(FASTBOOT) && !CONFIG_IS_ENABLED(ENV_IS_NOWHERE) +int fastboot_set_reboot_flag(void) +{ + printf("Setting reboot to fastboot flag ...\n"); + env_set("dofastboot", "1"); + env_save(); + return 0; +} +#endif + U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_TEE, board_tee_image_process); #endif diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 57c0d93aa1b..080fb59ef7b 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -15,6 +15,7 @@ #include <asm/arch/sys_proto.h> #include <asm/arch/psu_init_gpl.h> #include <asm/io.h> +#include <dm/device.h> #include <dm/uclass.h> #include <usb.h> #include <dwc3-uboot.h> @@ -449,10 +450,54 @@ void reset_cpu(ulong addr) { } +static const struct { + u32 bit; + const char *name; +} reset_reasons[] = { + { RESET_REASON_DEBUG_SYS, "DEBUG" }, + { RESET_REASON_SOFT, "SOFT" }, + { RESET_REASON_SRST, "SRST" }, + { RESET_REASON_PSONLY, "PS-ONLY" }, + { RESET_REASON_PMU, "PMU" }, + { RESET_REASON_INTERNAL, "INTERNAL" }, + { RESET_REASON_EXTERNAL, "EXTERNAL" }, + {} +}; + +static u32 reset_reason(void) +{ + u32 ret; + int i; + const char *reason = NULL; + + ret = readl(&crlapb_base->reset_reason); + + puts("Reset reason:\t"); + + for (i = 0; i < ARRAY_SIZE(reset_reasons); i++) { + if (ret & reset_reasons[i].bit) { + reason = reset_reasons[i].name; + printf("%s ", reset_reasons[i].name); + break; + } + } + + puts("\n"); + + env_set("reset_reason", reason); + + writel(~0, &crlapb_base->reset_reason); + + return ret; +} + int board_late_init(void) { u32 reg = 0; u8 bootmode; + struct udevice *dev; + int bootseq = -1; + int bootseq_len = 0; int env_targets_len = 0; const char *mode; char *new_targets; @@ -498,7 +543,15 @@ int board_late_init(void) break; case SD_MODE: puts("SD_MODE\n"); - mode = "mmc0"; + if (uclass_get_device_by_name(UCLASS_MMC, + "sdhci@ff160000", &dev)) { + puts("Boot from SD0 but without SD0 enabled!\n"); + return -1; + } + debug("mmc0 device found at %p, seq %d\n", dev, dev->seq); + + mode = "mmc"; + bootseq = dev->seq; env_set("modeboot", "sdboot"); break; case SD1_LSHFT_MODE: @@ -506,12 +559,15 @@ int board_late_init(void) /* fall through */ case SD_MODE1: puts("SD_MODE1\n"); -#if defined(CONFIG_ZYNQ_SDHCI0) && defined(CONFIG_ZYNQ_SDHCI1) - mode = "mmc1"; - env_set("sdbootdev", "1"); -#else - mode = "mmc0"; -#endif + if (uclass_get_device_by_name(UCLASS_MMC, + "sdhci@ff170000", &dev)) { + puts("Boot from SD1 but without SD1 enabled!\n"); + return -1; + } + debug("mmc1 device found at %p, seq %d\n", dev, dev->seq); + + mode = "mmc"; + bootseq = dev->seq; env_set("modeboot", "sdboot"); break; case NAND_MODE: @@ -525,6 +581,11 @@ int board_late_init(void) break; } + if (bootseq >= 0) { + bootseq_len = snprintf(NULL, 0, "%i", bootseq); + debug("Bootseq len: %x\n", bootseq_len); + } + /* * One terminating char + one byte for space between mode * and default boot_targets @@ -533,13 +594,20 @@ int board_late_init(void) if (env_targets) env_targets_len = strlen(env_targets); - new_targets = calloc(1, strlen(mode) + env_targets_len + 2); + new_targets = calloc(1, strlen(mode) + env_targets_len + 2 + + bootseq_len); - sprintf(new_targets, "%s %s", mode, - env_targets ? env_targets : ""); + if (bootseq >= 0) + sprintf(new_targets, "%s%x %s", mode, bootseq, + env_targets ? env_targets : ""); + else + sprintf(new_targets, "%s %s", mode, + env_targets ? env_targets : ""); env_set("boot_targets", new_targets); + reset_reason(); + return 0; } @@ -548,49 +616,3 @@ int checkboard(void) puts("Board: Xilinx ZynqMP\n"); return 0; } - -#ifdef CONFIG_USB_DWC3 -static struct dwc3_device dwc3_device_data0 = { - .maximum_speed = USB_SPEED_HIGH, - .base = ZYNQMP_USB0_XHCI_BASEADDR, - .dr_mode = USB_DR_MODE_PERIPHERAL, - .index = 0, -}; - -static struct dwc3_device dwc3_device_data1 = { - .maximum_speed = USB_SPEED_HIGH, - .base = ZYNQMP_USB1_XHCI_BASEADDR, - .dr_mode = USB_DR_MODE_PERIPHERAL, - .index = 1, -}; - -int usb_gadget_handle_interrupts(int index) -{ - dwc3_uboot_handle_interrupt(index); - return 0; -} - -int board_usb_init(int index, enum usb_init_type init) -{ - debug("%s: index %x\n", __func__, index); - -#if defined(CONFIG_USB_GADGET_DOWNLOAD) - g_dnl_set_serialnumber(CONFIG_SYS_CONFIG_NAME); -#endif - - switch (index) { - case 0: - return dwc3_uboot_init(&dwc3_device_data0); - case 1: - return dwc3_uboot_init(&dwc3_device_data1); - }; - - return -1; -} - -int board_usb_cleanup(int index, enum usb_init_type init) -{ - dwc3_uboot_exit(index); - return 0; -} -#endif diff --git a/cmd/Kconfig b/cmd/Kconfig index 38406fcfdac..e283cb9a8ac 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -137,8 +137,6 @@ config AUTOBOOT_STOP_STR_SHA256 endmenu -source "cmd/fastboot/Kconfig" - config BUILD_BIN2C bool @@ -228,7 +226,7 @@ config CMD_BOOTEFI config CMD_BOOTEFI_HELLO_COMPILE bool "Compile a standard EFI hello world binary for testing" - depends on CMD_BOOTEFI && (ARM || X86) + depends on CMD_BOOTEFI && (ARM || X86 || RISCV) default y help This compiles a standard EFI hello world application with U-Boot so @@ -650,6 +648,18 @@ config CMD_DM can be useful to see the state of driver model for debugging or interest. +config CMD_FASTBOOT + bool "fastboot - Android fastboot support" + depends on FASTBOOT + help + This enables the command "fastboot" which enables the Android + fastboot mode for the platform. Fastboot is a protocol for + downloading images, flashing and device control used on + Android devices. Fastboot requires either the network stack + enabled or support for acting as a USB device. + + See doc/README.android-fastboot for more information. + config CMD_FDC bool "fdcboot - Boot from floppy device" help @@ -697,6 +707,13 @@ config CMD_FPGA_LOADP Supports loading an FPGA device from a bitstream buffer containing a partial bitstream. +config CMD_FPGA_LOAD_SECURE + bool "fpga loads - loads secure bitstreams (Xilinx only)" + depends on CMD_FPGA + help + Enables the fpga loads command which is used to load secure + (authenticated or encrypted or both) bitstreams on to FPGA. + config CMD_FPGAD bool "fpgad - dump FPGA registers" help @@ -816,6 +833,21 @@ config CMD_MMC help MMC memory mapped support. +config CMD_MMC_RPMB + bool "Enable support for RPMB in the mmc command" + depends on CMD_MMC + help + Enable the commands for reading, writing and programming the + key for the Replay Protection Memory Block partition in eMMC. + +config CMD_MMC_SWRITE + bool "mmc swrite" + depends on CMD_MMC && MMC_WRITE + select IMAGE_SPARSE + help + Enable support for the "mmc swrite" command to write Android sparse + images to eMMC. + config CMD_NAND bool "nand" default y if NAND_SUNXI @@ -1222,6 +1254,13 @@ config CMD_BMP the image into RAM, then using this command to look at it or display it. +config CMD_BOOTCOUNT + bool "bootcount" + depends on BOOTCOUNT_LIMIT + help + Enable the bootcount command, which allows interrogation and + reset of the bootcounter. + config CMD_BSP bool "Enable board-specific commands" help @@ -1477,25 +1516,37 @@ config HASH_VERIFY help Add -v option to verify data against a hash. +config CMD_TPM_V1 + bool + +config CMD_TPM_V2 + bool + config CMD_TPM bool "Enable the 'tpm' command" - depends on TPM + depends on TPM_V1 || TPM_V2 + select CMD_TPM_V1 if TPM_V1 + select CMD_TPM_V2 if TPM_V2 help This provides a means to talk to a TPM from the command line. A wide range of commands if provided - see 'tpm help' for details. The command requires a suitable TPM on your board and the correct driver must be enabled. +if CMD_TPM + config CMD_TPM_TEST bool "Enable the 'tpm test' command" - depends on CMD_TPM + depends on TPM_V1 help - This provides a a series of tests to confirm that the TPM is working - correctly. The tests cover initialisation, non-volatile RAM, extend, - global lock and checking that timing is within expectations. The - tests pass correctly on Infineon TPMs but may need to be adjusted + This provides a a series of tests to confirm that the TPMv1.x is + working correctly. The tests cover initialisation, non-volatile RAM, + extend, global lock and checking that timing is within expectations. + The tests pass correctly on Infineon TPMs but may need to be adjusted for other devices. +endif + endmenu menu "Firmware commands" diff --git a/cmd/Makefile b/cmd/Makefile index 0d7322ee0a4..e0088df33bd 100644 --- a/cmd/Makefile +++ b/cmd/Makefile @@ -22,6 +22,7 @@ obj-$(CONFIG_CMD_BEDBUG) += bedbug.o obj-$(CONFIG_CMD_BINOP) += binop.o obj-$(CONFIG_CMD_BLOCK_CACHE) += blkcache.o obj-$(CONFIG_CMD_BMP) += bmp.o +obj-$(CONFIG_CMD_BOOTCOUNT) += bootcount.o obj-$(CONFIG_CMD_BOOTEFI) += bootefi.o obj-$(CONFIG_CMD_BOOTMENU) += bootmenu.o obj-$(CONFIG_CMD_BOOTSTAGE) += bootstage.o @@ -119,8 +120,10 @@ obj-$(CONFIG_CMD_TERMINAL) += terminal.o obj-$(CONFIG_CMD_TIME) += time.o obj-$(CONFIG_CMD_TRACE) += trace.o obj-$(CONFIG_HUSH_PARSER) += test.o -obj-$(CONFIG_CMD_TPM) += tpm.o +obj-$(CONFIG_CMD_TPM) += tpm-common.o +obj-$(CONFIG_CMD_TPM_V1) += tpm-v1.o obj-$(CONFIG_CMD_TPM_TEST) += tpm_test.o +obj-$(CONFIG_CMD_TPM_V2) += tpm-v2.o obj-$(CONFIG_CMD_CROS_EC) += cros_ec.o obj-$(CONFIG_CMD_TSI148) += tsi148.o obj-$(CONFIG_CMD_UBI) += ubi.o diff --git a/cmd/bootcount.c b/cmd/bootcount.c new file mode 100644 index 00000000000..c358418ebe5 --- /dev/null +++ b/cmd/bootcount.c @@ -0,0 +1,61 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include <common.h> +#include <command.h> +#include <bootcount.h> + +static int do_bootcount_print(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + printf("%lu\n", bootcount_load()); + return CMD_RET_SUCCESS; +} + +static int do_bootcount_reset(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + /* + * note that we're explicitly not resetting the environment + * variable, so you still have the old bootcounter available + */ + bootcount_store(0); + return CMD_RET_SUCCESS; +} + +static cmd_tbl_t bootcount_sub[] = { + U_BOOT_CMD_MKENT(print, 1, 1, do_bootcount_print, "", ""), + U_BOOT_CMD_MKENT(reset, 1, 1, do_bootcount_reset, "", ""), +}; + +static int do_bootcount(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + cmd_tbl_t *cp; + + if (argc < 2) + return CMD_RET_USAGE; + + /* drop initial "bootcount" arg */ + argc--; + argv++; + + cp = find_cmd_tbl(argv[0], bootcount_sub, ARRAY_SIZE(bootcount_sub)); + if (cp) + return cp->cmd(cmdtp, flag, argc, argv); + + return CMD_RET_USAGE; +} + +#if CONFIG_IS_ENABLED(SYS_LONGHELP) +static char bootcount_help_text[] = + "print - print current bootcounter\n" + "reset - reset the bootcounter" + ; +#endif + +U_BOOT_CMD(bootcount, 2, 1, do_bootcount, + "bootcount", +#if CONFIG_IS_ENABLED(SYS_LONGHELP) + bootcount_help_text +#endif +); diff --git a/cmd/bootefi.c b/cmd/bootefi.c index 11b84c55289..707d159baca 100644 --- a/cmd/bootefi.c +++ b/cmd/bootefi.c @@ -17,6 +17,7 @@ #include <memalign.h> #include <asm/global_data.h> #include <asm-generic/sections.h> +#include <asm-generic/unaligned.h> #include <linux/linkage.h> DECLARE_GLOBAL_DATA_PTR; @@ -83,6 +84,15 @@ out: } /* + * Allow unaligned memory access. + * + * This routine is overridden by architectures providing this feature. + */ +void __weak allow_unaligned(void) +{ +} + +/* * Set the load options of an image from an environment variable. * * @loaded_image_info: the image @@ -133,11 +143,13 @@ static void *copy_fdt(void *fdt) /* Safe fdt location is at 128MB */ new_fdt_addr = fdt_ram_start + (128 * 1024 * 1024) + fdt_size; - if (efi_allocate_pages(1, EFI_RUNTIME_SERVICES_DATA, fdt_pages, + if (efi_allocate_pages(EFI_ALLOCATE_MAX_ADDRESS, + EFI_RUNTIME_SERVICES_DATA, fdt_pages, &new_fdt_addr) != EFI_SUCCESS) { /* If we can't put it there, put it somewhere */ new_fdt_addr = (ulong)memalign(EFI_PAGE_SIZE, fdt_size); - if (efi_allocate_pages(1, EFI_RUNTIME_SERVICES_DATA, fdt_pages, + if (efi_allocate_pages(EFI_ALLOCATE_MAX_ADDRESS, + EFI_RUNTIME_SERVICES_DATA, fdt_pages, &new_fdt_addr) != EFI_SUCCESS) { printf("ERROR: Failed to reserve space for FDT\n"); return NULL; @@ -370,6 +382,9 @@ static int do_bootefi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) efi_status_t r; void *fdt_addr; + /* Allow unaligned memory access */ + allow_unaligned(); + /* Initialize EFI drivers */ r = efi_init_obj_list(); if (r != EFI_SUCCESS) { @@ -428,8 +443,6 @@ static int do_bootefi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) * callback entry */ efi_save_gd(); - /* Initialize and populate EFI object list */ - efi_init_obj_list(); /* Transfer environment variable efi_selftest as load options */ set_load_options(&loaded_image_info, "efi_selftest"); /* Execute the test */ diff --git a/cmd/fastboot.c b/cmd/fastboot.c index a5ec5f46f63..557257aef84 100644 --- a/cmd/fastboot.c +++ b/cmd/fastboot.c @@ -10,10 +10,32 @@ #include <command.h> #include <console.h> #include <g_dnl.h> +#include <fastboot.h> +#include <net.h> #include <usb.h> -static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) +static int do_fastboot_udp(int argc, char *const argv[], + uintptr_t buf_addr, size_t buf_size) { +#if CONFIG_IS_ENABLED(UDP_FUNCTION_FASTBOOT) + int err = net_loop(FASTBOOT); + + if (err < 0) { + printf("fastboot udp error: %d\n", err); + return CMD_RET_FAILURE; + } + + return CMD_RET_SUCCESS; +#else + pr_err("Fastboot UDP not enabled\n"); + return CMD_RET_FAILURE; +#endif +} + +static int do_fastboot_usb(int argc, char *const argv[], + uintptr_t buf_addr, size_t buf_size) +{ +#if CONFIG_IS_ENABLED(USB_FUNCTION_FASTBOOT) int controller_index; char *usb_controller; int ret; @@ -58,11 +80,70 @@ exit: board_usb_cleanup(controller_index, USB_INIT_DEVICE); return ret; +#else + pr_err("Fastboot USB not enabled\n"); + return CMD_RET_FAILURE; +#endif +} + +static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) +{ + uintptr_t buf_addr = (uintptr_t)NULL; + size_t buf_size = 0; + + if (argc < 2) + return CMD_RET_USAGE; + + while (argc > 1 && **(argv + 1) == '-') { + char *arg = *++argv; + + --argc; + while (*++arg) { + switch (*arg) { + case 'l': + if (--argc <= 0) + return CMD_RET_USAGE; + buf_addr = simple_strtoul(*++argv, NULL, 16); + goto NXTARG; + + case 's': + if (--argc <= 0) + return CMD_RET_USAGE; + buf_size = simple_strtoul(*++argv, NULL, 16); + goto NXTARG; + + default: + return CMD_RET_USAGE; + } + } +NXTARG: + ; + } + + fastboot_init((void *)buf_addr, buf_size); + + if (!strcmp(argv[1], "udp")) + return do_fastboot_udp(argc, argv, buf_addr, buf_size); + + if (!strcmp(argv[1], "usb")) { + argv++; + argc--; + } + + return do_fastboot_usb(argc, argv, buf_addr, buf_size); } +#ifdef CONFIG_SYS_LONGHELP +static char fastboot_help_text[] = + "[-l addr] [-s size] usb <controller> | udp\n" + "\taddr - address of buffer used during data transfers (" + __stringify(CONFIG_FASTBOOT_BUF_ADDR) ")\n" + "\tsize - size of buffer used during data transfers (" + __stringify(CONFIG_FASTBOOT_BUF_SIZE) ")" + ; +#endif + U_BOOT_CMD( - fastboot, 2, 1, do_fastboot, - "use USB Fastboot protocol", - "<USB_controller>\n" - " - run as a fastboot usb device" + fastboot, CONFIG_SYS_MAXARGS, 1, do_fastboot, + "run as a fastboot usb or udp device", fastboot_help_text ); diff --git a/cmd/fpga.c b/cmd/fpga.c index 14ad4e52666..74ae80c807e 100644 --- a/cmd/fpga.c +++ b/cmd/fpga.c @@ -27,6 +27,7 @@ enum { FPGA_LOADP, FPGA_LOADBP, FPGA_LOADFS, + FPGA_LOADS, }; /* ------------------------------------------------------------------------- */ @@ -54,21 +55,55 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) fpga_fs_info fpga_fsinfo; fpga_fsinfo.fstype = FS_TYPE_ANY; #endif +#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) + struct fpga_secure_info fpga_sec_info; + + memset(&fpga_sec_info, 0, sizeof(fpga_sec_info)); +#endif if (devstr) dev = (int) simple_strtoul(devstr, NULL, 16); if (datastr) fpga_data = (void *)simple_strtoul(datastr, NULL, 16); - switch (argc) { + if (argc > 9 || argc < 2) { + debug("%s: Too many or too few args (%d)\n", __func__, argc); + return CMD_RET_USAGE; + } + + op = (int)fpga_get_op(argv[1]); + + switch (op) { #if defined(CONFIG_CMD_FPGA_LOADFS) - case 9: + case FPGA_LOADFS: + if (argc < 9) + return CMD_RET_USAGE; fpga_fsinfo.blocksize = (unsigned int) - simple_strtoul(argv[5], NULL, 16); + simple_strtoul(argv[5], NULL, 16); fpga_fsinfo.interface = argv[6]; fpga_fsinfo.dev_part = argv[7]; fpga_fsinfo.filename = argv[8]; + argc = 5; + break; +#endif +#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) + case FPGA_LOADS: + if (argc < 7) + return CMD_RET_USAGE; + if (argc == 8) + fpga_sec_info.userkey_addr = (u8 *)(uintptr_t) + simple_strtoull(argv[7], + NULL, 16); + fpga_sec_info.encflag = (u8)simple_strtoul(argv[6], NULL, 16); + fpga_sec_info.authflag = (u8)simple_strtoul(argv[5], NULL, 16); + argc = 5; + break; #endif + default: + break; + } + + switch (argc) { case 5: /* fpga <op> <dev> <data> <datasize> */ data_size = simple_strtoul(argv[4], NULL, 16); @@ -117,15 +152,6 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) __func__, (ulong)fpga_data); dev = FPGA_INVALID_DEVICE; /* reset device num */ } - - case 2: /* fpga <op> */ - op = (int)fpga_get_op(argv[1]); - break; - - default: - debug("%s: Too many or too few args (%d)\n", __func__, argc); - op = FPGA_NONE; /* force usage display */ - break; } if (dev == FPGA_INVALID_DEVICE) { @@ -143,6 +169,22 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) if (!fpga_fsinfo.interface || !fpga_fsinfo.dev_part || !fpga_fsinfo.filename) wrong_parms = 1; + break; +#endif +#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) + case FPGA_LOADS: + if (fpga_sec_info.authflag >= FPGA_NO_ENC_OR_NO_AUTH && + fpga_sec_info.encflag >= FPGA_NO_ENC_OR_NO_AUTH) { + puts("ERR: use <fpga load> for NonSecure bitstream\n"); + wrong_parms = 1; + } + + if (fpga_sec_info.encflag == FPGA_ENC_USR_KEY && + !fpga_sec_info.userkey_addr) { + wrong_parms = 1; + puts("ERR:User key not provided\n"); + } + break; #endif case FPGA_LOAD: case FPGA_LOADP: @@ -199,6 +241,12 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) break; #endif +#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) + case FPGA_LOADS: + rc = fpga_loads(dev, fpga_data, data_size, &fpga_sec_info); + break; +#endif + #if defined(CONFIG_CMD_FPGA_LOADMK) case FPGA_LOADMK: switch (genimg_get_format(fpga_data)) { @@ -332,6 +380,10 @@ static int fpga_get_op(char *opstr) #endif else if (!strcmp("dump", opstr)) op = FPGA_DUMP; +#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) + else if (!strcmp("loads", opstr)) + op = FPGA_LOADS; +#endif if (op == FPGA_NONE) printf("Unknown fpga operation \"%s\"\n", opstr); @@ -339,7 +391,7 @@ static int fpga_get_op(char *opstr) return op; } -#if defined(CONFIG_CMD_FPGA_LOADFS) +#if defined(CONFIG_CMD_FPGA_LOADFS) || defined(CONFIG_CMD_FPGA_LOAD_SECURE) U_BOOT_CMD(fpga, 9, 1, do_fpga, #else U_BOOT_CMD(fpga, 6, 1, do_fpga, @@ -374,4 +426,19 @@ U_BOOT_CMD(fpga, 6, 1, do_fpga, "\tsubimage unit name in the form of addr:<subimg_uname>" #endif #endif +#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) + "Load encrypted bitstream (Xilinx only)\n" + " loads [dev] [address] [size] [auth-OCM-0/DDR-1/noauth-2]\n" + " [enc-devkey(0)/userkey(1)/nenc(2) [Userkey address]\n" + "Loads the secure bistreams(authenticated/encrypted/both\n" + "authenticated and encrypted) of [size] from [address].\n" + "The auth-OCM/DDR flag specifies to perform authentication\n" + "in OCM or in DDR. 0 for OCM, 1 for DDR, 2 for no authentication.\n" + "The enc flag specifies which key to be used for decryption\n" + "0-device key, 1-user key, 2-no encryption.\n" + "The optional Userkey address specifies from which address key\n" + "has to be used for decryption if user key is selected.\n" + "NOTE: the sceure bitstream has to be created using xilinx\n" + "bootgen tool only.\n" +#endif ); diff --git a/cmd/mmc.c b/cmd/mmc.c index 68bbf1f5135..c2ee2d9c0af 100644 --- a/cmd/mmc.c +++ b/cmd/mmc.c @@ -128,7 +128,7 @@ static int do_mmcinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return CMD_RET_SUCCESS; } -#ifdef CONFIG_SUPPORT_EMMC_RPMB +#if CONFIG_IS_ENABLED(CMD_MMC_RPMB) static int confirm_key_prog(void) { puts("Warning: Programming authentication key can be done only once !\n" @@ -308,8 +308,7 @@ static int do_mmc_read(cmd_tbl_t *cmdtp, int flag, return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE; } -#if CONFIG_IS_ENABLED(MMC_WRITE) -#if defined(CONFIG_FASTBOOT_FLASH) +#if CONFIG_IS_ENABLED(CMD_MMC_SWRITE) static lbaint_t mmc_sparse_write(struct sparse_storage *info, lbaint_t blk, lbaint_t blkcnt, const void *buffer) { @@ -367,13 +366,14 @@ static int do_mmc_sparse_write(cmd_tbl_t *cmdtp, int flag, sparse.mssg = NULL; sprintf(dest, "0x" LBAF, sparse.start * sparse.blksz); - if (write_sparse_image(&sparse, dest, addr)) + if (write_sparse_image(&sparse, dest, addr, NULL)) return CMD_RET_FAILURE; else return CMD_RET_SUCCESS; } #endif +#if CONFIG_IS_ENABLED(MMC_WRITE) static int do_mmc_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { @@ -868,11 +868,11 @@ static cmd_tbl_t cmd_mmc[] = { U_BOOT_CMD_MKENT(read, 4, 1, do_mmc_read, "", ""), #if CONFIG_IS_ENABLED(MMC_WRITE) U_BOOT_CMD_MKENT(write, 4, 0, do_mmc_write, "", ""), -#if defined(CONFIG_FASTBOOT_FLASH) - U_BOOT_CMD_MKENT(swrite, 3, 0, do_mmc_sparse_write, "", ""), -#endif U_BOOT_CMD_MKENT(erase, 3, 0, do_mmc_erase, "", ""), #endif +#if CONFIG_IS_ENABLED(CMD_MMC_SWRITE) + U_BOOT_CMD_MKENT(swrite, 3, 0, do_mmc_sparse_write, "", ""), +#endif U_BOOT_CMD_MKENT(rescan, 1, 1, do_mmc_rescan, "", ""), U_BOOT_CMD_MKENT(part, 1, 1, do_mmc_part, "", ""), U_BOOT_CMD_MKENT(dev, 3, 0, do_mmc_dev, "", ""), @@ -886,7 +886,7 @@ static cmd_tbl_t cmd_mmc[] = { U_BOOT_CMD_MKENT(partconf, 5, 0, do_mmc_partconf, "", ""), U_BOOT_CMD_MKENT(rst-function, 3, 0, do_mmc_rst_func, "", ""), #endif -#ifdef CONFIG_SUPPORT_EMMC_RPMB +#if CONFIG_IS_ENABLED(CMD_MMC_RPMB) U_BOOT_CMD_MKENT(rpmb, CONFIG_SYS_MAXARGS, 1, do_mmcrpmb, "", ""), #endif U_BOOT_CMD_MKENT(setdsr, 2, 0, do_mmc_setdsr, "", ""), @@ -927,7 +927,7 @@ U_BOOT_CMD( "info - display info of the current MMC device\n" "mmc read addr blk# cnt\n" "mmc write addr blk# cnt\n" -#if defined(CONFIG_FASTBOOT_FLASH) +#if CONFIG_IS_ENABLED(CMD_MMC_SWRITE) "mmc swrite addr blk#\n" #endif "mmc erase blk# cnt\n" @@ -953,7 +953,7 @@ U_BOOT_CMD( " - Change the RST_n_FUNCTION field of the specified device\n" " WARNING: This is a write-once field and 0 / 1 / 2 are the only valid values.\n" #endif -#ifdef CONFIG_SUPPORT_EMMC_RPMB +#if CONFIG_IS_ENABLED(CMD_MMC_RPMB) "mmc rpmb read addr blk# cnt [address of auth-key] - block size is 256 bytes\n" "mmc rpmb write addr blk# cnt <address of auth-key> - block size is 256 bytes\n" "mmc rpmb key <address of auth-key> - program the RPMB authentication key.\n" diff --git a/cmd/pmic.c b/cmd/pmic.c index f4b4a3f5881..e46d813a70b 100644 --- a/cmd/pmic.c +++ b/cmd/pmic.c @@ -75,8 +75,9 @@ static int do_list(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) static int do_dump(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { + struct uc_pmic_priv *priv; struct udevice *dev; - uint8_t value; + char fmt[16]; uint reg; int ret; @@ -86,12 +87,15 @@ static int do_dump(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) } dev = currdev; - + priv = dev_get_uclass_priv(dev); printf("Dump pmic: %s registers\n", dev->name); + sprintf(fmt, "%%%d.%dx ", priv->trans_len * 2, + priv->trans_len * 2); + for (reg = 0; reg < pmic_reg_count(dev); reg++) { - ret = pmic_read(dev, reg, &value, 1); - if (ret) { + ret = pmic_reg_read(dev, reg); + if (ret < 0) { printf("Can't read register: %d\n", reg); return failure(ret); } @@ -99,7 +103,7 @@ static int do_dump(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) if (!(reg % 16)) printf("\n0x%02x: ", reg); - printf("%2.2x ", value); + printf(fmt, ret); } printf("\n"); @@ -108,9 +112,10 @@ static int do_dump(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) static int do_read(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { + struct uc_pmic_priv *priv; struct udevice *dev; int regs, ret; - uint8_t value; + char fmt[24]; uint reg; if (!currdev) { @@ -119,6 +124,7 @@ static int do_read(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) } dev = currdev; + priv = dev_get_uclass_priv(dev); if (argc != 2) return CMD_RET_USAGE; @@ -130,13 +136,15 @@ static int do_read(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return failure(-EFAULT); } - ret = pmic_read(dev, reg, &value, 1); - if (ret) { + ret = pmic_reg_read(dev, reg); + if (ret < 0) { printf("Can't read PMIC register: %d!\n", reg); return failure(ret); } - printf("0x%02x: 0x%2.2x\n", reg, value); + sprintf(fmt, "0x%%02x: 0x%%%d.%dx\n", priv->trans_len * 2, + priv->trans_len * 2); + printf(fmt, reg, ret); return CMD_RET_SUCCESS; } @@ -144,9 +152,8 @@ static int do_read(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) static int do_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { struct udevice *dev; + uint reg, value; int regs, ret; - uint8_t value; - uint reg; if (!currdev) { printf("First, set the PMIC device!\n"); @@ -167,7 +174,7 @@ static int do_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) value = simple_strtoul(argv[2], NULL, 0); - ret = pmic_write(dev, reg, &value, 1); + ret = pmic_reg_write(dev, reg, value); if (ret) { printf("Can't write PMIC register: %d!\n", reg); return failure(ret); diff --git a/cmd/pxe.c b/cmd/pxe.c index 7649d92b6bd..5609545de57 100644 --- a/cmd/pxe.c +++ b/cmd/pxe.c @@ -1453,8 +1453,8 @@ static struct menu *pxe_menu_to_menu(struct pxe_menu *cfg) /* * Create a menu and add items for all the labels. */ - m = menu_create(cfg->title, cfg->timeout, cfg->prompt, label_print, - NULL, NULL); + m = menu_create(cfg->title, DIV_ROUND_UP(cfg->timeout, 10), + cfg->prompt, label_print, NULL, NULL); if (!m) return NULL; diff --git a/cmd/tpm-common.c b/cmd/tpm-common.c new file mode 100644 index 00000000000..6cf9fcc9ac8 --- /dev/null +++ b/cmd/tpm-common.c @@ -0,0 +1,288 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2013 The Chromium OS Authors. + */ + +#include <common.h> +#include <command.h> +#include <dm.h> +#include <asm/unaligned.h> +#include <linux/string.h> +#include <tpm-common.h> +#include "tpm-user-utils.h" + +/** + * Print a byte string in hexdecimal format, 16-bytes per line. + * + * @param data byte string to be printed + * @param count number of bytes to be printed + */ +void print_byte_string(u8 *data, size_t count) +{ + int i, print_newline = 0; + + for (i = 0; i < count; i++) { + printf(" %02x", data[i]); + print_newline = (i % 16 == 15); + if (print_newline) + putc('\n'); + } + /* Avoid duplicated newline at the end */ + if (!print_newline) + putc('\n'); +} + +/** + * Convert a text string of hexdecimal values into a byte string. + * + * @param bytes text string of hexdecimal values with no space + * between them + * @param data output buffer for byte string. The caller has to make + * sure it is large enough for storing the output. If + * NULL is passed, a large enough buffer will be allocated, + * and the caller must free it. + * @param count_ptr output variable for the length of byte string + * @return pointer to output buffer + */ +void *parse_byte_string(char *bytes, u8 *data, size_t *count_ptr) +{ + char byte[3]; + size_t count, length; + int i; + + if (!bytes) + return NULL; + length = strlen(bytes); + count = length / 2; + + if (!data) + data = malloc(count); + if (!data) + return NULL; + + byte[2] = '\0'; + for (i = 0; i < length; i += 2) { + byte[0] = bytes[i]; + byte[1] = bytes[i + 1]; + data[i / 2] = (u8)simple_strtoul(byte, NULL, 16); + } + + if (count_ptr) + *count_ptr = count; + + return data; +} + +/** + * report_return_code() - Report any error and return failure or success + * + * @param return_code TPM command return code + * @return value of enum command_ret_t + */ +int report_return_code(int return_code) +{ + if (return_code) { + printf("Error: %d\n", return_code); + return CMD_RET_FAILURE; + } else { + return CMD_RET_SUCCESS; + } +} + +/** + * Return number of values defined by a type string. + * + * @param type_str type string + * @return number of values of type string + */ +int type_string_get_num_values(const char *type_str) +{ + return strlen(type_str); +} + +/** + * Return total size of values defined by a type string. + * + * @param type_str type string + * @return total size of values of type string, or 0 if type string + * contains illegal type character. + */ +size_t type_string_get_space_size(const char *type_str) +{ + size_t size; + + for (size = 0; *type_str; type_str++) { + switch (*type_str) { + case 'b': + size += 1; + break; + case 'w': + size += 2; + break; + case 'd': + size += 4; + break; + default: + return 0; + } + } + + return size; +} + +/** + * Allocate a buffer large enough to hold values defined by a type + * string. The caller has to free the buffer. + * + * @param type_str type string + * @param count pointer for storing size of buffer + * @return pointer to buffer or NULL on error + */ +void *type_string_alloc(const char *type_str, u32 *count) +{ + void *data; + size_t size; + + size = type_string_get_space_size(type_str); + if (!size) + return NULL; + data = malloc(size); + if (data) + *count = size; + + return data; +} + +/** + * Pack values defined by a type string into a buffer. The buffer must have + * large enough space. + * + * @param type_str type string + * @param values text strings of values to be packed + * @param data output buffer of values + * @return 0 on success, non-0 on error + */ +int type_string_pack(const char *type_str, char * const values[], + u8 *data) +{ + size_t offset; + u32 value; + + for (offset = 0; *type_str; type_str++, values++) { + value = simple_strtoul(values[0], NULL, 0); + switch (*type_str) { + case 'b': + data[offset] = value; + offset += 1; + break; + case 'w': + put_unaligned_be16(value, data + offset); + offset += 2; + break; + case 'd': + put_unaligned_be32(value, data + offset); + offset += 4; + break; + default: + return -1; + } + } + + return 0; +} + +/** + * Read values defined by a type string from a buffer, and write these values + * to environment variables. + * + * @param type_str type string + * @param data input buffer of values + * @param vars names of environment variables + * @return 0 on success, non-0 on error + */ +int type_string_write_vars(const char *type_str, u8 *data, + char * const vars[]) +{ + size_t offset; + u32 value; + + for (offset = 0; *type_str; type_str++, vars++) { + switch (*type_str) { + case 'b': + value = data[offset]; + offset += 1; + break; + case 'w': + value = get_unaligned_be16(data + offset); + offset += 2; + break; + case 'd': + value = get_unaligned_be32(data + offset); + offset += 4; + break; + default: + return -1; + } + if (env_set_ulong(*vars, value)) + return -1; + } + + return 0; +} + +int get_tpm(struct udevice **devp) +{ + int rc; + + rc = uclass_first_device_err(UCLASS_TPM, devp); + if (rc) { + printf("Could not find TPM (ret=%d)\n", rc); + return CMD_RET_FAILURE; + } + + return 0; +} + +int do_tpm_info(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) +{ + struct udevice *dev; + char buf[80]; + int rc; + + rc = get_tpm(&dev); + if (rc) + return rc; + rc = tpm_get_desc(dev, buf, sizeof(buf)); + if (rc < 0) { + printf("Couldn't get TPM info (%d)\n", rc); + return CMD_RET_FAILURE; + } + printf("%s\n", buf); + + return 0; +} + +int do_tpm_init(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + if (argc != 1) + return CMD_RET_USAGE; + + return report_return_code(tpm_init()); +} + +int do_tpm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + cmd_tbl_t *tpm_commands, *cmd; + unsigned int size; + + if (argc < 2) + return CMD_RET_USAGE; + + tpm_commands = get_tpm_commands(&size); + + cmd = find_cmd_tbl(argv[1], tpm_commands, size); + if (!cmd) + return CMD_RET_USAGE; + + return cmd->cmd(cmdtp, flag, argc - 1, argv + 1); +} diff --git a/cmd/tpm-user-utils.h b/cmd/tpm-user-utils.h new file mode 100644 index 00000000000..8ce98617843 --- /dev/null +++ b/cmd/tpm-user-utils.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2013 The Chromium OS Authors. + * Coypright (c) 2013 Guntermann & Drunck GmbH + */ + +#ifndef __TPM_USER_UTILS_H +#define __TPM_USER_UTILS_H + +void print_byte_string(u8 *data, size_t count); +void *parse_byte_string(char *bytes, u8 *data, size_t *count_ptr); +int report_return_code(int return_code); +int type_string_get_num_values(const char *type_str); +size_t type_string_get_space_size(const char *type_str); +void *type_string_alloc(const char *type_str, u32 *count); +int type_string_pack(const char *type_str, char * const values[], u8 *data); +int type_string_write_vars(const char *type_str, u8 *data, char * const vars[]); +int get_tpm(struct udevice **devp); + +int do_tpm_init(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]); +int do_tpm_info(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]); +int do_tpm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); + +#endif /* __TPM_USER_UTILS_H */ diff --git a/cmd/tpm.c b/cmd/tpm-v1.c index c173bcfe42a..0874c4d7baf 100644 --- a/cmd/tpm.c +++ b/cmd/tpm-v1.c @@ -4,241 +4,14 @@ */ #include <common.h> -#include <command.h> -#include <dm.h> #include <malloc.h> -#include <tpm.h> #include <asm/unaligned.h> -#include <linux/string.h> +#include <tpm-common.h> +#include <tpm-v1.h> +#include "tpm-user-utils.h" -/* Useful constants */ -enum { - DIGEST_LENGTH = 20, - /* max lengths, valid for RSA keys <= 2048 bits */ - TPM_PUBKEY_MAX_LENGTH = 288, -}; - -/** - * Print a byte string in hexdecimal format, 16-bytes per line. - * - * @param data byte string to be printed - * @param count number of bytes to be printed - */ -static void print_byte_string(uint8_t *data, size_t count) -{ - int i, print_newline = 0; - - for (i = 0; i < count; i++) { - printf(" %02x", data[i]); - print_newline = (i % 16 == 15); - if (print_newline) - putc('\n'); - } - /* Avoid duplicated newline at the end */ - if (!print_newline) - putc('\n'); -} - -/** - * Convert a text string of hexdecimal values into a byte string. - * - * @param bytes text string of hexdecimal values with no space - * between them - * @param data output buffer for byte string. The caller has to make - * sure it is large enough for storing the output. If - * NULL is passed, a large enough buffer will be allocated, - * and the caller must free it. - * @param count_ptr output variable for the length of byte string - * @return pointer to output buffer - */ -static void *parse_byte_string(char *bytes, uint8_t *data, size_t *count_ptr) -{ - char byte[3]; - size_t count, length; - int i; - - if (!bytes) - return NULL; - length = strlen(bytes); - count = length / 2; - - if (!data) - data = malloc(count); - if (!data) - return NULL; - - byte[2] = '\0'; - for (i = 0; i < length; i += 2) { - byte[0] = bytes[i]; - byte[1] = bytes[i + 1]; - data[i / 2] = (uint8_t)simple_strtoul(byte, NULL, 16); - } - - if (count_ptr) - *count_ptr = count; - - return data; -} - -/** - * report_return_code() - Report any error and return failure or success - * - * @param return_code TPM command return code - * @return value of enum command_ret_t - */ -static int report_return_code(int return_code) -{ - if (return_code) { - printf("Error: %d\n", return_code); - return CMD_RET_FAILURE; - } else { - return CMD_RET_SUCCESS; - } -} - -/** - * Return number of values defined by a type string. - * - * @param type_str type string - * @return number of values of type string - */ -static int type_string_get_num_values(const char *type_str) -{ - return strlen(type_str); -} - -/** - * Return total size of values defined by a type string. - * - * @param type_str type string - * @return total size of values of type string, or 0 if type string - * contains illegal type character. - */ -static size_t type_string_get_space_size(const char *type_str) -{ - size_t size; - - for (size = 0; *type_str; type_str++) { - switch (*type_str) { - case 'b': - size += 1; - break; - case 'w': - size += 2; - break; - case 'd': - size += 4; - break; - default: - return 0; - } - } - - return size; -} - -/** - * Allocate a buffer large enough to hold values defined by a type - * string. The caller has to free the buffer. - * - * @param type_str type string - * @param count pointer for storing size of buffer - * @return pointer to buffer or NULL on error - */ -static void *type_string_alloc(const char *type_str, uint32_t *count) -{ - void *data; - size_t size; - - size = type_string_get_space_size(type_str); - if (!size) - return NULL; - data = malloc(size); - if (data) - *count = size; - - return data; -} - -/** - * Pack values defined by a type string into a buffer. The buffer must have - * large enough space. - * - * @param type_str type string - * @param values text strings of values to be packed - * @param data output buffer of values - * @return 0 on success, non-0 on error - */ -static int type_string_pack(const char *type_str, char * const values[], - uint8_t *data) -{ - size_t offset; - uint32_t value; - - for (offset = 0; *type_str; type_str++, values++) { - value = simple_strtoul(values[0], NULL, 0); - switch (*type_str) { - case 'b': - data[offset] = value; - offset += 1; - break; - case 'w': - put_unaligned_be16(value, data + offset); - offset += 2; - break; - case 'd': - put_unaligned_be32(value, data + offset); - offset += 4; - break; - default: - return -1; - } - } - - return 0; -} - -/** - * Read values defined by a type string from a buffer, and write these values - * to environment variables. - * - * @param type_str type string - * @param data input buffer of values - * @param vars names of environment variables - * @return 0 on success, non-0 on error - */ -static int type_string_write_vars(const char *type_str, uint8_t *data, - char * const vars[]) -{ - size_t offset; - uint32_t value; - - for (offset = 0; *type_str; type_str++, vars++) { - switch (*type_str) { - case 'b': - value = data[offset]; - offset += 1; - break; - case 'w': - value = get_unaligned_be16(data + offset); - offset += 2; - break; - case 'd': - value = get_unaligned_be32(data + offset); - offset += 4; - break; - default: - return -1; - } - if (env_set_ulong(*vars, value)) - return -1; - } - - return 0; -} - -static int do_tpm_startup(cmd_tbl_t *cmdtp, int flag, - int argc, char * const argv[]) +static int do_tpm_startup(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) { enum tpm_startup_type mode; @@ -258,10 +31,10 @@ static int do_tpm_startup(cmd_tbl_t *cmdtp, int flag, return report_return_code(tpm_startup(mode)); } -static int do_tpm_nv_define_space(cmd_tbl_t *cmdtp, int flag, - int argc, char * const argv[]) +static int do_tpm_nv_define_space(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) { - uint32_t index, perm, size; + u32 index, perm, size; if (argc != 4) return CMD_RET_USAGE; @@ -272,10 +45,10 @@ static int do_tpm_nv_define_space(cmd_tbl_t *cmdtp, int flag, return report_return_code(tpm_nv_define_space(index, perm, size)); } -static int do_tpm_nv_read_value(cmd_tbl_t *cmdtp, int flag, - int argc, char * const argv[]) +static int do_tpm_nv_read_value(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) { - uint32_t index, count, rc; + u32 index, count, rc; void *data; if (argc != 4) @@ -293,10 +66,10 @@ static int do_tpm_nv_read_value(cmd_tbl_t *cmdtp, int flag, return report_return_code(rc); } -static int do_tpm_nv_write_value(cmd_tbl_t *cmdtp, int flag, - int argc, char * const argv[]) +static int do_tpm_nv_write_value(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) { - uint32_t index, rc; + u32 index, rc; size_t count; void *data; @@ -315,11 +88,11 @@ static int do_tpm_nv_write_value(cmd_tbl_t *cmdtp, int flag, return report_return_code(rc); } -static int do_tpm_extend(cmd_tbl_t *cmdtp, int flag, - int argc, char * const argv[]) +static int do_tpm_extend(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) { - uint32_t index, rc; - uint8_t in_digest[20], out_digest[20]; + u32 index, rc; + u8 in_digest[20], out_digest[20]; if (argc != 3) return CMD_RET_USAGE; @@ -338,10 +111,10 @@ static int do_tpm_extend(cmd_tbl_t *cmdtp, int flag, return report_return_code(rc); } -static int do_tpm_pcr_read(cmd_tbl_t *cmdtp, int flag, - int argc, char * const argv[]) +static int do_tpm_pcr_read(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) { - uint32_t index, count, rc; + u32 index, count, rc; void *data; if (argc != 4) @@ -359,22 +132,22 @@ static int do_tpm_pcr_read(cmd_tbl_t *cmdtp, int flag, return report_return_code(rc); } -static int do_tpm_tsc_physical_presence(cmd_tbl_t *cmdtp, int flag, - int argc, char * const argv[]) +static int do_tpm_tsc_physical_presence(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) { - uint16_t presence; + u16 presence; if (argc != 2) return CMD_RET_USAGE; - presence = (uint16_t)simple_strtoul(argv[1], NULL, 0); + presence = (u16)simple_strtoul(argv[1], NULL, 0); return report_return_code(tpm_tsc_physical_presence(presence)); } -static int do_tpm_read_pubek(cmd_tbl_t *cmdtp, int flag, - int argc, char * const argv[]) +static int do_tpm_read_pubek(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) { - uint32_t count, rc; + u32 count, rc; void *data; if (argc != 3) @@ -391,22 +164,22 @@ static int do_tpm_read_pubek(cmd_tbl_t *cmdtp, int flag, return report_return_code(rc); } -static int do_tpm_physical_set_deactivated(cmd_tbl_t *cmdtp, int flag, - int argc, char * const argv[]) +static int do_tpm_physical_set_deactivated(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) { - uint8_t state; + u8 state; if (argc != 2) return CMD_RET_USAGE; - state = (uint8_t)simple_strtoul(argv[1], NULL, 0); + state = (u8)simple_strtoul(argv[1], NULL, 0); return report_return_code(tpm_physical_set_deactivated(state)); } -static int do_tpm_get_capability(cmd_tbl_t *cmdtp, int flag, - int argc, char * const argv[]) +static int do_tpm_get_capability(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) { - uint32_t cap_area, sub_cap, rc; + u32 cap_area, sub_cap, rc; void *cap; size_t count; @@ -426,63 +199,14 @@ static int do_tpm_get_capability(cmd_tbl_t *cmdtp, int flag, return report_return_code(rc); } -#define TPM_COMMAND_NO_ARG(cmd) \ -static int do_##cmd(cmd_tbl_t *cmdtp, int flag, \ - int argc, char * const argv[]) \ -{ \ - if (argc != 1) \ - return CMD_RET_USAGE; \ - return report_return_code(cmd()); \ -} - -TPM_COMMAND_NO_ARG(tpm_init) -TPM_COMMAND_NO_ARG(tpm_self_test_full) -TPM_COMMAND_NO_ARG(tpm_continue_self_test) -TPM_COMMAND_NO_ARG(tpm_force_clear) -TPM_COMMAND_NO_ARG(tpm_physical_enable) -TPM_COMMAND_NO_ARG(tpm_physical_disable) - -static int get_tpm(struct udevice **devp) -{ - int rc; - - rc = uclass_first_device_err(UCLASS_TPM, devp); - if (rc) { - printf("Could not find TPM (ret=%d)\n", rc); - return CMD_RET_FAILURE; - } - - return 0; -} - -static int do_tpm_info(cmd_tbl_t *cmdtp, int flag, int argc, - char *const argv[]) -{ - struct udevice *dev; - char buf[80]; - int rc; - - rc = get_tpm(&dev); - if (rc) - return rc; - rc = tpm_get_desc(dev, buf, sizeof(buf)); - if (rc < 0) { - printf("Couldn't get TPM info (%d)\n", rc); - return CMD_RET_FAILURE; - } - printf("%s\n", buf); - - return 0; -} - -static int do_tpm_raw_transfer(cmd_tbl_t *cmdtp, int flag, - int argc, char * const argv[]) +static int do_tpm_raw_transfer(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) { struct udevice *dev; void *command; - uint8_t response[1024]; + u8 response[1024]; size_t count, response_length = sizeof(response); - uint32_t rc; + u32 rc; command = parse_byte_string(argv[1], NULL, &count); if (!command) { @@ -504,10 +228,10 @@ static int do_tpm_raw_transfer(cmd_tbl_t *cmdtp, int flag, return report_return_code(rc); } -static int do_tpm_nv_define(cmd_tbl_t *cmdtp, int flag, - int argc, char * const argv[]) +static int do_tpm_nv_define(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) { - uint32_t index, perm, size; + u32 index, perm, size; if (argc != 4) return CMD_RET_USAGE; @@ -522,10 +246,10 @@ static int do_tpm_nv_define(cmd_tbl_t *cmdtp, int flag, return report_return_code(tpm_nv_define_space(index, perm, size)); } -static int do_tpm_nv_read(cmd_tbl_t *cmdtp, int flag, - int argc, char * const argv[]) +static int do_tpm_nv_read(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) { - uint32_t index, count, err; + u32 index, count, err; void *data; if (argc < 3) @@ -551,10 +275,10 @@ static int do_tpm_nv_read(cmd_tbl_t *cmdtp, int flag, return report_return_code(err); } -static int do_tpm_nv_write(cmd_tbl_t *cmdtp, int flag, - int argc, char * const argv[]) +static int do_tpm_nv_write(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) { - uint32_t index, count, err; + u32 index, count, err; void *data; if (argc < 3) @@ -581,10 +305,10 @@ static int do_tpm_nv_write(cmd_tbl_t *cmdtp, int flag, #ifdef CONFIG_TPM_AUTH_SESSIONS -static int do_tpm_oiap(cmd_tbl_t *cmdtp, int flag, - int argc, char * const argv[]) +static int do_tpm_oiap(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) { - uint32_t auth_handle, err; + u32 auth_handle, err; err = tpm_oiap(&auth_handle); @@ -595,10 +319,10 @@ static int do_tpm_oiap(cmd_tbl_t *cmdtp, int flag, static int do_tpm_load_key_by_sha1(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { - uint32_t parent_handle = 0; - uint32_t key_len, key_handle, err; - uint8_t usage_auth[DIGEST_LENGTH]; - uint8_t parent_hash[DIGEST_LENGTH]; + u32 parent_handle = 0; + u32 key_len, key_handle, err; + u8 usage_auth[DIGEST_LENGTH]; + u8 parent_hash[DIGEST_LENGTH]; void *key; if (argc < 5) @@ -630,11 +354,11 @@ static int do_tpm_load_key_by_sha1(cmd_tbl_t *cmdtp, int flag, int argc, char * } #endif /* CONFIG_TPM_LOAD_KEY_BY_SHA1 */ -static int do_tpm_load_key2_oiap(cmd_tbl_t *cmdtp, int flag, - int argc, char * const argv[]) +static int do_tpm_load_key2_oiap(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) { - uint32_t parent_handle, key_len, key_handle, err; - uint8_t usage_auth[DIGEST_LENGTH]; + u32 parent_handle, key_len, key_handle, err; + u8 usage_auth[DIGEST_LENGTH]; void *key; if (argc < 5) @@ -648,19 +372,19 @@ static int do_tpm_load_key2_oiap(cmd_tbl_t *cmdtp, int flag, parse_byte_string(argv[4], usage_auth, NULL); err = tpm_load_key2_oiap(parent_handle, key, key_len, usage_auth, - &key_handle); + &key_handle); if (!err) printf("Key handle is 0x%x\n", key_handle); return report_return_code(err); } -static int do_tpm_get_pub_key_oiap(cmd_tbl_t *cmdtp, int flag, - int argc, char * const argv[]) +static int do_tpm_get_pub_key_oiap(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) { - uint32_t key_handle, err; - uint8_t usage_auth[DIGEST_LENGTH]; - uint8_t pub_key_buffer[TPM_PUBKEY_MAX_LENGTH]; + u32 key_handle, err; + u8 usage_auth[DIGEST_LENGTH]; + u8 pub_key_buffer[TPM_PUBKEY_MAX_LENGTH]; size_t pub_key_len = sizeof(pub_key_buffer); if (argc < 3) @@ -671,8 +395,8 @@ static int do_tpm_get_pub_key_oiap(cmd_tbl_t *cmdtp, int flag, return CMD_RET_FAILURE; parse_byte_string(argv[2], usage_auth, NULL); - err = tpm_get_pub_key_oiap(key_handle, usage_auth, - pub_key_buffer, &pub_key_len); + err = tpm_get_pub_key_oiap(key_handle, usage_auth, pub_key_buffer, + &pub_key_len); if (!err) { printf("dump of received pub key structure:\n"); print_byte_string(pub_key_buffer, pub_key_len); @@ -720,9 +444,9 @@ static int do_tpm_flush(cmd_tbl_t *cmdtp, int flag, int argc, } if (!strcasecmp(argv[2], "all")) { - uint16_t res_count; - uint8_t buf[288]; - uint8_t *ptr; + u16 res_count; + u8 buf[288]; + u8 *ptr; int err; uint i; @@ -738,7 +462,7 @@ static int do_tpm_flush(cmd_tbl_t *cmdtp, int flag, int argc, for (i = 0; i < res_count; ++i, ptr += 4) tpm_flush_specific(get_unaligned_be32(ptr), type); } else { - uint32_t handle = simple_strtoul(argv[2], NULL, 0); + u32 handle = simple_strtoul(argv[2], NULL, 0); if (!handle) { printf("Illegal resource handle %s\n", argv[2]); @@ -756,9 +480,9 @@ static int do_tpm_list(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { int type = 0; - uint16_t res_count; - uint8_t buf[288]; - uint8_t *ptr; + u16 res_count; + u8 buf[288]; + u8 *ptr; int err; uint i; @@ -813,51 +537,53 @@ static int do_tpm_list(cmd_tbl_t *cmdtp, int flag, int argc, } #endif /* CONFIG_TPM_LIST_RESOURCES */ -#define MAKE_TPM_CMD_ENTRY(cmd) \ - U_BOOT_CMD_MKENT(cmd, 0, 1, do_tpm_ ## cmd, "", "") +TPM_COMMAND_NO_ARG(tpm_self_test_full) +TPM_COMMAND_NO_ARG(tpm_continue_self_test) +TPM_COMMAND_NO_ARG(tpm_force_clear) +TPM_COMMAND_NO_ARG(tpm_physical_enable) +TPM_COMMAND_NO_ARG(tpm_physical_disable) -static cmd_tbl_t tpm_commands[] = { +static cmd_tbl_t tpm1_commands[] = { U_BOOT_CMD_MKENT(info, 0, 1, do_tpm_info, "", ""), - U_BOOT_CMD_MKENT(init, 0, 1, - do_tpm_init, "", ""), + U_BOOT_CMD_MKENT(init, 0, 1, do_tpm_init, "", ""), U_BOOT_CMD_MKENT(startup, 0, 1, - do_tpm_startup, "", ""), + do_tpm_startup, "", ""), U_BOOT_CMD_MKENT(self_test_full, 0, 1, - do_tpm_self_test_full, "", ""), + do_tpm_self_test_full, "", ""), U_BOOT_CMD_MKENT(continue_self_test, 0, 1, - do_tpm_continue_self_test, "", ""), + do_tpm_continue_self_test, "", ""), U_BOOT_CMD_MKENT(force_clear, 0, 1, - do_tpm_force_clear, "", ""), + do_tpm_force_clear, "", ""), U_BOOT_CMD_MKENT(physical_enable, 0, 1, - do_tpm_physical_enable, "", ""), + do_tpm_physical_enable, "", ""), U_BOOT_CMD_MKENT(physical_disable, 0, 1, - do_tpm_physical_disable, "", ""), + do_tpm_physical_disable, "", ""), U_BOOT_CMD_MKENT(nv_define_space, 0, 1, - do_tpm_nv_define_space, "", ""), + do_tpm_nv_define_space, "", ""), U_BOOT_CMD_MKENT(nv_read_value, 0, 1, - do_tpm_nv_read_value, "", ""), + do_tpm_nv_read_value, "", ""), U_BOOT_CMD_MKENT(nv_write_value, 0, 1, - do_tpm_nv_write_value, "", ""), + do_tpm_nv_write_value, "", ""), U_BOOT_CMD_MKENT(extend, 0, 1, - do_tpm_extend, "", ""), + do_tpm_extend, "", ""), U_BOOT_CMD_MKENT(pcr_read, 0, 1, - do_tpm_pcr_read, "", ""), + do_tpm_pcr_read, "", ""), U_BOOT_CMD_MKENT(tsc_physical_presence, 0, 1, - do_tpm_tsc_physical_presence, "", ""), + do_tpm_tsc_physical_presence, "", ""), U_BOOT_CMD_MKENT(read_pubek, 0, 1, - do_tpm_read_pubek, "", ""), + do_tpm_read_pubek, "", ""), U_BOOT_CMD_MKENT(physical_set_deactivated, 0, 1, - do_tpm_physical_set_deactivated, "", ""), + do_tpm_physical_set_deactivated, "", ""), U_BOOT_CMD_MKENT(get_capability, 0, 1, - do_tpm_get_capability, "", ""), + do_tpm_get_capability, "", ""), U_BOOT_CMD_MKENT(raw_transfer, 0, 1, - do_tpm_raw_transfer, "", ""), + do_tpm_raw_transfer, "", ""), U_BOOT_CMD_MKENT(nv_define, 0, 1, - do_tpm_nv_define, "", ""), + do_tpm_nv_define, "", ""), U_BOOT_CMD_MKENT(nv_read, 0, 1, - do_tpm_nv_read, "", ""), + do_tpm_nv_read, "", ""), U_BOOT_CMD_MKENT(nv_write, 0, 1, - do_tpm_nv_write, "", ""), + do_tpm_nv_write, "", ""), #ifdef CONFIG_TPM_AUTH_SESSIONS U_BOOT_CMD_MKENT(oiap, 0, 1, do_tpm_oiap, "", ""), @@ -882,21 +608,15 @@ static cmd_tbl_t tpm_commands[] = { #endif /* CONFIG_TPM_LIST_RESOURCES */ }; -static int do_tpm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +cmd_tbl_t *get_tpm_commands(unsigned int *size) { - cmd_tbl_t *tpm_cmd; - - if (argc < 2) - return CMD_RET_USAGE; - tpm_cmd = find_cmd_tbl(argv[1], tpm_commands, ARRAY_SIZE(tpm_commands)); - if (!tpm_cmd) - return CMD_RET_USAGE; + *size = ARRAY_SIZE(tpm1_commands); - return tpm_cmd->cmd(cmdtp, flag, argc - 1, argv + 1); + return tpm1_commands; } U_BOOT_CMD(tpm, CONFIG_SYS_MAXARGS, 1, do_tpm, -"Issue a TPM command", +"Issue a TPMv1.x command", "cmd args...\n" " - Issue TPM command <cmd> with arguments <args...>.\n" "Admin Startup and State Commands:\n" diff --git a/cmd/tpm-v2.c b/cmd/tpm-v2.c new file mode 100644 index 00000000000..38add4f4622 --- /dev/null +++ b/cmd/tpm-v2.c @@ -0,0 +1,389 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2018 Bootlin + * Author: Miquel Raynal <miquel.raynal@bootlin.com> + */ + +#include <common.h> +#include <dm.h> +#include <log.h> +#include <mapmem.h> +#include <tpm-common.h> +#include <tpm-v2.h> +#include "tpm-user-utils.h" + +static int do_tpm2_startup(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + enum tpm2_startup_types mode; + + if (argc != 2) + return CMD_RET_USAGE; + + if (!strcasecmp("TPM2_SU_CLEAR", argv[1])) { + mode = TPM2_SU_CLEAR; + } else if (!strcasecmp("TPM2_SU_STATE", argv[1])) { + mode = TPM2_SU_STATE; + } else { + printf("Couldn't recognize mode string: %s\n", argv[1]); + return CMD_RET_FAILURE; + } + + return report_return_code(tpm2_startup(mode)); +} + +static int do_tpm2_self_test(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + enum tpm2_yes_no full_test; + + if (argc != 2) + return CMD_RET_USAGE; + + if (!strcasecmp("full", argv[1])) { + full_test = TPMI_YES; + } else if (!strcasecmp("continue", argv[1])) { + full_test = TPMI_NO; + } else { + printf("Couldn't recognize test mode: %s\n", argv[1]); + return CMD_RET_FAILURE; + } + + return report_return_code(tpm2_self_test(full_test)); +} + +static int do_tpm2_clear(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + u32 handle = 0; + const char *pw = (argc < 3) ? NULL : argv[2]; + const ssize_t pw_sz = pw ? strlen(pw) : 0; + + if (argc < 2 || argc > 3) + return CMD_RET_USAGE; + + if (pw_sz > TPM2_DIGEST_LEN) + return -EINVAL; + + if (!strcasecmp("TPM2_RH_LOCKOUT", argv[1])) + handle = TPM2_RH_LOCKOUT; + else if (!strcasecmp("TPM2_RH_PLATFORM", argv[1])) + handle = TPM2_RH_PLATFORM; + else + return CMD_RET_USAGE; + + return report_return_code(tpm2_clear(handle, pw, pw_sz)); +} + +static int do_tpm2_pcr_extend(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + struct udevice *dev; + struct tpm_chip_priv *priv; + u32 index = simple_strtoul(argv[1], NULL, 0); + void *digest = map_sysmem(simple_strtoul(argv[2], NULL, 0), 0); + int ret; + u32 rc; + + if (argc != 3) + return CMD_RET_USAGE; + + ret = uclass_first_device_err(UCLASS_TPM, &dev); + if (ret) + return ret; + + priv = dev_get_uclass_priv(dev); + if (!priv) + return -EINVAL; + + if (index >= priv->pcr_count) + return -EINVAL; + + rc = tpm2_pcr_extend(index, digest); + + unmap_sysmem(digest); + + return report_return_code(rc); +} + +static int do_tpm_pcr_read(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + struct udevice *dev; + struct tpm_chip_priv *priv; + u32 index, rc; + unsigned int updates; + void *data; + int ret; + + if (argc != 3) + return CMD_RET_USAGE; + + ret = uclass_first_device_err(UCLASS_TPM, &dev); + if (ret) + return ret; + + priv = dev_get_uclass_priv(dev); + if (!priv) + return -EINVAL; + + index = simple_strtoul(argv[1], NULL, 0); + if (index >= priv->pcr_count) + return -EINVAL; + + data = map_sysmem(simple_strtoul(argv[2], NULL, 0), 0); + + rc = tpm2_pcr_read(index, priv->pcr_select_min, data, &updates); + if (!rc) { + printf("PCR #%u content (%d known updates):\n", index, updates); + print_byte_string(data, TPM2_DIGEST_LEN); + } + + unmap_sysmem(data); + + return report_return_code(rc); +} + +static int do_tpm_get_capability(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + u32 capability, property, rc; + u8 *data; + size_t count; + int i, j; + + if (argc != 5) + return CMD_RET_USAGE; + + capability = simple_strtoul(argv[1], NULL, 0); + property = simple_strtoul(argv[2], NULL, 0); + data = map_sysmem(simple_strtoul(argv[3], NULL, 0), 0); + count = simple_strtoul(argv[4], NULL, 0); + + rc = tpm2_get_capability(capability, property, data, count); + if (rc) + goto unmap_data; + + printf("Capabilities read from TPM:\n"); + for (i = 0; i < count; i++) { + printf("Property 0x"); + for (j = 0; j < 4; j++) + printf("%02x", data[(i * 8) + j]); + printf(": 0x"); + for (j = 4; j < 8; j++) + printf("%02x", data[(i * 8) + j]); + printf("\n"); + } + +unmap_data: + unmap_sysmem(data); + + return report_return_code(rc); +} + +static int do_tpm_dam_reset(cmd_tbl_t *cmdtp, int flag, int argc, + char *const argv[]) +{ + const char *pw = (argc < 2) ? NULL : argv[1]; + const ssize_t pw_sz = pw ? strlen(pw) : 0; + + if (argc > 2) + return CMD_RET_USAGE; + + if (pw_sz > TPM2_DIGEST_LEN) + return -EINVAL; + + return report_return_code(tpm2_dam_reset(pw, pw_sz)); +} + +static int do_tpm_dam_parameters(cmd_tbl_t *cmdtp, int flag, int argc, + char *const argv[]) +{ + const char *pw = (argc < 5) ? NULL : argv[4]; + const ssize_t pw_sz = pw ? strlen(pw) : 0; + /* + * No Dictionary Attack Mitigation (DAM) means: + * maxtries = 0xFFFFFFFF, recovery_time = 1, lockout_recovery = 0 + */ + unsigned long int max_tries; + unsigned long int recovery_time; + unsigned long int lockout_recovery; + + if (argc < 4 || argc > 5) + return CMD_RET_USAGE; + + if (pw_sz > TPM2_DIGEST_LEN) + return -EINVAL; + + if (strict_strtoul(argv[1], 0, &max_tries)) + return CMD_RET_USAGE; + + if (strict_strtoul(argv[2], 0, &recovery_time)) + return CMD_RET_USAGE; + + if (strict_strtoul(argv[3], 0, &lockout_recovery)) + return CMD_RET_USAGE; + + log(LOGC_NONE, LOGL_INFO, "Changing dictionary attack parameters:\n"); + log(LOGC_NONE, LOGL_INFO, "- maxTries: %lu", max_tries); + log(LOGC_NONE, LOGL_INFO, "- recoveryTime: %lu\n", recovery_time); + log(LOGC_NONE, LOGL_INFO, "- lockoutRecovery: %lu\n", lockout_recovery); + + return report_return_code(tpm2_dam_parameters(pw, pw_sz, max_tries, + recovery_time, + lockout_recovery)); +} + +static int do_tpm_change_auth(cmd_tbl_t *cmdtp, int flag, int argc, + char *const argv[]) +{ + u32 handle; + const char *newpw = argv[2]; + const char *oldpw = (argc == 3) ? NULL : argv[3]; + const ssize_t newpw_sz = strlen(newpw); + const ssize_t oldpw_sz = oldpw ? strlen(oldpw) : 0; + + if (argc < 3 || argc > 4) + return CMD_RET_USAGE; + + if (newpw_sz > TPM2_DIGEST_LEN || oldpw_sz > TPM2_DIGEST_LEN) + return -EINVAL; + + if (!strcasecmp("TPM2_RH_LOCKOUT", argv[1])) + handle = TPM2_RH_LOCKOUT; + else if (!strcasecmp("TPM2_RH_ENDORSEMENT", argv[1])) + handle = TPM2_RH_ENDORSEMENT; + else if (!strcasecmp("TPM2_RH_OWNER", argv[1])) + handle = TPM2_RH_OWNER; + else if (!strcasecmp("TPM2_RH_PLATFORM", argv[1])) + handle = TPM2_RH_PLATFORM; + else + return CMD_RET_USAGE; + + return report_return_code(tpm2_change_auth(handle, newpw, newpw_sz, + oldpw, oldpw_sz)); +} + +static int do_tpm_pcr_setauthpolicy(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + u32 index = simple_strtoul(argv[1], NULL, 0); + char *key = argv[2]; + const char *pw = (argc < 4) ? NULL : argv[3]; + const ssize_t pw_sz = pw ? strlen(pw) : 0; + + if (strlen(key) != TPM2_DIGEST_LEN) + return -EINVAL; + + if (argc < 3 || argc > 4) + return CMD_RET_USAGE; + + return report_return_code(tpm2_pcr_setauthpolicy(pw, pw_sz, index, + key)); +} + +static int do_tpm_pcr_setauthvalue(cmd_tbl_t *cmdtp, int flag, + int argc, char * const argv[]) +{ + u32 index = simple_strtoul(argv[1], NULL, 0); + char *key = argv[2]; + const ssize_t key_sz = strlen(key); + const char *pw = (argc < 4) ? NULL : argv[3]; + const ssize_t pw_sz = pw ? strlen(pw) : 0; + + if (strlen(key) != TPM2_DIGEST_LEN) + return -EINVAL; + + if (argc < 3 || argc > 4) + return CMD_RET_USAGE; + + return report_return_code(tpm2_pcr_setauthvalue(pw, pw_sz, index, + key, key_sz)); +} + +static cmd_tbl_t tpm2_commands[] = { + U_BOOT_CMD_MKENT(info, 0, 1, do_tpm_info, "", ""), + U_BOOT_CMD_MKENT(init, 0, 1, do_tpm_init, "", ""), + U_BOOT_CMD_MKENT(startup, 0, 1, do_tpm2_startup, "", ""), + U_BOOT_CMD_MKENT(self_test, 0, 1, do_tpm2_self_test, "", ""), + U_BOOT_CMD_MKENT(clear, 0, 1, do_tpm2_clear, "", ""), + U_BOOT_CMD_MKENT(pcr_extend, 0, 1, do_tpm2_pcr_extend, "", ""), + U_BOOT_CMD_MKENT(pcr_read, 0, 1, do_tpm_pcr_read, "", ""), + U_BOOT_CMD_MKENT(get_capability, 0, 1, do_tpm_get_capability, "", ""), + U_BOOT_CMD_MKENT(dam_reset, 0, 1, do_tpm_dam_reset, "", ""), + U_BOOT_CMD_MKENT(dam_parameters, 0, 1, do_tpm_dam_parameters, "", ""), + U_BOOT_CMD_MKENT(change_auth, 0, 1, do_tpm_change_auth, "", ""), + U_BOOT_CMD_MKENT(pcr_setauthpolicy, 0, 1, + do_tpm_pcr_setauthpolicy, "", ""), + U_BOOT_CMD_MKENT(pcr_setauthvalue, 0, 1, + do_tpm_pcr_setauthvalue, "", ""), +}; + +cmd_tbl_t *get_tpm_commands(unsigned int *size) +{ + *size = ARRAY_SIZE(tpm2_commands); + + return tpm2_commands; +} + +U_BOOT_CMD(tpm, CONFIG_SYS_MAXARGS, 1, do_tpm, "Issue a TPMv2.x command", +"<command> [<arguments>]\n" +"\n" +"info\n" +" Show information about the TPM.\n" +"init\n" +" Initialize the software stack. Always the first command to issue.\n" +"startup <mode>\n" +" Issue a TPM2_Startup command.\n" +" <mode> is one of:\n" +" * TPM2_SU_CLEAR (reset state)\n" +" * TPM2_SU_STATE (preserved state)\n" +"self_test <type>\n" +" Test the TPM capabilities.\n" +" <type> is one of:\n" +" * full (perform all tests)\n" +" * continue (only check untested tests)\n" +"clear <hierarchy>\n" +" Issue a TPM2_Clear command.\n" +" <hierarchy> is one of:\n" +" * TPM2_RH_LOCKOUT\n" +" * TPM2_RH_PLATFORM\n" +"pcr_extend <pcr> <digest_addr>\n" +" Extend PCR #<pcr> with digest at <digest_addr>.\n" +" <pcr>: index of the PCR\n" +" <digest_addr>: address of a 32-byte SHA256 digest\n" +"pcr_read <pcr> <digest_addr>\n" +" Read PCR #<pcr> to memory address <digest_addr>.\n" +" <pcr>: index of the PCR\n" +" <digest_addr>: address to store the a 32-byte SHA256 digest\n" +"get_capability <capability> <property> <addr> <count>\n" +" Read and display <count> entries indexed by <capability>/<property>.\n" +" Values are 4 bytes long and are written at <addr>.\n" +" <capability>: capability\n" +" <property>: property\n" +" <addr>: address to store <count> entries of 4 bytes\n" +" <count>: number of entries to retrieve\n" +"dam_reset [<password>]\n" +" If the TPM is not in a LOCKOUT state, reset the internal error counter.\n" +" <password>: optional password\n" +"dam_parameters <max_tries> <recovery_time> <lockout_recovery> [<password>]\n" +" If the TPM is not in a LOCKOUT state, set the DAM parameters\n" +" <maxTries>: maximum number of failures before lockout,\n" +" 0 means always locking\n" +" <recoveryTime>: time before decrement of the error counter,\n" +" 0 means no lockout\n" +" <lockoutRecovery>: time of a lockout (before the next try),\n" +" 0 means a reboot is needed\n" +" <password>: optional password of the LOCKOUT hierarchy\n" +"change_auth <hierarchy> <new_pw> [<old_pw>]\n" +" <hierarchy>: the hierarchy\n" +" <new_pw>: new password for <hierarchy>\n" +" <old_pw>: optional previous password of <hierarchy>\n" +"pcr_setauthpolicy|pcr_setauthvalue <pcr> <key> [<password>]\n" +" Change the <key> to access PCR #<pcr>.\n" +" hierarchy and may be empty.\n" +" /!\\WARNING: untested function, use at your own risks !\n" +" <pcr>: index of the PCR\n" +" <key>: secret to protect the access of PCR #<pcr>\n" +" <password>: optional password of the PLATFORM hierarchy\n" +); diff --git a/cmd/tpm_test.c b/cmd/tpm_test.c index 2e7d133a47e..35f3c96e3de 100644 --- a/cmd/tpm_test.c +++ b/cmd/tpm_test.c @@ -6,7 +6,7 @@ #include <common.h> #include <command.h> #include <environment.h> -#include <tpm.h> +#include <tpm-v1.h> /* Prints error and returns on failure */ #define TPM_CHECK(tpm_command) do { \ diff --git a/common/Makefile b/common/Makefile index d0681c7dd96..b3da72ebb2c 100644 --- a/common/Makefile +++ b/common/Makefile @@ -29,7 +29,6 @@ obj-$(CONFIG_CMD_BOOTI) += bootm.o bootm_os.o obj-$(CONFIG_CMD_BEDBUG) += bedbug.o obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += fdt_support.o - obj-$(CONFIG_MII) += miiphyutil.o obj-$(CONFIG_CMD_MII) += miiphyutil.o obj-$(CONFIG_PHYLIB) += miiphyutil.o @@ -109,19 +108,6 @@ obj-$(CONFIG_IO_TRACE) += iotrace.o obj-y += memsize.o obj-y += stdio.o -ifndef CONFIG_SPL_BUILD -# This option is not just y/n - it can have a numeric value -ifdef CONFIG_FASTBOOT_FLASH -obj-y += image-sparse.o -ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV -obj-y += fb_mmc.o -endif -ifdef CONFIG_FASTBOOT_FLASH_NAND_DEV -obj-y += fb_nand.o -endif -endif -endif - ifdef CONFIG_CMD_EEPROM_LAYOUT obj-y += eeprom/eeprom_field.o eeprom/eeprom_layout.o endif diff --git a/common/board_f.c b/common/board_f.c index fa667c764bc..e943347ce3d 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -394,19 +394,21 @@ static int reserve_trace(void) static int reserve_uboot(void) { - /* - * reserve memory for U-Boot code, data & bss - * round down to next 4 kB limit - */ - gd->relocaddr -= gd->mon_len; - gd->relocaddr &= ~(4096 - 1); -#if defined(CONFIG_E500) || defined(CONFIG_MIPS) - /* round down to next 64 kB limit so that IVPR stays aligned */ - gd->relocaddr &= ~(65536 - 1); -#endif - - debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10, - gd->relocaddr); + if (!(gd->flags & GD_FLG_SKIP_RELOC)) { + /* + * reserve memory for U-Boot code, data & bss + * round down to next 4 kB limit + */ + gd->relocaddr -= gd->mon_len; + gd->relocaddr &= ~(4096 - 1); + #if defined(CONFIG_E500) || defined(CONFIG_MIPS) + /* round down to next 64 kB limit so that IVPR stays aligned */ + gd->relocaddr &= ~(65536 - 1); + #endif + + debug("Reserving %ldk for U-Boot at: %08lx\n", + gd->mon_len >> 10, gd->relocaddr); + } gd->start_addr_sp = gd->relocaddr; diff --git a/common/bootm.c b/common/bootm.c index a0ffc1cd679..e789f6818aa 100644 --- a/common/bootm.c +++ b/common/bootm.c @@ -46,6 +46,10 @@ static const void *boot_get_kernel(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[], bootm_headers_t *images, ulong *os_data, ulong *os_len); +__weak void board_quiesce_devices(void) +{ +} + #ifdef CONFIG_LMB static void boot_start_lmb(bootm_headers_t *images) { diff --git a/common/dlmalloc.c b/common/dlmalloc.c index b395eefbf86..edaad299bbb 100644 --- a/common/dlmalloc.c +++ b/common/dlmalloc.c @@ -1891,6 +1891,13 @@ Void_t* mEMALIGn(alignment, bytes) size_t alignment; size_t bytes; if ((long)bytes < 0) return NULL; +#if CONFIG_VAL(SYS_MALLOC_F_LEN) + if (!(gd->flags & GD_FLG_FULL_MALLOC_INIT)) { + nb = roundup(bytes, alignment); + return malloc_simple(nb); + } +#endif + /* If need less alignment than we give anyway, just relay to malloc */ if (alignment <= MALLOC_ALIGNMENT) return mALLOc(bytes); diff --git a/common/image-fit.c b/common/image-fit.c index 5b93dceae15..728187ac883 100644 --- a/common/image-fit.c +++ b/common/image-fit.c @@ -142,7 +142,186 @@ int fit_get_subimage_count(const void *fit, int images_noffset) return count; } -#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_FIT_SPL_PRINT) +#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_FIT_PRINT) +/** + * fit_image_print_data() - prints out the hash node details + * @fit: pointer to the FIT format image header + * @noffset: offset of the hash node + * @p: pointer to prefix string + * @type: Type of information to print ("hash" or "sign") + * + * fit_image_print_data() lists properties for the processed hash node + * + * This function avoid using puts() since it prints a newline on the host + * but does not in U-Boot. + * + * returns: + * no returned results + */ +static void fit_image_print_data(const void *fit, int noffset, const char *p, + const char *type) +{ + const char *keyname; + uint8_t *value; + int value_len; + char *algo; + int required; + int ret, i; + + debug("%s %s node: '%s'\n", p, type, + fit_get_name(fit, noffset, NULL)); + printf("%s %s algo: ", p, type); + if (fit_image_hash_get_algo(fit, noffset, &algo)) { + printf("invalid/unsupported\n"); + return; + } + printf("%s", algo); + keyname = fdt_getprop(fit, noffset, "key-name-hint", NULL); + required = fdt_getprop(fit, noffset, "required", NULL) != NULL; + if (keyname) + printf(":%s", keyname); + if (required) + printf(" (required)"); + printf("\n"); + + ret = fit_image_hash_get_value(fit, noffset, &value, + &value_len); + printf("%s %s value: ", p, type); + if (ret) { + printf("unavailable\n"); + } else { + for (i = 0; i < value_len; i++) + printf("%02x", value[i]); + printf("\n"); + } + + debug("%s %s len: %d\n", p, type, value_len); + + /* Signatures have a time stamp */ + if (IMAGE_ENABLE_TIMESTAMP && keyname) { + time_t timestamp; + + printf("%s Timestamp: ", p); + if (fit_get_timestamp(fit, noffset, ×tamp)) + printf("unavailable\n"); + else + genimg_print_time(timestamp); + } +} + +/** + * fit_image_print_verification_data() - prints out the hash/signature details + * @fit: pointer to the FIT format image header + * @noffset: offset of the hash or signature node + * @p: pointer to prefix string + * + * This lists properties for the processed hash node + * + * returns: + * no returned results + */ +static void fit_image_print_verification_data(const void *fit, int noffset, + const char *p) +{ + const char *name; + + /* + * Check subnode name, must be equal to "hash" or "signature". + * Multiple hash/signature nodes require unique unit node + * names, e.g. hash-1, hash-2, signature-1, signature-2, etc. + */ + name = fit_get_name(fit, noffset, NULL); + if (!strncmp(name, FIT_HASH_NODENAME, strlen(FIT_HASH_NODENAME))) { + fit_image_print_data(fit, noffset, p, "Hash"); + } else if (!strncmp(name, FIT_SIG_NODENAME, + strlen(FIT_SIG_NODENAME))) { + fit_image_print_data(fit, noffset, p, "Sign"); + } +} + +/** + * fit_conf_print - prints out the FIT configuration details + * @fit: pointer to the FIT format image header + * @noffset: offset of the configuration node + * @p: pointer to prefix string + * + * fit_conf_print() lists all mandatory properties for the processed + * configuration node. + * + * returns: + * no returned results + */ +static void fit_conf_print(const void *fit, int noffset, const char *p) +{ + char *desc; + const char *uname; + int ret; + int fdt_index, loadables_index; + int ndepth; + + /* Mandatory properties */ + ret = fit_get_desc(fit, noffset, &desc); + printf("%s Description: ", p); + if (ret) + printf("unavailable\n"); + else + printf("%s\n", desc); + + uname = fdt_getprop(fit, noffset, FIT_KERNEL_PROP, NULL); + printf("%s Kernel: ", p); + if (!uname) + printf("unavailable\n"); + else + printf("%s\n", uname); + + /* Optional properties */ + uname = fdt_getprop(fit, noffset, FIT_RAMDISK_PROP, NULL); + if (uname) + printf("%s Init Ramdisk: %s\n", p, uname); + + uname = fdt_getprop(fit, noffset, FIT_FIRMWARE_PROP, NULL); + if (uname) + printf("%s Firmware: %s\n", p, uname); + + for (fdt_index = 0; + uname = fdt_stringlist_get(fit, noffset, FIT_FDT_PROP, + fdt_index, NULL), uname; + fdt_index++) { + if (fdt_index == 0) + printf("%s FDT: ", p); + else + printf("%s ", p); + printf("%s\n", uname); + } + + uname = fdt_getprop(fit, noffset, FIT_FPGA_PROP, NULL); + if (uname) + printf("%s FPGA: %s\n", p, uname); + + /* Print out all of the specified loadables */ + for (loadables_index = 0; + uname = fdt_stringlist_get(fit, noffset, FIT_LOADABLE_PROP, + loadables_index, NULL), uname; + loadables_index++) { + if (loadables_index == 0) { + printf("%s Loadables: ", p); + } else { + printf("%s ", p); + } + printf("%s\n", uname); + } + + /* Process all hash subnodes of the component configuration node */ + for (ndepth = 0, noffset = fdt_next_node(fit, noffset, &ndepth); + (noffset >= 0) && (ndepth > 0); + noffset = fdt_next_node(fit, noffset, &ndepth)) { + if (ndepth == 1) { + /* Direct child node of the component configuration node */ + fit_image_print_verification_data(fit, noffset, p); + } + } +} + /** * fit_print_contents - prints out the contents of the FIT format image * @fit: pointer to the FIT format image header @@ -245,102 +424,6 @@ void fit_print_contents(const void *fit) } /** - * fit_image_print_data() - prints out the hash node details - * @fit: pointer to the FIT format image header - * @noffset: offset of the hash node - * @p: pointer to prefix string - * @type: Type of information to print ("hash" or "sign") - * - * fit_image_print_data() lists properties for the processed hash node - * - * This function avoid using puts() since it prints a newline on the host - * but does not in U-Boot. - * - * returns: - * no returned results - */ -static void fit_image_print_data(const void *fit, int noffset, const char *p, - const char *type) -{ - const char *keyname; - uint8_t *value; - int value_len; - char *algo; - int required; - int ret, i; - - debug("%s %s node: '%s'\n", p, type, - fit_get_name(fit, noffset, NULL)); - printf("%s %s algo: ", p, type); - if (fit_image_hash_get_algo(fit, noffset, &algo)) { - printf("invalid/unsupported\n"); - return; - } - printf("%s", algo); - keyname = fdt_getprop(fit, noffset, "key-name-hint", NULL); - required = fdt_getprop(fit, noffset, "required", NULL) != NULL; - if (keyname) - printf(":%s", keyname); - if (required) - printf(" (required)"); - printf("\n"); - - ret = fit_image_hash_get_value(fit, noffset, &value, - &value_len); - printf("%s %s value: ", p, type); - if (ret) { - printf("unavailable\n"); - } else { - for (i = 0; i < value_len; i++) - printf("%02x", value[i]); - printf("\n"); - } - - debug("%s %s len: %d\n", p, type, value_len); - - /* Signatures have a time stamp */ - if (IMAGE_ENABLE_TIMESTAMP && keyname) { - time_t timestamp; - - printf("%s Timestamp: ", p); - if (fit_get_timestamp(fit, noffset, ×tamp)) - printf("unavailable\n"); - else - genimg_print_time(timestamp); - } -} - -/** - * fit_image_print_verification_data() - prints out the hash/signature details - * @fit: pointer to the FIT format image header - * @noffset: offset of the hash or signature node - * @p: pointer to prefix string - * - * This lists properties for the processed hash node - * - * returns: - * no returned results - */ -static void fit_image_print_verification_data(const void *fit, int noffset, - const char *p) -{ - const char *name; - - /* - * Check subnode name, must be equal to "hash" or "signature". - * Multiple hash/signature nodes require unique unit node - * names, e.g. hash-1, hash-2, signature-1, signature-2, etc. - */ - name = fit_get_name(fit, noffset, NULL); - if (!strncmp(name, FIT_HASH_NODENAME, strlen(FIT_HASH_NODENAME))) { - fit_image_print_data(fit, noffset, p, "Hash"); - } else if (!strncmp(name, FIT_SIG_NODENAME, - strlen(FIT_SIG_NODENAME))) { - fit_image_print_data(fit, noffset, p, "Sign"); - } -} - -/** * fit_image_print - prints out the FIT component image details * @fit: pointer to the FIT format image header * @image_noffset: offset of the component image node @@ -391,7 +474,7 @@ void fit_image_print(const void *fit, int image_noffset, const char *p) fit_image_get_comp(fit, image_noffset, &comp); printf("%s Compression: %s\n", p, genimg_get_comp_name(comp)); - ret = fit_image_get_data(fit, image_noffset, &data, &size); + ret = fit_image_get_data_and_size(fit, image_noffset, &data, &size); #ifndef USE_HOSTCC printf("%s Data Start: ", p); @@ -459,8 +542,10 @@ void fit_image_print(const void *fit, int image_noffset, const char *p) } } } - -#endif /* !defined(CONFIG_SPL_BUILD) || defined(CONFIG_FIT_SPL_PRINT) */ +#else +void fit_print_contents(const void *fit) { } +void fit_image_print(const void *fit, int image_noffset, const char *p) { } +#endif /* !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_FIT_PRINT) */ /** * fit_get_desc - get node description property @@ -856,6 +941,54 @@ int fit_image_get_data_size(const void *fit, int noffset, int *data_size) } /** + * fit_image_get_data_and_size - get data and its size including + * both embedded and external data + * @fit: pointer to the FIT format image header + * @noffset: component image node offset + * @data: double pointer to void, will hold data property's data address + * @size: pointer to size_t, will hold data property's data size + * + * fit_image_get_data_and_size() finds data and its size including + * both embedded and external data. If the property is found + * its data start address and size are returned to the caller. + * + * returns: + * 0, on success + * otherwise, on failure + */ +int fit_image_get_data_and_size(const void *fit, int noffset, + const void **data, size_t *size) +{ + bool external_data = false; + int offset; + int len; + int ret; + + if (!fit_image_get_data_position(fit, noffset, &offset)) { + external_data = true; + } else if (!fit_image_get_data_offset(fit, noffset, &offset)) { + external_data = true; + /* + * For FIT with external data, figure out where + * the external images start. This is the base + * for the data-offset properties in each image. + */ + offset += ((fdt_totalsize(fit) + 3) & ~3); + } + + if (external_data) { + debug("External Data\n"); + ret = fit_image_get_data_size(fit, noffset, &len); + *data = fit + offset; + *size = len; + } else { + ret = fit_image_get_data(fit, noffset, data, size); + } + + return ret; +} + +/** * fit_image_hash_get_algo - get hash algorithm name * @fit: pointer to the FIT format image header * @noffset: hash node offset @@ -1153,7 +1286,7 @@ int fit_image_verify(const void *fit, int image_noffset) char *err_msg = ""; /* Get image data and data length */ - if (fit_image_get_data(fit, image_noffset, &data, &size)) { + if (fit_image_get_data_and_size(fit, image_noffset, &data, &size)) { err_msg = "Can't get image data/size"; printf("error!\n%s for '%s' hash node in '%s' image node\n", err_msg, fit_get_name(fit, noffset, NULL), @@ -1571,92 +1704,6 @@ int fit_conf_get_prop_node(const void *fit, int noffset, return fit_conf_get_prop_node_index(fit, noffset, prop_name, 0); } -#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_FIT_SPL_PRINT) -/** - * fit_conf_print - prints out the FIT configuration details - * @fit: pointer to the FIT format image header - * @noffset: offset of the configuration node - * @p: pointer to prefix string - * - * fit_conf_print() lists all mandatory properties for the processed - * configuration node. - * - * returns: - * no returned results - */ -void fit_conf_print(const void *fit, int noffset, const char *p) -{ - char *desc; - const char *uname; - int ret; - int fdt_index, loadables_index; - int ndepth; - - /* Mandatory properties */ - ret = fit_get_desc(fit, noffset, &desc); - printf("%s Description: ", p); - if (ret) - printf("unavailable\n"); - else - printf("%s\n", desc); - - uname = fdt_getprop(fit, noffset, FIT_KERNEL_PROP, NULL); - printf("%s Kernel: ", p); - if (uname == NULL) - printf("unavailable\n"); - else - printf("%s\n", uname); - - /* Optional properties */ - uname = fdt_getprop(fit, noffset, FIT_RAMDISK_PROP, NULL); - if (uname) - printf("%s Init Ramdisk: %s\n", p, uname); - - uname = fdt_getprop(fit, noffset, FIT_FIRMWARE_PROP, NULL); - if (uname) - printf("%s Firmware: %s\n", p, uname); - - for (fdt_index = 0; - uname = fdt_stringlist_get(fit, noffset, FIT_FDT_PROP, - fdt_index, NULL), uname; - fdt_index++) { - - if (fdt_index == 0) - printf("%s FDT: ", p); - else - printf("%s ", p); - printf("%s\n", uname); - } - - uname = fdt_getprop(fit, noffset, FIT_FPGA_PROP, NULL); - if (uname) - printf("%s FPGA: %s\n", p, uname); - - /* Print out all of the specified loadables */ - for (loadables_index = 0; - uname = fdt_stringlist_get(fit, noffset, FIT_LOADABLE_PROP, - loadables_index, NULL), uname; - loadables_index++) { - if (loadables_index == 0) { - printf("%s Loadables: ", p); - } else { - printf("%s ", p); - } - printf("%s\n", uname); - } - - /* Process all hash subnodes of the component configuration node */ - for (ndepth = 0, noffset = fdt_next_node(fit, noffset, &ndepth); - (noffset >= 0) && (ndepth > 0); - noffset = fdt_next_node(fit, noffset, &ndepth)) { - if (ndepth == 1) { - /* Direct child node of the component configuration node */ - fit_image_print_verification_data(fit, noffset, p); - } - } -} -#endif /* !defined(CONFIG_SPL_BUILD) || defined(CONFIG_FIT_SPL_PRINT) */ - static int fit_image_select(const void *fit, int rd_noffset, int verify) { fit_image_print(fit, rd_noffset, " "); @@ -1726,6 +1773,8 @@ static const char *fit_get_image_type_property(int type) return FIT_LOADABLE_PROP; case IH_TYPE_FPGA: return FIT_FPGA_PROP; + case IH_TYPE_STANDALONE: + return FIT_STANDALONE_PROP; } return "unknown"; @@ -1875,7 +1924,7 @@ int fit_image_load(bootm_headers_t *images, ulong addr, bootstage_mark(bootstage_id + BOOTSTAGE_SUB_CHECK_ALL_OK); /* get image data address and length */ - if (fit_image_get_data(fit, noffset, &buf, &size)) { + if (fit_image_get_data_and_size(fit, noffset, &buf, &size)) { printf("Could not find %s subimage data!\n", prop_name); bootstage_error(bootstage_id + BOOTSTAGE_SUB_GET_DATA); return -ENOENT; diff --git a/common/menu.c b/common/menu.c index bf2b471ff87..0f0a29ac2ee 100644 --- a/common/menu.c +++ b/common/menu.c @@ -194,8 +194,7 @@ static inline int menu_interactive_choice(struct menu *m, void **choice) if (!m->item_choice) { readret = cli_readline_into_buffer("Enter choice: ", - cbuf, - m->timeout / 10); + cbuf, m->timeout); if (readret >= 0) { choice_item = menu_item_by_key(m, cbuf); diff --git a/common/spl/spl.c b/common/spl/spl.c index 6606417ff74..a09ada37d72 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -145,9 +145,84 @@ void spl_set_header_raw_uboot(struct spl_image_info *spl_image) spl_image->name = "U-Boot"; } +#ifdef CONFIG_SPL_LOAD_FIT_FULL +/* Parse and load full fitImage in SPL */ +static int spl_load_fit_image(struct spl_image_info *spl_image, + const struct image_header *header) +{ + bootm_headers_t images; + const char *fit_uname_config = NULL; + const char *fit_uname_fdt = FIT_FDT_PROP; + const char *uname; + ulong fw_data = 0, dt_data = 0, img_data = 0; + ulong fw_len = 0, dt_len = 0, img_len = 0; + int idx, conf_noffset; + int ret; + +#ifdef CONFIG_SPL_FIT_SIGNATURE + images.verify = 1; +#endif + ret = fit_image_load(&images, (ulong)header, + NULL, &fit_uname_config, + IH_ARCH_DEFAULT, IH_TYPE_STANDALONE, -1, + FIT_LOAD_REQUIRED, &fw_data, &fw_len); + if (ret < 0) + return ret; + + spl_image->size = fw_len; + spl_image->entry_point = fw_data; + spl_image->load_addr = fw_data; + spl_image->os = IH_OS_U_BOOT; + spl_image->name = "U-Boot"; + + debug("spl: payload image: %.*s load addr: 0x%lx size: %d\n", + (int)sizeof(spl_image->name), spl_image->name, + spl_image->load_addr, spl_image->size); + +#ifdef CONFIG_SPL_FIT_SIGNATURE + images.verify = 1; +#endif + fit_image_load(&images, (ulong)header, + &fit_uname_fdt, &fit_uname_config, + IH_ARCH_DEFAULT, IH_TYPE_FLATDT, -1, + FIT_LOAD_OPTIONAL, &dt_data, &dt_len); + + conf_noffset = fit_conf_get_node((const void *)header, + fit_uname_config); + if (conf_noffset <= 0) + return 0; + + for (idx = 0; + uname = fdt_stringlist_get((const void *)header, conf_noffset, + FIT_LOADABLE_PROP, idx, + NULL), uname; + idx++) + { +#ifdef CONFIG_SPL_FIT_SIGNATURE + images.verify = 1; +#endif + ret = fit_image_load(&images, (ulong)header, + &uname, &fit_uname_config, + IH_ARCH_DEFAULT, IH_TYPE_LOADABLE, -1, + FIT_LOAD_OPTIONAL_NON_ZERO, + &img_data, &img_len); + if (ret < 0) + return ret; + } + + return 0; +} +#endif + int spl_parse_image_header(struct spl_image_info *spl_image, const struct image_header *header) { +#ifdef CONFIG_SPL_LOAD_FIT_FULL + int ret = spl_load_fit_image(spl_image, header); + + if (!ret) + return ret; +#endif if (image_get_magic(header) == IH_MAGIC) { #ifdef CONFIG_SPL_LEGACY_IMAGE_SUPPORT u32 header_size = sizeof(struct image_header); diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c index 8b5befcec2b..2321ebb0dde 100644 --- a/common/spl/spl_fit.c +++ b/common/spl/spl_fit.c @@ -140,6 +140,14 @@ static int get_aligned_image_size(struct spl_load_info *info, int data_size, return (data_size + info->bl_len - 1) / info->bl_len; } +#ifdef CONFIG_SPL_FPGA_SUPPORT +__weak int spl_load_fpga_image(struct spl_load_info *info, size_t length, + int nr_sectors, int sector_offset) +{ + return 0; +} +#endif + /** * spl_load_fit_image(): load the image described in a certain FIT node * @info: points to information about the device to load data from @@ -161,7 +169,7 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector, void *fit, ulong base_offset, int node, struct spl_image_info *image_info) { - int offset; + int offset, sector_offset; size_t length; int len; ulong size; @@ -209,9 +217,16 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector, overhead = get_aligned_image_overhead(info, offset); nr_sectors = get_aligned_image_size(info, length, offset); + sector_offset = sector + get_aligned_image_offset(info, offset); - if (info->read(info, - sector + get_aligned_image_offset(info, offset), +#ifdef CONFIG_SPL_FPGA_SUPPORT + if (type == IH_TYPE_FPGA) { + return spl_load_fpga_image(info, length, nr_sectors, + sector_offset); + } +#endif + + if (info->read(info, sector_offset, nr_sectors, (void *)load_ptr) != nr_sectors) return -EIO; @@ -387,6 +402,20 @@ int spl_load_simple_fit(struct spl_image_info *spl_image, return -1; } +#ifdef CONFIG_SPL_FPGA_SUPPORT + node = spl_fit_get_image_node(fit, images, "fpga", 0); + if (node >= 0) { + /* Load the image and set up the spl_image structure */ + ret = spl_load_fit_image(info, sector, fit, base_offset, node, + spl_image); + if (ret) { + printf("%s: Cannot load the FPGA: %i\n", __func__, ret); + return ret; + } + node = -1; + } +#endif + /* * Find the U-Boot image using the following search order: * - start at 'firmware' (e.g. an ARM Trusted Firmware) diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig index 8e160d7cc4a..b8ec1e54dbc 100644 --- a/configs/A13-OLinuXino_defconfig +++ b/configs/A13-OLinuXino_defconfig @@ -22,6 +22,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_DFU_RAM=y +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_AXP_ALDO3_VOLT=3300 CONFIG_CONS_INDEX=2 CONFIG_USB_EHCI_HCD=y diff --git a/configs/A20-OLinuXino-Lime2-eMMC_defconfig b/configs/A20-OLinuXino-Lime2-eMMC_defconfig index 9d043e856a4..5657fc2594c 100644 --- a/configs/A20-OLinuXino-Lime2-eMMC_defconfig +++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig @@ -20,6 +20,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_SCSI_AHCI=y CONFIG_DFU_RAM=y +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y CONFIG_SUN7I_GMAC=y diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig index f2997c6fe54..134d1d3fef6 100644 --- a/configs/A20-OLinuXino-Lime2_defconfig +++ b/configs/A20-OLinuXino-Lime2_defconfig @@ -19,6 +19,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_SCSI_AHCI=y CONFIG_DFU_RAM=y +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y CONFIG_SUN7I_GMAC=y diff --git a/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig b/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig index 847945b6490..3bb8c4c7e66 100644 --- a/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig +++ b/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_I2C_SUPPORT=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_SCSI_AHCI=y +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_PHY_ADDR=3 CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y diff --git a/configs/A20-Olimex-SOM204-EVB_defconfig b/configs/A20-Olimex-SOM204-EVB_defconfig index e56f2c71109..cfb7ffa556f 100644 --- a/configs/A20-Olimex-SOM204-EVB_defconfig +++ b/configs/A20-Olimex-SOM204-EVB_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_I2C_SUPPORT=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_SCSI_AHCI=y +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_PHY_ADDR=3 CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y diff --git a/configs/B4420QDS_NAND_defconfig b/configs/B4420QDS_NAND_defconfig index c7df8716959..41b731883b5 100644 --- a/configs/B4420QDS_NAND_defconfig +++ b/configs/B4420QDS_NAND_defconfig @@ -4,7 +4,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_B4420QDS=y @@ -20,6 +19,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/B4860QDS_NAND_defconfig b/configs/B4860QDS_NAND_defconfig index 63c7d161f43..2b1029bfe35 100644 --- a/configs/B4860QDS_NAND_defconfig +++ b/configs/B4860QDS_NAND_defconfig @@ -4,7 +4,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_B4860QDS=y @@ -20,6 +19,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig index ad7781785cc..fe45fda2514 100644 --- a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig +++ b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig @@ -1,7 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x00201000 CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9131RDB=y @@ -13,6 +12,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_CLK_100" CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y diff --git a/configs/BSC9131RDB_NAND_defconfig b/configs/BSC9131RDB_NAND_defconfig index 5e8624f6a2c..7e2e24a0ee3 100644 --- a/configs/BSC9131RDB_NAND_defconfig +++ b/configs/BSC9131RDB_NAND_defconfig @@ -1,7 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x00201000 CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9131RDB=y @@ -12,6 +11,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig index b12d955fd7c..190be1e3837 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig @@ -1,7 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x00201000 CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y @@ -14,6 +13,7 @@ CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig index 15047aa42ff..a28bc57d9be 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig @@ -1,7 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x00201000 CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y @@ -14,6 +13,7 @@ CONFIG_BOOTDELAY=10 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y diff --git a/configs/Bananapi_m2m_defconfig b/configs/Bananapi_m2m_defconfig index 2032a4aef8d..2316437c944 100644 --- a/configs/Bananapi_m2m_defconfig +++ b/configs/Bananapi_m2m_defconfig @@ -13,6 +13,7 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-bananapi-m2m" # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_PARTITION_UUIDS is not set +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_USB_FUNCTION_MASS_STORAGE=y diff --git a/configs/C29XPCIE_NAND_defconfig b/configs/C29XPCIE_NAND_defconfig index f69e0063821..610905d53ef 100644 --- a/configs/C29XPCIE_NAND_defconfig +++ b/configs/C29XPCIE_NAND_defconfig @@ -4,7 +4,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_C29XPCIE=y @@ -16,6 +15,7 @@ CONFIG_BOOTDELAY=-1 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_ENV_SUPPORT=y CONFIG_TPL_I2C_SUPPORT=y diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig index f0bb4c9d5ce..601eb3ca0c0 100644 --- a/configs/Cubietruck_defconfig +++ b/configs/Cubietruck_defconfig @@ -21,6 +21,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_SCSI_AHCI=y CONFIG_DFU_RAM=y +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ETH_DESIGNWARE=y CONFIG_RGMII=y CONFIG_SUN7I_GMAC=y diff --git a/configs/MPC8313ERDB_NAND_33_defconfig b/configs/MPC8313ERDB_NAND_33_defconfig index 315d653f485..08587b75389 100644 --- a/configs/MPC8313ERDB_NAND_33_defconfig +++ b/configs/MPC8313ERDB_NAND_33_defconfig @@ -1,7 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x00100000 CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC83xx=y CONFIG_TARGET_MPC8313ERDB=y @@ -11,6 +10,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ" CONFIG_BOOTDELAY=6 CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y CONFIG_CMD_GPIO=y diff --git a/configs/MPC8313ERDB_NAND_66_defconfig b/configs/MPC8313ERDB_NAND_66_defconfig index cde45ee6825..a6bd729a5a0 100644 --- a/configs/MPC8313ERDB_NAND_66_defconfig +++ b/configs/MPC8313ERDB_NAND_66_defconfig @@ -1,7 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x00100000 CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC83xx=y CONFIG_TARGET_MPC8313ERDB=y @@ -11,6 +10,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ" CONFIG_BOOTDELAY=6 CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y CONFIG_CMD_GPIO=y diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index caad846699d..a82d8f4bf6a 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -4,7 +4,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y @@ -18,6 +17,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_DRIVERS_MISC_SUPPORT=y CONFIG_TPL_ENV_SUPPORT=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index f69bf02e906..ad6d300b3aa 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -4,9 +4,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index cd480c699c1..32e56822d7e 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -4,7 +4,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y @@ -17,6 +16,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_DRIVERS_MISC_SUPPORT=y CONFIG_TPL_ENV_SUPPORT=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index e6a129ab77d..1ee9b47d0ed 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -4,9 +4,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y CONFIG_FIT=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index 2cd94c40662..cf43a7b555d 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -4,7 +4,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y @@ -18,6 +17,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_DRIVERS_MISC_SUPPORT=y CONFIG_TPL_ENV_SUPPORT=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index dd04ebbdcad..487bc3a368e 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -4,9 +4,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index 16031d2d5df..b082a55b6c9 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -4,7 +4,6 @@ CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y @@ -17,6 +16,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_DRIVERS_MISC_SUPPORT=y CONFIG_TPL_ENV_SUPPORT=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index 2bde4a53d27..a408227bb42 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -4,9 +4,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y CONFIG_FIT=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 4d5b4ca27ef..e9df6d4112f 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -3,7 +3,6 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set @@ -17,6 +16,7 @@ CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_ENV_SUPPORT=y CONFIG_TPL_I2C_SUPPORT=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index dbe70c1b605..c1d167333a6 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index 1584dc27e16..5198322f3e8 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -3,7 +3,6 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set @@ -16,6 +15,7 @@ CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_ENV_SUPPORT=y CONFIG_TPL_I2C_SUPPORT=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 760b0299568..42f3a330cf4 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index a421715fbd3..560d278a937 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -3,7 +3,6 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set @@ -16,6 +15,7 @@ CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_ENV_SUPPORT=y CONFIG_TPL_I2C_SUPPORT=y diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index 67047c883dc..830211abb21 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y diff --git a/configs/P1021RDB-PC_36BIT_NAND_defconfig b/configs/P1021RDB-PC_36BIT_NAND_defconfig index 2680413eda6..1d15ad254a7 100644 --- a/configs/P1021RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1021RDB-PC_36BIT_NAND_defconfig @@ -3,7 +3,6 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set @@ -17,6 +16,7 @@ CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_ENV_SUPPORT=y CONFIG_TPL_I2C_SUPPORT=y diff --git a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig index 705a6aa0dba..d18e0048176 100644 --- a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1021RDB=y diff --git a/configs/P1021RDB-PC_NAND_defconfig b/configs/P1021RDB-PC_NAND_defconfig index 189a187bb46..6c910588927 100644 --- a/configs/P1021RDB-PC_NAND_defconfig +++ b/configs/P1021RDB-PC_NAND_defconfig @@ -3,7 +3,6 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set @@ -16,6 +15,7 @@ CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_ENV_SUPPORT=y CONFIG_TPL_I2C_SUPPORT=y diff --git a/configs/P1021RDB-PC_SPIFLASH_defconfig b/configs/P1021RDB-PC_SPIFLASH_defconfig index 04ea10b796a..f934e8cd813 100644 --- a/configs/P1021RDB-PC_SPIFLASH_defconfig +++ b/configs/P1021RDB-PC_SPIFLASH_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1021RDB=y diff --git a/configs/P1022DS_36BIT_NAND_defconfig b/configs/P1022DS_36BIT_NAND_defconfig index 57281e61590..45acdcb979f 100644 --- a/configs/P1022DS_36BIT_NAND_defconfig +++ b/configs/P1022DS_36BIT_NAND_defconfig @@ -3,7 +3,6 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1022DS=y @@ -16,6 +15,7 @@ CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_ENV_SUPPORT=y CONFIG_TPL_I2C_SUPPORT=y diff --git a/configs/P1022DS_36BIT_SPIFLASH_defconfig b/configs/P1022DS_36BIT_SPIFLASH_defconfig index 6aff17e6b76..44bed835fac 100644 --- a/configs/P1022DS_36BIT_SPIFLASH_defconfig +++ b/configs/P1022DS_36BIT_SPIFLASH_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1022DS=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1022DS_NAND_defconfig b/configs/P1022DS_NAND_defconfig index ef0ee5a3426..47a3bbd2add 100644 --- a/configs/P1022DS_NAND_defconfig +++ b/configs/P1022DS_NAND_defconfig @@ -3,7 +3,6 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1022DS=y @@ -15,6 +14,7 @@ CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_ENV_SUPPORT=y CONFIG_TPL_I2C_SUPPORT=y diff --git a/configs/P1022DS_SPIFLASH_defconfig b/configs/P1022DS_SPIFLASH_defconfig index 9f9863055c6..2d655c7b5af 100644 --- a/configs/P1022DS_SPIFLASH_defconfig +++ b/configs/P1022DS_SPIFLASH_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1022DS=y CONFIG_FIT=y diff --git a/configs/P1024RDB_NAND_defconfig b/configs/P1024RDB_NAND_defconfig index 57aa93456d6..415b7747054 100644 --- a/configs/P1024RDB_NAND_defconfig +++ b/configs/P1024RDB_NAND_defconfig @@ -3,7 +3,6 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set @@ -16,6 +15,7 @@ CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_ENV_SUPPORT=y CONFIG_TPL_I2C_SUPPORT=y diff --git a/configs/P1024RDB_SPIFLASH_defconfig b/configs/P1024RDB_SPIFLASH_defconfig index 29b9f8fa039..78cdb95d0f1 100644 --- a/configs/P1024RDB_SPIFLASH_defconfig +++ b/configs/P1024RDB_SPIFLASH_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1024RDB=y diff --git a/configs/P1025RDB_NAND_defconfig b/configs/P1025RDB_NAND_defconfig index ef379d6c611..cc55f3e4661 100644 --- a/configs/P1025RDB_NAND_defconfig +++ b/configs/P1025RDB_NAND_defconfig @@ -3,7 +3,6 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set @@ -16,6 +15,7 @@ CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_ENV_SUPPORT=y CONFIG_TPL_I2C_SUPPORT=y diff --git a/configs/P1025RDB_SPIFLASH_defconfig b/configs/P1025RDB_SPIFLASH_defconfig index c4837b169c8..ae45120a3b5 100644 --- a/configs/P1025RDB_SPIFLASH_defconfig +++ b/configs/P1025RDB_SPIFLASH_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1025RDB=y diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index ca12e1991c0..bd8fe1989e2 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -3,7 +3,6 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set @@ -17,6 +16,7 @@ CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_ENV_SUPPORT=y CONFIG_TPL_I2C_SUPPORT=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 3bab9d8867b..d1e70b6c35d 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index 4c96ef88cf3..d369fdb935f 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -3,7 +3,6 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set @@ -16,6 +15,7 @@ CONFIG_BOOTDELAY=10 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NAND_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_ENV_SUPPORT=y CONFIG_TPL_I2C_SUPPORT=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 4685b4b13e4..025be4bc598 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -3,9 +3,9 @@ CONFIG_SYS_TEXT_BASE=0x11001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y diff --git a/configs/SBx81LIFKW_defconfig b/configs/SBx81LIFKW_defconfig new file mode 100644 index 00000000000..348f861a143 --- /dev/null +++ b/configs/SBx81LIFKW_defconfig @@ -0,0 +1,39 @@ +CONFIG_ARM=y +CONFIG_KIRKWOOD=y +CONFIG_SYS_TEXT_BASE=0x00600000 +CONFIG_TARGET_SBx81LIFKW=y +CONFIG_IDENT_STRING="\nSBx81LIFKW" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-atl-sbx81lifkw" +# CONFIG_SYS_MALLOC_F is not set +CONFIG_BOOTDELAY=3 +CONFIG_SILENT_CONSOLE=y +CONFIG_SILENT_U_BOOT_ONLY=y +CONFIG_HUSH_PARSER=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_I2C=y +CONFIG_CMD_SF=y +CONFIG_CMD_DHCP=y +CONFIG_BOOTP_NTPSERVER=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_SNTP=y +CONFIG_OF_CONTROL=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_DM=y +CONFIG_DM_GPIO=y +CONFIG_DM_PCA953X=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MVTWSI=y +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_PCA954x=y +# CONFIG_MMC is not set +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_PHYLIB=y +CONFIG_MV88E61XX_SWITCH=y +CONFIG_MV88E61XX_CPU_PORT=10 +CONFIG_MV88E61XX_PHY_PORTS=0x003 +CONFIG_MV88E61XX_FIXED_PORTS=0x300 +CONFIG_SPI=y +CONFIG_KIRKWOOD_SPI=y diff --git a/configs/Sinlinx_SinA33_defconfig b/configs/Sinlinx_SinA33_defconfig index 9e6267200b7..394534b8b55 100644 --- a/configs/Sinlinx_SinA33_defconfig +++ b/configs/Sinlinx_SinA33_defconfig @@ -18,6 +18,7 @@ CONFIG_CMD_DFU=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_DFU_RAM=y +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/Sinovoip_BPI_M2_Plus_defconfig b/configs/Sinovoip_BPI_M2_Plus_defconfig index da5620a7709..a325e9f806a 100644 --- a/configs/Sinovoip_BPI_M2_Plus_defconfig +++ b/configs/Sinovoip_BPI_M2_Plus_defconfig @@ -14,4 +14,5 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-bananapi-m2-plus" # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/T1023RDB_NAND_defconfig b/configs/T1023RDB_NAND_defconfig index fc2a8927c72..efafe22df70 100644 --- a/configs/T1023RDB_NAND_defconfig +++ b/configs/T1023RDB_NAND_defconfig @@ -4,7 +4,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1023RDB=y @@ -20,6 +19,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y diff --git a/configs/T1023RDB_SPIFLASH_defconfig b/configs/T1023RDB_SPIFLASH_defconfig index 569d1fdb31b..7b423ebb96d 100644 --- a/configs/T1023RDB_SPIFLASH_defconfig +++ b/configs/T1023RDB_SPIFLASH_defconfig @@ -4,9 +4,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1023RDB=y CONFIG_FIT=y diff --git a/configs/T1024QDS_NAND_defconfig b/configs/T1024QDS_NAND_defconfig index 28e2ed92ebb..1a97c037043 100644 --- a/configs/T1024QDS_NAND_defconfig +++ b/configs/T1024QDS_NAND_defconfig @@ -4,7 +4,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024QDS=y @@ -23,6 +22,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/T1024QDS_SPIFLASH_defconfig b/configs/T1024QDS_SPIFLASH_defconfig index b1acb83f8c4..921892e6419 100644 --- a/configs/T1024QDS_SPIFLASH_defconfig +++ b/configs/T1024QDS_SPIFLASH_defconfig @@ -4,9 +4,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024QDS=y CONFIG_FIT=y diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index 7a8a8f26884..384cae10782 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -4,7 +4,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y @@ -22,6 +21,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index 1f19f6fd003..806b72fdb03 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -4,9 +4,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_FIT=y diff --git a/configs/T1040D4RDB_NAND_defconfig b/configs/T1040D4RDB_NAND_defconfig index 2e041fd7744..f6a4835a371 100644 --- a/configs/T1040D4RDB_NAND_defconfig +++ b/configs/T1040D4RDB_NAND_defconfig @@ -4,7 +4,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1040D4RDB=y @@ -22,6 +21,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/T1040D4RDB_SPIFLASH_defconfig b/configs/T1040D4RDB_SPIFLASH_defconfig index 9e68b1dff0a..a7ec2c78bf7 100644 --- a/configs/T1040D4RDB_SPIFLASH_defconfig +++ b/configs/T1040D4RDB_SPIFLASH_defconfig @@ -4,9 +4,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1040D4RDB=y CONFIG_FIT=y diff --git a/configs/T1040RDB_NAND_defconfig b/configs/T1040RDB_NAND_defconfig index 82263dc818c..e898dbbe5be 100644 --- a/configs/T1040RDB_NAND_defconfig +++ b/configs/T1040RDB_NAND_defconfig @@ -4,7 +4,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1040RDB=y @@ -22,6 +21,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/T1040RDB_SPIFLASH_defconfig b/configs/T1040RDB_SPIFLASH_defconfig index f8d5b0619b4..994e94d76f5 100644 --- a/configs/T1040RDB_SPIFLASH_defconfig +++ b/configs/T1040RDB_SPIFLASH_defconfig @@ -4,9 +4,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1040RDB=y CONFIG_FIT=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index 946ff768d68..b9058b7f45f 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -4,7 +4,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y @@ -23,6 +22,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index 2d7437a2f0b..2ed1b394302 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -4,9 +4,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_FIT=y diff --git a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig index 62bb8fc3a9c..963fd9bafeb 100644 --- a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig +++ b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig @@ -5,7 +5,6 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SECURE_BOOT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1042RDB_PI=y @@ -26,6 +25,7 @@ CONFIG_SPL_HASH_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/T1042RDB_PI_NAND_defconfig b/configs/T1042RDB_PI_NAND_defconfig index 1fde14cf7fa..885516410e8 100644 --- a/configs/T1042RDB_PI_NAND_defconfig +++ b/configs/T1042RDB_PI_NAND_defconfig @@ -4,7 +4,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1042RDB_PI=y @@ -23,6 +22,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/T1042RDB_PI_SPIFLASH_defconfig b/configs/T1042RDB_PI_SPIFLASH_defconfig index c57fbfc4122..77855fc74dc 100644 --- a/configs/T1042RDB_PI_SPIFLASH_defconfig +++ b/configs/T1042RDB_PI_SPIFLASH_defconfig @@ -4,9 +4,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1042RDB_PI=y CONFIG_FIT=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index b6880beff43..2addaac9834 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -4,7 +4,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y @@ -19,6 +18,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index 41945db4325..e3cd7911ba2 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -4,9 +4,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_FIT=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index 59a81ac205e..b7f55208af4 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -4,7 +4,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y @@ -19,6 +18,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y CONFIG_CMD_MEMTEST=y diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index 1c4f97fdf78..8a1194764ba 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -4,9 +4,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_FIT=y diff --git a/configs/T2081QDS_NAND_defconfig b/configs/T2081QDS_NAND_defconfig index 1c422acddcf..3f8d6117aca 100644 --- a/configs/T2081QDS_NAND_defconfig +++ b/configs/T2081QDS_NAND_defconfig @@ -4,7 +4,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2081QDS=y @@ -19,6 +18,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/T2081QDS_SPIFLASH_defconfig b/configs/T2081QDS_SPIFLASH_defconfig index 727eb86e7d2..fc7115a6e3c 100644 --- a/configs/T2081QDS_SPIFLASH_defconfig +++ b/configs/T2081QDS_SPIFLASH_defconfig @@ -4,9 +4,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2081QDS=y CONFIG_FIT=y diff --git a/configs/T4160QDS_NAND_defconfig b/configs/T4160QDS_NAND_defconfig index d1ffbbd71b5..b88caa2ca32 100644 --- a/configs/T4160QDS_NAND_defconfig +++ b/configs/T4160QDS_NAND_defconfig @@ -4,7 +4,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T4160QDS=y @@ -19,6 +18,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/T4240QDS_NAND_defconfig b/configs/T4240QDS_NAND_defconfig index 8bddd6a8c27..77a98dac597 100644 --- a/configs/T4240QDS_NAND_defconfig +++ b/configs/T4240QDS_NAND_defconfig @@ -4,7 +4,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T4240QDS=y @@ -19,6 +18,7 @@ CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/alt_defconfig b/configs/alt_defconfig index b0b864c1a19..b7b64f6dd4e 100644 --- a/configs/alt_defconfig +++ b/configs/alt_defconfig @@ -11,11 +11,11 @@ CONFIG_ARCH_RMOBILE_BOARD_STRING="Alt" CONFIG_R8A7794=y CONFIG_TARGET_ALT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="r8a7794-alt-u-boot" -CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_VERSION_VARIABLE=y @@ -46,6 +46,9 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y +CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nor0=spi0.0" +CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:256k(u-boot-spl),512k(u-boot-env1),512k(u-boot-env2),768k(u-boot),-(user)" CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_ENV_IS_IN_SPI_FLASH=y @@ -58,9 +61,11 @@ CONFIG_SYS_I2C_RCAR_IIC=y CONFIG_DM_MMC=y CONFIG_SH_MMCIF=y CONFIG_RENESAS_SDHI=y +CONFIG_MTD=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_MTD=y CONFIG_PHY_MICREL=y CONFIG_DM_ETH=y CONFIG_SH_ETHER=y diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig index 6b5755c1aee..5400a4cff17 100644 --- a/configs/am335x_baltos_defconfig +++ b/configs/am335x_baltos_defconfig @@ -7,10 +7,9 @@ CONFIG_AM33XX=y CONFIG_TARGET_AM335X_BALTOS=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FAT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -22,6 +21,7 @@ CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/am335x_boneblack_defconfig b/configs/am335x_boneblack_defconfig index 5c01b20dff1..732cb641703 100644 --- a/configs/am335x_boneblack_defconfig +++ b/configs/am335x_boneblack_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_AM33XX=y -# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT" @@ -11,14 +10,12 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_MUSB_NEW_SUPPORT=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_OS_BOOT=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" CONFIG_AUTOBOOT_DELAY_STR="d" CONFIG_AUTOBOOT_STOP_STR=" " -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=1 CONFIG_CMD_SPL=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set @@ -28,6 +25,10 @@ CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DFU_TFTP=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=1 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y @@ -48,4 +49,3 @@ CONFIG_USB_ETHER=y CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00" CONFIG_LZO=y CONFIG_OF_LIBFDT=y -CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig index abbacdc77ec..cdb88e2bdd3 100644 --- a/configs/am335x_boneblack_vboot_defconfig +++ b/configs/am335x_boneblack_vboot_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_AM33XX=y -# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="am335x-boneblack" CONFIG_DISTRO_DEFAULTS=y @@ -14,12 +13,12 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_MUSB_NEW_SUPPORT=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_OS_BOOT=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" CONFIG_AUTOBOOT_DELAY_STR="d" CONFIG_AUTOBOOT_STOP_STR=" " -CONFIG_FASTBOOT=y CONFIG_CMD_SPL=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set @@ -30,6 +29,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y +CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_MMC_OMAP_HS=y diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig index 6732013b03f..c982bed1386 100644 --- a/configs/am335x_evm_defconfig +++ b/configs/am335x_evm_defconfig @@ -13,7 +13,6 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_MUSB_NEW_SUPPORT=y CONFIG_SPL_OS_BOOT=y -CONFIG_FASTBOOT=y CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x00080000 # CONFIG_CMD_FLASH is not set @@ -31,6 +30,7 @@ CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DFU_MMC=y CONFIG_DFU_NAND=y CONFIG_DFU_RAM=y +CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_DM_I2C=y CONFIG_MISC=y CONFIG_DM_MMC=y @@ -61,4 +61,3 @@ CONFIG_USB_ETHER=y CONFIG_DYNAMIC_CRC_TABLE=y CONFIG_RSA=y CONFIG_LZO=y -CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/am335x_evm_nor_defconfig b/configs/am335x_evm_nor_defconfig index bbde07fb1d6..aed312e451a 100644 --- a/configs/am335x_evm_nor_defconfig +++ b/configs/am335x_evm_nor_defconfig @@ -12,7 +12,6 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_MUSB_NEW_SUPPORT=y CONFIG_SPL_OS_BOOT=y -CONFIG_FASTBOOT=y CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x00080000 CONFIG_CMD_NAND=y @@ -25,6 +24,7 @@ CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DFU_MMC=y CONFIG_DFU_NAND=y CONFIG_DFU_RAM=y +CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_MMC_OMAP_HS=y CONFIG_MTD_NOR_FLASH=y CONFIG_NAND=y @@ -46,4 +46,3 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 CONFIG_USB_ETHER=y CONFIG_LZO=y CONFIG_OF_LIBFDT=y -CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/am335x_evm_norboot_defconfig b/configs/am335x_evm_norboot_defconfig index 3ddcf649423..ea0eebb54bc 100644 --- a/configs/am335x_evm_norboot_defconfig +++ b/configs/am335x_evm_norboot_defconfig @@ -12,7 +12,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_FASTBOOT=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=physmap-flash.0" @@ -21,6 +20,7 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y +CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_MMC_OMAP_HS=y CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y @@ -42,4 +42,3 @@ CONFIG_USB_ETHER=y CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00" CONFIG_LZO=y CONFIG_OF_LIBFDT=y -CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig index 10eb0fe1ee8..9408f045596 100644 --- a/configs/am335x_evm_spiboot_defconfig +++ b/configs/am335x_evm_spiboot_defconfig @@ -2,10 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_AM33XX=y -# CONFIG_SPL_NAND_SUPPORT is not set +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="SPI_BOOT" CONFIG_SPI_BOOT=y @@ -14,8 +13,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_MUSB_NEW_SUPPORT=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_SPI_LOAD=y -CONFIG_FASTBOOT=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_MTDPARTS=y @@ -26,6 +25,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y +CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y @@ -45,4 +45,3 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 CONFIG_USB_ETHER=y CONFIG_LZO=y CONFIG_OF_LIBFDT=y -CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/am335x_evm_usbspl_defconfig b/configs/am335x_evm_usbspl_defconfig index dc9ac216c21..88003b5852e 100644 --- a/configs/am335x_evm_usbspl_defconfig +++ b/configs/am335x_evm_usbspl_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_AM33XX=y -# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_ANDROID_BOOT_IMAGE is not set @@ -13,13 +12,13 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_MUSB_NEW_SUPPORT=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_NET_SUPPORT=y CONFIG_SPL_NET_VCI_STRING="AM335x U-Boot SPL" CONFIG_SPL_OS_BOOT=y CONFIG_SPL_USB_GADGET_SUPPORT=y CONFIG_SPL_USB_ETHER=y # CONFIG_SPL_YMODEM_SUPPORT is not set -CONFIG_FASTBOOT=y CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x00080000 # CONFIG_CMD_FLASH is not set @@ -34,6 +33,7 @@ CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DFU_MMC=y CONFIG_DFU_NAND=y CONFIG_DFU_RAM=y +CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y CONFIG_SPI_FLASH=y @@ -54,4 +54,3 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xd022 CONFIG_USB_ETHER=y CONFIG_LZO=y CONFIG_OF_LIBFDT=y -CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig index 0c59f3fe3ad..f02bd37a18c 100644 --- a/configs/am335x_hs_evm_defconfig +++ b/configs/am335x_hs_evm_defconfig @@ -6,7 +6,6 @@ CONFIG_TI_SECURE_DEVICE=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_AM33XX=y CONFIG_ISW_ENTRY_ADDR=0x40300350 -# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_DISTRO_DEFAULTS=y @@ -22,6 +21,7 @@ CONFIG_SPL_FIT_IMAGE_TINY=y # CONFIG_SPL_ENV_SUPPORT is not set # CONFIG_SPL_EXT_SUPPORT is not set CONFIG_SPL_MTD_SUPPORT=y +# CONFIG_SPL_NAND_SUPPORT is not set # CONFIG_SPL_YMODEM_SUPPORT is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y diff --git a/configs/am335x_hs_evm_uart_defconfig b/configs/am335x_hs_evm_uart_defconfig index a57cef50f75..06177faa9a5 100644 --- a/configs/am335x_hs_evm_uart_defconfig +++ b/configs/am335x_hs_evm_uart_defconfig @@ -5,10 +5,9 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_AM33XX=y CONFIG_ISW_ENTRY_ADDR=0x40301950 # CONFIG_SPL_MMC_SUPPORT is not set -# CONFIG_SPL_LIBDISK_SUPPORT is not set -# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL=y # CONFIG_SPL_FAT_SUPPORT is not set +# CONFIG_SPL_LIBDISK_SUPPORT is not set CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT_IMAGE_POST_PROCESS=y @@ -20,6 +19,7 @@ CONFIG_ARCH_MISC_INIT=y # CONFIG_SPL_ENV_SUPPORT is not set # CONFIG_SPL_EXT_SUPPORT is not set CONFIG_SPL_MTD_SUPPORT=y +# CONFIG_SPL_NAND_SUPPORT is not set # CONFIG_SPL_YMODEM_SUPPORT is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y @@ -62,4 +62,3 @@ CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_RSA=y CONFIG_LZO=y -CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/am335x_igep003x_defconfig b/configs/am335x_igep003x_defconfig index 5f57a678df8..aaa53976412 100644 --- a/configs/am335x_igep003x_defconfig +++ b/configs/am335x_igep003x_defconfig @@ -8,10 +8,9 @@ CONFIG_AM33XX=y CONFIG_TARGET_AM335X_IGEP003X=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FAT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="MACH_TYPE=MACH_TYPE_IGEP0033" @@ -23,6 +22,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y diff --git a/configs/am335x_pdu001_defconfig b/configs/am335x_pdu001_defconfig index ea3b43d0c65..625ee6603dd 100644 --- a/configs/am335x_pdu001_defconfig +++ b/configs/am335x_pdu001_defconfig @@ -6,11 +6,9 @@ CONFIG_AM33XX=y CONFIG_TARGET_PDU001=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -# CONFIG_SPL_NAND_SUPPORT is not set -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FAT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="am335x-pdu001" CONFIG_LOCALVERSION="-EETS-1.0.0" CONFIG_DISTRO_DEFAULTS=y @@ -18,6 +16,8 @@ CONFIG_BOOTDELAY=1 # CONFIG_USE_BOOTCOMMAND is not set # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SPL_I2C_SUPPORT=y +# CONFIG_SPL_NAND_SUPPORT is not set +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig index 709094b4a79..de69b8e287d 100644 --- a/configs/am335x_shc_defconfig +++ b/configs/am335x_shc_defconfig @@ -7,11 +7,9 @@ CONFIG_AM33XX=y CONFIG_TARGET_AM335X_SHC=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -# CONFIG_SPL_NAND_SUPPORT is not set -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FAT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SERIES=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_USE_BOOTCOMMAND is not set @@ -19,8 +17,10 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_OS_BOOT=y CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set CONFIG_SYS_PROMPT="U-Boot# " diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig index 7413f6cf28c..0cf5ff392b7 100644 --- a/configs/am335x_shc_ict_defconfig +++ b/configs/am335x_shc_ict_defconfig @@ -7,11 +7,9 @@ CONFIG_AM33XX=y CONFIG_TARGET_AM335X_SHC=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -# CONFIG_SPL_NAND_SUPPORT is not set -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FAT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SHC_ICT=y CONFIG_SERIES=y CONFIG_DISTRO_DEFAULTS=y @@ -20,8 +18,10 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_OS_BOOT=y CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set CONFIG_SYS_PROMPT="U-Boot# " diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig index b60ee9d035a..a5fa49132ba 100644 --- a/configs/am335x_shc_netboot_defconfig +++ b/configs/am335x_shc_netboot_defconfig @@ -7,11 +7,9 @@ CONFIG_AM33XX=y CONFIG_TARGET_AM335X_SHC=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -# CONFIG_SPL_NAND_SUPPORT is not set -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FAT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SHC_NETBOOT=y CONFIG_SERIES=y CONFIG_DISTRO_DEFAULTS=y @@ -21,8 +19,10 @@ CONFIG_VERSION_VARIABLE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_OS_BOOT=y CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set CONFIG_SYS_PROMPT="U-Boot# " diff --git a/configs/am335x_shc_prompt_defconfig b/configs/am335x_shc_prompt_defconfig index 59806adbf00..78c1dd79a86 100644 --- a/configs/am335x_shc_prompt_defconfig +++ b/configs/am335x_shc_prompt_defconfig @@ -7,11 +7,9 @@ CONFIG_AM33XX=y CONFIG_TARGET_AM335X_SHC=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -# CONFIG_SPL_NAND_SUPPORT is not set -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FAT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SERIES=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_USE_BOOTCOMMAND is not set @@ -19,8 +17,10 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_OS_BOOT=y CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig index d970172b8fc..cd50e1a787e 100644 --- a/configs/am335x_shc_sdboot_defconfig +++ b/configs/am335x_shc_sdboot_defconfig @@ -7,11 +7,9 @@ CONFIG_AM33XX=y CONFIG_TARGET_AM335X_SHC=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -# CONFIG_SPL_NAND_SUPPORT is not set -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FAT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SHC_SDBOOT=y CONFIG_SERIES=y CONFIG_DISTRO_DEFAULTS=y @@ -20,8 +18,10 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_OS_BOOT=y CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set CONFIG_SYS_PROMPT="U-Boot# " diff --git a/configs/am335x_shc_sdboot_prompt_defconfig b/configs/am335x_shc_sdboot_prompt_defconfig index d970172b8fc..cd50e1a787e 100644 --- a/configs/am335x_shc_sdboot_prompt_defconfig +++ b/configs/am335x_shc_sdboot_prompt_defconfig @@ -7,11 +7,9 @@ CONFIG_AM33XX=y CONFIG_TARGET_AM335X_SHC=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -# CONFIG_SPL_NAND_SUPPORT is not set -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FAT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SHC_SDBOOT=y CONFIG_SERIES=y CONFIG_DISTRO_DEFAULTS=y @@ -20,8 +18,10 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_OS_BOOT=y CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set CONFIG_SYS_PROMPT="U-Boot# " diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig index 3f2eeadc2c3..b4dfe019048 100644 --- a/configs/am335x_sl50_defconfig +++ b/configs/am335x_sl50_defconfig @@ -7,11 +7,9 @@ CONFIG_AM33XX=y CONFIG_TARGET_AM335X_SL50=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -# CONFIG_SPL_NAND_SUPPORT is not set -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FAT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT" CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -19,8 +17,10 @@ CONFIG_VERSION_VARIABLE=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_OS_BOOT=y CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index 0e992684412..52e5d6b2861 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -4,10 +4,9 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_OMAP54XX=y CONFIG_TARGET_AM57XX_EVM=y -# CONFIG_SPL_NAND_SUPPORT is not set +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_ARMV7_LPAE=y CONFIG_DEFAULT_DEVICE_TREE="am572x-idk" CONFIG_DISTRO_DEFAULTS=y @@ -22,14 +21,9 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_DMA_SUPPORT=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_OS_BOOT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x82000000 -CONFIG_FASTBOOT_BUF_SIZE=0x2F000000 -CONFIG_FASTBOOT_USB_DEV=1 -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=1 CONFIG_CMD_SPL=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set @@ -45,6 +39,13 @@ CONFIG_SCSI_AHCI=y # CONFIG_BLK is not set CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x82000000 +CONFIG_FASTBOOT_BUF_SIZE=0x2F000000 +CONFIG_FASTBOOT_USB_DEV=1 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=1 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index 165c2a40ba0..fe3e87f9798 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -8,10 +8,9 @@ CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000 CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000 CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000 CONFIG_TARGET_AM57XX_EVM=y -# CONFIG_SPL_NAND_SUPPORT is not set +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_ARMV7_LPAE=y CONFIG_DEFAULT_DEVICE_TREE="am57xx-beagle-x15" CONFIG_DISTRO_DEFAULTS=y @@ -28,13 +27,8 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_DMA_SUPPORT=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_SPI_LOAD=y -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x82000000 -CONFIG_FASTBOOT_BUF_SIZE=0x2F000000 -CONFIG_FASTBOOT_USB_DEV=1 -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=1 # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y @@ -48,6 +42,13 @@ CONFIG_SCSI_AHCI=y # CONFIG_BLK is not set CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x82000000 +CONFIG_FASTBOOT_BUF_SIZE=0x2F000000 +CONFIG_FASTBOOT_USB_DEV=1 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=1 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y diff --git a/configs/amarula_a64_relic_defconfig b/configs/amarula_a64_relic_defconfig new file mode 100644 index 00000000000..b72cbfabc69 --- /dev/null +++ b/configs/amarula_a64_relic_defconfig @@ -0,0 +1,15 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_SPL=y +CONFIG_MACH_SUN50I=y +CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y +CONFIG_DRAM_ODT_EN=y +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +# CONFIG_VIDEO_DE2 is not set +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-amarula-relic" +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_USB_MUSB_GADGET=y +CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/ap121_defconfig b/configs/ap121_defconfig index 1eff3ed7678..adaff92ec8f 100644 --- a/configs/ap121_defconfig +++ b/configs/ap121_defconfig @@ -1,6 +1,9 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0x9F000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xb8020000 +CONFIG_DEBUG_UART_CLOCK=25000000 CONFIG_ARCH_ATH79=y CONFIG_DEFAULT_DEVICE_TREE="ap121" CONFIG_DEBUG_UART=y @@ -50,9 +53,6 @@ CONFIG_PINCONF=y CONFIG_PINCTRL_AR933X=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_AR933X=y -CONFIG_DEBUG_UART_BASE=0xb8020000 -CONFIG_DEBUG_UART_CLOCK=25000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_AR933X_UART=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/ap143_defconfig b/configs/ap143_defconfig index 77fb0a4f88f..88cacbb4090 100644 --- a/configs/ap143_defconfig +++ b/configs/ap143_defconfig @@ -1,6 +1,9 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0x9F000000 CONFIG_SYS_MALLOC_F_LEN=0x800 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xb8020000 +CONFIG_DEBUG_UART_CLOCK=25000000 CONFIG_ARCH_ATH79=y CONFIG_TARGET_AP143=y CONFIG_DEFAULT_DEVICE_TREE="ap143" @@ -44,10 +47,7 @@ CONFIG_SPI_FLASH_DATAFLASH=y CONFIG_SPI_FLASH_MTD=y CONFIG_PINCTRL=y CONFIG_DM_SERIAL=y -CONFIG_DEBUG_UART_BASE=0xb8020000 -CONFIG_DEBUG_UART_CLOCK=25000000 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/apf27_defconfig b/configs/apf27_defconfig index b9760968036..5f688f0be81 100644 --- a/configs/apf27_defconfig +++ b/configs/apf27_defconfig @@ -3,7 +3,6 @@ CONFIG_ARM=y CONFIG_TARGET_APF27=y CONFIG_SYS_TEXT_BASE=0xA0000800 CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_IDENT_STRING=" apf27 patch 3.10" CONFIG_ENV_VARS_UBOOT_CONFIG=y @@ -12,6 +11,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttySMX0,115200 mtdparts=mxc_nand.0:1M(u-boot)ro,512K(env),512K(env2),512K(firmware),512K(dtb),5M(kernel),-(rootfs) ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs " CONFIG_VERSION_VARIABLE=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="BIOS> " CONFIG_CMD_ASKENV=y diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig b/configs/at91sam9260ek_dataflash_cs0_defconfig index 1a3d5ec7254..3d2b8803eac 100644 --- a/configs/at91sam9260ek_dataflash_cs0_defconfig +++ b/configs/at91sam9260ek_dataflash_cs0_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS0" @@ -41,9 +44,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfffff200 -CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig b/configs/at91sam9260ek_dataflash_cs1_defconfig index b16fff6a96b..6b821a93758 100644 --- a/configs/at91sam9260ek_dataflash_cs1_defconfig +++ b/configs/at91sam9260ek_dataflash_cs1_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS1" @@ -41,9 +44,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfffff200 -CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9260ek_nandflash_defconfig b/configs/at91sam9260ek_nandflash_defconfig index 8cacec86834..ea5292c9340 100644 --- a/configs/at91sam9260ek_nandflash_defconfig +++ b/configs/at91sam9260ek_nandflash_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_NANDFLASH" @@ -41,9 +44,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfffff200 -CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig index dd2c8906679..b6c9244a596 100644 --- a/configs/at91sam9261ek_dataflash_cs0_defconfig +++ b/configs/at91sam9261ek_dataflash_cs0_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_TARGET_AT91SAM9261EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_DATAFLASH_CS0" @@ -40,9 +43,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfffff200 -CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig index b035ed612a1..d7fb15b3e7e 100644 --- a/configs/at91sam9261ek_dataflash_cs3_defconfig +++ b/configs/at91sam9261ek_dataflash_cs3_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_TARGET_AT91SAM9261EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_DATAFLASH_CS3" @@ -40,9 +43,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfffff200 -CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9261ek_nandflash_defconfig b/configs/at91sam9261ek_nandflash_defconfig index 91cfb8f85ce..95b7558183a 100644 --- a/configs/at91sam9261ek_nandflash_defconfig +++ b/configs/at91sam9261ek_nandflash_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_TARGET_AT91SAM9261EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_NANDFLASH" @@ -40,9 +43,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfffff200 -CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9263ek_dataflash_cs0_defconfig b/configs/at91sam9263ek_dataflash_cs0_defconfig index c017f36db8a..9f357aef90c 100644 --- a/configs/at91sam9263ek_dataflash_cs0_defconfig +++ b/configs/at91sam9263ek_dataflash_cs0_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x21F00000 CONFIG_TARGET_AT91SAM9263EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xffffee00 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH" @@ -46,9 +49,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xffffee00 -CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9263ek_dataflash_defconfig b/configs/at91sam9263ek_dataflash_defconfig index c017f36db8a..9f357aef90c 100644 --- a/configs/at91sam9263ek_dataflash_defconfig +++ b/configs/at91sam9263ek_dataflash_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x21F00000 CONFIG_TARGET_AT91SAM9263EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xffffee00 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH" @@ -46,9 +49,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xffffee00 -CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9263ek_nandflash_defconfig b/configs/at91sam9263ek_nandflash_defconfig index 538ac35b552..1a43f4f1109 100644 --- a/configs/at91sam9263ek_nandflash_defconfig +++ b/configs/at91sam9263ek_nandflash_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x21F00000 CONFIG_TARGET_AT91SAM9263EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xffffee00 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH" @@ -46,9 +49,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xffffee00 -CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9263ek_norflash_boot_defconfig b/configs/at91sam9263ek_norflash_boot_defconfig index d1491cac5e4..96836267cd8 100644 --- a/configs/at91sam9263ek_norflash_boot_defconfig +++ b/configs/at91sam9263ek_norflash_boot_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x0000000 CONFIG_TARGET_AT91SAM9263EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xffffee00 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_BOOT_NORFLASH" @@ -45,9 +48,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xffffee00 -CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9263ek_norflash_defconfig b/configs/at91sam9263ek_norflash_defconfig index c0f27b265ff..a2b52df354c 100644 --- a/configs/at91sam9263ek_norflash_defconfig +++ b/configs/at91sam9263ek_norflash_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x21F00000 CONFIG_TARGET_AT91SAM9263EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xffffee00 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NORFLASH" @@ -45,9 +48,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xffffee00 -CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9g10ek_dataflash_cs0_defconfig b/configs/at91sam9g10ek_dataflash_cs0_defconfig index b013a3ac91e..0caede5dedc 100644 --- a/configs/at91sam9g10ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs0_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_TARGET_AT91SAM9261EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_DATAFLASH_CS0" @@ -40,9 +43,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfffff200 -CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9g10ek_dataflash_cs3_defconfig b/configs/at91sam9g10ek_dataflash_cs3_defconfig index f44fdf99874..16707ac4a6e 100644 --- a/configs/at91sam9g10ek_dataflash_cs3_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs3_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_TARGET_AT91SAM9261EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_DATAFLASH_CS3" @@ -40,9 +43,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfffff200 -CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9g10ek_nandflash_defconfig b/configs/at91sam9g10ek_nandflash_defconfig index b3478239f0d..0a4538e2a9f 100644 --- a/configs/at91sam9g10ek_nandflash_defconfig +++ b/configs/at91sam9g10ek_nandflash_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_TARGET_AT91SAM9261EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_NANDFLASH" @@ -40,9 +43,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfffff200 -CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9g20ek_2mmc_defconfig b/configs/at91sam9g20ek_2mmc_defconfig index 59fd5972b5a..3ef05dbac45 100644 --- a/configs/at91sam9g20ek_2mmc_defconfig +++ b/configs/at91sam9g20ek_2mmc_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek_2mmc" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_MMC" @@ -43,9 +46,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfffff200 -CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9g20ek_2mmc_nandflash_defconfig b/configs/at91sam9g20ek_2mmc_nandflash_defconfig index c4638248c8c..6476465623d 100644 --- a/configs/at91sam9g20ek_2mmc_nandflash_defconfig +++ b/configs/at91sam9g20ek_2mmc_nandflash_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek_2mmc" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_NANDFLASH" @@ -43,9 +46,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfffff200 -CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9g20ek_dataflash_cs0_defconfig b/configs/at91sam9g20ek_dataflash_cs0_defconfig index a0d7665447a..a161302fb0c 100644 --- a/configs/at91sam9g20ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs0_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_DATAFLASH_CS0" @@ -41,9 +44,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfffff200 -CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9g20ek_dataflash_cs1_defconfig b/configs/at91sam9g20ek_dataflash_cs1_defconfig index 5241d055414..d7a97e3ddb3 100644 --- a/configs/at91sam9g20ek_dataflash_cs1_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs1_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_DATAFLASH_CS1" @@ -41,9 +44,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfffff200 -CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9g20ek_nandflash_defconfig b/configs/at91sam9g20ek_nandflash_defconfig index e3536da2622..b6affb8ffe6 100644 --- a/configs/at91sam9g20ek_nandflash_defconfig +++ b/configs/at91sam9g20ek_nandflash_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_NANDFLASH" @@ -41,9 +44,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfffff200 -CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9m10g45ek_mmc_defconfig b/configs/at91sam9m10g45ek_mmc_defconfig index a7acecd2cdb..0862a323acb 100644 --- a/configs/at91sam9m10g45ek_mmc_defconfig +++ b/configs/at91sam9m10g45ek_mmc_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x73f00000 CONFIG_TARGET_AT91SAM9M10G45EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xffffee00 +CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek" CONFIG_DEBUG_UART=y CONFIG_SD_BOOT=y @@ -41,9 +44,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xffffee00 -CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_TIMER=y diff --git a/configs/at91sam9m10g45ek_nandflash_defconfig b/configs/at91sam9m10g45ek_nandflash_defconfig index dd602c28bcf..df806b29a1b 100644 --- a/configs/at91sam9m10g45ek_nandflash_defconfig +++ b/configs/at91sam9m10g45ek_nandflash_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x73f00000 CONFIG_TARGET_AT91SAM9M10G45EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xffffee00 +CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek" CONFIG_DEBUG_UART=y CONFIG_NAND_BOOT=y @@ -41,9 +44,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xffffee00 -CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_TIMER=y diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig index 0062e0cade1..086a07ffb70 100644 --- a/configs/at91sam9n12ek_mmc_defconfig +++ b/configs/at91sam9n12ek_mmc_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9N12EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9n12ek" CONFIG_DEBUG_UART=y CONFIG_SD_BOOT=y @@ -42,9 +45,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfffff200 -CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig index add2b353076..75205a615d2 100644 --- a/configs/at91sam9n12ek_nandflash_defconfig +++ b/configs/at91sam9n12ek_nandflash_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9N12EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9n12ek" CONFIG_DEBUG_UART=y CONFIG_NAND_BOOT=y @@ -42,9 +45,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfffff200 -CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig index 5829b4722dd..3a8c61c1276 100644 --- a/configs/at91sam9n12ek_spiflash_defconfig +++ b/configs/at91sam9n12ek_spiflash_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9N12EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9n12ek" CONFIG_DEBUG_UART=y CONFIG_SPI_BOOT=y @@ -42,9 +45,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfffff200 -CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9rlek_dataflash_defconfig b/configs/at91sam9rlek_dataflash_defconfig index a207e4bd4e1..b9307743f55 100644 --- a/configs/at91sam9rlek_dataflash_defconfig +++ b/configs/at91sam9rlek_dataflash_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x21F00000 CONFIG_TARGET_AT91SAM9RLEK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_DATAFLASH" @@ -42,9 +45,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfffff200 -CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9rlek_mmc_defconfig b/configs/at91sam9rlek_mmc_defconfig index 18ff7c86219..15c98a28009 100644 --- a/configs/at91sam9rlek_mmc_defconfig +++ b/configs/at91sam9rlek_mmc_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x21F00000 CONFIG_TARGET_AT91SAM9RLEK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_MMC" @@ -42,9 +45,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfffff200 -CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9rlek_nandflash_defconfig b/configs/at91sam9rlek_nandflash_defconfig index 085f5f644c0..a5dcc7795bc 100644 --- a/configs/at91sam9rlek_nandflash_defconfig +++ b/configs/at91sam9rlek_nandflash_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x21F00000 CONFIG_TARGET_AT91SAM9RLEK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_NANDFLASH" @@ -42,9 +45,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfffff200 -CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig index ffed17904ab..bfd80b207e0 100644 --- a/configs/at91sam9x5ek_dataflash_defconfig +++ b/configs/at91sam9x5ek_dataflash_defconfig @@ -3,12 +3,15 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="SYS_USE_DATAFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw" +CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256k(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs rw" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -45,9 +48,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfffff200 -CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig index 29176ae00a9..01c5818adfa 100644 --- a/configs/at91sam9x5ek_mmc_defconfig +++ b/configs/at91sam9x5ek_mmc_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" CONFIG_DEBUG_UART=y CONFIG_SD_BOOT=y @@ -45,9 +48,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfffff200 -CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig index 4d16eb5a8b7..693e4de843f 100644 --- a/configs/at91sam9x5ek_nandflash_defconfig +++ b/configs/at91sam9x5ek_nandflash_defconfig @@ -3,12 +3,15 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" CONFIG_DEBUG_UART=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw" +CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256k(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs rw" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -45,9 +48,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfffff200 -CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig index 52c419d0504..7df7fc50474 100644 --- a/configs/at91sam9x5ek_spiflash_defconfig +++ b/configs/at91sam9x5ek_spiflash_defconfig @@ -3,12 +3,15 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" CONFIG_DEBUG_UART=y CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw" +CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256k(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs rw" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -45,9 +48,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfffff200 -CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9xeek_dataflash_cs0_defconfig b/configs/at91sam9xeek_dataflash_cs0_defconfig index 9e588c02929..a42e29e5f1b 100644 --- a/configs/at91sam9xeek_dataflash_cs0_defconfig +++ b/configs/at91sam9xeek_dataflash_cs0_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_DATAFLASH_CS0" @@ -41,9 +44,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfffff200 -CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9xeek_dataflash_cs1_defconfig b/configs/at91sam9xeek_dataflash_cs1_defconfig index 47a9beacec5..33d2bd0d6e3 100644 --- a/configs/at91sam9xeek_dataflash_cs1_defconfig +++ b/configs/at91sam9xeek_dataflash_cs1_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_DATAFLASH_CS1" @@ -41,9 +44,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfffff200 -CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/at91sam9xeek_nandflash_defconfig b/configs/at91sam9xeek_nandflash_defconfig index 0103d5c0dc6..3424b1dc31c 100644 --- a/configs/at91sam9xeek_nandflash_defconfig +++ b/configs/at91sam9xeek_nandflash_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_TARGET_AT91SAM9260EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" CONFIG_DEBUG_UART=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_NANDFLASH" @@ -41,9 +44,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfffff200 -CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/nx25-ae250_defconfig b/configs/ax25-ae350_defconfig index 42507755a6b..fc04c874859 100644 --- a/configs/nx25-ae250_defconfig +++ b/configs/ax25-ae350_defconfig @@ -1,20 +1,19 @@ CONFIG_RISCV=y CONFIG_SYS_TEXT_BASE=0x00000000 -CONFIG_DEFAULT_DEVICE_TREE="ae250" -CONFIG_TARGET_NX25_AE250=y +CONFIG_DEFAULT_DEVICE_TREE="ae350" +CONFIG_TARGET_AX25_AE350=y +CONFIG_CPU_RISCV_64=y +CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=3 -# CONFIG_AUTO_COMPLETE is not set +CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="RISC-V # " +CONFIG_CMD_IMLS=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_SF_TEST=y # CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_OF_BOARD=y CONFIG_ENV_IS_IN_SPI_FLASH=y @@ -25,6 +24,9 @@ CONFIG_MMC=y CONFIG_DM_MMC=y CONFIG_FTSDC010=y CONFIG_FTSDC010_SDIO=y +CONFIG_MTD=y +CONFIG_MTD_NOR_FLASH=y +CONFIG_CFI_FLASH=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/axm_defconfig b/configs/axm_defconfig index 69937a621fe..2e325d93579 100644 --- a/configs/axm_defconfig +++ b/configs/axm_defconfig @@ -9,10 +9,9 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus" CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2068,BOARD_AXM" CONFIG_BOOTDELAY=3 @@ -20,6 +19,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="\0addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}::off\0addtest=setenv bootargs ${bootargs} loglevel=4 test\0baudrate=115200\0boot_file=setenv bootfile /${project_dir}/kernel/uImage\0boot_retries=0\0bootcmd=run flash_self\0bootdelay=3\0ethact=macb0\0flash_nfs=run nand_kernel;run nfsargs;run addip;upgrade_available;bootm ${kernel_ram};reset\0flash_self=run nand_kernel;run setbootargs;upgrade_available;bootm ${kernel_ram};reset\0flash_self_test=run nand_kernel;run setbootargs addtest; upgrade_available;bootm ${kernel_ram};reset\0hostname=systemone\0kernel_Off=0x00200000\0kernel_Off_fallback=0x03800000\0kernel_ram=0x21500000\0kernel_size=0x00400000\0kernel_size_fallback=0x00400000\0loads_echo=1\0nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} ${kernel_size}\0net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};run nfsargs;run addip;upgrade_available;bootm ${kernel_ram};reset\0netdev=eth0\0nfsargs=run root_path;setenv bootargs ${bootargs} root=/dev/nfs rw nfsroot=${serverip}:${rootpath} at91sam9_wdt.wdt_timeout=16\0partitionset_active=A\0preboot=echo;echo Type 'run flash_self' to use kernel and root filesystem on memory;echo Type 'run flash_nfs' to use kernel from memory and root filesystem over NFS;echo Type 'run net_nfs' to get Kernel over TFTP and mount root filesystem over NFS;echo\0project_dir=systemone\0root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0rootfs=/dev/mtdblock5\0rootfs_fallback=/dev/mtdblock7\0setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops root=${rootfs} rootfstype=jffs2 panic=7 at91sam9_wdt.wdt_timeout=16\0stderr=serial\0stdin=serial\0stdout=serial\0upgrade_available=0\0" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_SPI_LOAD=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_BDI is not set diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig index 25b10888ced..d056719e14e 100644 --- a/configs/axs101_defconfig +++ b/configs/axs101_defconfig @@ -1,8 +1,11 @@ CONFIG_ARC=y CONFIG_TARGET_AXS101=y CONFIG_SYS_TEXT_BASE=0x81000000 +CONFIG_DEBUG_UART_BASE=0xe0022000 +CONFIG_DEBUG_UART_CLOCK=33333333 CONFIG_SYS_CLK_FREQ=750000000 CONFIG_DEFAULT_DEVICE_TREE="axs101" +CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS3,115200n8" @@ -33,6 +36,8 @@ CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_DM_SERIAL=y +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig index b9d387b88a8..f0fccf4d9f8 100644 --- a/configs/axs103_defconfig +++ b/configs/axs103_defconfig @@ -1,8 +1,11 @@ CONFIG_ARC=y CONFIG_ISA_ARCV2=y CONFIG_SYS_TEXT_BASE=0x81000000 +CONFIG_DEBUG_UART_BASE=0xe0022000 +CONFIG_DEBUG_UART_CLOCK=33333333 CONFIG_SYS_CLK_FREQ=100000000 CONFIG_DEFAULT_DEVICE_TREE="axs103" +CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS3,115200n8" @@ -33,6 +36,8 @@ CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_DM_SERIAL=y +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y diff --git a/configs/bananapi_m64_defconfig b/configs/bananapi_m64_defconfig index 47f31c6d9db..40c1c18aca4 100644 --- a/configs/bananapi_m64_defconfig +++ b/configs/bananapi_m64_defconfig @@ -12,4 +12,5 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-bananapi-m64" # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/bcm23550_w1d_defconfig b/configs/bcm23550_w1d_defconfig index 9a986ca9ae8..388415f7125 100644 --- a/configs/bcm23550_w1d_defconfig +++ b/configs/bcm23550_w1d_defconfig @@ -7,11 +7,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x80000000 -CONFIG_FASTBOOT_BUF_SIZE=0x1D000000 -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_CMD_BOOTZ=y CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set @@ -25,6 +20,11 @@ CONFIG_EFI_PARTITION=y # CONFIG_PARTITION_UUIDS is not set CONFIG_ENV_IS_IN_MMC=y # CONFIG_NET is not set +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x80000000 +CONFIG_FASTBOOT_BUF_SIZE=0x1D000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_KONA=y diff --git a/configs/bcm28155_ap_defconfig b/configs/bcm28155_ap_defconfig index d26cde5b0ed..37a87ccfa92 100644 --- a/configs/bcm28155_ap_defconfig +++ b/configs/bcm28155_ap_defconfig @@ -8,11 +8,6 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y # CONFIG_AUTOBOOT is not set -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x80000000 -CONFIG_FASTBOOT_BUF_SIZE=0x7FF00000 -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_CMD_BOOTZ=y CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set @@ -26,6 +21,11 @@ CONFIG_EFI_PARTITION=y # CONFIG_PARTITION_UUIDS is not set CONFIG_ENV_IS_IN_MMC=y # CONFIG_NET is not set +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x80000000 +CONFIG_FASTBOOT_BUF_SIZE=0x7FF00000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_KONA=y diff --git a/configs/birdland_bav335a_defconfig b/configs/birdland_bav335a_defconfig index 51b3e6b4e1a..67b81c678a3 100644 --- a/configs/birdland_bav335a_defconfig +++ b/configs/birdland_bav335a_defconfig @@ -7,11 +7,9 @@ CONFIG_AM33XX=y CONFIG_TARGET_BAV335X=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -# CONFIG_SPL_NAND_SUPPORT is not set -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FAT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_BAV_VERSION=1 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1" @@ -22,11 +20,11 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MUSB_NEW_SUPPORT=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_OS_BOOT=y CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x82000000 CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y @@ -46,6 +44,8 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x82000000 CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/birdland_bav335b_defconfig b/configs/birdland_bav335b_defconfig index 29b223a5806..86290ecedc2 100644 --- a/configs/birdland_bav335b_defconfig +++ b/configs/birdland_bav335b_defconfig @@ -7,11 +7,9 @@ CONFIG_AM33XX=y CONFIG_TARGET_BAV335X=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -# CONFIG_SPL_NAND_SUPPORT is not set -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FAT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_BAV_VERSION=2 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1" @@ -22,11 +20,11 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MUSB_NEW_SUPPORT=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_OS_BOOT=y CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x82000000 CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y @@ -46,6 +44,8 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x82000000 CONFIG_MMC_OMAP_HS=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig new file mode 100644 index 00000000000..40bce4e3748 --- /dev/null +++ b/configs/bitmain_antminer_s9_defconfig @@ -0,0 +1,66 @@ +CONFIG_ARM=y +CONFIG_SYS_VENDOR="bitmain" +CONFIG_SYS_BOARD="antminer_s9" +CONFIG_SYS_CONFIG_NAME="bitmain_antminer_s9" +CONFIG_ARCH_ZYNQ=y +CONFIG_SYS_TEXT_BASE=0x4000000 +CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xe0001000 +CONFIG_DEBUG_UART_CLOCK=50000000 +CONFIG_SPL_STACK_R_ADDR=0x200000 +CONFIG_DEFAULT_DEVICE_TREE="bitmain-antminer-s9" +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_BOOTDELAY=3 +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_STACK_R=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="antminer> " +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_DM is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_FPGA_LOADBP=y +CONFIG_CMD_FPGA_LOADFS=y +CONFIG_CMD_FPGA_LOADMK=y +CONFIG_CMD_FPGA_LOADP=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_MMC=y +CONFIG_CMD_NAND_LOCK_UNLOCK=y +CONFIG_CMD_PART=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_DHCP=y +# CONFIG_CMD_NFS is not set +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_PXE=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_EMBED=y +CONFIG_ENV_IS_IN_NAND=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_SYS_BOOTCOUNT_ADDR=0xEFFFFF0 +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_ZYNQPL=y +CONFIG_DM_GPIO=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ZYNQ=y +CONFIG_NAND=y +CONFIG_NAND_ZYNQ=y +CONFIG_NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS=y +CONFIG_ZYNQ_GEM=y +CONFIG_DEBUG_UART_ZYNQ=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ZYNQ_SERIAL=y +# CONFIG_WATCHDOG is not set +CONFIG_WDT=y +CONFIG_WDT_CDNS=y +# CONFIG_EFI_LOADER is not set diff --git a/configs/blanche_defconfig b/configs/blanche_defconfig index bd5fccac93d..a71c2a5ab3f 100644 --- a/configs/blanche_defconfig +++ b/configs/blanche_defconfig @@ -1,26 +1,49 @@ CONFIG_ARM=y +CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y CONFIG_ARCH_RMOBILE=y CONFIG_SYS_TEXT_BASE=0x00000000 -CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_ARCH_RMOBILE_BOARD_STRING="Blanche" CONFIG_R8A7792=y CONFIG_TARGET_BLANCHE=y CONFIG_DEFAULT_DEVICE_TREE="r8a7792-blanche-u-boot" +CONFIG_FIT=y +CONFIG_BOOTDELAY=3 CONFIG_VERSION_VARIABLE=y +CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y CONFIG_CMD_SDRAM=y +CONFIG_CMD_SF=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y +CONFIG_OF_EMBED=y CONFIG_ENV_IS_IN_FLASH=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_CLK=y +CONFIG_CLK_RENESAS=y +CONFIG_DM_GPIO=y +CONFIG_RCAR_GPIO=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_RCAR_IIC=y +CONFIG_DM_MMC=y +CONFIG_SH_MMCIF=y +CONFIG_RENESAS_SDHI=y CONFIG_MTD_NOR_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y @@ -28,5 +51,20 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_SMC911X=y CONFIG_SMC911X_BASE=0x18000000 -CONFIG_BAUDRATE=38400 +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_PCI_RCAR_GEN2=y +CONFIG_PINCTRL=y +CONFIG_PINCONF=y +CONFIG_PINCTRL_PFC=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y CONFIG_SCIF_CONSOLE=y +CONFIG_SPI=y +CONFIG_SH_QSPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_PCI=y +CONFIG_USB_STORAGE=y diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig index 5511f2c78ed..a9d0f71fbee 100644 --- a/configs/brppt1_mmc_defconfig +++ b/configs/brppt1_mmc_defconfig @@ -7,8 +7,6 @@ CONFIG_AM33XX=y CONFIG_TARGET_BRPPT1=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -# CONFIG_SPL_NAND_SUPPORT is not set -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,EMMC_BOOT" @@ -22,7 +20,9 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_I2C_SUPPORT=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/brppt1_nand_defconfig b/configs/brppt1_nand_defconfig index e00f409d7b7..ac50abc661c 100644 --- a/configs/brppt1_nand_defconfig +++ b/configs/brppt1_nand_defconfig @@ -6,7 +6,6 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_AM33XX=y CONFIG_TARGET_BRPPT1=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1" @@ -21,6 +20,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig index 8d4f1c12527..140a7ddfef4 100644 --- a/configs/brppt1_spi_defconfig +++ b/configs/brppt1_spi_defconfig @@ -7,11 +7,9 @@ CONFIG_AM33XX=y CONFIG_TARGET_BRPPT1=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -# CONFIG_SPL_NAND_SUPPORT is not set +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SPL=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,SPI_BOOT,EMMC_BOOT" CONFIG_SPI_BOOT=y @@ -25,8 +23,10 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_I2C_SUPPORT=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_SPI_LOAD=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig index d18bd939e54..94d17ec05d6 100644 --- a/configs/brxre1_defconfig +++ b/configs/brxre1_defconfig @@ -7,7 +7,6 @@ CONFIG_AM33XX=y CONFIG_TARGET_BRXRE1=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1" CONFIG_BOOTDELAY=-2 @@ -20,6 +19,7 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_I2C_SUPPORT=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y diff --git a/configs/cgtqmx6eval_defconfig b/configs/cgtqmx6eval_defconfig index d4204aa7122..95352a895b2 100644 --- a/configs/cgtqmx6eval_defconfig +++ b/configs/cgtqmx6eval_defconfig @@ -7,11 +7,10 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_CGTQMX6EVAL=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 # CONFIG_CONSOLE_MUX is not set @@ -22,10 +21,9 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="CGT-QMX6-Quad U-Boot > " -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_CMD_BOOTZ=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set @@ -51,6 +49,8 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DWC_AHSATA=y CONFIG_DFU_MMC=y CONFIG_DFU_SF=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_SPI=y diff --git a/configs/cherryhill_defconfig b/configs/cherryhill_defconfig index b0cc49fba81..4dd7ae54ee6 100644 --- a/configs/cherryhill_defconfig +++ b/configs/cherryhill_defconfig @@ -1,5 +1,7 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0xFFE00000 +CONFIG_DEBUG_UART_BASE=0x3f8 +CONFIG_DEBUG_UART_CLOCK=1843200 CONFIG_VENDOR_INTEL=y CONFIG_DEFAULT_DEVICE_TREE="cherryhill" CONFIG_TARGET_CHERRYHILL=y @@ -32,8 +34,6 @@ CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_CPU=y CONFIG_RTL8169=y -CONFIG_DEBUG_UART_BASE=0x3f8 -CONFIG_DEBUG_UART_CLOCK=1843200 CONFIG_SPI=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y diff --git a/configs/chiliboard_defconfig b/configs/chiliboard_defconfig index 66f28bd448d..09d7452ae4a 100644 --- a/configs/chiliboard_defconfig +++ b/configs/chiliboard_defconfig @@ -6,10 +6,9 @@ CONFIG_AM33XX=y CONFIG_TARGET_CHILIBOARD=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FAT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=1 # CONFIG_USE_BOOTCOMMAND is not set @@ -17,6 +16,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DEFAULT_FDT_FILE="am335x-chiliboard.dtb" CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index d1728ef6395..37121771df6 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -5,9 +5,11 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ROCKCHIP_RK3288=y # CONFIG_SPL_MMC_SUPPORT is not set CONFIG_TARGET_CHROMEBIT_MICKEY=y +CONFIG_DEBUG_UART_BASE=0xff690000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-mickey" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set @@ -16,8 +18,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SPL_SPI_LOAD=y -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -44,6 +44,9 @@ CONFIG_SPL_SYSCON=y # CONFIG_SPL_SIMPLE_BUS is not set CONFIG_CLK=y CONFIG_SPL_CLK=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_SYS_I2C_ROCKCHIP=y @@ -68,8 +71,6 @@ CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y -CONFIG_DEBUG_UART_BASE=0xff690000 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_ROCKCHIP_SERIAL=y CONFIG_ROCKCHIP_SPI=y diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index 43d93f4637a..1b1c53e687d 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -5,9 +5,11 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ROCKCHIP_RK3288=y # CONFIG_SPL_MMC_SUPPORT is not set CONFIG_TARGET_CHROMEBOOK_JERRY=y +CONFIG_DEBUG_UART_BASE=0xff690000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-jerry" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set @@ -18,8 +20,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SPL_SPI_LOAD=y -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -46,6 +46,9 @@ CONFIG_SPL_SYSCON=y # CONFIG_SPL_SIMPLE_BUS is not set CONFIG_CLK=y CONFIG_SPL_CLK=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_SYS_I2C_ROCKCHIP=y @@ -69,8 +72,6 @@ CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y -CONFIG_DEBUG_UART_BASE=0xff690000 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_ROCKCHIP_SERIAL=y CONFIG_ROCKCHIP_SPI=y diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig index 236f0bd7a48..59b6bd0dd1e 100644 --- a/configs/chromebook_link64_defconfig +++ b/configs/chromebook_link64_defconfig @@ -4,6 +4,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0x3f8 +CONFIG_DEBUG_UART_CLOCK=1843200 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_X86_RUN_64BIT=y @@ -63,9 +66,6 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_INTEL=y CONFIG_CROS_EC=y CONFIG_CROS_EC_LPC=y -CONFIG_DEBUG_UART_BASE=0x3f8 -CONFIG_DEBUG_UART_CLOCK=1843200 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_SPL_TIMER=y diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig index 2cedf06c2c0..f81b8dceb1f 100644 --- a/configs/chromebook_link_defconfig +++ b/configs/chromebook_link_defconfig @@ -1,6 +1,9 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0xFFF00000 CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0x3f8 +CONFIG_DEBUG_UART_CLOCK=1843200 CONFIG_VENDOR_GOOGLE=y CONFIG_DEFAULT_DEVICE_TREE="chromebook_link" CONFIG_TARGET_CHROMEBOOK_LINK=y @@ -47,9 +50,6 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_INTEL=y CONFIG_CROS_EC=y CONFIG_CROS_EC_LPC=y -CONFIG_DEBUG_UART_BASE=0x3f8 -CONFIG_DEBUG_UART_CLOCK=1843200 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_TIMER_EARLY=y diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index 706809ca53f..3455fe50a8b 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -5,9 +5,11 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ROCKCHIP_RK3288=y # CONFIG_SPL_MMC_SUPPORT is not set CONFIG_TARGET_CHROMEBOOK_MINNIE=y +CONFIG_DEBUG_UART_BASE=0xff690000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-minnie" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set @@ -17,8 +19,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SPL_SPI_LOAD=y -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -45,6 +45,9 @@ CONFIG_SPL_SYSCON=y # CONFIG_SPL_SIMPLE_BUS is not set CONFIG_CLK=y CONFIG_SPL_CLK=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_SYS_I2C_ROCKCHIP=y @@ -68,8 +71,6 @@ CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y -CONFIG_DEBUG_UART_BASE=0xff690000 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_ROCKCHIP_SERIAL=y CONFIG_ROCKCHIP_SPI=y diff --git a/configs/chromebook_samus_defconfig b/configs/chromebook_samus_defconfig index 5be5226e714..311de05241d 100644 --- a/configs/chromebook_samus_defconfig +++ b/configs/chromebook_samus_defconfig @@ -1,6 +1,9 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0xFFE00000 CONFIG_SYS_MALLOC_F_LEN=0x1800 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0x3f8 +CONFIG_DEBUG_UART_CLOCK=1843200 CONFIG_VENDOR_GOOGLE=y CONFIG_DEFAULT_DEVICE_TREE="chromebook_samus" CONFIG_TARGET_CHROMEBOOK_SAMUS=y @@ -45,9 +48,6 @@ CONFIG_SYSCON=y CONFIG_CPU=y CONFIG_CROS_EC=y CONFIG_CROS_EC_LPC=y -CONFIG_DEBUG_UART_BASE=0x3f8 -CONFIG_DEBUG_UART_CLOCK=1843200 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_TPM_TIS_LPC=y diff --git a/configs/cl-som-am57x_defconfig b/configs/cl-som-am57x_defconfig index 008b6e814ba..66b1f491dd1 100644 --- a/configs/cl-som-am57x_defconfig +++ b/configs/cl-som-am57x_defconfig @@ -2,13 +2,13 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_OMAP54XX=y CONFIG_TARGET_CL_SOM_AM57X=y -# CONFIG_SPL_NAND_SUPPORT is not set -CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_VERSION_VARIABLE=y # CONFIG_SPL_EXT_SUPPORT is not set +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_PROMPT="U-Boot# " CONFIG_CMD_ASKENV=y diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig index a582ee4024d..6d403eed7ad 100644 --- a/configs/cl-som-imx7_defconfig +++ b/configs/cl-som-imx7_defconfig @@ -7,9 +7,9 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_CL_SOM_IMX7=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig index 5e1733e11ba..7a9ee510171 100644 --- a/configs/clearfog_defconfig +++ b/configs/clearfog_defconfig @@ -1,14 +1,17 @@ CONFIG_ARM=y CONFIG_ARCH_MVEBU=y CONFIG_SYS_TEXT_BASE=0x00800000 +CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_CLEARFOG=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xd0012000 +CONFIG_DEBUG_UART_CLOCK=250000000 +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="armada-388-clearfog" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y @@ -19,6 +22,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x141 CONFIG_SPL_I2C_SUPPORT=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y @@ -33,6 +37,11 @@ CONFIG_CMD_TIME=y CONFIG_ENV_IS_IN_MMC=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_OF_TRANSLATE=y +CONFIG_SCSI_AHCI=y +CONFIG_DM_GPIO=y +CONFIG_DM_PCA953X=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MVTWSI=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_MV=y @@ -44,8 +53,7 @@ CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVNETA=y CONFIG_PCI=y -CONFIG_DEBUG_UART_BASE=0xd0012000 -CONFIG_DEBUG_UART_CLOCK=250000000 +CONFIG_SCSI=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index 65c4cbed12b..f10903ea45b 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -7,10 +7,9 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_CM_FX6=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SPL=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6q-cm-fx6" CONFIG_AHCI=y @@ -22,6 +21,7 @@ CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run legacy_bootcmd" CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x80 CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SYS_PROMPT="CM-FX6 # " # CONFIG_CMD_XIMG is not set CONFIG_CMD_GREPENV=y diff --git a/configs/cm_t335_defconfig b/configs/cm_t335_defconfig index 9b0eed8a698..a9848a588ef 100644 --- a/configs/cm_t335_defconfig +++ b/configs/cm_t335_defconfig @@ -7,10 +7,9 @@ CONFIG_AM33XX=y CONFIG_TARGET_CM_T335=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FAT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -19,6 +18,7 @@ CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set CONFIG_SYS_PROMPT="CM-T335 # " CONFIG_CMD_ASKENV=y diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig index b75043ad15c..0f9b0ca0c86 100644 --- a/configs/cm_t43_defconfig +++ b/configs/cm_t43_defconfig @@ -6,12 +6,11 @@ CONFIG_AM43XX=y CONFIG_TARGET_CM_T43=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y +CONFIG_SPL_FAT_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y -# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y -CONFIG_SPL_FAT_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -22,6 +21,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x480 CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MTD_SUPPORT=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_PROMPT="CM-T43 # " diff --git a/configs/cm_t54_defconfig b/configs/cm_t54_defconfig index a5d9c7e11a3..ed2e558578e 100644 --- a/configs/cm_t54_defconfig +++ b/configs/cm_t54_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_OMAP54XX=y CONFIG_TARGET_CM_T54=y CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC=16296 -# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y @@ -12,6 +11,7 @@ CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_SATA_SUPPORT=y CONFIG_SYS_PROMPT="CM-T54 # " CONFIG_CMD_ASKENV=y diff --git a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig index 86390b4abab..2dc2efe96a3 100644 --- a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig +++ b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig @@ -1,5 +1,7 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0xFFF00000 +CONFIG_DEBUG_UART_BASE=0x3f8 +CONFIG_DEBUG_UART_CLOCK=1843200 CONFIG_VENDOR_CONGATEC=y CONFIG_TARGET_CONGA_QEVAL20_QA3_E3845=y CONFIG_DEFAULT_DEVICE_TREE="conga-qeval20-qa3-e3845" @@ -53,8 +55,6 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_INTEL=y CONFIG_WINBOND_W83627=y CONFIG_E1000=y -CONFIG_DEBUG_UART_BASE=0x3f8 -CONFIG_DEBUG_UART_CLOCK=1843200 CONFIG_SPI=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig index 14a595162ed..a66a281edeb 100644 --- a/configs/controlcenterdc_defconfig +++ b/configs/controlcenterdc_defconfig @@ -5,9 +5,11 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_CONTROLCENTERDC=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xd0012000 +CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="armada-38x-controlcenterdc" CONFIG_DEBUG_UART=y CONFIG_FIT=y @@ -55,8 +57,6 @@ CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVNETA=y CONFIG_SCSI=y -CONFIG_DEBUG_UART_BASE=0xd0012000 -CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig index d90d4335e3d..0f91f6e8f0b 100644 --- a/configs/corvus_defconfig +++ b/configs/corvus_defconfig @@ -9,7 +9,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x800 CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g45-corvus" CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,MACH_TYPE=2066,SYS_USE_NANDFLASH" @@ -18,6 +17,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig index 72db1e74a0a..d054c21780c 100644 --- a/configs/d2net_v2_defconfig +++ b/configs/d2net_v2_defconfig @@ -3,6 +3,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NET2BIG_V2=y CONFIG_IDENT_STRING=" D2 v2" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-d2net" CONFIG_SYS_EXTRA_OPTIONS="D2NET_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -26,6 +27,7 @@ CONFIG_CMD_FAT=y CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y # CONFIG_PARTITION_UUIDS is not set +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set @@ -39,4 +41,3 @@ CONFIG_KIRKWOOD_SPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/da850_am18xxevm_defconfig b/configs/da850_am18xxevm_defconfig index a21d64050f9..c76321fb472 100644 --- a/configs/da850_am18xxevm_defconfig +++ b/configs/da850_am18xxevm_defconfig @@ -7,9 +7,9 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="da850-evm" CONFIG_SYS_EXTRA_OPTIONS="DA850_AM18X_EVM,SYS_I2C_EEPROM_ADDR_LEN=2,SYS_I2C_EEPROM_ADDR=0x50" CONFIG_BOOTDELAY=3 diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index dcadcec3e59..bb1368b9adf 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -6,9 +6,9 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="da850-evm" CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH" CONFIG_BOOTDELAY=3 diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig index 864c080f2b0..01f1be6de07 100644 --- a/configs/db-88f6720_defconfig +++ b/configs/db-88f6720_defconfig @@ -6,9 +6,11 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_DB_88F6720=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xf1012000 +CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="armada-375-db" CONFIG_DEBUG_UART=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set @@ -46,8 +48,6 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVPP2=y -CONFIG_DEBUG_UART_BASE=0xf1012000 -CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig index 4f05dfc359f..060c5d222e5 100644 --- a/configs/db-88f6820-amc_defconfig +++ b/configs/db-88f6820-amc_defconfig @@ -5,9 +5,11 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_DB_88F6820_AMC=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xd0012000 +CONFIG_DEBUG_UART_CLOCK=200000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="armada-385-amc" CONFIG_DEBUG_UART=y CONFIG_FIT=y @@ -53,8 +55,6 @@ CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVNETA=y CONFIG_PCI=y -CONFIG_DEBUG_UART_BASE=0xd0012000 -CONFIG_DEBUG_UART_CLOCK=200000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig index cfb80302522..2694fed8b97 100644 --- a/configs/db-88f6820-gp_defconfig +++ b/configs/db-88f6820-gp_defconfig @@ -6,9 +6,11 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_DB_88F6820_GP=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xd0012000 +CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="armada-388-gp" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 @@ -53,8 +55,6 @@ CONFIG_PHY_GIGE=y CONFIG_MVNETA=y CONFIG_PCI=y CONFIG_SCSI=y -CONFIG_DEBUG_UART_BASE=0xd0012000 -CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig index 6c1a62e771e..591501da43c 100644 --- a/configs/db-mv784mp-gp_defconfig +++ b/configs/db-mv784mp-gp_defconfig @@ -6,9 +6,11 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_DB_MV784MP_GP=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xd0012000 +CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="armada-xp-gp" CONFIG_DEBUG_UART=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set @@ -51,8 +53,6 @@ CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVNETA=y CONFIG_PCI=y -CONFIG_DEBUG_UART_BASE=0xd0012000 -CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig index 2f8be50a4dd..14c24ce6f2b 100644 --- a/configs/devkit3250_defconfig +++ b/configs/devkit3250_defconfig @@ -4,7 +4,6 @@ CONFIG_SYS_TEXT_BASE=0x83F00000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y @@ -14,6 +13,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_CMD_IMLS=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index df9fe11f039..db1460bcefe 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -7,10 +7,9 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_MX6_DDRCAL=y CONFIG_TARGET_DHCOMIMX6=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" @@ -19,6 +18,7 @@ CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_UNZIP=y CONFIG_CMD_DFU=y diff --git a/configs/display5_defconfig b/configs/display5_defconfig index db8212ca7cf..4db8a2bfb95 100644 --- a/configs/display5_defconfig +++ b/configs/display5_defconfig @@ -7,9 +7,9 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_DISPLAY5=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-display5" CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y @@ -53,10 +53,10 @@ CONFIG_EFI_PARTITION=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_FSL_ESDHC=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_SYS_BOOTCOUNT_ADDR=0x020CC068 +CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig index aa3bd4c8cfc..10b025ce04e 100644 --- a/configs/display5_factory_defconfig +++ b/configs/display5_factory_defconfig @@ -6,9 +6,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_DISPLAY5=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_FIT=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q" diff --git a/configs/dns325_defconfig b/configs/dns325_defconfig index f64038dfe0c..f0ed2099288 100644 --- a/configs/dns325_defconfig +++ b/configs/dns325_defconfig @@ -3,6 +3,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_DNS325=y CONFIG_IDENT_STRING="\nD-Link DNS-325" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dns325" CONFIG_BOOTDELAY=3 CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -23,6 +24,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=orion_nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:896k(u-boot),128k(u-boot-env),5m(kernel),-(rootfs)" CONFIG_CMD_UBI=y CONFIG_ISO_PARTITION=y +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set @@ -32,4 +34,3 @@ CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig index b7a65db37cf..1ed5cfe7d4e 100644 --- a/configs/dockstar_defconfig +++ b/configs/dockstar_defconfig @@ -3,6 +3,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_DOCKSTAR=y CONFIG_IDENT_STRING="\nSeagate FreeAgent DockStar" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dockstar" CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="DockStar> " @@ -19,6 +20,7 @@ CONFIG_CMD_JFFS2=y CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:1m(uboot),-(root)" CONFIG_CMD_UBI=y CONFIG_ISO_PARTITION=y +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y # CONFIG_MMC is not set CONFIG_NETDEVICES=y @@ -27,4 +29,3 @@ CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index 9b81b0cc716..f2429f0c2c0 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -4,10 +4,9 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_OMAP54XX=y CONFIG_TARGET_DRA7XX_EVM=y -# CONFIG_SPL_NAND_SUPPORT is not set +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_ARMV7_LPAE=y CONFIG_DEFAULT_DEVICE_TREE="dra7-evm" CONFIG_AHCI=y @@ -23,13 +22,9 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_DMA_SUPPORT=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_OS_BOOT=y CONFIG_SPL_SPI_LOAD=y -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x82000000 -CONFIG_FASTBOOT_BUF_SIZE=0x2F000000 -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=1 CONFIG_CMD_SPL=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set @@ -50,6 +45,12 @@ CONFIG_DWC_AHCI=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y CONFIG_DFU_SF=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x82000000 +CONFIG_FASTBOOT_BUF_SIZE=0x2F000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=1 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_DM_GPIO=y CONFIG_PCF8575_GPIO=y CONFIG_DM_I2C=y diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index 536946eb290..afdf33b556b 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -8,10 +8,9 @@ CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000 CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000 CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000 CONFIG_TARGET_DRA7XX_EVM=y -# CONFIG_SPL_NAND_SUPPORT is not set +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_ARMV7_LPAE=y CONFIG_DEFAULT_DEVICE_TREE="dra7-evm" CONFIG_AHCI=y @@ -29,12 +28,8 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_DMA_SUPPORT=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_SPI_LOAD=y -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x82000000 -CONFIG_FASTBOOT_BUF_SIZE=0x2F000000 -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=1 # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y @@ -50,6 +45,12 @@ CONFIG_DWC_AHCI=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y CONFIG_DFU_SF=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x82000000 +CONFIG_FASTBOOT_BUF_SIZE=0x2F000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=1 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_DM_GPIO=y CONFIG_PCF8575_GPIO=y CONFIG_DM_I2C=y diff --git a/configs/draco_defconfig b/configs/draco_defconfig index 9ddb3d278de..5c61659fe54 100644 --- a/configs/draco_defconfig +++ b/configs/draco_defconfig @@ -10,12 +10,11 @@ CONFIG_SYS_MPUCLK=300 CONFIG_TARGET_DRACO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y +CONFIG_SPL_FAT_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SPL=y -CONFIG_SPL_FAT_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_BOOTDELAY=3 @@ -24,6 +23,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set CONFIG_HUSH_PARSER=y diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig index e6114db2ce2..ae8a8da554d 100644 --- a/configs/dragonboard410c_defconfig +++ b/configs/dragonboard410c_defconfig @@ -28,6 +28,8 @@ CONFIG_LED_GPIO=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_MSM=y +CONFIG_PINCTRL=y +CONFIG_PINCONF=y CONFIG_DM_PMIC=y CONFIG_PMIC_PM8916=y CONFIG_MSM_SERIAL=y diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig index cbd2fb68ad9..8090c9a3779 100644 --- a/configs/dreamplug_defconfig +++ b/configs/dreamplug_defconfig @@ -3,6 +3,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_DREAMPLUG=y CONFIG_IDENT_STRING="\nMarvell-DreamPlug" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dreamplug" CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y @@ -19,6 +20,7 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_ISO_PARTITION=y +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set @@ -32,4 +34,3 @@ CONFIG_KIRKWOOD_SPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/ds109_defconfig b/configs/ds109_defconfig index 43e92d7ef29..c9207433b37 100644 --- a/configs/ds109_defconfig +++ b/configs/ds109_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_DS109=y +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ds109" CONFIG_HUSH_PARSER=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y @@ -14,6 +15,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_DATE=y CONFIG_CMD_FAT=y CONFIG_ISO_PARTITION=y +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig index 7d3b8f99392..21602a77fc7 100644 --- a/configs/ds414_defconfig +++ b/configs/ds414_defconfig @@ -6,9 +6,11 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_DS414=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xd0012000 +CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="armada-xp-synology-ds414" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 @@ -46,8 +48,6 @@ CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVNETA=y CONFIG_PCI=y -CONFIG_DEBUG_UART_BASE=0xd0012000 -CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/duovero_defconfig b/configs/duovero_defconfig index 2466b444c74..bc3e27981ba 100644 --- a/configs/duovero_defconfig +++ b/configs/duovero_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_OMAP44XX=y CONFIG_TARGET_DUOVERO=y -# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run findfdt; run init_console; run envboot; run distro_bootcmd" @@ -10,6 +9,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y # CONFIG_SPL_I2C_SUPPORT is not set +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SYS_PROMPT="duovero # " CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set diff --git a/configs/edminiv2_defconfig b/configs/edminiv2_defconfig index 1ad1fb77903..5abf81dedd9 100644 --- a/configs/edminiv2_defconfig +++ b/configs/edminiv2_defconfig @@ -26,6 +26,8 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y +CONFIG_NETDEVICES=y +CONFIG_MVGBE=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/efi-x86_defconfig b/configs/efi-x86_defconfig index 4cf55548abf..815b51e27a5 100644 --- a/configs/efi-x86_defconfig +++ b/configs/efi-x86_defconfig @@ -1,4 +1,6 @@ CONFIG_X86=y +CONFIG_DEBUG_UART_BASE=0 +CONFIG_DEBUG_UART_CLOCK=0 CONFIG_VENDOR_EFI=y CONFIG_DEFAULT_DEVICE_TREE="efi" CONFIG_TARGET_EFI=y @@ -30,8 +32,6 @@ CONFIG_EFI_PARTITION=y CONFIG_OF_EMBED=y # CONFIG_DM_ETH is not set CONFIG_DEBUG_EFI_CONSOLE=y -CONFIG_DEBUG_UART_BASE=0 -CONFIG_DEBUG_UART_CLOCK=0 CONFIG_SPI=y CONFIG_ICH_SPI=y # CONFIG_REGEX is not set diff --git a/configs/emdk_defconfig b/configs/emdk_defconfig new file mode 100644 index 00000000000..e3bccd234fc --- /dev/null +++ b/configs/emdk_defconfig @@ -0,0 +1,31 @@ +CONFIG_ARC=y +CONFIG_ISA_ARCV2=y +CONFIG_CPU_ARCEM6=y +CONFIG_TARGET_EMDK=y +CONFIG_SYS_TEXT_BASE=0x00000000 +CONFIG_SYS_CLK_FREQ=40000000 +CONFIG_DEFAULT_DEVICE_TREE="emdk" +# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +CONFIG_VERSION_VARIABLE=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="emdk# " +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_XIMG is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_OF_EMBED=y +CONFIG_ENV_IS_IN_FAT=y +CONFIG_ENV_FAT_INTERFACE="mmc" +CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" +# CONFIG_NET is not set +CONFIG_DM=y +CONFIG_MMC=y +CONFIG_MMC_DW=y +CONFIG_DM_SERIAL=y +CONFIG_SYS_NS16550=y +CONFIG_FS_FAT_MAX_CLUSTSIZE=4096 +CONFIG_USE_PRIVATE_LIBGCC=y +CONFIG_PANIC_HANG=y diff --git a/configs/etamin_defconfig b/configs/etamin_defconfig index 6521aa89869..3bb9b2e34e6 100644 --- a/configs/etamin_defconfig +++ b/configs/etamin_defconfig @@ -10,12 +10,11 @@ CONFIG_SYS_MPUCLK=300 CONFIG_TARGET_ETAMIN=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y +CONFIG_SPL_FAT_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SPL=y -CONFIG_SPL_FAT_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_BOOTDELAY=3 @@ -24,6 +23,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set CONFIG_HUSH_PARSER=y diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig index c03682c9273..c3b1c058421 100644 --- a/configs/evb-px5_defconfig +++ b/configs/evb-px5_defconfig @@ -4,6 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SYS_MALLOC_F_LEN=0x1000 CONFIG_ROCKCHIP_RK3368=y CONFIG_TARGET_EVB_PX5=y +CONFIG_DEBUG_UART_BASE=0xFF1c0000 +CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEFAULT_DEVICE_TREE="rk3368-px5-evb" CONFIG_DEBUG_UART=y CONFIG_ANDROID_BOOT_IMAGE=y @@ -20,8 +22,6 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_PINCTRL=y CONFIG_PINCTRL_ROCKCHIP_RK3368=y CONFIG_RAM=y -CONFIG_DEBUG_UART_BASE=0xFF1c0000 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig index 33775e8cddd..ca2e5b1e340 100644 --- a/configs/evb-rk3036_defconfig +++ b/configs/evb-rk3036_defconfig @@ -6,17 +6,17 @@ CONFIG_SYS_TEXT_BASE=0x60000000 CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ROCKCHIP_RK3036=y CONFIG_TARGET_EVB_RK3036=y +CONFIG_SPL_SYS_MALLOC_F_LEN=0x0 +CONFIG_DEBUG_UART_BASE=0x20068000 +CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk" CONFIG_DEBUG_UART=y -CONFIG_SPL_SYS_MALLOC_F_LEN=0x0 # CONFIG_ANDROID_BOOT_IMAGE is not set # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_STACK_R=y -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -31,6 +31,9 @@ CONFIG_SPL_PARTITION_UUIDS=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_CLK=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_LED=y @@ -39,8 +42,6 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_PINCTRL=y CONFIG_PINCTRL_ROCKCHIP_RK3036=y # CONFIG_SPL_DM_SERIAL is not set -CONFIG_DEBUG_UART_BASE=0x20068000 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y CONFIG_USB=y diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig index 796d0ec92e6..941320d5669 100644 --- a/configs/evb-rk3128_defconfig +++ b/configs/evb-rk3128_defconfig @@ -2,15 +2,13 @@ CONFIG_ARM=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x60000000 CONFIG_ROCKCHIP_RK3128=y +CONFIG_DEBUG_UART_BASE=0x20068000 +CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEFAULT_DEVICE_TREE="rk3128-evb" CONFIG_DEBUG_UART=y CONFIG_FIT=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_FASTBOOT_BUF_ADDR=0x60800800 -CONFIG_FASTBOOT_BUF_SIZE=0x04000000 -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y @@ -20,6 +18,11 @@ CONFIG_CMD_TIME=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_CLK=y +CONFIG_FASTBOOT_BUF_ADDR=0x60800800 +CONFIG_FASTBOOT_BUF_SIZE=0x04000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MMC_DW=y @@ -31,8 +34,6 @@ CONFIG_REGULATOR_PWM=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_RAM=y CONFIG_DM_RESET=y -CONFIG_DEBUG_UART_BASE=0x20068000 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y CONFIG_USB=y diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig index 710b0b4e1a9..d296d6faf03 100644 --- a/configs/evb-rk3229_defconfig +++ b/configs/evb-rk3229_defconfig @@ -7,6 +7,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x800 CONFIG_ROCKCHIP_RK322X=y CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y CONFIG_TARGET_EVB_RK3229=y +CONFIG_DEBUG_UART_BASE=0x11030000 +CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb" CONFIG_DEBUG_UART=y @@ -14,8 +16,6 @@ CONFIG_DEBUG_UART=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200 -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y # CONFIG_CMD_SETEXPR is not set @@ -30,6 +30,9 @@ CONFIG_SYSCON=y CONFIG_SPL_SYSCON=y CONFIG_CLK=y CONFIG_SPL_CLK=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MMC_DW=y @@ -43,8 +46,6 @@ CONFIG_PINCTRL_ROCKCHIP_RK322X=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000 -CONFIG_DEBUG_UART_BASE=0x11030000 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y CONFIG_USB=y diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig index 7695277daf3..7bb6b13e223 100644 --- a/configs/evb-rk3288_defconfig +++ b/configs/evb-rk3288_defconfig @@ -5,6 +5,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ROCKCHIP_RK3288=y CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y CONFIG_TARGET_EVB_RK3288=y +CONFIG_DEBUG_UART_BASE=0xff690000 +CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb" CONFIG_DEBUG_UART=y @@ -14,8 +16,6 @@ CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -41,6 +41,9 @@ CONFIG_SYSCON=y CONFIG_SPL_SYSCON=y CONFIG_CLK=y CONFIG_SPL_CLK=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_LED=y @@ -61,8 +64,6 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y -CONFIG_DEBUG_UART_BASE=0xff690000 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y CONFIG_USB=y diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig index 78ae24b56b2..a32cadab20e 100644 --- a/configs/evb-rk3328_defconfig +++ b/configs/evb-rk3328_defconfig @@ -2,15 +2,14 @@ CONFIG_ARM=y CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_ROCKCHIP_RK3328=y +CONFIG_DEBUG_UART_BASE=0xFF130000 +CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEFAULT_DEVICE_TREE="rk3328-evb" CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_FASTBOOT_BUF_ADDR=0x800800 -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=1 CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y @@ -23,6 +22,10 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_CLK=y +CONFIG_FASTBOOT_BUF_ADDR=0x800800 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=1 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MMC_DW=y @@ -41,8 +44,6 @@ CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_BAUDRATE=1500000 -CONFIG_DEBUG_UART_BASE=0xFF130000 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y CONFIG_USB=y diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index 05ad0da3361..3f4128375a8 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -6,6 +6,8 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_ROCKCHIP_RK3399=y CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 +CONFIG_DEBUG_UART_BASE=0xFF1A0000 +CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb" CONFIG_DEBUG_UART=y @@ -56,8 +58,6 @@ CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000 -CONFIG_DEBUG_UART_BASE=0xFF1A0000 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y CONFIG_USB=y diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig index d72f0d42e83..b6b27ff6340 100644 --- a/configs/evb-rv1108_defconfig +++ b/configs/evb-rv1108_defconfig @@ -3,15 +3,13 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_SYS_TEXT_BASE=0x60000000 CONFIG_ROCKCHIP_RV1108=y CONFIG_TARGET_EVB_RV1108=y +CONFIG_DEBUG_UART_BASE=0x10210000 +CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEFAULT_DEVICE_TREE="rv1108-evb" CONFIG_DEBUG_UART=y # CONFIG_USE_BOOTCOMMAND is not set # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_FASTBOOT_BUF_ADDR=0x62000000 -CONFIG_FASTBOOT_BUF_SIZE=0x08000000 -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=1 CONFIG_RANDOM_UUID=y CONFIG_CMD_SF=y CONFIG_CMD_USB=y @@ -22,6 +20,10 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_CLK=y +CONFIG_FASTBOOT_BUF_ADDR=0x62000000 +CONFIG_FASTBOOT_BUF_SIZE=0x08000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=1 CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_SPI_FLASH=y @@ -37,8 +39,6 @@ CONFIG_PINCTRL_ROCKCHIP_RV1108=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_BAUDRATE=1500000 # CONFIG_SPL_SERIAL_PRESENT is not set -CONFIG_DEBUG_UART_BASE=0x10210000 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y CONFIG_USB=y diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig index efdd583cf6e..a8dd95dcc0a 100644 --- a/configs/fennec-rk3288_defconfig +++ b/configs/fennec-rk3288_defconfig @@ -5,6 +5,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ROCKCHIP_RK3288=y CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y CONFIG_TARGET_FENNEC_RK3288=y +CONFIG_DEBUG_UART_BASE=0xff690000 +CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-fennec" CONFIG_DEBUG_UART=y @@ -15,8 +17,6 @@ CONFIG_CONSOLE_MUX=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -42,6 +42,9 @@ CONFIG_SPL_SYSCON=y # CONFIG_SPL_SIMPLE_BUS is not set CONFIG_CLK=y CONFIG_SPL_CLK=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MMC_DW=y @@ -60,8 +63,6 @@ CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y -CONFIG_DEBUG_UART_BASE=0xff690000 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y CONFIG_USB=y diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index b252d274640..64f60bd606a 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -5,6 +5,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ROCKCHIP_RK3288=y CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y CONFIG_TARGET_FIREFLY_RK3288=y +CONFIG_DEBUG_UART_BASE=0xff690000 +CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly" CONFIG_DEBUG_UART=y @@ -14,8 +16,6 @@ CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -42,6 +42,9 @@ CONFIG_SPL_SYSCON=y # CONFIG_SPL_SIMPLE_BUS is not set CONFIG_CLK=y CONFIG_SPL_CLK=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_DM_KEYBOARD=y @@ -64,8 +67,6 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y -CONFIG_DEBUG_UART_BASE=0xff690000 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y CONFIG_USB=y diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig index 19c0b110401..a9f94c8e4e0 100644 --- a/configs/firefly-rk3399_defconfig +++ b/configs/firefly-rk3399_defconfig @@ -6,6 +6,8 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_ROCKCHIP_RK3399=y CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 +CONFIG_DEBUG_UART_BASE=0xFF1A0000 +CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-firefly" CONFIG_DEBUG_UART=y @@ -55,8 +57,6 @@ CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000 -CONFIG_DEBUG_UART_BASE=0xFF1A0000 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y CONFIG_USB=y diff --git a/configs/ge_b650v3_defconfig b/configs/ge_b650v3_defconfig deleted file mode 100644 index ccea22503eb..00000000000 --- a/configs/ge_b650v3_defconfig +++ /dev/null @@ -1,43 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_MX6=y -CONFIG_SYS_TEXT_BASE=0x17800000 -CONFIG_TARGET_GE_B650V3=y -# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_FIT=y -CONFIG_BOOTDELAY=1 -CONFIG_SYS_CONSOLE_IS_IN_ENV=y -CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y -CONFIG_SUPPORT_RAW_INITRD=y -CONFIG_DEFAULT_FDT_FILE="imx6q-b650v3.dtb" -CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_LAST_STAGE_INIT=y -CONFIG_HUSH_PARSER=y -CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_GPIO=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_PCI=y -CONFIG_CMD_SF=y -# CONFIG_CMD_NFS is not set -CONFIG_CMD_CACHE=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FS_GENERIC=y -CONFIG_DOS_PARTITION=y -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_BOOTCOUNT_LIMIT=y -CONFIG_BOOTCOUNT_EXT=y -CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="1:5" -CONFIG_SYS_BOOTCOUNT_ADDR=0x7000A000 -CONFIG_FSL_ESDHC=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_NETDEVICES=y -CONFIG_E1000=y -CONFIG_CMD_E1000=y -CONFIG_SPI=y -CONFIG_MXC_SPI=y -CONFIG_OF_LIBFDT=y -# CONFIG_EFI_LOADER is not set diff --git a/configs/ge_b850v3_defconfig b/configs/ge_b850v3_defconfig deleted file mode 100644 index 53d063fd127..00000000000 --- a/configs/ge_b850v3_defconfig +++ /dev/null @@ -1,43 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_MX6=y -CONFIG_SYS_TEXT_BASE=0x17800000 -CONFIG_TARGET_GE_B850V3=y -# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_FIT=y -CONFIG_BOOTDELAY=1 -CONFIG_SYS_CONSOLE_IS_IN_ENV=y -CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y -CONFIG_SUPPORT_RAW_INITRD=y -CONFIG_DEFAULT_FDT_FILE="imx6q-b850v3.dtb" -CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_LAST_STAGE_INIT=y -CONFIG_HUSH_PARSER=y -CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_GPIO=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_PCI=y -CONFIG_CMD_SF=y -# CONFIG_CMD_NFS is not set -CONFIG_CMD_CACHE=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FS_GENERIC=y -CONFIG_DOS_PARTITION=y -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_BOOTCOUNT_LIMIT=y -CONFIG_BOOTCOUNT_EXT=y -CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="1:5" -CONFIG_SYS_BOOTCOUNT_ADDR=0x7000A000 -CONFIG_FSL_ESDHC=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_NETDEVICES=y -CONFIG_E1000=y -CONFIG_CMD_E1000=y -CONFIG_SPI=y -CONFIG_MXC_SPI=y -CONFIG_OF_LIBFDT=y -# CONFIG_EFI_LOADER is not set diff --git a/configs/ge_b450v3_defconfig b/configs/ge_bx50v3_defconfig index 1be7fe0bd10..b312920a254 100644 --- a/configs/ge_b450v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -1,14 +1,13 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 -CONFIG_TARGET_GE_B450V3=y +CONFIG_TARGET_GE_BX50V3=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y CONFIG_BOOTDELAY=1 CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SUPPORT_RAW_INITRD=y -CONFIG_DEFAULT_FDT_FILE="imx6q-b450v3.dtb" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y @@ -34,6 +33,7 @@ CONFIG_SYS_BOOTCOUNT_ADDR=0x7000A000 CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_CMD_E1000=y diff --git a/configs/geekbox_defconfig b/configs/geekbox_defconfig index 4644e8dca5d..608543cb8c6 100644 --- a/configs/geekbox_defconfig +++ b/configs/geekbox_defconfig @@ -4,6 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SYS_MALLOC_F_LEN=0x1000 CONFIG_ROCKCHIP_RK3368=y CONFIG_TARGET_GEEKBOX=y +CONFIG_DEBUG_UART_BASE=0xFF690000 +CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEFAULT_DEVICE_TREE="rk3368-geekbox" CONFIG_DEBUG_UART=y # CONFIG_DISPLAY_CPUINFO is not set @@ -14,8 +16,6 @@ CONFIG_CLK=y CONFIG_PINCTRL=y CONFIG_PINCTRL_ROCKCHIP_RK3368=y CONFIG_RAM=y -CONFIG_DEBUG_UART_BASE=0xFF690000 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig index 3b3abd52c7f..c0894c05ea4 100644 --- a/configs/goflexhome_defconfig +++ b/configs/goflexhome_defconfig @@ -3,6 +3,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_GOFLEXHOME=y CONFIG_IDENT_STRING="\nSeagate GoFlex Home" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-goflexnet" CONFIG_BOOTDELAY=3 CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -24,6 +25,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=orion_nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:1m(uboot),6M(uImage),-(root)" CONFIG_CMD_UBI=y CONFIG_ISO_PARTITION=y +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set @@ -33,4 +35,3 @@ CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/gose_defconfig b/configs/gose_defconfig index 84798876047..50f15181e97 100644 --- a/configs/gose_defconfig +++ b/configs/gose_defconfig @@ -11,11 +11,11 @@ CONFIG_ARCH_RMOBILE_BOARD_STRING="Gose" CONFIG_R8A7793=y CONFIG_TARGET_GOSE=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="r8a7793-gose-u-boot" -CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_VERSION_VARIABLE=y @@ -46,6 +46,9 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y +CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nor0=spi0.0" +CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:256k(u-boot-spl),512k(u-boot-env1),512k(u-boot-env2),768k(u-boot),-(user)" CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_ENV_IS_IN_SPI_FLASH=y @@ -57,9 +60,11 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_RCAR_IIC=y CONFIG_DM_MMC=y CONFIG_RENESAS_SDHI=y +CONFIG_MTD=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_MTD=y CONFIG_PHY_MICREL=y CONFIG_DM_ETH=y CONFIG_SH_ETHER=y diff --git a/configs/guruplug_defconfig b/configs/guruplug_defconfig index 5389cdd07e3..da3895d4db9 100644 --- a/configs/guruplug_defconfig +++ b/configs/guruplug_defconfig @@ -3,6 +3,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_GURUPLUG=y CONFIG_IDENT_STRING="\nMarvell-GuruPlug" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-guruplug-server-plus" CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y @@ -24,6 +25,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=orion_nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:896K(uboot),128K(uboot_env),-@1M(root)" CONFIG_CMD_UBI=y CONFIG_ISO_PARTITION=y +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set @@ -34,4 +36,3 @@ CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_LZMA=y -CONFIG_OF_LIBFDT=y diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index c77de886da6..dbb9fba4d90 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -9,7 +9,6 @@ CONFIG_CMD_EECONFIG=y CONFIG_CMD_GSC=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_STACK_R_ADDR=0x18000000 CONFIG_CMD_HDMIDETECT=y @@ -28,6 +27,7 @@ CONFIG_SPL_DMA_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Ventana > " CONFIG_CMD_BOOTZ=y @@ -56,6 +56,7 @@ CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y CONFIG_DWC_AHSATA=y +CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_NETDEVICES=y diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index 007b49abc80..366daefdc19 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -9,7 +9,6 @@ CONFIG_CMD_EECONFIG=y CONFIG_CMD_GSC=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_STACK_R_ADDR=0x18000000 CONFIG_CMD_HDMIDETECT=y @@ -28,6 +27,7 @@ CONFIG_SPL_DMA_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Ventana > " CONFIG_CMD_BOOTZ=y @@ -56,6 +56,7 @@ CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y CONFIG_DWC_AHSATA=y +CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_MV88E61XX_SWITCH=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index 1de70818eff..f4d35a62b83 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -9,8 +9,6 @@ CONFIG_CMD_EECONFIG=y CONFIG_CMD_GSC=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_STACK_R_ADDR=0x18000000 CONFIG_CMD_HDMIDETECT=y @@ -27,8 +25,10 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_DMA_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Ventana > " CONFIG_CMD_BOOTZ=y @@ -58,6 +58,7 @@ CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y CONFIG_DWC_AHSATA=y +CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_FSL_ESDHC=y CONFIG_NAND=y CONFIG_NAND_MXS=y diff --git a/configs/harmony_defconfig b/configs/harmony_defconfig index 9d4235b3a72..c3742e909ed 100644 --- a/configs/harmony_defconfig +++ b/configs/harmony_defconfig @@ -26,11 +26,11 @@ CONFIG_CMD_UBI=y CONFIG_OF_LIVE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SPL_DM=y +CONFIG_MTD=y +CONFIG_MTD_UBI_FASTMAP=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y -CONFIG_MTD=y -CONFIG_MTD_UBI_FASTMAP=y CONFIG_DM_PMIC=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y diff --git a/configs/hsdk_defconfig b/configs/hsdk_defconfig index d23acfeb878..eec19478c6b 100644 --- a/configs/hsdk_defconfig +++ b/configs/hsdk_defconfig @@ -2,8 +2,11 @@ CONFIG_ARC=y CONFIG_ISA_ARCV2=y CONFIG_TARGET_HSDK=y CONFIG_SYS_TEXT_BASE=0x81000000 +CONFIG_DEBUG_UART_BASE=0xf0005000 +CONFIG_DEBUG_UART_CLOCK=33333333 CONFIG_SYS_CLK_FREQ=500000000 CONFIG_DEFAULT_DEVICE_TREE="hsdk" +CONFIG_DEBUG_UART=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_BOARD_EARLY_INIT_F=y @@ -42,6 +45,8 @@ CONFIG_SPI_FLASH_SST=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_DM_SERIAL=y +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/ib62x0_defconfig b/configs/ib62x0_defconfig index cb629bbfb90..20a26d45052 100644 --- a/configs/ib62x0_defconfig +++ b/configs/ib62x0_defconfig @@ -3,6 +3,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_IB62X0=y CONFIG_IDENT_STRING=" RaidSonic ICY BOX IB-NAS62x0" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ib62x0" CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y @@ -22,6 +23,7 @@ CONFIG_CMD_JFFS2=y CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0xe0000@0x0(uboot),0x20000@0xe0000(uboot_env),-@0x100000(root)" CONFIG_CMD_UBI=y CONFIG_ISO_PARTITION=y +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set @@ -32,4 +34,3 @@ CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_LZMA=y -CONFIG_OF_LIBFDT=y diff --git a/configs/iconnect_defconfig b/configs/iconnect_defconfig index bdd01d13873..736db90cd71 100644 --- a/configs/iconnect_defconfig +++ b/configs/iconnect_defconfig @@ -3,6 +3,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_ICONNECT=y CONFIG_IDENT_STRING=" Iomega iConnect" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-iconnect" CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="iconnect => " @@ -18,6 +19,7 @@ CONFIG_CMD_JFFS2=y CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0x80000@0x0(uboot),0x20000@0x80000(uboot_env),-@0xa0000(rootfs)" CONFIG_CMD_UBI=y CONFIG_ISO_PARTITION=y +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y # CONFIG_MMC is not set CONFIG_NETDEVICES=y @@ -27,4 +29,3 @@ CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_LZMA=y -CONFIG_OF_LIBFDT=y diff --git a/configs/imx6dl_icore_nand_defconfig b/configs/imx6dl_icore_nand_defconfig index c34e3ac2239..0286be8e76f 100644 --- a/configs/imx6dl_icore_nand_defconfig +++ b/configs/imx6dl_icore_nand_defconfig @@ -6,7 +6,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6dl-icore" @@ -17,6 +16,7 @@ CONFIG_IMAGE_FORMAT_LEGACY=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_SPL_DMA_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl> " CONFIG_CMD_MEMTEST=y diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig new file mode 100644 index 00000000000..7df14d0e95f --- /dev/null +++ b/configs/imx6dl_mamoj_defconfig @@ -0,0 +1,44 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_SYS_TEXT_BASE=0x17800000 +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SECURE_BOOT=y +CONFIG_TARGET_MX6DL_MAMOJ=y +# CONFIG_CMD_BMODE is not set +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-mamoj" +CONFIG_DISTRO_DEFAULTS=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" +CONFIG_BOOTDELAY=3 +CONFIG_SPL_OS_BOOT=y +CONFIG_CRC32_VERIFY=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_DFU=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_PMIC=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_DFU_MMC=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x12000000 +CONFIG_FASTBOOT_BUF_SIZE=0x10000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=2 +CONFIG_SYS_I2C_MXC=y +CONFIG_FSL_ESDHC=y +CONFIG_PHYLIB=y +CONFIG_PHY_MICREL=y +CONFIG_FEC_MXC=y +CONFIG_PINCTRL_IMX6=y +CONFIG_MXC_UART=y +CONFIG_IMX_THERMAL=y +CONFIG_USB=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 +CONFIG_CI_UDC=y diff --git a/configs/imx6q_icore_nand_defconfig b/configs/imx6q_icore_nand_defconfig index f8477a98b5e..65984a6c641 100644 --- a/configs/imx6q_icore_nand_defconfig +++ b/configs/imx6q_icore_nand_defconfig @@ -6,7 +6,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" @@ -18,6 +17,7 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SPL_DMA_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl> " CONFIG_CMD_MEMTEST=y diff --git a/configs/imx6qdl_icore_mipi_defconfig b/configs/imx6qdl_icore_mipi_defconfig index 17fff72bff8..28aa5dd71de 100644 --- a/configs/imx6qdl_icore_mipi_defconfig +++ b/configs/imx6qdl_icore_mipi_defconfig @@ -7,9 +7,10 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0x021f0000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-mipi" CONFIG_DEBUG_UART=y @@ -22,6 +23,7 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SPL_OS_BOOT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl-mipi> " CONFIG_CRC32_VERIFY=y @@ -47,7 +49,5 @@ CONFIG_FEC_MXC=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DEBUG_UART_MXC=y -CONFIG_DEBUG_UART_BASE=0x021f0000 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index 948894e0dd3..6ed1cdd6fe4 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -7,9 +7,10 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0x021f0000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" CONFIG_DEBUG_UART=y @@ -22,6 +23,7 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SPL_OS_BOOT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl> " CONFIG_CRC32_VERIFY=y @@ -52,8 +54,6 @@ CONFIG_FEC_MXC=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DEBUG_UART_MXC=y -CONFIG_DEBUG_UART_BASE=0x021f0000 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y CONFIG_VIDEO=y diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index f8477a98b5e..65984a6c641 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -6,7 +6,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" @@ -18,6 +17,7 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SPL_DMA_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl> " CONFIG_CMD_MEMTEST=y diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig index 2e49fe34461..6fa494a6f9a 100644 --- a/configs/imx6qdl_icore_rqs_defconfig +++ b/configs/imx6qdl_icore_rqs_defconfig @@ -7,9 +7,8 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-rqs" CONFIG_FIT=y @@ -21,6 +20,7 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SPL_OS_BOOT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl-rqs> " CONFIG_CRC32_VERIFY=y diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig index 6530667fb8a..4ae09fff116 100644 --- a/configs/imx6ul_geam_mmc_defconfig +++ b/configs/imx6ul_geam_mmc_defconfig @@ -7,9 +7,8 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_MX6UL_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6ul-geam-kit" CONFIG_FIT=y @@ -19,6 +18,7 @@ CONFIG_IMAGE_FORMAT_LEGACY=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="geam6ul> " CONFIG_CRC32_VERIFY=y diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig index 243ab399c6e..e8f9cb44785 100644 --- a/configs/imx6ul_geam_nand_defconfig +++ b/configs/imx6ul_geam_nand_defconfig @@ -6,7 +6,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_MX6UL_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6ul-geam-kit" @@ -18,6 +17,7 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SPL_DMA_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="geam6ul> " CONFIG_CRC32_VERIFY=y diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig index 1fa41f6c85b..684f23164b3 100644 --- a/configs/imx6ul_isiot_emmc_defconfig +++ b/configs/imx6ul_isiot_emmc_defconfig @@ -7,9 +7,8 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_MX6UL_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-emmc" CONFIG_FIT=y @@ -19,6 +18,7 @@ CONFIG_IMAGE_FORMAT_LEGACY=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="isiotmx6ul> " CONFIG_CRC32_VERIFY=y diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig index d738c0b7d48..c976ab34096 100644 --- a/configs/imx6ul_isiot_nand_defconfig +++ b/configs/imx6ul_isiot_nand_defconfig @@ -6,7 +6,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_MX6UL_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-nand" @@ -18,6 +17,7 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SPL_DMA_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="isiotmx6ul> " CONFIG_CRC32_VERIFY=y diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig index 9f8677b7447..2fb7209f31a 100644 --- a/configs/inetspace_v2_defconfig +++ b/configs/inetspace_v2_defconfig @@ -3,6 +3,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NETSPACE_V2=y CONFIG_IDENT_STRING=" IS v2" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-is2" CONFIG_SYS_EXTRA_OPTIONS="INETSPACE_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -26,6 +27,7 @@ CONFIG_CMD_FAT=y CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y # CONFIG_PARTITION_UUIDS is not set +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set @@ -39,4 +41,3 @@ CONFIG_KIRKWOOD_SPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/ipam390_defconfig b/configs/ipam390_defconfig index e495a8c8b84..15c4944b3b0 100644 --- a/configs/ipam390_defconfig +++ b/configs/ipam390_defconfig @@ -6,13 +6,13 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot > " diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index 5d9b79b70b0..3307839829f 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -6,9 +6,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_K2E_EVM=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index 306901f587a..ede8f6a7014 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -6,9 +6,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_K2G_EVM=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index d06fa12d3cf..fa800f5ef7e 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -6,9 +6,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_K2HK_EVM=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index be607e2f985..1034d36455c 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -6,9 +6,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_K2L_EVM=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="keystone-k2l-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/kc1_defconfig b/configs/kc1_defconfig index 534d60484a0..5321f654893 100644 --- a/configs/kc1_defconfig +++ b/configs/kc1_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_TEXT_BASE=0x80100000 CONFIG_OMAP44XX=y CONFIG_TARGET_KC1=y -# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_USE_BOOTCOMMAND is not set @@ -11,18 +10,19 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=2 +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SYS_PROMPT="kc1 # " -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x82000000 -CONFIG_FASTBOOT_BUF_SIZE=0x2000000 -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x82000000 +CONFIG_FASTBOOT_BUF_SIZE=0x2000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_SYS_OMAP24_I2C_SPEED=400000 CONFIG_MMC_OMAP_HS=y CONFIG_CONS_INDEX=3 diff --git a/configs/khadas-vim_defconfig b/configs/khadas-vim_defconfig index 0bfb5942aae..49a653f0424 100644 --- a/configs/khadas-vim_defconfig +++ b/configs/khadas-vim_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_MESON=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_MESON_GXL=y CONFIG_TARGET_KHADAS_VIM=y +CONFIG_DEBUG_UART_BASE=0xc81004c0 +CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" khadas-vim" CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-khadas-vim" CONFIG_DEBUG_UART=y @@ -28,8 +30,6 @@ CONFIG_ETH_DESIGNWARE=y CONFIG_PINCTRL=y CONFIG_PINCTRL_MESON_GXL=y CONFIG_DEBUG_UART_MESON=y -CONFIG_DEBUG_UART_BASE=0xc81004c0 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig index 5d5b485cf71..e41ec8990d9 100644 --- a/configs/km_kirkwood_128m16_defconfig +++ b/configs/km_kirkwood_128m16_defconfig @@ -3,6 +3,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_IDENT_STRING="\nKeymile Kirkwood 128M16" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD_128M16" CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -25,6 +26,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=orion_nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:-(ubi0);" CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_EEPROM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y @@ -37,4 +39,3 @@ CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_KIRKWOOD_SPI=y CONFIG_BCH=y -CONFIG_OF_LIBFDT=y diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig index b07f36beaf4..fcab051ad63 100644 --- a/configs/km_kirkwood_defconfig +++ b/configs/km_kirkwood_defconfig @@ -3,6 +3,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_IDENT_STRING="\nKeymile Kirkwood" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD" CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -25,6 +26,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=orion_nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:-(ubi0);" CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_EEPROM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y @@ -37,4 +39,3 @@ CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_KIRKWOOD_SPI=y CONFIG_BCH=y -CONFIG_OF_LIBFDT=y diff --git a/configs/km_kirkwood_pci_defconfig b/configs/km_kirkwood_pci_defconfig index 31dcd0ca1b1..4fc83a5ec81 100644 --- a/configs/km_kirkwood_pci_defconfig +++ b/configs/km_kirkwood_pci_defconfig @@ -3,6 +3,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_IDENT_STRING="\nKeymile Kirkwood PCI" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD_PCI" CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -25,6 +26,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=orion_nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:-(ubi0);" CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_EEPROM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y @@ -37,4 +39,3 @@ CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_KIRKWOOD_SPI=y CONFIG_BCH=y -CONFIG_OF_LIBFDT=y diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig index 116369acf79..4b1edb4c0a5 100644 --- a/configs/kmcoge5un_defconfig +++ b/configs/kmcoge5un_defconfig @@ -3,6 +3,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_IDENT_STRING="\nKeymile COGE5UN" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_COGE5UN" CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -25,6 +26,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=orion_nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:-(ubi0);" CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y @@ -37,4 +39,3 @@ CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_KIRKWOOD_SPI=y CONFIG_BCH=y -CONFIG_OF_LIBFDT=y diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig index be7421ca58a..90d9a557b3f 100644 --- a/configs/kmnusa_defconfig +++ b/configs/kmnusa_defconfig @@ -3,6 +3,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_IDENT_STRING="\nKeymile NUSA" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_NUSA" CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -25,6 +26,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=orion_nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:-(ubi0);" CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y @@ -37,4 +39,3 @@ CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_KIRKWOOD_SPI=y CONFIG_BCH=y -CONFIG_OF_LIBFDT=y diff --git a/configs/kmsugp1_defconfig b/configs/kmsugp1_defconfig index 535e8693b06..132db201ef3 100644 --- a/configs/kmsugp1_defconfig +++ b/configs/kmsugp1_defconfig @@ -3,6 +3,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_IDENT_STRING="\nKeymile SUGP1" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_SUGP1" CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -25,6 +26,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=orion_nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:-(ubi0);" CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y @@ -37,4 +39,3 @@ CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_KIRKWOOD_SPI=y CONFIG_BCH=y -CONFIG_OF_LIBFDT=y diff --git a/configs/kmsuv31_defconfig b/configs/kmsuv31_defconfig index 59522e733e6..7b5b016f285 100644 --- a/configs/kmsuv31_defconfig +++ b/configs/kmsuv31_defconfig @@ -3,6 +3,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_IDENT_STRING="\nKeymile SUV31" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_SUV31" CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -25,6 +26,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=orion_nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:-(ubi0);" CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y @@ -37,4 +39,3 @@ CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_KIRKWOOD_SPI=y CONFIG_BCH=y -CONFIG_OF_LIBFDT=y diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig index faca5961159..90a2c282fdb 100644 --- a/configs/koelsch_defconfig +++ b/configs/koelsch_defconfig @@ -11,11 +11,11 @@ CONFIG_ARCH_RMOBILE_BOARD_STRING="Koelsch" CONFIG_R8A7791=y CONFIG_TARGET_KOELSCH=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="r8a7791-koelsch-u-boot" -CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_VERSION_VARIABLE=y @@ -46,6 +46,9 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y +CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nor0=spi0.0" +CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:256k(u-boot-spl),512k(u-boot-env1),512k(u-boot-env2),768k(u-boot),-(user)" CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_ENV_IS_IN_SPI_FLASH=y @@ -57,9 +60,11 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_RCAR_IIC=y CONFIG_DM_MMC=y CONFIG_RENESAS_SDHI=y +CONFIG_MTD=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_MTD=y CONFIG_PHY_MICREL=y CONFIG_DM_ETH=y CONFIG_SH_ETHER=y diff --git a/configs/kp_imx53_defconfig b/configs/kp_imx53_defconfig new file mode 100644 index 00000000000..451b48d3c40 --- /dev/null +++ b/configs/kp_imx53_defconfig @@ -0,0 +1,39 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX5=y +CONFIG_SYS_TEXT_BASE=0x77800000 +CONFIG_TARGET_KP_IMX53=y +# CONFIG_CMD_BMODE is not set +CONFIG_DEFAULT_DEVICE_TREE="imx53-kp" +CONFIG_FIT=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53loco/imximage.cfg" +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y +CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y +CONFIG_CMD_USB=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_CONTROL=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_I2C_DEFAULT_BUS_NUMBER=0x1 +CONFIG_PHYLIB=y +CONFIG_PHY_SMSC=y +CONFIG_FEC_MXC=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX5=y +# CONFIG_SPL_PMIC_CHILDREN is not set +CONFIG_DM_PMIC_MC34708=y +CONFIG_SPECIFY_CONSOLE_INDEX=y +CONFIG_CONS_INDEX=2 +CONFIG_MXC_UART=y +CONFIG_USB=y +CONFIG_USB_STORAGE=y diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig index 1df9a61debf..12ea476e691 100644 --- a/configs/kp_imx6q_tpc_defconfig +++ b/configs/kp_imx6q_tpc_defconfig @@ -8,7 +8,6 @@ CONFIG_MX6_DDRCAL=y CONFIG_TARGET_KP_IMX6Q_TPC=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y @@ -17,6 +16,7 @@ CONFIG_BOOTDELAY=3 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SPL_RAW_IMAGE_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_STOP_STR="." # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig index ca53005ecb3..75d25f2cb49 100644 --- a/configs/kylin-rk3036_defconfig +++ b/configs/kylin-rk3036_defconfig @@ -6,16 +6,14 @@ CONFIG_SYS_TEXT_BASE=0x60000000 CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ROCKCHIP_RK3036=y CONFIG_TARGET_KYLIN_RK3036=y +CONFIG_SPL_SYS_MALLOC_F_LEN=0x0 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk" -CONFIG_SPL_SYS_MALLOC_F_LEN=0x0 # CONFIG_ANDROID_BOOT_IMAGE is not set # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_FRAMEWORK is not set CONFIG_SPL_STACK_R=y -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -31,6 +29,9 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_CLK=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_LED=y diff --git a/configs/lager_defconfig b/configs/lager_defconfig index 901b34e1dd5..688e8d5ead4 100644 --- a/configs/lager_defconfig +++ b/configs/lager_defconfig @@ -11,11 +11,11 @@ CONFIG_ARCH_RMOBILE_BOARD_STRING="Lager" CONFIG_R8A7790=y CONFIG_TARGET_LAGER=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="r8a7790-lager-u-boot" -CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_VERSION_VARIABLE=y @@ -46,6 +46,9 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y +CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nor0=spi0.0" +CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:256k(u-boot-spl),512k(u-boot-env1),512k(u-boot-env2),768k(u-boot),-(user)" CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_ENV_IS_IN_SPI_FLASH=y @@ -54,13 +57,16 @@ CONFIG_CLK_RENESAS=y CONFIG_DM_GPIO=y CONFIG_RCAR_GPIO=y CONFIG_DM_I2C=y +CONFIG_SYS_I2C_RCAR_I2C=y CONFIG_SYS_I2C_RCAR_IIC=y CONFIG_DM_MMC=y CONFIG_SH_MMCIF=y CONFIG_RENESAS_SDHI=y +CONFIG_MTD=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_MTD=y CONFIG_PHY_MICREL=y CONFIG_DM_ETH=y CONFIG_SH_ETHER=y diff --git a/configs/legoev3_defconfig b/configs/legoev3_defconfig index c5f54a98d38..8ee2d223fd0 100644 --- a/configs/legoev3_defconfig +++ b/configs/legoev3_defconfig @@ -18,9 +18,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y # CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y +# CONFIG_CMD_NET is not set CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_DIAG=y diff --git a/configs/libretech-cc_defconfig b/configs/libretech-cc_defconfig index 931496c8dea..7ba2fa1fe2d 100644 --- a/configs/libretech-cc_defconfig +++ b/configs/libretech-cc_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_MESON=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_MESON_GXL=y CONFIG_TARGET_LIBRETECH_CC=y +CONFIG_DEBUG_UART_BASE=0xc81004c0 +CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" libretech-cc" CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-libretech-cc" CONFIG_DEBUG_UART=y @@ -28,8 +30,6 @@ CONFIG_ETH_DESIGNWARE=y CONFIG_PINCTRL=y CONFIG_PINCTRL_MESON_GXL=y CONFIG_DEBUG_UART_MESON=y -CONFIG_DEBUG_UART_BASE=0xc81004c0 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig index 0a5e5b3df3f..c23a159ef52 100644 --- a/configs/lion-rk3368_defconfig +++ b/configs/lion-rk3368_defconfig @@ -9,10 +9,12 @@ CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_SPI_FLASH_SUPPORT=y -CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xFF180000 +CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x600000 +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="rk3368-lion" CONFIG_SMBIOS_PRODUCT_NAME="sheep_rk3368" CONFIG_DEBUG_UART=y @@ -82,8 +84,6 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_TPL_RAM=y -CONFIG_DEBUG_UART_BASE=0xFF180000 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y diff --git a/configs/liteboard_defconfig b/configs/liteboard_defconfig index 16e488a2469..ec9f2823ba5 100644 --- a/configs/liteboard_defconfig +++ b/configs/liteboard_defconfig @@ -7,13 +7,13 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_LITEBOARD=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=1 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_DEFAULT_FDT_FILE="imx6ul-liteboard.dtb" CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index 39e6bc68cfd..25e2cddeadc 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -5,8 +5,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_FIT=y @@ -24,6 +22,8 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index 4265eea11b0..a664d86fcd6 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -6,7 +6,6 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_FIT=y @@ -22,6 +21,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index 3dd33be6bb6..b37d4345703 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -6,7 +6,6 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_FIT=y @@ -22,6 +21,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index 705f227c2fe..be2d369d188 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -7,7 +7,6 @@ CONFIG_SECURE_BOOT=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_DISTRO_DEFAULTS=y @@ -29,6 +28,7 @@ CONFIG_SPL_HASH_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index 8e1959a4ed3..14044fd4c22 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -5,7 +5,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_DISTRO_DEFAULTS=y @@ -26,6 +25,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index c58d8072911..a69dd96169f 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -5,7 +5,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_DISTRO_DEFAULTS=y @@ -26,6 +25,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index a4de91a206b..39d9eddc22c 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_DISTRO_DEFAULTS=y @@ -24,6 +22,8 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index 31161269e69..aa8b88bb96c 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -7,7 +7,6 @@ CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_DISTRO_DEFAULTS=y @@ -24,6 +23,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index ed1e819caa7..9c87674ea2c 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -7,7 +7,6 @@ CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_DISTRO_DEFAULTS=y @@ -24,6 +23,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMINFO=y diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index 3be6bcc7997..142587ffc4d 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -7,8 +7,6 @@ CONFIG_SECURE_BOOT=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_DISTRO_DEFAULTS=y @@ -26,6 +24,8 @@ CONFIG_SPL_CRYPTO_SUPPORT=y CONFIG_SPL_HASH_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_IMLS=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index 80b0fefb98e..f94be241511 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_FSL_LS_PPA=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_DISTRO_DEFAULTS=y @@ -25,6 +23,8 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_IMLS=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index b9c3e286842..f3e9d5a6f97 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -8,7 +8,6 @@ CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_DISTRO_DEFAULTS=y @@ -25,6 +24,7 @@ CONFIG_SPL_CRYPTO_SUPPORT=y CONFIG_SPL_HASH_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_IMLS=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index 3a7785bcb1d..aa6342e5745 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -8,7 +8,6 @@ CONFIG_SPL_FSL_LS_PPA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_DISTRO_DEFAULTS=y @@ -24,6 +23,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_IMLS=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig index 18d3610ec18..cbb61332662 100644 --- a/configs/ls2080aqds_nand_defconfig +++ b/configs/ls2080aqds_nand_defconfig @@ -5,7 +5,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" CONFIG_FIT=y @@ -20,6 +19,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_CMD_GPT=y diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index 49b9a32c369..590d0ba9ddf 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -5,7 +5,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" CONFIG_FIT=y @@ -20,6 +19,7 @@ CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig index 1ca3d1272c9..23e57e61c50 100644 --- a/configs/lschlv2_defconfig +++ b/configs/lschlv2_defconfig @@ -3,43 +3,38 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_LSXL=y CONFIG_IDENT_STRING=" LS-CHLv2" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-lschlv2" +CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="LSCHLV2" +CONFIG_API=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/sda2" +CONFIG_BOOTCOMMAND="run bootcmd_${bootsource}" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y -CONFIG_SUPPORT_RAW_INITRD=y # CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_HUSH_PARSER=y -CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y -CONFIG_ISO_PARTITION=y -CONFIG_EFI_PARTITION=y -# CONFIG_PARTITION_UUIDS is not set +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM=y CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_MVGBE=y CONFIG_SYS_NS16550=y CONFIG_SPI=y +CONFIG_DM_SPI=y CONFIG_KIRKWOOD_SPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig index c88fe37ab16..73e13d08807 100644 --- a/configs/lsxhl_defconfig +++ b/configs/lsxhl_defconfig @@ -3,6 +3,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_LSXL=y CONFIG_IDENT_STRING=" LS-XHL" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-lsxhl" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="LSXHL" CONFIG_API=y @@ -19,18 +20,21 @@ CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM=y CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_MVGBE=y CONFIG_SYS_NS16550=y CONFIG_SPI=y +CONFIG_DM_SPI=y CONFIG_KIRKWOOD_SPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/m53evk_defconfig b/configs/m53evk_defconfig index 5dacd715976..71f1d9fa6c9 100644 --- a/configs/m53evk_defconfig +++ b/configs/m53evk_defconfig @@ -6,7 +6,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_M53EVK=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set CONFIG_FIT=y @@ -18,6 +17,7 @@ CONFIG_BOOTARGS="console=ttymxc1,115200" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_VERSION_VARIABLE=y CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y diff --git a/configs/ma5d4evk_defconfig b/configs/ma5d4evk_defconfig index 78c723ebd1d..312191b6e3f 100644 --- a/configs/ma5d4evk_defconfig +++ b/configs/ma5d4evk_defconfig @@ -6,9 +6,9 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_ma5d4evk" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig index 18f0135c491..3a56bc3fcc7 100644 --- a/configs/maxbcm_defconfig +++ b/configs/maxbcm_defconfig @@ -6,9 +6,11 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_MAXBCM=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xd0012000 +CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="armada-xp-maxbcm" CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 @@ -37,8 +39,6 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVNETA=y -CONFIG_DEBUG_UART_BASE=0xd0012000 -CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/mgcoge3un_defconfig b/configs/mgcoge3un_defconfig index abf9cdcbfaa..baee230c704 100644 --- a/configs/mgcoge3un_defconfig +++ b/configs/mgcoge3un_defconfig @@ -3,6 +3,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_IDENT_STRING="\nKeymile COGE3UN" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_MGCOGE3UN" CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -25,6 +26,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=orion_nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:-(ubi0);" CONFIG_CMD_UBI=y # CONFIG_CMD_UBIFS is not set +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_EEPROM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y @@ -37,4 +39,3 @@ CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_KIRKWOOD_SPI=y CONFIG_BCH=y -CONFIG_OF_LIBFDT=y diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig index 3fe9cb2c6ed..fbe7e96e87d 100644 --- a/configs/minnowmax_defconfig +++ b/configs/minnowmax_defconfig @@ -1,5 +1,7 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0xFFF00000 +CONFIG_DEBUG_UART_BASE=0x3f8 +CONFIG_DEBUG_UART_CLOCK=1843200 CONFIG_VENDOR_INTEL=y CONFIG_DEFAULT_DEVICE_TREE="minnowmax" CONFIG_TARGET_MINNOWMAX=y @@ -49,8 +51,6 @@ CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_CPU=y CONFIG_RTL8169=y -CONFIG_DEBUG_UART_BASE=0x3f8 -CONFIG_DEBUG_UART_CLOCK=1843200 CONFIG_SPI=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig index f44537c88f4..89eed7e3d39 100644 --- a/configs/miqi-rk3288_defconfig +++ b/configs/miqi-rk3288_defconfig @@ -5,6 +5,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ROCKCHIP_RK3288=y CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y CONFIG_TARGET_MIQI_RK3288=y +CONFIG_DEBUG_UART_BASE=0xff690000 +CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-miqi" CONFIG_DEBUG_UART=y @@ -14,8 +16,6 @@ CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -42,6 +42,9 @@ CONFIG_SPL_SYSCON=y # CONFIG_SPL_SIMPLE_BUS is not set CONFIG_CLK=y CONFIG_SPL_CLK=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MMC_DW=y @@ -60,8 +63,6 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y -CONFIG_DEBUG_UART_BASE=0xff690000 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y CONFIG_USB=y diff --git a/configs/mvebu_db-88f3720_defconfig b/configs/mvebu_db-88f3720_defconfig index e6f7cb9966d..8966cbef351 100644 --- a/configs/mvebu_db-88f3720_defconfig +++ b/configs/mvebu_db-88f3720_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_MVEBU=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_MVEBU_ARMADA_37XX=y +CONFIG_DEBUG_UART_BASE=0xd0012000 +CONFIG_DEBUG_UART_CLOCK=25804800 CONFIG_DEFAULT_DEVICE_TREE="armada-3720-db" CONFIG_DEBUG_UART=y CONFIG_AHCI=y @@ -30,15 +32,14 @@ CONFIG_CMD_MVEBU_BUBT=y CONFIG_CMD_EXT4_WRITE=y CONFIG_MAC_PARTITION=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_SCSI_AHCI=y +CONFIG_AHCI_MVEBU=y CONFIG_BLOCK_CACHE=y +CONFIG_CLK=y +CONFIG_CLK_MVEBU=y CONFIG_DM_GPIO=y # CONFIG_MVEBU_GPIO is not set CONFIG_DM_I2C=y CONFIG_MISC=y -CONFIG_CLK=y -CONFIG_CLK_MVEBU=y -CONFIG_CLK_ARMADA_3720=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y @@ -59,8 +60,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_ARMADA_37XX=y # CONFIG_SPL_SERIAL_PRESENT is not set CONFIG_DEBUG_MVEBU_A3700_UART=y -CONFIG_DEBUG_UART_BASE=0xd0012000 -CONFIG_DEBUG_UART_CLOCK=25804800 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_MVEBU_A3700_UART=y diff --git a/configs/mvebu_db_armada8k_defconfig b/configs/mvebu_db_armada8k_defconfig index 63f210309b1..f37d4c0e186 100644 --- a/configs/mvebu_db_armada8k_defconfig +++ b/configs/mvebu_db_armada8k_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_MVEBU=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_MVEBU_ARMADA_8K=y +CONFIG_DEBUG_UART_BASE=0xf0512000 +CONFIG_DEBUG_UART_CLOCK=200000000 CONFIG_DEFAULT_DEVICE_TREE="armada-8040-db" CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_DEBUG_UART=y @@ -30,7 +32,7 @@ CONFIG_CMD_MVEBU_BUBT=y CONFIG_CMD_EXT4_WRITE=y CONFIG_MAC_PARTITION=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_SCSI_AHCI=y +CONFIG_AHCI_MVEBU=y CONFIG_BLOCK_CACHE=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y @@ -52,8 +54,6 @@ CONFIG_MVEBU_COMPHY_SUPPORT=y CONFIG_PINCTRL=y CONFIG_PINCTRL_ARMADA_8K=y # CONFIG_SPL_SERIAL_PRESENT is not set -CONFIG_DEBUG_UART_BASE=0xf0512000 -CONFIG_DEBUG_UART_CLOCK=200000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_SYS_NS16550=y diff --git a/configs/mvebu_espressobin-88f3720_defconfig b/configs/mvebu_espressobin-88f3720_defconfig index 5a6d1e6b2a1..5223feddbe4 100644 --- a/configs/mvebu_espressobin-88f3720_defconfig +++ b/configs/mvebu_espressobin-88f3720_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_MVEBU=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_MVEBU_ARMADA_37XX=y +CONFIG_DEBUG_UART_BASE=0xd0012000 +CONFIG_DEBUG_UART_CLOCK=25804800 CONFIG_DEFAULT_DEVICE_TREE="armada-3720-espressobin" CONFIG_DEBUG_UART=y CONFIG_AHCI=y @@ -30,14 +32,13 @@ CONFIG_CMD_MVEBU_BUBT=y CONFIG_CMD_EXT4_WRITE=y CONFIG_MAC_PARTITION=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_SCSI_AHCI=y +CONFIG_AHCI_MVEBU=y CONFIG_BLOCK_CACHE=y +CONFIG_CLK=y +CONFIG_CLK_MVEBU=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_MISC=y -CONFIG_CLK=y -CONFIG_CLK_MVEBU=y -CONFIG_CLK_ARMADA_3720=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y @@ -59,8 +60,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_ARMADA_37XX=y # CONFIG_SPL_SERIAL_PRESENT is not set CONFIG_DEBUG_MVEBU_A3700_UART=y -CONFIG_DEBUG_UART_BASE=0xd0012000 -CONFIG_DEBUG_UART_CLOCK=25804800 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_MVEBU_A3700_UART=y diff --git a/configs/mvebu_mcbin-88f8040_defconfig b/configs/mvebu_mcbin-88f8040_defconfig index de682d18f1f..2e4e71d1520 100644 --- a/configs/mvebu_mcbin-88f8040_defconfig +++ b/configs/mvebu_mcbin-88f8040_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_MVEBU=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_MVEBU_ARMADA_8K=y +CONFIG_DEBUG_UART_BASE=0xf0512000 +CONFIG_DEBUG_UART_CLOCK=200000000 CONFIG_DEFAULT_DEVICE_TREE="armada-8040-mcbin" CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_DEBUG_UART=y @@ -32,7 +34,7 @@ CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y CONFIG_MAC_PARTITION=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_SCSI_AHCI=y +CONFIG_AHCI_MVEBU=y CONFIG_BLOCK_CACHE=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y @@ -56,8 +58,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_ARMADA_8K=y CONFIG_DM_REGULATOR_FIXED=y # CONFIG_SPL_SERIAL_PRESENT is not set -CONFIG_DEBUG_UART_BASE=0xf0512000 -CONFIG_DEBUG_UART_CLOCK=200000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_SYS_NS16550=y diff --git a/configs/mx31pdk_defconfig b/configs/mx31pdk_defconfig index 0f78a63762e..771cf72fe55 100644 --- a/configs/mx31pdk_defconfig +++ b/configs/mx31pdk_defconfig @@ -1,13 +1,14 @@ CONFIG_ARM=y # CONFIG_SPL_USE_ARCH_MEMCPY is not set # CONFIG_SPL_USE_ARCH_MEMSET is not set -CONFIG_TARGET_MX31PDK=y +CONFIG_ARCH_MX31=y CONFIG_SYS_TEXT_BASE=0x87e00000 CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_TARGET_MX31PDK=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y # CONFIG_SPL_FRAMEWORK is not set +CONFIG_SPL_NAND_SUPPORT=y # CONFIG_AUTO_COMPLETE is not set CONFIG_CMD_BOOTZ=y CONFIG_CMD_SPI=y diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig index 0f5ce14e400..8a0cc5d481a 100644 --- a/configs/mx53ppd_defconfig +++ b/configs/mx53ppd_defconfig @@ -22,6 +22,7 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_ENV_IS_IN_MMC=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_EXT=y CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="0:5" diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig index 6222ac608a3..e67727743bb 100644 --- a/configs/mx6cuboxi_defconfig +++ b/configs/mx6cuboxi_defconfig @@ -7,9 +7,8 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_MX6CUBOXI=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_CMD_HDMIDETECT=y CONFIG_DISTRO_DEFAULTS=y @@ -18,6 +17,7 @@ CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/mx6memcal_defconfig b/configs/mx6memcal_defconfig index d05c2cbe0ce..c60100ca6c7 100644 --- a/configs/mx6memcal_defconfig +++ b/configs/mx6memcal_defconfig @@ -6,7 +6,6 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_MX6_DDRCAL=y CONFIG_TARGET_MX6MEMCAL=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,SPL,MX6QDL" CONFIG_SUPPORT_RAW_INITRD=y @@ -14,6 +13,7 @@ CONFIG_SPL_USB_HOST_SUPPORT=y CONFIG_SPL_USB_GADGET_SUPPORT=y CONFIG_SPL_USB_ETHER=y CONFIG_SPL_USB_SDP_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_BOOTM is not set diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig index e9d193cc782..380c1cd2b63 100644 --- a/configs/mx6qsabrelite_defconfig +++ b/configs/mx6qsabrelite_defconfig @@ -3,39 +3,34 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_NITROGEN6X=y CONFIG_CMD_HDMIDETECT=y +CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024,SABRELITE" CONFIG_BOOTDELAY=3 +# CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y -CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_HUSH_PARSER=y -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +# CONFIG_RANDOM_UUID is not set CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SATA=y CONFIG_CMD_SF=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y +# CONFIG_ISO_PARTITION is not set CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y CONFIG_DWC_AHSATA=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig index 5ef72c81647..66507f31ec2 100644 --- a/configs/mx6sabreauto_defconfig +++ b/configs/mx6sabreauto_defconfig @@ -7,9 +7,8 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_MX6SABREAUTO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_NXP_BOARD_REVISION=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" # CONFIG_CONSOLE_MUX is not set @@ -18,6 +17,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_DFU=y diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig index ca37d8bef80..3e9bdb921fe 100644 --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -7,9 +7,8 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_MX6SABRESD=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -21,12 +20,8 @@ CONFIG_SPL_OS_BOOT=y CONFIG_SPL_USB_HOST_SUPPORT=y CONFIG_SPL_USB_GADGET_SUPPORT=y CONFIG_SPL_USB_SDP_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FASTBOOT_BUF_SIZE=0x10000000 -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=2 CONFIG_CMD_BOOTZ=y CONFIG_CMD_SPL=y CONFIG_CMD_SPL_WRITE_SIZE=0x20000 @@ -52,6 +47,11 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_EFI_PARTITION=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x12000000 +CONFIG_FASTBOOT_BUF_SIZE=0x10000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=2 CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig index 7c784ea3ada..8554d44c6d8 100644 --- a/configs/mx6slevk_spl_defconfig +++ b/configs/mx6slevk_spl_defconfig @@ -7,9 +7,8 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_MX6SLEVK=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk" CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" @@ -17,6 +16,7 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y diff --git a/configs/mx6sxsabresd_spl_defconfig b/configs/mx6sxsabresd_spl_defconfig index 7b408e2221b..9ae29695f74 100644 --- a/configs/mx6sxsabresd_spl_defconfig +++ b/configs/mx6sxsabresd_spl_defconfig @@ -7,9 +7,8 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_MX6SXSABRESD=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_NXP_BOARD_REVISION=y CONFIG_DEFAULT_DEVICE_TREE="imx6sx-sdb" @@ -19,6 +18,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig index ced24fe4d26..5dd45b5d001 100644 --- a/configs/mx6ul_14x14_evk_defconfig +++ b/configs/mx6ul_14x14_evk_defconfig @@ -7,9 +7,8 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_MX6UL_14X14_EVK=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -17,6 +16,7 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig index d6bb2a2dfb5..3340089521a 100644 --- a/configs/mx6ul_9x9_evk_defconfig +++ b/configs/mx6ul_9x9_evk_defconfig @@ -7,9 +7,8 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_MX6UL_9X9_EVK=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -17,6 +16,7 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig index 0299e0a7074..ddf5689bf47 100644 --- a/configs/nas220_defconfig +++ b/configs/nas220_defconfig @@ -3,6 +3,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NAS220=y CONFIG_IDENT_STRING="\nNAS 220" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-blackarmor-nas220" CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y @@ -24,6 +25,7 @@ CONFIG_CMD_UBI=y CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y # CONFIG_PARTITION_UUIDS is not set +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set @@ -33,4 +35,3 @@ CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig index d486e4cd7bd..e7216556be9 100644 --- a/configs/net2big_v2_defconfig +++ b/configs/net2big_v2_defconfig @@ -3,6 +3,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NET2BIG_V2=y CONFIG_IDENT_STRING=" 2Big v2" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-net2big" CONFIG_SYS_EXTRA_OPTIONS="NET2BIG_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -26,6 +27,7 @@ CONFIG_CMD_FAT=y CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y # CONFIG_PARTITION_UUIDS is not set +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set @@ -39,4 +41,3 @@ CONFIG_KIRKWOOD_SPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig index d37146dc94b..c0e3651e6e0 100644 --- a/configs/netspace_lite_v2_defconfig +++ b/configs/netspace_lite_v2_defconfig @@ -3,6 +3,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NETSPACE_V2=y CONFIG_IDENT_STRING=" NS v2 Lite" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2lite" CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_LITE_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -26,6 +27,7 @@ CONFIG_CMD_FAT=y CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y # CONFIG_PARTITION_UUIDS is not set +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set @@ -39,4 +41,3 @@ CONFIG_KIRKWOOD_SPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig index 9b639c017b3..db75e6d5506 100644 --- a/configs/netspace_max_v2_defconfig +++ b/configs/netspace_max_v2_defconfig @@ -3,6 +3,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NETSPACE_V2=y CONFIG_IDENT_STRING=" NS Max v2" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2max" CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MAX_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -26,6 +27,7 @@ CONFIG_CMD_FAT=y CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y # CONFIG_PARTITION_UUIDS is not set +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set @@ -39,4 +41,3 @@ CONFIG_KIRKWOOD_SPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig index ee7554fd3f9..fd774c722af 100644 --- a/configs/netspace_mini_v2_defconfig +++ b/configs/netspace_mini_v2_defconfig @@ -3,6 +3,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NETSPACE_V2=y CONFIG_IDENT_STRING=" NS v2 Mini" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2mini" CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MINI_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -24,6 +25,7 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_EFI_PARTITION=y # CONFIG_PARTITION_UUIDS is not set +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set @@ -34,4 +36,3 @@ CONFIG_MVGBE=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_KIRKWOOD_SPI=y -CONFIG_OF_LIBFDT=y diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig index 6421706de04..ebdb16b16f5 100644 --- a/configs/netspace_v2_defconfig +++ b/configs/netspace_v2_defconfig @@ -3,6 +3,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_NETSPACE_V2=y CONFIG_IDENT_STRING=" NS v2" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2" CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_V2" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -26,6 +27,7 @@ CONFIG_CMD_FAT=y CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y # CONFIG_PARTITION_UUIDS is not set +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_MVSATA_IDE=y # CONFIG_MMC is not set @@ -39,4 +41,3 @@ CONFIG_KIRKWOOD_SPI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig index 6ef4226db91..378fc245de5 100644 --- a/configs/nitrogen6dl2g_defconfig +++ b/configs/nitrogen6dl2g_defconfig @@ -9,8 +9,6 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y @@ -33,6 +31,8 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig index b9784a2d23f..306bf2e90c6 100644 --- a/configs/nitrogen6dl_defconfig +++ b/configs/nitrogen6dl_defconfig @@ -9,8 +9,6 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y @@ -33,6 +31,8 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig index 61688ba49e4..ec4e38f0005 100644 --- a/configs/nitrogen6q2g_defconfig +++ b/configs/nitrogen6q2g_defconfig @@ -9,8 +9,6 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y @@ -35,6 +33,8 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DWC_AHSATA=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig index cfee7ba8891..c8da96e1f57 100644 --- a/configs/nitrogen6q_defconfig +++ b/configs/nitrogen6q_defconfig @@ -9,8 +9,6 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y @@ -35,6 +33,8 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DWC_AHSATA=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig index 0f29a56c464..70ffc9d7974 100644 --- a/configs/nitrogen6s1g_defconfig +++ b/configs/nitrogen6s1g_defconfig @@ -9,8 +9,6 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y @@ -33,6 +31,8 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig index 7ad1584af27..d3fdd6df930 100644 --- a/configs/nitrogen6s_defconfig +++ b/configs/nitrogen6s_defconfig @@ -9,8 +9,6 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y @@ -33,6 +31,8 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_FSL_ESDHC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/novena_defconfig b/configs/novena_defconfig index 1868305c799..9573fe8bd22 100644 --- a/configs/novena_defconfig +++ b/configs/novena_defconfig @@ -8,10 +8,9 @@ CONFIG_MX6_DDRCAL=y CONFIG_TARGET_KOSAGI_NOVENA=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FAT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_CMD_HDMIDETECT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y @@ -23,6 +22,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_ASKENV=y CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set diff --git a/configs/nsim_700_defconfig b/configs/nsim_700_defconfig index 12fe5f77c64..4115f1e353b 100644 --- a/configs/nsim_700_defconfig +++ b/configs/nsim_700_defconfig @@ -1,8 +1,11 @@ CONFIG_ARC=y CONFIG_TARGET_NSIM=y CONFIG_SYS_TEXT_BASE=0x81000000 +CONFIG_DEBUG_UART_BASE=0xc0fc1000 +CONFIG_DEBUG_UART_CLOCK=70000000 CONFIG_SYS_CLK_FREQ=70000000 CONFIG_DEFAULT_DEVICE_TREE="nsim" +CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyARC0,115200n8" @@ -13,4 +16,6 @@ CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_DM=y CONFIG_DM_SERIAL=y +CONFIG_DEBUG_ARC_SERIAL=y +CONFIG_ARC_SERIAL=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/nsim_700be_defconfig b/configs/nsim_700be_defconfig index 6c0dba7c6d0..0e0b7293866 100644 --- a/configs/nsim_700be_defconfig +++ b/configs/nsim_700be_defconfig @@ -2,8 +2,11 @@ CONFIG_ARC=y CONFIG_CPU_BIG_ENDIAN=y CONFIG_TARGET_NSIM=y CONFIG_SYS_TEXT_BASE=0x81000000 +CONFIG_DEBUG_UART_BASE=0xc0fc1000 +CONFIG_DEBUG_UART_CLOCK=70000000 CONFIG_SYS_CLK_FREQ=70000000 CONFIG_DEFAULT_DEVICE_TREE="nsim" +CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyARC0,115200n8" @@ -14,4 +17,6 @@ CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_DM=y CONFIG_DM_SERIAL=y +CONFIG_DEBUG_ARC_SERIAL=y +CONFIG_ARC_SERIAL=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/nsim_hs38_defconfig b/configs/nsim_hs38_defconfig index bb31adb381d..585bb44de22 100644 --- a/configs/nsim_hs38_defconfig +++ b/configs/nsim_hs38_defconfig @@ -2,8 +2,11 @@ CONFIG_ARC=y CONFIG_ISA_ARCV2=y CONFIG_TARGET_NSIM=y CONFIG_SYS_TEXT_BASE=0x81000000 +CONFIG_DEBUG_UART_BASE=0xc0fc1000 +CONFIG_DEBUG_UART_CLOCK=70000000 CONFIG_SYS_CLK_FREQ=70000000 CONFIG_DEFAULT_DEVICE_TREE="nsim" +CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyARC0,115200n8" @@ -14,4 +17,6 @@ CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_DM=y CONFIG_DM_SERIAL=y +CONFIG_DEBUG_ARC_SERIAL=y +CONFIG_ARC_SERIAL=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/nsim_hs38be_defconfig b/configs/nsim_hs38be_defconfig index a2cc238433f..87115617b66 100644 --- a/configs/nsim_hs38be_defconfig +++ b/configs/nsim_hs38be_defconfig @@ -3,8 +3,11 @@ CONFIG_ISA_ARCV2=y CONFIG_CPU_BIG_ENDIAN=y CONFIG_TARGET_NSIM=y CONFIG_SYS_TEXT_BASE=0x81000000 +CONFIG_DEBUG_UART_BASE=0xc0fc1000 +CONFIG_DEBUG_UART_CLOCK=70000000 CONFIG_SYS_CLK_FREQ=70000000 CONFIG_DEFAULT_DEVICE_TREE="nsim" +CONFIG_DEBUG_UART=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyARC0,115200n8" @@ -15,4 +18,6 @@ CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_DM=y CONFIG_DM_SERIAL=y +CONFIG_DEBUG_ARC_SERIAL=y +CONFIG_ARC_SERIAL=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig index 74176221527..8868d1f9e10 100644 --- a/configs/nyan-big_defconfig +++ b/configs/nyan-big_defconfig @@ -1,6 +1,8 @@ CONFIG_ARM=y CONFIG_TEGRA=y CONFIG_SYS_TEXT_BASE=0x80110000 +CONFIG_DEBUG_UART_BASE=0x70006000 +CONFIG_DEBUG_UART_CLOCK=408000000 CONFIG_TEGRA124=y CONFIG_TARGET_NYAN_BIG=y CONFIG_DEFAULT_DEVICE_TREE="tegra124-nyan-big" @@ -53,8 +55,6 @@ CONFIG_DM_REGULATOR=y CONFIG_REGULATOR_AS3722=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_PWM_TEGRA=y -CONFIG_DEBUG_UART_BASE=0x70006000 -CONFIG_DEBUG_UART_CLOCK=408000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y CONFIG_TEGRA114_SPI=y diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig index 49461aa350b..ecc8d03e318 100644 --- a/configs/odroid-c2_defconfig +++ b/configs/odroid-c2_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_MESON=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_MESON_GXBB=y CONFIG_TARGET_ODROID_C2=y +CONFIG_DEBUG_UART_BASE=0xc81004c0 +CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" odroid-c2" CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-odroidc2" CONFIG_DEBUG_UART=y @@ -28,8 +30,6 @@ CONFIG_ETH_DESIGNWARE=y CONFIG_PINCTRL=y CONFIG_PINCTRL_MESON_GXBB=y CONFIG_DEBUG_UART_MESON=y -CONFIG_DEBUG_UART_BASE=0xc81004c0 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/omap3_beagle_defconfig b/configs/omap3_beagle_defconfig index 7b81b039c9f..a37a38f881c 100644 --- a/configs/omap3_beagle_defconfig +++ b/configs/omap3_beagle_defconfig @@ -13,8 +13,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_SYS_PROMPT="BeagleBoard # " -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x82000000 CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x280000 CONFIG_CMD_SPL_WRITE_SIZE=0x20000 @@ -39,6 +37,8 @@ CONFIG_SPL_PARTITION_UUIDS=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SPL_DM=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x82000000 CONFIG_LED_STATUS=y CONFIG_LED_STATUS0=y CONFIG_LED_STATUS_BIT=1 diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig index 20795c3170f..cd517b418d6 100644 --- a/configs/omap3_evm_defconfig +++ b/configs/omap3_evm_defconfig @@ -12,8 +12,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_SYS_PROMPT="OMAP3_EVM # " -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x82000000 CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x280000 CONFIG_CMD_SPL_WRITE_SIZE=0x20000 @@ -38,6 +36,8 @@ CONFIG_SPL_PARTITION_UUIDS=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SPL_DM=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x82000000 CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig index 5a31e46dbaf..cd8ffd5adfe 100644 --- a/configs/omap3_logic_defconfig +++ b/configs/omap3_logic_defconfig @@ -13,8 +13,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_OS_BOOT=y CONFIG_SYS_PROMPT="OMAP Logic # " -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x82000000 # CONFIG_CMD_IMI is not set CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x240000 @@ -33,6 +31,8 @@ CONFIG_SPL_OF_PLATDATA=y # CONFIG_ENV_IS_IN_FAT is not set CONFIG_ENV_IS_IN_NAND=y # CONFIG_BLK is not set +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x82000000 CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_MMC_OMAP_HS=y diff --git a/configs/omap4_panda_defconfig b/configs/omap4_panda_defconfig index c7a926bebbd..41df480be35 100644 --- a/configs/omap4_panda_defconfig +++ b/configs/omap4_panda_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_OMAP44XX=y CONFIG_TARGET_OMAP4_PANDA=y -# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run findfdt; run init_console; run envboot; run distro_bootcmd" @@ -11,6 +10,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y # CONFIG_SPL_EXT_SUPPORT is not set # CONFIG_SPL_I2C_SUPPORT is not set +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_OS_BOOT=y CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y diff --git a/configs/omap4_sdp4430_defconfig b/configs/omap4_sdp4430_defconfig index 0d3b5426a4e..6b2ea202e54 100644 --- a/configs/omap4_sdp4430_defconfig +++ b/configs/omap4_sdp4430_defconfig @@ -5,7 +5,6 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_OMAP44XX=y CONFIG_TARGET_OMAP4_SDP4430=y CONFIG_CMD_BAT=y -# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run findfdt; run init_console; run envboot; run distro_bootcmd" @@ -13,6 +12,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y # CONFIG_SPL_I2C_SUPPORT is not set +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/omap5_uevm_defconfig b/configs/omap5_uevm_defconfig index c3164fdb752..52b76e260a4 100644 --- a/configs/omap5_uevm_defconfig +++ b/configs/omap5_uevm_defconfig @@ -3,13 +3,13 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_OMAP54XX=y CONFIG_TARGET_OMAP5_UEVM=y CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC=16296 -# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL=y CONFIG_ARMV7_LPAE=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_OS_BOOT=y CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index a3279b67cf4..cabea06256a 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -9,7 +9,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="da850-lcdk" CONFIG_BOOTDELAY=3 @@ -19,6 +18,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xb5 +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CRC32_VERIFY=y # CONFIG_CMD_EEPROM is not set diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig index 003fb172ed4..3b4724f1fcf 100644 --- a/configs/openrd_base_defconfig +++ b/configs/openrd_base_defconfig @@ -4,6 +4,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_OPENRD=y CONFIG_IDENT_STRING="\nOpenRD-Base" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-base" CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_BASE" CONFIG_BOOTDELAY=3 CONFIG_LOGLEVEL=2 @@ -24,6 +25,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=nand_mtd" CONFIG_MTDPARTS_DEFAULT="mtdparts=nand_mtd:0x100000@0x000000(uboot),0x400000@0x100000(uImage),0x1fb00000@0x500000(rootfs)" CONFIG_CMD_UBI=y CONFIG_ISO_PARTITION=y +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_MVSATA_IDE=y # CONFIG_MMC_HW_PARTITIONING is not set @@ -33,4 +35,3 @@ CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig index fbc5b17b133..a2d86b56909 100644 --- a/configs/openrd_client_defconfig +++ b/configs/openrd_client_defconfig @@ -4,6 +4,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_OPENRD=y CONFIG_IDENT_STRING="\nOpenRD-Client" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-client" CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_CLIENT" CONFIG_BOOTDELAY=3 CONFIG_LOGLEVEL=2 @@ -24,6 +25,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=nand_mtd" CONFIG_MTDPARTS_DEFAULT="mtdparts=nand_mtd:0x100000@0x000000(uboot),0x400000@0x100000(uImage),0x1fb00000@0x500000(rootfs)" CONFIG_CMD_UBI=y CONFIG_ISO_PARTITION=y +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_MVSATA_IDE=y # CONFIG_MMC_HW_PARTITIONING is not set @@ -33,4 +35,3 @@ CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig index bba1bbeb7a4..156fa3ff1fb 100644 --- a/configs/openrd_ultimate_defconfig +++ b/configs/openrd_ultimate_defconfig @@ -4,6 +4,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_OPENRD=y CONFIG_IDENT_STRING="\nOpenRD-Ultimate" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-ultimate" CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_ULTIMATE" CONFIG_BOOTDELAY=3 CONFIG_LOGLEVEL=2 @@ -24,6 +25,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=nand_mtd" CONFIG_MTDPARTS_DEFAULT="mtdparts=nand_mtd:0x100000@0x000000(uboot),0x400000@0x100000(uImage),0x1fb00000@0x500000(rootfs)" CONFIG_CMD_UBI=y CONFIG_ISO_PARTITION=y +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_MVSATA_IDE=y # CONFIG_MMC_HW_PARTITIONING is not set @@ -33,4 +35,3 @@ CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig index 2fd684ae5e1..729f9d78be0 100644 --- a/configs/opos6uldev_defconfig +++ b/configs/opos6uldev_defconfig @@ -8,12 +8,11 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_OPOS6ULDEV=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL=y +CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6ul-opos6uldev" -CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_TPL_SYS_MALLOC_F_LEN=0x400 CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y @@ -25,6 +24,7 @@ CONFIG_DEFAULT_FDT_FILE="imx6ul-opos6uldev.dtb" CONFIG_VERSION_VARIABLE=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="BIOS> " diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig index dd5f2c78ab5..ca1e586e896 100644 --- a/configs/orangepi_pc2_defconfig +++ b/configs/orangepi_pc2_defconfig @@ -13,4 +13,5 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-pc2" # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/orangepi_prime_defconfig b/configs/orangepi_prime_defconfig index df39caa9030..6161863258e 100644 --- a/configs/orangepi_prime_defconfig +++ b/configs/orangepi_prime_defconfig @@ -11,4 +11,5 @@ CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-prime" # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/configs/ot1200_spl_defconfig b/configs/ot1200_spl_defconfig index 01e202f170c..525b24fee03 100644 --- a/configs/ot1200_spl_defconfig +++ b/configs/ot1200_spl_defconfig @@ -6,16 +6,16 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_OT1200=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set diff --git a/configs/p212_defconfig b/configs/p212_defconfig index 44221fc8d63..344c04aa8d5 100644 --- a/configs/p212_defconfig +++ b/configs/p212_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_MESON=y CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_MESON_GXL=y CONFIG_TARGET_P212=y +CONFIG_DEBUG_UART_BASE=0xc81004c0 +CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" p212" CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-p212" CONFIG_DEBUG_UART=y @@ -28,8 +30,6 @@ CONFIG_ETH_DESIGNWARE=y CONFIG_PINCTRL=y CONFIG_PINCTRL_MESON_GXL=y CONFIG_DEBUG_UART_MESON=y -CONFIG_DEBUG_UART_BASE=0xc81004c0 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/parrot_r16_defconfig b/configs/parrot_r16_defconfig index 991e9b99aab..553a8d65728 100644 --- a/configs/parrot_r16_defconfig +++ b/configs/parrot_r16_defconfig @@ -15,6 +15,7 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-parrot" # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_PARTITION_UUIDS is not set +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_CONS_INDEX=5 CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y diff --git a/configs/pcm051_rev1_defconfig b/configs/pcm051_rev1_defconfig index a570ca99d05..37d39042442 100644 --- a/configs/pcm051_rev1_defconfig +++ b/configs/pcm051_rev1_defconfig @@ -7,11 +7,9 @@ CONFIG_AM33XX=y CONFIG_TARGET_PCM051=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -# CONFIG_SPL_NAND_SUPPORT is not set -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FAT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="REV1" # CONFIG_USE_BOOTCOMMAND is not set @@ -22,10 +20,12 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_ETH_SUPPORT=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_NET_SUPPORT=y CONFIG_SPL_NET_VCI_STRING="pcm051 U-Boot SPL" CONFIG_SPL_OS_BOOT=y CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y diff --git a/configs/pcm051_rev3_defconfig b/configs/pcm051_rev3_defconfig index fe0ed45452c..b7fa51def72 100644 --- a/configs/pcm051_rev3_defconfig +++ b/configs/pcm051_rev3_defconfig @@ -7,11 +7,9 @@ CONFIG_AM33XX=y CONFIG_TARGET_PCM051=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -# CONFIG_SPL_NAND_SUPPORT is not set -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FAT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="REV3" # CONFIG_USE_BOOTCOMMAND is not set @@ -22,10 +20,12 @@ CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_ETH_SUPPORT=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_NET_SUPPORT=y CONFIG_SPL_NET_VCI_STRING="pcm051 U-Boot SPL" CONFIG_SPL_OS_BOOT=y CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_CMD_SPL=y CONFIG_CMD_ASKENV=y diff --git a/configs/pcm058_defconfig b/configs/pcm058_defconfig index c90245a1bd1..6318a6a83ce 100644 --- a/configs/pcm058_defconfig +++ b/configs/pcm058_defconfig @@ -7,11 +7,10 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_PCM058=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SPL=y CONFIG_CMD_HDMIDETECT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y @@ -24,6 +23,7 @@ CONFIG_SPL_DMA_SUPPORT=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/pengwyn_defconfig b/configs/pengwyn_defconfig index bfaeea852f8..0ee8e6e1b98 100644 --- a/configs/pengwyn_defconfig +++ b/configs/pengwyn_defconfig @@ -7,10 +7,9 @@ CONFIG_AM33XX=y CONFIG_TARGET_PENGWYN=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FAT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -25,6 +24,7 @@ CONFIG_SPL_NET_SUPPORT=y CONFIG_SPL_NET_VCI_STRING="AM335x U-Boot SPL" CONFIG_SPL_OS_BOOT=y CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_CMD_SPL=y CONFIG_CMD_SPL_NAND_OFS=0x240000 diff --git a/configs/pepper_defconfig b/configs/pepper_defconfig index a7e1c0b2cf6..421dadc8866 100644 --- a/configs/pepper_defconfig +++ b/configs/pepper_defconfig @@ -7,18 +7,18 @@ CONFIG_AM33XX=y CONFIG_TARGET_PEPPER=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -# CONFIG_SPL_NAND_SUPPORT is not set -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FAT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_VERSION_VARIABLE=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_POWER_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SYS_PROMPT="pepper# " CONFIG_CMD_ASKENV=y # CONFIG_CMD_FLASH is not set diff --git a/configs/pfla02_defconfig b/configs/pfla02_defconfig index 1dbb56a6eab..0a03854e70e 100644 --- a/configs/pfla02_defconfig +++ b/configs/pfla02_defconfig @@ -7,11 +7,10 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_PFLA02=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SPL=y CONFIG_CMD_HDMIDETECT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y @@ -24,6 +23,7 @@ CONFIG_SPL_DMA_SUPPORT=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig index d78b6d57b6b..50b0c981e28 100644 --- a/configs/phycore-rk3288_defconfig +++ b/configs/phycore-rk3288_defconfig @@ -5,6 +5,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ROCKCHIP_RK3288=y CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y CONFIG_TARGET_PHYCORE_RK3288=y +CONFIG_DEBUG_UART_BASE=0xff690000 +CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-phycore-rdk" CONFIG_DEBUG_UART=y @@ -17,8 +19,6 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_POWER_SUPPORT=y -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -44,6 +44,9 @@ CONFIG_SPL_SYSCON=y # CONFIG_SPL_SIMPLE_BUS is not set CONFIG_CLK=y CONFIG_SPL_CLK=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y @@ -64,8 +67,6 @@ CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y -CONFIG_DEBUG_UART_BASE=0xff690000 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y CONFIG_USB=y diff --git a/configs/picosam9g45_defconfig b/configs/picosam9g45_defconfig index 21df1a1df5f..559ebb23d56 100644 --- a/configs/picosam9g45_defconfig +++ b/configs/picosam9g45_defconfig @@ -7,10 +7,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FAT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_MMC" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -19,6 +18,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootwait" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set diff --git a/configs/platinum_picon_defconfig b/configs/platinum_picon_defconfig index d265e8d322b..3dc70ec550a 100644 --- a/configs/platinum_picon_defconfig +++ b/configs/platinum_picon_defconfig @@ -7,10 +7,8 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_PLATINUM_PICON=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6DL" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y @@ -18,6 +16,8 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_DMA_SUPPORT=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="picon > " CONFIG_CMD_BOOTZ=y diff --git a/configs/platinum_titanium_defconfig b/configs/platinum_titanium_defconfig index a0df27b8c85..63123c30819 100644 --- a/configs/platinum_titanium_defconfig +++ b/configs/platinum_titanium_defconfig @@ -7,10 +7,8 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_PLATINUM_TITANIUM=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y @@ -18,6 +16,8 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_DMA_SUPPORT=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="titanium > " CONFIG_CMD_BOOTZ=y diff --git a/configs/pogo_e02_defconfig b/configs/pogo_e02_defconfig index 6d1af7748d5..0c4c023406e 100644 --- a/configs/pogo_e02_defconfig +++ b/configs/pogo_e02_defconfig @@ -3,6 +3,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_POGO_E02=y CONFIG_IDENT_STRING="\nPogo E02" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-pogo_e02" CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="PogoE02> " @@ -18,6 +19,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_JFFS2=y CONFIG_CMD_UBI=y CONFIG_ISO_PARTITION=y +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y # CONFIG_MMC is not set CONFIG_NETDEVICES=y @@ -26,4 +28,3 @@ CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig index 2670b4b75ae..16e0a88903a 100644 --- a/configs/popmetal-rk3288_defconfig +++ b/configs/popmetal-rk3288_defconfig @@ -5,6 +5,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ROCKCHIP_RK3288=y CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y CONFIG_TARGET_POPMETAL_RK3288=y +CONFIG_DEBUG_UART_BASE=0xff690000 +CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-popmetal" CONFIG_DEBUG_UART=y @@ -15,8 +17,6 @@ CONFIG_CONSOLE_MUX=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -42,6 +42,9 @@ CONFIG_SPL_SYSCON=y # CONFIG_SPL_SIMPLE_BUS is not set CONFIG_CLK=y CONFIG_SPL_CLK=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MMC_DW=y @@ -60,8 +63,6 @@ CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y -CONFIG_DEBUG_UART_BASE=0xff690000 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y CONFIG_USB=y diff --git a/configs/porter_defconfig b/configs/porter_defconfig index b04627efa3d..17937aa3462 100644 --- a/configs/porter_defconfig +++ b/configs/porter_defconfig @@ -11,11 +11,11 @@ CONFIG_ARCH_RMOBILE_BOARD_STRING="Porter" CONFIG_R8A7791=y CONFIG_TARGET_PORTER=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="r8a7791-porter-u-boot" -CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_VERSION_VARIABLE=y @@ -46,6 +46,9 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y +CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nor0=spi0.0" +CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:256k(u-boot-spl),512k(u-boot-env1),512k(u-boot-env2),768k(u-boot),-(user)" CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_ENV_IS_IN_SPI_FLASH=y @@ -57,9 +60,11 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_RCAR_IIC=y CONFIG_DM_MMC=y CONFIG_RENESAS_SDHI=y +CONFIG_MTD=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_MTD=y CONFIG_PHY_MICREL=y CONFIG_DM_ETH=y CONFIG_SH_ETHER=y diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index e6539a7da8d..c11a69bfe67 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -8,9 +8,11 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_ROCKCHIP_RK3399=y CONFIG_ROCKCHIP_BOOT_MODE_REG=0x0 CONFIG_TARGET_PUMA_RK3399=y +CONFIG_DEBUG_UART_BASE=0xFF180000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-puma-ddr1600" CONFIG_DEBUG_UART=y CONFIG_FIT=y @@ -82,8 +84,6 @@ CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_DM_RTC=y CONFIG_RTC_ISL1208=y -CONFIG_DEBUG_UART_BASE=0xFF180000 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_ROCKCHIP_SPI=y CONFIG_SYSRESET=y diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig index 8b8e580ecd5..459f8fe48e6 100644 --- a/configs/pxm2_defconfig +++ b/configs/pxm2_defconfig @@ -10,12 +10,11 @@ CONFIG_SYS_MPUCLK=720 CONFIG_TARGET_PXM2=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y +CONFIG_SPL_FAT_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SPL=y -CONFIG_SPL_FAT_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="am335x-pxm50" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_BOOTDELAY=3 @@ -26,6 +25,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot# " diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig index 196c17e8b9a..d2eb53f091c 100644 --- a/configs/qemu-x86_64_defconfig +++ b/configs/qemu-x86_64_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x1000 CONFIG_MAX_CPUS=2 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_DEBUG_UART_BASE=0x3f8 +CONFIG_DEBUG_UART_CLOCK=1843200 CONFIG_SPL_SPI_SUPPORT=y CONFIG_X86_RUN_64BIT=y CONFIG_DEFAULT_DEVICE_TREE="qemu-x86_i440fx" @@ -60,8 +62,6 @@ CONFIG_SPL_REGMAP=y CONFIG_SYSCON=y CONFIG_SPL_SYSCON=y CONFIG_CPU=y -CONFIG_DEBUG_UART_BASE=0x3f8 -CONFIG_DEBUG_UART_CLOCK=1843200 CONFIG_SPI=y CONFIG_SPL_TIMER=y CONFIG_USB_STORAGE=y diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig new file mode 100644 index 00000000000..591eafed3b9 --- /dev/null +++ b/configs/r8a77990_ebisu_defconfig @@ -0,0 +1,64 @@ +CONFIG_ARM=y +CONFIG_ARCH_RMOBILE=y +CONFIG_SYS_TEXT_BASE=0x50000000 +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_RCAR_GEN3=y +CONFIG_R8A77990=y +CONFIG_TARGET_EBISU=y +CONFIG_DEFAULT_DEVICE_TREE="r8a77990-ebisu-u-boot" +CONFIG_SMBIOS_PRODUCT_NAME="" +CONFIG_FIT=y +# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttySC0,115200" +CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_DEFAULT_FDT_FILE="r8a77990-ebisu.dtb" +CONFIG_VERSION_VARIABLE=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_CONTROL=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_REGMAP=y +CONFIG_SYSCON=y +CONFIG_CLK=y +CONFIG_CLK_RENESAS=y +CONFIG_DM_GPIO=y +CONFIG_RCAR_GPIO=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_RCAR_IIC=y +CONFIG_DM_MMC=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS200_SUPPORT=y +CONFIG_RENESAS_SDHI=y +CONFIG_PHY_MICREL=y +CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_DM_ETH=y +CONFIG_RENESAS_RAVB=y +CONFIG_PINCTRL=y +CONFIG_PINCONF=y +CONFIG_PINCTRL_PFC=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_SCIF_CONSOLE=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_STORAGE=y +CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_SMBIOS_MANUFACTURER="" diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig index 450b21a5891..7fdd6ddc56a 100644 --- a/configs/rastaban_defconfig +++ b/configs/rastaban_defconfig @@ -10,12 +10,11 @@ CONFIG_SYS_MPUCLK=300 CONFIG_TARGET_RASTABAN=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y +CONFIG_SPL_FAT_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SPL=y -CONFIG_SPL_FAT_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_BOOTDELAY=3 @@ -24,6 +23,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set CONFIG_HUSH_PARSER=y diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig index cd9a8219746..0e45582e45c 100644 --- a/configs/rock2_defconfig +++ b/configs/rock2_defconfig @@ -5,6 +5,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ROCKCHIP_RK3288=y CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y CONFIG_TARGET_ROCK2=y +CONFIG_DEBUG_UART_BASE=0xff690000 +CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-rock2-square" CONFIG_DEBUG_UART=y @@ -14,8 +16,6 @@ CONFIG_SILENT_CONSOLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -42,6 +42,9 @@ CONFIG_SPL_SYSCON=y # CONFIG_SPL_SIMPLE_BUS is not set CONFIG_CLK=y CONFIG_SPL_CLK=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MMC_DW=y @@ -61,8 +64,6 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y -CONFIG_DEBUG_UART_BASE=0xff690000 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y CONFIG_USB=y diff --git a/configs/rock_defconfig b/configs/rock_defconfig index 00ce9c465a4..802aa8dfac8 100644 --- a/configs/rock_defconfig +++ b/configs/rock_defconfig @@ -7,6 +7,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ROCKCHIP_RK3188=y CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y CONFIG_TARGET_ROCK=y +CONFIG_DEBUG_UART_BASE=0x20064000 +CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x60080000 CONFIG_DEFAULT_DEVICE_TREE="rk3188-radxarock" CONFIG_DEBUG_UART=y @@ -44,8 +46,6 @@ CONFIG_PMIC_ACT8846=y CONFIG_REGULATOR_ACT8846=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_RAM=y -CONFIG_DEBUG_UART_BASE=0x20064000 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y CONFIG_TIMER=y diff --git a/configs/rut_defconfig b/configs/rut_defconfig index 64384c41a31..07710d272da 100644 --- a/configs/rut_defconfig +++ b/configs/rut_defconfig @@ -10,12 +10,11 @@ CONFIG_SYS_MPUCLK=600 CONFIG_TARGET_RUT=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y +CONFIG_SPL_FAT_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SPL=y -CONFIG_SPL_FAT_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="am335x-rut" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_BOOTDELAY=3 @@ -27,6 +26,7 @@ CONFIG_ARCH_EARLY_INIT_R=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot# " diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig index 0b9a47ece2c..53d4b7ce0ca 100644 --- a/configs/sama5d27_som1_ek_mmc_defconfig +++ b/configs/sama5d27_som1_ek_mmc_defconfig @@ -9,9 +9,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL=y +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xf8020000 +CONFIG_DEBUG_UART_CLOCK=82000000 CONFIG_SPL_FAT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_som1_ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y @@ -68,9 +71,6 @@ CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_AT91PIO4=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xf8020000 -CONFIG_DEBUG_UART_CLOCK=82000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/sama5d2_ptc_ek_mmc_defconfig b/configs/sama5d2_ptc_ek_mmc_defconfig index 9c3c57806d2..3fc18a132d6 100644 --- a/configs/sama5d2_ptc_ek_mmc_defconfig +++ b/configs/sama5d2_ptc_ek_mmc_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D2_PTC_EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xf801c000 +CONFIG_DEBUG_UART_CLOCK=82000000 CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_ptc_ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y @@ -48,9 +51,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91PIO4=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xf801c000 -CONFIG_DEBUG_UART_CLOCK=82000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_TIMER=y diff --git a/configs/sama5d2_ptc_ek_nandflash_defconfig b/configs/sama5d2_ptc_ek_nandflash_defconfig index 94d5492f990..886f34202ce 100644 --- a/configs/sama5d2_ptc_ek_nandflash_defconfig +++ b/configs/sama5d2_ptc_ek_nandflash_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D2_PTC_EK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xf801c000 +CONFIG_DEBUG_UART_CLOCK=82000000 CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_ptc_ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y @@ -48,9 +51,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91PIO4=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xf801c000 -CONFIG_DEBUG_UART_CLOCK=82000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_TIMER=y diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig index 066fdb36c58..4182e84b26b 100644 --- a/configs/sama5d2_xplained_mmc_defconfig +++ b/configs/sama5d2_xplained_mmc_defconfig @@ -9,9 +9,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL=y +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xf8020000 +CONFIG_DEBUG_UART_CLOCK=83000000 CONFIG_SPL_FAT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y @@ -34,11 +37,13 @@ CONFIG_CMD_SF=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y +CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names" CONFIG_ENV_IS_IN_FAT=y +CONFIG_ENV_FAT_DEVICE_AND_PART="1:1" CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y @@ -66,9 +71,6 @@ CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_AT91PIO4=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xf8020000 -CONFIG_DEBUG_UART_CLOCK=83000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig index 87bca1f6fbf..18d1cb55890 100644 --- a/configs/sama5d2_xplained_spiflash_defconfig +++ b/configs/sama5d2_xplained_spiflash_defconfig @@ -8,9 +8,12 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xf8020000 +CONFIG_DEBUG_UART_CLOCK=83000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y @@ -18,7 +21,7 @@ CONFIG_FIT=y CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256K(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs" +CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p1 rw rootwait" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL_SPI_LOAD=y CONFIG_HUSH_PARSER=y @@ -32,6 +35,7 @@ CONFIG_CMD_SF=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y +CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y @@ -64,9 +68,6 @@ CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_AT91PIO4=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xf8020000 -CONFIG_DEBUG_UART_CLOCK=83000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/sama5d36ek_cmp_mmc_defconfig b/configs/sama5d36ek_cmp_mmc_defconfig index 7f8c92ea62e..90a4577508f 100644 --- a/configs/sama5d36ek_cmp_mmc_defconfig +++ b/configs/sama5d36ek_cmp_mmc_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3XEK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xffffee00 +CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y @@ -46,9 +49,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xffffee00 -CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/sama5d36ek_cmp_nandflash_defconfig b/configs/sama5d36ek_cmp_nandflash_defconfig index afe29c6fbce..9a0e260b30d 100644 --- a/configs/sama5d36ek_cmp_nandflash_defconfig +++ b/configs/sama5d36ek_cmp_nandflash_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3XEK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xffffee00 +CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y @@ -46,9 +49,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xffffee00 -CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/sama5d36ek_cmp_spiflash_defconfig b/configs/sama5d36ek_cmp_spiflash_defconfig index 7c8668ec692..9f7af62ca60 100644 --- a/configs/sama5d36ek_cmp_spiflash_defconfig +++ b/configs/sama5d36ek_cmp_spiflash_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3XEK=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xffffee00 +CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y @@ -46,9 +49,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xffffee00 -CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig index e626d021cef..861a8518283 100644 --- a/configs/sama5d3_xplained_mmc_defconfig +++ b/configs/sama5d3_xplained_mmc_defconfig @@ -9,9 +9,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL=y +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xffffee00 +CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_SPL_FAT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y @@ -61,9 +64,6 @@ CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xffffee00 -CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_TIMER=y diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig index 62716b6c4de..b72462d2824 100644 --- a/configs/sama5d3_xplained_nandflash_defconfig +++ b/configs/sama5d3_xplained_nandflash_defconfig @@ -8,8 +8,10 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xffffee00 +CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y @@ -19,6 +21,7 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs" # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set @@ -58,9 +61,6 @@ CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xffffee00 -CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_TIMER=y diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig index 827c26ae10b..37f0eb9c8d7 100644 --- a/configs/sama5d3xek_mmc_defconfig +++ b/configs/sama5d3xek_mmc_defconfig @@ -9,9 +9,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL=y +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xffffee00 +CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_SPL_FAT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y @@ -68,9 +71,6 @@ CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xffffee00 -CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig index d71ccd42e56..972926dd045 100644 --- a/configs/sama5d3xek_nandflash_defconfig +++ b/configs/sama5d3xek_nandflash_defconfig @@ -8,8 +8,10 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xffffee00 +CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y @@ -21,6 +23,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(boots # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set @@ -63,9 +66,6 @@ CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xffffee00 -CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig index 9c362629763..5fb38f6e6ff 100644 --- a/configs/sama5d3xek_spiflash_defconfig +++ b/configs/sama5d3xek_spiflash_defconfig @@ -8,9 +8,12 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xffffee00 +CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y @@ -63,9 +66,6 @@ CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xffffee00 -CONFIG_DEBUG_UART_CLOCK=132000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig index ca47a6bef1f..5e1234b7797 100644 --- a/configs/sama5d4_xplained_mmc_defconfig +++ b/configs/sama5d4_xplained_mmc_defconfig @@ -9,9 +9,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL=y +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfc00c000 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_SPL_FAT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y @@ -62,9 +65,6 @@ CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfc00c000 -CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig index d4f8702e56c..e017e0314e0 100644 --- a/configs/sama5d4_xplained_nandflash_defconfig +++ b/configs/sama5d4_xplained_nandflash_defconfig @@ -8,8 +8,10 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfc00c000 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y @@ -19,6 +21,7 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs" # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set @@ -59,9 +62,6 @@ CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfc00c000 -CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig index 2dd4c685d6f..dc17f9b6031 100644 --- a/configs/sama5d4_xplained_spiflash_defconfig +++ b/configs/sama5d4_xplained_spiflash_defconfig @@ -8,9 +8,12 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfc00c000 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y @@ -62,9 +65,6 @@ CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfc00c000 -CONFIG_DEBUG_UART_CLOCK=100000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig index 234939abce0..cf57caeb047 100644 --- a/configs/sama5d4ek_mmc_defconfig +++ b/configs/sama5d4ek_mmc_defconfig @@ -9,9 +9,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL=y +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfc00c000 +CONFIG_DEBUG_UART_CLOCK=88000000 CONFIG_SPL_FAT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y @@ -62,9 +65,6 @@ CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfc00c000 -CONFIG_DEBUG_UART_CLOCK=88000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig index df4a0dbb93b..27c79cbe85c 100644 --- a/configs/sama5d4ek_nandflash_defconfig +++ b/configs/sama5d4ek_nandflash_defconfig @@ -8,8 +8,10 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfc00c000 +CONFIG_DEBUG_UART_CLOCK=88000000 CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y @@ -21,6 +23,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(boots # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMI is not set @@ -59,9 +62,6 @@ CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfc00c000 -CONFIG_DEBUG_UART_CLOCK=88000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig index 0fc9c4e8f66..5269bc64e63 100644 --- a/configs/sama5d4ek_spiflash_defconfig +++ b/configs/sama5d4ek_spiflash_defconfig @@ -8,9 +8,12 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfc00c000 +CONFIG_DEBUG_UART_CLOCK=88000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek" CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y @@ -59,9 +62,6 @@ CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ATMEL=y -CONFIG_DEBUG_UART_BASE=0xfc00c000 -CONFIG_DEBUG_UART_CLOCK=88000000 -CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_SPI=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index c1cdd59c545..2fc84a16c91 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -142,6 +142,7 @@ CONFIG_DM_PMIC=y CONFIG_PMIC_ACT8846=y CONFIG_DM_PMIC_PFUZE100=y CONFIG_DM_PMIC_MAX77686=y +CONFIG_DM_PMIC_MC34708=y CONFIG_PMIC_PM8916=y CONFIG_PMIC_RK8XX=y CONFIG_PMIC_S2MPS11=y diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig index 9b8d0338382..e922c4b38ff 100644 --- a/configs/sandbox_flattree_defconfig +++ b/configs/sandbox_flattree_defconfig @@ -125,6 +125,7 @@ CONFIG_DM_PMIC=y CONFIG_PMIC_ACT8846=y CONFIG_DM_PMIC_PFUZE100=y CONFIG_DM_PMIC_MAX77686=y +CONFIG_DM_PMIC_MC34708=y CONFIG_PMIC_PM8916=y CONFIG_PMIC_S2MPS11=y CONFIG_DM_PMIC_SANDBOX=y diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig index c3086281996..fb6bb4baa2b 100644 --- a/configs/sandbox_spl_defconfig +++ b/configs/sandbox_spl_defconfig @@ -141,6 +141,7 @@ CONFIG_DM_PMIC=y CONFIG_PMIC_ACT8846=y CONFIG_DM_PMIC_PFUZE100=y CONFIG_DM_PMIC_MAX77686=y +CONFIG_DM_PMIC_MC34708=y CONFIG_PMIC_PM8916=y CONFIG_PMIC_RK8XX=y CONFIG_PMIC_S2MPS11=y diff --git a/configs/sheep-rk3368_defconfig b/configs/sheep-rk3368_defconfig index 8ada6823d0d..b977e8cb594 100644 --- a/configs/sheep-rk3368_defconfig +++ b/configs/sheep-rk3368_defconfig @@ -4,6 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SYS_MALLOC_F_LEN=0x1000 CONFIG_ROCKCHIP_RK3368=y CONFIG_TARGET_SHEEP=y +CONFIG_DEBUG_UART_BASE=0xFF1b0000 +CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEFAULT_DEVICE_TREE="rk3368-sheep" CONFIG_DEBUG_UART=y CONFIG_ANDROID_BOOT_IMAGE=y @@ -18,8 +20,6 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_PINCTRL=y CONFIG_PINCTRL_ROCKCHIP_RK3368=y CONFIG_RAM=y -CONFIG_DEBUG_UART_BASE=0xFF1b0000 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig index 25a8e5340e0..d77d198f186 100644 --- a/configs/sheevaplug_defconfig +++ b/configs/sheevaplug_defconfig @@ -3,6 +3,7 @@ CONFIG_KIRKWOOD=y CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_TARGET_SHEEVAPLUG=y CONFIG_IDENT_STRING="\nMarvell-Sheevaplug" +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-sheevaplug" CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_HUSH_PARSER=y @@ -25,6 +26,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=orion_nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:512K(uboot),512K(env),4M(kernel),-(rootfs)" CONFIG_CMD_UBI=y CONFIG_ISO_PARTITION=y +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_MVSATA_IDE=y CONFIG_NETDEVICES=y @@ -34,4 +36,4 @@ CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_LZMA=y -CONFIG_OF_LIBFDT=y +CONFIG_SYS_THUMB_BUILD=y diff --git a/configs/silk_defconfig b/configs/silk_defconfig index c163e823b5b..0d0a13aef62 100644 --- a/configs/silk_defconfig +++ b/configs/silk_defconfig @@ -11,11 +11,11 @@ CONFIG_ARCH_RMOBILE_BOARD_STRING="Silk" CONFIG_R8A7794=y CONFIG_TARGET_SILK=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="r8a7794-silk-u-boot" -CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_VERSION_VARIABLE=y @@ -46,6 +46,9 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y +CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nor0=spi0.0" +CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:256k(u-boot-spl),512k(u-boot-env1),512k(u-boot-env2),768k(u-boot),-(user)" CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_ENV_IS_IN_SPI_FLASH=y @@ -54,13 +57,16 @@ CONFIG_CLK_RENESAS=y CONFIG_DM_GPIO=y CONFIG_RCAR_GPIO=y CONFIG_DM_I2C=y +CONFIG_SYS_I2C_RCAR_I2C=y CONFIG_SYS_I2C_RCAR_IIC=y CONFIG_DM_MMC=y CONFIG_SH_MMCIF=y CONFIG_RENESAS_SDHI=y +CONFIG_MTD=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_MTD=y CONFIG_PHY_MICREL=y CONFIG_DM_ETH=y CONFIG_SH_ETHER=y diff --git a/configs/sksimx6_defconfig b/configs/sksimx6_defconfig index 01c93867af6..f4e0aefabb1 100644 --- a/configs/sksimx6_defconfig +++ b/configs/sksimx6_defconfig @@ -9,9 +9,8 @@ CONFIG_TARGET_SKSIMX6=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -24,6 +23,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_CACHE=y diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig index e0d6cd432e4..1f246e32ed6 100644 --- a/configs/smartweb_defconfig +++ b/configs/smartweb_defconfig @@ -9,15 +9,15 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9260-smartweb" -CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260" CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot# " CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/sniper_defconfig b/configs/sniper_defconfig index ad22a1cbe2f..7e7f7dfa748 100644 --- a/configs/sniper_defconfig +++ b/configs/sniper_defconfig @@ -3,7 +3,6 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_TEXT_BASE=0x80100000 CONFIG_TARGET_SNIPER=y -# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y # CONFIG_USE_BOOTCOMMAND is not set @@ -12,18 +11,19 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=2 # CONFIG_SPL_EXT_SUPPORT is not set +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SYS_PROMPT="sniper # " -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x82000000 -CONFIG_FASTBOOT_BUF_SIZE=0x2000000 -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x82000000 +CONFIG_FASTBOOT_BUF_SIZE=0x2000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_SYS_OMAP24_I2C_SPEED=400000 CONFIG_MMC_OMAP_HS=y CONFIG_CONS_INDEX=3 diff --git a/configs/snow_defconfig b/configs/snow_defconfig index 9d14eb84f8c..7440ab3d13a 100644 --- a/configs/snow_defconfig +++ b/configs/snow_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_TEXT_BASE=0x43E00000 CONFIG_ARCH_EXYNOS5=y CONFIG_TARGET_SNOW=y CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0x12c30000 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_IDENT_STRING=" for snow" CONFIG_DEFAULT_DEVICE_TREE="exynos5250-snow" CONFIG_DEBUG_UART=y @@ -58,8 +60,6 @@ CONFIG_REGULATOR_TPS65090=y CONFIG_DM_PWM=y CONFIG_PWM_EXYNOS=y CONFIG_DEBUG_UART_S5P=y -CONFIG_DEBUG_UART_BASE=0x12c30000 -CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_SOUND=y CONFIG_I2S=y CONFIG_I2S_SAMSUNG=y diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig index 7614f9472f9..f3fea51c4ae 100644 --- a/configs/socfpga_arria10_defconfig +++ b/configs/socfpga_arria10_defconfig @@ -32,6 +32,5 @@ CONFIG_FPGA_SOCFPGA=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y CONFIG_DM_MMC=y -CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_USE_TINY_PRINTF=y diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index 6b2b7fe4413..41c98801be9 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -58,7 +58,6 @@ CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_DM_RESET=y -CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index f7e93efd548..76936da1d03 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -59,7 +59,6 @@ CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_DM_RESET=y -CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y diff --git a/configs/socfpga_dbm_soc1_defconfig b/configs/socfpga_dbm_soc1_defconfig index 0f89ef7d40d..3659a6c3234 100644 --- a/configs/socfpga_dbm_soc1_defconfig +++ b/configs/socfpga_dbm_soc1_defconfig @@ -53,7 +53,6 @@ CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_DM_RESET=y -CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_USB=y CONFIG_DM_USB=y diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig index 352bdad68dc..643542d2c93 100644 --- a/configs/socfpga_de0_nano_soc_defconfig +++ b/configs/socfpga_de0_nano_soc_defconfig @@ -53,7 +53,6 @@ CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_DM_RESET=y -CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig index dc051d27c11..bf292fd79b0 100644 --- a/configs/socfpga_de10_nano_defconfig +++ b/configs/socfpga_de10_nano_defconfig @@ -49,7 +49,6 @@ CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_DM_RESET=y -CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y diff --git a/configs/socfpga_de1_soc_defconfig b/configs/socfpga_de1_soc_defconfig index d1af22daeef..f1a75997353 100644 --- a/configs/socfpga_de1_soc_defconfig +++ b/configs/socfpga_de1_soc_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_TEXT_BASE=0x01000040 CONFIG_SYS_MALLOC_F_LEN=0x2000 -# CONFIG_SPL_SPI_SUPPORT is not set CONFIG_TARGET_SOCFPGA_TERASIC_DE1_SOC=y CONFIG_SPL=y CONFIG_SPL_STACK_R_ADDR=0x00800000 @@ -49,7 +48,6 @@ CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_DM_RESET=y -CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_USB=y CONFIG_DM_USB=y diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig index 5e32fedcbdb..655a4c314f0 100644 --- a/configs/socfpga_is1_defconfig +++ b/configs/socfpga_is1_defconfig @@ -53,6 +53,5 @@ CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_DM_RESET=y -CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig index ffc6e051c7d..fcae88d09fe 100644 --- a/configs/socfpga_mcvevk_defconfig +++ b/configs/socfpga_mcvevk_defconfig @@ -52,7 +52,6 @@ CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_DM_RESET=y -CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig index 6d67b3bfbe9..006c4d127fd 100644 --- a/configs/socfpga_sockit_defconfig +++ b/configs/socfpga_sockit_defconfig @@ -59,7 +59,6 @@ CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_DM_RESET=y -CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index ed7b084ef40..dcbab530823 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -59,7 +59,6 @@ CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_DM_RESET=y -CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index e4b499f4a38..a65c69d146c 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -59,7 +59,6 @@ CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_DM_RESET=y -CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y CONFIG_USE_TINY_PRINTF=y diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig index 9b6c456267b..6df9dcf58f8 100644 --- a/configs/socfpga_vining_fpga_defconfig +++ b/configs/socfpga_vining_fpga_defconfig @@ -74,7 +74,6 @@ CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_DM_RESET=y -CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y diff --git a/configs/som-db5800-som-6867_defconfig b/configs/som-db5800-som-6867_defconfig index dbf73b3ad8d..9a2676adcdb 100644 --- a/configs/som-db5800-som-6867_defconfig +++ b/configs/som-db5800-som-6867_defconfig @@ -1,5 +1,7 @@ CONFIG_X86=y CONFIG_SYS_TEXT_BASE=0xFFF00000 +CONFIG_DEBUG_UART_BASE=0x3f8 +CONFIG_DEBUG_UART_CLOCK=1843200 CONFIG_VENDOR_ADVANTECH=y CONFIG_TARGET_SOM_DB5800_SOM_6867=y CONFIG_DEFAULT_DEVICE_TREE="baytrail_som-db5800-som-6867" @@ -45,8 +47,6 @@ CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_CPU=y CONFIG_E1000=y -CONFIG_DEBUG_UART_BASE=0x3f8 -CONFIG_DEBUG_UART_CLOCK=1843200 CONFIG_SPI=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y diff --git a/configs/spring_defconfig b/configs/spring_defconfig index 821d32ece92..146cf0807b3 100644 --- a/configs/spring_defconfig +++ b/configs/spring_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_TEXT_BASE=0x43E00000 CONFIG_ARCH_EXYNOS5=y CONFIG_TARGET_SPRING=y CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0x12c30000 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_IDENT_STRING=" for spring" CONFIG_DEFAULT_DEVICE_TREE="exynos5250-spring" CONFIG_DEBUG_UART=y @@ -58,8 +60,6 @@ CONFIG_REGULATOR_TPS65090=y CONFIG_DM_PWM=y CONFIG_PWM_EXYNOS=y CONFIG_DEBUG_UART_S5P=y -CONFIG_DEBUG_UART_BASE=0x12c30000 -CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_SOUND=y CONFIG_I2S=y CONFIG_I2S_SAMSUNG=y diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig index 67391bdfdf7..ba1ff25d355 100644 --- a/configs/stih410-b2260_defconfig +++ b/configs/stih410-b2260_defconfig @@ -10,11 +10,6 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAS1,115200 CONSOLE=/dev/ttyAS1 consoleblank=0 root=/dev/mmcblk0p2 rootfstype=ext4 rw rootwait mem=992M@0x40000000 vmalloc=256m" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="stih410-b2260 => " -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_BUF_ADDR=0x40000000 -CONFIG_FASTBOOT_BUF_SIZE=0x3DF00000 -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y @@ -26,6 +21,12 @@ CONFIG_OF_CONTROL=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_CLK=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x40000000 +CONFIG_FASTBOOT_BUF_SIZE=0x3DF00000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_MISC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_STI=y diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index b1c3690c009..3a94db52abe 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_PROMPT="STM32MP> " # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CMD_MEMINFO=y +CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -39,4 +40,3 @@ CONFIG_DM_REGULATOR_GPIO=y CONFIG_DM_REGULATOR_STM32_VREFBUF=y CONFIG_DM_REGULATOR_STPMU1=y CONFIG_STM32_SERIAL=y -# CONFIG_EFI_LOADER is not set diff --git a/configs/stout_defconfig b/configs/stout_defconfig index d940932bafd..c6c91e98b0c 100644 --- a/configs/stout_defconfig +++ b/configs/stout_defconfig @@ -11,11 +11,11 @@ CONFIG_ARCH_RMOBILE_BOARD_STRING="Stout" CONFIG_R8A7790=y CONFIG_TARGET_STOUT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="r8a7790-stout-u-boot" -CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_VERSION_VARIABLE=y @@ -46,6 +46,9 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y +CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nor0=spi0.0" +CONFIG_MTDPARTS_DEFAULT="mtdparts=spi0.0:256k(u-boot-spl),512k(u-boot-env1),512k(u-boot-env2),768k(u-boot),-(user)" CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_ENV_IS_IN_SPI_FLASH=y @@ -57,9 +60,11 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_RCAR_IIC=y CONFIG_DM_MMC=y CONFIG_RENESAS_SDHI=y +CONFIG_MTD=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_MTD=y CONFIG_PHY_MICREL=y CONFIG_DM_ETH=y CONFIG_SH_ETHER=y diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig index 4ceff11924b..6fb56afbe94 100644 --- a/configs/syzygy_hub_defconfig +++ b/configs/syzygy_hub_defconfig @@ -4,6 +4,8 @@ CONFIG_SYS_CONFIG_NAME="syzygy_hub" CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xe0000000 +CONFIG_DEBUG_UART_CLOCK=50000000 CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_DEFAULT_DEVICE_TREE="zynq-syzygy-hub" CONFIG_DEBUG_UART=y @@ -45,8 +47,6 @@ CONFIG_PHY_REALTEK=y CONFIG_PHY_XILINX=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xe0000000 -CONFIG_DEBUG_UART_CLOCK=50000000 CONFIG_ZYNQ_SERIAL=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig index 81b95b2903e..20057be7e53 100644 --- a/configs/taurus_defconfig +++ b/configs/taurus_defconfig @@ -11,10 +11,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x1000 CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus" CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2067,BOARD_TAURUS" CONFIG_BOOTDELAY=3 @@ -22,6 +21,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_SPI_LOAD=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index a30ff224b24..99093e0c68e 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -53,5 +53,4 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_VIDEO=y -CONFIG_CFB_CONSOLE_ANSI=y CONFIG_OF_LIBFDT=y diff --git a/configs/tbs_a711_defconfig b/configs/tbs_a711_defconfig index 3e3de4fbb30..5d58f5ceb4e 100644 --- a/configs/tbs_a711_defconfig +++ b/configs/tbs_a711_defconfig @@ -16,6 +16,7 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-tbs-a711" # CONFIG_CMD_FLASH is not set # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_AXP_DCDC5_VOLT=1200 CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig index 1fef3cde313..473d5ec7288 100644 --- a/configs/theadorable_debug_defconfig +++ b/configs/theadorable_debug_defconfig @@ -6,9 +6,11 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_THEADORABLE=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xd0012000 +CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="armada-xp-theadorable" CONFIG_DEBUG_UART=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set @@ -58,8 +60,6 @@ CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVNETA=y CONFIG_PCI=y -CONFIG_DEBUG_UART_BASE=0xd0012000 -CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig index 2bf0aa3542d..4eb58015b59 100644 --- a/configs/thuban_defconfig +++ b/configs/thuban_defconfig @@ -10,12 +10,11 @@ CONFIG_SYS_MPUCLK=300 CONFIG_TARGET_THUBAN=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y +CONFIG_SPL_FAT_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SPL=y -CONFIG_SPL_FAT_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_BOOTDELAY=3 @@ -24,6 +23,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_YMODEM_SUPPORT=y # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set CONFIG_HUSH_PARSER=y diff --git a/configs/thunderx_88xx_defconfig b/configs/thunderx_88xx_defconfig index a68f9970524..b7c01aa634d 100644 --- a/configs/thunderx_88xx_defconfig +++ b/configs/thunderx_88xx_defconfig @@ -1,6 +1,8 @@ CONFIG_ARM=y CONFIG_TARGET_THUNDERX_88XX=y CONFIG_SYS_TEXT_BASE=0x00500000 +CONFIG_DEBUG_UART_BASE=0x87e024000000 +CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" for Cavium Thunder CN88XX ARM v8 Multi-Core" CONFIG_DEFAULT_DEVICE_TREE="thunderx-88xx" CONFIG_DEBUG_UART=y @@ -23,6 +25,4 @@ CONFIG_DM=y # CONFIG_MMC is not set CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_PL011=y -CONFIG_DEBUG_UART_BASE=0x87e024000000 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SKIP_INIT=y diff --git a/configs/ti814x_evm_defconfig b/configs/ti814x_evm_defconfig index 1121ba23228..3086b72d21b 100644 --- a/configs/ti814x_evm_defconfig +++ b/configs/ti814x_evm_defconfig @@ -7,9 +7,9 @@ CONFIG_TI814X=y CONFIG_TARGET_TI814X_EVM=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FAT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_BOOTDELAY=1 CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig index 0ebd8a5d5ce..17d3308991f 100644 --- a/configs/ti816x_evm_defconfig +++ b/configs/ti816x_evm_defconfig @@ -7,10 +7,9 @@ CONFIG_TI816X=y CONFIG_TARGET_TI816X_EVM=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_FAT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="dm8168-evm" CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 @@ -22,6 +21,7 @@ CONFIG_VERSION_VARIABLE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 +CONFIG_SPL_NAND_SUPPORT=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig index fb6bfa57ad7..679d6e29eaf 100644 --- a/configs/tinker-rk3288_defconfig +++ b/configs/tinker-rk3288_defconfig @@ -5,6 +5,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ROCKCHIP_RK3288=y CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y CONFIG_TARGET_TINKER_RK3288=y +CONFIG_DEBUG_UART_BASE=0xff690000 +CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker" CONFIG_DEBUG_UART=y @@ -16,8 +18,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SPL_I2C_SUPPORT=y -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -43,6 +43,9 @@ CONFIG_SPL_SYSCON=y # CONFIG_SPL_SIMPLE_BUS is not set CONFIG_CLK=y CONFIG_SPL_CLK=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y @@ -63,8 +66,6 @@ CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y -CONFIG_DEBUG_UART_BASE=0xff690000 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y CONFIG_USB=y diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig index 7ea09ac15e5..af5b92cd34d 100644 --- a/configs/topic_miami_defconfig +++ b/configs/topic_miami_defconfig @@ -4,6 +4,8 @@ CONFIG_SYS_CONFIG_NAME="topic_miami" CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xe0000000 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miami/ps7_regs.txt" CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miami" @@ -42,8 +44,6 @@ CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xe0000000 -CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ZYNQ_SERIAL=y CONFIG_ZYNQ_QSPI=y CONFIG_USB=y diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig index d30843c38b7..ad7ba04d857 100644 --- a/configs/topic_miamilite_defconfig +++ b/configs/topic_miamilite_defconfig @@ -4,6 +4,8 @@ CONFIG_SYS_CONFIG_NAME="topic_miami" CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xe0000000 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miamilite/ps7_regs.txt" CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamilite" @@ -43,8 +45,6 @@ CONFIG_SF_DUAL_FLASH=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xe0000000 -CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ZYNQ_SERIAL=y CONFIG_ZYNQ_QSPI=y CONFIG_USB=y diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig index 9710d955093..7455e86622b 100644 --- a/configs/topic_miamiplus_defconfig +++ b/configs/topic_miamiplus_defconfig @@ -4,6 +4,8 @@ CONFIG_SYS_CONFIG_NAME="topic_miami" CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xe0000000 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miamiplus/ps7_regs.txt" CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamiplus" @@ -43,8 +45,6 @@ CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set # CONFIG_NETDEVICES is not set CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xe0000000 -CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ZYNQ_SERIAL=y CONFIG_ZYNQ_QSPI=y CONFIG_USB=y diff --git a/configs/turris_mox_defconfig b/configs/turris_mox_defconfig index 7dea7157dcd..33a48a73ee5 100644 --- a/configs/turris_mox_defconfig +++ b/configs/turris_mox_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_MVEBU=y CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_TURRIS_MOX=y +CONFIG_DEBUG_UART_BASE=0xd0012000 +CONFIG_DEBUG_UART_CLOCK=25804800 CONFIG_DEFAULT_DEVICE_TREE="armada-3720-turris-mox" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y @@ -11,8 +13,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_EARLY_INIT_R=y -# CONFIG_CMD_FLASH is not set CONFIG_CMD_CLK=y +# CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y @@ -28,36 +30,29 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_MAC_PARTITION=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_BLOCK_CACHE=y -CONFIG_DM_I2C=y -CONFIG_MISC=y CONFIG_CLK=y CONFIG_CLK_MVEBU=y -CONFIG_CLK_ARMADA_3720=y +CONFIG_DM_GPIO=y +# CONFIG_MVEBU_GPIO is not set +CONFIG_DM_I2C=y +CONFIG_MISC=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_XENON=y -CONFIG_WDT=y -CONFIG_WDT_ARMADA_37XX=y -CONFIG_DM_GPIO=y -# CONFIG_MVEBU_GPIO is not set -CONFIG_PINCTRL=y -CONFIG_PINCTRL_GENERIC=y -CONFIG_PINMUX=y -CONFIG_PINCTRL_ARMADA_37XX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y -CONFIG_PHYLIB=y CONFIG_PHY_GIGE=y CONFIG_MVNETA=y CONFIG_MVEBU_COMPHY_SUPPORT=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_ARMADA_37XX=y +CONFIG_DM_REGULATOR_FIXED=y # CONFIG_SPL_SERIAL_PRESENT is not set CONFIG_DEBUG_MVEBU_A3700_UART=y -CONFIG_DEBUG_UART_BASE=0xd0012000 -CONFIG_DEBUG_UART_CLOCK=25804800 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_MVEBU_A3700_UART=y @@ -72,5 +67,7 @@ CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_WDT=y +CONFIG_WDT_ARMADA_37XX=y CONFIG_SHA1=y CONFIG_SHA256=y diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index 99108c169e0..190f3dd04f4 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -6,9 +6,11 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_TURRIS_OMNIA=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xd0012000 +CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL=y CONFIG_DEFAULT_DEVICE_TREE="armada-385-turris-omnia" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y @@ -40,8 +42,6 @@ CONFIG_MMC_SDHCI_MV=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVNETA=y -CONFIG_DEBUG_UART_BASE=0xd0012000 -CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig index 2d8cedf8eae..1a162e5b17e 100644 --- a/configs/udoo_defconfig +++ b/configs/udoo_defconfig @@ -7,15 +7,15 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_UDOO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPIO=y diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig index fb02fc5a556..f09507ca009 100644 --- a/configs/udoo_neo_defconfig +++ b/configs/udoo_neo_defconfig @@ -7,9 +7,8 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_UDOO_NEO=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" @@ -17,6 +16,7 @@ CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_EXT_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig index d0d91225f6e..e5c1deb1841 100644 --- a/configs/uniphier_ld4_sld8_defconfig +++ b/configs/uniphier_ld4_sld8_defconfig @@ -4,13 +4,13 @@ CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_ARCH_UNIPHIER_LD4_SLD8=y CONFIG_MICRO_SUPPORT_CARD=y CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld4-ref" # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_LOGLEVEL=6 +CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig index 076ee193f1c..785f1ab2a0a 100644 --- a/configs/uniphier_v7_defconfig +++ b/configs/uniphier_v7_defconfig @@ -4,12 +4,12 @@ CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_MICRO_SUPPORT_CARD=y CONFIG_DEFAULT_DEVICE_TREE="uniphier-pxs2-vodka" # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_LOGLEVEL=6 +CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig index 1d28b2f1dbd..8cc030bd3c3 100644 --- a/configs/vining_2000_defconfig +++ b/configs/vining_2000_defconfig @@ -30,6 +30,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_EFI_PARTITION=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PCI=y diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig index 9e4e96a4f27..e721d0769be 100644 --- a/configs/vyasa-rk3288_defconfig +++ b/configs/vyasa-rk3288_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_TEXT_BASE=0x00100000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_VYASA_RK3288=y +CONFIG_DEBUG_UART_BASE=0xff690000 +CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-vyasa" CONFIG_DEBUG_UART=y @@ -60,8 +62,6 @@ CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y -CONFIG_DEBUG_UART_BASE=0xff690000 -CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYSRESET=y CONFIG_USB=y diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index 03335298eb6..a01ea523b28 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -7,9 +7,8 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_WANDBOARD=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_CMD_HDMIDETECT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" @@ -22,6 +21,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig index b936f4aab1c..9fd0bec2c81 100644 --- a/configs/warp7_defconfig +++ b/configs/warp7_defconfig @@ -1,7 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_MX7=y -CONFIG_SECURE_BOOT=y CONFIG_SYS_TEXT_BASE=0x87800000 +CONFIG_SECURE_BOOT=y CONFIG_TARGET_WARP7=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y # CONFIG_ARMV7_VIRT is not set @@ -21,7 +21,6 @@ CONFIG_CMD_MMC=y CONFIG_CMD_PART=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y -CONFIG_CMD_SETEXPR=y CONFIG_CMD_DHCP=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y diff --git a/configs/wb45n_defconfig b/configs/wb45n_defconfig index 02083520b6c..6dc7c2efc4f 100644 --- a/configs/wb45n_defconfig +++ b/configs/wb45n_defconfig @@ -6,12 +6,12 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9X5,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y diff --git a/configs/wb50n_defconfig b/configs/wb50n_defconfig index 306e4c16bf0..e6b6baa5e83 100644 --- a/configs/wb50n_defconfig +++ b/configs/wb50n_defconfig @@ -6,11 +6,11 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH" CONFIG_BOOTDELAY=3 +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y diff --git a/configs/woodburn_sd_defconfig b/configs/woodburn_sd_defconfig index bb51b611e73..4b1a54c2a5b 100644 --- a/configs/woodburn_sd_defconfig +++ b/configs/woodburn_sd_defconfig @@ -6,8 +6,8 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/woodburn/imximage.cfg" CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig index 0af69acde83..55e790f972d 100644 --- a/configs/work_92105_defconfig +++ b/configs/work_92105_defconfig @@ -4,7 +4,6 @@ CONFIG_SYS_TEXT_BASE=0x80100000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL=y CONFIG_CMD_HD44760=y CONFIG_CMD_MAX6957=y @@ -17,6 +16,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_EEPROM=y # CONFIG_CMD_FLASH is not set diff --git a/configs/xilinx_zynqmp_r5_defconfig b/configs/xilinx_zynqmp_r5_defconfig index 46715242e70..52b3f75902c 100644 --- a/configs/xilinx_zynqmp_r5_defconfig +++ b/configs/xilinx_zynqmp_r5_defconfig @@ -1,6 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_ZYNQMP_R5=y CONFIG_SYS_TEXT_BASE=0x10000000 +CONFIG_DEBUG_UART_BASE=0xff010000 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-r5" CONFIG_DEBUG_UART=y # CONFIG_DISPLAY_CPUINFO is not set @@ -9,8 +11,6 @@ CONFIG_SYS_PROMPT="ZynqMP r5> " # CONFIG_CMD_SETEXPR is not set CONFIG_OF_EMBED=y CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xff010000 -CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ZYNQ_SERIAL=y CONFIG_TIMER=y CONFIG_CADENCE_TTC_TIMER=y diff --git a/configs/xilinx_zynqmp_zc1232_revA_defconfig b/configs/xilinx_zynqmp_zc1232_revA_defconfig index 70dc870fa99..cb568c0cdb7 100644 --- a/configs/xilinx_zynqmp_zc1232_revA_defconfig +++ b/configs/xilinx_zynqmp_zc1232_revA_defconfig @@ -2,9 +2,11 @@ CONFIG_ARM=y CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x8000 -# CONFIG_SPL_LIBDISK_SUPPORT is not set CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xff000000 +CONFIG_DEBUG_UART_CLOCK=100000000 # CONFIG_SPL_FAT_SUPPORT is not set +# CONFIG_SPL_LIBDISK_SUPPORT is not set CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1232-revA" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y @@ -43,8 +45,6 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xff000000 -CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ZYNQ_SERIAL=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/xilinx_zynqmp_zc1254_revA_defconfig b/configs/xilinx_zynqmp_zc1254_revA_defconfig index 09de18d8ffc..c4cefdfffe8 100644 --- a/configs/xilinx_zynqmp_zc1254_revA_defconfig +++ b/configs/xilinx_zynqmp_zc1254_revA_defconfig @@ -2,9 +2,11 @@ CONFIG_ARM=y CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x8000 -# CONFIG_SPL_LIBDISK_SUPPORT is not set CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xff000000 +CONFIG_DEBUG_UART_CLOCK=100000000 # CONFIG_SPL_FAT_SUPPORT is not set +# CONFIG_SPL_LIBDISK_SUPPORT is not set CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1254-revA" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y @@ -43,8 +45,6 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xff000000 -CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ZYNQ_SERIAL=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/xilinx_zynqmp_zc1275_revA_defconfig b/configs/xilinx_zynqmp_zc1275_revA_defconfig index a7e79f5d0e9..eef90e05bf2 100644 --- a/configs/xilinx_zynqmp_zc1275_revA_defconfig +++ b/configs/xilinx_zynqmp_zc1275_revA_defconfig @@ -2,9 +2,11 @@ CONFIG_ARM=y CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x8000 -# CONFIG_SPL_LIBDISK_SUPPORT is not set CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xff000000 +CONFIG_DEBUG_UART_CLOCK=100000000 # CONFIG_SPL_FAT_SUPPORT is not set +# CONFIG_SPL_LIBDISK_SUPPORT is not set CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1275-revA" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y @@ -43,8 +45,6 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xff000000 -CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ZYNQ_SERIAL=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/xilinx_zynqmp_zc1275_revB_defconfig b/configs/xilinx_zynqmp_zc1275_revB_defconfig index 823b50392c6..876cd3cf2f9 100644 --- a/configs/xilinx_zynqmp_zc1275_revB_defconfig +++ b/configs/xilinx_zynqmp_zc1275_revB_defconfig @@ -3,9 +3,11 @@ CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1275_revB" CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x8000 -# CONFIG_SPL_LIBDISK_SUPPORT is not set CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xff000000 +CONFIG_DEBUG_UART_CLOCK=100000000 # CONFIG_SPL_FAT_SUPPORT is not set +# CONFIG_SPL_LIBDISK_SUPPORT is not set CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1275-revB" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y @@ -46,8 +48,6 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xff000000 -CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ZYNQ_SERIAL=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig index 3aa39306520..cf84e7612de 100644 --- a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig @@ -4,6 +4,8 @@ CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xff000000 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ZYNQMP_USB=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm015-dc1" CONFIG_DEBUG_UART=y @@ -19,9 +21,6 @@ CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_ATF=y CONFIG_SYS_PROMPT="ZynqMP> " -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y @@ -47,6 +46,10 @@ CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_CLK_ZYNQMP=y CONFIG_DFU_RAM=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_FPGA_XILINX=y CONFIG_FPGA_ZYNQMPPL=y CONFIG_DM_GPIO=y @@ -54,6 +57,7 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_CADENCE=y CONFIG_MISC=y CONFIG_DM_MMC=y +CONFIG_MMC_HS200_SUPPORT=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_SPI_FLASH=y @@ -73,8 +77,6 @@ CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xff000000 -CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ZYNQ_SERIAL=y CONFIG_USB=y @@ -83,6 +85,7 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_ZYNQMP=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GADGET=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y diff --git a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig index 1bd52ab7912..b614acd79e6 100644 --- a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig @@ -1,11 +1,12 @@ CONFIG_ARM=y -CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm016_dc2" CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x8000 -# CONFIG_SPL_LIBDISK_SUPPORT is not set CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xff000000 +CONFIG_DEBUG_UART_CLOCK=100000000 # CONFIG_SPL_FAT_SUPPORT is not set +# CONFIG_SPL_LIBDISK_SUPPORT is not set CONFIG_ZYNQMP_USB=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm016-dc2" CONFIG_DEBUG_UART=y @@ -20,8 +21,6 @@ CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_ATF=y CONFIG_SYS_PROMPT="ZynqMP> " -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_FLASH=y CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_MEMTEST=y CONFIG_SYS_ALT_MEMTEST=y @@ -46,6 +45,7 @@ CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_CLK_ZYNQMP=y CONFIG_DFU_RAM=y +CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FPGA_XILINX=y CONFIG_FPGA_ZYNQMPPL=y CONFIG_DM_GPIO=y @@ -69,8 +69,6 @@ CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xff000000 -CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ZYNQ_SERIAL=y CONFIG_USB=y @@ -79,6 +77,7 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_ZYNQMP=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GADGET=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y diff --git a/configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig b/configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig index e1e7d22a3a6..aa7cf978cef 100644 --- a/configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig @@ -4,6 +4,8 @@ CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xff010000 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ZYNQMP_USB=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm017-dc3" CONFIG_DEBUG_UART=y @@ -65,8 +67,6 @@ CONFIG_ZYNQ_GEM=y CONFIG_SCSI=y CONFIG_DM_SCSI=y CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xff010000 -CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ZYNQ_SERIAL=y CONFIG_USB=y @@ -75,6 +75,7 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_ZYNQMP=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GADGET=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y diff --git a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig index 7e3f2c2aab8..2819c02c6d0 100644 --- a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xff000000 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm018-dc4" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y @@ -61,7 +63,5 @@ CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xff000000 -CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ZYNQ_SERIAL=y diff --git a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig index dad21055174..11b72e3789d 100644 --- a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig @@ -4,6 +4,8 @@ CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xff000000 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm019-dc5" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y @@ -55,8 +57,6 @@ CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xff000000 -CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ZYNQ_SERIAL=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/xilinx_zynqmp_zcu100_revC_defconfig b/configs/xilinx_zynqmp_zcu100_revC_defconfig index 3dd6ae9a0b3..d73e56a1682 100644 --- a/configs/xilinx_zynqmp_zcu100_revC_defconfig +++ b/configs/xilinx_zynqmp_zcu100_revC_defconfig @@ -4,6 +4,8 @@ CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xff010000 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ZYNQ_SDHCI_MAX_FREQ=15000000 CONFIG_ZYNQMP_USB=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu100-revC" @@ -60,8 +62,6 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xff010000 -CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ZYNQ_SERIAL=y CONFIG_SPI=y @@ -73,6 +73,7 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_ZYNQMP=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GADGET=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y diff --git a/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig b/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig index 0ddec998669..9b0f9dfdc07 100644 --- a/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig +++ b/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig @@ -4,6 +4,8 @@ CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xff000000 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ZYNQMP_USB=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102-rev1.0" CONFIG_DEBUG_UART=y @@ -19,9 +21,6 @@ CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_ATF=y CONFIG_SYS_PROMPT="ZynqMP> " -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_EEPROM=y CONFIG_CMD_MEMTEST=y @@ -31,6 +30,7 @@ CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_FPGA_LOADBP=y CONFIG_CMD_FPGA_LOADP=y +CONFIG_CMD_FPGA_LOAD_SECURE=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y @@ -50,6 +50,10 @@ CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y CONFIG_CLK_ZYNQMP=y CONFIG_DFU_RAM=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_FPGA_XILINX=y CONFIG_FPGA_ZYNQMPPL=y CONFIG_DM_GPIO=y @@ -83,8 +87,6 @@ CONFIG_ZYNQ_GEM=y CONFIG_SCSI=y CONFIG_DM_SCSI=y CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xff000000 -CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ZYNQ_SERIAL=y CONFIG_USB=y @@ -93,6 +95,7 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_ZYNQMP=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GADGET=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y diff --git a/configs/xilinx_zynqmp_zcu102_revA_defconfig b/configs/xilinx_zynqmp_zcu102_revA_defconfig index 94dc62a6164..8def1c5ea92 100644 --- a/configs/xilinx_zynqmp_zcu102_revA_defconfig +++ b/configs/xilinx_zynqmp_zcu102_revA_defconfig @@ -4,6 +4,8 @@ CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xff000000 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ZYNQMP_USB=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102-revA" CONFIG_DEBUG_UART=y @@ -19,9 +21,6 @@ CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_ATF=y CONFIG_SYS_PROMPT="ZynqMP> " -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_EEPROM=y CONFIG_CMD_MEMTEST=y @@ -50,6 +49,10 @@ CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y CONFIG_CLK_ZYNQMP=y CONFIG_DFU_RAM=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_FPGA_XILINX=y CONFIG_FPGA_ZYNQMPPL=y CONFIG_DM_GPIO=y @@ -81,8 +84,6 @@ CONFIG_ZYNQ_GEM=y CONFIG_SCSI=y CONFIG_DM_SCSI=y CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xff000000 -CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ZYNQ_SERIAL=y CONFIG_USB=y @@ -91,6 +92,7 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_ZYNQMP=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GADGET=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y diff --git a/configs/xilinx_zynqmp_zcu102_revB_defconfig b/configs/xilinx_zynqmp_zcu102_revB_defconfig index 8889f1909ac..618f1ed36f3 100644 --- a/configs/xilinx_zynqmp_zcu102_revB_defconfig +++ b/configs/xilinx_zynqmp_zcu102_revB_defconfig @@ -4,6 +4,8 @@ CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xff000000 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ZYNQMP_USB=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102-revB" CONFIG_DEBUG_UART=y @@ -19,9 +21,6 @@ CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_ATF=y CONFIG_SYS_PROMPT="ZynqMP> " -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_EEPROM=y CONFIG_CMD_MEMTEST=y @@ -50,6 +49,10 @@ CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y CONFIG_CLK_ZYNQMP=y CONFIG_DFU_RAM=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_FPGA_XILINX=y CONFIG_FPGA_ZYNQMPPL=y CONFIG_DM_GPIO=y @@ -81,8 +84,6 @@ CONFIG_ZYNQ_GEM=y CONFIG_SCSI=y CONFIG_DM_SCSI=y CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xff000000 -CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ZYNQ_SERIAL=y CONFIG_USB=y @@ -91,6 +92,7 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_ZYNQMP=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GADGET=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y diff --git a/configs/xilinx_zynqmp_zcu104_revA_defconfig b/configs/xilinx_zynqmp_zcu104_revA_defconfig index 3d3d941d375..ab41023864e 100644 --- a/configs/xilinx_zynqmp_zcu104_revA_defconfig +++ b/configs/xilinx_zynqmp_zcu104_revA_defconfig @@ -4,6 +4,8 @@ CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xff000000 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ZYNQMP_USB=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu104-revA" CONFIG_DEBUG_UART=y @@ -74,8 +76,6 @@ CONFIG_ZYNQ_GEM=y CONFIG_SCSI=y CONFIG_DM_SCSI=y CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xff000000 -CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ZYNQ_SERIAL=y CONFIG_USB=y @@ -84,6 +84,7 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_ZYNQMP=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GADGET=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y diff --git a/configs/xilinx_zynqmp_zcu104_revC_defconfig b/configs/xilinx_zynqmp_zcu104_revC_defconfig index 7c22d7f020e..77b93a7eff3 100644 --- a/configs/xilinx_zynqmp_zcu104_revC_defconfig +++ b/configs/xilinx_zynqmp_zcu104_revC_defconfig @@ -4,6 +4,8 @@ CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xff000000 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ZYNQMP_USB=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu104-revC" CONFIG_DEBUG_UART=y @@ -74,8 +76,6 @@ CONFIG_ZYNQ_GEM=y CONFIG_SCSI=y CONFIG_DM_SCSI=y CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xff000000 -CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ZYNQ_SERIAL=y CONFIG_USB=y @@ -84,6 +84,7 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_ZYNQMP=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GADGET=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y diff --git a/configs/xilinx_zynqmp_zcu106_revA_defconfig b/configs/xilinx_zynqmp_zcu106_revA_defconfig index 017940e9836..e644914070d 100644 --- a/configs/xilinx_zynqmp_zcu106_revA_defconfig +++ b/configs/xilinx_zynqmp_zcu106_revA_defconfig @@ -4,6 +4,8 @@ CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xff000000 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ZYNQMP_USB=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu106-revA" CONFIG_DEBUG_UART=y @@ -18,9 +20,6 @@ CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_ATF=y CONFIG_SYS_PROMPT="ZynqMP> " -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_CMD_THOR_DOWNLOAD=y CONFIG_CMD_EEPROM=y CONFIG_CMD_MEMTEST=y @@ -48,6 +47,10 @@ CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y CONFIG_CLK_ZYNQMP=y CONFIG_DFU_RAM=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_FPGA_XILINX=y CONFIG_FPGA_ZYNQMPPL=y CONFIG_DM_GPIO=y @@ -80,8 +83,6 @@ CONFIG_ZYNQ_GEM=y CONFIG_SCSI=y CONFIG_DM_SCSI=y CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xff000000 -CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ZYNQ_SERIAL=y CONFIG_USB=y @@ -90,6 +91,7 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_ZYNQMP=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GADGET=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y diff --git a/configs/xilinx_zynqmp_zcu111_revA_defconfig b/configs/xilinx_zynqmp_zcu111_revA_defconfig index 028a7b53284..c88ba522c71 100644 --- a/configs/xilinx_zynqmp_zcu111_revA_defconfig +++ b/configs/xilinx_zynqmp_zcu111_revA_defconfig @@ -4,6 +4,8 @@ CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xff000000 +CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ZYNQMP_USB=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu111-revA" CONFIG_DEBUG_UART=y @@ -74,8 +76,6 @@ CONFIG_ZYNQ_GEM=y CONFIG_SCSI=y CONFIG_DM_SCSI=y CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xff000000 -CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ZYNQ_SERIAL=y CONFIG_USB=y @@ -84,6 +84,7 @@ CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_ZYNQMP=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GADGET=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y diff --git a/configs/xpress_spl_defconfig b/configs/xpress_spl_defconfig index 5e265d44fca..50397fc824f 100644 --- a/configs/xpress_spl_defconfig +++ b/configs/xpress_spl_defconfig @@ -7,9 +7,8 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_XPRESS=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL=y +CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -17,6 +16,7 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y diff --git a/configs/zc5202_defconfig b/configs/zc5202_defconfig index 855fee28a5c..22085499715 100644 --- a/configs/zc5202_defconfig +++ b/configs/zc5202_defconfig @@ -7,11 +7,10 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_ZC5202=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q" CONFIG_BOOTDELAY=3 @@ -21,6 +20,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/zc5601_defconfig b/configs/zc5601_defconfig index 01a294ab71c..a06ebd5ed95 100644 --- a/configs/zc5601_defconfig +++ b/configs/zc5601_defconfig @@ -7,11 +7,10 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_TARGET_ZC5601=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q" CONFIG_BOOTDELAY=3 @@ -21,6 +20,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_EXT_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SPI_LOAD=y +CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/zynq_cc108_defconfig b/configs/zynq_cc108_defconfig index 7689a215328..ac8e1f193c9 100644 --- a/configs/zynq_cc108_defconfig +++ b/configs/zynq_cc108_defconfig @@ -2,6 +2,8 @@ CONFIG_ARM=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xe0000000 +CONFIG_DEBUG_UART_CLOCK=50000000 CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_DEFAULT_DEVICE_TREE="zynq-cc108" CONFIG_DEBUG_UART=y @@ -42,8 +44,6 @@ CONFIG_PHY_REALTEK=y CONFIG_PHY_XILINX=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xe0000000 -CONFIG_DEBUG_UART_CLOCK=50000000 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ZYNQ_SERIAL=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index 88049d2c2e3..2425dfa38bb 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -3,6 +3,8 @@ CONFIG_SYS_CONFIG_NAME="zynq_cse" CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0xFFFC0000 CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0x0 +CONFIG_DEBUG_UART_CLOCK=0 CONFIG_SPL_STACK_R_ADDR=0x200000 # CONFIG_ZYNQ_DDRC_INIT is not set CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-qspi-single" @@ -56,7 +58,5 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_DEBUG_UART_ARM_DCC=y -CONFIG_DEBUG_UART_BASE=0x0 -CONFIG_DEBUG_UART_CLOCK=0 CONFIG_ZYNQ_QSPI=y # CONFIG_EFI_LOADER is not set diff --git a/configs/zynq_minized_defconfig b/configs/zynq_minized_defconfig new file mode 100644 index 00000000000..8df0736c1c4 --- /dev/null +++ b/configs/zynq_minized_defconfig @@ -0,0 +1,66 @@ +CONFIG_ARM=y +CONFIG_ARCH_ZYNQ=y +CONFIG_SYS_TEXT_BASE=0x4000000 +CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xe0001000 +CONFIG_DEBUG_UART_CLOCK=50000000 +CONFIG_SPL_STACK_R_ADDR=0x200000 +CONFIG_DEFAULT_DEVICE_TREE="zynq-minized" +CONFIG_DEBUG_UART=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd" +CONFIG_SPL_STACK_R=y +CONFIG_SPL_OS_BOOT=y +CONFIG_SYS_PROMPT="Zynq> " +CONFIG_CMD_THOR_DOWNLOAD=y +CONFIG_CMD_DFU=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_FPGA_LOADBP=y +CONFIG_CMD_FPGA_LOADFS=y +CONFIG_CMD_FPGA_LOADMK=y +CONFIG_CMD_FPGA_LOADP=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_DFU_MMC=y +CONFIG_DFU_RAM=y +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_ZYNQPL=y +CONFIG_DM_GPIO=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ZYNQ=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHY_MARVELL=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_XILINX=y +CONFIG_ZYNQ_GEM=y +CONFIG_DEBUG_UART_ZYNQ=y +CONFIG_ZYNQ_SERIAL=y +CONFIG_ZYNQ_QSPI=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_ULPI=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Xilinx" +CONFIG_USB_GADGET_VENDOR_NUM=0x03fd +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 +CONFIG_CI_UDC=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_FUNCTION_THOR=y diff --git a/configs/zynq_z_turn_defconfig b/configs/zynq_z_turn_defconfig index c5301d4cf6d..d8170ecc959 100644 --- a/configs/zynq_z_turn_defconfig +++ b/configs/zynq_z_turn_defconfig @@ -2,6 +2,8 @@ CONFIG_ARM=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xe0001000 +CONFIG_DEBUG_UART_CLOCK=50000000 CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_DEFAULT_DEVICE_TREE="zynq-zturn" CONFIG_DEBUG_UART=y @@ -45,8 +47,6 @@ CONFIG_PHY_REALTEK=y CONFIG_PHY_XILINX=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xe0001000 -CONFIG_DEBUG_UART_CLOCK=50000000 CONFIG_ZYNQ_SERIAL=y CONFIG_ZYNQ_QSPI=y CONFIG_USB=y diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig index 58b9c308cf3..ab719f97cd4 100644 --- a/configs/zynq_zc702_defconfig +++ b/configs/zynq_zc702_defconfig @@ -3,6 +3,8 @@ CONFIG_SYS_CONFIG_NAME="zynq_zc70x" CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xe0001000 +CONFIG_DEBUG_UART_CLOCK=50000000 CONFIG_IDENT_STRING=" Xilinx Zynq ZC702" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_DEFAULT_DEVICE_TREE="zynq-zc702" @@ -57,8 +59,6 @@ CONFIG_PHY_REALTEK=y CONFIG_PHY_XILINX=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xe0001000 -CONFIG_DEBUG_UART_CLOCK=50000000 CONFIG_ZYNQ_SERIAL=y CONFIG_ZYNQ_QSPI=y CONFIG_USB=y diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig index 82576146a71..ea61a964ff2 100644 --- a/configs/zynq_zc706_defconfig +++ b/configs/zynq_zc706_defconfig @@ -3,6 +3,8 @@ CONFIG_SYS_CONFIG_NAME="zynq_zc70x" CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xe0001000 +CONFIG_DEBUG_UART_CLOCK=50000000 CONFIG_IDENT_STRING=" Xilinx Zynq ZC706" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_DEFAULT_DEVICE_TREE="zynq-zc706" @@ -57,8 +59,6 @@ CONFIG_PHY_REALTEK=y CONFIG_PHY_XILINX=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xe0001000 -CONFIG_DEBUG_UART_CLOCK=50000000 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ZYNQ_SERIAL=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_zc770_xm010_defconfig b/configs/zynq_zc770_xm010_defconfig index d6811bb2801..5697ad40249 100644 --- a/configs/zynq_zc770_xm010_defconfig +++ b/configs/zynq_zc770_xm010_defconfig @@ -2,6 +2,8 @@ CONFIG_ARM=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xe0001000 +CONFIG_DEBUG_UART_CLOCK=50000000 CONFIG_IDENT_STRING=" Xilinx Zynq ZC770 XM010" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm010" @@ -50,8 +52,6 @@ CONFIG_PHY_REALTEK=y CONFIG_PHY_XILINX=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xe0001000 -CONFIG_DEBUG_UART_CLOCK=50000000 CONFIG_ZYNQ_SERIAL=y CONFIG_ZYNQ_SPI=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_zc770_xm011_defconfig b/configs/zynq_zc770_xm011_defconfig index 1602bce4592..af79f6ead27 100644 --- a/configs/zynq_zc770_xm011_defconfig +++ b/configs/zynq_zc770_xm011_defconfig @@ -2,6 +2,8 @@ CONFIG_ARM=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xe0001000 +CONFIG_DEBUG_UART_CLOCK=50000000 CONFIG_IDENT_STRING=" Xilinx Zynq ZC770 XM011" CONFIG_SPL_STACK_R_ADDR=0x200000 # CONFIG_SPL_FAT_SUPPORT is not set @@ -37,7 +39,5 @@ CONFIG_DM_GPIO=y CONFIG_NAND=y CONFIG_NAND_ZYNQ=y CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xe0001000 -CONFIG_DEBUG_UART_CLOCK=50000000 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ZYNQ_SERIAL=y diff --git a/configs/zynq_zc770_xm011_x16_defconfig b/configs/zynq_zc770_xm011_x16_defconfig index 37b4c42cf49..ac7a079ca08 100644 --- a/configs/zynq_zc770_xm011_x16_defconfig +++ b/configs/zynq_zc770_xm011_x16_defconfig @@ -2,6 +2,8 @@ CONFIG_ARM=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xe0001000 +CONFIG_DEBUG_UART_CLOCK=50000000 CONFIG_IDENT_STRING=" Xilinx Zynq ZC770 XM011 x16" CONFIG_SPL_STACK_R_ADDR=0x200000 # CONFIG_SPL_FAT_SUPPORT is not set @@ -37,7 +39,5 @@ CONFIG_DM_GPIO=y CONFIG_NAND=y CONFIG_NAND_ZYNQ=y CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xe0001000 -CONFIG_DEBUG_UART_CLOCK=50000000 CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ZYNQ_SERIAL=y diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig index 9ab54ec8d9e..818b398eb8b 100644 --- a/configs/zynq_zed_defconfig +++ b/configs/zynq_zed_defconfig @@ -2,6 +2,8 @@ CONFIG_ARM=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xe0001000 +CONFIG_DEBUG_UART_CLOCK=50000000 CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_DEFAULT_DEVICE_TREE="zynq-zed" CONFIG_DEBUG_UART=y @@ -50,8 +52,6 @@ CONFIG_PHY_REALTEK=y CONFIG_PHY_XILINX=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xe0001000 -CONFIG_DEBUG_UART_CLOCK=50000000 CONFIG_ZYNQ_SERIAL=y CONFIG_ZYNQ_QSPI=y CONFIG_USB=y diff --git a/configs/zynq_zybo_defconfig b/configs/zynq_zybo_defconfig index efb99b5e585..3dfc62162f3 100644 --- a/configs/zynq_zybo_defconfig +++ b/configs/zynq_zybo_defconfig @@ -3,6 +3,8 @@ CONFIG_SYS_CONFIG_NAME="zynq_zybo" CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xe0001000 +CONFIG_DEBUG_UART_CLOCK=50000000 CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_DEFAULT_DEVICE_TREE="zynq-zybo" CONFIG_DEBUG_UART=y @@ -55,8 +57,6 @@ CONFIG_PHY_REALTEK=y CONFIG_PHY_XILINX=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xe0001000 -CONFIG_DEBUG_UART_CLOCK=50000000 CONFIG_ZYNQ_SERIAL=y CONFIG_ZYNQ_QSPI=y CONFIG_USB=y diff --git a/disk/part_efi.c b/disk/part_efi.c index 72e3997b841..5c1039f0130 100644 --- a/disk/part_efi.c +++ b/disk/part_efi.c @@ -350,8 +350,6 @@ static int set_protective_mbr(struct blk_desc *dev_desc) { /* Setup the Protective MBR */ ALLOC_CACHE_ALIGN_BUFFER_PAD(legacy_mbr, p_mbr, 1, dev_desc->blksz); - memset(p_mbr, 0, sizeof(*p_mbr)); - if (p_mbr == NULL) { printf("%s: calloc failed!\n", __func__); return -1; @@ -363,6 +361,10 @@ static int set_protective_mbr(struct blk_desc *dev_desc) return -1; } + /* Clear all data in MBR except of backed up boot code */ + memset((char *)p_mbr + MSDOS_MBR_BOOT_CODE_SIZE, 0, sizeof(*p_mbr) - + MSDOS_MBR_BOOT_CODE_SIZE); + /* Append signature */ p_mbr->signature = MSDOS_MBR_SIGNATURE; p_mbr->partition_record[0].sys_ind = EFI_PMBR_OSTYPE_EFI_GPT; diff --git a/doc/DocBook/Makefile b/doc/DocBook/Makefile index 820b1fb60f4..52576135138 100644 --- a/doc/DocBook/Makefile +++ b/doc/DocBook/Makefile @@ -7,7 +7,7 @@ # To add a new book the only step required is to add the book to the # list of DOCBOOKS. -DOCBOOKS := linker_lists.xml stdio.xml +DOCBOOKS := efi.xml linker_lists.xml stdio.xml ### # The build process is as follows (targets): diff --git a/doc/DocBook/efi.tmpl b/doc/DocBook/efi.tmpl new file mode 100644 index 00000000000..5daaae382b5 --- /dev/null +++ b/doc/DocBook/efi.tmpl @@ -0,0 +1,17 @@ +<?xml version="1.0" encoding="UTF-8"?> +<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN" + "http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" []> + +<book id="UBootEFI"> + <bookinfo> + <title>The U-Boot EFI subsystem</title> + </bookinfo> + +<toc></toc> + + <chapter id="BootServices"> + <title>Boot services</title> +!Ilib/efi_loader/efi_boottime.c + </chapter> + +</book> diff --git a/doc/README.NX25 b/doc/README.AX25 index 9f054e5cf2e..7a607dd1f8d 100644 --- a/doc/README.NX25 +++ b/doc/README.AX25 @@ -1,4 +1,4 @@ -NX25 is Andes CPU IP to adopt RISC-V architecture. +AX25 is Andes CPU IP to adopt RISC-V architecture. Features ======== diff --git a/doc/README.ae250 b/doc/README.ae350 index 77c168af34c..fe75b80eb77 100644 --- a/doc/README.ae250 +++ b/doc/README.ae350 @@ -1,16 +1,16 @@ -Andes Technology SoC AE250 +Andes Technology SoC AE350 =========================== -AE250 is the mainline SoC produced by Andes Technology using NX25 CPU core +AE350 is the mainline SoC produced by Andes Technology using AX25 CPU core base on RISC-V architecture. -AE250 has integrated both AHB and APB bus and many periphals for application +AE350 has integrated both AHB and APB bus and many periphals for application and product development. -NX25-AE250 +AX25-AE350 ========= -NX25-AE250 is the SoC with AE250 hardcore CPU. +AX25-AE350 is the SoC with AE350 hardcore CPU. Configurations ============== @@ -18,14 +18,14 @@ Configurations CONFIG_SKIP_LOWLEVEL_INIT: If you want to boot this system from SPI ROM and bypass e-bios (the other boot loader on ROM). You should undefine CONFIG_SKIP_LOWLEVEL_INIT - in "include/configs/nx25-ae250.h". + in "include/configs/ax25-ae350.h". Build and boot steps ==================== build: 1. Prepare the toolchains and make sure the $PATH to toolchains is correct. -2. Use `make nx25-ae250_defconfig` in u-boot root to build the image. +2. Use `make ax25-ae350_defconfig` in u-boot root to build the image. Verification ==================== @@ -49,7 +49,7 @@ Steps 5. Burn this u-boot image to spi rom by spi driver 6. Re-boot u-boot from spi flash with power off and power on. -Messages of U-Boot boot on AE250 board +Messages of U-Boot boot on AE350 board ====================================== U-Boot 2018.01-rc2-00033-g824f89a (Dec 21 2017 - 16:51:26 +0800) @@ -77,9 +77,9 @@ host 10.0.4.97 is alive RISC-V # mmc rescan RISC-V # fatls mmc 0:1 - 318907 u-boot-ae250-64.bin - 1252 hello_world_ae250_32.bin - 328787 u-boot-ae250-32.bin + 318907 u-boot-ae350-64.bin + 1252 hello_world_ae350_32.bin + 328787 u-boot-ae350-32.bin 3 file(s), 0 dir(s) @@ -98,8 +98,8 @@ Test passed 2 write: 40 ticks, 100 KiB/s 0.800 Mbps 3 read: 20 ticks, 200 KiB/s 1.600 Mbps -RISC-V # fatload mmc 0:1 0x600000 u-boot-ae250-32.bin -reading u-boot-ae250-32.bin +RISC-V # fatload mmc 0:1 0x600000 u-boot-ae350-32.bin +reading u-boot-ae350-32.bin 328787 bytes read in 324 ms (990.2 KiB/s) RISC-V # sf erase 0x0 0x51000 @@ -136,7 +136,7 @@ Boot bbl and riscv-linux via U-Boot on QEMU =========================================== 1. Build riscv-linux 2. Build bbl and riscv-linux with --with-payload -3. Prepare ae250.dtb +3. Prepare ae350.dtb 4. Creating OS-kernel images ./mkimage -A riscv -O linux -T kernel -C none -a 0x0000 -e 0x0000 -d bbl.bin bootmImage-bbl.bin Image Name: @@ -146,7 +146,7 @@ Boot bbl and riscv-linux via U-Boot on QEMU Load Address: 00000000 Entry Point: 00000000 -4. Copy bootmImage-bbl.bin and ae250.dtb to qemu sd card image +4. Copy bootmImage-bbl.bin and ae350.dtb to qemu sd card image 5. Message of booting riscv-linux from bbl via u-boot on qemu U-Boot 2018.03-rc4-00031-g2631273 (Mar 13 2018 - 15:02:55 +0800) @@ -177,7 +177,7 @@ RISC-V # fatls mmc 0:0 RISC-V # fatload mmc 0:0 0x00600000 bootmImage-bbl.bin 17901268 bytes read in 4642 ms (3.7 MiB/s) -RISC-V # fatload mmc 0:0 0x2000000 ae250.dtb +RISC-V # fatload mmc 0:0 0x2000000 ae350.dtb 1954 bytes read in 1 ms (1.9 MiB/s) RISC-V # setenv bootm_size 0x2000000 RISC-V # setenv fdt_high 0x1f00000 @@ -272,4 +272,4 @@ Wed Dec 1 10:00:00 CST 2010 TODO ================================================== -Boot bbl and riscv-linux via U-Boot on AE250 board +Boot bbl and riscv-linux via U-Boot on AE350 board diff --git a/doc/README.android-fastboot b/doc/README.android-fastboot index 2c3ee7810a4..431191c473f 100644 --- a/doc/README.android-fastboot +++ b/doc/README.android-fastboot @@ -1,142 +1,214 @@ +================ Android Fastboot -~~~~~~~~~~~~~~~~ +================ Overview ======== -The protocol that is used over USB is described in -README.android-fastboot-protocol in same directory. -The current implementation is a minimal support of the erase command,the -"oem format" command and flash command;it only supports eMMC devices. +The protocol that is used over USB and UDP is described in the +``README.android-fastboot-protocol`` file in the same directory. + +The current implementation supports the following standard commands: + +- ``boot`` +- ``continue`` +- ``download`` +- ``erase`` (if enabled) +- ``flash`` (if enabled) +- ``getvar`` +- ``reboot`` +- ``reboot-bootloader`` +- ``set_active`` (only a stub implementation which always succeeds) + +The following OEM commands are supported (if enabled): + +- oem format - this executes ``gpt write mmc %x $partitions`` + +Support for both eMMC and NAND devices is included. Client installation =================== -The counterpart to this gadget is the fastboot client which can -be found in Android's platform/system/core repository in the fastboot -folder. It runs on Windows, Linux and even OSX. Linux user are lucky since -they only need libusb. -Windows users need to bring some time until they have Android SDK (currently -http://dl.google.com/android/installer_r12-windows.exe) installed. You -need to install ADB package which contains the required glue libraries for -accessing USB. Also you need "Google USB driver package" and "SDK platform -tools". Once installed the usb driver is placed in your SDK folder under -extras\google\usb_driver. The android_winusb.inf needs a line like - - %SingleBootLoaderInterface% = USB_Install, USB\VID_0451&PID_D022 - -either in the [Google.NTx86] section for 32bit Windows or [Google.NTamd64] -for 64bit Windows. VID and PID should match whatever the fastboot is -advertising. + +The counterpart to this is the fastboot client which can be found in +Android's ``platform/system/core`` repository in the fastboot +folder. It runs on Windows, Linux and OSX. The fastboot client is +part of the Android SDK Platform-Tools and can be downloaded from: + +https://developer.android.com/studio/releases/platform-tools Board specific ============== + +USB configuration +----------------- + The fastboot gadget relies on the USB download gadget, so the following options must be configured: -CONFIG_USB_GADGET_DOWNLOAD -CONFIG_USB_GADGET_VENDOR_NUM -CONFIG_USB_GADGET_PRODUCT_NUM -CONFIG_USB_GADGET_MANUFACTURER +:: + + CONFIG_USB_GADGET_DOWNLOAD + CONFIG_USB_GADGET_VENDOR_NUM + CONFIG_USB_GADGET_PRODUCT_NUM + CONFIG_USB_GADGET_MANUFACTURER -NOTE: The CONFIG_USB_GADGET_VENDOR_NUM must be one of the numbers supported by -the fastboot client. The list of vendor IDs supported can be found in the -fastboot client source code (fastboot.c) mentioned above. +NOTE: The ``CONFIG_USB_GADGET_VENDOR_NUM`` must be one of the numbers +supported by the fastboot client. The list of vendor IDs supported can +be found in the fastboot client source code. -The fastboot function is enabled by defining CONFIG_USB_FUNCTION_FASTBOOT, -CONFIG_CMD_FASTBOOT and CONFIG_ANDROID_BOOT_IMAGE. +General configuration +--------------------- -The fastboot protocol requires a large memory buffer for downloads. This -buffer should be as large as possible for a platform. The location of the -buffer and size are set with CONFIG_FASTBOOT_BUF_ADDR and -CONFIG_FASTBOOT_BUF_SIZE. +The fastboot protocol requires a large memory buffer for +downloads. This buffer should be as large as possible for a +platform. The location of the buffer and size are set with +``CONFIG_FASTBOOT_BUF_ADDR`` and ``CONFIG_FASTBOOT_BUF_SIZE``. These +may be overridden on the fastboot command line using ``-l`` and +``-s``. + +Fastboot environment variables +============================== + +Partition aliases +----------------- Fastboot partition aliases can also be defined for devices where GPT limitations prevent user-friendly partition names such as "boot", "system" and "cache". Or, where the actual partition name doesn't match a standard -partition name used commonly with fastboot. Current implentation checks -aliases when accessing partitions by name (flash_write and erase functions). -To define a partition alias add an environment variable similar to: -fastboot_partition_alias_<alias partition name>=<actual partition name> -Example: fastboot_partition_alias_boot=LNX +partition name used commonly with fastboot. + +The current implementation checks aliases when accessing partitions by +name (flash_write and erase functions). To define a partition alias +add an environment variable similar to: + +``fastboot_partition_alias_<alias partition name>=<actual partition name>`` + +for example: + +``fastboot_partition_alias_boot=LNX`` + +Variable overrides +------------------ + +Variables retrived through ``getvar`` can be overridden by defining +environment variables of the form ``fastboot.<variable>``. These are +looked up first so can be used to override values which would +otherwise be returned. Using this mechanism you can also return types +for NAND filesystems, as the fully parameterised variable is looked +up, e.g. + +``fastboot.partition-type:boot=jffs2`` + +Boot command +------------ + +When executing the fastboot ``boot`` command, if ``fastboot_bootcmd`` is set then +that will be executed in place of ``bootm <CONFIG_FASTBOOT_BUF_ADDR>``. Partition Names =============== -The Fastboot implementation in U-boot allows to write images into disk -partitions (currently on eMMC). Target partitions are referred on the host -computer by their names. + +The Fastboot implementation in U-Boot allows to write images into disk +partitions. Target partitions are referred on the host computer by +their names. For GPT/EFI the respective partition name is used. For MBR the partitions are referred by generic names according to the following schema: - <device type> <device index letter> <partition index> + <device type><device index letter><partition index> -Example: hda3, sdb1, usbda1 +Example: ``hda3``, ``sdb1``, ``usbda1`` The device type is as follows: - * IDE, ATAPI and SATA disks: hd - * SCSI disks: sd - * USB media: usbd - * MMC and SD cards: mmcsd - * Disk on chip: docd - * other: xx + * IDE, ATAPI and SATA disks: ``hd`` + * SCSI disks: ``sd`` + * USB media: ``usbd`` + * MMC and SD cards: ``mmcsd`` + * Disk on chip: ``docd`` + * other: ``xx`` -The device index starts from 'a' and refers to the interface (e.g. USB +The device index starts from ``a`` and refers to the interface (e.g. USB controller, SD/MMC controller) or disk index. The partition index starts -from 1 and describes the partition number on the particular device. +from ``1`` and describes the partition number on the particular device. Writing Partition Table ======================= + Fastboot also allows to write the partition table to the media. This can be done by writing the respective partition table image to a special target "gpt" or "mbr". These names can be customized by defining the following configuration options: -CONFIG_FASTBOOT_GPT_NAME -CONFIG_FASTBOOT_MBR_NAME +:: + + CONFIG_FASTBOOT_GPT_NAME + CONFIG_FASTBOOT_MBR_NAME In Action ========= -Enter into fastboot by executing the fastboot command in u-boot and you -should see: -|GADGET DRIVER: usb_dnl_fastboot + +Enter into fastboot by executing the fastboot command in U-Boot for either USB: + +:: + + => fastboot usb 0 + +or UDP: + +:: + + => fastboot udp + link up on port 0, speed 100, full duplex + Using ethernet@4a100000 device + Listening for fastboot command on 192.168.0.102 On the client side you can fetch the bootloader version for instance: -|>fastboot getvar bootloader-version -|bootloader-version: U-Boot 2014.04-00005-gd24cabc -|finished. total time: 0.000s + +:: + + $ fastboot getvar bootloader-version + bootloader-version: U-Boot 2014.04-00005-gd24cabc + finished. total time: 0.000s or initiate a reboot: -|>fastboot reboot + +:: + + $ fastboot reboot and once the client comes back, the board should reset. You can also specify a kernel image to boot. You have to either specify -the an image in Android format _or_ pass a binary kernel and let the +the an image in Android format *or* pass a binary kernel and let the fastboot client wrap the Android suite around it. On OMAP for instance you take zImage kernel and pass it to the fastboot client: -|>fastboot -b 0x80000000 -c "console=ttyO2 earlyprintk root=/dev/ram0 -| mem=128M" boot zImage -|creating boot image... -|creating boot image - 1847296 bytes -|downloading 'boot.img'... -|OKAY [ 2.766s] -|booting... -|OKAY [ -0.000s] -|finished. total time: 2.766s - -and on the gadget side you should see: -|Starting download of 1847296 bytes -|........................................................ -|downloading of 1847296 bytes finished -|Booting kernel.. -|## Booting Android Image at 0x81000000 ... -|Kernel load addr 0x80008000 size 1801 KiB -|Kernel command line: console=ttyO2 earlyprintk root=/dev/ram0 mem=128M -| Loading Kernel Image ... OK -|OK -| -|Starting kernel ... +:: + + $ fastboot -b 0x80000000 -c "console=ttyO2 earlyprintk root=/dev/ram0 mem=128M" boot zImage + creating boot image... + creating boot image - 1847296 bytes + downloading 'boot.img'... + OKAY [ 2.766s] + booting... + OKAY [ -0.000s] + finished. total time: 2.766s + +and on the U-Boot side you should see: + +:: + + Starting download of 1847296 bytes + ........................................................ + downloading of 1847296 bytes finished + Booting kernel.. + ## Booting Android Image at 0x81000000 ... + Kernel load addr 0x80008000 size 1801 KiB + Kernel command line: console=ttyO2 earlyprintk root=/dev/ram0 mem=128M + Loading Kernel Image ... OK + OK + + Starting kernel ... diff --git a/doc/README.commands b/doc/README.commands index afd5577b0a9..1d29c4d91dd 100644 --- a/doc/README.commands +++ b/doc/README.commands @@ -1,19 +1,83 @@ +Command definition +------------------ Commands are added to U-Boot by creating a new command structure. -This is done by first including command.h, then using the U_BOOT_CMD() macro -to fill in a cmd_tbl_t struct. +This is done by first including command.h, then using the U_BOOT_CMD() or the +U_BOOT_CMD_COMPLETE macro to fill in a cmd_tbl_t struct. -U_BOOT_CMD(name,maxargs,repeatable,command,"usage","help") +U_BOOT_CMD(name, maxargs, repeatable, command, "usage", "help") +U_BOOT_CMD_COMPLETE(name, maxargs, repeatable, command, "usage, "help", comp) -name: is the name of the commad. THIS IS NOT a string. -maxargs: the maximum number of arguments this function takes -repeatable: either 0 or 1 to indicate if autorepeat is allowed -command: Function pointer (*cmd)(struct cmd_tbl_s *, int, int, char *[]); -usage: Short description. This is a string -help: Long description. This is a string +name: The name of the command. THIS IS NOT a string. +maxargs: The maximum number of arguments this function takes including + the command itself. -**** Behind the scene ****** +repeatable: Either 0 or 1 to indicate if autorepeat is allowed. + +command: Pointer to the command function. This is the function that is + called when the command is issued. + +usage: Short description. This is a string. + +help: Long description. This is a string. The long description is + only available if CONFIG_SYS_LONGHELP is defined. + +comp: Pointer to the completion function. May be NULL. + This function is called if the user hits the TAB key while + entering the command arguments to complete the entry. Command + completion is only available if CONFIG_AUTO_COMPLETE is defined. + +Command function +---------------- + +The commmand function pointer has to be of type +int (*cmd)(struct cmd_tbl_s *cmdtp, int flag, int argc, const char *argv[]); + +cmdtp: Table entry describing the command (see above). + +flag: A bitmap which may contain the following bit: + CMD_FLAG_REPEAT - The last command is repeated. + CMD_FLAG_BOOTD - The command is called by the bootd command. + CMD_FLAG_ENV - The command is called by the run command. + +argc: Number of arguments including the command. + +argv: Arguments. + +Allowable return value are: + +CMD_SUCCESS The command was successfully executed. + +CMD_FAILURE The command failed. + +CMD_RET_USAGE The command was called with invalid parameters. This value + leads to the display of the usage string. + +Completion function +------------------- + +The completion function pointer has to be of type +int (*complete)(int argc, char *const argv[], char last_char, + int maxv, char *cmdv[]); + +argc: Number of arguments including the command. + +argv: Arguments. + +last_char: The last character in the command line buffer. + +maxv: Maximum number of possible completions that may be returned by + the function. + +cmdv: Used to return possible values for the last argument. The last + possible completion must be followed by NULL. + +The function returns the number of possible completions (without the terminating +NULL value). + +Behind the scene +---------------- The structure created is named with a special prefix and placed by the linker in a special section using the linker lists mechanism diff --git a/doc/README.qemu-arm b/doc/README.qemu-arm index 6f6f07d8bb5..260165638aa 100644 --- a/doc/README.qemu-arm +++ b/doc/README.qemu-arm @@ -39,13 +39,12 @@ Running U-Boot The minimal QEMU command line to get U-Boot up and running is: - For ARM: - qemu-system-arm -machine virt,highmem=off -bios u-boot.bin + qemu-system-arm -machine virt -bios u-boot.bin - For AArch64: - qemu-system-aarch64 -machine virt,highmem=off -cpu cortex-a57 -bios u-boot.bin + qemu-system-aarch64 -machine virt -cpu cortex-a57 -bios u-boot.bin -The 'highmem=off' parameter to the 'virt' machine is required for PCI to work -in U-Boot. Also, for some odd reason qemu-system-aarch64 needs to be explicitly +Note that for some odd reason qemu-system-aarch64 needs to be explicitly told to use a 64-bit CPU or it will boot in 32-bit mode. Additional peripherals that have been tested to work in both U-Boot and Linux diff --git a/doc/README.uefi b/doc/README.uefi index 196e99994a3..d4031ef8e86 100644 --- a/doc/README.uefi +++ b/doc/README.uefi @@ -299,13 +299,18 @@ This driver is only available if U-Boot is configured with CONFIG_BLK=y CONFIG_PARTITIONS=y -## TODOs as of U-Boot 2018.03 +## TODOs as of U-Boot 2018.07 * unimplemented or incompletely implemented boot services * Exit - call unload function, unload applications only - * ReinstallProtocolInterface + * ProtocolRegisterNotify * UnloadImage +* unimplemented or incompletely implemented runtime services + * SetVariable() ignores attribute EFI_VARIABLE_APPEND_WRITE + * GetNextVariableName is not implemented + * QueryVariableInfo is not implemented + * unimplemented events * EVT_RUNTIME * EVT_SIGNAL_VIRTUAL_ADDRESS_CHANGE diff --git a/doc/device-tree-bindings/phy/sun4i-usb-phy.txt b/doc/device-tree-bindings/phy/sun4i-usb-phy.txt new file mode 100644 index 00000000000..c1ce5a0a652 --- /dev/null +++ b/doc/device-tree-bindings/phy/sun4i-usb-phy.txt @@ -0,0 +1,65 @@ +Allwinner sun4i USB PHY +----------------------- + +Required properties: +- compatible : should be one of + * allwinner,sun4i-a10-usb-phy + * allwinner,sun5i-a13-usb-phy + * allwinner,sun6i-a31-usb-phy + * allwinner,sun7i-a20-usb-phy + * allwinner,sun8i-a23-usb-phy + * allwinner,sun8i-a33-usb-phy + * allwinner,sun8i-a83t-usb-phy + * allwinner,sun8i-h3-usb-phy + * allwinner,sun8i-v3s-usb-phy + * allwinner,sun50i-a64-usb-phy +- reg : a list of offset + length pairs +- reg-names : + * "phy_ctrl" + * "pmu0" for H3, V3s and A64 + * "pmu1" + * "pmu2" for sun4i, sun6i, sun7i, sun8i-a83t or sun8i-h3 + * "pmu3" for sun8i-h3 +- #phy-cells : from the generic phy bindings, must be 1 +- clocks : phandle + clock specifier for the phy clocks +- clock-names : + * "usb_phy" for sun4i, sun5i or sun7i + * "usb0_phy", "usb1_phy" and "usb2_phy" for sun6i + * "usb0_phy", "usb1_phy" for sun8i + * "usb0_phy", "usb1_phy", "usb2_phy" and "usb2_hsic_12M" for sun8i-a83t + * "usb0_phy", "usb1_phy", "usb2_phy" and "usb3_phy" for sun8i-h3 +- resets : a list of phandle + reset specifier pairs +- reset-names : + * "usb0_reset" + * "usb1_reset" + * "usb2_reset" for sun4i, sun6i, sun7i, sun8i-a83t or sun8i-h3 + * "usb3_reset" for sun8i-h3 + +Optional properties: +- usb0_id_det-gpios : gpio phandle for reading the otg id pin value +- usb0_vbus_det-gpios : gpio phandle for detecting the presence of usb0 vbus +- usb0_vbus_power-supply: power-supply phandle for usb0 vbus presence detect +- usb0_vbus-supply : regulator phandle for controller usb0 vbus +- usb1_vbus-supply : regulator phandle for controller usb1 vbus +- usb2_vbus-supply : regulator phandle for controller usb2 vbus +- usb3_vbus-supply : regulator phandle for controller usb3 vbus + +Example: + usbphy: phy@01c13400 { + #phy-cells = <1>; + compatible = "allwinner,sun4i-a10-usb-phy"; + /* phy base regs, phy1 pmu reg, phy2 pmu reg */ + reg = <0x01c13400 0x10 0x01c14800 0x4 0x01c1c800 0x4>; + reg-names = "phy_ctrl", "pmu1", "pmu2"; + clocks = <&usb_clk 8>; + clock-names = "usb_phy"; + resets = <&usb_clk 0>, <&usb_clk 1>, <&usb_clk 2>; + reset-names = "usb0_reset", "usb1_reset", "usb2_reset"; + pinctrl-names = "default"; + pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>; + usb0_id_det-gpios = <&pio 7 19 GPIO_ACTIVE_HIGH>; /* PH19 */ + usb0_vbus_det-gpios = <&pio 7 22 GPIO_ACTIVE_HIGH>; /* PH22 */ + usb0_vbus-supply = <®_usb0_vbus>; + usb1_vbus-supply = <®_usb1_vbus>; + usb2_vbus-supply = <®_usb2_vbus>; + }; diff --git a/doc/device-tree-bindings/pinctrl/marvell,mvebu-pinctrl.txt b/doc/device-tree-bindings/pinctrl/marvell,mvebu-pinctrl.txt index 5f86c0a00bf..1fc1bc66456 100644 --- a/doc/device-tree-bindings/pinctrl/marvell,mvebu-pinctrl.txt +++ b/doc/device-tree-bindings/pinctrl/marvell,mvebu-pinctrl.txt @@ -6,10 +6,10 @@ mpp pins or group of pins and a mpp function common to all pins. Required properties for the pinctrl driver: - compatible: "marvell,mvebu-pinctrl", - "marvell,armada-ap806-pinctrl", - "marvell,a70x0-pinctrl", - "marvell,a80x0-cp0-pinctrl", - "marvell,a80x0-cp1-pinctrl" + "marvell,ap806-pinctrl", + "marvell,armada-7k-pinctrl", + "marvell,armada-8k-cpm-pinctrl", + "marvell,armada-8k-cps-pinctrl" - bank-name: A string defining the pinc controller bank name - reg: A pair of values defining the pin controller base address and the address space @@ -31,7 +31,7 @@ Example: config-space { pinctl: pinctl@6F4000 { compatible = "marvell,mvebu-pinctrl", - "marvell,armada-ap806-pinctrl"; + "marvell,ap806-pinctrl"; bank-name ="apn-806"; reg = <0x6F4000 0x10>; pin-count = <20>; @@ -52,8 +52,8 @@ Example: config-space { cpm_pinctl: pinctl@44000 { compatible = "marvell,mvebu-pinctrl", - "marvell,a70x0-pinctrl", - "marvell,a80x0-cp0-pinctrl"; + "marvell,armada-7k-pinctrl", + "marvell,armada-8k-cpm-pinctrl"; bank-name ="cp0-110"; reg = <0x440000 0x20>; pin-count = <63>; @@ -89,7 +89,7 @@ Example: config-space { cps_pinctl: pinctl@44000 { compatible = "marvell,mvebu-pinctrl", - "marvell,a80x0-cp1-pinctrl"; + "marvell,armada-8k-cps-pinctrl"; bank-name ="cp1-110"; reg = <0x440000 0x20>; pin-count = <63>; diff --git a/doc/device-tree-bindings/tpm2/sandbox.txt b/doc/device-tree-bindings/tpm2/sandbox.txt new file mode 100644 index 00000000000..3d0f727cc41 --- /dev/null +++ b/doc/device-tree-bindings/tpm2/sandbox.txt @@ -0,0 +1,11 @@ +Sandbox TPMv2.0 bindings +------------------------ + +Required properties: +- compatible : Should be "sandbox,tpm2" + +Example: + + tpm { + compatible = "sandbox,tpm2"; + }; diff --git a/doc/device-tree-bindings/tpm2/tis-tpm2-spi.txt b/doc/device-tree-bindings/tpm2/tis-tpm2-spi.txt new file mode 100644 index 00000000000..b48a15112d3 --- /dev/null +++ b/doc/device-tree-bindings/tpm2/tis-tpm2-spi.txt @@ -0,0 +1,18 @@ +ST33TPHF20 SPI TPMv2.0 bindings +------------------------------- + +Required properties: +- compatible : Should be "tis,tpm2-spi" +- reg : SPI Chip select + +Optional properties: +- gpio-reset : Reset GPIO (if not connected to the SoC reset line) +- spi-max-frequency : See spi-bus.txt + +Example: + + tpm@1 { + compatible = "tis,tpm2-spi"; + reg = <1>; + spi-max-frequency = <10000000>; + }; diff --git a/doc/driver-model/i2c-howto.txt b/doc/driver-model/i2c-howto.txt index 605d3ef7adc..8ba2f6e2679 100644 --- a/doc/driver-model/i2c-howto.txt +++ b/doc/driver-model/i2c-howto.txt @@ -14,9 +14,7 @@ ones remain: ppc4xx_i2c rcar_i2c sh_i2c - sh_sh7734_i2c soft_i2c - tsi108_i2c zynq_i2c The deadline for this work is the end of June 2017. If no one steps diff --git a/drivers/Kconfig b/drivers/Kconfig index c2e813f5adf..9e21b28750c 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -28,6 +28,8 @@ source "drivers/dfu/Kconfig" source "drivers/dma/Kconfig" +source "drivers/fastboot/Kconfig" + source "drivers/firmware/Kconfig" source "drivers/fpga/Kconfig" @@ -60,6 +62,8 @@ source "drivers/pcmcia/Kconfig" source "drivers/phy/Kconfig" +source "drivers/phy/allwinner/Kconfig" + source "drivers/phy/marvell/Kconfig" source "drivers/pinctrl/Kconfig" diff --git a/drivers/Makefile b/drivers/Makefile index b3f1b600a55..a213ea96718 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -71,6 +71,7 @@ obj-y += block/ obj-$(CONFIG_BOOTCOUNT_LIMIT) += bootcount/ obj-$(CONFIG_CPU) += cpu/ obj-y += crypto/ +obj-$(CONFIG_FASTBOOT) += fastboot/ obj-y += firmware/ obj-$(CONFIG_FPGA) += fpga/ obj-y += misc/ @@ -79,6 +80,7 @@ obj-$(CONFIG_NVME) += nvme/ obj-y += pcmcia/ obj-y += dfu/ obj-$(CONFIG_X86) += pch/ +obj-y += phy/allwinner/ obj-y += phy/marvell/ obj-y += rtc/ obj-y += scsi/ diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index 86ec628104b..49a056e9416 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig @@ -99,4 +99,15 @@ config SATA_SIL3114 help Enable this driver to support the SIL3114 SATA controllers. +config AHCI_MVEBU + bool "Marvell EBU AHCI SATA support" + depends on ARCH_MVEBU + depends on AHCI + select SCSI_AHCI + select DM_SCSI + help + This option enables support for the Marvell EBU SoC's + onboard AHCI SATA. + + If unsure, say N. endmenu diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile index 02f02c8e8dd..10bed53bb3f 100644 --- a/drivers/ata/Makefile +++ b/drivers/ata/Makefile @@ -17,3 +17,4 @@ obj-$(CONFIG_SATA_MV) += sata_mv.o obj-$(CONFIG_SATA_SIL3114) += sata_sil3114.o obj-$(CONFIG_SATA_SIL) += sata_sil.o obj-$(CONFIG_SANDBOX) += sata_sandbox.o +obj-$(CONFIG_AHCI_MVEBU) += ahci_mvebu.o diff --git a/arch/arm/mach-mvebu/sata.c b/drivers/ata/ahci_mvebu.c index 3ae8dae4ddc..6e3f17ee276 100644 --- a/arch/arm/mach-mvebu/sata.c +++ b/drivers/ata/ahci_mvebu.c @@ -16,13 +16,19 @@ __weak int board_ahci_enable(void) return 0; } -#ifdef CONFIG_ARMADA_8K -/* CP110 has different AHCI port addresses */ -void __iomem *ahci_port_base(void __iomem *base, u32 port) +static int mvebu_ahci_bind(struct udevice *dev) { - return base + 0x10000 + (port * 0x10000); + struct udevice *scsi_dev; + int ret; + + ret = ahci_bind_scsi(dev, &scsi_dev); + if (ret) { + debug("%s: Failed to bind (err=%d\n)", __func__, ret); + return ret; + } + + return 0; } -#endif static int mvebu_ahci_probe(struct udevice *dev) { @@ -32,7 +38,7 @@ static int mvebu_ahci_probe(struct udevice *dev) */ board_ahci_enable(); - ahci_init(devfdt_get_addr_ptr(dev)); + ahci_probe_scsi(dev, (ulong)devfdt_get_addr_ptr(dev)); return 0; } @@ -47,5 +53,6 @@ U_BOOT_DRIVER(ahci_mvebu_drv) = { .name = "ahci_mvebu", .id = UCLASS_AHCI, .of_match = mvebu_ahci_ids, + .bind = mvebu_ahci_bind, .probe = mvebu_ahci_probe, }; diff --git a/drivers/clk/at91/clk-h32mx.c b/drivers/clk/at91/clk-h32mx.c index 485a023bfd3..8f02d73d8da 100644 --- a/drivers/clk/at91/clk-h32mx.c +++ b/drivers/clk/at91/clk-h32mx.c @@ -26,7 +26,7 @@ static ulong sama5d4_h32mx_clk_get_rate(struct clk *clk) rate /= 2; if (rate > H32MX_MAX_FREQ) - dm_warn("H32MX clock is too fast\n"); + dev_dbg(clk->dev, "H32MX clock is too fast\n"); return rate; } diff --git a/drivers/clk/clk_bcm6345.c b/drivers/clk/clk_bcm6345.c index 91c86a9b15d..f01ec9a8598 100644 --- a/drivers/clk/clk_bcm6345.c +++ b/drivers/clk/clk_bcm6345.c @@ -55,15 +55,11 @@ static const struct udevice_id bcm6345_clk_ids[] = { static int bcm63xx_clk_probe(struct udevice *dev) { struct bcm6345_clk_priv *priv = dev_get_priv(dev); - fdt_addr_t addr; - fdt_size_t size; - addr = devfdt_get_addr_size_index(dev, 0, &size); - if (addr == FDT_ADDR_T_NONE) + priv->regs = dev_remap_addr(dev); + if (!priv->regs) return -EINVAL; - priv->regs = ioremap(addr, size); - return 0; } diff --git a/drivers/clk/renesas/Kconfig b/drivers/clk/renesas/Kconfig index b5a6bcc3afd..578e6a8049d 100644 --- a/drivers/clk/renesas/Kconfig +++ b/drivers/clk/renesas/Kconfig @@ -74,6 +74,13 @@ config CLK_R8A77970 help Enable this to support the clocks on Renesas R8A77970 SoC. +config CLK_R8A77990 + bool "Renesas R8A77990 clock driver" + def_bool y if R8A77990 + depends on CLK_RCAR_GEN3 + help + Enable this to support the clocks on Renesas R8A77990 SoC. + config CLK_R8A77995 bool "Renesas R8A77995 clock driver" def_bool y if R8A77995 diff --git a/drivers/clk/renesas/Makefile b/drivers/clk/renesas/Makefile index a65d89f59cb..22a817a9191 100644 --- a/drivers/clk/renesas/Makefile +++ b/drivers/clk/renesas/Makefile @@ -9,4 +9,5 @@ obj-$(CONFIG_CLK_RCAR_GEN3) += clk-rcar-gen3.o obj-$(CONFIG_CLK_R8A7795) += r8a7795-cpg-mssr.o obj-$(CONFIG_CLK_R8A7796) += r8a7796-cpg-mssr.o obj-$(CONFIG_CLK_R8A77970) += r8a77970-cpg-mssr.o +obj-$(CONFIG_CLK_R8A77990) += r8a77990-cpg-mssr.o obj-$(CONFIG_CLK_R8A77995) += r8a77995-cpg-mssr.o diff --git a/drivers/clk/renesas/clk-rcar-gen3.c b/drivers/clk/renesas/clk-rcar-gen3.c index 3a95647abed..99698b1f46c 100644 --- a/drivers/clk/renesas/clk-rcar-gen3.c +++ b/drivers/clk/renesas/clk-rcar-gen3.c @@ -85,6 +85,28 @@ static const struct sd_div_table cpg_sd_div_table[] = { CPG_SD_DIV_TABLE_DATA(1, 0, 4, 0, 32), }; +static int gen3_clk_get_parent(struct gen3_clk_priv *priv, struct clk *clk, + struct cpg_mssr_info *info, struct clk *parent) +{ + const struct cpg_core_clk *core; + int ret; + + if (!renesas_clk_is_mod(clk)) { + ret = renesas_clk_get_core(clk, info, &core); + if (ret) + return ret; + + if (core->type == CLK_TYPE_GEN3_PE) { + parent->dev = clk->dev; + parent->id = core->parent >> (priv->sscg ? 16 : 0); + parent->id &= 0xffff; + return 0; + } + } + + return renesas_clk_get_parent(clk, info, parent); +} + static int gen3_clk_setup_sdif_div(struct clk *clk) { struct gen3_clk_priv *priv = dev_get_priv(clk->dev); @@ -93,7 +115,7 @@ static int gen3_clk_setup_sdif_div(struct clk *clk) struct clk parent; int ret; - ret = renesas_clk_get_parent(clk, info, &parent); + ret = gen3_clk_get_parent(priv, clk, info, &parent); if (ret) { printf("%s[%i] parent fail, ret=%i\n", __func__, __LINE__, ret); return ret; @@ -134,7 +156,7 @@ static int gen3_clk_disable(struct clk *clk) return renesas_clk_endisable(clk, priv->base, false); } -static ulong gen3_clk_get_rate(struct clk *clk) +static u64 gen3_clk_get_rate64(struct clk *clk) { struct gen3_clk_priv *priv = dev_get_priv(clk->dev); struct cpg_mssr_info *info = priv->info; @@ -142,20 +164,21 @@ static ulong gen3_clk_get_rate(struct clk *clk) const struct cpg_core_clk *core; const struct rcar_gen3_cpg_pll_config *pll_config = priv->cpg_pll_config; - u32 value, mult, prediv, postdiv, rate = 0; + u32 value, mult, div, prediv, postdiv; + u64 rate = 0; int i, ret; debug("%s[%i] Clock: id=%lu\n", __func__, __LINE__, clk->id); - ret = renesas_clk_get_parent(clk, info, &parent); + ret = gen3_clk_get_parent(priv, clk, info, &parent); if (ret) { printf("%s[%i] parent fail, ret=%i\n", __func__, __LINE__, ret); return ret; } if (renesas_clk_is_mod(clk)) { - rate = gen3_clk_get_rate(&parent); - debug("%s[%i] MOD clk: parent=%lu => rate=%u\n", + rate = gen3_clk_get_rate64(&parent); + debug("%s[%i] MOD clk: parent=%lu => rate=%llu\n", __func__, __LINE__, parent.id, rate); return rate; } @@ -168,14 +191,14 @@ static ulong gen3_clk_get_rate(struct clk *clk) case CLK_TYPE_IN: if (core->id == info->clk_extal_id) { rate = clk_get_rate(&priv->clk_extal); - debug("%s[%i] EXTAL clk: rate=%u\n", + debug("%s[%i] EXTAL clk: rate=%llu\n", __func__, __LINE__, rate); return rate; } if (core->id == info->clk_extalr_id) { rate = clk_get_rate(&priv->clk_extalr); - debug("%s[%i] EXTALR clk: rate=%u\n", + debug("%s[%i] EXTALR clk: rate=%llu\n", __func__, __LINE__, rate); return rate; } @@ -183,8 +206,8 @@ static ulong gen3_clk_get_rate(struct clk *clk) return -EINVAL; case CLK_TYPE_GEN3_MAIN: - rate = gen3_clk_get_rate(&parent) / pll_config->extal_div; - debug("%s[%i] MAIN clk: parent=%i extal_div=%i => rate=%u\n", + rate = gen3_clk_get_rate64(&parent) / pll_config->extal_div; + debug("%s[%i] MAIN clk: parent=%i extal_div=%i => rate=%llu\n", __func__, __LINE__, core->parent, pll_config->extal_div, rate); return rate; @@ -192,49 +215,61 @@ static ulong gen3_clk_get_rate(struct clk *clk) case CLK_TYPE_GEN3_PLL0: value = readl(priv->base + CPG_PLL0CR); mult = (((value >> 24) & 0x7f) + 1) * 2; - rate = gen3_clk_get_rate(&parent) * mult; - debug("%s[%i] PLL0 clk: parent=%i mult=%u => rate=%u\n", + rate = gen3_clk_get_rate64(&parent) * mult; + debug("%s[%i] PLL0 clk: parent=%i mult=%u => rate=%llu\n", __func__, __LINE__, core->parent, mult, rate); return rate; case CLK_TYPE_GEN3_PLL1: - rate = gen3_clk_get_rate(&parent) * pll_config->pll1_mult; - debug("%s[%i] PLL1 clk: parent=%i mul=%i => rate=%u\n", + rate = gen3_clk_get_rate64(&parent) * pll_config->pll1_mult; + rate /= pll_config->pll1_div; + debug("%s[%i] PLL1 clk: parent=%i mul=%i div=%i => rate=%llu\n", __func__, __LINE__, - core->parent, pll_config->pll1_mult, rate); + core->parent, pll_config->pll1_mult, + pll_config->pll1_div, rate); return rate; case CLK_TYPE_GEN3_PLL2: value = readl(priv->base + CPG_PLL2CR); mult = (((value >> 24) & 0x7f) + 1) * 2; - rate = gen3_clk_get_rate(&parent) * mult; - debug("%s[%i] PLL2 clk: parent=%i mult=%u => rate=%u\n", + rate = gen3_clk_get_rate64(&parent) * mult; + debug("%s[%i] PLL2 clk: parent=%i mult=%u => rate=%llu\n", __func__, __LINE__, core->parent, mult, rate); return rate; case CLK_TYPE_GEN3_PLL3: - rate = gen3_clk_get_rate(&parent) * pll_config->pll3_mult; - debug("%s[%i] PLL3 clk: parent=%i mul=%i => rate=%u\n", + rate = gen3_clk_get_rate64(&parent) * pll_config->pll3_mult; + rate /= pll_config->pll3_div; + debug("%s[%i] PLL3 clk: parent=%i mul=%i div=%i => rate=%llu\n", __func__, __LINE__, - core->parent, pll_config->pll3_mult, rate); + core->parent, pll_config->pll3_mult, + pll_config->pll3_div, rate); return rate; case CLK_TYPE_GEN3_PLL4: value = readl(priv->base + CPG_PLL4CR); mult = (((value >> 24) & 0x7f) + 1) * 2; - rate = gen3_clk_get_rate(&parent) * mult; - debug("%s[%i] PLL4 clk: parent=%i mult=%u => rate=%u\n", + rate = gen3_clk_get_rate64(&parent) * mult; + debug("%s[%i] PLL4 clk: parent=%i mult=%u => rate=%llu\n", __func__, __LINE__, core->parent, mult, rate); return rate; case CLK_TYPE_FF: - case CLK_TYPE_GEN3_PE: /* FIXME */ - rate = (gen3_clk_get_rate(&parent) * core->mult) / core->div; - debug("%s[%i] FIXED clk: parent=%i div=%i mul=%i => rate=%u\n", + rate = (gen3_clk_get_rate64(&parent) * core->mult) / core->div; + debug("%s[%i] FIXED clk: parent=%i mul=%i div=%i => rate=%llu\n", __func__, __LINE__, core->parent, core->mult, core->div, rate); return rate; + case CLK_TYPE_GEN3_PE: + div = (core->div >> (priv->sscg ? 16 : 0)) & 0xffff; + rate = gen3_clk_get_rate64(&parent) / div; + debug("%s[%i] PE clk: parent=%i div=%u => rate=%llu\n", + __func__, __LINE__, + (core->parent >> (priv->sscg ? 16 : 0)) & 0xffff, + div, rate); + return rate; + case CLK_TYPE_GEN3_SD: /* FIXME */ value = readl(priv->base + core->offset); value &= CPG_SD_STP_MASK | CPG_SD_FC_MASK; @@ -243,9 +278,9 @@ static ulong gen3_clk_get_rate(struct clk *clk) if (cpg_sd_div_table[i].val != value) continue; - rate = gen3_clk_get_rate(&parent) / + rate = gen3_clk_get_rate64(&parent) / cpg_sd_div_table[i].div; - debug("%s[%i] SD clk: parent=%i div=%i => rate=%u\n", + debug("%s[%i] SD clk: parent=%i div=%i => rate=%llu\n", __func__, __LINE__, core->parent, cpg_sd_div_table[i].div, rate); @@ -255,7 +290,7 @@ static ulong gen3_clk_get_rate(struct clk *clk) return -EINVAL; case CLK_TYPE_GEN3_RPC: - rate = gen3_clk_get_rate(&parent); + rate = gen3_clk_get_rate64(&parent); value = readl(priv->base + core->offset); @@ -272,7 +307,7 @@ static ulong gen3_clk_get_rate(struct clk *clk) CPG_RPC_POSTDIV_MASK; rate /= postdiv + 1; - debug("%s[%i] RPC clk: parent=%i prediv=%i postdiv=%i => rate=%u\n", + debug("%s[%i] RPC clk: parent=%i prediv=%i postdiv=%i => rate=%llu\n", __func__, __LINE__, core->parent, prediv, postdiv, rate); @@ -285,11 +320,16 @@ static ulong gen3_clk_get_rate(struct clk *clk) return -ENOENT; } +static ulong gen3_clk_get_rate(struct clk *clk) +{ + return gen3_clk_get_rate64(clk); +} + static ulong gen3_clk_set_rate(struct clk *clk, ulong rate) { /* Force correct SD-IF divider configuration if applicable */ gen3_clk_setup_sdif_div(clk); - return gen3_clk_get_rate(clk); + return gen3_clk_get_rate64(clk); } static int gen3_clk_of_xlate(struct clk *clk, struct ofnode_phandle_args *args) @@ -341,6 +381,8 @@ int gen3_clk_probe(struct udevice *dev) if (!priv->cpg_pll_config->extal_div) return -EINVAL; + priv->sscg = !(cpg_mode & BIT(12)); + ret = clk_get_by_name(dev, "extal", &priv->clk_extal); if (ret < 0) return ret; diff --git a/drivers/clk/renesas/r8a77990-cpg-mssr.c b/drivers/clk/renesas/r8a77990-cpg-mssr.c new file mode 100644 index 00000000000..b3614a13555 --- /dev/null +++ b/drivers/clk/renesas/r8a77990-cpg-mssr.c @@ -0,0 +1,302 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Renesas R8A77990 CPG MSSR driver + * + * Copyright (C) 2017-2018 Marek Vasut <marek.vasut@gmail.com> + * + * Based on the following driver from Linux kernel: + * r8a7796 Clock Pulse Generator / Module Standby and Software Reset + * + * Copyright (C) 2016 Glider bvba + */ + +#include <common.h> +#include <clk-uclass.h> +#include <dm.h> + +#include <dt-bindings/clock/r8a77990-cpg-mssr.h> + +#include "renesas-cpg-mssr.h" +#include "rcar-gen3-cpg.h" + +enum clk_ids { + /* Core Clock Outputs exported to DT */ + LAST_DT_CORE_CLK = R8A77990_CLK_CPEX, + + /* External Input Clocks */ + CLK_EXTAL, + + /* Internal Core Clocks */ + CLK_MAIN, + CLK_PLL0, + CLK_PLL1, + CLK_PLL3, + CLK_PLL0D4, + CLK_PLL0D6, + CLK_PLL0D8, + CLK_PLL0D20, + CLK_PLL0D24, + CLK_PLL1D2, + CLK_PE, + CLK_S0, + CLK_S1, + CLK_S2, + CLK_S3, + CLK_SDSRC, + + /* Module Clocks */ + MOD_CLK_BASE +}; + +static const struct cpg_core_clk r8a77990_core_clks[] = { + /* External Clock Inputs */ + DEF_INPUT("extal", CLK_EXTAL), + + /* Internal Core Clocks */ + DEF_BASE(".main", CLK_MAIN, CLK_TYPE_GEN3_MAIN, CLK_EXTAL), + DEF_BASE(".pll1", CLK_PLL1, CLK_TYPE_GEN3_PLL1, CLK_MAIN), + DEF_BASE(".pll3", CLK_PLL3, CLK_TYPE_GEN3_PLL3, CLK_MAIN), + + DEF_FIXED(".pll0", CLK_PLL0, CLK_MAIN, 1, 100), + DEF_FIXED(".pll0d4", CLK_PLL0D4, CLK_PLL0, 4, 1), + DEF_FIXED(".pll0d6", CLK_PLL0D6, CLK_PLL0, 6, 1), + DEF_FIXED(".pll0d8", CLK_PLL0D8, CLK_PLL0, 8, 1), + DEF_FIXED(".pll0d20", CLK_PLL0D20, CLK_PLL0, 20, 1), + DEF_FIXED(".pll0d24", CLK_PLL0D24, CLK_PLL0, 24, 1), + DEF_FIXED(".pll1d2", CLK_PLL1D2, CLK_PLL1, 2, 1), + DEF_FIXED(".pe", CLK_PE, CLK_PLL0D20, 1, 1), + DEF_FIXED(".s0", CLK_S0, CLK_PLL1, 2, 1), + DEF_FIXED(".s1", CLK_S1, CLK_PLL1, 3, 1), + DEF_FIXED(".s2", CLK_S2, CLK_PLL1, 4, 1), + DEF_FIXED(".s3", CLK_S3, CLK_PLL1, 6, 1), + DEF_FIXED(".sdsrc", CLK_SDSRC, CLK_PLL1, 2, 1), + + /* Core Clock Outputs */ + DEF_FIXED("za2", R8A77990_CLK_ZA2, CLK_PLL0D24, 1, 1), + DEF_FIXED("za8", R8A77990_CLK_ZA8, CLK_PLL0D8, 1, 1), + DEF_FIXED("ztr", R8A77990_CLK_ZTR, CLK_PLL1, 6, 1), + DEF_FIXED("zt", R8A77990_CLK_ZT, CLK_PLL1, 4, 1), + DEF_FIXED("zx", R8A77990_CLK_ZX, CLK_PLL1, 3, 1), + DEF_FIXED("s0d1", R8A77990_CLK_S0D1, CLK_S0, 1, 1), + DEF_FIXED("s0d3", R8A77990_CLK_S0D3, CLK_S0, 3, 1), + DEF_FIXED("s0d6", R8A77990_CLK_S0D6, CLK_S0, 6, 1), + DEF_FIXED("s0d12", R8A77990_CLK_S0D12, CLK_S0, 12, 1), + DEF_FIXED("s0d24", R8A77990_CLK_S0D24, CLK_S0, 24, 1), + DEF_FIXED("s1d1", R8A77990_CLK_S1D1, CLK_S1, 1, 1), + DEF_FIXED("s1d2", R8A77990_CLK_S1D2, CLK_S1, 2, 1), + DEF_FIXED("s1d4", R8A77990_CLK_S1D4, CLK_S1, 4, 1), + DEF_FIXED("s2d1", R8A77990_CLK_S2D1, CLK_S2, 1, 1), + DEF_FIXED("s2d2", R8A77990_CLK_S2D2, CLK_S2, 2, 1), + DEF_FIXED("s2d4", R8A77990_CLK_S2D4, CLK_S2, 4, 1), + DEF_FIXED("s3d1", R8A77990_CLK_S3D1, CLK_S3, 1, 1), + DEF_FIXED("s3d2", R8A77990_CLK_S3D2, CLK_S3, 2, 1), + DEF_FIXED("s3d4", R8A77990_CLK_S3D4, CLK_S3, 4, 1), + + DEF_GEN3_SD("sd0", R8A77990_CLK_SD0, CLK_SDSRC, 0x0074), + DEF_GEN3_SD("sd1", R8A77990_CLK_SD1, CLK_SDSRC, 0x0078), + DEF_GEN3_SD("sd3", R8A77990_CLK_SD3, CLK_SDSRC, 0x026c), + + DEF_FIXED("cl", R8A77990_CLK_CL, CLK_PLL1, 48, 1), + DEF_FIXED("cp", R8A77990_CLK_CP, CLK_EXTAL, 2, 1), + DEF_FIXED("cpex", R8A77990_CLK_CPEX, CLK_EXTAL, 4, 1), + DEF_FIXED("osc", R8A77990_CLK_OSC, CLK_EXTAL, 384, 1), + DEF_FIXED("r", R8A77990_CLK_R, CLK_EXTAL, 1536, 1), + + DEF_GEN3_PE("s0d6c", R8A77990_CLK_S0D6C, CLK_S0, 6, CLK_PE, 6), + DEF_GEN3_PE("s3d1c", R8A77990_CLK_S3D1C, CLK_S3, 1, CLK_PE, 1), + DEF_GEN3_PE("s3d2c", R8A77990_CLK_S3D2C, CLK_S3, 2, CLK_PE, 2), + DEF_GEN3_PE("s3d4c", R8A77990_CLK_S3D4C, CLK_S3, 4, CLK_PE, 4), + + DEF_DIV6P1("canfd", R8A77990_CLK_CANFD, CLK_PLL0D6, 0x244), + DEF_DIV6P1("csi0", R8A77990_CLK_CSI0, CLK_PLL1D2, 0x00c), + DEF_DIV6P1("mso", R8A77990_CLK_MSO, CLK_PLL1D2, 0x014), +}; + +static const struct mssr_mod_clk r8a77990_mod_clks[] = { + DEF_MOD("scif5", 202, R8A77990_CLK_S3D4C), + DEF_MOD("scif4", 203, R8A77990_CLK_S3D4C), + DEF_MOD("scif3", 204, R8A77990_CLK_S3D4C), + DEF_MOD("scif1", 206, R8A77990_CLK_S3D4C), + DEF_MOD("scif0", 207, R8A77990_CLK_S3D4C), + DEF_MOD("msiof3", 208, R8A77990_CLK_MSO), + DEF_MOD("msiof2", 209, R8A77990_CLK_MSO), + DEF_MOD("msiof1", 210, R8A77990_CLK_MSO), + DEF_MOD("msiof0", 211, R8A77990_CLK_MSO), + DEF_MOD("sys-dmac2", 217, R8A77990_CLK_S3D1), + DEF_MOD("sys-dmac1", 218, R8A77990_CLK_S3D1), + DEF_MOD("sys-dmac0", 219, R8A77990_CLK_S3D1), + + DEF_MOD("cmt3", 300, R8A77990_CLK_R), + DEF_MOD("cmt2", 301, R8A77990_CLK_R), + DEF_MOD("cmt1", 302, R8A77990_CLK_R), + DEF_MOD("cmt0", 303, R8A77990_CLK_R), + DEF_MOD("scif2", 310, R8A77990_CLK_S3D4C), + DEF_MOD("sdif3", 311, R8A77990_CLK_SD3), + DEF_MOD("sdif1", 313, R8A77990_CLK_SD1), + DEF_MOD("sdif0", 314, R8A77990_CLK_SD0), + DEF_MOD("pcie0", 319, R8A77990_CLK_S3D1), + DEF_MOD("usb3-if0", 328, R8A77990_CLK_S3D1), + DEF_MOD("usb-dmac0", 330, R8A77990_CLK_S3D1), + DEF_MOD("usb-dmac1", 331, R8A77990_CLK_S3D1), + + DEF_MOD("rwdt", 402, R8A77990_CLK_R), + DEF_MOD("intc-ex", 407, R8A77990_CLK_CP), + DEF_MOD("intc-ap", 408, R8A77990_CLK_S0D3), + + DEF_MOD("audmac0", 502, R8A77990_CLK_S3D4), + DEF_MOD("drif7", 508, R8A77990_CLK_S3D2), + DEF_MOD("drif6", 509, R8A77990_CLK_S3D2), + DEF_MOD("drif5", 510, R8A77990_CLK_S3D2), + DEF_MOD("drif4", 511, R8A77990_CLK_S3D2), + DEF_MOD("drif3", 512, R8A77990_CLK_S3D2), + DEF_MOD("drif2", 513, R8A77990_CLK_S3D2), + DEF_MOD("drif1", 514, R8A77990_CLK_S3D2), + DEF_MOD("drif0", 515, R8A77990_CLK_S3D2), + DEF_MOD("hscif4", 516, R8A77990_CLK_S3D1C), + DEF_MOD("hscif3", 517, R8A77990_CLK_S3D1C), + DEF_MOD("hscif2", 518, R8A77990_CLK_S3D1C), + DEF_MOD("hscif1", 519, R8A77990_CLK_S3D1C), + DEF_MOD("hscif0", 520, R8A77990_CLK_S3D1C), + DEF_MOD("thermal", 522, R8A77990_CLK_CP), + DEF_MOD("pwm", 523, R8A77990_CLK_S3D4C), + + DEF_MOD("fcpvd1", 602, R8A77990_CLK_S1D2), + DEF_MOD("fcpvd0", 603, R8A77990_CLK_S1D2), + DEF_MOD("fcpvb0", 607, R8A77990_CLK_S0D1), + DEF_MOD("fcpvi0", 611, R8A77990_CLK_S0D1), + DEF_MOD("fcpf0", 615, R8A77990_CLK_S0D1), + DEF_MOD("fcpcs", 619, R8A77990_CLK_S0D1), + DEF_MOD("vspd1", 622, R8A77990_CLK_S1D2), + DEF_MOD("vspd0", 623, R8A77990_CLK_S1D2), + DEF_MOD("vspb", 626, R8A77990_CLK_S0D1), + DEF_MOD("vspi0", 631, R8A77990_CLK_S0D1), + + DEF_MOD("ehci0", 703, R8A77990_CLK_S3D4), + DEF_MOD("hsusb", 704, R8A77990_CLK_S3D4), + DEF_MOD("csi40", 716, R8A77990_CLK_CSI0), + DEF_MOD("du1", 723, R8A77990_CLK_S2D1), + DEF_MOD("du0", 724, R8A77990_CLK_S2D1), + DEF_MOD("lvds", 727, R8A77990_CLK_S2D1), + + DEF_MOD("vin7", 804, R8A77990_CLK_S1D2), + DEF_MOD("vin6", 805, R8A77990_CLK_S1D2), + DEF_MOD("vin5", 806, R8A77990_CLK_S1D2), + DEF_MOD("vin4", 807, R8A77990_CLK_S1D2), + DEF_MOD("etheravb", 812, R8A77990_CLK_S3D2), + + DEF_MOD("gpio6", 906, R8A77990_CLK_S3D4), + DEF_MOD("gpio5", 907, R8A77990_CLK_S3D4), + DEF_MOD("gpio4", 908, R8A77990_CLK_S3D4), + DEF_MOD("gpio3", 909, R8A77990_CLK_S3D4), + DEF_MOD("gpio2", 910, R8A77990_CLK_S3D4), + DEF_MOD("gpio1", 911, R8A77990_CLK_S3D4), + DEF_MOD("gpio0", 912, R8A77990_CLK_S3D4), + DEF_MOD("can-fd", 914, R8A77990_CLK_S3D2), + DEF_MOD("can-if1", 915, R8A77990_CLK_S3D4), + DEF_MOD("can-if0", 916, R8A77990_CLK_S3D4), + DEF_MOD("i2c6", 918, R8A77990_CLK_S3D2), + DEF_MOD("i2c5", 919, R8A77990_CLK_S3D2), + DEF_MOD("i2c-dvfs", 926, R8A77990_CLK_CP), + DEF_MOD("i2c4", 927, R8A77990_CLK_S3D2), + DEF_MOD("i2c3", 928, R8A77990_CLK_S3D2), + DEF_MOD("i2c2", 929, R8A77990_CLK_S3D2), + DEF_MOD("i2c1", 930, R8A77990_CLK_S3D2), + DEF_MOD("i2c0", 931, R8A77990_CLK_S3D2), + + DEF_MOD("ssi-all", 1005, R8A77990_CLK_S3D4), + DEF_MOD("ssi9", 1006, MOD_CLK_ID(1005)), + DEF_MOD("ssi8", 1007, MOD_CLK_ID(1005)), + DEF_MOD("ssi7", 1008, MOD_CLK_ID(1005)), + DEF_MOD("ssi6", 1009, MOD_CLK_ID(1005)), + DEF_MOD("ssi5", 1010, MOD_CLK_ID(1005)), + DEF_MOD("ssi4", 1011, MOD_CLK_ID(1005)), + DEF_MOD("ssi3", 1012, MOD_CLK_ID(1005)), + DEF_MOD("ssi2", 1013, MOD_CLK_ID(1005)), + DEF_MOD("ssi1", 1014, MOD_CLK_ID(1005)), + DEF_MOD("ssi0", 1015, MOD_CLK_ID(1005)), + DEF_MOD("scu-all", 1017, R8A77990_CLK_S3D4), + DEF_MOD("scu-dvc1", 1018, MOD_CLK_ID(1017)), + DEF_MOD("scu-dvc0", 1019, MOD_CLK_ID(1017)), + DEF_MOD("scu-ctu1-mix1", 1020, MOD_CLK_ID(1017)), + DEF_MOD("scu-ctu0-mix0", 1021, MOD_CLK_ID(1017)), + DEF_MOD("scu-src9", 1022, MOD_CLK_ID(1017)), + DEF_MOD("scu-src8", 1023, MOD_CLK_ID(1017)), + DEF_MOD("scu-src7", 1024, MOD_CLK_ID(1017)), + DEF_MOD("scu-src6", 1025, MOD_CLK_ID(1017)), + DEF_MOD("scu-src5", 1026, MOD_CLK_ID(1017)), + DEF_MOD("scu-src4", 1027, MOD_CLK_ID(1017)), + DEF_MOD("scu-src3", 1028, MOD_CLK_ID(1017)), + DEF_MOD("scu-src2", 1029, MOD_CLK_ID(1017)), + DEF_MOD("scu-src1", 1030, MOD_CLK_ID(1017)), + DEF_MOD("scu-src0", 1031, MOD_CLK_ID(1017)), +}; + +/* + * CPG Clock Data + */ + +/* + * MD19 EXTAL (MHz) PLL0 PLL1 PLL3 + *-------------------------------------------------------------------- + * 0 48 x 1 x100/4 x100/3 x100/3 + * 1 48 x 1 x100/4 x100/3 x58/3 + */ +#define CPG_PLL_CONFIG_INDEX(md) (((md) & BIT(19)) >> 19) + +static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[2] = { + /* EXTAL div PLL1 mult/div PLL3 mult/div */ + { 1, 100, 3, 100, 3, }, + { 1, 100, 3, 58, 3, }, +}; + +static const struct mstp_stop_table r8a77990_mstp_table[] = { + { 0x00200000, 0x0, 0x00200000, 0 }, + { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, + { 0x340E2FDC, 0x2040, 0x340E2FDC, 0 }, + { 0xFFFFFFDF, 0x400, 0xFFFFFFDF, 0 }, + { 0x80000184, 0x180, 0x80000184, 0 }, + { 0xC3FFFFFF, 0x0, 0xC3FFFFFF, 0 }, + { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, + { 0xFFFFFFFF, 0x0, 0xFFFFFFFF, 0 }, + { 0x01F1FFF7, 0x0, 0x01F1FFF7, 0 }, + { 0xFFFFFFFE, 0x0, 0xFFFFFFFE, 0 }, + { 0xFFFEFFE0, 0x0, 0xFFFEFFE0, 0 }, + { 0x000000B7, 0x0, 0x000000B7, 0 }, +}; + +static const void *r8a77990_get_pll_config(const u32 cpg_mode) +{ + return &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; +} + +static const struct cpg_mssr_info r8a77990_cpg_mssr_info = { + .core_clk = r8a77990_core_clks, + .core_clk_size = ARRAY_SIZE(r8a77990_core_clks), + .mod_clk = r8a77990_mod_clks, + .mod_clk_size = ARRAY_SIZE(r8a77990_mod_clks), + .mstp_table = r8a77990_mstp_table, + .mstp_table_size = ARRAY_SIZE(r8a77990_mstp_table), + .reset_node = "renesas,r8a77990-rst", + .mod_clk_base = MOD_CLK_BASE, + .clk_extal_id = CLK_EXTAL, + .clk_extalr_id = ~0, + .get_pll_config = r8a77990_get_pll_config, +}; + +static const struct udevice_id r8a77990_clk_ids[] = { + { + .compatible = "renesas,r8a77990-cpg-mssr", + .data = (ulong)&r8a77990_cpg_mssr_info + }, + { } +}; + +U_BOOT_DRIVER(clk_r8a77990) = { + .name = "clk_r8a77990", + .id = UCLASS_CLK, + .of_match = r8a77990_clk_ids, + .priv_auto_alloc_size = sizeof(struct gen3_clk_priv), + .ops = &gen3_clk_ops, + .probe = gen3_clk_probe, + .remove = gen3_clk_remove, +}; diff --git a/drivers/clk/renesas/rcar-gen3-cpg.h b/drivers/clk/renesas/rcar-gen3-cpg.h index 2f410df42af..58e71f363c8 100644 --- a/drivers/clk/renesas/rcar-gen3-cpg.h +++ b/drivers/clk/renesas/rcar-gen3-cpg.h @@ -31,8 +31,9 @@ enum rcar_gen3_clk_types { DEF_BASE(_name, _id, CLK_TYPE_GEN3_RPC, _parent, .offset = _offset) #define DEF_GEN3_PE(_name, _id, _parent_sscg, _div_sscg, _parent_clean, \ _div_clean) \ - DEF_BASE(_name, _id, CLK_TYPE_FF, \ - (_parent_clean), .div = (_div_clean), 1) + DEF_BASE(_name, _id, CLK_TYPE_GEN3_PE, \ + (_parent_sscg) << 16 | (_parent_clean), \ + .div = (_div_sscg) << 16 | (_div_clean)) struct rcar_gen3_cpg_pll_config { u8 extal_div; @@ -49,6 +50,7 @@ struct gen3_clk_priv { struct cpg_mssr_info *info; struct clk clk_extal; struct clk clk_extalr; + bool sscg; const struct rcar_gen3_cpg_pll_config *cpg_pll_config; }; diff --git a/drivers/core/fdtaddr.c b/drivers/core/fdtaddr.c index 528cf472960..f8cdbd6688d 100644 --- a/drivers/core/fdtaddr.c +++ b/drivers/core/fdtaddr.c @@ -136,6 +136,21 @@ void *devfdt_get_addr_ptr(struct udevice *dev) return (void *)(uintptr_t)devfdt_get_addr_index(dev, 0); } +void *devfdt_remap_addr_index(struct udevice *dev, int index) +{ + fdt_addr_t addr = devfdt_get_addr(dev); + + if (addr == FDT_ADDR_T_NONE) + return NULL; + + return map_physmem(addr, 0, MAP_NOCACHE); +} + +void *devfdt_remap_addr(struct udevice *dev) +{ + return devfdt_remap_addr_index(dev, 0); +} + void *devfdt_map_physmem(struct udevice *dev, unsigned long size) { fdt_addr_t addr = devfdt_get_addr(dev); diff --git a/drivers/core/read.c b/drivers/core/read.c index 0322cbf3300..96766c7876a 100644 --- a/drivers/core/read.c +++ b/drivers/core/read.c @@ -4,6 +4,8 @@ * Written by Simon Glass <sjg@chromium.org> */ +#include <asm/types.h> +#include <asm/io.h> #include <common.h> #include <dm.h> #include <mapmem.h> @@ -57,6 +59,16 @@ fdt_addr_t dev_read_addr_index(struct udevice *dev, int index) return devfdt_get_addr_index(dev, index); } +void *dev_remap_addr_index(struct udevice *dev, int index) +{ + fdt_addr_t addr = dev_read_addr_index(dev, index); + + if (addr == FDT_ADDR_T_NONE) + return NULL; + + return map_physmem(addr, 0, MAP_NOCACHE); +} + fdt_addr_t dev_read_addr(struct udevice *dev) { return dev_read_addr_index(dev, 0); @@ -69,6 +81,11 @@ void *dev_read_addr_ptr(struct udevice *dev) return (addr == FDT_ADDR_T_NONE) ? NULL : map_sysmem(addr, 0); } +void *dev_remap_addr(struct udevice *dev) +{ + return dev_remap_addr_index(dev, 0); +} + fdt_addr_t dev_read_addr_size(struct udevice *dev, const char *property, fdt_size_t *sizep) { diff --git a/drivers/cpu/bmips_cpu.c b/drivers/cpu/bmips_cpu.c index 7ed4bc7cec9..f5bacd2b187 100644 --- a/drivers/cpu/bmips_cpu.c +++ b/drivers/cpu/bmips_cpu.c @@ -13,8 +13,6 @@ #include <errno.h> #include <asm/io.h> -DECLARE_GLOBAL_DATA_PTR; - #define REV_CHIPID_SHIFT 16 #define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT) #define REV_LONG_CHIPID_SHIFT 12 @@ -397,8 +395,7 @@ int bmips_cpu_bind(struct udevice *dev) { struct cpu_platdata *plat = dev_get_parent_platdata(dev); - plat->cpu_id = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), - "reg", -1); + plat->cpu_id = dev_read_u32_default(dev, "reg", -1); plat->device_id = read_c0_prid(); return 0; @@ -409,14 +406,11 @@ int bmips_cpu_probe(struct udevice *dev) struct bmips_cpu_priv *priv = dev_get_priv(dev); const struct bmips_cpu_hw *hw = (const struct bmips_cpu_hw *)dev_get_driver_data(dev); - fdt_addr_t addr; - fdt_size_t size; - addr = devfdt_get_addr_size_index(dev_get_parent(dev), 0, &size); - if (addr == FDT_ADDR_T_NONE) + priv->regs = dev_remap_addr(dev); + if (!priv->regs) return -EINVAL; - priv->regs = ioremap(addr, size); priv->hw = hw; return 0; diff --git a/drivers/ddr/altera/Kconfig b/drivers/ddr/altera/Kconfig index 021ec1d8577..2b28a97f6e7 100644 --- a/drivers/ddr/altera/Kconfig +++ b/drivers/ddr/altera/Kconfig @@ -1,5 +1,5 @@ config ALTERA_SDRAM bool "SoCFPGA DDR SDRAM driver" - depends on TARGET_SOCFPGA_GEN5 + depends on TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 help Enable DDR SDRAM controller for the SoCFPGA devices. diff --git a/drivers/ddr/altera/Makefile b/drivers/ddr/altera/Makefile index d42fd4451d7..f05314a373d 100644 --- a/drivers/ddr/altera/Makefile +++ b/drivers/ddr/altera/Makefile @@ -7,5 +7,6 @@ # Copyright (C) 2014 Altera Corporation <www.altera.com> ifdef CONFIG_ALTERA_SDRAM -obj-$(CONFIG_TARGET_SOCFPGA_GEN5) += sdram.o sequencer.o +obj-$(CONFIG_TARGET_SOCFPGA_GEN5) += sdram_gen5.o sequencer.o +obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += sdram_arria10.o endif diff --git a/drivers/ddr/altera/sdram_arria10.c b/drivers/ddr/altera/sdram_arria10.c new file mode 100644 index 00000000000..706a038b888 --- /dev/null +++ b/drivers/ddr/altera/sdram_arria10.c @@ -0,0 +1,740 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2017 Intel Corporation <www.intel.com> + */ + +#include <common.h> +#include <errno.h> +#include <fdtdec.h> +#include <malloc.h> +#include <wait_bit.h> +#include <watchdog.h> +#include <asm/io.h> +#include <asm/arch/fpga_manager.h> +#include <asm/arch/misc.h> +#include <asm/arch/reset_manager.h> +#include <asm/arch/sdram.h> +#include <linux/kernel.h> + +DECLARE_GLOBAL_DATA_PTR; + +static void sdram_mmr_init(void); +static u64 sdram_size_calc(void); + +/* FAWBANK - Number of Bank of a given device involved in the FAW period. */ +#define ARRIA10_SDR_ACTIVATE_FAWBANK (0x1) + +#define ARRIA_DDR_CONFIG(A, B, C, R) \ + (((A) << 24) | ((B) << 16) | ((C) << 8) | (R)) +#define DDR_CONFIG_ELEMENTS ARRAY_SIZE(ddr_config) +#define DDR_REG_SEQ2CORE 0xFFD0507C +#define DDR_REG_CORE2SEQ 0xFFD05078 +#define DDR_READ_LATENCY_DELAY 40 +#define DDR_SIZE_2GB_HEX 0x80000000 +#define DDR_MAX_TRIES 0x00100000 + +#define IO48_MMR_DRAMSTS 0xFFCFA0EC +#define IO48_MMR_NIOS2_RESERVE0 0xFFCFA110 +#define IO48_MMR_NIOS2_RESERVE1 0xFFCFA114 +#define IO48_MMR_NIOS2_RESERVE2 0xFFCFA118 + +#define SEQ2CORE_MASK 0xF +#define CORE2SEQ_INT_REQ 0xF +#define SEQ2CORE_INT_RESP_BIT 3 + +static const struct socfpga_ecc_hmc *socfpga_ecc_hmc_base = + (void *)SOCFPGA_SDR_ADDRESS; +static const struct socfpga_noc_ddr_scheduler *socfpga_noc_ddr_scheduler_base = + (void *)SOCFPGA_SDR_SCHEDULER_ADDRESS; +static const struct socfpga_noc_fw_ddr_mpu_fpga2sdram + *socfpga_noc_fw_ddr_mpu_fpga2sdram_base = + (void *)SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS; +static const struct socfpga_noc_fw_ddr_l3 *socfpga_noc_fw_ddr_l3_base = + (void *)SOCFPGA_SDR_FIREWALL_L3_ADDRESS; +static const struct socfpga_io48_mmr *socfpga_io48_mmr_base = + (void *)SOCFPGA_HMC_MMR_IO48_ADDRESS; + +/* The following are the supported configurations */ +static u32 ddr_config[] = { + /* Chip - Row - Bank - Column Style */ + /* All Types */ + ARRIA_DDR_CONFIG(0, 3, 10, 12), + ARRIA_DDR_CONFIG(0, 3, 10, 13), + ARRIA_DDR_CONFIG(0, 3, 10, 14), + ARRIA_DDR_CONFIG(0, 3, 10, 15), + ARRIA_DDR_CONFIG(0, 3, 10, 16), + ARRIA_DDR_CONFIG(0, 3, 10, 17), + /* LPDDR x16 */ + ARRIA_DDR_CONFIG(0, 3, 11, 14), + ARRIA_DDR_CONFIG(0, 3, 11, 15), + ARRIA_DDR_CONFIG(0, 3, 11, 16), + ARRIA_DDR_CONFIG(0, 3, 12, 15), + /* DDR4 Only */ + ARRIA_DDR_CONFIG(0, 4, 10, 14), + ARRIA_DDR_CONFIG(0, 4, 10, 15), + ARRIA_DDR_CONFIG(0, 4, 10, 16), + ARRIA_DDR_CONFIG(0, 4, 10, 17), /* 14 */ + /* Chip - Bank - Row - Column Style */ + ARRIA_DDR_CONFIG(1, 3, 10, 12), + ARRIA_DDR_CONFIG(1, 3, 10, 13), + ARRIA_DDR_CONFIG(1, 3, 10, 14), + ARRIA_DDR_CONFIG(1, 3, 10, 15), + ARRIA_DDR_CONFIG(1, 3, 10, 16), + ARRIA_DDR_CONFIG(1, 3, 10, 17), + ARRIA_DDR_CONFIG(1, 3, 11, 14), + ARRIA_DDR_CONFIG(1, 3, 11, 15), + ARRIA_DDR_CONFIG(1, 3, 11, 16), + ARRIA_DDR_CONFIG(1, 3, 12, 15), + /* DDR4 Only */ + ARRIA_DDR_CONFIG(1, 4, 10, 14), + ARRIA_DDR_CONFIG(1, 4, 10, 15), + ARRIA_DDR_CONFIG(1, 4, 10, 16), + ARRIA_DDR_CONFIG(1, 4, 10, 17), +}; + +static int match_ddr_conf(u32 ddr_conf) +{ + int i; + + for (i = 0; i < DDR_CONFIG_ELEMENTS; i++) { + if (ddr_conf == ddr_config[i]) + return i; + } + return 0; +} + +/* Check whether SDRAM is successfully Calibrated */ +static int is_sdram_cal_success(void) +{ + return readl(&socfpga_ecc_hmc_base->ddrcalstat); +} + +static unsigned char ddr_get_bit(u32 ereg, unsigned char bit) +{ + u32 reg = readl(ereg); + + return (reg & BIT(bit)) ? 1 : 0; +} + +static unsigned char ddr_wait_bit(u32 ereg, u32 bit, + u32 expected, u32 timeout_usec) +{ + u32 tmr; + + for (tmr = 0; tmr < timeout_usec; tmr += 100) { + udelay(100); + WATCHDOG_RESET(); + if (ddr_get_bit(ereg, bit) == expected) + return 0; + } + + return 1; +} + +static int emif_clear(void) +{ + u32 i = DDR_MAX_TRIES; + u8 ret = 0; + + writel(0, DDR_REG_CORE2SEQ); + + do { + ret = !wait_for_bit_le32((u32 *)DDR_REG_SEQ2CORE, + SEQ2CORE_MASK, 1, 50, 0); + } while (ret && (--i > 0)); + + return !i; +} + +static int emif_reset(void) +{ + u32 c2s, s2c; + + c2s = readl(DDR_REG_CORE2SEQ); + s2c = readl(DDR_REG_SEQ2CORE); + + debug("c2s=%08x s2c=%08x nr0=%08x nr1=%08x nr2=%08x dst=%08x\n", + c2s, s2c, readl(IO48_MMR_NIOS2_RESERVE0), + readl(IO48_MMR_NIOS2_RESERVE1), + readl(IO48_MMR_NIOS2_RESERVE2), + readl(IO48_MMR_DRAMSTS)); + + if ((s2c & SEQ2CORE_MASK) && emif_clear()) { + debug("failed emif_clear()\n"); + return -EPERM; + } + + writel(CORE2SEQ_INT_REQ, DDR_REG_CORE2SEQ); + + if (ddr_wait_bit(DDR_REG_SEQ2CORE, SEQ2CORE_INT_RESP_BIT, 0, 1000000)) { + debug("emif_reset failed to see interrupt acknowledge\n"); + return -EPERM; + } else { + debug("emif_reset interrupt acknowledged\n"); + } + + if (emif_clear()) { + debug("emif_clear() failed\n"); + return -EPERM; + } + debug("emif_reset interrupt cleared\n"); + + debug("nr0=%08x nr1=%08x nr2=%08x\n", + readl(IO48_MMR_NIOS2_RESERVE0), + readl(IO48_MMR_NIOS2_RESERVE1), + readl(IO48_MMR_NIOS2_RESERVE2)); + + return 0; +} + +static int ddr_setup(void) +{ + int i, j, ddr_setup_complete = 0; + + /* Try 3 times to do a calibration */ + for (i = 0; (i < 3) && !ddr_setup_complete; i++) { + WATCHDOG_RESET(); + + /* A delay to wait for calibration bit to set */ + for (j = 0; (j < 10) && !ddr_setup_complete; j++) { + mdelay(500); + ddr_setup_complete = is_sdram_cal_success(); + } + + if (!ddr_setup_complete) + if (emif_reset()) + puts("Error: Failed to reset EMIF\n"); + } + + /* After 3 times trying calibration */ + if (!ddr_setup_complete) { + puts("Error: Could Not Calibrate SDRAM\n"); + return -EPERM; + } + + return 0; +} + +/* Function to startup the SDRAM*/ +static int sdram_startup(void) +{ + /* Release NOC ddr scheduler from reset */ + socfpga_reset_deassert_noc_ddr_scheduler(); + + /* Bringup the DDR (calibration and configuration) */ + return ddr_setup(); +} + +static u64 sdram_size_calc(void) +{ + u32 dramaddrw = readl(&socfpga_io48_mmr_base->dramaddrw); + + u64 size = BIT(((dramaddrw & + IO48_MMR_DRAMADDRW_CFG_CS_ADDR_WIDTH_MASK) >> + IO48_MMR_DRAMADDRW_CFG_CS_ADDR_WIDTH_SHIFT) + + ((dramaddrw & + IO48_MMR_DRAMADDRW_CFG_BANK_GROUP_ADDR_WIDTH_MASK) >> + IO48_MMR_DRAMADDRW_CFG_BANK_GROUP_ADDR_WIDTH_SHIFT) + + ((dramaddrw & + IO48_MMR_DRAMADDRW_CFG_BANK_ADDR_WIDTH_MASK) >> + IO48_MMR_DRAMADDRW_CFG_BANK_ADDR_WIDTH_SHIFT) + + ((dramaddrw & + IO48_MMR_DRAMADDRW_CFG_ROW_ADDR_WIDTH_MASK) >> + IO48_MMR_DRAMADDRW_CFG_ROW_ADDR_WIDTH_SHIFT) + + (dramaddrw & IO48_MMR_DRAMADDRW_CFG_COL_ADDR_WIDTH_MASK)); + + size *= (2 << (readl(&socfpga_ecc_hmc_base->ddrioctrl) & + ALT_ECC_HMC_OCP_DDRIOCTRL_IO_SIZE_MSK)); + + debug("SDRAM size=%llu", size); + + return size; +} + +/* Function to initialize SDRAM MMR and NOC DDR scheduler*/ +static void sdram_mmr_init(void) +{ + u32 update_value, io48_value; + u32 ctrlcfg0 = readl(&socfpga_io48_mmr_base->ctrlcfg0); + u32 ctrlcfg1 = readl(&socfpga_io48_mmr_base->ctrlcfg1); + u32 dramaddrw = readl(&socfpga_io48_mmr_base->dramaddrw); + u32 caltim0 = readl(&socfpga_io48_mmr_base->caltiming0); + u32 caltim1 = readl(&socfpga_io48_mmr_base->caltiming1); + u32 caltim2 = readl(&socfpga_io48_mmr_base->caltiming2); + u32 caltim3 = readl(&socfpga_io48_mmr_base->caltiming3); + u32 caltim4 = readl(&socfpga_io48_mmr_base->caltiming4); + u32 caltim9 = readl(&socfpga_io48_mmr_base->caltiming9); + u32 ddrioctl; + + /* + * Configure the DDR IO size [0xFFCFB008] + * niosreserve0: Used to indicate DDR width & + * bit[7:0] = Number of data bits (0x20 for 32bit) + * bit[8] = 1 if user-mode OCT is present + * bit[9] = 1 if warm reset compiled into EMIF Cal Code + * bit[10] = 1 if warm reset is on during generation in EMIF Cal + * niosreserve1: IP ADCDS version encoded as 16 bit value + * bit[2:0] = Variant (0=not special,1=FAE beta, 2=Customer beta, + * 3=EAP, 4-6 are reserved) + * bit[5:3] = Service Pack # (e.g. 1) + * bit[9:6] = Minor Release # + * bit[14:10] = Major Release # + */ + if ((socfpga_io48_mmr_base->niosreserve1 >> 6) & 0x1FF) { + update_value = readl(&socfpga_io48_mmr_base->niosreserve0); + writel(((update_value & 0xFF) >> 5), + &socfpga_ecc_hmc_base->ddrioctrl); + } + + ddrioctl = readl(&socfpga_ecc_hmc_base->ddrioctrl); + + /* Set the DDR Configuration [0xFFD12400] */ + io48_value = ARRIA_DDR_CONFIG( + ((ctrlcfg1 & + IO48_MMR_CTRLCFG1_ADDR_ORDER_MASK) >> + IO48_MMR_CTRLCFG1_ADDR_ORDER_SHIFT), + ((dramaddrw & + IO48_MMR_DRAMADDRW_CFG_BANK_ADDR_WIDTH_MASK) >> + IO48_MMR_DRAMADDRW_CFG_BANK_ADDR_WIDTH_SHIFT) + + ((dramaddrw & + IO48_MMR_DRAMADDRW_CFG_BANK_GROUP_ADDR_WIDTH_MASK) >> + IO48_MMR_DRAMADDRW_CFG_BANK_GROUP_ADDR_WIDTH_SHIFT), + (dramaddrw & + IO48_MMR_DRAMADDRW_CFG_COL_ADDR_WIDTH_MASK), + ((dramaddrw & + IO48_MMR_DRAMADDRW_CFG_ROW_ADDR_WIDTH_MASK) >> + IO48_MMR_DRAMADDRW_CFG_ROW_ADDR_WIDTH_SHIFT)); + + update_value = match_ddr_conf(io48_value); + if (update_value) + writel(update_value, + &socfpga_noc_ddr_scheduler_base->ddr_t_main_scheduler_ddrconf); + + /* + * Configure DDR timing [0xFFD1240C] + * RDTOMISS = tRTP + tRP + tRCD - BL/2 + * WRTOMISS = WL + tWR + tRP + tRCD and + * WL = RL + BL/2 + 2 - rd-to-wr ; tWR = 15ns so... + * First part of equation is in memory clock units so divide by 2 + * for HMC clock units. 1066MHz is close to 1ns so use 15 directly. + * WRTOMISS = ((RL + BL/2 + 2 + tWR) >> 1)- rd-to-wr + tRP + tRCD + */ + u32 ctrlcfg0_cfg_ctrl_burst_len = + (ctrlcfg0 & IO48_MMR_CTRLCFG0_CTRL_BURST_LENGTH_MASK) >> + IO48_MMR_CTRLCFG0_CTRL_BURST_LENGTH_SHIFT; + + u32 caltim0_cfg_act_to_rdwr = caltim0 & + IO48_MMR_CALTIMING0_CFG_ACT_TO_RDWR_MASK; + + u32 caltim0_cfg_act_to_act = + (caltim0 & IO48_MMR_CALTIMING0_CFG_ACT_TO_ACT_MASK) >> + IO48_MMR_CALTIMING0_CFG_ACT_TO_ACT_SHIFT; + + u32 caltim0_cfg_act_to_act_db = + (caltim0 & + IO48_MMR_CALTIMING0_CFG_ACT_TO_ACT_DIFF_BANK_MASK) >> + IO48_MMR_CALTIMING0_CFG_ACT_TO_ACT_DIFF_BANK_SHIFT; + + u32 caltim1_cfg_rd_to_wr = + (caltim1 & IO48_MMR_CALTIMING1_CFG_RD_TO_WR_MASK) >> + IO48_MMR_CALTIMING1_CFG_RD_TO_WR_SHIFT; + + u32 caltim1_cfg_rd_to_rd_dc = + (caltim1 & IO48_MMR_CALTIMING1_CFG_RD_TO_RD_DC_MASK) >> + IO48_MMR_CALTIMING1_CFG_RD_TO_RD_DC_SHIFT; + + u32 caltim1_cfg_rd_to_wr_dc = + (caltim1 & IO48_MMR_CALTIMING1_CFG_RD_TO_WR_DIFF_CHIP_MASK) >> + IO48_MMR_CALTIMING1_CFG_RD_TO_WR_DIFF_CHIP_SHIFT; + + u32 caltim2_cfg_rd_to_pch = + (caltim2 & IO48_MMR_CALTIMING2_CFG_RD_TO_PCH_MASK) >> + IO48_MMR_CALTIMING2_CFG_RD_TO_PCH_SHIFT; + + u32 caltim3_cfg_wr_to_rd = + (caltim3 & IO48_MMR_CALTIMING3_CFG_WR_TO_RD_MASK) >> + IO48_MMR_CALTIMING3_CFG_WR_TO_RD_SHIFT; + + u32 caltim3_cfg_wr_to_rd_dc = + (caltim3 & IO48_MMR_CALTIMING3_CFG_WR_TO_RD_DIFF_CHIP_MASK) >> + IO48_MMR_CALTIMING3_CFG_WR_TO_RD_DIFF_CHIP_SHIFT; + + u32 caltim4_cfg_pch_to_valid = + (caltim4 & IO48_MMR_CALTIMING4_CFG_PCH_TO_VALID_MASK) >> + IO48_MMR_CALTIMING4_CFG_PCH_TO_VALID_SHIFT; + + u32 caltim9_cfg_4_act_to_act = caltim9 & + IO48_MMR_CALTIMING9_CFG_WR_4_ACT_TO_ACT_MASK; + + update_value = (caltim2_cfg_rd_to_pch + caltim4_cfg_pch_to_valid + + caltim0_cfg_act_to_rdwr - + (ctrlcfg0_cfg_ctrl_burst_len >> 2)); + + io48_value = ((((socfpga_io48_mmr_base->dramtiming0 & + ALT_IO48_DRAMTIME_MEM_READ_LATENCY_MASK) + 2 + 15 + + (ctrlcfg0_cfg_ctrl_burst_len >> 1)) >> 1) - + /* Up to here was in memory cycles so divide by 2 */ + caltim1_cfg_rd_to_wr + caltim0_cfg_act_to_rdwr + + caltim4_cfg_pch_to_valid); + + writel(((caltim0_cfg_act_to_act << + ALT_NOC_MPU_DDR_T_SCHED_DDRTIMING_ACTTOACT_LSB) | + (update_value << + ALT_NOC_MPU_DDR_T_SCHED_DDRTIMING_RDTOMISS_LSB) | + (io48_value << + ALT_NOC_MPU_DDR_T_SCHED_DDRTIMING_WRTOMISS_LSB) | + ((ctrlcfg0_cfg_ctrl_burst_len >> 2) << + ALT_NOC_MPU_DDR_T_SCHED_DDRTIMING_BURSTLEN_LSB) | + (caltim1_cfg_rd_to_wr << + ALT_NOC_MPU_DDR_T_SCHED_DDRTIMING_RDTOWR_LSB) | + (caltim3_cfg_wr_to_rd << + ALT_NOC_MPU_DDR_T_SCHED_DDRTIMING_WRTORD_LSB) | + (((ddrioctl == 1) ? 1 : 0) << + ALT_NOC_MPU_DDR_T_SCHED_DDRTIMING_BWRATIO_LSB)), + &socfpga_noc_ddr_scheduler_base-> + ddr_t_main_scheduler_ddrtiming); + + /* Configure DDR mode [0xFFD12410] [precharge = 0] */ + writel(((ddrioctl ? 0 : 1) << + ALT_NOC_MPU_DDR_T_SCHED_DDRMOD_BWRATIOEXTENDED_LSB), + &socfpga_noc_ddr_scheduler_base->ddr_t_main_scheduler_ddrmode); + + /* Configure the read latency [0xFFD12414] */ + writel(((socfpga_io48_mmr_base->dramtiming0 & + ALT_IO48_DRAMTIME_MEM_READ_LATENCY_MASK) >> 1) + + DDR_READ_LATENCY_DELAY, + &socfpga_noc_ddr_scheduler_base-> + ddr_t_main_scheduler_readlatency); + + /* + * Configuring timing values concerning activate commands + * [0xFFD12438] [FAWBANK alway 1 because always 4 bank DDR] + */ + writel(((caltim0_cfg_act_to_act_db << + ALT_NOC_MPU_DDR_T_SCHED_ACTIVATE_RRD_LSB) | + (caltim9_cfg_4_act_to_act << + ALT_NOC_MPU_DDR_T_SCHED_ACTIVATE_FAW_LSB) | + (ARRIA10_SDR_ACTIVATE_FAWBANK << + ALT_NOC_MPU_DDR_T_SCHED_ACTIVATE_FAWBANK_LSB)), + &socfpga_noc_ddr_scheduler_base->ddr_t_main_scheduler_activate); + + /* + * Configuring timing values concerning device to device data bus + * ownership change [0xFFD1243C] + */ + writel(((caltim1_cfg_rd_to_rd_dc << + ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTORD_LSB) | + (caltim1_cfg_rd_to_wr_dc << + ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSRDTOWR_LSB) | + (caltim3_cfg_wr_to_rd_dc << + ALT_NOC_MPU_DDR_T_SCHED_DEVTODEV_BUSWRTORD_LSB)), + &socfpga_noc_ddr_scheduler_base->ddr_t_main_scheduler_devtodev); + + /* Enable or disable the SDRAM ECC */ + if (ctrlcfg1 & IO48_MMR_CTRLCFG1_CTRL_ENABLE_ECC) { + setbits_le32(&socfpga_ecc_hmc_base->eccctrl, + (ALT_ECC_HMC_OCP_ECCCTL_AWB_CNT_RST_SET_MSK | + ALT_ECC_HMC_OCP_ECCCTL_CNT_RST_SET_MSK | + ALT_ECC_HMC_OCP_ECCCTL_ECC_EN_SET_MSK)); + clrbits_le32(&socfpga_ecc_hmc_base->eccctrl, + (ALT_ECC_HMC_OCP_ECCCTL_AWB_CNT_RST_SET_MSK | + ALT_ECC_HMC_OCP_ECCCTL_CNT_RST_SET_MSK)); + setbits_le32(&socfpga_ecc_hmc_base->eccctrl2, + (ALT_ECC_HMC_OCP_ECCCTL2_RMW_EN_SET_MSK | + ALT_ECC_HMC_OCP_ECCCTL2_AWB_EN_SET_MSK)); + } else { + clrbits_le32(&socfpga_ecc_hmc_base->eccctrl, + (ALT_ECC_HMC_OCP_ECCCTL_AWB_CNT_RST_SET_MSK | + ALT_ECC_HMC_OCP_ECCCTL_CNT_RST_SET_MSK | + ALT_ECC_HMC_OCP_ECCCTL_ECC_EN_SET_MSK)); + clrbits_le32(&socfpga_ecc_hmc_base->eccctrl2, + (ALT_ECC_HMC_OCP_ECCCTL2_RMW_EN_SET_MSK | + ALT_ECC_HMC_OCP_ECCCTL2_AWB_EN_SET_MSK)); + } +} + +struct firewall_entry { + const char *prop_name; + const u32 cfg_addr; + const u32 en_addr; + const u32 en_bit; +}; +#define FW_MPU_FPGA_ADDRESS \ + ((const struct socfpga_noc_fw_ddr_mpu_fpga2sdram *)\ + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS) + +#define SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET(ADDR) \ + (SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS + \ + offsetof(struct socfpga_noc_fw_ddr_mpu_fpga2sdram, ADDR)) + +#define SOCFPGA_SDR_FIREWALL_L3_ADDRESS_OFFSET(ADDR) \ + (SOCFPGA_SDR_FIREWALL_L3_ADDRESS + \ + offsetof(struct socfpga_noc_fw_ddr_l3, ADDR)) + +const struct firewall_entry firewall_table[] = { + { + "mpu0", + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET(mpuregion0addr), + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET(enable), + ALT_NOC_FW_DDR_SCR_EN_MPUREG0EN_SET_MSK + }, + { + "mpu1", + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS + + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET(mpuregion1addr), + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET(enable), + ALT_NOC_FW_DDR_SCR_EN_MPUREG1EN_SET_MSK + }, + { + "mpu2", + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET(mpuregion2addr), + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET(enable), + ALT_NOC_FW_DDR_SCR_EN_MPUREG2EN_SET_MSK + }, + { + "mpu3", + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET(mpuregion3addr), + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET(enable), + ALT_NOC_FW_DDR_SCR_EN_MPUREG3EN_SET_MSK + }, + { + "l3-0", + SOCFPGA_SDR_FIREWALL_L3_ADDRESS_OFFSET(hpsregion0addr), + SOCFPGA_SDR_FIREWALL_L3_ADDRESS_OFFSET(enable), + ALT_NOC_FW_DDR_SCR_EN_HPSREG0EN_SET_MSK + }, + { + "l3-1", + SOCFPGA_SDR_FIREWALL_L3_ADDRESS_OFFSET(hpsregion1addr), + SOCFPGA_SDR_FIREWALL_L3_ADDRESS_OFFSET(enable), + ALT_NOC_FW_DDR_SCR_EN_HPSREG1EN_SET_MSK + }, + { + "l3-2", + SOCFPGA_SDR_FIREWALL_L3_ADDRESS_OFFSET(hpsregion2addr), + SOCFPGA_SDR_FIREWALL_L3_ADDRESS_OFFSET(enable), + ALT_NOC_FW_DDR_SCR_EN_HPSREG2EN_SET_MSK + }, + { + "l3-3", + SOCFPGA_SDR_FIREWALL_L3_ADDRESS_OFFSET(hpsregion3addr), + SOCFPGA_SDR_FIREWALL_L3_ADDRESS_OFFSET(enable), + ALT_NOC_FW_DDR_SCR_EN_HPSREG3EN_SET_MSK + }, + { + "l3-4", + SOCFPGA_SDR_FIREWALL_L3_ADDRESS_OFFSET(hpsregion4addr), + SOCFPGA_SDR_FIREWALL_L3_ADDRESS_OFFSET(enable), + ALT_NOC_FW_DDR_SCR_EN_HPSREG4EN_SET_MSK + }, + { + "l3-5", + SOCFPGA_SDR_FIREWALL_L3_ADDRESS_OFFSET(hpsregion5addr), + SOCFPGA_SDR_FIREWALL_L3_ADDRESS_OFFSET(enable), + ALT_NOC_FW_DDR_SCR_EN_HPSREG5EN_SET_MSK + }, + { + "l3-6", + SOCFPGA_SDR_FIREWALL_L3_ADDRESS_OFFSET(hpsregion6addr), + SOCFPGA_SDR_FIREWALL_L3_ADDRESS_OFFSET(enable), + ALT_NOC_FW_DDR_SCR_EN_HPSREG6EN_SET_MSK + }, + { + "l3-7", + SOCFPGA_SDR_FIREWALL_L3_ADDRESS_OFFSET(hpsregion7addr), + SOCFPGA_SDR_FIREWALL_L3_ADDRESS_OFFSET(enable), + ALT_NOC_FW_DDR_SCR_EN_HPSREG7EN_SET_MSK + }, + { + "fpga2sdram0-0", + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET + (fpga2sdram0region0addr), + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET(enable), + ALT_NOC_FW_DDR_SCR_EN_F2SDR0REG0EN_SET_MSK + }, + { + "fpga2sdram0-1", + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET + (fpga2sdram0region1addr), + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET(enable), + ALT_NOC_FW_DDR_SCR_EN_F2SDR0REG1EN_SET_MSK + }, + { + "fpga2sdram0-2", + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET + (fpga2sdram0region2addr), + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET(enable), + ALT_NOC_FW_DDR_SCR_EN_F2SDR0REG2EN_SET_MSK + }, + { + "fpga2sdram0-3", + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET + (fpga2sdram0region3addr), + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET(enable), + ALT_NOC_FW_DDR_SCR_EN_F2SDR0REG3EN_SET_MSK + }, + { + "fpga2sdram1-0", + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET + (fpga2sdram1region0addr), + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET(enable), + ALT_NOC_FW_DDR_SCR_EN_F2SDR1REG0EN_SET_MSK + }, + { + "fpga2sdram1-1", + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET + (fpga2sdram1region1addr), + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET(enable), + ALT_NOC_FW_DDR_SCR_EN_F2SDR1REG1EN_SET_MSK + }, + { + "fpga2sdram1-2", + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET + (fpga2sdram1region2addr), + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET(enable), + ALT_NOC_FW_DDR_SCR_EN_F2SDR1REG2EN_SET_MSK + }, + { + "fpga2sdram1-3", + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET + (fpga2sdram1region3addr), + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET(enable), + ALT_NOC_FW_DDR_SCR_EN_F2SDR1REG3EN_SET_MSK + }, + { + "fpga2sdram2-0", + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET + (fpga2sdram2region0addr), + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET(enable), + ALT_NOC_FW_DDR_SCR_EN_F2SDR2REG0EN_SET_MSK + }, + { + "fpga2sdram2-1", + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET + (fpga2sdram2region1addr), + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET(enable), + ALT_NOC_FW_DDR_SCR_EN_F2SDR2REG1EN_SET_MSK + }, + { + "fpga2sdram2-2", + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET + (fpga2sdram2region2addr), + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET(enable), + ALT_NOC_FW_DDR_SCR_EN_F2SDR2REG2EN_SET_MSK + }, + { + "fpga2sdram2-3", + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET + (fpga2sdram2region3addr), + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET(enable), + ALT_NOC_FW_DDR_SCR_EN_F2SDR2REG3EN_SET_MSK + }, + +}; + +static int of_sdram_firewall_setup(const void *blob) +{ + int child, i, node, ret; + u32 start_end[2]; + char name[32]; + + node = fdtdec_next_compatible(blob, 0, COMPAT_ALTERA_SOCFPGA_NOC); + if (node < 0) + return -ENXIO; + + child = fdt_first_subnode(blob, node); + if (child < 0) + return -ENXIO; + + /* set to default state */ + writel(0, &socfpga_noc_fw_ddr_mpu_fpga2sdram_base->enable); + writel(0, &socfpga_noc_fw_ddr_l3_base->enable); + + + for (i = 0; i < ARRAY_SIZE(firewall_table); i++) { + sprintf(name, "%s", firewall_table[i].prop_name); + ret = fdtdec_get_int_array(blob, child, name, + start_end, 2); + if (ret) { + sprintf(name, "altr,%s", firewall_table[i].prop_name); + ret = fdtdec_get_int_array(blob, child, name, + start_end, 2); + if (ret) + continue; + } + + writel((start_end[0] & ALT_NOC_FW_DDR_ADDR_MASK) | + (start_end[1] << ALT_NOC_FW_DDR_END_ADDR_LSB), + firewall_table[i].cfg_addr); + setbits_le32(firewall_table[i].en_addr, + firewall_table[i].en_bit); + } + + return 0; +} + +int ddr_calibration_sequence(void) +{ + WATCHDOG_RESET(); + + /* Check to see if SDRAM cal was success */ + if (sdram_startup()) { + puts("DDRCAL: Failed\n"); + return -EPERM; + } + + puts("DDRCAL: Success\n"); + + WATCHDOG_RESET(); + + /* initialize the MMR register */ + sdram_mmr_init(); + + /* assigning the SDRAM size */ + u64 size = sdram_size_calc(); + + /* + * If size is less than zero, this is invalid/weird value from + * calculation, use default Config size. + * Up to 2GB is supported, 2GB would be used if more than that. + */ + if (size <= 0) + gd->ram_size = PHYS_SDRAM_1_SIZE; + else if (DDR_SIZE_2GB_HEX <= size) + gd->ram_size = DDR_SIZE_2GB_HEX; + else + gd->ram_size = (u32)size; + + /* setup the dram info within bd */ + dram_init_banksize(); + + if (of_sdram_firewall_setup(gd->fdt_blob)) + puts("FW: Error Configuring Firewall\n"); + + return 0; +} + +void dram_bank_mmu_setup(int bank) +{ + bd_t *bd = gd->bd; + int i; + + debug("%s: bank: %d\n", __func__, bank); + for (i = bd->bi_dram[bank].start >> 20; + i < (bd->bi_dram[bank].start + bd->bi_dram[bank].size) >> 20; + i++) { +#if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH) + set_section_dcache(i, DCACHE_WRITETHROUGH); +#else + set_section_dcache(i, DCACHE_WRITEBACK); +#endif + } + + /* same as above but just that we would want cacheable for ocram too */ + i = CONFIG_SYS_INIT_RAM_ADDR >> 20; +#if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH) + set_section_dcache(i, DCACHE_WRITETHROUGH); +#else + set_section_dcache(i, DCACHE_WRITEBACK); +#endif +} diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram_gen5.c index 821060459cf..821060459cf 100644 --- a/drivers/ddr/altera/sdram.c +++ b/drivers/ddr/altera/sdram_gen5.c diff --git a/cmd/fastboot/Kconfig b/drivers/fastboot/Kconfig index 0d2c2f131e6..bc25ea1d9c7 100644 --- a/cmd/fastboot/Kconfig +++ b/drivers/fastboot/Kconfig @@ -1,32 +1,27 @@ -comment "FASTBOOT" +menu "Fastboot support" -menuconfig FASTBOOT - bool "Fastboot support" - depends on USB_GADGET - default y if ARCH_SUNXI && USB_MUSB_GADGET - -if FASTBOOT +config FASTBOOT + bool + imply ANDROID_BOOT_IMAGE + imply CMD_FASTBOOT config USB_FUNCTION_FASTBOOT bool "Enable USB fastboot gadget" - default y + depends on USB_GADGET + default y if ARCH_SUNXI && USB_MUSB_GADGET + select FASTBOOT select USB_GADGET_DOWNLOAD - imply ANDROID_BOOT_IMAGE - imply CMD_FASTBOOT help This enables the USB part of the fastboot gadget. -config CMD_FASTBOOT - bool "Enable FASTBOOT command" +config UDP_FUNCTION_FASTBOOT + depends on NET + select FASTBOOT + bool "Enable fastboot protocol over UDP" help - This enables the command "fastboot" which enables the Android - fastboot mode for the platform's USB device. Fastboot is a USB - protocol for downloading images, flashing and device control - used on Android devices. - - See doc/README.android-fastboot for more information. + This enables the fastboot protocol over UDP. -if USB_FUNCTION_FASTBOOT +if FASTBOOT config FASTBOOT_BUF_ADDR hex "Define FASTBOOT buffer address" @@ -58,6 +53,7 @@ config FASTBOOT_BUF_SIZE config FASTBOOT_USB_DEV int "USB controller number" + depends on USB_FUNCTION_FASTBOOT default 0 help Some boards have USB OTG controller other than 0. Define this @@ -67,6 +63,8 @@ config FASTBOOT_USB_DEV config FASTBOOT_FLASH bool "Enable FASTBOOT FLASH command" default y if ARCH_SUNXI + depends on MMC || (NAND && CMD_MTDPARTS) + select IMAGE_SPARSE help The fastboot protocol includes a "flash" command for writing the downloaded image to a non-volatile storage device. Define @@ -82,7 +80,7 @@ config FASTBOOT_FLASH_MMC config FASTBOOT_FLASH_NAND bool "FASTBOOT on NAND" - depends on NAND + depends on NAND && CMD_MTDPARTS endchoice @@ -96,19 +94,16 @@ config FASTBOOT_FLASH_MMC_DEV regarding the non-volatile storage device. Define this to the eMMC device that fastboot should use to store the image. -config FASTBOOT_FLASH_NAND_DEV - int "Define FASTBOOT NAND FLASH default device" +config FASTBOOT_FLASH_NAND_TRIMFFS + bool "Skip empty pages when flashing NAND" depends on FASTBOOT_FLASH_NAND - depends on CMD_MTDPARTS - default 0 if ARCH_SUNXI && NAND_SUNXI help - The fastboot "flash" command requires additional information - regarding the non-volatile storage device. Define this to - the NAND device that fastboot should use to store the image. + When flashing NAND enable the DROP_FFS flag to drop trailing all-0xff + pages. config FASTBOOT_GPT_NAME string "Target name for updating GPT" - depends on FASTBOOT_FLASH + depends on FASTBOOT_FLASH_MMC && EFI_PARTITION default "gpt" help The fastboot "flash" command supports writing the downloaded @@ -121,7 +116,7 @@ config FASTBOOT_GPT_NAME config FASTBOOT_MBR_NAME string "Target name for updating MBR" - depends on FASTBOOT_FLASH + depends on FASTBOOT_FLASH_MMC && DOS_PARTITION default "mbr" help The fastboot "flash" command allows to write the downloaded image @@ -129,6 +124,14 @@ config FASTBOOT_MBR_NAME specified on the "fastboot flash" command line matches the value defined here. The default target name for updating MBR is "mbr". -endif # USB_FUNCTION_FASTBOOT +config FASTBOOT_CMD_OEM_FORMAT + bool "Enable the 'oem format' command" + depends on FASTBOOT_FLASH_MMC && CMD_GPT + help + Add support for the "oem format" command from a client. This + relies on the env variable partitions to contain the list of + partitions as required by the gpt command. endif # FASTBOOT + +endmenu diff --git a/drivers/fastboot/Makefile b/drivers/fastboot/Makefile new file mode 100644 index 00000000000..a2421565e23 --- /dev/null +++ b/drivers/fastboot/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0+ + +obj-y += fb_common.o +obj-y += fb_getvar.o +obj-y += fb_command.o +obj-$(CONFIG_FASTBOOT_FLASH_MMC) += fb_mmc.o +obj-$(CONFIG_FASTBOOT_FLASH_NAND) += fb_nand.o diff --git a/drivers/fastboot/fb_command.c b/drivers/fastboot/fb_command.c new file mode 100644 index 00000000000..200f9910c56 --- /dev/null +++ b/drivers/fastboot/fb_command.c @@ -0,0 +1,335 @@ +// SPDX-License-Identifier: BSD-2-Clause +/* + * Copyright (C) 2016 The Android Open Source Project + */ + +#include <common.h> +#include <fastboot.h> +#include <fastboot-internal.h> +#include <fb_mmc.h> +#include <fb_nand.h> +#include <part.h> +#include <stdlib.h> + +/** + * image_size - final fastboot image size + */ +static u32 image_size; + +/** + * fastboot_bytes_received - number of bytes received in the current download + */ +static u32 fastboot_bytes_received; + +/** + * fastboot_bytes_expected - number of bytes expected in the current download + */ +static u32 fastboot_bytes_expected; + +static void okay(char *, char *); +static void getvar(char *, char *); +static void download(char *, char *); +#if CONFIG_IS_ENABLED(FASTBOOT_FLASH) +static void flash(char *, char *); +static void erase(char *, char *); +#endif +static void reboot_bootloader(char *, char *); +#if CONFIG_IS_ENABLED(FASTBOOT_CMD_OEM_FORMAT) +static void oem_format(char *, char *); +#endif + +static const struct { + const char *command; + void (*dispatch)(char *cmd_parameter, char *response); +} commands[FASTBOOT_COMMAND_COUNT] = { + [FASTBOOT_COMMAND_GETVAR] = { + .command = "getvar", + .dispatch = getvar + }, + [FASTBOOT_COMMAND_DOWNLOAD] = { + .command = "download", + .dispatch = download + }, +#if CONFIG_IS_ENABLED(FASTBOOT_FLASH) + [FASTBOOT_COMMAND_FLASH] = { + .command = "flash", + .dispatch = flash + }, + [FASTBOOT_COMMAND_ERASE] = { + .command = "erase", + .dispatch = erase + }, +#endif + [FASTBOOT_COMMAND_BOOT] = { + .command = "boot", + .dispatch = okay + }, + [FASTBOOT_COMMAND_CONTINUE] = { + .command = "continue", + .dispatch = okay + }, + [FASTBOOT_COMMAND_REBOOT] = { + .command = "reboot", + .dispatch = okay + }, + [FASTBOOT_COMMAND_REBOOT_BOOTLOADER] = { + .command = "reboot-bootloader", + .dispatch = reboot_bootloader + }, + [FASTBOOT_COMMAND_SET_ACTIVE] = { + .command = "set_active", + .dispatch = okay + }, +#if CONFIG_IS_ENABLED(FASTBOOT_CMD_OEM_FORMAT) + [FASTBOOT_COMMAND_OEM_FORMAT] = { + .command = "oem format", + .dispatch = oem_format, + }, +#endif +}; + +/** + * fastboot_handle_command - Handle fastboot command + * + * @cmd_string: Pointer to command string + * @response: Pointer to fastboot response buffer + * + * Return: Executed command, or -1 if not recognized + */ +int fastboot_handle_command(char *cmd_string, char *response) +{ + int i; + char *cmd_parameter; + + cmd_parameter = cmd_string; + strsep(&cmd_parameter, ":"); + + for (i = 0; i < FASTBOOT_COMMAND_COUNT; i++) { + if (!strcmp(commands[i].command, cmd_string)) { + if (commands[i].dispatch) { + commands[i].dispatch(cmd_parameter, + response); + return i; + } else { + break; + } + } + } + + pr_err("command %s not recognized.\n", cmd_string); + fastboot_fail("unrecognized command", response); + return -1; +} + +/** + * okay() - Send bare OKAY response + * + * @cmd_parameter: Pointer to command parameter + * @response: Pointer to fastboot response buffer + * + * Send a bare OKAY fastboot response. This is used where the command is + * valid, but all the work is done after the response has been sent (e.g. + * boot, reboot etc.) + */ +static void okay(char *cmd_parameter, char *response) +{ + fastboot_okay(NULL, response); +} + +/** + * getvar() - Read a config/version variable + * + * @cmd_parameter: Pointer to command parameter + * @response: Pointer to fastboot response buffer + */ +static void getvar(char *cmd_parameter, char *response) +{ + fastboot_getvar(cmd_parameter, response); +} + +/** + * fastboot_download() - Start a download transfer from the client + * + * @cmd_parameter: Pointer to command parameter + * @response: Pointer to fastboot response buffer + */ +static void download(char *cmd_parameter, char *response) +{ + char *tmp; + + if (!cmd_parameter) { + fastboot_fail("Expected command parameter", response); + return; + } + fastboot_bytes_received = 0; + fastboot_bytes_expected = simple_strtoul(cmd_parameter, &tmp, 16); + if (fastboot_bytes_expected == 0) { + fastboot_fail("Expected nonzero image size", response); + return; + } + /* + * Nothing to download yet. Response is of the form: + * [DATA|FAIL]$cmd_parameter + * + * where cmd_parameter is an 8 digit hexadecimal number + */ + if (fastboot_bytes_expected > fastboot_buf_size) { + fastboot_fail(cmd_parameter, response); + } else { + printf("Starting download of %d bytes\n", + fastboot_bytes_expected); + fastboot_response("DATA", response, "%s", cmd_parameter); + } +} + +/** + * fastboot_data_remaining() - return bytes remaining in current transfer + * + * Return: Number of bytes left in the current download + */ +u32 fastboot_data_remaining(void) +{ + return fastboot_bytes_expected - fastboot_bytes_received; +} + +/** + * fastboot_data_download() - Copy image data to fastboot_buf_addr. + * + * @fastboot_data: Pointer to received fastboot data + * @fastboot_data_len: Length of received fastboot data + * @response: Pointer to fastboot response buffer + * + * Copies image data from fastboot_data to fastboot_buf_addr. Writes to + * response. fastboot_bytes_received is updated to indicate the number + * of bytes that have been transferred. + * + * On completion sets image_size and ${filesize} to the total size of the + * downloaded image. + */ +void fastboot_data_download(const void *fastboot_data, + unsigned int fastboot_data_len, + char *response) +{ +#define BYTES_PER_DOT 0x20000 + u32 pre_dot_num, now_dot_num; + + if (fastboot_data_len == 0 || + (fastboot_bytes_received + fastboot_data_len) > + fastboot_bytes_expected) { + fastboot_fail("Received invalid data length", + response); + return; + } + /* Download data to fastboot_buf_addr */ + memcpy(fastboot_buf_addr + fastboot_bytes_received, + fastboot_data, fastboot_data_len); + + pre_dot_num = fastboot_bytes_received / BYTES_PER_DOT; + fastboot_bytes_received += fastboot_data_len; + now_dot_num = fastboot_bytes_received / BYTES_PER_DOT; + + if (pre_dot_num != now_dot_num) { + putc('.'); + if (!(now_dot_num % 74)) + putc('\n'); + } + *response = '\0'; +} + +/** + * fastboot_data_complete() - Mark current transfer complete + * + * @response: Pointer to fastboot response buffer + * + * Set image_size and ${filesize} to the total size of the downloaded image. + */ +void fastboot_data_complete(char *response) +{ + /* Download complete. Respond with "OKAY" */ + fastboot_okay(NULL, response); + printf("\ndownloading of %d bytes finished\n", fastboot_bytes_received); + image_size = fastboot_bytes_received; + env_set_hex("filesize", image_size); + fastboot_bytes_expected = 0; + fastboot_bytes_received = 0; +} + +#if CONFIG_IS_ENABLED(FASTBOOT_FLASH) +/** + * flash() - write the downloaded image to the indicated partition. + * + * @cmd_parameter: Pointer to partition name + * @response: Pointer to fastboot response buffer + * + * Writes the previously downloaded image to the partition indicated by + * cmd_parameter. Writes to response. + */ +static void flash(char *cmd_parameter, char *response) +{ +#if CONFIG_IS_ENABLED(FASTBOOT_FLASH_MMC) + fastboot_mmc_flash_write(cmd_parameter, fastboot_buf_addr, image_size, + response); +#endif +#if CONFIG_IS_ENABLED(FASTBOOT_FLASH_NAND) + fastboot_nand_flash_write(cmd_parameter, fastboot_buf_addr, image_size, + response); +#endif +} + +/** + * erase() - erase the indicated partition. + * + * @cmd_parameter: Pointer to partition name + * @response: Pointer to fastboot response buffer + * + * Erases the partition indicated by cmd_parameter (clear to 0x00s). Writes + * to response. + */ +static void erase(char *cmd_parameter, char *response) +{ +#if CONFIG_IS_ENABLED(FASTBOOT_FLASH_MMC) + fastboot_mmc_erase(cmd_parameter, response); +#endif +#if CONFIG_IS_ENABLED(FASTBOOT_FLASH_NAND) + fastboot_nand_erase(cmd_parameter, response); +#endif +} +#endif + +/** + * reboot_bootloader() - Sets reboot bootloader flag. + * + * @cmd_parameter: Pointer to command parameter + * @response: Pointer to fastboot response buffer + */ +static void reboot_bootloader(char *cmd_parameter, char *response) +{ + if (fastboot_set_reboot_flag()) + fastboot_fail("Cannot set reboot flag", response); + else + fastboot_okay(NULL, response); +} + +#if CONFIG_IS_ENABLED(FASTBOOT_CMD_OEM_FORMAT) +/** + * oem_format() - Execute the OEM format command + * + * @cmd_parameter: Pointer to command parameter + * @response: Pointer to fastboot response buffer + */ +static void oem_format(char *cmd_parameter, char *response) +{ + char cmdbuf[32]; + + if (!env_get("partitions")) { + fastboot_fail("partitions not set", response); + } else { + sprintf(cmdbuf, "gpt write mmc %x $partitions", + CONFIG_FASTBOOT_FLASH_MMC_DEV); + if (run_command(cmdbuf, 0)) + fastboot_fail("", response); + else + fastboot_okay(NULL, response); + } +} +#endif diff --git a/drivers/fastboot/fb_common.c b/drivers/fastboot/fb_common.c new file mode 100644 index 00000000000..c6e06aab7aa --- /dev/null +++ b/drivers/fastboot/fb_common.c @@ -0,0 +1,169 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2008 - 2009 + * Windriver, <www.windriver.com> + * Tom Rix <Tom.Rix@windriver.com> + * + * Copyright 2011 Sebastian Andrzej Siewior <bigeasy@linutronix.de> + * + * Copyright 2014 Linaro, Ltd. + * Rob Herring <robh@kernel.org> + */ + +#include <common.h> +#include <fastboot.h> +#include <net/fastboot.h> + +/** + * fastboot_buf_addr - base address of the fastboot download buffer + */ +void *fastboot_buf_addr; + +/** + * fastboot_buf_size - size of the fastboot download buffer + */ +u32 fastboot_buf_size; + +/** + * fastboot_progress_callback - callback executed during long operations + */ +void (*fastboot_progress_callback)(const char *msg); + +/** + * fastboot_response() - Writes a response of the form "$tag$reason". + * + * @tag: The first part of the response + * @response: Pointer to fastboot response buffer + * @format: printf style format string + */ +void fastboot_response(const char *tag, char *response, + const char *format, ...) +{ + va_list args; + + strlcpy(response, tag, FASTBOOT_RESPONSE_LEN); + if (format) { + va_start(args, format); + vsnprintf(response + strlen(response), + FASTBOOT_RESPONSE_LEN - strlen(response) - 1, + format, args); + va_end(args); + } +} + +/** + * fastboot_fail() - Write a FAIL response of the form "FAIL$reason". + * + * @reason: Pointer to returned reason string + * @response: Pointer to fastboot response buffer + */ +void fastboot_fail(const char *reason, char *response) +{ + fastboot_response("FAIL", response, "%s", reason); +} + +/** + * fastboot_okay() - Write an OKAY response of the form "OKAY$reason". + * + * @reason: Pointer to returned reason string, or NULL to send a bare "OKAY" + * @response: Pointer to fastboot response buffer + */ +void fastboot_okay(const char *reason, char *response) +{ + if (reason) + fastboot_response("OKAY", response, "%s", reason); + else + fastboot_response("OKAY", response, NULL); +} + +/** + * fastboot_set_reboot_flag() - Set flag to indicate reboot-bootloader + * + * Set flag which indicates that we should reboot into the bootloader + * following the reboot that fastboot executes after this function. + * + * This function should be overridden in your board file with one + * which sets whatever flag your board specific Android bootloader flow + * requires in order to re-enter the bootloader. + */ +int __weak fastboot_set_reboot_flag(void) +{ + return -ENOSYS; +} + +/** + * fastboot_get_progress_callback() - Return progress callback + * + * Return: Pointer to function called during long operations + */ +void (*fastboot_get_progress_callback(void))(const char *) +{ + return fastboot_progress_callback; +} + +/** + * fastboot_boot() - Execute fastboot boot command + * + * If ${fastboot_bootcmd} is set, run that command to execute the boot + * process, if that returns, then exit the fastboot server and return + * control to the caller. + * + * Otherwise execute "bootm <fastboot_buf_addr>", if that fails, reset + * the board. + */ +void fastboot_boot(void) +{ + char *s; + + s = env_get("fastboot_bootcmd"); + if (s) { + run_command(s, CMD_FLAG_ENV); + } else { + static char boot_addr_start[12]; + static char *const bootm_args[] = { + "bootm", boot_addr_start, NULL + }; + + snprintf(boot_addr_start, sizeof(boot_addr_start) - 1, + "0x%p", fastboot_buf_addr); + printf("Booting kernel at %s...\n\n\n", boot_addr_start); + + do_bootm(NULL, 0, 2, bootm_args); + + /* + * This only happens if image is somehow faulty so we start + * over. We deliberately leave this policy to the invocation + * of fastbootcmd if that's what's being run + */ + do_reset(NULL, 0, 0, NULL); + } +} + +/** + * fastboot_set_progress_callback() - set progress callback + * + * @progress: Pointer to progress callback + * + * Set a callback which is invoked periodically during long running operations + * (flash and erase). This can be used (for example) by the UDP transport to + * send INFO responses to keep the client alive whilst those commands are + * executing. + */ +void fastboot_set_progress_callback(void (*progress)(const char *msg)) +{ + fastboot_progress_callback = progress; +} + +/* + * fastboot_init() - initialise new fastboot protocol session + * + * @buf_addr: Pointer to download buffer, or NULL for default + * @buf_size: Size of download buffer, or zero for default + */ +void fastboot_init(void *buf_addr, u32 buf_size) +{ + fastboot_buf_addr = buf_addr ? buf_addr : + (void *)CONFIG_FASTBOOT_BUF_ADDR; + fastboot_buf_size = buf_size ? buf_size : CONFIG_FASTBOOT_BUF_SIZE; + fastboot_set_progress_callback(NULL); +} diff --git a/drivers/fastboot/fb_getvar.c b/drivers/fastboot/fb_getvar.c new file mode 100644 index 00000000000..4d264c985d7 --- /dev/null +++ b/drivers/fastboot/fb_getvar.c @@ -0,0 +1,230 @@ +// SPDX-License-Identifier: BSD-2-Clause +/* + * Copyright (C) 2016 The Android Open Source Project + */ + +#include <common.h> +#include <fastboot.h> +#include <fastboot-internal.h> +#include <fb_mmc.h> +#include <fb_nand.h> +#include <fs.h> +#include <version.h> + +static void getvar_version(char *var_parameter, char *response); +static void getvar_bootloader_version(char *var_parameter, char *response); +static void getvar_downloadsize(char *var_parameter, char *response); +static void getvar_serialno(char *var_parameter, char *response); +static void getvar_version_baseband(char *var_parameter, char *response); +static void getvar_product(char *var_parameter, char *response); +static void getvar_current_slot(char *var_parameter, char *response); +static void getvar_slot_suffixes(char *var_parameter, char *response); +static void getvar_has_slot(char *var_parameter, char *response); +#if CONFIG_IS_ENABLED(FASTBOOT_FLASH_MMC) +static void getvar_partition_type(char *part_name, char *response); +#endif +#if CONFIG_IS_ENABLED(FASTBOOT_FLASH) +static void getvar_partition_size(char *part_name, char *response); +#endif + +static const struct { + const char *variable; + void (*dispatch)(char *var_parameter, char *response); +} getvar_dispatch[] = { + { + .variable = "version", + .dispatch = getvar_version + }, { + .variable = "bootloader-version", + .dispatch = getvar_bootloader_version + }, { + .variable = "version-bootloader", + .dispatch = getvar_bootloader_version + }, { + .variable = "downloadsize", + .dispatch = getvar_downloadsize + }, { + .variable = "max-download-size", + .dispatch = getvar_downloadsize + }, { + .variable = "serialno", + .dispatch = getvar_serialno + }, { + .variable = "version-baseband", + .dispatch = getvar_version_baseband + }, { + .variable = "product", + .dispatch = getvar_product + }, { + .variable = "current-slot", + .dispatch = getvar_current_slot + }, { + .variable = "slot-suffixes", + .dispatch = getvar_slot_suffixes + }, { + .variable = "has_slot", + .dispatch = getvar_has_slot +#if CONFIG_IS_ENABLED(FASTBOOT_FLASH_MMC) + }, { + .variable = "partition-type", + .dispatch = getvar_partition_type +#endif +#if CONFIG_IS_ENABLED(FASTBOOT_FLASH) + }, { + .variable = "partition-size", + .dispatch = getvar_partition_size +#endif + } +}; + +static void getvar_version(char *var_parameter, char *response) +{ + fastboot_okay(FASTBOOT_VERSION, response); +} + +static void getvar_bootloader_version(char *var_parameter, char *response) +{ + fastboot_okay(U_BOOT_VERSION, response); +} + +static void getvar_downloadsize(char *var_parameter, char *response) +{ + fastboot_response("OKAY", response, "0x%08x", fastboot_buf_size); +} + +static void getvar_serialno(char *var_parameter, char *response) +{ + const char *tmp = env_get("serial#"); + + if (tmp) + fastboot_okay(tmp, response); + else + fastboot_fail("Value not set", response); +} + +static void getvar_version_baseband(char *var_parameter, char *response) +{ + fastboot_okay("N/A", response); +} + +static void getvar_product(char *var_parameter, char *response) +{ + const char *board = env_get("board"); + + if (board) + fastboot_okay(board, response); + else + fastboot_fail("Board not set", response); +} + +static void getvar_current_slot(char *var_parameter, char *response) +{ + /* A/B not implemented, for now always return _a */ + fastboot_okay("_a", response); +} + +static void getvar_slot_suffixes(char *var_parameter, char *response) +{ + fastboot_okay("_a,_b", response); +} + +static void getvar_has_slot(char *part_name, char *response) +{ + if (part_name && (!strcmp(part_name, "boot") || + !strcmp(part_name, "system"))) + fastboot_okay("yes", response); + else + fastboot_okay("no", response); +} + +#if CONFIG_IS_ENABLED(FASTBOOT_FLASH_MMC) +static void getvar_partition_type(char *part_name, char *response) +{ + int r; + struct blk_desc *dev_desc; + disk_partition_t part_info; + + r = fastboot_mmc_get_part_info(part_name, &dev_desc, &part_info, + response); + if (r >= 0) { + r = fs_set_blk_dev_with_part(dev_desc, r); + if (r < 0) + fastboot_fail("failed to set partition", response); + else + fastboot_okay(fs_get_type_name(), response); + } +} +#endif + +#if CONFIG_IS_ENABLED(FASTBOOT_FLASH) +static void getvar_partition_size(char *part_name, char *response) +{ + int r; + size_t size; + +#if CONFIG_IS_ENABLED(FASTBOOT_FLASH_MMC) + struct blk_desc *dev_desc; + disk_partition_t part_info; + + r = fastboot_mmc_get_part_info(part_name, &dev_desc, &part_info, + response); + if (r >= 0) + size = part_info.size; +#endif +#if CONFIG_IS_ENABLED(FASTBOOT_FLASH_NAND) + struct part_info *part_info; + + r = fastboot_nand_get_part_info(part_name, &part_info, response); + if (r >= 0) + size = part_info->size; +#endif + if (r >= 0) + fastboot_response("OKAY", response, "0x%016zx", size); +} +#endif + +/** + * fastboot_getvar() - Writes variable indicated by cmd_parameter to response. + * + * @cmd_parameter: Pointer to command parameter + * @response: Pointer to fastboot response buffer + * + * Look up cmd_parameter first as an environment variable of the form + * fastboot.<cmd_parameter>, if that exists return use its value to set + * response. + * + * Otherwise lookup the name of variable and execute the appropriate + * function to return the requested value. + */ +void fastboot_getvar(char *cmd_parameter, char *response) +{ + if (!cmd_parameter) { + fastboot_fail("missing var", response); + } else { +#define FASTBOOT_ENV_PREFIX "fastboot." + int i; + char *var_parameter = cmd_parameter; + char envstr[FASTBOOT_RESPONSE_LEN]; + const char *s; + + snprintf(envstr, sizeof(envstr) - 1, + FASTBOOT_ENV_PREFIX "%s", cmd_parameter); + s = env_get(envstr); + if (s) { + fastboot_response("OKAY", response, "%s", s); + return; + } + + strsep(&var_parameter, ":"); + for (i = 0; i < ARRAY_SIZE(getvar_dispatch); ++i) { + if (!strcmp(getvar_dispatch[i].variable, + cmd_parameter)) { + getvar_dispatch[i].dispatch(var_parameter, + response); + return; + } + } + pr_warn("WARNING: unknown variable: %s\n", cmd_parameter); + fastboot_fail("Variable not implemented", response); + } +} diff --git a/common/fb_mmc.c b/drivers/fastboot/fb_mmc.c index 46f0073dbc2..4c1c7fd2cd8 100644 --- a/common/fb_mmc.c +++ b/drivers/fastboot/fb_mmc.c @@ -7,6 +7,7 @@ #include <common.h> #include <blk.h> #include <fastboot.h> +#include <fastboot-internal.h> #include <fb_mmc.h> #include <image-sparse.h> #include <part.h> @@ -15,18 +16,7 @@ #include <linux/compat.h> #include <android_image.h> -/* - * FIXME: Ensure we always set these names via Kconfig once xxx_PARTITION is - * migrated - */ -#ifndef CONFIG_FASTBOOT_GPT_NAME -#define CONFIG_FASTBOOT_GPT_NAME "gpt" -#endif - - -#ifndef CONFIG_FASTBOOT_MBR_NAME -#define CONFIG_FASTBOOT_MBR_NAME "mbr" -#endif +#define FASTBOOT_MAX_BLK_WRITE 16384 #define BOOT_PARTITION_NAME "boot" @@ -56,13 +46,48 @@ static int part_get_info_by_name_or_alias(struct blk_desc *dev_desc, return ret; } +/** + * fb_mmc_blk_write() - Write/erase MMC in chunks of FASTBOOT_MAX_BLK_WRITE + * + * @block_dev: Pointer to block device + * @start: First block to write/erase + * @blkcnt: Count of blocks + * @buffer: Pointer to data buffer for write or NULL for erase + */ +static lbaint_t fb_mmc_blk_write(struct blk_desc *block_dev, lbaint_t start, + lbaint_t blkcnt, const void *buffer) +{ + lbaint_t blk = start; + lbaint_t blks_written; + lbaint_t cur_blkcnt; + lbaint_t blks = 0; + int i; + + for (i = 0; i < blkcnt; i += FASTBOOT_MAX_BLK_WRITE) { + cur_blkcnt = min((int)blkcnt - i, FASTBOOT_MAX_BLK_WRITE); + if (buffer) { + if (fastboot_progress_callback) + fastboot_progress_callback("writing"); + blks_written = blk_dwrite(block_dev, blk, cur_blkcnt, + buffer + (i * block_dev->blksz)); + } else { + if (fastboot_progress_callback) + fastboot_progress_callback("erasing"); + blks_written = blk_derase(block_dev, blk, cur_blkcnt); + } + blk += blks_written; + blks += blks_written; + } + return blks; +} + static lbaint_t fb_mmc_sparse_write(struct sparse_storage *info, lbaint_t blk, lbaint_t blkcnt, const void *buffer) { struct fb_mmc_sparse *sparse = info->priv; struct blk_desc *dev_desc = sparse->dev_desc; - return blk_dwrite(dev_desc, blk, blkcnt, buffer); + return fb_mmc_blk_write(dev_desc, blk, blkcnt, buffer); } static lbaint_t fb_mmc_sparse_reserve(struct sparse_storage *info, @@ -73,7 +98,7 @@ static lbaint_t fb_mmc_sparse_reserve(struct sparse_storage *info, static void write_raw_image(struct blk_desc *dev_desc, disk_partition_t *info, const char *part_name, void *buffer, - unsigned int download_bytes) + u32 download_bytes, char *response) { lbaint_t blkcnt; lbaint_t blks; @@ -84,22 +109,23 @@ static void write_raw_image(struct blk_desc *dev_desc, disk_partition_t *info, if (blkcnt > info->size) { pr_err("too large for partition: '%s'\n", part_name); - fastboot_fail("too large for partition"); + fastboot_fail("too large for partition", response); return; } puts("Flashing Raw Image\n"); - blks = blk_dwrite(dev_desc, info->start, blkcnt, buffer); + blks = fb_mmc_blk_write(dev_desc, info->start, blkcnt, buffer); + if (blks != blkcnt) { pr_err("failed writing to device %d\n", dev_desc->devnum); - fastboot_fail("failed writing to device"); + fastboot_fail("failed writing to device", response); return; } printf("........ wrote " LBAFU " bytes to '%s'\n", blkcnt * info->blksz, part_name); - fastboot_okay(""); + fastboot_okay(NULL, response); } #ifdef CONFIG_ANDROID_BOOT_IMAGE @@ -114,7 +140,8 @@ static void write_raw_image(struct blk_desc *dev_desc, disk_partition_t *info, */ static lbaint_t fb_mmc_get_boot_header(struct blk_desc *dev_desc, disk_partition_t *info, - struct andr_img_hdr *hdr) + struct andr_img_hdr *hdr, + char *response) { ulong sector_size; /* boot partition sector size */ lbaint_t hdr_sectors; /* boot image header sectors count */ @@ -124,24 +151,25 @@ static lbaint_t fb_mmc_get_boot_header(struct blk_desc *dev_desc, sector_size = info->blksz; hdr_sectors = DIV_ROUND_UP(sizeof(struct andr_img_hdr), sector_size); if (hdr_sectors == 0) { - pr_err("invalid number of boot sectors: 0"); - fastboot_fail("invalid number of boot sectors: 0"); + pr_err("invalid number of boot sectors: 0\n"); + fastboot_fail("invalid number of boot sectors: 0", response); return 0; } /* Read the boot image header */ res = blk_dread(dev_desc, info->start, hdr_sectors, (void *)hdr); if (res != hdr_sectors) { - pr_err("cannot read header from boot partition"); - fastboot_fail("cannot read header from boot partition"); + pr_err("cannot read header from boot partition\n"); + fastboot_fail("cannot read header from boot partition", + response); return 0; } /* Check boot header magic string */ res = android_image_check_header(hdr); if (res != 0) { - pr_err("bad boot image magic"); - fastboot_fail("boot partition not initialized"); + pr_err("bad boot image magic\n"); + fastboot_fail("boot partition not initialized", response); return 0; } @@ -159,7 +187,8 @@ static lbaint_t fb_mmc_get_boot_header(struct blk_desc *dev_desc, */ static int fb_mmc_update_zimage(struct blk_desc *dev_desc, void *download_buffer, - unsigned int download_bytes) + u32 download_bytes, + char *response) { uintptr_t hdr_addr; /* boot image header address */ struct andr_img_hdr *hdr; /* boot image header */ @@ -178,8 +207,8 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc, /* Get boot partition info */ res = part_get_info_by_name(dev_desc, BOOT_PARTITION_NAME, &info); if (res < 0) { - pr_err("cannot find boot partition"); - fastboot_fail("cannot find boot partition"); + pr_err("cannot find boot partition\n"); + fastboot_fail("cannot find boot partition", response); return -1; } @@ -188,17 +217,18 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc, hdr = (struct andr_img_hdr *)hdr_addr; /* Read boot image header */ - hdr_sectors = fb_mmc_get_boot_header(dev_desc, &info, hdr); + hdr_sectors = fb_mmc_get_boot_header(dev_desc, &info, hdr, response); if (hdr_sectors == 0) { - pr_err("unable to read boot image header"); - fastboot_fail("unable to read boot image header"); + pr_err("unable to read boot image header\n"); + fastboot_fail("unable to read boot image header", response); return -1; } /* Check if boot image has second stage in it (we don't support it) */ if (hdr->second_size > 0) { - pr_err("moving second stage is not supported yet"); - fastboot_fail("moving second stage is not supported yet"); + pr_err("moving second stage is not supported yet\n"); + fastboot_fail("moving second stage is not supported yet", + response); return -1; } @@ -215,8 +245,9 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc, res = blk_dread(dev_desc, ramdisk_sector_start, ramdisk_sectors, ramdisk_buffer); if (res != ramdisk_sectors) { - pr_err("cannot read ramdisk from boot partition"); - fastboot_fail("cannot read ramdisk from boot partition"); + pr_err("cannot read ramdisk from boot partition\n"); + fastboot_fail("cannot read ramdisk from boot partition", + response); return -1; } @@ -224,8 +255,8 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc, hdr->kernel_size = download_bytes; res = blk_dwrite(dev_desc, info.start, hdr_sectors, (void *)hdr); if (res == 0) { - pr_err("cannot writeback boot image header"); - fastboot_fail("cannot write back boot image header"); + pr_err("cannot writeback boot image header\n"); + fastboot_fail("cannot write back boot image header", response); return -1; } @@ -236,8 +267,8 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc, res = blk_dwrite(dev_desc, kernel_sector_start, kernel_sectors, download_buffer); if (res == 0) { - pr_err("cannot write new kernel"); - fastboot_fail("cannot write new kernel"); + pr_err("cannot write new kernel\n"); + fastboot_fail("cannot write new kernel", response); return -1; } @@ -248,19 +279,59 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc, res = blk_dwrite(dev_desc, ramdisk_sector_start, ramdisk_sectors, ramdisk_buffer); if (res == 0) { - pr_err("cannot write back original ramdisk"); - fastboot_fail("cannot write back original ramdisk"); + pr_err("cannot write back original ramdisk\n"); + fastboot_fail("cannot write back original ramdisk", response); return -1; } puts("........ zImage was updated in boot partition\n"); - fastboot_okay(""); + fastboot_okay(NULL, response); return 0; } #endif -void fb_mmc_flash_write(const char *cmd, void *download_buffer, - unsigned int download_bytes) +/** + * fastboot_mmc_get_part_info() - Lookup eMMC partion by name + * + * @part_name: Named partition to lookup + * @dev_desc: Pointer to returned blk_desc pointer + * @part_info: Pointer to returned disk_partition_t + * @response: Pointer to fastboot response buffer + */ +int fastboot_mmc_get_part_info(char *part_name, struct blk_desc **dev_desc, + disk_partition_t *part_info, char *response) +{ + int r; + + *dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV); + if (!*dev_desc) { + fastboot_fail("block device not found", response); + return -ENOENT; + } + if (!part_name) { + fastboot_fail("partition not found", response); + return -ENOENT; + } + + r = part_get_info_by_name_or_alias(*dev_desc, part_name, part_info); + if (r < 0) { + fastboot_fail("partition not found", response); + return r; + } + + return r; +} + +/** + * fastboot_mmc_flash_write() - Write image to eMMC for fastboot + * + * @cmd: Named partition to write image to + * @download_buffer: Pointer to image data + * @download_bytes: Size of image data + * @response: Pointer to fastboot response buffer + */ +void fastboot_mmc_flash_write(const char *cmd, void *download_buffer, + u32 download_bytes, char *response) { struct blk_desc *dev_desc; disk_partition_t info; @@ -268,7 +339,7 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer, dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV); if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) { pr_err("invalid mmc device\n"); - fastboot_fail("invalid mmc device"); + fastboot_fail("invalid mmc device", response); return; } @@ -279,16 +350,17 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer, if (is_valid_gpt_buf(dev_desc, download_buffer)) { printf("%s: invalid GPT - refusing to write to flash\n", __func__); - fastboot_fail("invalid GPT partition"); + fastboot_fail("invalid GPT partition", response); return; } if (write_mbr_and_gpt_partitions(dev_desc, download_buffer)) { printf("%s: writing GPT partitions failed\n", __func__); - fastboot_fail("writing GPT partitions failed"); + fastboot_fail("writing GPT partitions failed", + response); return; } printf("........ success\n"); - fastboot_okay(""); + fastboot_okay(NULL, response); return; } #endif @@ -299,30 +371,32 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer, if (is_valid_dos_buf(download_buffer)) { printf("%s: invalid MBR - refusing to write to flash\n", __func__); - fastboot_fail("invalid MBR partition"); + fastboot_fail("invalid MBR partition", response); return; } if (write_mbr_partition(dev_desc, download_buffer)) { printf("%s: writing MBR partition failed\n", __func__); - fastboot_fail("writing MBR partition failed"); + fastboot_fail("writing MBR partition failed", + response); return; } printf("........ success\n"); - fastboot_okay(""); + fastboot_okay(NULL, response); return; } #endif #ifdef CONFIG_ANDROID_BOOT_IMAGE if (strncasecmp(cmd, "zimage", 6) == 0) { - fb_mmc_update_zimage(dev_desc, download_buffer, download_bytes); + fb_mmc_update_zimage(dev_desc, download_buffer, + download_bytes, response); return; } #endif if (part_get_info_by_name_or_alias(dev_desc, cmd, &info) < 0) { pr_err("cannot find partition: '%s'\n", cmd); - fastboot_fail("cannot find partition"); + fastboot_fail("cannot find partition", response); return; } @@ -344,16 +418,23 @@ void fb_mmc_flash_write(const char *cmd, void *download_buffer, sparse.start); sparse.priv = &sparse_priv; - err = write_sparse_image(&sparse, cmd, download_buffer); + err = write_sparse_image(&sparse, cmd, download_buffer, + response); if (!err) - fastboot_okay(""); + fastboot_okay(NULL, response); } else { write_raw_image(dev_desc, &info, cmd, download_buffer, - download_bytes); + download_bytes, response); } } -void fb_mmc_erase(const char *cmd) +/** + * fastboot_mmc_flash_erase() - Erase eMMC for fastboot + * + * @cmd: Named partition to erase + * @response: Pointer to fastboot response buffer + */ +void fastboot_mmc_erase(const char *cmd, char *response) { int ret; struct blk_desc *dev_desc; @@ -362,22 +443,22 @@ void fb_mmc_erase(const char *cmd) struct mmc *mmc = find_mmc_device(CONFIG_FASTBOOT_FLASH_MMC_DEV); if (mmc == NULL) { - pr_err("invalid mmc device"); - fastboot_fail("invalid mmc device"); + pr_err("invalid mmc device\n"); + fastboot_fail("invalid mmc device", response); return; } dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV); if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) { - pr_err("invalid mmc device"); - fastboot_fail("invalid mmc device"); + pr_err("invalid mmc device\n"); + fastboot_fail("invalid mmc device", response); return; } ret = part_get_info_by_name_or_alias(dev_desc, cmd, &info); if (ret < 0) { - pr_err("cannot find partition: '%s'", cmd); - fastboot_fail("cannot find partition"); + pr_err("cannot find partition: '%s'\n", cmd); + fastboot_fail("cannot find partition", response); return; } @@ -393,14 +474,15 @@ void fb_mmc_erase(const char *cmd) printf("Erasing blocks " LBAFU " to " LBAFU " due to alignment\n", blks_start, blks_start + blks_size); - blks = blk_derase(dev_desc, blks_start, blks_size); + blks = fb_mmc_blk_write(dev_desc, blks_start, blks_size, NULL); + if (blks != blks_size) { - pr_err("failed erasing from device %d", dev_desc->devnum); - fastboot_fail("failed erasing from device"); + pr_err("failed erasing from device %d\n", dev_desc->devnum); + fastboot_fail("failed erasing from device", response); return; } printf("........ erased " LBAFU " bytes from '%s'\n", blks_size * info.blksz, cmd); - fastboot_okay(""); + fastboot_okay(NULL, response); } diff --git a/common/fb_nand.c b/drivers/fastboot/fb_nand.c index c07655e49ed..526bc12307f 100644 --- a/common/fb_nand.c +++ b/drivers/fastboot/fb_nand.c @@ -31,7 +31,8 @@ __weak int board_fastboot_write_partition_setup(char *name) static int fb_nand_lookup(const char *partname, struct mtd_info **mtd, - struct part_info **part) + struct part_info **part, + char *response) { struct mtd_device *dev; int ret; @@ -40,21 +41,21 @@ static int fb_nand_lookup(const char *partname, ret = mtdparts_init(); if (ret) { pr_err("Cannot initialize MTD partitions\n"); - fastboot_fail("cannot init mtdparts"); + fastboot_fail("cannot init mtdparts", response); return ret; } ret = find_dev_and_part(partname, &dev, &pnum, part); if (ret) { pr_err("cannot find partition: '%s'", partname); - fastboot_fail("cannot find partition"); + fastboot_fail("cannot find partition", response); return ret; } if (dev->id->type != MTD_DEV_TYPE_NAND) { pr_err("partition '%s' is not stored on a NAND device", partname); - fastboot_fail("not a NAND device"); + fastboot_fail("not a NAND device", response); return -EINVAL; } @@ -87,8 +88,8 @@ static int _fb_nand_erase(struct mtd_info *mtd, struct part_info *part) } static int _fb_nand_write(struct mtd_info *mtd, struct part_info *part, - void *buffer, unsigned int offset, - unsigned int length, size_t *written) + void *buffer, u32 offset, + size_t length, size_t *written) { int flags = WITH_WR_VERIFY; @@ -144,17 +145,40 @@ static lbaint_t fb_nand_sparse_reserve(struct sparse_storage *info, return blkcnt + bad_blocks; } -void fb_nand_flash_write(const char *cmd, void *download_buffer, - unsigned int download_bytes) +/** + * fastboot_nand_get_part_info() - Lookup NAND partion by name + * + * @part_name: Named device to lookup + * @part_info: Pointer to returned part_info pointer + * @response: Pointer to fastboot response buffer + */ +int fastboot_nand_get_part_info(char *part_name, struct part_info **part_info, + char *response) +{ + struct mtd_info *mtd = NULL; + + return fb_nand_lookup(part_name, &mtd, part_info, response); +} + +/** + * fastboot_nand_flash_write() - Write image to NAND for fastboot + * + * @cmd: Named device to write image to + * @download_buffer: Pointer to image data + * @download_bytes: Size of image data + * @response: Pointer to fastboot response buffer + */ +void fastboot_nand_flash_write(const char *cmd, void *download_buffer, + u32 download_bytes, char *response) { struct part_info *part; struct mtd_info *mtd = NULL; int ret; - ret = fb_nand_lookup(cmd, &mtd, &part); + ret = fb_nand_lookup(cmd, &mtd, &part, response); if (ret) { pr_err("invalid NAND device"); - fastboot_fail("invalid NAND device"); + fastboot_fail("invalid NAND device", response); return; } @@ -180,9 +204,10 @@ void fb_nand_flash_write(const char *cmd, void *download_buffer, sparse.start); sparse.priv = &sparse_priv; - ret = write_sparse_image(&sparse, cmd, download_buffer); + ret = write_sparse_image(&sparse, cmd, download_buffer, + response); if (!ret) - fastboot_okay(""); + fastboot_okay(NULL, response); } else { printf("Flashing raw image at offset 0x%llx\n", part->offset); @@ -195,23 +220,29 @@ void fb_nand_flash_write(const char *cmd, void *download_buffer, } if (ret) { - fastboot_fail("error writing the image"); + fastboot_fail("error writing the image", response); return; } - fastboot_okay(""); + fastboot_okay(NULL, response); } -void fb_nand_erase(const char *cmd) +/** + * fastboot_nand_flash_erase() - Erase NAND for fastboot + * + * @cmd: Named device to erase + * @response: Pointer to fastboot response buffer + */ +void fastboot_nand_erase(const char *cmd, char *response) { struct part_info *part; struct mtd_info *mtd = NULL; int ret; - ret = fb_nand_lookup(cmd, &mtd, &part); + ret = fb_nand_lookup(cmd, &mtd, &part, response); if (ret) { pr_err("invalid NAND device"); - fastboot_fail("invalid NAND device"); + fastboot_fail("invalid NAND device", response); return; } @@ -222,9 +253,9 @@ void fb_nand_erase(const char *cmd) ret = _fb_nand_erase(mtd, part); if (ret) { pr_err("failed erasing from device %s", mtd->name); - fastboot_fail("failed erasing from device"); + fastboot_fail("failed erasing from device", response); return; } - fastboot_okay(""); + fastboot_okay(NULL, response); } diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c index 55bdf9e7cf2..7e8bd7eae88 100644 --- a/drivers/fpga/fpga.c +++ b/drivers/fpga/fpga.c @@ -217,6 +217,35 @@ int fpga_fsload(int devnum, const void *buf, size_t size, } #endif +#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) +int fpga_loads(int devnum, const void *buf, size_t size, + struct fpga_secure_info *fpga_sec_info) +{ + int ret_val = FPGA_FAIL; + + const fpga_desc *desc = fpga_validate(devnum, buf, size, + (char *)__func__); + + if (desc) { + switch (desc->devtype) { + case fpga_xilinx: +#if defined(CONFIG_FPGA_XILINX) + ret_val = xilinx_loads(desc->devdesc, buf, size, + fpga_sec_info); +#else + fpga_no_sup((char *)__func__, "Xilinx devices"); +#endif + break; + default: + printf("%s: Invalid or unsupported device type %d\n", + __func__, desc->devtype); + } + } + + return ret_val; +} +#endif + /* * Generic multiplexing code */ diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c index 724304a5451..f5135504eeb 100644 --- a/drivers/fpga/xilinx.c +++ b/drivers/fpga/xilinx.c @@ -171,6 +171,24 @@ int xilinx_loadfs(xilinx_desc *desc, const void *buf, size_t bsize, } #endif +#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) +int xilinx_loads(xilinx_desc *desc, const void *buf, size_t bsize, + struct fpga_secure_info *fpga_sec_info) +{ + if (!xilinx_validate(desc, (char *)__func__)) { + printf("%s: Invalid device descriptor\n", __func__); + return FPGA_FAIL; + } + + if (!desc->operations || !desc->operations->loads) { + printf("%s: Missing loads operation\n", __func__); + return FPGA_FAIL; + } + + return desc->operations->loads(desc, buf, bsize, fpga_sec_info); +} +#endif + int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize) { if (!xilinx_validate (desc, (char *)__FUNCTION__)) { diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c index b57623b6a75..03ffa8c11f2 100644 --- a/drivers/fpga/zynqmppl.c +++ b/drivers/fpga/zynqmppl.c @@ -223,6 +223,51 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize, return ret; } +#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) && !defined(CONFIG_SPL_BUILD) +static int zynqmp_loads(xilinx_desc *desc, const void *buf, size_t bsize, + struct fpga_secure_info *fpga_sec_info) +{ + int ret; + u32 buf_lo, buf_hi; + u32 ret_payload[PAYLOAD_ARG_CNT]; + u8 flag = 0; + + flush_dcache_range((ulong)buf, (ulong)buf + + ALIGN(bsize, CONFIG_SYS_CACHELINE_SIZE)); + + if (!fpga_sec_info->encflag) + flag |= BIT(ZYNQMP_FPGA_BIT_ENC_DEV_KEY); + + if (fpga_sec_info->userkey_addr && + fpga_sec_info->encflag == FPGA_ENC_USR_KEY) { + flush_dcache_range((ulong)fpga_sec_info->userkey_addr, + (ulong)fpga_sec_info->userkey_addr + + ALIGN(KEY_PTR_LEN, + CONFIG_SYS_CACHELINE_SIZE)); + flag |= BIT(ZYNQMP_FPGA_BIT_ENC_USR_KEY); + } + + if (!fpga_sec_info->authflag) + flag |= BIT(ZYNQMP_FPGA_BIT_AUTH_OCM); + + if (fpga_sec_info->authflag == ZYNQMP_FPGA_AUTH_DDR) + flag |= BIT(ZYNQMP_FPGA_BIT_AUTH_DDR); + + buf_lo = lower_32_bits((ulong)buf); + buf_hi = upper_32_bits((ulong)buf); + + ret = invoke_smc(ZYNQMP_SIP_SVC_PM_FPGA_LOAD, buf_lo, buf_hi, + (u32)(uintptr_t)fpga_sec_info->userkey_addr, + flag, ret_payload); + if (ret) + puts("PL FPGA LOAD fail\n"); + else + puts("Bitstream successfully loaded\n"); + + return ret; +} +#endif + static int zynqmp_pcap_info(xilinx_desc *desc) { int ret; @@ -238,5 +283,8 @@ static int zynqmp_pcap_info(xilinx_desc *desc) struct xilinx_fpga_op zynqmp_op = { .load = zynqmp_load, +#if defined CONFIG_CMD_FPGA_LOAD_SECURE + .loads = zynqmp_loads, +#endif .info = zynqmp_pcap_info, }; diff --git a/drivers/gpio/bcm6345_gpio.c b/drivers/gpio/bcm6345_gpio.c index 1a507fce8e7..d1f6cfa8405 100644 --- a/drivers/gpio/bcm6345_gpio.c +++ b/drivers/gpio/bcm6345_gpio.c @@ -13,8 +13,6 @@ #include <asm/gpio.h> #include <asm/io.h> -DECLARE_GLOBAL_DATA_PTR; - struct bcm6345_gpio_priv { void __iomem *reg_dirout; void __iomem *reg_data; @@ -90,22 +88,16 @@ static int bcm6345_gpio_probe(struct udevice *dev) { struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); struct bcm6345_gpio_priv *priv = dev_get_priv(dev); - fdt_addr_t data_addr, dirout_addr; - fdt_size_t data_size, dirout_size; - dirout_addr = devfdt_get_addr_size_index(dev, 0, &dirout_size); - if (dirout_addr == FDT_ADDR_T_NONE) + priv->reg_dirout = dev_remap_addr_index(dev, 0); + if (!priv->reg_dirout) return -EINVAL; - data_addr = devfdt_get_addr_size_index(dev, 1, &data_size); - if (data_addr == FDT_ADDR_T_NONE) + priv->reg_data = dev_remap_addr_index(dev, 1); + if (!priv->reg_data) return -EINVAL; - priv->reg_data = ioremap(data_addr, data_size); - priv->reg_dirout = ioremap(dirout_addr, dirout_size); - - uc_priv->gpio_count = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), - "ngpios", 32); + uc_priv->gpio_count = dev_read_u32_default(dev, "ngpios", 32); uc_priv->bank_name = dev->name; return 0; diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c index b46621f76b9..6fd12706405 100644 --- a/drivers/gpio/gpio-rcar.c +++ b/drivers/gpio/gpio-rcar.c @@ -175,6 +175,7 @@ static const struct udevice_id rcar_gpio_ids[] = { { .compatible = "renesas,gpio-r8a7796" }, { .compatible = "renesas,gpio-r8a77965" }, { .compatible = "renesas,gpio-r8a77970" }, + { .compatible = "renesas,gpio-r8a77990" }, { .compatible = "renesas,gpio-r8a77995" }, { .compatible = "renesas,rcar-gen2-gpio" }, { .compatible = "renesas,rcar-gen3-gpio" }, diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 7fb201d8e62..5eceab9ea81 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -339,6 +339,12 @@ config SYS_OMAP24_I2C_SPEED OMAP24xx Slave speed channel 0 endif +config SYS_I2C_RCAR_I2C + bool "Renesas RCar I2C driver" + depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C + help + Support for Renesas RCar I2C controller. + config SYS_I2C_RCAR_IIC bool "Renesas RCar Gen3 IIC driver" depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile index e8bb6327fb1..da368cc02a0 100644 --- a/drivers/i2c/Makefile +++ b/drivers/i2c/Makefile @@ -9,8 +9,6 @@ obj-$(CONFIG_$(SPL_)I2C_CROS_EC_TUNNEL) += cros_ec_tunnel.o obj-$(CONFIG_$(SPL_)I2C_CROS_EC_LDO) += cros_ec_ldo.o obj-$(CONFIG_I2C_MV) += mv_i2c.o -obj-$(CONFIG_TSI108_I2C) += tsi108_i2c.o -obj-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o obj-$(CONFIG_SYS_I2C) += i2c_core.o obj-$(CONFIG_SYS_I2C_ASPEED) += ast_i2c.o obj-$(CONFIG_SYS_I2C_AT91) += at91_i2c.o @@ -28,7 +26,7 @@ obj-$(CONFIG_SYS_I2C_MVTWSI) += mvtwsi.o obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o obj-$(CONFIG_SYS_I2C_MXS) += mxs_i2c.o obj-$(CONFIG_SYS_I2C_OMAP24XX) += omap24xx_i2c.o -obj-$(CONFIG_SYS_I2C_RCAR) += rcar_i2c.o +obj-$(CONFIG_SYS_I2C_RCAR_I2C) += rcar_i2c.o obj-$(CONFIG_SYS_I2C_RCAR_IIC) += rcar_iic.o obj-$(CONFIG_SYS_I2C_ROCKCHIP) += rk_i2c.o obj-$(CONFIG_SYS_I2C_S3C24X0) += s3c24x0_i2c.o exynos_hs_i2c.o diff --git a/drivers/i2c/rcar_i2c.c b/drivers/i2c/rcar_i2c.c index a2627dca5fa..8d87c737136 100644 --- a/drivers/i2c/rcar_i2c.c +++ b/drivers/i2c/rcar_i2c.c @@ -1,292 +1,353 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0+ /* * drivers/i2c/rcar_i2c.c * - * Copyright (C) 2013 Renesas Electronics Corporation - * Copyright (C) 2013 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> + * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com> * - * NOTE: This driver should be converted to driver model before June 2017. - * Please see doc/driver-model/i2c-howto.txt for instructions. + * Clock configuration based on Linux i2c-rcar.c: + * Copyright (C) 2014-15 Wolfram Sang <wsa@sang-engineering.com> + * Copyright (C) 2011-2015 Renesas Electronics Corporation + * Copyright (C) 2012-14 Renesas Solutions Corp. + * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> */ #include <common.h> +#include <clk.h> +#include <dm.h> #include <i2c.h> #include <asm/io.h> - -DECLARE_GLOBAL_DATA_PTR; - -struct rcar_i2c { - u32 icscr; - u32 icmcr; - u32 icssr; - u32 icmsr; - u32 icsier; - u32 icmier; - u32 icccr; - u32 icsar; - u32 icmar; - u32 icrxdtxd; - u32 icccr2; - u32 icmpr; - u32 ichpr; - u32 iclpr; -}; - -#define MCR_MDBS 0x80 /* non-fifo mode switch */ -#define MCR_FSCL 0x40 /* override SCL pin */ -#define MCR_FSDA 0x20 /* override SDA pin */ -#define MCR_OBPC 0x10 /* override pins */ -#define MCR_MIE 0x08 /* master if enable */ -#define MCR_TSBE 0x04 -#define MCR_FSB 0x02 /* force stop bit */ -#define MCR_ESG 0x01 /* en startbit gen. */ - -#define MSR_MASK 0x7f -#define MSR_MNR 0x40 /* nack received */ -#define MSR_MAL 0x20 /* arbitration lost */ -#define MSR_MST 0x10 /* sent a stop */ -#define MSR_MDE 0x08 -#define MSR_MDT 0x04 -#define MSR_MDR 0x02 -#define MSR_MAT 0x01 /* slave addr xfer done */ - -static const struct rcar_i2c *i2c_dev[CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS] = { - (struct rcar_i2c *)CONFIG_SYS_RCAR_I2C0_BASE, - (struct rcar_i2c *)CONFIG_SYS_RCAR_I2C1_BASE, - (struct rcar_i2c *)CONFIG_SYS_RCAR_I2C2_BASE, - (struct rcar_i2c *)CONFIG_SYS_RCAR_I2C3_BASE, +#include <wait_bit.h> + +#define RCAR_I2C_ICSCR 0x00 +#define RCAR_I2C_ICMCR 0x04 +#define RCAR_I2C_ICMCR_MDBS BIT(7) +#define RCAR_I2C_ICMCR_FSCL BIT(6) +#define RCAR_I2C_ICMCR_FSDA BIT(5) +#define RCAR_I2C_ICMCR_OBPC BIT(4) +#define RCAR_I2C_ICMCR_MIE BIT(3) +#define RCAR_I2C_ICMCR_TSBE BIT(2) +#define RCAR_I2C_ICMCR_FSB BIT(1) +#define RCAR_I2C_ICMCR_ESG BIT(0) +#define RCAR_I2C_ICSSR 0x08 +#define RCAR_I2C_ICMSR 0x0c +#define RCAR_I2C_ICMSR_MASK 0x7f +#define RCAR_I2C_ICMSR_MNR BIT(6) +#define RCAR_I2C_ICMSR_MAL BIT(5) +#define RCAR_I2C_ICMSR_MST BIT(4) +#define RCAR_I2C_ICMSR_MDE BIT(3) +#define RCAR_I2C_ICMSR_MDT BIT(2) +#define RCAR_I2C_ICMSR_MDR BIT(1) +#define RCAR_I2C_ICMSR_MAT BIT(0) +#define RCAR_I2C_ICSIER 0x10 +#define RCAR_I2C_ICMIER 0x14 +#define RCAR_I2C_ICCCR 0x18 +#define RCAR_I2C_ICCCR_SCGD_OFF 3 +#define RCAR_I2C_ICSAR 0x1c +#define RCAR_I2C_ICMAR 0x20 +#define RCAR_I2C_ICRXD_ICTXD 0x24 + +struct rcar_i2c_priv { + void __iomem *base; + struct clk clk; + u32 intdelay; + u32 icccr; }; -static void rcar_i2c_raw_rw_common(struct rcar_i2c *dev, u8 chip, uint addr) +static int rcar_i2c_finish(struct udevice *dev) { - /* set slave address */ - writel(chip << 1, &dev->icmar); - /* set register address */ - writel(addr, &dev->icrxdtxd); - /* clear status */ - writel(0, &dev->icmsr); - /* start master send */ - writel(MCR_MDBS | MCR_MIE | MCR_ESG, &dev->icmcr); - - while ((readl(&dev->icmsr) & (MSR_MAT | MSR_MDE)) - != (MSR_MAT | MSR_MDE)) - udelay(10); - - /* clear ESG */ - writel(MCR_MDBS | MCR_MIE, &dev->icmcr); - /* start SCLclk */ - writel(~(MSR_MAT | MSR_MDE), &dev->icmsr); - - while (!(readl(&dev->icmsr) & MSR_MDE)) - udelay(10); + struct rcar_i2c_priv *priv = dev_get_priv(dev); + int ret; + + ret = wait_for_bit_le32(priv->base + RCAR_I2C_ICMSR, RCAR_I2C_ICMSR_MST, + true, 10, true); + + writel(0, priv->base + RCAR_I2C_ICSSR); + writel(0, priv->base + RCAR_I2C_ICMSR); + writel(0, priv->base + RCAR_I2C_ICMCR); + + return ret; } -static void rcar_i2c_raw_rw_finish(struct rcar_i2c *dev) +static void rcar_i2c_recover(struct udevice *dev) { - while (!(readl(&dev->icmsr) & MSR_MST)) - udelay(10); + struct rcar_i2c_priv *priv = dev_get_priv(dev); + u32 mcr = RCAR_I2C_ICMCR_MDBS | RCAR_I2C_ICMCR_OBPC; + u32 mcra = mcr | RCAR_I2C_ICMCR_FSDA; + int i; - writel(0, &dev->icmcr); + /* Send 9 SCL pulses */ + for (i = 0; i < 9; i++) { + writel(mcra | RCAR_I2C_ICMCR_FSCL, priv->base + RCAR_I2C_ICMCR); + udelay(5); + writel(mcra, priv->base + RCAR_I2C_ICMCR); + udelay(5); + } + + /* Send stop condition */ + udelay(5); + writel(mcra, priv->base + RCAR_I2C_ICMCR); + udelay(5); + writel(mcr, priv->base + RCAR_I2C_ICMCR); + udelay(5); + writel(mcr | RCAR_I2C_ICMCR_FSCL, priv->base + RCAR_I2C_ICMCR); + udelay(5); + writel(mcra | RCAR_I2C_ICMCR_FSCL, priv->base + RCAR_I2C_ICMCR); + udelay(5); } -static int -rcar_i2c_raw_write(struct rcar_i2c *dev, u8 chip, uint addr, u8 *val, int size) +static int rcar_i2c_set_addr(struct udevice *dev, u8 chip, u8 read) { - rcar_i2c_raw_rw_common(dev, chip, addr); - - /* set send date */ - writel(*val, &dev->icrxdtxd); - /* start SCLclk */ - writel(~MSR_MDE, &dev->icmsr); + struct rcar_i2c_priv *priv = dev_get_priv(dev); + u32 mask = RCAR_I2C_ICMSR_MAT | + (read ? RCAR_I2C_ICMSR_MDR : RCAR_I2C_ICMSR_MDE); + u32 val; + int ret; + + writel(0, priv->base + RCAR_I2C_ICMIER); + writel(RCAR_I2C_ICMCR_MDBS, priv->base + RCAR_I2C_ICMCR); + writel(0, priv->base + RCAR_I2C_ICMSR); + writel(priv->icccr, priv->base + RCAR_I2C_ICCCR); + + ret = wait_for_bit_le32(priv->base + RCAR_I2C_ICMCR, + RCAR_I2C_ICMCR_FSDA, false, 2, true); + if (ret) { + rcar_i2c_recover(dev); + val = readl(priv->base + RCAR_I2C_ICMSR); + if (val & RCAR_I2C_ICMCR_FSDA) { + dev_err(dev, "Bus busy, aborting\n"); + return ret; + } + } - while (!(readl(&dev->icmsr) & MSR_MDE)) - udelay(10); + writel((chip << 1) | read, priv->base + RCAR_I2C_ICMAR); + writel(0, priv->base + RCAR_I2C_ICMSR); + writel(RCAR_I2C_ICMCR_MDBS | RCAR_I2C_ICMCR_MIE | RCAR_I2C_ICMCR_ESG, + priv->base + RCAR_I2C_ICMCR); - /* set stop condition */ - writel(MCR_MDBS | MCR_MIE | MCR_FSB, &dev->icmcr); - /* start SCLclk */ - writel(~MSR_MDE, &dev->icmsr); + ret = wait_for_bit_le32(priv->base + RCAR_I2C_ICMSR, mask, + true, 100, true); + if (ret) + return ret; - rcar_i2c_raw_rw_finish(dev); + /* Check NAK */ + if (readl(priv->base + RCAR_I2C_ICMSR) & RCAR_I2C_ICMSR_MNR) + return -EREMOTEIO; return 0; } -static u8 -rcar_i2c_raw_read(struct rcar_i2c *dev, u8 chip, uint addr) +static int rcar_i2c_read_common(struct udevice *dev, struct i2c_msg *msg) { - u8 ret; + struct rcar_i2c_priv *priv = dev_get_priv(dev); + u32 icmcr = RCAR_I2C_ICMCR_MDBS | RCAR_I2C_ICMCR_MIE; + int i, ret = -EREMOTEIO; - rcar_i2c_raw_rw_common(dev, chip, addr); + ret = rcar_i2c_set_addr(dev, msg->addr, 1); + if (ret) + return ret; - /* set slave address, receive */ - writel((chip << 1) | 1, &dev->icmar); - /* start master receive */ - writel(MCR_MDBS | MCR_MIE | MCR_ESG, &dev->icmcr); - /* clear status */ - writel(0, &dev->icmsr); + for (i = 0; i < msg->len; i++) { + if (msg->len - 1 == i) + icmcr |= RCAR_I2C_ICMCR_FSB; - while ((readl(&dev->icmsr) & (MSR_MAT | MSR_MDR)) - != (MSR_MAT | MSR_MDR)) - udelay(10); + writel(icmcr, priv->base + RCAR_I2C_ICMCR); + writel(~RCAR_I2C_ICMSR_MDR, priv->base + RCAR_I2C_ICMSR); - /* clear ESG */ - writel(MCR_MDBS | MCR_MIE, &dev->icmcr); - /* prepare stop condition */ - writel(MCR_MDBS | MCR_MIE | MCR_FSB, &dev->icmcr); - /* start SCLclk */ - writel(~(MSR_MAT | MSR_MDR), &dev->icmsr); + ret = wait_for_bit_le32(priv->base + RCAR_I2C_ICMSR, + RCAR_I2C_ICMSR_MDR, true, 100, true); + if (ret) + return ret; - while (!(readl(&dev->icmsr) & MSR_MDR)) - udelay(10); - - /* get receive data */ - ret = (u8)readl(&dev->icrxdtxd); - /* start SCLclk */ - writel(~MSR_MDR, &dev->icmsr); + msg->buf[i] = readl(priv->base + RCAR_I2C_ICRXD_ICTXD) & 0xff; + } - rcar_i2c_raw_rw_finish(dev); + writel(~RCAR_I2C_ICMSR_MDR, priv->base + RCAR_I2C_ICMSR); - return ret; + return rcar_i2c_finish(dev); } -/* - * SCL = iicck / (20 + SCGD * 8 + F[(ticf + tr + intd) * iicck]) - * iicck : I2C internal clock < 20 MHz - * ticf : I2C SCL falling time: 35 ns - * tr : I2C SCL rising time: 200 ns - * intd : LSI internal delay: I2C0: 50 ns I2C1-3: 5 - * F[n] : n rounded up to an integer - */ -static u32 rcar_clock_gen(int i2c_no, u32 bus_speed) +static int rcar_i2c_write_common(struct udevice *dev, struct i2c_msg *msg) { - u32 iicck, f, scl, scgd; - u32 intd = 5; - - int bit = 0, cdf_width = 3; - for (bit = 0; bit < (1 << cdf_width); bit++) { - iicck = CONFIG_HP_CLK_FREQ / (1 + bit); - if (iicck < 20000000) - break; + struct rcar_i2c_priv *priv = dev_get_priv(dev); + u32 icmcr = RCAR_I2C_ICMCR_MDBS | RCAR_I2C_ICMCR_MIE; + int i, ret = -EREMOTEIO; + + ret = rcar_i2c_set_addr(dev, msg->addr, 0); + if (ret) + return ret; + + for (i = 0; i < msg->len; i++) { + writel(msg->buf[i], priv->base + RCAR_I2C_ICRXD_ICTXD); + writel(icmcr, priv->base + RCAR_I2C_ICMCR); + writel(~RCAR_I2C_ICMSR_MDE, priv->base + RCAR_I2C_ICMSR); + + ret = wait_for_bit_le32(priv->base + RCAR_I2C_ICMSR, + RCAR_I2C_ICMSR_MDE, true, 100, true); + if (ret) + return ret; } - if (bit > (1 << cdf_width)) { - puts("rcar-i2c: Can not get CDF\n"); - return 0; - } + writel(~RCAR_I2C_ICMSR_MDE, priv->base + RCAR_I2C_ICMSR); + icmcr |= RCAR_I2C_ICMCR_FSB; + writel(icmcr, priv->base + RCAR_I2C_ICMCR); - if (i2c_no == 0) - intd = 50; + return rcar_i2c_finish(dev); +} - f = (35 + 200 + intd) * (iicck / 1000000000); +static int rcar_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs) +{ + int ret; - for (scgd = 0; scgd < 0x40; scgd++) { - scl = iicck / (20 + (scgd * 8) + f); - if (scl <= bus_speed) - break; - } + for (; nmsgs > 0; nmsgs--, msg++) { + if (msg->flags & I2C_M_RD) + ret = rcar_i2c_read_common(dev, msg); + else + ret = rcar_i2c_write_common(dev, msg); - if (scgd > 0x40) { - puts("rcar-i2c: Can not get SDGB\n"); - return 0; + if (ret) + return -EREMOTEIO; } - debug("%s: scl: %d\n", __func__, scl); - debug("%s: bit %x\n", __func__, bit); - debug("%s: scgd %x\n", __func__, scgd); - debug("%s: iccr %x\n", __func__, (scgd << (cdf_width) | bit)); + return ret; +} + +static int rcar_i2c_probe_chip(struct udevice *dev, uint addr, uint flags) +{ + struct rcar_i2c_priv *priv = dev_get_priv(dev); + int ret; - return scgd << (cdf_width) | bit; + /* Ignore address 0, slave address */ + if (addr == 0) + return -EINVAL; + + ret = rcar_i2c_set_addr(dev, addr, 1); + writel(0, priv->base + RCAR_I2C_ICMSR); + return ret; } -static void -rcar_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd) +static int rcar_i2c_set_speed(struct udevice *dev, uint bus_freq_hz) { - struct rcar_i2c *dev = (struct rcar_i2c *)i2c_dev[adap->hwadapnr]; - u32 icccr = 0; + struct rcar_i2c_priv *priv = dev_get_priv(dev); + u32 scgd, cdf, round, ick, sum, scl; + unsigned long rate; - /* No i2c support prior to relocation */ - if (!(gd->flags & GD_FLG_RELOC)) - return; + /* + * calculate SCL clock + * see + * ICCCR + * + * ick = clkp / (1 + CDF) + * SCL = ick / (20 + SCGD * 8 + F[(ticf + tr + intd) * ick]) + * + * ick : I2C internal clock < 20 MHz + * ticf : I2C SCL falling time + * tr : I2C SCL rising time + * intd : LSI internal delay + * clkp : peripheral_clk + * F[] : integer up-valuation + */ + rate = clk_get_rate(&priv->clk); + cdf = rate / 20000000; + if (cdf >= 8) { + dev_err(dev, "Input clock %lu too high\n", rate); + return -EIO; + } + ick = rate / (cdf + 1); /* - * reset slave mode. - * slave mode is not used on this driver + * it is impossible to calculate large scale + * number on u32. separate it + * + * F[(ticf + tr + intd) * ick] with sum = (ticf + tr + intd) + * = F[sum * ick / 1000000000] + * = F[(ick / 1000000) * sum / 1000] */ - writel(0, &dev->icsier); - writel(0, &dev->icsar); - writel(0, &dev->icscr); - writel(0, &dev->icssr); + sum = 35 + 200 + priv->intdelay; + round = (ick + 500000) / 1000000 * sum; + round = (round + 500) / 1000; - /* reset master mode */ - writel(0, &dev->icmier); - writel(0, &dev->icmcr); - writel(0, &dev->icmsr); - writel(0, &dev->icmar); - - icccr = rcar_clock_gen(adap->hwadapnr, adap->speed); - if (icccr == 0) - puts("I2C: Init failed\n"); - else - writel(icccr, &dev->icccr); -} + /* + * SCL = ick / (20 + SCGD * 8 + F[(ticf + tr + intd) * ick]) + * + * Calculation result (= SCL) should be less than + * bus_speed for hardware safety + * + * We could use something along the lines of + * div = ick / (bus_speed + 1) + 1; + * scgd = (div - 20 - round + 7) / 8; + * scl = ick / (20 + (scgd * 8) + round); + * (not fully verified) but that would get pretty involved + */ + for (scgd = 0; scgd < 0x40; scgd++) { + scl = ick / (20 + (scgd * 8) + round); + if (scl <= bus_freq_hz) + goto scgd_find; + } + dev_err(dev, "it is impossible to calculate best SCL\n"); + return -EIO; -static int rcar_i2c_read(struct i2c_adapter *adap, uint8_t chip, - uint addr, int alen, u8 *data, int len) -{ - struct rcar_i2c *dev = (struct rcar_i2c *)i2c_dev[adap->hwadapnr]; - int i; +scgd_find: + dev_dbg(dev, "clk %d/%d(%lu), round %u, CDF:0x%x, SCGD: 0x%x\n", + scl, bus_freq_hz, clk_get_rate(&priv->clk), round, cdf, scgd); - for (i = 0; i < len; i++) - data[i] = rcar_i2c_raw_read(dev, chip, addr + i); + priv->icccr = (scgd << RCAR_I2C_ICCCR_SCGD_OFF) | cdf; + writel(priv->icccr, priv->base + RCAR_I2C_ICCCR); return 0; } -static int rcar_i2c_write(struct i2c_adapter *adap, uint8_t chip, uint addr, - int alen, u8 *data, int len) +static int rcar_i2c_probe(struct udevice *dev) { - struct rcar_i2c *dev = (struct rcar_i2c *)i2c_dev[adap->hwadapnr]; - return rcar_i2c_raw_write(dev, chip, addr, data, len); -} + struct rcar_i2c_priv *priv = dev_get_priv(dev); + int ret; -static int -rcar_i2c_probe(struct i2c_adapter *adap, u8 dev) -{ - return rcar_i2c_read(adap, dev, 0, 0, NULL, 0); -} + priv->base = dev_read_addr_ptr(dev); + priv->intdelay = dev_read_u32_default(dev, + "i2c-scl-internal-delay-ns", 5); + + ret = clk_get_by_index(dev, 0, &priv->clk); + if (ret) + return ret; + + ret = clk_enable(&priv->clk); + if (ret) + return ret; + + /* reset slave mode */ + writel(0, priv->base + RCAR_I2C_ICSIER); + writel(0, priv->base + RCAR_I2C_ICSAR); + writel(0, priv->base + RCAR_I2C_ICSCR); + writel(0, priv->base + RCAR_I2C_ICSSR); + + /* reset master mode */ + writel(0, priv->base + RCAR_I2C_ICMIER); + writel(0, priv->base + RCAR_I2C_ICMCR); + writel(0, priv->base + RCAR_I2C_ICMSR); + writel(0, priv->base + RCAR_I2C_ICMAR); + + ret = rcar_i2c_set_speed(dev, 100000); + if (ret) + clk_disable(&priv->clk); -static unsigned int rcar_i2c_set_bus_speed(struct i2c_adapter *adap, - unsigned int speed) -{ - struct rcar_i2c *dev = (struct rcar_i2c *)i2c_dev[adap->hwadapnr]; - u32 icccr; - int ret = 0; - - rcar_i2c_raw_rw_finish(dev); - - icccr = rcar_clock_gen(adap->hwadapnr, speed); - if (icccr == 0) { - puts("I2C: Init failed\n"); - ret = -1; - } else { - writel(icccr, &dev->icccr); - } return ret; } -/* - * Register RCAR i2c adapters - */ -U_BOOT_I2C_ADAP_COMPLETE(rcar_0, rcar_i2c_init, rcar_i2c_probe, rcar_i2c_read, - rcar_i2c_write, rcar_i2c_set_bus_speed, - CONFIG_SYS_RCAR_I2C0_SPEED, 0, 0) -U_BOOT_I2C_ADAP_COMPLETE(rcar_1, rcar_i2c_init, rcar_i2c_probe, rcar_i2c_read, - rcar_i2c_write, rcar_i2c_set_bus_speed, - CONFIG_SYS_RCAR_I2C1_SPEED, 0, 1) -U_BOOT_I2C_ADAP_COMPLETE(rcar_2, rcar_i2c_init, rcar_i2c_probe, rcar_i2c_read, - rcar_i2c_write, rcar_i2c_set_bus_speed, - CONFIG_SYS_RCAR_I2C2_SPEED, 0, 2) -U_BOOT_I2C_ADAP_COMPLETE(rcar_3, rcar_i2c_init, rcar_i2c_probe, rcar_i2c_read, - rcar_i2c_write, rcar_i2c_set_bus_speed, - CONFIG_SYS_RCAR_I2C3_SPEED, 0, 3) +static const struct dm_i2c_ops rcar_i2c_ops = { + .xfer = rcar_i2c_xfer, + .probe_chip = rcar_i2c_probe_chip, + .set_bus_speed = rcar_i2c_set_speed, +}; + +static const struct udevice_id rcar_i2c_ids[] = { + { .compatible = "renesas,rcar-gen2-i2c" }, + { } +}; + +U_BOOT_DRIVER(i2c_rcar) = { + .name = "i2c_rcar", + .id = UCLASS_I2C, + .of_match = rcar_i2c_ids, + .probe = rcar_i2c_probe, + .priv_auto_alloc_size = sizeof(struct rcar_i2c_priv), + .ops = &rcar_i2c_ops, +}; diff --git a/drivers/i2c/sh_sh7734_i2c.c b/drivers/i2c/sh_sh7734_i2c.c deleted file mode 100644 index 6fe356baca8..00000000000 --- a/drivers/i2c/sh_sh7734_i2c.c +++ /dev/null @@ -1,376 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> - * Copyright (C) 2012 Renesas Solutions Corp. - * - * NOTE: This driver should be converted to driver model before June 2017. - * Please see doc/driver-model/i2c-howto.txt for instructions. - */ - -#include <common.h> -#include <i2c.h> -#include <asm/io.h> - -struct sh_i2c { - u8 iccr1; - u8 iccr2; - u8 icmr; - u8 icier; - u8 icsr; - u8 sar; - u8 icdrt; - u8 icdrr; - u8 nf2cyc; - u8 __pad0; - u8 __pad1; -}; - -static struct sh_i2c *base; -static u8 iccr1_cks, nf2cyc; - -/* ICCR1 */ -#define SH_I2C_ICCR1_ICE (1 << 7) -#define SH_I2C_ICCR1_RCVD (1 << 6) -#define SH_I2C_ICCR1_MST (1 << 5) -#define SH_I2C_ICCR1_TRS (1 << 4) -#define SH_I2C_ICCR1_MTRS \ - (SH_I2C_ICCR1_MST | SH_I2C_ICCR1_TRS) - -/* ICCR1 */ -#define SH_I2C_ICCR2_BBSY (1 << 7) -#define SH_I2C_ICCR2_SCP (1 << 6) -#define SH_I2C_ICCR2_SDAO (1 << 5) -#define SH_I2C_ICCR2_SDAOP (1 << 4) -#define SH_I2C_ICCR2_SCLO (1 << 3) -#define SH_I2C_ICCR2_IICRST (1 << 1) - -#define SH_I2C_ICIER_TIE (1 << 7) -#define SH_I2C_ICIER_TEIE (1 << 6) -#define SH_I2C_ICIER_RIE (1 << 5) -#define SH_I2C_ICIER_NAKIE (1 << 4) -#define SH_I2C_ICIER_STIE (1 << 3) -#define SH_I2C_ICIER_ACKE (1 << 2) -#define SH_I2C_ICIER_ACKBR (1 << 1) -#define SH_I2C_ICIER_ACKBT (1 << 0) - -#define SH_I2C_ICSR_TDRE (1 << 7) -#define SH_I2C_ICSR_TEND (1 << 6) -#define SH_I2C_ICSR_RDRF (1 << 5) -#define SH_I2C_ICSR_NACKF (1 << 4) -#define SH_I2C_ICSR_STOP (1 << 3) -#define SH_I2C_ICSR_ALOVE (1 << 2) -#define SH_I2C_ICSR_AAS (1 << 1) -#define SH_I2C_ICSR_ADZ (1 << 0) - -#define IRQ_WAIT 1000 - -static void sh_i2c_send_stop(struct sh_i2c *base) -{ - clrbits_8(&base->iccr2, SH_I2C_ICCR2_BBSY | SH_I2C_ICCR2_SCP); -} - -static int check_icsr_bits(struct sh_i2c *base, u8 bits) -{ - int i; - - for (i = 0; i < IRQ_WAIT; i++) { - if (bits & readb(&base->icsr)) - return 0; - udelay(10); - } - - return 1; -} - -static int check_stop(struct sh_i2c *base) -{ - int ret = check_icsr_bits(base, SH_I2C_ICSR_STOP); - clrbits_8(&base->icsr, SH_I2C_ICSR_STOP); - - return ret; -} - -static int check_tend(struct sh_i2c *base, int stop) -{ - int ret = check_icsr_bits(base, SH_I2C_ICSR_TEND); - - if (stop) { - clrbits_8(&base->icsr, SH_I2C_ICSR_STOP); - sh_i2c_send_stop(base); - } - - clrbits_8(&base->icsr, SH_I2C_ICSR_TEND); - return ret; -} - -static int check_tdre(struct sh_i2c *base) -{ - return check_icsr_bits(base, SH_I2C_ICSR_TDRE); -} - -static int check_rdrf(struct sh_i2c *base) -{ - return check_icsr_bits(base, SH_I2C_ICSR_RDRF); -} - -static int check_bbsy(struct sh_i2c *base) -{ - int i; - - for (i = 0 ; i < IRQ_WAIT ; i++) { - if (!(SH_I2C_ICCR2_BBSY & readb(&base->iccr2))) - return 0; - udelay(10); - } - return 1; -} - -static int check_ackbr(struct sh_i2c *base) -{ - int i; - - for (i = 0 ; i < IRQ_WAIT ; i++) { - if (!(SH_I2C_ICIER_ACKBR & readb(&base->icier))) - return 0; - udelay(10); - } - - return 1; -} - -static void sh_i2c_reset(struct sh_i2c *base) -{ - setbits_8(&base->iccr2, SH_I2C_ICCR2_IICRST); - - udelay(100); - - clrbits_8(&base->iccr2, SH_I2C_ICCR2_IICRST); -} - -static int i2c_set_addr(struct sh_i2c *base, u8 id, u8 reg) -{ - if (check_bbsy(base)) { - puts("i2c bus busy\n"); - goto fail; - } - - setbits_8(&base->iccr1, SH_I2C_ICCR1_MTRS); - clrsetbits_8(&base->iccr2, SH_I2C_ICCR2_SCP, SH_I2C_ICCR2_BBSY); - - writeb((id << 1), &base->icdrt); - - if (check_tend(base, 0)) { - puts("TEND check fail...\n"); - goto fail; - } - - if (check_ackbr(base)) { - check_tend(base, 0); - sh_i2c_send_stop(base); - goto fail; - } - - writeb(reg, &base->icdrt); - - if (check_tdre(base)) { - puts("TDRE check fail...\n"); - goto fail; - } - - if (check_tend(base, 0)) { - puts("TEND check fail...\n"); - goto fail; - } - - return 0; -fail: - - return 1; -} - -static int -i2c_raw_write(struct sh_i2c *base, u8 id, u8 reg, u8 *val, int size) -{ - int i; - - if (i2c_set_addr(base, id, reg)) { - puts("Fail set slave address\n"); - return 1; - } - - for (i = 0; i < size; i++) { - writeb(val[i], &base->icdrt); - check_tdre(base); - } - - check_tend(base, 1); - check_stop(base); - - udelay(100); - - clrbits_8(&base->iccr1, SH_I2C_ICCR1_MTRS); - clrbits_8(&base->icsr, SH_I2C_ICSR_TDRE); - sh_i2c_reset(base); - - return 0; -} - -static u8 i2c_raw_read(struct sh_i2c *base, u8 id, u8 reg) -{ - u8 ret = 0; - - if (i2c_set_addr(base, id, reg)) { - puts("Fail set slave address\n"); - goto fail; - } - - clrsetbits_8(&base->iccr2, SH_I2C_ICCR2_SCP, SH_I2C_ICCR2_BBSY); - writeb((id << 1) | 1, &base->icdrt); - - if (check_tend(base, 0)) - puts("TDRE check fail...\n"); - - clrsetbits_8(&base->iccr1, SH_I2C_ICCR1_TRS, SH_I2C_ICCR1_MST); - clrbits_8(&base->icsr, SH_I2C_ICSR_TDRE); - setbits_8(&base->icier, SH_I2C_ICIER_ACKBT); - setbits_8(&base->iccr1, SH_I2C_ICCR1_RCVD); - - /* read data (dummy) */ - ret = readb(&base->icdrr); - - if (check_rdrf(base)) { - puts("check RDRF error\n"); - goto fail; - } - - clrbits_8(&base->icsr, SH_I2C_ICSR_STOP); - udelay(1000); - - sh_i2c_send_stop(base); - - if (check_stop(base)) { - puts("check STOP error\n"); - goto fail; - } - - clrbits_8(&base->iccr1, SH_I2C_ICCR1_MTRS); - clrbits_8(&base->icsr, SH_I2C_ICSR_TDRE); - - /* data read */ - ret = readb(&base->icdrr); - -fail: - clrbits_8(&base->iccr1, SH_I2C_ICCR1_RCVD); - - return ret; -} - -#ifdef CONFIG_I2C_MULTI_BUS -static unsigned int current_bus; - -/** - * i2c_set_bus_num - change active I2C bus - * @bus: bus index, zero based - * @returns: 0 on success, non-0 on failure - */ -int i2c_set_bus_num(unsigned int bus) -{ - switch (bus) { - case 0: - base = (void *)CONFIG_SH_I2C_BASE0; - break; - case 1: - base = (void *)CONFIG_SH_I2C_BASE1; - break; - default: - printf("Bad bus: %d\n", bus); - return -1; - } - - current_bus = bus; - - return 0; -} - -/** - * i2c_get_bus_num - returns index of active I2C bus - */ -unsigned int i2c_get_bus_num(void) -{ - return current_bus; -} -#endif - -void i2c_init(int speed, int slaveaddr) -{ -#ifdef CONFIG_I2C_MULTI_BUS - current_bus = 0; -#endif - base = (struct sh_i2c *)CONFIG_SH_I2C_BASE0; - - if (speed == 400000) - iccr1_cks = 0x07; - else - iccr1_cks = 0x0F; - - nf2cyc = 1; - - /* Reset */ - sh_i2c_reset(base); - - /* ICE enable and set clock */ - writeb(SH_I2C_ICCR1_ICE | iccr1_cks, &base->iccr1); - writeb(nf2cyc, &base->nf2cyc); -} - -/* - * i2c_read: - Read multiple bytes from an i2c device - * - * The higher level routines take into account that this function is only - * called with len < page length of the device (see configuration file) - * - * @chip: address of the chip which is to be read - * @addr: i2c data address within the chip - * @alen: length of the i2c data address (1..2 bytes) - * @buffer: where to write the data - * @len: how much byte do we want to read - * @return: 0 in case of success - */ -int i2c_read(u8 chip, u32 addr, int alen, u8 *buffer, int len) -{ - int i = 0; - for (i = 0; i < len; i++) - buffer[i] = i2c_raw_read(base, chip, addr + i); - - return 0; -} - -/* - * i2c_write: - Write multiple bytes to an i2c device - * - * The higher level routines take into account that this function is only - * called with len < page length of the device (see configuration file) - * - * @chip: address of the chip which is to be written - * @addr: i2c data address within the chip - * @alen: length of the i2c data address (1..2 bytes) - * @buffer: where to find the data to be written - * @len: how much byte do we want to read - * @return: 0 in case of success - */ -int i2c_write(u8 chip, u32 addr, int alen, u8 *buffer, int len) -{ - return i2c_raw_write(base, chip, addr, buffer, len); -} - -/* - * i2c_probe: - Test if a chip answers for a given i2c address - * - * @chip: address of the chip which is searched for - * @return: 0 if a chip was found, -1 otherwhise - */ -int i2c_probe(u8 chip) -{ - u8 byte; - return i2c_read(chip, 0, 0, &byte, 1); -} diff --git a/drivers/i2c/tsi108_i2c.c b/drivers/i2c/tsi108_i2c.c deleted file mode 100644 index 208c0900ef8..00000000000 --- a/drivers/i2c/tsi108_i2c.c +++ /dev/null @@ -1,275 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2004 Tundra Semiconductor Corp. - * Author: Alex Bounine - * - * NOTE: This driver should be converted to driver model before June 2017. - * Please see doc/driver-model/i2c-howto.txt for instructions. - */ - -#include <config.h> -#include <common.h> - -#include <tsi108.h> - -#if defined(CONFIG_CMD_I2C) - -#define I2C_DELAY 100000 -#undef DEBUG_I2C - -#ifdef DEBUG_I2C -#define DPRINT(x) printf (x) -#else -#define DPRINT(x) -#endif - -/* All functions assume that Tsi108 I2C block is the only master on the bus */ -/* I2C read helper function */ - -void i2c_init(int speed, int slaveaddr) -{ - /* - * The TSI108 has a fixed I2C clock rate and doesn't support slave - * operation. This function only exists as a stub to fit into the - * U-Boot I2C API. - */ -} - -static int i2c_read_byte ( - uint i2c_chan, /* I2C channel number: 0 - main, 1 - SDC SPD */ - uchar chip_addr,/* I2C device address on the bus */ - uint byte_addr, /* Byte address within I2C device */ - uchar * buffer /* pointer to data buffer */ - ) -{ - u32 temp; - u32 to_count = I2C_DELAY; - u32 op_status = TSI108_I2C_TIMEOUT_ERR; - u32 chan_offset = TSI108_I2C_OFFSET; - - DPRINT (("I2C read_byte() %d 0x%02x 0x%02x\n", - i2c_chan, chip_addr, byte_addr)); - - if (0 != i2c_chan) - chan_offset = TSI108_I2C_SDRAM_OFFSET; - - /* Check if I2C operation is in progress */ - temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2); - - if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_WR_STATUS | - I2C_CNTRL2_START))) { - /* Set device address and operation (read = 0) */ - temp = (byte_addr << 16) | ((chip_addr & 0x07) << 8) | - ((chip_addr >> 3) & 0x0F); - *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL1) = - temp; - - /* Issue the read command - * (at this moment all other parameters are 0 - * (size = 1 byte, lane = 0) - */ - - *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2) = - (I2C_CNTRL2_START); - - /* Wait until operation completed */ - do { - /* Read I2C operation status */ - temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2); - - if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_START))) { - if (0 == (temp & - (I2C_CNTRL2_I2C_CFGERR | - I2C_CNTRL2_I2C_TO_ERR)) - ) { - op_status = TSI108_I2C_SUCCESS; - - temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + - chan_offset + - I2C_RD_DATA); - - *buffer = (u8) (temp & 0xFF); - } else { - /* report HW error */ - op_status = TSI108_I2C_IF_ERROR; - - DPRINT (("I2C HW error reported: 0x%02x\n", temp)); - } - - break; - } - } while (to_count--); - } else { - op_status = TSI108_I2C_IF_BUSY; - - DPRINT (("I2C Transaction start failed: 0x%02x\n", temp)); - } - - DPRINT (("I2C read_byte() status: 0x%02x\n", op_status)); - return op_status; -} - -/* - * I2C Read interface as defined in "include/i2c.h" : - * chip_addr: I2C chip address, range 0..127 - * (to read from SPD channel EEPROM use (0xD0 ... 0xD7) - * NOTE: The bit 7 in the chip_addr serves as a channel select. - * This hack is for enabling "i2c sdram" command on Tsi108 boards - * without changes to common code. Used for I2C reads only. - * byte_addr: Memory or register address within the chip - * alen: Number of bytes to use for addr (typically 1, 2 for larger - * memories, 0 for register type devices with only one - * register) - * buffer: Pointer to destination buffer for data to be read - * len: How many bytes to read - * - * Returns: 0 on success, not 0 on failure - */ - -int i2c_read (uchar chip_addr, uint byte_addr, int alen, - uchar * buffer, int len) -{ - u32 op_status = TSI108_I2C_PARAM_ERR; - u32 i2c_if = 0; - - /* Hack to support second (SPD) I2C controller (SPD EEPROM read only).*/ - if (0xD0 == (chip_addr & ~0x07)) { - i2c_if = 1; - chip_addr &= 0x7F; - } - /* Check for valid I2C address */ - if (chip_addr <= 0x7F && (byte_addr + len) <= (0x01 << (alen * 8))) { - while (len--) { - op_status = i2c_read_byte(i2c_if, chip_addr, byte_addr++, buffer++); - - if (TSI108_I2C_SUCCESS != op_status) { - DPRINT (("I2C read_byte() failed: 0x%02x (%d left)\n", op_status, len)); - - break; - } - } - } - - DPRINT (("I2C read() status: 0x%02x\n", op_status)); - return op_status; -} - -/* I2C write helper function */ - -static int i2c_write_byte (uchar chip_addr,/* I2C device address on the bus */ - uint byte_addr, /* Byte address within I2C device */ - uchar * buffer /* pointer to data buffer */ - ) -{ - u32 temp; - u32 to_count = I2C_DELAY; - u32 op_status = TSI108_I2C_TIMEOUT_ERR; - - /* Check if I2C operation is in progress */ - temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2); - - if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_WR_STATUS | I2C_CNTRL2_START))) { - /* Place data into the I2C Tx Register */ - *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + - I2C_TX_DATA) = (u32) * buffer; - - /* Set device address and operation */ - temp = - I2C_CNTRL1_I2CWRITE | (byte_addr << 16) | - ((chip_addr & 0x07) << 8) | ((chip_addr >> 3) & 0x0F); - *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + - I2C_CNTRL1) = temp; - - /* Issue the write command (at this moment all other parameters - * are 0 (size = 1 byte, lane = 0) - */ - - *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + - I2C_CNTRL2) = (I2C_CNTRL2_START); - - op_status = TSI108_I2C_TIMEOUT_ERR; - - /* Wait until operation completed */ - do { - /* Read I2C operation status */ - temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2); - - if (0 == (temp & (I2C_CNTRL2_WR_STATUS | I2C_CNTRL2_START))) { - if (0 == (temp & - (I2C_CNTRL2_I2C_CFGERR | - I2C_CNTRL2_I2C_TO_ERR))) { - op_status = TSI108_I2C_SUCCESS; - } else { - /* report detected HW error */ - op_status = TSI108_I2C_IF_ERROR; - - DPRINT (("I2C HW error reported: 0x%02x\n", temp)); - } - - break; - } - - } while (to_count--); - } else { - op_status = TSI108_I2C_IF_BUSY; - - DPRINT (("I2C Transaction start failed: 0x%02x\n", temp)); - } - - return op_status; -} - -/* - * I2C Write interface as defined in "include/i2c.h" : - * chip_addr: I2C chip address, range 0..127 - * byte_addr: Memory or register address within the chip - * alen: Number of bytes to use for addr (typically 1, 2 for larger - * memories, 0 for register type devices with only one - * register) - * buffer: Pointer to data to be written - * len: How many bytes to write - * - * Returns: 0 on success, not 0 on failure - */ - -int i2c_write (uchar chip_addr, uint byte_addr, int alen, uchar * buffer, - int len) -{ - u32 op_status = TSI108_I2C_PARAM_ERR; - - /* Check for valid I2C address */ - if (chip_addr <= 0x7F && (byte_addr + len) <= (0x01 << (alen * 8))) { - while (len--) { - op_status = - i2c_write_byte (chip_addr, byte_addr++, buffer++); - - if (TSI108_I2C_SUCCESS != op_status) { - DPRINT (("I2C write_byte() failed: 0x%02x (%d left)\n", op_status, len)); - - break; - } - } - } - - return op_status; -} - -/* - * I2C interface function as defined in "include/i2c.h". - * Probe the given I2C chip address by reading single byte from offset 0. - * Returns 0 if a chip responded, not 0 on failure. - */ - -int i2c_probe (uchar chip) -{ - u32 tmp; - - /* - * Try to read the first location of the chip. - * The Tsi108 HW doesn't support sending just the chip address - * and checkong for an <ACK> back. - */ - return i2c_read (chip, 0, 1, (uchar *)&tmp, 1); -} - -#endif diff --git a/drivers/led/led_bcm6328.c b/drivers/led/led_bcm6328.c index a1bf44cb355..a29e5a02c0a 100644 --- a/drivers/led/led_bcm6328.c +++ b/drivers/led/led_bcm6328.c @@ -37,8 +37,6 @@ #define LED_MODE_OFF 3 #define LED_MODE_MASK 0x3 -DECLARE_GLOBAL_DATA_PTR; - struct bcm6328_led_priv { void __iomem *regs; void __iomem *mode; @@ -149,34 +147,25 @@ static const struct led_ops bcm6328_led_ops = { static int bcm6328_led_probe(struct udevice *dev) { struct led_uc_plat *uc_plat = dev_get_uclass_platdata(dev); - fdt_addr_t addr; - fdt_size_t size; /* Top-level LED node */ if (!uc_plat->label) { void __iomem *regs; u32 set_bits = 0; - addr = devfdt_get_addr_size_index(dev, 0, &size); - if (addr == FDT_ADDR_T_NONE) + regs = dev_remap_addr(dev); + if (!regs) return -EINVAL; - regs = ioremap(addr, size); - - if (fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev), - "brcm,serial-leds")) + if (dev_read_bool(dev, "brcm,serial-leds")) set_bits |= LED_INIT_SLEDEN_MASK; - if (fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev), - "brcm,serial-mux")) + if (dev_read_bool(dev, "brcm,serial-mux")) set_bits |= LED_INIT_SLEDMUX_MASK; - if (fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev), - "brcm,serial-clk-low")) + if (dev_read_bool(dev, "brcm,serial-clk-low")) set_bits |= LED_INIT_SLEDCLKNPOL_MASK; - if (!fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev), - "brcm,serial-dat-low")) + if (!dev_read_bool(dev, "brcm,serial-dat-low")) set_bits |= LED_INIT_SLEDDATANPOL_MASK; - if (!fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev), - "brcm,serial-shift-inv")) + if (!dev_read_bool(dev, "brcm,serial-shift-inv")) set_bits |= LED_INIT_SLEDSHIFTDIR_MASK; clrsetbits_be32(regs + LED_INIT_REG, ~0, set_bits); @@ -184,17 +173,14 @@ static int bcm6328_led_probe(struct udevice *dev) struct bcm6328_led_priv *priv = dev_get_priv(dev); unsigned int pin; - addr = devfdt_get_addr_size_index(dev_get_parent(dev), 0, - &size); - if (addr == FDT_ADDR_T_NONE) + priv->regs = dev_remap_addr(dev); + if (!priv->regs) return -EINVAL; - pin = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), "reg", - LEDS_MAX); + pin = dev_read_u32_default(dev, "reg", LEDS_MAX); if (pin >= LEDS_MAX) return -EINVAL; - priv->regs = ioremap(addr, size); if (pin < 8) { /* LEDs 0-7 (bits 47:32) */ priv->mode = priv->regs + LED_MODE_REG_HI; @@ -205,8 +191,7 @@ static int bcm6328_led_probe(struct udevice *dev) priv->shift = ((pin - 8) << 1); } - if (fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev), - "active-low")) + if (dev_read_bool(dev, "active-low")) priv->active_low = true; } @@ -215,27 +200,24 @@ static int bcm6328_led_probe(struct udevice *dev) static int bcm6328_led_bind(struct udevice *parent) { - const void *blob = gd->fdt_blob; - int node; + ofnode node; - for (node = fdt_first_subnode(blob, dev_of_offset(parent)); - node > 0; - node = fdt_next_subnode(blob, node)) { + dev_for_each_subnode(node, parent) { struct led_uc_plat *uc_plat; struct udevice *dev; const char *label; int ret; - label = fdt_getprop(blob, node, "label", NULL); + label = ofnode_read_string(node, "label"); if (!label) { debug("%s: node %s has no label\n", __func__, - fdt_get_name(blob, node, NULL)); + ofnode_get_name(node)); return -EINVAL; } ret = device_bind_driver_to_node(parent, "bcm6328-led", - fdt_get_name(blob, node, NULL), - offset_to_ofnode(node), &dev); + ofnode_get_name(node), + node, &dev); if (ret) return ret; diff --git a/drivers/led/led_bcm6358.c b/drivers/led/led_bcm6358.c index 4b1c24bd95e..01b86b756e1 100644 --- a/drivers/led/led_bcm6358.c +++ b/drivers/led/led_bcm6358.c @@ -31,8 +31,6 @@ #define LED_CTRL_BUSY_SHIFT 3 #define LED_CTRL_BUSY_MASK (1 << LED_CTRL_BUSY_SHIFT) -DECLARE_GLOBAL_DATA_PTR; - struct bcm6358_led_priv { void __iomem *regs; uint8_t pin; @@ -114,8 +112,6 @@ static const struct led_ops bcm6358_led_ops = { static int bcm6358_led_probe(struct udevice *dev) { struct led_uc_plat *uc_plat = dev_get_uclass_platdata(dev); - fdt_addr_t addr; - fdt_size_t size; /* Top-level LED node */ if (!uc_plat->label) { @@ -123,17 +119,14 @@ static int bcm6358_led_probe(struct udevice *dev) unsigned int clk_div; u32 set_bits = 0; - addr = devfdt_get_addr_size_index(dev, 0, &size); - if (addr == FDT_ADDR_T_NONE) + regs = dev_remap_addr(dev); + if (!regs) return -EINVAL; - regs = ioremap(addr, size); - - if (fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev), - "brcm,clk-dat-low")) + if (dev_read_bool(dev, "brcm,clk-dat-low")) set_bits |= LED_CTRL_POL_MASK; - clk_div = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), - "brcm,clk-div", LED_CTRL_CLK_1); + clk_div = dev_read_u32_default(dev, "brcm,clk-div", + LED_CTRL_CLK_1); switch (clk_div) { case 8: set_bits |= LED_CTRL_CLK_8; @@ -157,21 +150,17 @@ static int bcm6358_led_probe(struct udevice *dev) struct bcm6358_led_priv *priv = dev_get_priv(dev); unsigned int pin; - addr = devfdt_get_addr_size_index(dev_get_parent(dev), 0, - &size); - if (addr == FDT_ADDR_T_NONE) + priv->regs = dev_remap_addr(dev); + if (!priv->regs) return -EINVAL; - pin = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), "reg", - LEDS_MAX); + pin = dev_read_u32_default(dev, "reg", LEDS_MAX); if (pin >= LEDS_MAX) return -EINVAL; - priv->regs = ioremap(addr, size); priv->pin = pin; - if (fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev), - "active-low")) + if (dev_read_bool(dev, "active-low")) priv->active_low = true; } @@ -180,27 +169,24 @@ static int bcm6358_led_probe(struct udevice *dev) static int bcm6358_led_bind(struct udevice *parent) { - const void *blob = gd->fdt_blob; - int node; + ofnode node; - for (node = fdt_first_subnode(blob, dev_of_offset(parent)); - node > 0; - node = fdt_next_subnode(blob, node)) { + dev_for_each_subnode(node, parent) { struct led_uc_plat *uc_plat; struct udevice *dev; const char *label; int ret; - label = fdt_getprop(blob, node, "label", NULL); + label = ofnode_read_string(node, "label"); if (!label) { debug("%s: node %s has no label\n", __func__, - fdt_get_name(blob, node, NULL)); + ofnode_get_name(node)); return -EINVAL; } ret = device_bind_driver_to_node(parent, "bcm6358-led", - fdt_get_name(blob, node, NULL), - offset_to_ofnode(node), &dev); + ofnode_get_name(node), + node, &dev); if (ret) return ret; diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index be900cf4d6e..17b3a805a2d 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -158,6 +158,15 @@ config PCA9551_I2C_ADDR help The I2C address of the PCA9551 LED controller. +config STM32MP_FUSE + bool "Enable STM32MP fuse wrapper providing the fuse API" + depends on ARCH_STM32MP && MISC + default y if CMD_FUSE + help + If you say Y here, you will get support for the fuse API (OTP) + for STM32MP architecture. + This API is needed for CMD_FUSE. + config STM32_RCC bool "Enable RCC driver for the STM32 SoC's family" depends on STM32 && MISC diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index e362609d62a..4ce9d213f06 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -51,5 +51,6 @@ obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o obj-$(CONFIG_QFW) += qfw.o obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o obj-$(CONFIG_STM32_RCC) += stm32_rcc.o +obj-$(CONFIG_STM32MP_FUSE) += stm32mp_fuse.o obj-$(CONFIG_SYS_DPAA_QBMAN) += fsl_portals.o obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o diff --git a/drivers/misc/stm32_rcc.c b/drivers/misc/stm32_rcc.c index dee82c0b7b1..980b3a58e1d 100644 --- a/drivers/misc/stm32_rcc.c +++ b/drivers/misc/stm32_rcc.c @@ -53,13 +53,9 @@ static int stm32_rcc_bind(struct udevice *dev) if (ret) return ret; -#ifdef CONFIG_SPL_BUILD - return 0; -#else return device_bind_driver_to_node(dev, "stm32_rcc_reset", "stm32_rcc_reset", dev_ofnode(dev), &child); -#endif } static const struct misc_ops stm32_rcc_ops = { diff --git a/drivers/misc/stm32mp_fuse.c b/drivers/misc/stm32mp_fuse.c new file mode 100644 index 00000000000..2d661351a17 --- /dev/null +++ b/drivers/misc/stm32mp_fuse.c @@ -0,0 +1,116 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018, STMicroelectronics - All Rights Reserved + */ + +#include <common.h> +#include <command.h> +#include <misc.h> +#include <errno.h> +#include <dm/device.h> +#include <dm/uclass.h> + +#define STM32MP_OTP_BANK 0 + +/* + * The 'fuse' command API + */ +int fuse_read(u32 bank, u32 word, u32 *val) +{ + int ret = 0; + struct udevice *dev; + + switch (bank) { + case STM32MP_OTP_BANK: + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_GET_DRIVER(stm32mp_bsec), + &dev); + if (ret) + return ret; + ret = misc_read(dev, word * 4 + STM32_BSEC_SHADOW_OFFSET, + val, 4); + break; + + default: + printf("stm32mp %s: wrong value for bank %i\n", __func__, bank); + ret = -EINVAL; + break; + } + + return ret; +} + +int fuse_prog(u32 bank, u32 word, u32 val) +{ + struct udevice *dev; + int ret; + + switch (bank) { + case STM32MP_OTP_BANK: + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_GET_DRIVER(stm32mp_bsec), + &dev); + if (ret) + return ret; + ret = misc_write(dev, word * 4 + STM32_BSEC_OTP_OFFSET, + &val, 4); + break; + + default: + printf("stm32mp %s: wrong value for bank %i\n", __func__, bank); + ret = -EINVAL; + break; + } + + return ret; +} + +int fuse_sense(u32 bank, u32 word, u32 *val) +{ + struct udevice *dev; + int ret; + + switch (bank) { + case STM32MP_OTP_BANK: + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_GET_DRIVER(stm32mp_bsec), + &dev); + if (ret) + return ret; + ret = misc_read(dev, word * 4 + STM32_BSEC_OTP_OFFSET, val, 4); + break; + + default: + printf("stm32mp %s: wrong value for bank %i\n", __func__, bank); + ret = -EINVAL; + break; + } + + return ret; +} + +int fuse_override(u32 bank, u32 word, u32 val) +{ + struct udevice *dev; + int ret; + + switch (bank) { + case STM32MP_OTP_BANK: + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_GET_DRIVER(stm32mp_bsec), + &dev); + if (ret) + return ret; + ret = misc_write(dev, word * 4 + STM32_BSEC_SHADOW_OFFSET, + &val, 4); + break; + + default: + printf("stm32mp %s: wrong value for bank %i\n", + __func__, bank); + ret = -EINVAL; + break; + } + + return ret; +} diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 3f15f85efda..693b3ceaf00 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -71,6 +71,13 @@ config MMC_HW_PARTITIONING This adds a command and an API to do hardware partitioning on eMMC devices. +config SUPPORT_EMMC_RPMB + bool "Support eMMC replay protected memory block (RPMB)" + imply CMD_MMC_RPMB + help + Enable support for reading, writing and programming the + key for the Replay Protection Memory Block partition in eMMC. + config MMC_IO_VOLTAGE bool "Support IO voltage configuration" help diff --git a/drivers/mmc/bcm2835_sdhost.c b/drivers/mmc/bcm2835_sdhost.c index 96428333b0a..1ce019af579 100644 --- a/drivers/mmc/bcm2835_sdhost.c +++ b/drivers/mmc/bcm2835_sdhost.c @@ -163,7 +163,6 @@ struct bcm2835_host { int clock; /* Current clock speed */ unsigned int max_clk; /* Max possible freq */ unsigned int blocks; /* remaining PIO blocks */ - int irq; /* Device IRQ */ u32 ns_per_fifo_word; @@ -173,14 +172,7 @@ struct bcm2835_host { struct mmc_cmd *cmd; /* Current command */ struct mmc_data *data; /* Current data request */ - bool data_complete:1;/* Data finished before cmd */ bool use_busy:1; /* Wait for busy interrupt */ - bool wait_data_complete:1; /* Wait for data */ - - /* for threaded irq handler */ - bool irq_block; - bool irq_busy; - bool irq_data; struct udevice *dev; struct mmc *mmc; @@ -240,17 +232,9 @@ static void bcm2835_reset_internal(struct bcm2835_host *host) writel(host->cdiv, host->ioaddr + SDCDIV); } -static int bcm2835_finish_command(struct bcm2835_host *host); - -static void bcm2835_wait_transfer_complete(struct bcm2835_host *host) +static int bcm2835_wait_transfer_complete(struct bcm2835_host *host) { - int timediff; - u32 alternate_idle; - - alternate_idle = (host->data->flags & MMC_DATA_READ) ? - SDEDM_FSM_READWAIT : SDEDM_FSM_WRITESTART1; - - timediff = 0; + int timediff = 0; while (1) { u32 edm, fsm; @@ -261,7 +245,10 @@ static void bcm2835_wait_transfer_complete(struct bcm2835_host *host) if ((fsm == SDEDM_FSM_IDENTMODE) || (fsm == SDEDM_FSM_DATAMODE)) break; - if (fsm == alternate_idle) { + + if ((fsm == SDEDM_FSM_READWAIT) || + (fsm == SDEDM_FSM_WRITESTART1) || + (fsm == SDEDM_FSM_READDATA)) { writel(edm | SDEDM_FORCE_DATA_MODE, host->ioaddr + SDEDM); break; @@ -273,9 +260,11 @@ static void bcm2835_wait_transfer_complete(struct bcm2835_host *host) "wait_transfer_complete - still waiting after %d retries\n", timediff); bcm2835_dumpregs(host); - return; + return -ETIMEDOUT; } } + + return 0; } static int bcm2835_transfer_block_pio(struct bcm2835_host *host, bool is_read) @@ -322,6 +311,9 @@ static int bcm2835_transfer_block_pio(struct bcm2835_host *host, bool is_read) fsm_state != SDEDM_FSM_READCRC)) || (!is_read && (fsm_state != SDEDM_FSM_WRITEDATA && + fsm_state != SDEDM_FSM_WRITEWAIT1 && + fsm_state != SDEDM_FSM_WRITEWAIT2 && + fsm_state != SDEDM_FSM_WRITECRC && fsm_state != SDEDM_FSM_WRITESTART1 && fsm_state != SDEDM_FSM_WRITESTART2))) { hsts = readl(host->ioaddr + SDHSTS); @@ -358,9 +350,8 @@ static int bcm2835_transfer_pio(struct bcm2835_host *host) is_read = (host->data->flags & MMC_DATA_READ) != 0; ret = bcm2835_transfer_block_pio(host, is_read); - - if (host->wait_data_complete) - bcm2835_wait_transfer_complete(host); + if (ret) + return ret; sdhsts = readl(host->ioaddr + SDHSTS); if (sdhsts & (SDHSTS_CRC16_ERROR | @@ -379,21 +370,8 @@ static int bcm2835_transfer_pio(struct bcm2835_host *host) return ret; } -static void bcm2835_set_transfer_irqs(struct bcm2835_host *host) -{ - u32 all_irqs = SDHCFG_DATA_IRPT_EN | SDHCFG_BLOCK_IRPT_EN | - SDHCFG_BUSY_IRPT_EN; - - host->hcfg = (host->hcfg & ~all_irqs) | - SDHCFG_DATA_IRPT_EN | - SDHCFG_BUSY_IRPT_EN; - - writel(host->hcfg, host->ioaddr + SDHCFG); -} - -static -void bcm2835_prepare_data(struct bcm2835_host *host, struct mmc_cmd *cmd, - struct mmc_data *data) +static void bcm2835_prepare_data(struct bcm2835_host *host, struct mmc_cmd *cmd, + struct mmc_data *data) { WARN_ON(host->data); @@ -401,14 +379,9 @@ void bcm2835_prepare_data(struct bcm2835_host *host, struct mmc_cmd *cmd, if (!data) return; - host->wait_data_complete = cmd->cmdidx != MMC_CMD_READ_MULTIPLE_BLOCK; - host->data_complete = false; - /* Use PIO */ host->blocks = data->blocks; - bcm2835_set_transfer_irqs(host); - writel(data->blocksize, host->ioaddr + SDHBCT); writel(data->blocks, host->ioaddr + SDHBLC); } @@ -483,36 +456,6 @@ static int bcm2835_send_command(struct bcm2835_host *host, struct mmc_cmd *cmd, return 0; } -static int bcm2835_transfer_complete(struct bcm2835_host *host) -{ - int ret = 0; - - WARN_ON(!host->data_complete); - - host->data = NULL; - - return ret; -} - -static void bcm2835_finish_data(struct bcm2835_host *host) -{ - host->hcfg &= ~(SDHCFG_DATA_IRPT_EN | SDHCFG_BLOCK_IRPT_EN); - writel(host->hcfg, host->ioaddr + SDHCFG); - - host->data_complete = true; - - if (host->cmd) { - /* Data managed to finish before the - * command completed. Make sure we do - * things in the proper order. - */ - dev_dbg(dev, "Finished early - HSTS %08x\n", - readl(host->ioaddr + SDHSTS)); - } else { - bcm2835_transfer_complete(host); - } -} - static int bcm2835_finish_command(struct bcm2835_host *host) { struct mmc_cmd *cmd = host->cmd; @@ -562,8 +505,6 @@ static int bcm2835_finish_command(struct bcm2835_host *host) /* Processed actual command. */ host->cmd = NULL; - if (host->data && host->data_complete) - ret = bcm2835_transfer_complete(host); return ret; } @@ -608,159 +549,44 @@ static int bcm2835_check_data_error(struct bcm2835_host *host, u32 intmask) return ret; } -static void bcm2835_busy_irq(struct bcm2835_host *host) -{ - if (WARN_ON(!host->cmd)) { - bcm2835_dumpregs(host); - return; - } - - if (WARN_ON(!host->use_busy)) { - bcm2835_dumpregs(host); - return; - } - host->use_busy = false; - - bcm2835_finish_command(host); -} - -static void bcm2835_data_irq(struct bcm2835_host *host, u32 intmask) +static int bcm2835_transmit(struct bcm2835_host *host) { + u32 intmask = readl(host->ioaddr + SDHSTS); int ret; - /* - * There are no dedicated data/space available interrupt - * status bits, so it is necessary to use the single shared - * data/space available FIFO status bits. It is therefore not - * an error to get here when there is no data transfer in - * progress. - */ - if (!host->data) - return; - + /* Check for errors */ ret = bcm2835_check_data_error(host, intmask); if (ret) - goto finished; - - if (host->data->flags & MMC_DATA_WRITE) { - /* Use the block interrupt for writes after the first block */ - host->hcfg &= ~(SDHCFG_DATA_IRPT_EN); - host->hcfg |= SDHCFG_BLOCK_IRPT_EN; - writel(host->hcfg, host->ioaddr + SDHCFG); - bcm2835_transfer_pio(host); - } else { - bcm2835_transfer_pio(host); - host->blocks--; - if ((host->blocks == 0)) - goto finished; - } - return; + return ret; -finished: - host->hcfg &= ~(SDHCFG_DATA_IRPT_EN | SDHCFG_BLOCK_IRPT_EN); - writel(host->hcfg, host->ioaddr + SDHCFG); -} - -static void bcm2835_data_threaded_irq(struct bcm2835_host *host) -{ - if (!host->data) - return; - if ((host->blocks == 0)) - bcm2835_finish_data(host); -} - -static void bcm2835_block_irq(struct bcm2835_host *host) -{ - if (WARN_ON(!host->data)) { - bcm2835_dumpregs(host); - return; - } - - WARN_ON(!host->blocks); - if ((--host->blocks == 0)) - bcm2835_finish_data(host); - else - bcm2835_transfer_pio(host); -} + ret = bcm2835_check_cmd_error(host, intmask); + if (ret) + return ret; -static irqreturn_t bcm2835_irq(int irq, void *dev_id) -{ - irqreturn_t result = IRQ_NONE; - struct bcm2835_host *host = dev_id; - u32 intmask; - - intmask = readl(host->ioaddr + SDHSTS); - - writel(SDHSTS_BUSY_IRPT | - SDHSTS_BLOCK_IRPT | - SDHSTS_SDIO_IRPT | - SDHSTS_DATA_FLAG, - host->ioaddr + SDHSTS); - - if (intmask & SDHSTS_BLOCK_IRPT) { - bcm2835_check_data_error(host, intmask); - host->irq_block = true; - result = IRQ_WAKE_THREAD; + /* Handle wait for busy end */ + if (host->use_busy && (intmask & SDHSTS_BUSY_IRPT)) { + writel(SDHSTS_BUSY_IRPT, host->ioaddr + SDHSTS); + host->use_busy = false; + bcm2835_finish_command(host); } - if (intmask & SDHSTS_BUSY_IRPT) { - if (!bcm2835_check_cmd_error(host, intmask)) { - host->irq_busy = true; - result = IRQ_WAKE_THREAD; - } else { - result = IRQ_HANDLED; + /* Handle PIO data transfer */ + if (host->data) { + ret = bcm2835_transfer_pio(host); + if (ret) + return ret; + host->blocks--; + if (host->blocks == 0) { + /* Wait for command to complete for real */ + ret = bcm2835_wait_transfer_complete(host); + if (ret) + return ret; + /* Transfer complete */ + host->data = NULL; } } - /* There is no true data interrupt status bit, so it is - * necessary to qualify the data flag with the interrupt - * enable bit. - */ - if ((intmask & SDHSTS_DATA_FLAG) && - (host->hcfg & SDHCFG_DATA_IRPT_EN)) { - bcm2835_data_irq(host, intmask); - host->irq_data = true; - result = IRQ_WAKE_THREAD; - } - - return result; -} - -static irqreturn_t bcm2835_threaded_irq(int irq, void *dev_id) -{ - struct bcm2835_host *host = dev_id; - - if (host->irq_block) { - host->irq_block = false; - bcm2835_block_irq(host); - } - - if (host->irq_busy) { - host->irq_busy = false; - bcm2835_busy_irq(host); - } - - if (host->irq_data) { - host->irq_data = false; - bcm2835_data_threaded_irq(host); - } - - return IRQ_HANDLED; -} - -static void bcm2835_irq_poll(struct bcm2835_host *host) -{ - u32 intmask; - - while (1) { - intmask = readl(host->ioaddr + SDHSTS); - if (intmask & (SDHSTS_BUSY_IRPT | SDHSTS_BLOCK_IRPT | - SDHSTS_SDIO_IRPT | SDHSTS_DATA_FLAG)) { - bcm2835_irq(0, host); - bcm2835_threaded_irq(0, host); - return; - } - } + return 0; } static void bcm2835_set_clock(struct bcm2835_host *host, unsigned int clock) @@ -864,8 +690,11 @@ static int bcm2835_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, } /* Wait for completion of busy signal or data transfer */ - while (host->use_busy || host->data) - bcm2835_irq_poll(host); + while (host->use_busy || host->data) { + ret = bcm2835_transmit(host); + if (ret) + break; + } return ret; } diff --git a/drivers/mmc/ftsdc010_mci.c b/drivers/mmc/ftsdc010_mci.c index 00209e33889..9c15eb36d64 100644 --- a/drivers/mmc/ftsdc010_mci.c +++ b/drivers/mmc/ftsdc010_mci.c @@ -463,7 +463,7 @@ int ftsdc010_mmc_bind(struct udevice *dev) } static const struct udevice_id ftsdc010_mmc_ids[] = { - { .compatible = "andestech,atsdc010" }, + { .compatible = "andestech,atfsdc010" }, { } }; diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c index 62577895eee..ecdb088ac4d 100644 --- a/drivers/mmc/renesas-sdhi.c +++ b/drivers/mmc/renesas-sdhi.c @@ -323,6 +323,7 @@ static const struct udevice_id renesas_sdhi_match[] = { { .compatible = "renesas,sdhi-r8a7796", .data = RENESAS_GEN3_QUIRKS }, { .compatible = "renesas,sdhi-r8a77965", .data = RENESAS_GEN3_QUIRKS }, { .compatible = "renesas,sdhi-r8a77970", .data = RENESAS_GEN3_QUIRKS }, + { .compatible = "renesas,sdhi-r8a77990", .data = RENESAS_GEN3_QUIRKS }, { .compatible = "renesas,sdhi-r8a77995", .data = RENESAS_GEN3_QUIRKS }, { /* sentinel */ } }; diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 400f87e134d..40e28abda67 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -161,7 +161,8 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, /* We shouldn't wait for data inihibit for stop commands, even though they might use busy signaling */ if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION || - cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK) + cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK || + cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK_HS200) mask &= ~SDHCI_DATA_INHIBIT; while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) { @@ -183,7 +184,8 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS); mask = SDHCI_INT_RESPONSE; - if (cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK) + if (cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK || + cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK_HS200) mask = SDHCI_INT_DATA_AVAIL; if (!(cmd->resp_type & MMC_RSP_PRESENT)) @@ -201,7 +203,8 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, flags |= SDHCI_CMD_CRC; if (cmd->resp_type & MMC_RSP_OPCODE) flags |= SDHCI_CMD_INDEX; - if (data || cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK) + if (data || cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK || + cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK_HS200) flags |= SDHCI_CMD_DATA; /* Set Transfer mode regarding to data flag */ diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c index 11cc438ce6a..e8292c438d9 100644 --- a/drivers/mmc/stm32_sdmmc2.c +++ b/drivers/mmc/stm32_sdmmc2.c @@ -235,8 +235,8 @@ static void stm32_sdmmc2_start_data(struct stm32_sdmmc2_priv *priv, static void stm32_sdmmc2_start_cmd(struct stm32_sdmmc2_priv *priv, struct mmc_cmd *cmd, u32 cmd_param) { - if (readl(priv->base + SDMMC_ARG) & SDMMC_CMD_CPSMEN) - writel(0, priv->base + SDMMC_ARG); + if (readl(priv->base + SDMMC_CMD) & SDMMC_CMD_CPSMEN) + writel(0, priv->base + SDMMC_CMD); cmd_param |= cmd->cmdidx | SDMMC_CMD_CPSMEN; if (cmd->resp_type & MMC_RSP_PRESENT) { diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index f99731fb1ff..5b6d5256084 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -32,12 +32,21 @@ struct arasan_sdhci_priv { }; #if defined(CONFIG_ARCH_ZYNQMP) +#define MMC_HS200_BUS_SPEED 5 + static const u8 mode2timing[] = { - [UHS_SDR12] = UHS_SDR12_BUS_SPEED, - [UHS_SDR25] = UHS_SDR25_BUS_SPEED, - [UHS_SDR50] = UHS_SDR50_BUS_SPEED, - [UHS_SDR104] = UHS_SDR104_BUS_SPEED, - [UHS_DDR50] = UHS_DDR50_BUS_SPEED, + [MMC_LEGACY] = UHS_SDR12_BUS_SPEED, + [SD_LEGACY] = UHS_SDR12_BUS_SPEED, + [MMC_HS] = HIGH_SPEED_BUS_SPEED, + [SD_HS] = HIGH_SPEED_BUS_SPEED, + [MMC_HS_52] = HIGH_SPEED_BUS_SPEED, + [MMC_DDR_52] = HIGH_SPEED_BUS_SPEED, + [UHS_SDR12] = UHS_SDR12_BUS_SPEED, + [UHS_SDR25] = UHS_SDR25_BUS_SPEED, + [UHS_SDR50] = UHS_SDR50_BUS_SPEED, + [UHS_DDR50] = UHS_DDR50_BUS_SPEED, + [UHS_SDR104] = UHS_SDR104_BUS_SPEED, + [MMC_HS_200] = MMC_HS200_BUS_SPEED, }; #define SDHCI_HOST_CTRL2 0x3E @@ -160,9 +169,6 @@ static void arasan_sdhci_set_tapdelay(struct sdhci_host *host) struct mmc *mmc = (struct mmc *)host->mmc; u8 uhsmode; - if (!IS_SD(mmc)) - return; - uhsmode = mode2timing[mmc->selected_mode]; if (uhsmode >= UHS_SDR25_BUS_SPEED) @@ -175,6 +181,9 @@ static void arasan_sdhci_set_control_reg(struct sdhci_host *host) struct mmc *mmc = (struct mmc *)host->mmc; u32 reg; + if (!IS_SD(mmc)) + return; + if (mmc->signal_voltage == MMC_SIGNAL_VOLTAGE_180) { reg = sdhci_readw(host, SDHCI_HOST_CTRL2); reg |= SDHCI_18V_SIGNAL; @@ -283,25 +292,21 @@ static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev) return -1; priv->host->name = dev->name; - priv->host->ioaddr = (void *)devfdt_get_addr(dev); - - priv->deviceid = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), - "xlnx,device_id", -1); - priv->bank = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), - "xlnx,mio_bank", -1); - if (fdt_get_property(gd->fdt_blob, dev_of_offset(dev), - "no-1-8-v", NULL)) - priv->no_1p8 = 1; - else - priv->no_1p8 = 0; #if defined(CONFIG_DM_MMC) && defined(CONFIG_ARCH_ZYNQMP) priv->host->ops = &arasan_ops; #endif - plat->f_max = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), - "max-frequency", CONFIG_ZYNQ_SDHCI_MAX_FREQ); + priv->host->ioaddr = (void *)dev_read_addr(dev); + if (IS_ERR(priv->host->ioaddr)) + return PTR_ERR(priv->host->ioaddr); + + priv->deviceid = dev_read_u32_default(dev, "xlnx,device_id", -1); + priv->bank = dev_read_u32_default(dev, "xlnx,mio_bank", -1); + priv->no_1p8 = dev_read_bool(dev, "no-1-8-v"); + plat->f_max = dev_read_u32_default(dev, "max-frequency", + CONFIG_ZYNQ_SDHCI_MAX_FREQ); return 0; } diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile index eb593c90d75..9cec06510c3 100644 --- a/drivers/mtd/Makefile +++ b/drivers/mtd/Makefile @@ -12,7 +12,6 @@ obj-$(CONFIG_MTD_CONCAT) += mtdconcat.o obj-$(CONFIG_ALTERA_QSPI) += altera_qspi.o obj-$(CONFIG_FLASH_CFI_DRIVER) += cfi_flash.o obj-$(CONFIG_FLASH_CFI_MTD) += cfi_mtd.o -obj-$(CONFIG_FTSMC020) += ftsmc020.o obj-$(CONFIG_FLASH_CFI_LEGACY) += jedec_flash.o obj-$(CONFIG_MW_EEPROM) += mw_eeprom.o obj-$(CONFIG_FLASH_PIC32) += pic32_flash.o diff --git a/drivers/mtd/ftsmc020.c b/drivers/mtd/ftsmc020.c deleted file mode 100644 index 41cdd0e59b7..00000000000 --- a/drivers/mtd/ftsmc020.c +++ /dev/null @@ -1,37 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2009 Faraday Technology - * Po-Yu Chuang <ratbert@faraday-tech.com> - */ - -#include <config.h> -#include <common.h> -#include <asm/io.h> -#include <faraday/ftsmc020.h> - -struct ftsmc020_config { - unsigned int config; - unsigned int timing; -}; - -static void ftsmc020_setup_bank(unsigned int bank, struct ftsmc020_config *cfg) -{ - struct ftsmc020 *smc = (struct ftsmc020 *)CONFIG_FTSMC020_BASE; - - if (bank > 3) { - printf("bank # %u invalid\n", bank); - return; - } - - writel(cfg->config, &smc->bank[bank].cr); - writel(cfg->timing, &smc->bank[bank].tpr); -} - -void ftsmc020_init(void) -{ - struct ftsmc020_config config[] = CONFIG_SYS_FTSMC020_CONFIGS; - int i; - - for (i = 0; i < ARRAY_SIZE(config); i++) - ftsmc020_setup_bank(i, &config[i]); -} diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 2911729b289..c1591242591 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -128,6 +128,7 @@ static int clean_bar(struct spi_flash *flash) if (flash->bank_curr == 0) return 0; cmd = flash->bank_write_cmd; + flash->bank_curr = 0; return spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1); } @@ -1202,14 +1203,15 @@ int spi_flash_scan(struct spi_flash *flash) flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0; flash->page_size = info->page_size; /* - * The Spansion S25FL032P and S25FL064P have 256b pages, yet use the - * 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with - * the 0x4d00 Extended JEDEC code have 512b pages. All of the others - * have 256b pages. + * The Spansion S25FS512S, S25FL032P and S25FL064P have 256b pages, + * yet use the 0x4d00 Extended JEDEC code. The rest of the Spansion + * flashes with the 0x4d00 Extended JEDEC code have 512b pages. + * All of the others have 256b pages. */ if (JEDEC_EXT(info) == 0x4d00) { if ((JEDEC_ID(info) != 0x0215) && - (JEDEC_ID(info) != 0x0216)) + (JEDEC_ID(info) != 0x0216) && + (JEDEC_ID(info) != 0x0220)) flash->page_size = 512; } flash->page_size <<= flash->shift; diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c index 41879d662a8..c45d2e80be0 100644 --- a/drivers/mtd/spi/spi_flash_ids.c +++ b/drivers/mtd/spi/spi_flash_ids.c @@ -63,6 +63,7 @@ const struct spi_flash_info spi_flash_ids[] = { #endif #ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */ {"gd25q64b", INFO(0xc84017, 0x0, 64 * 1024, 128, SECT_4K) }, + {"gd25q32b", INFO(0xc84016, 0x0, 64 * 1024, 64, SECT_4K) }, {"gd25lq32", INFO(0xc86016, 0x0, 64 * 1024, 64, SECT_4K) }, #endif #ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */ @@ -71,6 +72,9 @@ const struct spi_flash_info spi_flash_ids[] = { {"is25lp064", INFO(0x9d6017, 0x0, 64 * 1024, 128, 0) }, {"is25lp128", INFO(0x9d6018, 0x0, 64 * 1024, 256, 0) }, {"is25lp256", INFO(0x9d6019, 0x0, 64 * 1024, 512, 0) }, + {"is25wp032", INFO(0x9d7016, 0x0, 64 * 1024, 64, RD_FULL | SECT_4K) }, + {"is25wp064", INFO(0x9d7017, 0x0, 64 * 1024, 128, RD_FULL | SECT_4K) }, + {"is25wp128", INFO(0x9d7018, 0x0, 64 * 1024, 256, RD_FULL | SECT_4K) }, #endif #ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */ {"mx25l2006e", INFO(0xc22012, 0x0, 64 * 1024, 4, 0) }, @@ -85,6 +89,7 @@ const struct spi_flash_info spi_flash_ids[] = { {"mx25u6435f", INFO(0xc22537, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP) }, {"mx25l12855e", INFO(0xc22618, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) }, {"mx25u1635e", INFO(0xc22535, 0x0, 64 * 1024, 32, SECT_4K) }, + {"mx25u25635f", INFO(0xc22539, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP) }, {"mx66u51235f", INFO(0xc2253a, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP) }, {"mx66l1g45g", INFO(0xc2201b, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP) }, #endif @@ -174,6 +179,7 @@ const struct spi_flash_info spi_flash_ids[] = { {"w25q32dw", INFO(0xef6016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) }, {"w25q64dw", INFO(0xef6017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) }, {"w25q128fw", INFO(0xef6018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K) }, + {"w25q256fw", INFO(0xef6019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, #endif {}, /* Empty entry to terminate the list */ /* @@ -188,5 +194,6 @@ const struct spi_flash_info spi_flash_ids[] = { * (w25q32dw, w25q32fv_qpi) * (w25q64dw, w25q64fv_qpi) * (w25q128fw, w25q128fv_qpi) + * (w25q256fw, w25q256fv_qpi) */ }; diff --git a/drivers/mtd/ubi/fastmap-wl.c b/drivers/mtd/ubi/fastmap-wl.c index 675e487ae8c..4cb1377c425 100644 --- a/drivers/mtd/ubi/fastmap-wl.c +++ b/drivers/mtd/ubi/fastmap-wl.c @@ -170,6 +170,30 @@ void ubi_refill_pools(struct ubi_device *ubi) } /** + * produce_free_peb - produce a free physical eraseblock. + * @ubi: UBI device description object + * + * This function tries to make a free PEB by means of synchronous execution of + * pending works. This may be needed if, for example the background thread is + * disabled. Returns zero in case of success and a negative error code in case + * of failure. + */ +static int produce_free_peb(struct ubi_device *ubi) +{ + int err; + + while (!ubi->free.rb_node && ubi->works_count) { + dbg_wl("do one work synchronously"); + err = do_work(ubi); + + if (err) + return err; + } + + return 0; +} + +/** * ubi_wl_get_peb - get a physical eraseblock. * @ubi: UBI device description object * @@ -211,6 +235,11 @@ again: } retried = 1; up_read(&ubi->fm_eba_sem); + ret = produce_free_peb(ubi); + if (ret < 0) { + down_read(&ubi->fm_eba_sem); + goto out; + } goto again; } diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index c962d7a72c0..f2cc75f494e 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -181,7 +181,6 @@ config FTMAC100 config MVGBE bool "Marvell Orion5x/Kirkwood network interface support" depends on KIRKWOOD || ORION5X - select PHYLIB help This driver supports the network interface units in the Marvell Orion5x and Kirkwood SoCs diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 851f82fb014..584bfdf2f9f 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -58,7 +58,6 @@ obj-$(CONFIG_DRIVER_TI_EMAC) += davinci_emac.o obj-$(CONFIG_TSEC_ENET) += tsec.o fsl_mdio.o obj-$(CONFIG_DRIVER_TI_CPSW) += cpsw.o cpsw-common.o obj-$(CONFIG_FMAN_ENET) += fsl_mdio.o -obj-$(CONFIG_TSI108_ETH) += tsi108_eth.o obj-$(CONFIG_ULI526X) += uli526x.o obj-$(CONFIG_VSC7385_ENET) += vsc7385.o obj-$(CONFIG_XILINX_AXIEMAC) += xilinx_axi_emac.o diff --git a/drivers/net/ftmac100.c b/drivers/net/ftmac100.c index 6c8474893d2..c08889c4b11 100644 --- a/drivers/net/ftmac100.c +++ b/drivers/net/ftmac100.c @@ -104,18 +104,18 @@ static int _ftmac100_init(struct ftmac100_data *priv, unsigned char enetaddr[6]) for (i = 0; i < PKTBUFSRX; i++) { /* RXBUF_BADR */ - rxdes[i].rxdes2 = (unsigned int)net_rx_packets[i]; + rxdes[i].rxdes2 = (unsigned int)(unsigned long)net_rx_packets[i]; rxdes[i].rxdes1 |= FTMAC100_RXDES1_RXBUF_SIZE (PKTSIZE_ALIGN); rxdes[i].rxdes0 = FTMAC100_RXDES0_RXDMA_OWN; } /* transmit ring */ - writel ((unsigned int)txdes, &ftmac100->txr_badr); + writel ((unsigned long)txdes, &ftmac100->txr_badr); /* receive ring */ - writel ((unsigned int)rxdes, &ftmac100->rxr_badr); + writel ((unsigned long)rxdes, &ftmac100->rxr_badr); /* poll receive descriptor automatically */ @@ -192,14 +192,14 @@ static int _ftmac100_send(struct ftmac100_data *priv, void *packet, int length) return -1; } - debug ("%s(%x, %x)\n", __func__, (int)packet, length); + debug ("%s(%lx, %x)\n", __func__, (unsigned long)packet, length); length = (length < ETH_ZLEN) ? ETH_ZLEN : length; /* initiate a transmit sequence */ - flush_dcache_range((u32)packet,(u32)packet+length); - curr_des->txdes2 = (unsigned int)packet; /* TXBUF_BADR */ + flush_dcache_range((unsigned long)packet,(unsigned long)packet+length); + curr_des->txdes2 = (unsigned int)(unsigned long)packet; /* TXBUF_BADR */ curr_des->txdes1 &= FTMAC100_TXDES1_EDOTR; curr_des->txdes1 |= FTMAC100_TXDES1_FTS | @@ -343,7 +343,7 @@ static int ftmac100_recv(struct udevice *dev, int flags, uchar **packetp) int len; len = __ftmac100_recv(priv); if (len) - *packetp = (void *)curr_des->rxdes2; + *packetp = (uchar *)(unsigned long)curr_des->rxdes2; return len ? len : -EAGAIN; } diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c index 3392e5854d7..999894f0f6d 100644 --- a/drivers/net/ravb.c +++ b/drivers/net/ravb.c @@ -659,6 +659,7 @@ static const struct udevice_id ravb_ids[] = { { .compatible = "renesas,etheravb-r8a7796" }, { .compatible = "renesas,etheravb-r8a77965" }, { .compatible = "renesas,etheravb-r8a77970" }, + { .compatible = "renesas,etheravb-r8a77990" }, { .compatible = "renesas,etheravb-r8a77995" }, { .compatible = "renesas,etheravb-rcar-gen3" }, { } diff --git a/drivers/net/tsi108_eth.c b/drivers/net/tsi108_eth.c deleted file mode 100644 index 108cf61647f..00000000000 --- a/drivers/net/tsi108_eth.c +++ /dev/null @@ -1,1015 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/*********************************************************************** - * - * Copyright (c) 2005 Freescale Semiconductor, Inc. - * - * Description: - * Ethernet interface for Tundra TSI108 bridge chip - * - ***********************************************************************/ - -#include <config.h> - -#if !defined(CONFIG_TSI108_ETH_NUM_PORTS) || (CONFIG_TSI108_ETH_NUM_PORTS > 2) -#error "CONFIG_TSI108_ETH_NUM_PORTS must be defined as 1 or 2" -#endif - -#include <common.h> -#include <malloc.h> -#include <net.h> -#include <netdev.h> -#include <asm/cache.h> - -#ifdef DEBUG -#define TSI108_ETH_DEBUG 7 -#else -#define TSI108_ETH_DEBUG 0 -#endif - -#if TSI108_ETH_DEBUG > 0 -#define debug_lev(lev, fmt, args...) \ -if (lev <= TSI108_ETH_DEBUG) \ -printf ("%s %d: " fmt, __FUNCTION__, __LINE__, ##args) -#else -#define debug_lev(lev, fmt, args...) do{}while(0) -#endif - -#define RX_PRINT_ERRORS -#define TX_PRINT_ERRORS - -#define ETH_BASE (CONFIG_SYS_TSI108_CSR_BASE + 0x6000) - -#define ETH_PORT_OFFSET 0x400 - -#define __REG32(base, offset) (*((volatile u32 *)((char *)(base) + (offset)))) - -#define reg_MAC_CONFIG_1(base) __REG32(base, 0x00000000) -#define MAC_CONFIG_1_TX_ENABLE (0x00000001) -#define MAC_CONFIG_1_SYNC_TX_ENABLE (0x00000002) -#define MAC_CONFIG_1_RX_ENABLE (0x00000004) -#define MAC_CONFIG_1_SYNC_RX_ENABLE (0x00000008) -#define MAC_CONFIG_1_TX_FLOW_CONTROL (0x00000010) -#define MAC_CONFIG_1_RX_FLOW_CONTROL (0x00000020) -#define MAC_CONFIG_1_LOOP_BACK (0x00000100) -#define MAC_CONFIG_1_RESET_TX_FUNCTION (0x00010000) -#define MAC_CONFIG_1_RESET_RX_FUNCTION (0x00020000) -#define MAC_CONFIG_1_RESET_TX_MAC (0x00040000) -#define MAC_CONFIG_1_RESET_RX_MAC (0x00080000) -#define MAC_CONFIG_1_SIM_RESET (0x40000000) -#define MAC_CONFIG_1_SOFT_RESET (0x80000000) - -#define reg_MAC_CONFIG_2(base) __REG32(base, 0x00000004) -#define MAC_CONFIG_2_FULL_DUPLEX (0x00000001) -#define MAC_CONFIG_2_CRC_ENABLE (0x00000002) -#define MAC_CONFIG_2_PAD_CRC (0x00000004) -#define MAC_CONFIG_2_LENGTH_CHECK (0x00000010) -#define MAC_CONFIG_2_HUGE_FRAME (0x00000020) -#define MAC_CONFIG_2_INTERFACE_MODE(val) (((val) & 0x3) << 8) -#define MAC_CONFIG_2_PREAMBLE_LENGTH(val) (((val) & 0xf) << 12) -#define INTERFACE_MODE_NIBBLE 1 /* 10/100 Mb/s MII) */ -#define INTERFACE_MODE_BYTE 2 /* 1000 Mb/s GMII/TBI */ - -#define reg_MAXIMUM_FRAME_LENGTH(base) __REG32(base, 0x00000010) - -#define reg_MII_MGMT_CONFIG(base) __REG32(base, 0x00000020) -#define MII_MGMT_CONFIG_MGMT_CLOCK_SELECT(val) ((val) & 0x7) -#define MII_MGMT_CONFIG_NO_PREAMBLE (0x00000010) -#define MII_MGMT_CONFIG_SCAN_INCREMENT (0x00000020) -#define MII_MGMT_CONFIG_RESET_MGMT (0x80000000) - -#define reg_MII_MGMT_COMMAND(base) __REG32(base, 0x00000024) -#define MII_MGMT_COMMAND_READ_CYCLE (0x00000001) -#define MII_MGMT_COMMAND_SCAN_CYCLE (0x00000002) - -#define reg_MII_MGMT_ADDRESS(base) __REG32(base, 0x00000028) -#define reg_MII_MGMT_CONTROL(base) __REG32(base, 0x0000002c) -#define reg_MII_MGMT_STATUS(base) __REG32(base, 0x00000030) - -#define reg_MII_MGMT_INDICATORS(base) __REG32(base, 0x00000034) -#define MII_MGMT_INDICATORS_BUSY (0x00000001) -#define MII_MGMT_INDICATORS_SCAN (0x00000002) -#define MII_MGMT_INDICATORS_NOT_VALID (0x00000004) - -#define reg_INTERFACE_STATUS(base) __REG32(base, 0x0000003c) -#define INTERFACE_STATUS_LINK_FAIL (0x00000008) -#define INTERFACE_STATUS_EXCESS_DEFER (0x00000200) - -#define reg_STATION_ADDRESS_1(base) __REG32(base, 0x00000040) -#define reg_STATION_ADDRESS_2(base) __REG32(base, 0x00000044) - -#define reg_PORT_CONTROL(base) __REG32(base, 0x00000200) -#define PORT_CONTROL_PRI (0x00000001) -#define PORT_CONTROL_BPT (0x00010000) -#define PORT_CONTROL_SPD (0x00040000) -#define PORT_CONTROL_RBC (0x00080000) -#define PORT_CONTROL_PRB (0x00200000) -#define PORT_CONTROL_DIS (0x00400000) -#define PORT_CONTROL_TBI (0x00800000) -#define PORT_CONTROL_STE (0x10000000) -#define PORT_CONTROL_ZOR (0x20000000) -#define PORT_CONTROL_CLR (0x40000000) -#define PORT_CONTROL_SRT (0x80000000) - -#define reg_TX_CONFIG(base) __REG32(base, 0x00000220) -#define TX_CONFIG_START_Q (0x00000003) -#define TX_CONFIG_EHP (0x00400000) -#define TX_CONFIG_CHP (0x00800000) -#define TX_CONFIG_RST (0x80000000) - -#define reg_TX_CONTROL(base) __REG32(base, 0x00000224) -#define TX_CONTROL_GO (0x00008000) -#define TX_CONTROL_MP (0x01000000) -#define TX_CONTROL_EAI (0x20000000) -#define TX_CONTROL_ABT (0x40000000) -#define TX_CONTROL_EII (0x80000000) - -#define reg_TX_STATUS(base) __REG32(base, 0x00000228) -#define TX_STATUS_QUEUE_USABLE (0x0000000f) -#define TX_STATUS_CURR_Q (0x00000300) -#define TX_STATUS_ACT (0x00008000) -#define TX_STATUS_QUEUE_IDLE (0x000f0000) -#define TX_STATUS_EOQ_PENDING (0x0f000000) - -#define reg_TX_EXTENDED_STATUS(base) __REG32(base, 0x0000022c) -#define TX_EXTENDED_STATUS_END_OF_QUEUE_CONDITION (0x0000000f) -#define TX_EXTENDED_STATUS_END_OF_FRAME_CONDITION (0x00000f00) -#define TX_EXTENDED_STATUS_DESCRIPTOR_INTERRUPT_CONDITION (0x000f0000) -#define TX_EXTENDED_STATUS_ERROR_FLAG (0x0f000000) - -#define reg_TX_THRESHOLDS(base) __REG32(base, 0x00000230) - -#define reg_TX_DIAGNOSTIC_ADDR(base) __REG32(base, 0x00000270) -#define TX_DIAGNOSTIC_ADDR_INDEX (0x0000007f) -#define TX_DIAGNOSTIC_ADDR_DFR (0x40000000) -#define TX_DIAGNOSTIC_ADDR_AI (0x80000000) - -#define reg_TX_DIAGNOSTIC_DATA(base) __REG32(base, 0x00000274) - -#define reg_TX_ERROR_STATUS(base) __REG32(base, 0x00000278) -#define TX_ERROR_STATUS (0x00000278) -#define TX_ERROR_STATUS_QUEUE_0_ERROR_RESPONSE (0x0000000f) -#define TX_ERROR_STATUS_TEA_ON_QUEUE_0 (0x00000010) -#define TX_ERROR_STATUS_RER_ON_QUEUE_0 (0x00000020) -#define TX_ERROR_STATUS_TER_ON_QUEUE_0 (0x00000040) -#define TX_ERROR_STATUS_DER_ON_QUEUE_0 (0x00000080) -#define TX_ERROR_STATUS_QUEUE_1_ERROR_RESPONSE (0x00000f00) -#define TX_ERROR_STATUS_TEA_ON_QUEUE_1 (0x00001000) -#define TX_ERROR_STATUS_RER_ON_QUEUE_1 (0x00002000) -#define TX_ERROR_STATUS_TER_ON_QUEUE_1 (0x00004000) -#define TX_ERROR_STATUS_DER_ON_QUEUE_1 (0x00008000) -#define TX_ERROR_STATUS_QUEUE_2_ERROR_RESPONSE (0x000f0000) -#define TX_ERROR_STATUS_TEA_ON_QUEUE_2 (0x00100000) -#define TX_ERROR_STATUS_RER_ON_QUEUE_2 (0x00200000) -#define TX_ERROR_STATUS_TER_ON_QUEUE_2 (0x00400000) -#define TX_ERROR_STATUS_DER_ON_QUEUE_2 (0x00800000) -#define TX_ERROR_STATUS_QUEUE_3_ERROR_RESPONSE (0x0f000000) -#define TX_ERROR_STATUS_TEA_ON_QUEUE_3 (0x10000000) -#define TX_ERROR_STATUS_RER_ON_QUEUE_3 (0x20000000) -#define TX_ERROR_STATUS_TER_ON_QUEUE_3 (0x40000000) -#define TX_ERROR_STATUS_DER_ON_QUEUE_3 (0x80000000) - -#define reg_TX_QUEUE_0_CONFIG(base) __REG32(base, 0x00000280) -#define TX_QUEUE_0_CONFIG_OCN_PORT (0x0000003f) -#define TX_QUEUE_0_CONFIG_BSWP (0x00000400) -#define TX_QUEUE_0_CONFIG_WSWP (0x00000800) -#define TX_QUEUE_0_CONFIG_AM (0x00004000) -#define TX_QUEUE_0_CONFIG_GVI (0x00008000) -#define TX_QUEUE_0_CONFIG_EEI (0x00010000) -#define TX_QUEUE_0_CONFIG_ELI (0x00020000) -#define TX_QUEUE_0_CONFIG_ENI (0x00040000) -#define TX_QUEUE_0_CONFIG_ESI (0x00080000) -#define TX_QUEUE_0_CONFIG_EDI (0x00100000) - -#define reg_TX_QUEUE_0_BUF_CONFIG(base) __REG32(base, 0x00000284) -#define TX_QUEUE_0_BUF_CONFIG_OCN_PORT (0x0000003f) -#define TX_QUEUE_0_BUF_CONFIG_BURST (0x00000300) -#define TX_QUEUE_0_BUF_CONFIG_BSWP (0x00000400) -#define TX_QUEUE_0_BUF_CONFIG_WSWP (0x00000800) - -#define OCN_PORT_HLP 0 /* HLP Interface */ -#define OCN_PORT_PCI_X 1 /* PCI-X Interface */ -#define OCN_PORT_PROCESSOR_MASTER 2 /* Processor Interface (master) */ -#define OCN_PORT_PROCESSOR_SLAVE 3 /* Processor Interface (slave) */ -#define OCN_PORT_MEMORY 4 /* Memory Controller */ -#define OCN_PORT_DMA 5 /* DMA Controller */ -#define OCN_PORT_ETHERNET 6 /* Ethernet Controller */ -#define OCN_PORT_PRINT 7 /* Print Engine Interface */ - -#define reg_TX_QUEUE_0_PTR_LOW(base) __REG32(base, 0x00000288) - -#define reg_TX_QUEUE_0_PTR_HIGH(base) __REG32(base, 0x0000028c) -#define TX_QUEUE_0_PTR_HIGH_VALID (0x80000000) - -#define reg_RX_CONFIG(base) __REG32(base, 0x00000320) -#define RX_CONFIG_DEF_Q (0x00000003) -#define RX_CONFIG_EMF (0x00000100) -#define RX_CONFIG_EUF (0x00000200) -#define RX_CONFIG_BFE (0x00000400) -#define RX_CONFIG_MFE (0x00000800) -#define RX_CONFIG_UFE (0x00001000) -#define RX_CONFIG_SE (0x00002000) -#define RX_CONFIG_ABF (0x00200000) -#define RX_CONFIG_APE (0x00400000) -#define RX_CONFIG_CHP (0x00800000) -#define RX_CONFIG_RST (0x80000000) - -#define reg_RX_CONTROL(base) __REG32(base, 0x00000324) -#define GE_E0_RX_CONTROL_QUEUE_ENABLES (0x0000000f) -#define GE_E0_RX_CONTROL_GO (0x00008000) -#define GE_E0_RX_CONTROL_EAI (0x20000000) -#define GE_E0_RX_CONTROL_ABT (0x40000000) -#define GE_E0_RX_CONTROL_EII (0x80000000) - -#define reg_RX_EXTENDED_STATUS(base) __REG32(base, 0x0000032c) -#define RX_EXTENDED_STATUS (0x0000032c) -#define RX_EXTENDED_STATUS_EOQ (0x0000000f) -#define RX_EXTENDED_STATUS_EOQ_0 (0x00000001) -#define RX_EXTENDED_STATUS_EOF (0x00000f00) -#define RX_EXTENDED_STATUS_DESCRIPTOR_INTERRUPT_CONDITION (0x000f0000) -#define RX_EXTENDED_STATUS_ERROR_FLAG (0x0f000000) - -#define reg_RX_THRESHOLDS(base) __REG32(base, 0x00000330) - -#define reg_RX_DIAGNOSTIC_ADDR(base) __REG32(base, 0x00000370) -#define RX_DIAGNOSTIC_ADDR_INDEX (0x0000007f) -#define RX_DIAGNOSTIC_ADDR_DFR (0x40000000) -#define RX_DIAGNOSTIC_ADDR_AI (0x80000000) - -#define reg_RX_DIAGNOSTIC_DATA(base) __REG32(base, 0x00000374) - -#define reg_RX_QUEUE_0_CONFIG(base) __REG32(base, 0x00000380) -#define RX_QUEUE_0_CONFIG_OCN_PORT (0x0000003f) -#define RX_QUEUE_0_CONFIG_BSWP (0x00000400) -#define RX_QUEUE_0_CONFIG_WSWP (0x00000800) -#define RX_QUEUE_0_CONFIG_AM (0x00004000) -#define RX_QUEUE_0_CONFIG_EEI (0x00010000) -#define RX_QUEUE_0_CONFIG_ELI (0x00020000) -#define RX_QUEUE_0_CONFIG_ENI (0x00040000) -#define RX_QUEUE_0_CONFIG_ESI (0x00080000) -#define RX_QUEUE_0_CONFIG_EDI (0x00100000) - -#define reg_RX_QUEUE_0_BUF_CONFIG(base) __REG32(base, 0x00000384) -#define RX_QUEUE_0_BUF_CONFIG_OCN_PORT (0x0000003f) -#define RX_QUEUE_0_BUF_CONFIG_BURST (0x00000300) -#define RX_QUEUE_0_BUF_CONFIG_BSWP (0x00000400) -#define RX_QUEUE_0_BUF_CONFIG_WSWP (0x00000800) - -#define reg_RX_QUEUE_0_PTR_LOW(base) __REG32(base, 0x00000388) - -#define reg_RX_QUEUE_0_PTR_HIGH(base) __REG32(base, 0x0000038c) -#define RX_QUEUE_0_PTR_HIGH_VALID (0x80000000) - -/* - * PHY register definitions - */ -/* the first 15 PHY registers are standard. */ -#define PHY_CTRL_REG 0 /* Control Register */ -#define PHY_STATUS_REG 1 /* Status Regiser */ -#define PHY_ID1_REG 2 /* Phy Id Reg (word 1) */ -#define PHY_ID2_REG 3 /* Phy Id Reg (word 2) */ -#define PHY_AN_ADV_REG 4 /* Autoneg Advertisement */ -#define PHY_LP_ABILITY_REG 5 /* Link Partner Ability (Base Page) */ -#define PHY_AUTONEG_EXP_REG 6 /* Autoneg Expansion Reg */ -#define PHY_NEXT_PAGE_TX_REG 7 /* Next Page TX */ -#define PHY_LP_NEXT_PAGE_REG 8 /* Link Partner Next Page */ -#define PHY_1000T_CTRL_REG 9 /* 1000Base-T Control Reg */ -#define PHY_1000T_STATUS_REG 10 /* 1000Base-T Status Reg */ -#define PHY_EXT_STATUS_REG 11 /* Extended Status Reg */ - -/* - * PHY Register bit masks. - */ -#define PHY_CTRL_RESET (1 << 15) -#define PHY_CTRL_LOOPBACK (1 << 14) -#define PHY_CTRL_SPEED0 (1 << 13) -#define PHY_CTRL_AN_EN (1 << 12) -#define PHY_CTRL_PWR_DN (1 << 11) -#define PHY_CTRL_ISOLATE (1 << 10) -#define PHY_CTRL_RESTART_AN (1 << 9) -#define PHY_CTRL_FULL_DUPLEX (1 << 8) -#define PHY_CTRL_CT_EN (1 << 7) -#define PHY_CTRL_SPEED1 (1 << 6) - -#define PHY_STAT_100BASE_T4 (1 << 15) -#define PHY_STAT_100BASE_X_FD (1 << 14) -#define PHY_STAT_100BASE_X_HD (1 << 13) -#define PHY_STAT_10BASE_T_FD (1 << 12) -#define PHY_STAT_10BASE_T_HD (1 << 11) -#define PHY_STAT_100BASE_T2_FD (1 << 10) -#define PHY_STAT_100BASE_T2_HD (1 << 9) -#define PHY_STAT_EXT_STAT (1 << 8) -#define PHY_STAT_RESERVED (1 << 7) -#define PHY_STAT_MFPS (1 << 6) /* Management Frames Preamble Suppression */ -#define PHY_STAT_AN_COMPLETE (1 << 5) -#define PHY_STAT_REM_FAULT (1 << 4) -#define PHY_STAT_AN_CAP (1 << 3) -#define PHY_STAT_LINK_UP (1 << 2) -#define PHY_STAT_JABBER (1 << 1) -#define PHY_STAT_EXT_CAP (1 << 0) - -#define TBI_CONTROL_2 0x11 -#define TBI_CONTROL_2_ENABLE_COMMA_DETECT 0x0001 -#define TBI_CONTROL_2_ENABLE_WRAP 0x0002 -#define TBI_CONTROL_2_G_MII_MODE 0x0010 -#define TBI_CONTROL_2_RECEIVE_CLOCK_SELECT 0x0020 -#define TBI_CONTROL_2_AUTO_NEGOTIATION_SENSE 0x0100 -#define TBI_CONTROL_2_DISABLE_TRANSMIT_RUNNING_DISPARITY 0x1000 -#define TBI_CONTROL_2_DISABLE_RECEIVE_RUNNING_DISPARITY 0x2000 -#define TBI_CONTROL_2_SHORTCUT_LINK_TIMER 0x4000 -#define TBI_CONTROL_2_SOFT_RESET 0x8000 - -/* marvel specific */ -#define MV1111_EXT_CTRL1_REG 16 /* PHY Specific Control Reg */ -#define MV1111_SPEC_STAT_REG 17 /* PHY Specific Status Reg */ -#define MV1111_EXT_CTRL2_REG 20 /* Extended PHY Specific Control Reg */ - -/* - * MARVELL 88E1111 PHY register bit masks - */ -/* PHY Specific Status Register (MV1111_EXT_CTRL1_REG) */ - -#define SPEC_STAT_SPEED_MASK (3 << 14) -#define SPEC_STAT_FULL_DUP (1 << 13) -#define SPEC_STAT_PAGE_RCVD (1 << 12) -#define SPEC_STAT_RESOLVED (1 << 11) /* Speed and Duplex Resolved */ -#define SPEC_STAT_LINK_UP (1 << 10) -#define SPEC_STAT_CABLE_LEN_MASK (7 << 7)/* Cable Length (100/1000 modes only) */ -#define SPEC_STAT_MDIX (1 << 6) -#define SPEC_STAT_POLARITY (1 << 1) -#define SPEC_STAT_JABBER (1 << 0) - -#define SPEED_1000 (2 << 14) -#define SPEED_100 (1 << 14) -#define SPEED_10 (0 << 14) - -#define TBI_ADDR 0x1E /* Ten Bit Interface address */ - -/* negotiated link parameters */ -#define LINK_SPEED_UNKNOWN 0 -#define LINK_SPEED_10 1 -#define LINK_SPEED_100 2 -#define LINK_SPEED_1000 3 - -#define LINK_DUPLEX_UNKNOWN 0 -#define LINK_DUPLEX_HALF 1 -#define LINK_DUPLEX_FULL 2 - -static unsigned int phy_address[] = { 8, 9 }; - -#define vuint32 volatile u32 - -/* TX/RX buffer descriptors. MUST be cache line aligned in memory. (32 byte) - * This structure is accessed by the ethernet DMA engine which means it - * MUST be in LITTLE ENDIAN format */ -struct dma_descriptor { - vuint32 start_addr0; /* buffer address, least significant bytes. */ - vuint32 start_addr1; /* buffer address, most significant bytes. */ - vuint32 next_descr_addr0;/* next descriptor address, least significant bytes. Must be 64-bit aligned. */ - vuint32 next_descr_addr1;/* next descriptor address, most significant bytes. */ - vuint32 vlan_byte_count;/* VLAN tag(top 2 bytes) and byte countt (bottom 2 bytes). */ - vuint32 config_status; /* Configuration/Status. */ - vuint32 reserved1; /* reserved to make the descriptor cache line aligned. */ - vuint32 reserved2; /* reserved to make the descriptor cache line aligned. */ -}; - -/* last next descriptor address flag */ -#define DMA_DESCR_LAST (1 << 31) - -/* TX DMA descriptor config status bits */ -#define DMA_DESCR_TX_EOF (1 << 0) /* end of frame */ -#define DMA_DESCR_TX_SOF (1 << 1) /* start of frame */ -#define DMA_DESCR_TX_PFVLAN (1 << 2) -#define DMA_DESCR_TX_HUGE (1 << 3) -#define DMA_DESCR_TX_PAD (1 << 4) -#define DMA_DESCR_TX_CRC (1 << 5) -#define DMA_DESCR_TX_DESCR_INT (1 << 14) -#define DMA_DESCR_TX_RETRY_COUNT 0x000F0000 -#define DMA_DESCR_TX_ONE_COLLISION (1 << 20) -#define DMA_DESCR_TX_LATE_COLLISION (1 << 24) -#define DMA_DESCR_TX_UNDERRUN (1 << 25) -#define DMA_DESCR_TX_RETRY_LIMIT (1 << 26) -#define DMA_DESCR_TX_OK (1 << 30) -#define DMA_DESCR_TX_OWNER (1 << 31) - -/* RX DMA descriptor status bits */ -#define DMA_DESCR_RX_EOF (1 << 0) -#define DMA_DESCR_RX_SOF (1 << 1) -#define DMA_DESCR_RX_VTF (1 << 2) -#define DMA_DESCR_RX_FRAME_IS_TYPE (1 << 3) -#define DMA_DESCR_RX_SHORT_FRAME (1 << 4) -#define DMA_DESCR_RX_HASH_MATCH (1 << 7) -#define DMA_DESCR_RX_BAD_FRAME (1 << 8) -#define DMA_DESCR_RX_OVERRUN (1 << 9) -#define DMA_DESCR_RX_MAX_FRAME_LEN (1 << 11) -#define DMA_DESCR_RX_CRC_ERROR (1 << 12) -#define DMA_DESCR_RX_DESCR_INT (1 << 13) -#define DMA_DESCR_RX_OWNER (1 << 15) - -#define RX_BUFFER_SIZE PKTSIZE -#define NUM_RX_DESC PKTBUFSRX - -static struct dma_descriptor tx_descriptor __attribute__ ((aligned(32))); - -static struct dma_descriptor rx_descr_array[NUM_RX_DESC] - __attribute__ ((aligned(32))); - -static struct dma_descriptor *rx_descr_current; - -static int tsi108_eth_probe (struct eth_device *dev, bd_t * bis); -static int tsi108_eth_send(struct eth_device *dev, void *packet, int length); -static int tsi108_eth_recv (struct eth_device *dev); -static void tsi108_eth_halt (struct eth_device *dev); -static unsigned int read_phy (unsigned int base, - unsigned int phy_addr, unsigned int phy_reg); -static void write_phy (unsigned int base, - unsigned int phy_addr, - unsigned int phy_reg, unsigned int phy_data); - -#if TSI108_ETH_DEBUG > 100 -/* - * print phy debug infomation - */ -static void dump_phy_regs (unsigned int phy_addr) -{ - int i; - - printf ("PHY %d registers\n", phy_addr); - for (i = 0; i <= 30; i++) { - printf ("%2d 0x%04x\n", i, read_phy (ETH_BASE, phy_addr, i)); - } - printf ("\n"); - -} -#else -#define dump_phy_regs(base) do{}while(0) -#endif - -#if TSI108_ETH_DEBUG > 100 -/* - * print debug infomation - */ -static void tx_diag_regs (unsigned int base) -{ - int i; - unsigned long dummy; - - printf ("TX diagnostics registers\n"); - reg_TX_DIAGNOSTIC_ADDR(base) = 0x00 | TX_DIAGNOSTIC_ADDR_AI; - udelay (1000); - dummy = reg_TX_DIAGNOSTIC_DATA(base); - for (i = 0x00; i <= 0x05; i++) { - udelay (1000); - printf ("0x%02x 0x%08x\n", i, reg_TX_DIAGNOSTIC_DATA(base)); - } - reg_TX_DIAGNOSTIC_ADDR(base) = 0x40 | TX_DIAGNOSTIC_ADDR_AI; - udelay (1000); - dummy = reg_TX_DIAGNOSTIC_DATA(base); - for (i = 0x40; i <= 0x47; i++) { - udelay (1000); - printf ("0x%02x 0x%08x\n", i, reg_TX_DIAGNOSTIC_DATA(base)); - } - printf ("\n"); - -} -#else -#define tx_diag_regs(base) do{}while(0) -#endif - -#if TSI108_ETH_DEBUG > 100 -/* - * print debug infomation - */ -static void rx_diag_regs (unsigned int base) -{ - int i; - unsigned long dummy; - - printf ("RX diagnostics registers\n"); - reg_RX_DIAGNOSTIC_ADDR(base) = 0x00 | RX_DIAGNOSTIC_ADDR_AI; - udelay (1000); - dummy = reg_RX_DIAGNOSTIC_DATA(base); - for (i = 0x00; i <= 0x05; i++) { - udelay (1000); - printf ("0x%02x 0x%08x\n", i, reg_RX_DIAGNOSTIC_DATA(base)); - } - reg_RX_DIAGNOSTIC_ADDR(base) = 0x40 | RX_DIAGNOSTIC_ADDR_AI; - udelay (1000); - dummy = reg_RX_DIAGNOSTIC_DATA(base); - for (i = 0x08; i <= 0x0a; i++) { - udelay (1000); - printf ("0x%02x 0x%08x\n", i, reg_RX_DIAGNOSTIC_DATA(base)); - } - printf ("\n"); - -} -#else -#define rx_diag_regs(base) do{}while(0) -#endif - -#if TSI108_ETH_DEBUG > 100 -/* - * print debug infomation - */ -static void debug_mii_regs (unsigned int base) -{ - printf ("MII_MGMT_CONFIG 0x%08x\n", reg_MII_MGMT_CONFIG(base)); - printf ("MII_MGMT_COMMAND 0x%08x\n", reg_MII_MGMT_COMMAND(base)); - printf ("MII_MGMT_ADDRESS 0x%08x\n", reg_MII_MGMT_ADDRESS(base)); - printf ("MII_MGMT_CONTROL 0x%08x\n", reg_MII_MGMT_CONTROL(base)); - printf ("MII_MGMT_STATUS 0x%08x\n", reg_MII_MGMT_STATUS(base)); - printf ("MII_MGMT_INDICATORS 0x%08x\n", reg_MII_MGMT_INDICATORS(base)); - printf ("\n"); - -} -#else -#define debug_mii_regs(base) do{}while(0) -#endif - -/* - * Wait until the phy bus is non-busy - */ -static void phy_wait (unsigned int base, unsigned int condition) -{ - int timeout; - - timeout = 0; - while (reg_MII_MGMT_INDICATORS(base) & condition) { - udelay (10); - if (++timeout > 10000) { - printf ("ERROR: timeout waiting for phy bus (%d)\n", - condition); - break; - } - } -} - -/* - * read phy register - */ -static unsigned int read_phy (unsigned int base, - unsigned int phy_addr, unsigned int phy_reg) -{ - unsigned int value; - - phy_wait (base, MII_MGMT_INDICATORS_BUSY); - - reg_MII_MGMT_ADDRESS(base) = (phy_addr << 8) | phy_reg; - - /* Ensure that the Read Cycle bit is cleared prior to next read cycle */ - reg_MII_MGMT_COMMAND(base) = 0; - - /* start the read */ - reg_MII_MGMT_COMMAND(base) = MII_MGMT_COMMAND_READ_CYCLE; - - /* wait for the read to complete */ - phy_wait (base, - MII_MGMT_INDICATORS_NOT_VALID | MII_MGMT_INDICATORS_BUSY); - - value = reg_MII_MGMT_STATUS(base); - - reg_MII_MGMT_COMMAND(base) = 0; - - return value; -} - -/* - * write phy register - */ -static void write_phy (unsigned int base, - unsigned int phy_addr, - unsigned int phy_reg, unsigned int phy_data) -{ - phy_wait (base, MII_MGMT_INDICATORS_BUSY); - - reg_MII_MGMT_ADDRESS(base) = (phy_addr << 8) | phy_reg; - - /* Ensure that the Read Cycle bit is cleared prior to next cycle */ - reg_MII_MGMT_COMMAND(base) = 0; - - /* start the write */ - reg_MII_MGMT_CONTROL(base) = phy_data; -} - -/* - * configure the marvell 88e1111 phy - */ -static int marvell_88e_phy_config (struct eth_device *dev, int *speed, - int *duplex) -{ - unsigned long base; - unsigned long phy_addr; - unsigned int phy_status; - unsigned int phy_spec_status; - int timeout; - int phy_speed; - int phy_duplex; - unsigned int value; - - phy_speed = LINK_SPEED_UNKNOWN; - phy_duplex = LINK_DUPLEX_UNKNOWN; - - base = dev->iobase; - phy_addr = (unsigned long)dev->priv; - - /* Take the PHY out of reset. */ - write_phy (ETH_BASE, phy_addr, PHY_CTRL_REG, PHY_CTRL_RESET); - - /* Wait for the reset process to complete. */ - udelay (10); - timeout = 0; - while ((phy_status = - read_phy (ETH_BASE, phy_addr, PHY_CTRL_REG)) & PHY_CTRL_RESET) { - udelay (10); - if (++timeout > 10000) { - printf ("ERROR: timeout waiting for phy reset\n"); - break; - } - } - - /* TBI Configuration. */ - write_phy (base, TBI_ADDR, TBI_CONTROL_2, TBI_CONTROL_2_G_MII_MODE | - TBI_CONTROL_2_RECEIVE_CLOCK_SELECT); - /* Wait for the link to be established. */ - timeout = 0; - do { - udelay (20000); - phy_status = read_phy (ETH_BASE, phy_addr, PHY_STATUS_REG); - if (++timeout > 100) { - debug_lev(1, "ERROR: unable to establish link!!!\n"); - break; - } - } while ((phy_status & PHY_STAT_LINK_UP) == 0); - - if ((phy_status & PHY_STAT_LINK_UP) == 0) - return 0; - - value = 0; - phy_spec_status = read_phy (ETH_BASE, phy_addr, MV1111_SPEC_STAT_REG); - if (phy_spec_status & SPEC_STAT_RESOLVED) { - switch (phy_spec_status & SPEC_STAT_SPEED_MASK) { - case SPEED_1000: - phy_speed = LINK_SPEED_1000; - value |= PHY_CTRL_SPEED1; - break; - case SPEED_100: - phy_speed = LINK_SPEED_100; - value |= PHY_CTRL_SPEED0; - break; - case SPEED_10: - phy_speed = LINK_SPEED_10; - break; - } - if (phy_spec_status & SPEC_STAT_FULL_DUP) { - phy_duplex = LINK_DUPLEX_FULL; - value |= PHY_CTRL_FULL_DUPLEX; - } else - phy_duplex = LINK_DUPLEX_HALF; - } - /* set TBI speed */ - write_phy (base, TBI_ADDR, PHY_CTRL_REG, value); - write_phy (base, TBI_ADDR, PHY_AN_ADV_REG, 0x0060); - -#if TSI108_ETH_DEBUG > 0 - printf ("%s link is up", dev->name); - phy_spec_status = read_phy (ETH_BASE, phy_addr, MV1111_SPEC_STAT_REG); - if (phy_spec_status & SPEC_STAT_RESOLVED) { - switch (phy_speed) { - case LINK_SPEED_1000: - printf (", 1000 Mbps"); - break; - case LINK_SPEED_100: - printf (", 100 Mbps"); - break; - case LINK_SPEED_10: - printf (", 10 Mbps"); - break; - } - if (phy_duplex == LINK_DUPLEX_FULL) - printf (", Full duplex"); - else - printf (", Half duplex"); - } - printf ("\n"); -#endif - - dump_phy_regs (TBI_ADDR); - if (speed) - *speed = phy_speed; - if (duplex) - *duplex = phy_duplex; - - return 1; -} - -/* - * External interface - * - * register the tsi108 ethernet controllers with the multi-ethernet system - */ -int tsi108_eth_initialize (bd_t * bis) -{ - struct eth_device *dev; - int index; - - for (index = 0; index < CONFIG_TSI108_ETH_NUM_PORTS; index++) { - dev = (struct eth_device *)malloc(sizeof(struct eth_device)); - if (!dev) { - printf("tsi108: Can not allocate memory\n"); - break; - } - memset(dev, 0, sizeof(*dev)); - sprintf (dev->name, "TSI108_eth%d", index); - - dev->iobase = ETH_BASE + (index * ETH_PORT_OFFSET); - dev->priv = (void *)(phy_address[index]); - dev->init = tsi108_eth_probe; - dev->halt = tsi108_eth_halt; - dev->send = tsi108_eth_send; - dev->recv = tsi108_eth_recv; - - eth_register(dev); - } - return index; -} - -/* - * probe for and initialize a single ethernet interface - */ -static int tsi108_eth_probe (struct eth_device *dev, bd_t * bis) -{ - unsigned long base; - unsigned long value; - int index; - struct dma_descriptor *tx_descr; - struct dma_descriptor *rx_descr; - int speed; - int duplex; - - base = dev->iobase; - - reg_PORT_CONTROL(base) = PORT_CONTROL_STE | PORT_CONTROL_BPT; - - /* Bring DMA/FIFO out of reset. */ - reg_TX_CONFIG(base) = 0x00000000; - reg_RX_CONFIG(base) = 0x00000000; - - reg_TX_THRESHOLDS(base) = (192 << 16) | 192; - reg_RX_THRESHOLDS(base) = (192 << 16) | 112; - - /* Bring MAC out of reset. */ - reg_MAC_CONFIG_1(base) = 0x00000000; - - /* DMA MAC configuration. */ - reg_MAC_CONFIG_1(base) = - MAC_CONFIG_1_RX_ENABLE | MAC_CONFIG_1_TX_ENABLE; - - reg_MII_MGMT_CONFIG(base) = MII_MGMT_CONFIG_NO_PREAMBLE; - reg_MAXIMUM_FRAME_LENGTH(base) = RX_BUFFER_SIZE; - - /* Note: Early tsi108 manual did not have correct byte order - * for the station address.*/ - reg_STATION_ADDRESS_1(base) = (dev->enetaddr[5] << 24) | - (dev->enetaddr[4] << 16) | - (dev->enetaddr[3] << 8) | (dev->enetaddr[2] << 0); - - reg_STATION_ADDRESS_2(base) = (dev->enetaddr[1] << 24) | - (dev->enetaddr[0] << 16); - - if (marvell_88e_phy_config(dev, &speed, &duplex) == 0) - return -1; - - value = - MAC_CONFIG_2_PREAMBLE_LENGTH(7) | MAC_CONFIG_2_PAD_CRC | - MAC_CONFIG_2_CRC_ENABLE; - if (speed == LINK_SPEED_1000) - value |= MAC_CONFIG_2_INTERFACE_MODE(INTERFACE_MODE_BYTE); - else { - value |= MAC_CONFIG_2_INTERFACE_MODE(INTERFACE_MODE_NIBBLE); - reg_PORT_CONTROL(base) |= PORT_CONTROL_SPD; - } - if (duplex == LINK_DUPLEX_FULL) { - value |= MAC_CONFIG_2_FULL_DUPLEX; - reg_PORT_CONTROL(base) &= ~PORT_CONTROL_BPT; - } else - reg_PORT_CONTROL(base) |= PORT_CONTROL_BPT; - reg_MAC_CONFIG_2(base) = value; - - reg_RX_CONFIG(base) = RX_CONFIG_SE; - reg_RX_QUEUE_0_CONFIG(base) = OCN_PORT_MEMORY; - reg_RX_QUEUE_0_BUF_CONFIG(base) = OCN_PORT_MEMORY; - - /* initialize the RX DMA descriptors */ - rx_descr = &rx_descr_array[0]; - rx_descr_current = rx_descr; - for (index = 0; index < NUM_RX_DESC; index++) { - /* make sure the receive buffers are not in cache */ - invalidate_dcache_range((unsigned long)net_rx_packets[index], - (unsigned long)net_rx_packets[index] + - RX_BUFFER_SIZE); - rx_descr->start_addr0 = - cpu_to_le32((vuint32) net_rx_packets[index]); - rx_descr->start_addr1 = 0; - rx_descr->next_descr_addr0 = - cpu_to_le32((vuint32) (rx_descr + 1)); - rx_descr->next_descr_addr1 = 0; - rx_descr->vlan_byte_count = 0; - rx_descr->config_status = cpu_to_le32((RX_BUFFER_SIZE << 16) | - DMA_DESCR_RX_OWNER); - rx_descr++; - } - rx_descr--; - rx_descr->next_descr_addr0 = 0; - rx_descr->next_descr_addr1 = cpu_to_le32(DMA_DESCR_LAST); - /* Push the descriptors to RAM so the ethernet DMA can see them */ - invalidate_dcache_range((unsigned long)rx_descr_array, - (unsigned long)rx_descr_array + - sizeof(rx_descr_array)); - - /* enable RX queue */ - reg_RX_CONTROL(base) = TX_CONTROL_GO | 0x01; - reg_RX_QUEUE_0_PTR_LOW(base) = (u32) rx_descr_current; - /* enable receive DMA */ - reg_RX_QUEUE_0_PTR_HIGH(base) = RX_QUEUE_0_PTR_HIGH_VALID; - - reg_TX_QUEUE_0_CONFIG(base) = OCN_PORT_MEMORY; - reg_TX_QUEUE_0_BUF_CONFIG(base) = OCN_PORT_MEMORY; - - /* initialize the TX DMA descriptor */ - tx_descr = &tx_descriptor; - - tx_descr->start_addr0 = 0; - tx_descr->start_addr1 = 0; - tx_descr->next_descr_addr0 = 0; - tx_descr->next_descr_addr1 = cpu_to_le32(DMA_DESCR_LAST); - tx_descr->vlan_byte_count = 0; - tx_descr->config_status = cpu_to_le32(DMA_DESCR_TX_OK | - DMA_DESCR_TX_SOF | - DMA_DESCR_TX_EOF); - /* enable TX queue */ - reg_TX_CONTROL(base) = TX_CONTROL_GO | 0x01; - - return 0; -} - -/* - * send a packet - */ -static int tsi108_eth_send(struct eth_device *dev, void *packet, int length) -{ - unsigned long base; - int timeout; - struct dma_descriptor *tx_descr; - unsigned long status; - - base = dev->iobase; - tx_descr = &tx_descriptor; - - /* Wait until the last packet has been transmitted. */ - timeout = 0; - do { - /* make sure we see the changes made by the DMA engine */ - invalidate_dcache_range((unsigned long)tx_descr, - (unsigned long)tx_descr + - sizeof(struct dma_descriptor)); - - if (timeout != 0) - udelay (15); - if (++timeout > 10000) { - tx_diag_regs(base); - debug_lev(1, - "ERROR: timeout waiting for last transmit packet to be sent\n"); - return 0; - } - } while (tx_descr->config_status & cpu_to_le32(DMA_DESCR_TX_OWNER)); - - status = le32_to_cpu(tx_descr->config_status); - if ((status & DMA_DESCR_TX_OK) == 0) { -#ifdef TX_PRINT_ERRORS - printf ("TX packet error: 0x%08lx\n %s%s%s%s\n", status, - status & DMA_DESCR_TX_OK ? "tx error, " : "", - status & DMA_DESCR_TX_RETRY_LIMIT ? - "retry limit reached, " : "", - status & DMA_DESCR_TX_UNDERRUN ? "underrun, " : "", - status & DMA_DESCR_TX_LATE_COLLISION ? "late collision, " - : ""); -#endif - } - - debug_lev (9, "sending packet %d\n", length); - tx_descr->start_addr0 = cpu_to_le32((vuint32) packet); - tx_descr->start_addr1 = 0; - tx_descr->next_descr_addr0 = 0; - tx_descr->next_descr_addr1 = cpu_to_le32(DMA_DESCR_LAST); - tx_descr->vlan_byte_count = cpu_to_le32(length); - tx_descr->config_status = cpu_to_le32(DMA_DESCR_TX_OWNER | - DMA_DESCR_TX_CRC | - DMA_DESCR_TX_PAD | - DMA_DESCR_TX_SOF | - DMA_DESCR_TX_EOF); - - invalidate_dcache_range((unsigned long)tx_descr, - (unsigned long)tx_descr + - sizeof(struct dma_descriptor)); - - invalidate_dcache_range((unsigned long)packet, - (unsigned long)packet + length); - - reg_TX_QUEUE_0_PTR_LOW(base) = (u32) tx_descr; - reg_TX_QUEUE_0_PTR_HIGH(base) = TX_QUEUE_0_PTR_HIGH_VALID; - - return length; -} - -/* - * Check for received packets and send them up the protocal stack - */ -static int tsi108_eth_recv (struct eth_device *dev) -{ - struct dma_descriptor *rx_descr; - unsigned long base; - int length = 0; - unsigned long status; - uchar *buffer; - - base = dev->iobase; - - /* make sure we see the changes made by the DMA engine */ - invalidate_dcache_range ((unsigned long)rx_descr_array, - (unsigned long)rx_descr_array + - sizeof(rx_descr_array)); - - /* process all of the received packets */ - rx_descr = rx_descr_current; - while ((rx_descr->config_status & cpu_to_le32(DMA_DESCR_RX_OWNER)) == 0) { - /* check for error */ - status = le32_to_cpu(rx_descr->config_status); - if (status & DMA_DESCR_RX_BAD_FRAME) { -#ifdef RX_PRINT_ERRORS - printf ("RX packet error: 0x%08lx\n %s%s%s%s%s%s\n", - status, - status & DMA_DESCR_RX_FRAME_IS_TYPE ? "too big, " - : "", - status & DMA_DESCR_RX_SHORT_FRAME ? "too short, " - : "", - status & DMA_DESCR_RX_BAD_FRAME ? "bad frame, " : - "", - status & DMA_DESCR_RX_OVERRUN ? "overrun, " : "", - status & DMA_DESCR_RX_MAX_FRAME_LEN ? - "max length, " : "", - status & DMA_DESCR_RX_CRC_ERROR ? "CRC error, " : - ""); -#endif - } else { - length = - le32_to_cpu(rx_descr->vlan_byte_count) & 0xFFFF; - - /*** process packet ***/ - buffer = (uchar *)(le32_to_cpu(rx_descr->start_addr0)); - net_process_received_packet(buffer, length); - - invalidate_dcache_range ((unsigned long)buffer, - (unsigned long)buffer + - RX_BUFFER_SIZE); - } - /* Give this buffer back to the DMA engine */ - rx_descr->vlan_byte_count = 0; - rx_descr->config_status = cpu_to_le32 ((RX_BUFFER_SIZE << 16) | - DMA_DESCR_RX_OWNER); - /* move descriptor pointer forward */ - rx_descr = - (struct dma_descriptor - *)(le32_to_cpu (rx_descr->next_descr_addr0)); - if (rx_descr == 0) - rx_descr = &rx_descr_array[0]; - } - /* remember where we are for next time */ - rx_descr_current = rx_descr; - - /* If the DMA engine has reached the end of the queue - * start over at the begining */ - if (reg_RX_EXTENDED_STATUS(base) & RX_EXTENDED_STATUS_EOQ_0) { - - reg_RX_EXTENDED_STATUS(base) = RX_EXTENDED_STATUS_EOQ_0; - reg_RX_QUEUE_0_PTR_LOW(base) = (u32) & rx_descr_array[0]; - reg_RX_QUEUE_0_PTR_HIGH(base) = RX_QUEUE_0_PTR_HIGH_VALID; - } - - return length; -} - -/* - * disable an ethernet interface - */ -static void tsi108_eth_halt (struct eth_device *dev) -{ - unsigned long base; - - base = dev->iobase; - - /* Put DMA/FIFO into reset state. */ - reg_TX_CONFIG(base) = TX_CONFIG_RST; - reg_RX_CONFIG(base) = RX_CONFIG_RST; - - /* Put MAC into reset state. */ - reg_MAC_CONFIG_1(base) = MAC_CONFIG_1_SOFT_RESET; -} diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index 49be1ebdd77..1cd1e409e3e 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -860,6 +860,13 @@ static int decode_regions(struct pci_controller *hose, ofnode parent_node, } else { continue; } + + if (!IS_ENABLED(CONFIG_SYS_PCI_64BIT) && + type == PCI_REGION_MEM && upper_32_bits(pci_addr)) { + debug(" - beyond the 32-bit boundary, ignoring\n"); + continue; + } + pos = -1; for (i = 0; i < hose->region_count; i++) { if (hose->regions[i].flags == type) diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c index d1feb503a0a..d7237f6eee0 100644 --- a/drivers/pci/pci_auto.c +++ b/drivers/pci/pci_auto.c @@ -98,7 +98,8 @@ void dm_pciauto_setup_device(struct udevice *dev, int bars_num, } if (!enum_only && pciauto_region_allocate(bar_res, bar_size, - &bar_value) == 0) { + &bar_value, + found_mem64) == 0) { /* Write it out and update our limit */ dm_pci_write_config32(dev, bar, (u32)bar_value); @@ -140,7 +141,8 @@ void dm_pciauto_setup_device(struct udevice *dev, int bars_num, debug("PCI Autoconfig: ROM, size=%#x, ", (unsigned int)bar_size); if (pciauto_region_allocate(mem, bar_size, - &bar_value) == 0) { + &bar_value, + false) == 0) { dm_pci_write_config32(dev, rom_addr, bar_value); } diff --git a/drivers/pci/pci_auto_common.c b/drivers/pci/pci_auto_common.c index 1d202ae2ef0..183787333e9 100644 --- a/drivers/pci/pci_auto_common.c +++ b/drivers/pci/pci_auto_common.c @@ -32,12 +32,12 @@ void pciauto_region_align(struct pci_region *res, pci_size_t size) } int pciauto_region_allocate(struct pci_region *res, pci_size_t size, - pci_addr_t *bar) + pci_addr_t *bar, bool supports_64bit) { pci_addr_t addr; if (!res) { - debug("No resource"); + debug("No resource\n"); goto error; } @@ -48,9 +48,14 @@ int pciauto_region_allocate(struct pci_region *res, pci_size_t size, goto error; } + if (upper_32_bits(addr) && !supports_64bit) { + debug("Cannot assign 64-bit address to 32-bit-only resource\n"); + goto error; + } + res->bus_lower = addr + size; - debug("address=0x%llx bus_lower=0x%llx", (unsigned long long)addr, + debug("address=0x%llx bus_lower=0x%llx\n", (unsigned long long)addr, (unsigned long long)res->bus_lower); *bar = addr; diff --git a/drivers/pci/pci_auto_old.c b/drivers/pci/pci_auto_old.c index bc119fba872..e705a3072e7 100644 --- a/drivers/pci/pci_auto_old.c +++ b/drivers/pci/pci_auto_old.c @@ -108,7 +108,8 @@ void pciauto_setup_device(struct pci_controller *hose, } #ifndef CONFIG_PCI_ENUM_ONLY - if (pciauto_region_allocate(bar_res, bar_size, &bar_value) == 0) { + if (pciauto_region_allocate(bar_res, bar_size, + &bar_value, found_mem64) == 0) { /* Write it out and update our limit */ pci_hose_write_config_dword(hose, dev, bar, (u32)bar_value); @@ -150,7 +151,7 @@ void pciauto_setup_device(struct pci_controller *hose, debug("PCI Autoconfig: ROM, size=%#x, ", (unsigned int)bar_size); if (pciauto_region_allocate(mem, bar_size, - &bar_value) == 0) { + &bar_value, false) == 0) { pci_hose_write_config_dword(hose, dev, rom_addr, bar_value); } diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index 119edec2048..8fc2295d03a 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -110,6 +110,19 @@ config STI_USB_PHY used by USB2 and USB3 Host controllers available on STiH407 SoC families. +config PHY_STM32_USBPHYC + tristate "STMicroelectronics STM32 SoC USB HS PHY driver" + depends on PHY && ARCH_STM32MP + help + Enable this to support the High-Speed USB transceiver that is part of + STMicroelectronics STM32 SoCs. + + This driver controls the entire USB PHY block: the USB PHY controller + (USBPHYC) and the two 8-bit wide UTMI+ interface. First interface is + used by an HS USB Host controller, and the second one is shared + between an HS USB OTG controller and an HS USB Host controller, + selected by an USB switch. + config MESON_GXL_USB_PHY bool "Amlogic Meson GXL USB PHYs" depends on PHY && ARCH_MESON && MESON_GXL diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index 5c8711d6a4f..ba0803cd040 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -12,4 +12,5 @@ obj-$(CONFIG_BCM6368_USBH_PHY) += bcm6368-usbh-phy.o obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o obj-$(CONFIG_STI_USB_PHY) += sti_usb_phy.o +obj-$(CONFIG_PHY_STM32_USBPHYC) += phy-stm32-usbphyc.o obj-$(CONFIG_MESON_GXL_USB_PHY) += meson-gxl-usb2.o meson-gxl-usb3.o diff --git a/drivers/phy/allwinner/Kconfig b/drivers/phy/allwinner/Kconfig new file mode 100644 index 00000000000..dba3bae61c4 --- /dev/null +++ b/drivers/phy/allwinner/Kconfig @@ -0,0 +1,13 @@ +# +# Phy drivers for Allwinner platforms +# +config PHY_SUN4I_USB + bool "Allwinner Sun4I USB PHY driver" + depends on ARCH_SUNXI + select PHY + help + Enable this to support the transceiver that is part of Allwinner + sunxi SoCs. + + This driver controls the entire USB PHY block, both the USB OTG + parts, as well as the 2 regular USB 2 host PHYs. diff --git a/drivers/phy/allwinner/Makefile b/drivers/phy/allwinner/Makefile new file mode 100644 index 00000000000..5ed2702e4f0 --- /dev/null +++ b/drivers/phy/allwinner/Makefile @@ -0,0 +1,6 @@ +# Copyright (C) 2016 Amarula Solutions +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-$(CONFIG_PHY_SUN4I_USB) += phy-sun4i-usb.o diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c new file mode 100644 index 00000000000..2b3cf48025c --- /dev/null +++ b/drivers/phy/allwinner/phy-sun4i-usb.c @@ -0,0 +1,575 @@ +/* + * Allwinner sun4i USB PHY driver + * + * Copyright (C) 2017 Jagan Teki <jagan@amarulasolutions.com> + * Copyright (C) 2015 Hans de Goede <hdegoede@redhat.com> + * Copyright (C) 2014 Roman Byshko <rbyshko@gmail.com> + * + * Modelled arch/arm/mach-sunxi/usb_phy.c to compatible with generic-phy. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <dm/device.h> +#include <generic-phy.h> +#include <phy-sun4i-usb.h> +#include <asm/gpio.h> +#include <asm/io.h> +#include <asm/arch/clock.h> +#include <asm/arch/cpu.h> + +#define REG_ISCR 0x00 +#define REG_PHYCTL_A10 0x04 +#define REG_PHYBIST 0x08 +#define REG_PHYTUNE 0x0c +#define REG_PHYCTL_A33 0x10 +#define REG_PHY_OTGCTL 0x20 +#define REG_PMU_UNK1 0x10 + +/* Common Control Bits for Both PHYs */ +#define PHY_PLL_BW 0x03 +#define PHY_RES45_CAL_EN 0x0c + +/* Private Control Bits for Each PHY */ +#define PHY_TX_AMPLITUDE_TUNE 0x20 +#define PHY_TX_SLEWRATE_TUNE 0x22 +#define PHY_DISCON_TH_SEL 0x2a +#define PHY_SQUELCH_DETECT 0x3c + +#define PHYCTL_DATA BIT(7) +#define OTGCTL_ROUTE_MUSB BIT(0) + +#define PHY_TX_RATE BIT(4) +#define PHY_TX_MAGNITUDE BIT(2) +#define PHY_TX_AMPLITUDE_LEN 5 + +#define PHY_RES45_CAL_DATA BIT(0) +#define PHY_RES45_CAL_LEN 1 +#define PHY_DISCON_TH_LEN 2 + +#define SUNXI_AHB_ICHR8_EN BIT(10) +#define SUNXI_AHB_INCR4_BURST_EN BIT(9) +#define SUNXI_AHB_INCRX_ALIGN_EN BIT(8) +#define SUNXI_ULPI_BYPASS_EN BIT(0) + +/* A83T specific control bits for PHY0 */ +#define PHY_CTL_VBUSVLDEXT BIT(5) +#define PHY_CTL_SIDDQ BIT(3) + +/* A83T specific control bits for PHY2 HSIC */ +#define SUNXI_EHCI_HS_FORCE BIT(20) +#define SUNXI_HSIC_CONNECT_INT BIT(16) +#define SUNXI_HSIC BIT(1) + +#define MAX_PHYS 4 + +enum sun4i_usb_phy_type { + sun4i_a10_phy, + sun6i_a31_phy, + sun8i_a33_phy, + sun8i_a83t_phy, + sun8i_h3_phy, + sun8i_v3s_phy, + sun50i_a64_phy, +}; + +struct sun4i_usb_phy_cfg { + int num_phys; + enum sun4i_usb_phy_type type; + u32 disc_thresh; + u8 phyctl_offset; + bool enable_pmu_unk1; + bool phy0_dual_route; +}; + +struct sun4i_usb_phy_info { + const char *gpio_vbus; + const char *gpio_vbus_det; + const char *gpio_id_det; + int rst_mask; +} phy_info[] = { + { + .gpio_vbus = CONFIG_USB0_VBUS_PIN, + .gpio_vbus_det = CONFIG_USB0_VBUS_DET, + .gpio_id_det = CONFIG_USB0_ID_DET, + .rst_mask = (CCM_USB_CTRL_PHY0_RST | CCM_USB_CTRL_PHY0_CLK), + }, + { + .gpio_vbus = CONFIG_USB1_VBUS_PIN, + .gpio_vbus_det = NULL, + .gpio_id_det = NULL, + .rst_mask = (CCM_USB_CTRL_PHY1_RST | CCM_USB_CTRL_PHY1_CLK), + }, + { + .gpio_vbus = CONFIG_USB2_VBUS_PIN, + .gpio_vbus_det = NULL, + .gpio_id_det = NULL, +#ifdef CONFIG_MACH_SUN8I_A83T + .rst_mask = (CCM_USB_CTRL_HSIC_RST | CCM_USB_CTRL_HSIC_CLK | + CCM_USB_CTRL_12M_CLK), +#else + .rst_mask = (CCM_USB_CTRL_PHY2_RST | CCM_USB_CTRL_PHY2_CLK), +#endif + }, + { + .gpio_vbus = CONFIG_USB3_VBUS_PIN, + .gpio_vbus_det = NULL, + .gpio_id_det = NULL, +#ifdef CONFIG_MACH_SUN6I + .rst_mask = (CCM_USB_CTRL_PHY3_RST | CCM_USB_CTRL_PHY3_CLK), +#endif + }, +}; + +struct sun4i_usb_phy_plat { + void __iomem *pmu; + int power_on_count; + int gpio_vbus; + int gpio_vbus_det; + int gpio_id_det; + int rst_mask; + int id; +}; + +struct sun4i_usb_phy_data { + void __iomem *base; + struct sunxi_ccm_reg *ccm; + const struct sun4i_usb_phy_cfg *cfg; + struct sun4i_usb_phy_plat *usb_phy; +}; + +static int initial_usb_scan_delay = CONFIG_INITIAL_USB_SCAN_DELAY; + +static void sun4i_usb_phy_write(struct phy *phy, u32 addr, u32 data, int len) +{ + struct sun4i_usb_phy_data *phy_data = dev_get_priv(phy->dev); + struct sun4i_usb_phy_plat *usb_phy = &phy_data->usb_phy[phy->id]; + u32 temp, usbc_bit = BIT(usb_phy->id * 2); + void __iomem *phyctl = phy_data->base + phy_data->cfg->phyctl_offset; + int i; + + if (phy_data->cfg->phyctl_offset == REG_PHYCTL_A33) { + /* SoCs newer than A33 need us to set phyctl to 0 explicitly */ + writel(0, phyctl); + } + + for (i = 0; i < len; i++) { + temp = readl(phyctl); + + /* clear the address portion */ + temp &= ~(0xff << 8); + + /* set the address */ + temp |= ((addr + i) << 8); + writel(temp, phyctl); + + /* set the data bit and clear usbc bit*/ + temp = readb(phyctl); + if (data & 0x1) + temp |= PHYCTL_DATA; + else + temp &= ~PHYCTL_DATA; + temp &= ~usbc_bit; + writeb(temp, phyctl); + + /* pulse usbc_bit */ + temp = readb(phyctl); + temp |= usbc_bit; + writeb(temp, phyctl); + + temp = readb(phyctl); + temp &= ~usbc_bit; + writeb(temp, phyctl); + + data >>= 1; + } +} + +static void sun4i_usb_phy_passby(struct phy *phy, bool enable) +{ + struct sun4i_usb_phy_data *data = dev_get_priv(phy->dev); + struct sun4i_usb_phy_plat *usb_phy = &data->usb_phy[phy->id]; + u32 bits, reg_value; + + if (!usb_phy->pmu) + return; + + bits = SUNXI_AHB_ICHR8_EN | SUNXI_AHB_INCR4_BURST_EN | + SUNXI_AHB_INCRX_ALIGN_EN | SUNXI_ULPI_BYPASS_EN; + + /* A83T USB2 is HSIC */ + if (data->cfg->type == sun8i_a83t_phy && usb_phy->id == 2) + bits |= SUNXI_EHCI_HS_FORCE | SUNXI_HSIC_CONNECT_INT | + SUNXI_HSIC; + + reg_value = readl(usb_phy->pmu); + + if (enable) + reg_value |= bits; + else + reg_value &= ~bits; + + writel(reg_value, usb_phy->pmu); +} + +static int sun4i_usb_phy_power_on(struct phy *phy) +{ + struct sun4i_usb_phy_data *data = dev_get_priv(phy->dev); + struct sun4i_usb_phy_plat *usb_phy = &data->usb_phy[phy->id]; + + if (initial_usb_scan_delay) { + mdelay(initial_usb_scan_delay); + initial_usb_scan_delay = 0; + } + + usb_phy->power_on_count++; + if (usb_phy->power_on_count != 1) + return 0; + + if (usb_phy->gpio_vbus >= 0) + gpio_set_value(usb_phy->gpio_vbus, SUNXI_GPIO_PULL_UP); + + return 0; +} + +static int sun4i_usb_phy_power_off(struct phy *phy) +{ + struct sun4i_usb_phy_data *data = dev_get_priv(phy->dev); + struct sun4i_usb_phy_plat *usb_phy = &data->usb_phy[phy->id]; + + usb_phy->power_on_count--; + if (usb_phy->power_on_count != 0) + return 0; + + if (usb_phy->gpio_vbus >= 0) + gpio_set_value(usb_phy->gpio_vbus, SUNXI_GPIO_PULL_DISABLE); + + return 0; +} + +static void sun4i_usb_phy0_reroute(struct sun4i_usb_phy_data *data, bool id_det) +{ + u32 regval; + + regval = readl(data->base + REG_PHY_OTGCTL); + if (!id_det) { + /* Host mode. Route phy0 to EHCI/OHCI */ + regval &= ~OTGCTL_ROUTE_MUSB; + } else { + /* Peripheral mode. Route phy0 to MUSB */ + regval |= OTGCTL_ROUTE_MUSB; + } + writel(regval, data->base + REG_PHY_OTGCTL); +} + +static int sun4i_usb_phy_init(struct phy *phy) +{ + struct sun4i_usb_phy_data *data = dev_get_priv(phy->dev); + struct sun4i_usb_phy_plat *usb_phy = &data->usb_phy[phy->id]; + u32 val; + + setbits_le32(&data->ccm->usb_clk_cfg, usb_phy->rst_mask); + + if (data->cfg->type == sun8i_a83t_phy) { + if (phy->id == 0) { + val = readl(data->base + data->cfg->phyctl_offset); + val |= PHY_CTL_VBUSVLDEXT; + val &= ~PHY_CTL_SIDDQ; + writel(val, data->base + data->cfg->phyctl_offset); + } + } else { + if (usb_phy->pmu && data->cfg->enable_pmu_unk1) { + val = readl(usb_phy->pmu + REG_PMU_UNK1); + writel(val & ~2, usb_phy->pmu + REG_PMU_UNK1); + } + + if (usb_phy->id == 0) + sun4i_usb_phy_write(phy, PHY_RES45_CAL_EN, + PHY_RES45_CAL_DATA, + PHY_RES45_CAL_LEN); + + /* Adjust PHY's magnitude and rate */ + sun4i_usb_phy_write(phy, PHY_TX_AMPLITUDE_TUNE, + PHY_TX_MAGNITUDE | PHY_TX_RATE, + PHY_TX_AMPLITUDE_LEN); + + /* Disconnect threshold adjustment */ + sun4i_usb_phy_write(phy, PHY_DISCON_TH_SEL, + data->cfg->disc_thresh, PHY_DISCON_TH_LEN); + } + + if (usb_phy->id != 0) + sun4i_usb_phy_passby(phy, true); + + sun4i_usb_phy0_reroute(data, true); + + return 0; +} + +static int sun4i_usb_phy_exit(struct phy *phy) +{ + struct sun4i_usb_phy_data *data = dev_get_priv(phy->dev); + struct sun4i_usb_phy_plat *usb_phy = &data->usb_phy[phy->id]; + + if (phy->id == 0) { + if (data->cfg->type == sun8i_a83t_phy) { + void __iomem *phyctl = data->base + + data->cfg->phyctl_offset; + + writel(readl(phyctl) | PHY_CTL_SIDDQ, phyctl); + } + } + + sun4i_usb_phy_passby(phy, false); + + clrbits_le32(&data->ccm->usb_clk_cfg, usb_phy->rst_mask); + + return 0; +} + +static int sun4i_usb_phy_xlate(struct phy *phy, + struct ofnode_phandle_args *args) +{ + struct sun4i_usb_phy_data *data = dev_get_priv(phy->dev); + + if (args->args_count >= data->cfg->num_phys) + return -EINVAL; + + if (args->args_count) + phy->id = args->args[0]; + else + phy->id = 0; + + debug("%s: phy_id = %ld\n", __func__, phy->id); + return 0; +} + +int sun4i_usb_phy_vbus_detect(struct phy *phy) +{ + struct sun4i_usb_phy_data *data = dev_get_priv(phy->dev); + struct sun4i_usb_phy_plat *usb_phy = &data->usb_phy[phy->id]; + int err, retries = 3; + + debug("%s: id_det = %d\n", __func__, usb_phy->gpio_id_det); + + if (usb_phy->gpio_vbus_det < 0) + return usb_phy->gpio_vbus_det; + + err = gpio_get_value(usb_phy->gpio_vbus_det); + /* + * Vbus may have been provided by the board and just been turned of + * some milliseconds ago on reset, what we're measuring then is a + * residual charge on Vbus, sleep a bit and try again. + */ + while (err > 0 && retries--) { + mdelay(100); + err = gpio_get_value(usb_phy->gpio_vbus_det); + } + + return err; +} + +int sun4i_usb_phy_id_detect(struct phy *phy) +{ + struct sun4i_usb_phy_data *data = dev_get_priv(phy->dev); + struct sun4i_usb_phy_plat *usb_phy = &data->usb_phy[phy->id]; + + debug("%s: id_det = %d\n", __func__, usb_phy->gpio_id_det); + + if (usb_phy->gpio_id_det < 0) + return usb_phy->gpio_id_det; + + return gpio_get_value(usb_phy->gpio_id_det); +} + +void sun4i_usb_phy_set_squelch_detect(struct phy *phy, bool enabled) +{ + sun4i_usb_phy_write(phy, PHY_SQUELCH_DETECT, enabled ? 0 : 2, 2); +} + +static struct phy_ops sun4i_usb_phy_ops = { + .of_xlate = sun4i_usb_phy_xlate, + .init = sun4i_usb_phy_init, + .power_on = sun4i_usb_phy_power_on, + .power_off = sun4i_usb_phy_power_off, + .exit = sun4i_usb_phy_exit, +}; + +static int sun4i_usb_phy_probe(struct udevice *dev) +{ + struct sun4i_usb_phy_plat *plat = dev_get_platdata(dev); + struct sun4i_usb_phy_data *data = dev_get_priv(dev); + int i, ret; + + data->cfg = (const struct sun4i_usb_phy_cfg *)dev_get_driver_data(dev); + if (!data->cfg) + return -EINVAL; + + data->base = (void __iomem *)devfdt_get_addr_name(dev, "phy_ctrl"); + if (IS_ERR(data->base)) + return PTR_ERR(data->base); + + data->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; + if (IS_ERR(data->ccm)) + return PTR_ERR(data->ccm); + + data->usb_phy = plat; + for (i = 0; i < data->cfg->num_phys; i++) { + struct sun4i_usb_phy_plat *phy = &plat[i]; + struct sun4i_usb_phy_info *info = &phy_info[i]; + char name[16]; + + phy->gpio_vbus = sunxi_name_to_gpio(info->gpio_vbus); + if (phy->gpio_vbus >= 0) { + ret = gpio_request(phy->gpio_vbus, "usb_vbus"); + if (ret) + return ret; + ret = gpio_direction_output(phy->gpio_vbus, 0); + if (ret) + return ret; + } + + phy->gpio_vbus_det = sunxi_name_to_gpio(info->gpio_vbus_det); + if (phy->gpio_vbus_det >= 0) { + ret = gpio_request(phy->gpio_vbus_det, "usb_vbus_det"); + if (ret) + return ret; + ret = gpio_direction_input(phy->gpio_vbus_det); + if (ret) + return ret; + } + + phy->gpio_id_det = sunxi_name_to_gpio(info->gpio_id_det); + if (phy->gpio_id_det >= 0) { + ret = gpio_request(phy->gpio_id_det, "usb_id_det"); + if (ret) + return ret; + ret = gpio_direction_input(phy->gpio_id_det); + if (ret) + return ret; + sunxi_gpio_set_pull(phy->gpio_id_det, SUNXI_GPIO_PULL_UP); + } + + if (i || data->cfg->phy0_dual_route) { + snprintf(name, sizeof(name), "pmu%d", i); + phy->pmu = (void __iomem *)devfdt_get_addr_name(dev, name); + if (IS_ERR(phy->pmu)) + return PTR_ERR(phy->pmu); + } + + phy->id = i; + phy->rst_mask = info->rst_mask; + }; + + setbits_le32(&data->ccm->usb_clk_cfg, CCM_USB_CTRL_PHYGATE); + + debug("Allwinner Sun4I USB PHY driver loaded\n"); + return 0; +} + +static const struct sun4i_usb_phy_cfg sun4i_a10_cfg = { + .num_phys = 3, + .type = sun4i_a10_phy, + .disc_thresh = 3, + .phyctl_offset = REG_PHYCTL_A10, + .enable_pmu_unk1 = false, +}; + +static const struct sun4i_usb_phy_cfg sun5i_a13_cfg = { + .num_phys = 2, + .type = sun4i_a10_phy, + .disc_thresh = 2, + .phyctl_offset = REG_PHYCTL_A10, + .enable_pmu_unk1 = false, +}; + +static const struct sun4i_usb_phy_cfg sun6i_a31_cfg = { + .num_phys = 3, + .type = sun6i_a31_phy, + .disc_thresh = 3, + .phyctl_offset = REG_PHYCTL_A10, + .enable_pmu_unk1 = false, +}; + +static const struct sun4i_usb_phy_cfg sun7i_a20_cfg = { + .num_phys = 3, + .type = sun4i_a10_phy, + .disc_thresh = 2, + .phyctl_offset = REG_PHYCTL_A10, + .enable_pmu_unk1 = false, +}; + +static const struct sun4i_usb_phy_cfg sun8i_a23_cfg = { + .num_phys = 2, + .type = sun4i_a10_phy, + .disc_thresh = 3, + .phyctl_offset = REG_PHYCTL_A10, + .enable_pmu_unk1 = false, +}; + +static const struct sun4i_usb_phy_cfg sun8i_a33_cfg = { + .num_phys = 2, + .type = sun8i_a33_phy, + .disc_thresh = 3, + .phyctl_offset = REG_PHYCTL_A33, + .enable_pmu_unk1 = false, +}; + +static const struct sun4i_usb_phy_cfg sun8i_a83t_cfg = { + .num_phys = 3, + .type = sun8i_a83t_phy, + .phyctl_offset = REG_PHYCTL_A33, +}; + +static const struct sun4i_usb_phy_cfg sun8i_h3_cfg = { + .num_phys = 4, + .type = sun8i_h3_phy, + .disc_thresh = 3, + .phyctl_offset = REG_PHYCTL_A33, + .enable_pmu_unk1 = true, + .phy0_dual_route = true, +}; + +static const struct sun4i_usb_phy_cfg sun8i_v3s_cfg = { + .num_phys = 1, + .type = sun8i_v3s_phy, + .disc_thresh = 3, + .phyctl_offset = REG_PHYCTL_A33, + .enable_pmu_unk1 = true, + .phy0_dual_route = true, +}; + +static const struct sun4i_usb_phy_cfg sun50i_a64_cfg = { + .num_phys = 2, + .type = sun50i_a64_phy, + .disc_thresh = 3, + .phyctl_offset = REG_PHYCTL_A33, + .enable_pmu_unk1 = true, + .phy0_dual_route = true, +}; + +static const struct udevice_id sun4i_usb_phy_ids[] = { + { .compatible = "allwinner,sun4i-a10-usb-phy", .data = (ulong)&sun4i_a10_cfg }, + { .compatible = "allwinner,sun5i-a13-usb-phy", .data = (ulong)&sun5i_a13_cfg }, + { .compatible = "allwinner,sun6i-a31-usb-phy", .data = (ulong)&sun6i_a31_cfg }, + { .compatible = "allwinner,sun7i-a20-usb-phy", .data = (ulong)&sun7i_a20_cfg }, + { .compatible = "allwinner,sun8i-a23-usb-phy", .data = (ulong)&sun8i_a23_cfg }, + { .compatible = "allwinner,sun8i-a33-usb-phy", .data = (ulong)&sun8i_a33_cfg }, + { .compatible = "allwinner,sun8i-a83t-usb-phy", .data = (ulong)&sun8i_a83t_cfg }, + { .compatible = "allwinner,sun8i-h3-usb-phy", .data = (ulong)&sun8i_h3_cfg }, + { .compatible = "allwinner,sun8i-v3s-usb-phy", .data = (ulong)&sun8i_v3s_cfg }, + { .compatible = "allwinner,sun50i-a64-usb-phy", .data = (ulong)&sun50i_a64_cfg}, + { } +}; + +U_BOOT_DRIVER(sun4i_usb_phy) = { + .name = "sun4i_usb_phy", + .id = UCLASS_PHY, + .of_match = sun4i_usb_phy_ids, + .ops = &sun4i_usb_phy_ops, + .probe = sun4i_usb_phy_probe, + .platdata_auto_alloc_size = sizeof(struct sun4i_usb_phy_plat[MAX_PHYS]), + .priv_auto_alloc_size = sizeof(struct sun4i_usb_phy_data), +}; diff --git a/drivers/phy/bcm6318-usbh-phy.c b/drivers/phy/bcm6318-usbh-phy.c index f5bcf188afa..de055a3585f 100644 --- a/drivers/phy/bcm6318-usbh-phy.c +++ b/drivers/phy/bcm6318-usbh-phy.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2018 Ãlvaro Fernández Rojas <noltari@gmail.com> + * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com> * * Derived from linux/arch/mips/bcm63xx/usb-common.c: * Copyright 2008 Maxime Bizon <mbizon@freebox.fr> @@ -79,16 +79,12 @@ static int bcm6318_usbh_probe(struct udevice *dev) struct power_domain pwr_dom; struct reset_ctl rst_ctl; struct clk clk; - fdt_addr_t addr; - fdt_size_t size; int ret; - addr = devfdt_get_addr_size_index(dev, 0, &size); - if (addr == FDT_ADDR_T_NONE) + priv->regs = dev_remap_addr(dev); + if (!priv->regs) return -EINVAL; - priv->regs = ioremap(addr, size); - /* enable usbh clock */ ret = clk_get_by_name(dev, "usbh", &clk); if (ret < 0) diff --git a/drivers/phy/bcm6348-usbh-phy.c b/drivers/phy/bcm6348-usbh-phy.c index f305738c0e3..e7761e3b286 100644 --- a/drivers/phy/bcm6348-usbh-phy.c +++ b/drivers/phy/bcm6348-usbh-phy.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2018 Ãlvaro Fernández Rojas <noltari@gmail.com> + * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com> * * Derived from linux/arch/mips/bcm63xx/usb-common.c: * Copyright 2008 Maxime Bizon <mbizon@freebox.fr> @@ -44,16 +44,12 @@ static int bcm6348_usbh_probe(struct udevice *dev) struct bcm6348_usbh_priv *priv = dev_get_priv(dev); struct reset_ctl rst_ctl; struct clk clk; - fdt_addr_t addr; - fdt_size_t size; int ret; - addr = devfdt_get_addr_size_index(dev, 0, &size); - if (addr == FDT_ADDR_T_NONE) + priv->regs = dev_remap_addr(dev); + if (!priv->regs) return -EINVAL; - priv->regs = ioremap(addr, size); - /* enable usbh clock */ ret = clk_get_by_name(dev, "usbh", &clk); if (ret < 0) diff --git a/drivers/phy/bcm6358-usbh-phy.c b/drivers/phy/bcm6358-usbh-phy.c index 9eb641a3846..189a1c11d38 100644 --- a/drivers/phy/bcm6358-usbh-phy.c +++ b/drivers/phy/bcm6358-usbh-phy.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2018 Ãlvaro Fernández Rojas <noltari@gmail.com> + * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com> * * Derived from linux/arch/mips/bcm63xx/usb-common.c: * Copyright 2008 Maxime Bizon <mbizon@freebox.fr> @@ -57,16 +57,12 @@ static int bcm6358_usbh_probe(struct udevice *dev) { struct bcm6358_usbh_priv *priv = dev_get_priv(dev); struct reset_ctl rst_ctl; - fdt_addr_t addr; - fdt_size_t size; int ret; - addr = devfdt_get_addr_size_index(dev, 0, &size); - if (addr == FDT_ADDR_T_NONE) + priv->regs = dev_remap_addr(dev); + if (!priv->regs) return -EINVAL; - priv->regs = ioremap(addr, size); - /* perform reset */ ret = reset_get_by_index(dev, 0, &rst_ctl); if (ret < 0) diff --git a/drivers/phy/bcm6368-usbh-phy.c b/drivers/phy/bcm6368-usbh-phy.c index 02197ed4253..99da97aa0cd 100644 --- a/drivers/phy/bcm6368-usbh-phy.c +++ b/drivers/phy/bcm6368-usbh-phy.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2018 Ãlvaro Fernández Rojas <noltari@gmail.com> + * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com> * * Derived from linux/arch/mips/bcm63xx/usb-common.c: * Copyright 2008 Maxime Bizon <mbizon@freebox.fr> @@ -116,15 +116,12 @@ static int bcm6368_usbh_probe(struct udevice *dev) #endif struct reset_ctl rst_ctl; struct clk clk; - fdt_addr_t addr; - fdt_size_t size; int ret; - addr = devfdt_get_addr_size_index(dev, 0, &size); - if (addr == FDT_ADDR_T_NONE) + priv->regs = dev_remap_addr(dev); + if (!priv->regs) return -EINVAL; - priv->regs = ioremap(addr, size); priv->hw = hw; /* enable usbh clock */ diff --git a/drivers/phy/phy-stm32-usbphyc.c b/drivers/phy/phy-stm32-usbphyc.c new file mode 100644 index 00000000000..8e98b4b627b --- /dev/null +++ b/drivers/phy/phy-stm32-usbphyc.c @@ -0,0 +1,402 @@ +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause +/* + * Copyright (C) 2018, STMicroelectronics - All Rights Reserved + */ + +#include <common.h> +#include <clk.h> +#include <div64.h> +#include <dm.h> +#include <fdtdec.h> +#include <generic-phy.h> +#include <reset.h> +#include <syscon.h> +#include <usb.h> +#include <asm/io.h> +#include <linux/bitops.h> +#include <power/regulator.h> + +/* USBPHYC registers */ +#define STM32_USBPHYC_PLL 0x0 +#define STM32_USBPHYC_MISC 0x8 + +/* STM32_USBPHYC_PLL bit fields */ +#define PLLNDIV GENMASK(6, 0) +#define PLLNDIV_SHIFT 0 +#define PLLFRACIN GENMASK(25, 10) +#define PLLFRACIN_SHIFT 10 +#define PLLEN BIT(26) +#define PLLSTRB BIT(27) +#define PLLSTRBYP BIT(28) +#define PLLFRACCTL BIT(29) +#define PLLDITHEN0 BIT(30) +#define PLLDITHEN1 BIT(31) + +/* STM32_USBPHYC_MISC bit fields */ +#define SWITHOST BIT(0) + +#define MAX_PHYS 2 + +#define PLL_LOCK_TIME_US 100 +#define PLL_PWR_DOWN_TIME_US 5 +#define PLL_FVCO 2880 /* in MHz */ +#define PLL_INFF_MIN_RATE 19200000 /* in Hz */ +#define PLL_INFF_MAX_RATE 38400000 /* in Hz */ + +struct pll_params { + u8 ndiv; + u16 frac; +}; + +struct stm32_usbphyc { + fdt_addr_t base; + struct clk clk; + struct stm32_usbphyc_phy { + struct udevice *vdd; + struct udevice *vdda1v1; + struct udevice *vdda1v8; + int index; + bool init; + bool powered; + } phys[MAX_PHYS]; +}; + +void stm32_usbphyc_get_pll_params(u32 clk_rate, struct pll_params *pll_params) +{ + unsigned long long fvco, ndiv, frac; + + /* + * | FVCO = INFF*2*(NDIV + FRACT/2^16 ) when DITHER_DISABLE[1] = 1 + * | FVCO = 2880MHz + * | NDIV = integer part of input bits to set the LDF + * | FRACT = fractional part of input bits to set the LDF + * => PLLNDIV = integer part of (FVCO / (INFF*2)) + * => PLLFRACIN = fractional part of(FVCO / INFF*2) * 2^16 + * <=> PLLFRACIN = ((FVCO / (INFF*2)) - PLLNDIV) * 2^16 + */ + fvco = (unsigned long long)PLL_FVCO * 1000000; /* In Hz */ + + ndiv = fvco; + do_div(ndiv, (clk_rate * 2)); + pll_params->ndiv = (u8)ndiv; + + frac = fvco * (1 << 16); + do_div(frac, (clk_rate * 2)); + frac = frac - (ndiv * (1 << 16)); + pll_params->frac = (u16)frac; +} + +static int stm32_usbphyc_pll_init(struct stm32_usbphyc *usbphyc) +{ + struct pll_params pll_params; + u32 clk_rate = clk_get_rate(&usbphyc->clk); + u32 usbphyc_pll; + + if ((clk_rate < PLL_INFF_MIN_RATE) || (clk_rate > PLL_INFF_MAX_RATE)) { + pr_debug("%s: input clk freq (%dHz) out of range\n", + __func__, clk_rate); + return -EINVAL; + } + + stm32_usbphyc_get_pll_params(clk_rate, &pll_params); + + usbphyc_pll = PLLDITHEN1 | PLLDITHEN0 | PLLSTRBYP; + usbphyc_pll |= ((pll_params.ndiv << PLLNDIV_SHIFT) & PLLNDIV); + + if (pll_params.frac) { + usbphyc_pll |= PLLFRACCTL; + usbphyc_pll |= ((pll_params.frac << PLLFRACIN_SHIFT) + & PLLFRACIN); + } + + writel(usbphyc_pll, usbphyc->base + STM32_USBPHYC_PLL); + + pr_debug("%s: input clk freq=%dHz, ndiv=%d, frac=%d\n", __func__, + clk_rate, pll_params.ndiv, pll_params.frac); + + return 0; +} + +static bool stm32_usbphyc_is_init(struct stm32_usbphyc *usbphyc) +{ + int i; + + for (i = 0; i < MAX_PHYS; i++) { + if (usbphyc->phys[i].init) + return true; + } + + return false; +} + +static bool stm32_usbphyc_is_powered(struct stm32_usbphyc *usbphyc) +{ + int i; + + for (i = 0; i < MAX_PHYS; i++) { + if (usbphyc->phys[i].powered) + return true; + } + + return false; +} + +static int stm32_usbphyc_phy_init(struct phy *phy) +{ + struct stm32_usbphyc *usbphyc = dev_get_priv(phy->dev); + struct stm32_usbphyc_phy *usbphyc_phy = usbphyc->phys + phy->id; + bool pllen = readl(usbphyc->base + STM32_USBPHYC_PLL) & PLLEN ? + true : false; + int ret; + + pr_debug("%s phy ID = %lu\n", __func__, phy->id); + /* Check if one phy port has already configured the pll */ + if (pllen && stm32_usbphyc_is_init(usbphyc)) + goto initialized; + + if (pllen) { + clrbits_le32(usbphyc->base + STM32_USBPHYC_PLL, PLLEN); + udelay(PLL_PWR_DOWN_TIME_US); + } + + ret = stm32_usbphyc_pll_init(usbphyc); + if (ret) + return ret; + + setbits_le32(usbphyc->base + STM32_USBPHYC_PLL, PLLEN); + + /* + * We must wait PLL_LOCK_TIME_US before checking that PLLEN + * bit is still set + */ + udelay(PLL_LOCK_TIME_US); + + if (!(readl(usbphyc->base + STM32_USBPHYC_PLL) & PLLEN)) + return -EIO; + +initialized: + usbphyc_phy->init = true; + + return 0; +} + +static int stm32_usbphyc_phy_exit(struct phy *phy) +{ + struct stm32_usbphyc *usbphyc = dev_get_priv(phy->dev); + struct stm32_usbphyc_phy *usbphyc_phy = usbphyc->phys + phy->id; + + pr_debug("%s phy ID = %lu\n", __func__, phy->id); + usbphyc_phy->init = false; + + /* Check if other phy port requires pllen */ + if (stm32_usbphyc_is_init(usbphyc)) + return 0; + + clrbits_le32(usbphyc->base + STM32_USBPHYC_PLL, PLLEN); + + /* + * We must wait PLL_PWR_DOWN_TIME_US before checking that PLLEN + * bit is still clear + */ + udelay(PLL_PWR_DOWN_TIME_US); + + if (readl(usbphyc->base + STM32_USBPHYC_PLL) & PLLEN) + return -EIO; + + return 0; +} + +static int stm32_usbphyc_phy_power_on(struct phy *phy) +{ + struct stm32_usbphyc *usbphyc = dev_get_priv(phy->dev); + struct stm32_usbphyc_phy *usbphyc_phy = usbphyc->phys + phy->id; + int ret; + + pr_debug("%s phy ID = %lu\n", __func__, phy->id); + if (usbphyc_phy->vdda1v1) { + ret = regulator_set_enable(usbphyc_phy->vdda1v1, true); + if (ret) + return ret; + } + + if (usbphyc_phy->vdda1v8) { + ret = regulator_set_enable(usbphyc_phy->vdda1v8, true); + if (ret) + return ret; + } + if (usbphyc_phy->vdd) { + ret = regulator_set_enable(usbphyc_phy->vdd, true); + if (ret) + return ret; + } + + usbphyc_phy->powered = true; + + return 0; +} + +static int stm32_usbphyc_phy_power_off(struct phy *phy) +{ + struct stm32_usbphyc *usbphyc = dev_get_priv(phy->dev); + struct stm32_usbphyc_phy *usbphyc_phy = usbphyc->phys + phy->id; + int ret; + + pr_debug("%s phy ID = %lu\n", __func__, phy->id); + usbphyc_phy->powered = false; + + if (stm32_usbphyc_is_powered(usbphyc)) + return 0; + + if (usbphyc_phy->vdda1v1) { + ret = regulator_set_enable(usbphyc_phy->vdda1v1, false); + if (ret) + return ret; + } + + if (usbphyc_phy->vdda1v8) { + ret = regulator_set_enable(usbphyc_phy->vdda1v8, false); + if (ret) + return ret; + } + + if (usbphyc_phy->vdd) { + ret = regulator_set_enable(usbphyc_phy->vdd, false); + if (ret) + return ret; + } + + return 0; +} + +static int stm32_usbphyc_get_regulator(struct udevice *dev, ofnode node, + char *supply_name, + struct udevice **regulator) +{ + struct ofnode_phandle_args regulator_phandle; + int ret; + + ret = ofnode_parse_phandle_with_args(node, supply_name, + NULL, 0, 0, + ®ulator_phandle); + if (ret) { + dev_err(dev, "Can't find %s property (%d)\n", supply_name, ret); + return ret; + } + + ret = uclass_get_device_by_ofnode(UCLASS_REGULATOR, + regulator_phandle.node, + regulator); + + if (ret) { + dev_err(dev, "Can't get %s regulator (%d)\n", supply_name, ret); + return ret; + } + + return 0; +} + +static int stm32_usbphyc_of_xlate(struct phy *phy, + struct ofnode_phandle_args *args) +{ + if (args->args_count > 1) { + pr_debug("%s: invalid args_count: %d\n", __func__, + args->args_count); + return -EINVAL; + } + + if (args->args[0] >= MAX_PHYS) + return -ENODEV; + + if (args->args_count) + phy->id = args->args[0]; + else + phy->id = 0; + + return 0; +} + +static const struct phy_ops stm32_usbphyc_phy_ops = { + .init = stm32_usbphyc_phy_init, + .exit = stm32_usbphyc_phy_exit, + .power_on = stm32_usbphyc_phy_power_on, + .power_off = stm32_usbphyc_phy_power_off, + .of_xlate = stm32_usbphyc_of_xlate, +}; + +static int stm32_usbphyc_probe(struct udevice *dev) +{ + struct stm32_usbphyc *usbphyc = dev_get_priv(dev); + struct reset_ctl reset; + ofnode node; + int i, ret; + + usbphyc->base = dev_read_addr(dev); + if (usbphyc->base == FDT_ADDR_T_NONE) + return -EINVAL; + + /* Enable clock */ + ret = clk_get_by_index(dev, 0, &usbphyc->clk); + if (ret) + return ret; + + ret = clk_enable(&usbphyc->clk); + if (ret) + return ret; + + /* Reset */ + ret = reset_get_by_index(dev, 0, &reset); + if (!ret) { + reset_assert(&reset); + udelay(2); + reset_deassert(&reset); + } + + /* + * parse all PHY subnodes in order to populate regulator associated + * to each PHY port + */ + node = dev_read_first_subnode(dev); + for (i = 0; i < MAX_PHYS; i++) { + struct stm32_usbphyc_phy *usbphyc_phy = usbphyc->phys + i; + + usbphyc_phy->index = i; + usbphyc_phy->init = false; + usbphyc_phy->powered = false; + ret = stm32_usbphyc_get_regulator(dev, node, "phy-supply", + &usbphyc_phy->vdd); + if (ret) + return ret; + + ret = stm32_usbphyc_get_regulator(dev, node, "vdda1v1-supply", + &usbphyc_phy->vdda1v1); + if (ret) + return ret; + + ret = stm32_usbphyc_get_regulator(dev, node, "vdda1v8-supply", + &usbphyc_phy->vdda1v8); + if (ret) + return ret; + + node = dev_read_next_subnode(node); + } + + /* Check if second port has to be used for host controller */ + if (dev_read_bool(dev, "st,port2-switch-to-host")) + setbits_le32(usbphyc->base + STM32_USBPHYC_MISC, SWITHOST); + + return 0; +} + +static const struct udevice_id stm32_usbphyc_of_match[] = { + { .compatible = "st,stm32mp1-usbphyc", }, + { }, +}; + +U_BOOT_DRIVER(stm32_usb_phyc) = { + .name = "stm32-usbphyc", + .id = UCLASS_PHY, + .of_match = stm32_usbphyc_of_match, + .ops = &stm32_usbphyc_phy_ops, + .probe = stm32_usbphyc_probe, + .priv_auto_alloc_size = sizeof(struct stm32_usbphyc), +}; diff --git a/drivers/pinctrl/mvebu/pinctrl-mvebu.c b/drivers/pinctrl/mvebu/pinctrl-mvebu.c index d4f2970a692..0b9c9e1d6a9 100644 --- a/drivers/pinctrl/mvebu/pinctrl-mvebu.c +++ b/drivers/pinctrl/mvebu/pinctrl-mvebu.c @@ -16,8 +16,48 @@ #include <asm/arch-armada8k/soc-info.h> #include "pinctrl-mvebu.h" +#define AP_EMMC_PHY_CTRL_REG 0x100 +#define CP_EMMC_PHY_CTRL_REG 0x424 +#define EMMC_PHY_CTRL_SDPHY_EN BIT(0) + +#define AP806_EMMC_CLK_PIN_ID 0 +#define AP806_EMMC_CLK_FUNC 0x1 +#define CP110_EMMC_CLK_PIN_ID 56 +#define CP110_EMMC_CLK_FUNC 0xe + DECLARE_GLOBAL_DATA_PTR; +/* mvebu_pinctl_emmc_set_mux: configure sd/mmc PHY mux + * To enable SDIO/eMMC in Armada-APN806/CP110, need to configure PHY mux. + * eMMC/SD PHY register responsible for muxing between MPPs and SD/eMMC + * controller: + * - Bit0 enabled SDIO/eMMC PHY is used as a MPP muxltiplexer, + * - Bit0 disabled SDIO/eMMC PHY is connected to SDIO/eMMC controller + * If pin function is set to eMMC/SD, then configure the eMMC/SD PHY + * muxltiplexer register to be on SDIO/eMMC controller + */ +void mvebu_pinctl_emmc_set_mux(struct udevice *dev, u32 pin, u32 func) +{ + const void *blob = gd->fdt_blob; + int node = dev_of_offset(dev); + struct mvebu_pinctrl_priv *priv = dev_get_priv(dev); + + if (!fdt_node_check_compatible(blob, node, "marvell,ap806-pinctrl")) { + if ((pin == AP806_EMMC_CLK_PIN_ID) && + (func == AP806_EMMC_CLK_FUNC)) { + clrbits_le32(priv->base_reg + AP_EMMC_PHY_CTRL_REG, + EMMC_PHY_CTRL_SDPHY_EN); + } + } else if (!fdt_node_check_compatible(blob, node, + "marvell,armada-8k-cpm-pinctrl")) { + if ((pin == CP110_EMMC_CLK_PIN_ID) && + (func == CP110_EMMC_CLK_FUNC)) { + clrbits_le32(priv->base_reg + CP_EMMC_PHY_CTRL_REG, + EMMC_PHY_CTRL_SDPHY_EN); + } + } +} + /* * mvebu_pinctrl_set_state: configure pin functions. * @dev: the pinctrl device to be configured. @@ -47,9 +87,16 @@ int mvebu_pinctrl_set_state(struct udevice *dev, struct udevice *config) function = fdtdec_get_int(blob, node, "marvell,function", 0xff); + /* + * Check if setup of PHY mux is needed for this pins group. + * Only the first pin id in array is tested, all the rest use the same + * pin function. + */ + mvebu_pinctl_emmc_set_mux(dev, pin_arr[0], function); + for (i = 0; i < pin_count; i++) { - int reg_offset; - int field_offset; + int reg_offset; + int field_offset; int pin = pin_arr[i]; if (function > priv->max_func) { @@ -96,6 +143,14 @@ static int mvebu_pinctrl_set_state_all(struct udevice *dev, return -EINVAL; } + /* Check if setup of PHY mux is needed for this pins group. */ + if (priv->pin_cnt < CP110_EMMC_CLK_PIN_ID) + mvebu_pinctl_emmc_set_mux(dev, AP806_EMMC_CLK_PIN_ID, + func_arr[AP806_EMMC_CLK_PIN_ID]); + else + mvebu_pinctl_emmc_set_mux(dev, CP110_EMMC_CLK_PIN_ID, + func_arr[CP110_EMMC_CLK_PIN_ID]); + for (pin = 0; pin < priv->pin_cnt; pin++) { int reg_offset; int field_offset; @@ -161,10 +216,10 @@ static struct pinctrl_ops mvebu_pinctrl_ops = { static const struct udevice_id mvebu_pinctrl_ids[] = { { .compatible = "marvell,mvebu-pinctrl" }, - { .compatible = "marvell,armada-ap806-pinctrl" }, - { .compatible = "marvell,a70x0-pinctrl" }, - { .compatible = "marvell,a80x0-cp0-pinctrl" }, - { .compatible = "marvell,a80x0-cp1-pinctrl" }, + { .compatible = "marvell,ap806-pinctrl" }, + { .compatible = "marvell,armada-7k-pinctrl" }, + { .compatible = "marvell,armada-8k-cpm-pinctrl" }, + { .compatible = "marvell,armada-8k-cps-pinctrl" }, { } }; diff --git a/drivers/pinctrl/pinctrl-uclass.c b/drivers/pinctrl/pinctrl-uclass.c index d7e38ae7291..c38bb212ed7 100644 --- a/drivers/pinctrl/pinctrl-uclass.c +++ b/drivers/pinctrl/pinctrl-uclass.c @@ -199,6 +199,12 @@ static int pinctrl_select_state_simple(struct udevice *dev) int pinctrl_select_state(struct udevice *dev, const char *statename) { /* + * Some device which is logical like mmc.blk, do not have + * a valid ofnode. + */ + if (!ofnode_valid(dev->node)) + return 0; + /* * Try full-implemented pinctrl first. * If it fails or is not implemented, try simple one. */ diff --git a/drivers/pinctrl/renesas/Kconfig b/drivers/pinctrl/renesas/Kconfig index 5e6d854065b..1baab9088a7 100644 --- a/drivers/pinctrl/renesas/Kconfig +++ b/drivers/pinctrl/renesas/Kconfig @@ -94,6 +94,17 @@ config PINCTRL_PFC_R8A77970 the GPIO definitions and pin control functions for each available multiplex function. +config PINCTRL_PFC_R8A77990 + bool "Renesas RCar Gen3 R8A77990 pin control driver" + def_bool y if R8A77990 + depends on PINCTRL_PFC + help + Support pin multiplexing control on Renesas RCar Gen3 R8A77990 SoCs. + + The driver is controlled by a device tree node which contains both + the GPIO definitions and pin control functions for each available + multiplex function. + config PINCTRL_PFC_R8A77995 bool "Renesas RCar Gen3 R8A77995 pin control driver" def_bool y if R8A77995 diff --git a/drivers/pinctrl/renesas/Makefile b/drivers/pinctrl/renesas/Makefile index 29b9912f830..62bc40b8c10 100644 --- a/drivers/pinctrl/renesas/Makefile +++ b/drivers/pinctrl/renesas/Makefile @@ -7,4 +7,5 @@ obj-$(CONFIG_PINCTRL_PFC_R8A7794) += pfc-r8a7794.o obj-$(CONFIG_PINCTRL_PFC_R8A7795) += pfc-r8a7795.o obj-$(CONFIG_PINCTRL_PFC_R8A7796) += pfc-r8a7796.o obj-$(CONFIG_PINCTRL_PFC_R8A77970) += pfc-r8a77970.o +obj-$(CONFIG_PINCTRL_PFC_R8A77990) += pfc-r8a77990.o obj-$(CONFIG_PINCTRL_PFC_R8A77995) += pfc-r8a77995.o diff --git a/drivers/pinctrl/renesas/pfc-r8a77990.c b/drivers/pinctrl/renesas/pfc-r8a77990.c new file mode 100644 index 00000000000..f66b1597aa0 --- /dev/null +++ b/drivers/pinctrl/renesas/pfc-r8a77990.c @@ -0,0 +1,1731 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * R8A77990 processor support - PFC hardware block. + * + * Copyright (C) 2018 Renesas Electronics Corp. + * + * This file is based on the drivers/pinctrl/sh-pfc/pfc-r8a7796.c + * + * R-Car Gen3 processor support - PFC hardware block. + * + * Copyright (C) 2015 Renesas Electronics Corporation + */ + +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <dm/pinctrl.h> +#include <linux/kernel.h> + +#include "sh_pfc.h" + +#define CPU_ALL_PORT(fn, sfx) \ + PORT_GP_18(0, fn, sfx), \ + PORT_GP_23(1, fn, sfx), \ + PORT_GP_26(2, fn, sfx), \ + PORT_GP_16(3, fn, sfx), \ + PORT_GP_11(4, fn, sfx), \ + PORT_GP_20(5, fn, sfx), \ + PORT_GP_18(6, fn, sfx) + +/* + * F_() : just information + * FM() : macro for FN_xxx / xxx_MARK + */ + +/* GPSR0 */ +#define GPSR0_17 F_(SDA4, IP7_27_24) +#define GPSR0_16 F_(SCL4, IP7_23_20) +#define GPSR0_15 F_(D15, IP7_19_16) +#define GPSR0_14 F_(D14, IP7_15_12) +#define GPSR0_13 F_(D13, IP7_11_8) +#define GPSR0_12 F_(D12, IP7_7_4) +#define GPSR0_11 F_(D11, IP7_3_0) +#define GPSR0_10 F_(D10, IP6_31_28) +#define GPSR0_9 F_(D9, IP6_27_24) +#define GPSR0_8 F_(D8, IP6_23_20) +#define GPSR0_7 F_(D7, IP6_19_16) +#define GPSR0_6 F_(D6, IP6_15_12) +#define GPSR0_5 F_(D5, IP6_11_8) +#define GPSR0_4 F_(D4, IP6_7_4) +#define GPSR0_3 F_(D3, IP6_3_0) +#define GPSR0_2 F_(D2, IP5_31_28) +#define GPSR0_1 F_(D1, IP5_27_24) +#define GPSR0_0 F_(D0, IP5_23_20) + +/* GPSR1 */ +#define GPSR1_22 F_(WE0_N, IP5_19_16) +#define GPSR1_21 F_(CS0_N, IP5_15_12) +#define GPSR1_20 FM(CLKOUT) +#define GPSR1_19 F_(A19, IP5_11_8) +#define GPSR1_18 F_(A18, IP5_7_4) +#define GPSR1_17 F_(A17, IP5_3_0) +#define GPSR1_16 F_(A16, IP4_31_28) +#define GPSR1_15 F_(A15, IP4_27_24) +#define GPSR1_14 F_(A14, IP4_23_20) +#define GPSR1_13 F_(A13, IP4_19_16) +#define GPSR1_12 F_(A12, IP4_15_12) +#define GPSR1_11 F_(A11, IP4_11_8) +#define GPSR1_10 F_(A10, IP4_7_4) +#define GPSR1_9 F_(A9, IP4_3_0) +#define GPSR1_8 F_(A8, IP3_31_28) +#define GPSR1_7 F_(A7, IP3_27_24) +#define GPSR1_6 F_(A6, IP3_23_20) +#define GPSR1_5 F_(A5, IP3_19_16) +#define GPSR1_4 F_(A4, IP3_15_12) +#define GPSR1_3 F_(A3, IP3_11_8) +#define GPSR1_2 F_(A2, IP3_7_4) +#define GPSR1_1 F_(A1, IP3_3_0) +#define GPSR1_0 F_(A0, IP2_31_28) + +/* GPSR2 */ +#define GPSR2_25 F_(EX_WAIT0, IP2_27_24) +#define GPSR2_24 F_(RD_WR_N, IP2_23_20) +#define GPSR2_23 F_(RD_N, IP2_19_16) +#define GPSR2_22 F_(BS_N, IP2_15_12) +#define GPSR2_21 FM(AVB_PHY_INT) +#define GPSR2_20 F_(AVB_TXCREFCLK, IP2_3_0) +#define GPSR2_19 FM(AVB_RD3) +#define GPSR2_18 F_(AVB_RD2, IP1_31_28) +#define GPSR2_17 F_(AVB_RD1, IP1_27_24) +#define GPSR2_16 F_(AVB_RD0, IP1_23_20) +#define GPSR2_15 FM(AVB_RXC) +#define GPSR2_14 FM(AVB_RX_CTL) +#define GPSR2_13 F_(RPC_RESET_N, IP1_19_16) +#define GPSR2_12 F_(RPC_INT_N, IP1_15_12) +#define GPSR2_11 F_(QSPI1_SSL, IP1_11_8) +#define GPSR2_10 F_(QSPI1_IO3, IP1_7_4) +#define GPSR2_9 F_(QSPI1_IO2, IP1_3_0) +#define GPSR2_8 F_(QSPI1_MISO_IO1, IP0_31_28) +#define GPSR2_7 F_(QSPI1_MOSI_IO0, IP0_27_24) +#define GPSR2_6 F_(QSPI1_SPCLK, IP0_23_20) +#define GPSR2_5 FM(QSPI0_SSL) +#define GPSR2_4 F_(QSPI0_IO3, IP0_19_16) +#define GPSR2_3 F_(QSPI0_IO2, IP0_15_12) +#define GPSR2_2 F_(QSPI0_MISO_IO1, IP0_11_8) +#define GPSR2_1 F_(QSPI0_MOSI_IO0, IP0_7_4) +#define GPSR2_0 F_(QSPI0_SPCLK, IP0_3_0) + +/* GPSR3 */ +#define GPSR3_15 F_(SD1_WP, IP11_7_4) +#define GPSR3_14 F_(SD1_CD, IP11_3_0) +#define GPSR3_13 F_(SD0_WP, IP10_31_28) +#define GPSR3_12 F_(SD0_CD, IP10_27_24) +#define GPSR3_11 F_(SD1_DAT3, IP9_11_8) +#define GPSR3_10 F_(SD1_DAT2, IP9_7_4) +#define GPSR3_9 F_(SD1_DAT1, IP9_3_0) +#define GPSR3_8 F_(SD1_DAT0, IP8_31_28) +#define GPSR3_7 F_(SD1_CMD, IP8_27_24) +#define GPSR3_6 F_(SD1_CLK, IP8_23_20) +#define GPSR3_5 F_(SD0_DAT3, IP8_19_16) +#define GPSR3_4 F_(SD0_DAT2, IP8_15_12) +#define GPSR3_3 F_(SD0_DAT1, IP8_11_8) +#define GPSR3_2 F_(SD0_DAT0, IP8_7_4) +#define GPSR3_1 F_(SD0_CMD, IP8_3_0) +#define GPSR3_0 F_(SD0_CLK, IP7_31_28) + +/* GPSR4 */ +#define GPSR4_10 F_(SD3_DS, IP10_23_20) +#define GPSR4_9 F_(SD3_DAT7, IP10_19_16) +#define GPSR4_8 F_(SD3_DAT6, IP10_15_12) +#define GPSR4_7 F_(SD3_DAT5, IP10_11_8) +#define GPSR4_6 F_(SD3_DAT4, IP10_7_4) +#define GPSR4_5 F_(SD3_DAT3, IP10_3_0) +#define GPSR4_4 F_(SD3_DAT2, IP9_31_28) +#define GPSR4_3 F_(SD3_DAT1, IP9_27_24) +#define GPSR4_2 F_(SD3_DAT0, IP9_23_20) +#define GPSR4_1 F_(SD3_CMD, IP9_19_16) +#define GPSR4_0 F_(SD3_CLK, IP9_15_12) + +/* GPSR5 */ +#define GPSR5_19 F_(MLB_DAT, IP13_23_20) +#define GPSR5_18 F_(MLB_SIG, IP13_19_16) +#define GPSR5_17 F_(MLB_CLK, IP13_15_12) +#define GPSR5_16 F_(SSI_SDATA9, IP13_11_8) +#define GPSR5_15 F_(MSIOF0_SS2, IP13_7_4) +#define GPSR5_14 F_(MSIOF0_SS1, IP13_3_0) +#define GPSR5_13 F_(MSIOF0_SYNC, IP12_31_28) +#define GPSR5_12 F_(MSIOF0_TXD, IP12_27_24) +#define GPSR5_11 F_(MSIOF0_RXD, IP12_23_20) +#define GPSR5_10 F_(MSIOF0_SCK, IP12_19_16) +#define GPSR5_9 F_(RX2_A, IP12_15_12) +#define GPSR5_8 F_(TX2_A, IP12_11_8) +#define GPSR5_7 F_(SCK2_A, IP12_7_4) +#define GPSR5_6 F_(TX1, IP12_3_0) +#define GPSR5_5 F_(RX1, IP11_31_28) +#define GPSR5_4 F_(RTS0_N_TANS_A, IP11_23_20) +#define GPSR5_3 F_(CTS0_N_A, IP11_19_16) +#define GPSR5_2 F_(TX0_A, IP11_15_12) +#define GPSR5_1 F_(RX0_A, IP11_11_8) +#define GPSR5_0 F_(SCK0_A, IP11_27_24) + +/* GPSR6 */ +#define GPSR6_17 F_(USB30_PWEN, IP15_27_24) +#define GPSR6_16 F_(SSI_SDATA6, IP15_19_16) +#define GPSR6_15 F_(SSI_WS6, IP15_15_12) +#define GPSR6_14 F_(SSI_SCK6, IP15_11_8) +#define GPSR6_13 F_(SSI_SDATA5, IP15_7_4) +#define GPSR6_12 F_(SSI_WS5, IP15_3_0) +#define GPSR6_11 F_(SSI_SCK5, IP14_31_28) +#define GPSR6_10 F_(SSI_SDATA4, IP14_27_24) +#define GPSR6_9 F_(USB30_OVC, IP15_31_28) +#define GPSR6_8 F_(AUDIO_CLKA, IP15_23_20) +#define GPSR6_7 F_(SSI_SDATA3, IP14_23_20) +#define GPSR6_6 F_(SSI_WS349, IP14_19_16) +#define GPSR6_5 F_(SSI_SCK349, IP14_15_12) +#define GPSR6_4 F_(SSI_SDATA2, IP14_11_8) +#define GPSR6_3 F_(SSI_SDATA1, IP14_7_4) +#define GPSR6_2 F_(SSI_SDATA0, IP14_3_0) +#define GPSR6_1 F_(SSI_WS01239, IP13_31_28) +#define GPSR6_0 F_(SSI_SCK01239, IP13_27_24) + +/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ /* 9 - F */ +#define IP0_3_0 FM(QSPI0_SPCLK) FM(HSCK4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP0_7_4 FM(QSPI0_MOSI_IO0) FM(HCTS4_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP0_11_8 FM(QSPI0_MISO_IO1) FM(HRTS4_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP0_15_12 FM(QSPI0_IO2) FM(HTX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP0_19_16 FM(QSPI0_IO3) FM(HRX4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP0_23_20 FM(QSPI1_SPCLK) FM(RIF2_CLK_A) FM(HSCK4_B) FM(VI4_DATA0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP0_27_24 FM(QSPI1_MOSI_IO0) FM(RIF2_SYNC_A) FM(HTX4_B) FM(VI4_DATA1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP0_31_28 FM(QSPI1_MISO_IO1) FM(RIF2_D0_A) FM(HRX4_B) FM(VI4_DATA2_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP1_3_0 FM(QSPI1_IO2) FM(RIF2_D1_A) FM(HTX3_C) FM(VI4_DATA3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP1_7_4 FM(QSPI1_IO3) FM(RIF3_CLK_A) FM(HRX3_C) FM(VI4_DATA4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP1_11_8 FM(QSPI1_SSL) FM(RIF3_SYNC_A) FM(HSCK3_C) FM(VI4_DATA5_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP1_15_12 FM(RPC_INT_N) FM(RIF3_D0_A) FM(HCTS3_N_C) FM(VI4_DATA6_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP1_19_16 FM(RPC_RESET_N) FM(RIF3_D1_A) FM(HRTS3_N_C) FM(VI4_DATA7_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP1_23_20 FM(AVB_RD0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP1_27_24 FM(AVB_RD1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP1_31_28 FM(AVB_RD2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP2_3_0 FM(AVB_TXCREFCLK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP2_7_4 FM(AVB_MDIO) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP2_11_8 FM(AVB_MDC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP2_15_12 FM(BS_N) FM(PWM0_A) FM(AVB_MAGIC) FM(VI4_CLK) F_(0, 0) FM(TX3_C) F_(0, 0) FM(VI5_CLK_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP2_19_16 FM(RD_N) FM(PWM1_A) FM(AVB_LINK) FM(VI4_FIELD) F_(0, 0) FM(RX3_C) FM(FSCLKST2_N_A) FM(VI5_DATA0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP2_23_20 FM(RD_WR_N) FM(SCL7_A) FM(AVB_AVTP_MATCH_A) FM(VI4_VSYNC_N) FM(TX5_B) FM(SCK3_C) FM(PWM5_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP2_27_24 FM(EX_WAIT0) FM(SDA7_A) FM(AVB_AVTP_CAPTURE_A) FM(VI4_HSYNC_N) FM(RX5_B) FM(PWM6_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP2_31_28 FM(A0) FM(IRQ0) FM(PWM2_A) FM(MSIOF3_SS1_B) FM(VI5_CLK_A) FM(DU_CDE) FM(HRX3_D) FM(IERX) FM(QSTB_QHE) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP3_3_0 FM(A1) FM(IRQ1) FM(PWM3_A) FM(DU_DOTCLKIN1) FM(VI5_DATA0_A) FM(DU_DISP_CDE) FM(SDA6_B) FM(IETX) FM(QCPV_QDE) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP3_7_4 FM(A2) FM(IRQ2) FM(AVB_AVTP_PPS) FM(VI4_CLKENB) FM(VI5_DATA1_A) FM(DU_DISP) FM(SCL6_B) F_(0, 0) FM(QSTVB_QVE) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP3_11_8 FM(A3) FM(CTS4_N_A) FM(PWM4_A) FM(VI4_DATA12) F_(0, 0) FM(DU_DOTCLKOUT0) FM(HTX3_D) FM(IECLK) FM(LCDOUT12) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP3_15_12 FM(A4) FM(RTS4_N_TANS_A) FM(MSIOF3_SYNC_B) FM(VI4_DATA8) FM(PWM2_B) FM(DU_DG4) FM(RIF2_CLK_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP3_19_16 FM(A5) FM(SCK4_A) FM(MSIOF3_SCK_B) FM(VI4_DATA9) FM(PWM3_B) F_(0, 0) FM(RIF2_SYNC_B) F_(0, 0) FM(QPOLA) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP3_23_20 FM(A6) FM(RX4_A) FM(MSIOF3_RXD_B) FM(VI4_DATA10) F_(0, 0) F_(0, 0) FM(RIF2_D0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP3_27_24 FM(A7) FM(TX4_A) FM(MSIOF3_TXD_B) FM(VI4_DATA11) F_(0, 0) F_(0, 0) FM(RIF2_D1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP3_31_28 FM(A8) FM(SDA6_A) FM(RX3_B) FM(HRX4_C) FM(VI5_HSYNC_N_A) FM(DU_HSYNC) FM(VI4_DATA0_B) F_(0, 0) FM(QSTH_QHS) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + +/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ /* 9 - F */ +#define IP4_3_0 FM(A9) FM(TX5_A) FM(IRQ3) FM(VI4_DATA16) FM(VI5_VSYNC_N_A) FM(DU_DG7) F_(0, 0) F_(0, 0) FM(LCDOUT15) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP4_7_4 FM(A10) FM(IRQ4) FM(MSIOF2_SYNC_B) FM(VI4_DATA13) FM(VI5_FIELD_A) FM(DU_DG5) FM(FSCLKST2_N_B) F_(0, 0) FM(LCDOUT13) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP4_11_8 FM(A11) FM(SCL6_A) FM(TX3_B) FM(HTX4_C) F_(0, 0) FM(DU_VSYNC) FM(VI4_DATA1_B) F_(0, 0) FM(QSTVA_QVS) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP4_15_12 FM(A12) FM(RX5_A) FM(MSIOF2_SS2_B) FM(VI4_DATA17) FM(VI5_DATA3_A) FM(DU_DG6) F_(0, 0) F_(0, 0) FM(LCDOUT14) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP4_19_16 FM(A13) FM(SCK5_A) FM(MSIOF2_SCK_B) FM(VI4_DATA14) FM(HRX4_D) FM(DU_DB2) F_(0, 0) F_(0, 0) FM(LCDOUT2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP4_23_20 FM(A14) FM(MSIOF1_SS1) FM(MSIOF2_RXD_B) FM(VI4_DATA15) FM(HTX4_D) FM(DU_DB3) F_(0, 0) F_(0, 0) FM(LCDOUT3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP4_27_24 FM(A15) FM(MSIOF1_SS2) FM(MSIOF2_TXD_B) FM(VI4_DATA18) FM(VI5_DATA4_A) FM(DU_DB4) F_(0, 0) F_(0, 0) FM(LCDOUT4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP4_31_28 FM(A16) FM(MSIOF1_SYNC) FM(MSIOF2_SS1_B) FM(VI4_DATA19) FM(VI5_DATA5_A) FM(DU_DB5) F_(0, 0) F_(0, 0) FM(LCDOUT5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP5_3_0 FM(A17) FM(MSIOF1_RXD) F_(0, 0) FM(VI4_DATA20) FM(VI5_DATA6_A) FM(DU_DB6) F_(0, 0) F_(0, 0) FM(LCDOUT6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP5_7_4 FM(A18) FM(MSIOF1_TXD) F_(0, 0) FM(VI4_DATA21) FM(VI5_DATA7_A) FM(DU_DB0) F_(0, 0) FM(HRX4_E) FM(LCDOUT0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP5_11_8 FM(A19) FM(MSIOF1_SCK) F_(0, 0) FM(VI4_DATA22) FM(VI5_DATA2_A) FM(DU_DB1) F_(0, 0) FM(HTX4_E) FM(LCDOUT1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP5_15_12 FM(CS0_N) FM(SCL5) F_(0, 0) F_(0, 0) F_(0, 0) FM(DU_DR0) FM(VI4_DATA2_B) F_(0, 0) FM(LCDOUT16) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP5_19_16 FM(WE0_N) FM(SDA5) F_(0, 0) F_(0, 0) F_(0, 0) FM(DU_DR1) FM(VI4_DATA3_B) F_(0, 0) FM(LCDOUT17) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP5_23_20 FM(D0) FM(MSIOF3_SCK_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(DU_DR2) FM(CTS4_N_C) F_(0, 0) FM(LCDOUT18) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP5_27_24 FM(D1) FM(MSIOF3_SYNC_A) FM(SCK3_A) FM(VI4_DATA23) FM(VI5_CLKENB_A) FM(DU_DB7) FM(RTS4_N_TANS_C) F_(0, 0) FM(LCDOUT7) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP5_31_28 FM(D2) FM(MSIOF3_RXD_A) FM(RX5_C) F_(0, 0) FM(VI5_DATA14_A) FM(DU_DR3) FM(RX4_C) F_(0, 0) FM(LCDOUT19) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP6_3_0 FM(D3) FM(MSIOF3_TXD_A) FM(TX5_C) F_(0, 0) FM(VI5_DATA15_A) FM(DU_DR4) FM(TX4_C) F_(0, 0) FM(LCDOUT20) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP6_7_4 FM(D4) FM(CANFD1_TX) FM(HSCK3_B) FM(CAN1_TX) FM(RTS3_N_TANS_A) FM(MSIOF3_SS2_A) F_(0, 0) FM(VI5_DATA1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP6_11_8 FM(D5) FM(RX3_A) FM(HRX3_B) F_(0, 0) F_(0, 0) FM(DU_DR5) FM(VI4_DATA4_B) F_(0, 0) FM(LCDOUT21) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP6_15_12 FM(D6) FM(TX3_A) FM(HTX3_B) F_(0, 0) F_(0, 0) FM(DU_DR6) FM(VI4_DATA5_B) F_(0, 0) FM(LCDOUT22) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP6_19_16 FM(D7) FM(CANFD1_RX) FM(IRQ5) FM(CAN1_RX) FM(CTS3_N_A) F_(0, 0) F_(0, 0) FM(VI5_DATA2_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP6_23_20 FM(D8) FM(MSIOF2_SCK_A) FM(SCK4_B) F_(0, 0) FM(VI5_DATA12_A) FM(DU_DR7) FM(RIF3_CLK_B) FM(HCTS3_N_E) FM(LCDOUT23) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP6_27_24 FM(D9) FM(MSIOF2_SYNC_A) F_(0, 0) F_(0, 0) FM(VI5_DATA10_A) FM(DU_DG0) FM(RIF3_SYNC_B) FM(HRX3_E) FM(LCDOUT8) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP6_31_28 FM(D10) FM(MSIOF2_RXD_A) F_(0, 0) F_(0, 0) FM(VI5_DATA13_A) FM(DU_DG1) FM(RIF3_D0_B) FM(HTX3_E) FM(LCDOUT9) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP7_3_0 FM(D11) FM(MSIOF2_TXD_A) F_(0, 0) F_(0, 0) FM(VI5_DATA11_A) FM(DU_DG2) FM(RIF3_D1_B) FM(HRTS3_N_E) FM(LCDOUT10) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP7_7_4 FM(D12) FM(CANFD0_TX) FM(TX4_B) FM(CAN0_TX) FM(VI5_DATA8_A) F_(0, 0) F_(0, 0) FM(VI5_DATA3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP7_11_8 FM(D13) FM(CANFD0_RX) FM(RX4_B) FM(CAN0_RX) FM(VI5_DATA9_A) FM(SCL7_B) F_(0, 0) FM(VI5_DATA4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP7_15_12 FM(D14) FM(CAN_CLK) FM(HRX3_A) FM(MSIOF2_SS2_A) F_(0, 0) FM(SDA7_B) F_(0, 0) FM(VI5_DATA5_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP7_19_16 FM(D15) FM(MSIOF2_SS1_A) FM(HTX3_A) FM(MSIOF3_SS1_A) F_(0, 0) FM(DU_DG3) F_(0, 0) F_(0, 0) FM(LCDOUT11) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP7_23_20 FM(SCL4) FM(CS1_N_A26) F_(0, 0) F_(0, 0) F_(0, 0) FM(DU_DOTCLKIN0) FM(VI4_DATA6_B) FM(VI5_DATA6_B) FM(QCLK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP7_27_24 FM(SDA4) FM(WE1_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(VI4_DATA7_B) FM(VI5_DATA7_B) FM(QPOLB) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP7_31_28 FM(SD0_CLK) FM(NFDATA8) FM(SCL1_C) FM(HSCK1_B) FM(SDA2_E) FM(FMCLK_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + +/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ /* 9 - F */ +#define IP8_3_0 FM(SD0_CMD) FM(NFDATA9) F_(0, 0) FM(HRX1_B) F_(0, 0) FM(SPEEDIN_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP8_7_4 FM(SD0_DAT0) FM(NFDATA10) F_(0, 0) FM(HTX1_B) F_(0, 0) FM(REMOCON_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP8_11_8 FM(SD0_DAT1) FM(NFDATA11) FM(SDA2_C) FM(HCTS1_N_B) F_(0, 0) FM(FMIN_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP8_15_12 FM(SD0_DAT2) FM(NFDATA12) FM(SCL2_C) FM(HRTS1_N_B) F_(0, 0) FM(BPFCLK_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP8_19_16 FM(SD0_DAT3) FM(NFDATA13) FM(SDA1_C) FM(SCL2_E) FM(SPEEDIN_C) FM(REMOCON_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP8_23_20 FM(SD1_CLK) FM(NFDATA14_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP8_27_24 FM(SD1_CMD) FM(NFDATA15_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP8_31_28 FM(SD1_DAT0) FM(NFWP_N_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP9_3_0 FM(SD1_DAT1) FM(NFCE_N_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP9_7_4 FM(SD1_DAT2) FM(NFALE_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP9_11_8 FM(SD1_DAT3) FM(NFRB_N_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP9_15_12 FM(SD3_CLK) FM(NFWE_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP9_19_16 FM(SD3_CMD) FM(NFRE_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP9_23_20 FM(SD3_DAT0) FM(NFDATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP9_27_24 FM(SD3_DAT1) FM(NFDATA1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP9_31_28 FM(SD3_DAT2) FM(NFDATA2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP10_3_0 FM(SD3_DAT3) FM(NFDATA3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP10_7_4 FM(SD3_DAT4) FM(NFDATA4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP10_11_8 FM(SD3_DAT5) FM(NFDATA5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP10_15_12 FM(SD3_DAT6) FM(NFDATA6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP10_19_16 FM(SD3_DAT7) FM(NFDATA7) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP10_23_20 FM(SD3_DS) FM(NFCLE) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP10_27_24 FM(SD0_CD) FM(NFALE_A) FM(SD3_CD) FM(RIF0_CLK_B) FM(SCL2_B) FM(TCLK1_A) FM(SSI_SCK2_B) FM(TS_SCK0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP10_31_28 FM(SD0_WP) FM(NFRB_N_A) FM(SD3_WP) FM(RIF0_D0_B) FM(SDA2_B) FM(TCLK2_A) FM(SSI_WS2_B) FM(TS_SDAT0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP11_3_0 FM(SD1_CD) FM(NFCE_N_A) FM(SSI_SCK1) FM(RIF0_D1_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SDEN0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP11_7_4 FM(SD1_WP) FM(NFWP_N_A) FM(SSI_WS1) FM(RIF0_SYNC_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SPSYNC0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP11_11_8 FM(RX0_A) FM(HRX1_A) FM(SSI_SCK2_A) FM(RIF1_SYNC) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SCK1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP11_15_12 FM(TX0_A) FM(HTX1_A) FM(SSI_WS2_A) FM(RIF1_D0) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SDAT1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP11_19_16 FM(CTS0_N_A) FM(NFDATA14_A) FM(AUDIO_CLKOUT_A) FM(RIF1_D1) FM(SCIF_CLK_A) FM(FMCLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP11_23_20 FM(RTS0_N_TANS_A) FM(NFDATA15_A) FM(AUDIO_CLKOUT1_A) FM(RIF1_CLK) FM(SCL2_A) FM(FMIN_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP11_27_24 FM(SCK0_A) FM(HSCK1_A) FM(USB3HS0_ID) FM(RTS1_N_TANS) FM(SDA2_A) FM(FMCLK_C) F_(0, 0) F_(0, 0) FM(USB1_ID) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP11_31_28 FM(RX1) FM(HRX2_B) FM(SSI_SCK9_B) FM(AUDIO_CLKOUT1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + +/* IPSRx */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ /* 8 */ /* 9 - F */ +#define IP12_3_0 FM(TX1) FM(HTX2_B) FM(SSI_WS9_B) FM(AUDIO_CLKOUT3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP12_7_4 FM(SCK2_A) FM(HSCK0_A) FM(AUDIO_CLKB_A) FM(CTS1_N) FM(RIF0_CLK_A) FM(REMOCON_A) FM(SCIF_CLK_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP12_11_8 FM(TX2_A) FM(HRX0_A) FM(AUDIO_CLKOUT2_A) F_(0, 0) FM(SCL1_A) F_(0, 0) FM(FSO_CFE_0_N_A) FM(TS_SDEN1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP12_15_12 FM(RX2_A) FM(HTX0_A) FM(AUDIO_CLKOUT3_A) F_(0, 0) FM(SDA1_A) F_(0, 0) FM(FSO_CFE_1_N_A) FM(TS_SPSYNC1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP12_19_16 FM(MSIOF0_SCK) F_(0, 0) FM(SSI_SCK78) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP12_23_20 FM(MSIOF0_RXD) F_(0, 0) FM(SSI_WS78) F_(0, 0) F_(0, 0) FM(TX2_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP12_27_24 FM(MSIOF0_TXD) F_(0, 0) FM(SSI_SDATA7) F_(0, 0) F_(0, 0) FM(RX2_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP12_31_28 FM(MSIOF0_SYNC) FM(AUDIO_CLKOUT_B) FM(SSI_SDATA8) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP13_3_0 FM(MSIOF0_SS1) FM(HRX2_A) FM(SSI_SCK4) FM(HCTS0_N_A) FM(BPFCLK_C) FM(SPEEDIN_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP13_7_4 FM(MSIOF0_SS2) FM(HTX2_A) FM(SSI_WS4) FM(HRTS0_N_A) FM(FMIN_C) FM(BPFCLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP13_11_8 FM(SSI_SDATA9) F_(0, 0) FM(AUDIO_CLKC_A) FM(SCK1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP13_15_12 FM(MLB_CLK) FM(RX0_B) F_(0, 0) FM(RIF0_D0_A) FM(SCL1_B) FM(TCLK1_B) F_(0, 0) F_(0, 0) FM(SIM0_RST_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP13_19_16 FM(MLB_SIG) FM(SCK0_B) F_(0, 0) FM(RIF0_D1_A) FM(SDA1_B) FM(TCLK2_B) F_(0, 0) F_(0, 0) FM(SIM0_D_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP13_23_20 FM(MLB_DAT) FM(TX0_B) F_(0, 0) FM(RIF0_SYNC_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(SIM0_CLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP13_27_24 FM(SSI_SCK01239) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP13_31_28 FM(SSI_WS01239) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP14_3_0 FM(SSI_SDATA0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP14_7_4 FM(SSI_SDATA1) FM(AUDIO_CLKC_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(PWM0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP14_11_8 FM(SSI_SDATA2) FM(AUDIO_CLKOUT2_B) FM(SSI_SCK9_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(PWM1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP14_15_12 FM(SSI_SCK349) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(PWM2_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP14_19_16 FM(SSI_WS349) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(PWM3_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP14_23_20 FM(SSI_SDATA3) FM(AUDIO_CLKOUT1_C) FM(AUDIO_CLKB_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(PWM4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP14_27_24 FM(SSI_SDATA4) F_(0, 0) FM(SSI_WS9_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(PWM5_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP14_31_28 FM(SSI_SCK5) FM(HRX0_B) F_(0, 0) FM(USB0_PWEN_B) FM(SCL2_D) F_(0, 0) FM(PWM6_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP15_3_0 FM(SSI_WS5) FM(HTX0_B) F_(0, 0) FM(USB0_OVC_B) FM(SDA2_D) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP15_7_4 FM(SSI_SDATA5) FM(HSCK0_B) FM(AUDIO_CLKB_C) FM(TPU0TO0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP15_11_8 FM(SSI_SCK6) FM(HSCK2_A) FM(AUDIO_CLKC_C) FM(TPU0TO1) F_(0, 0) F_(0, 0) FM(FSO_CFE_0_N_B) F_(0, 0) FM(SIM0_RST_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP15_15_12 FM(SSI_WS6) FM(HCTS2_N_A) FM(AUDIO_CLKOUT2_C) FM(TPU0TO2) FM(SDA1_D) F_(0, 0) FM(FSO_CFE_1_N_B) F_(0, 0) FM(SIM0_D_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP15_19_16 FM(SSI_SDATA6) FM(HRTS2_N_A) FM(AUDIO_CLKOUT3_C) FM(TPU0TO3) FM(SCL1_D) F_(0, 0) FM(FSO_TOE_N_B) F_(0, 0) FM(SIM0_CLK_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP15_23_20 FM(AUDIO_CLKA) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP15_27_24 FM(USB30_PWEN) FM(USB0_PWEN_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +#define IP15_31_28 FM(USB30_OVC) FM(USB0_OVC_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(FSO_TOE_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + +#define PINMUX_GPSR \ +\ + \ + \ + \ + \ + \ + \ + GPSR2_25 \ + GPSR2_24 \ + GPSR2_23 \ + GPSR1_22 GPSR2_22 \ + GPSR1_21 GPSR2_21 \ + GPSR1_20 GPSR2_20 \ + GPSR1_19 GPSR2_19 GPSR5_19 \ + GPSR1_18 GPSR2_18 GPSR5_18 \ +GPSR0_17 GPSR1_17 GPSR2_17 GPSR5_17 GPSR6_17 \ +GPSR0_16 GPSR1_16 GPSR2_16 GPSR5_16 GPSR6_16 \ +GPSR0_15 GPSR1_15 GPSR2_15 GPSR3_15 GPSR5_15 GPSR6_15 \ +GPSR0_14 GPSR1_14 GPSR2_14 GPSR3_14 GPSR5_14 GPSR6_14 \ +GPSR0_13 GPSR1_13 GPSR2_13 GPSR3_13 GPSR5_13 GPSR6_13 \ +GPSR0_12 GPSR1_12 GPSR2_12 GPSR3_12 GPSR5_12 GPSR6_12 \ +GPSR0_11 GPSR1_11 GPSR2_11 GPSR3_11 GPSR5_11 GPSR6_11 \ +GPSR0_10 GPSR1_10 GPSR2_10 GPSR3_10 GPSR4_10 GPSR5_10 GPSR6_10 \ +GPSR0_9 GPSR1_9 GPSR2_9 GPSR3_9 GPSR4_9 GPSR5_9 GPSR6_9 \ +GPSR0_8 GPSR1_8 GPSR2_8 GPSR3_8 GPSR4_8 GPSR5_8 GPSR6_8 \ +GPSR0_7 GPSR1_7 GPSR2_7 GPSR3_7 GPSR4_7 GPSR5_7 GPSR6_7 \ +GPSR0_6 GPSR1_6 GPSR2_6 GPSR3_6 GPSR4_6 GPSR5_6 GPSR6_6 \ +GPSR0_5 GPSR1_5 GPSR2_5 GPSR3_5 GPSR4_5 GPSR5_5 GPSR6_5 \ +GPSR0_4 GPSR1_4 GPSR2_4 GPSR3_4 GPSR4_4 GPSR5_4 GPSR6_4 \ +GPSR0_3 GPSR1_3 GPSR2_3 GPSR3_3 GPSR4_3 GPSR5_3 GPSR6_3 \ +GPSR0_2 GPSR1_2 GPSR2_2 GPSR3_2 GPSR4_2 GPSR5_2 GPSR6_2 \ +GPSR0_1 GPSR1_1 GPSR2_1 GPSR3_1 GPSR4_1 GPSR5_1 GPSR6_1 \ +GPSR0_0 GPSR1_0 GPSR2_0 GPSR3_0 GPSR4_0 GPSR5_0 GPSR6_0 + +#define PINMUX_IPSR \ +\ +FM(IP0_3_0) IP0_3_0 FM(IP1_3_0) IP1_3_0 FM(IP2_3_0) IP2_3_0 FM(IP3_3_0) IP3_3_0 \ +FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \ +FM(IP0_11_8) IP0_11_8 FM(IP1_11_8) IP1_11_8 FM(IP2_11_8) IP2_11_8 FM(IP3_11_8) IP3_11_8 \ +FM(IP0_15_12) IP0_15_12 FM(IP1_15_12) IP1_15_12 FM(IP2_15_12) IP2_15_12 FM(IP3_15_12) IP3_15_12 \ +FM(IP0_19_16) IP0_19_16 FM(IP1_19_16) IP1_19_16 FM(IP2_19_16) IP2_19_16 FM(IP3_19_16) IP3_19_16 \ +FM(IP0_23_20) IP0_23_20 FM(IP1_23_20) IP1_23_20 FM(IP2_23_20) IP2_23_20 FM(IP3_23_20) IP3_23_20 \ +FM(IP0_27_24) IP0_27_24 FM(IP1_27_24) IP1_27_24 FM(IP2_27_24) IP2_27_24 FM(IP3_27_24) IP3_27_24 \ +FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_31_28) IP3_31_28 \ +\ +FM(IP4_3_0) IP4_3_0 FM(IP5_3_0) IP5_3_0 FM(IP6_3_0) IP6_3_0 FM(IP7_3_0) IP7_3_0 \ +FM(IP4_7_4) IP4_7_4 FM(IP5_7_4) IP5_7_4 FM(IP6_7_4) IP6_7_4 FM(IP7_7_4) IP7_7_4 \ +FM(IP4_11_8) IP4_11_8 FM(IP5_11_8) IP5_11_8 FM(IP6_11_8) IP6_11_8 FM(IP7_11_8) IP7_11_8 \ +FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \ +FM(IP4_19_16) IP4_19_16 FM(IP5_19_16) IP5_19_16 FM(IP6_19_16) IP6_19_16 FM(IP7_19_16) IP7_19_16 \ +FM(IP4_23_20) IP4_23_20 FM(IP5_23_20) IP5_23_20 FM(IP6_23_20) IP6_23_20 FM(IP7_23_20) IP7_23_20 \ +FM(IP4_27_24) IP4_27_24 FM(IP5_27_24) IP5_27_24 FM(IP6_27_24) IP6_27_24 FM(IP7_27_24) IP7_27_24 \ +FM(IP4_31_28) IP4_31_28 FM(IP5_31_28) IP5_31_28 FM(IP6_31_28) IP6_31_28 FM(IP7_31_28) IP7_31_28 \ +\ +FM(IP8_3_0) IP8_3_0 FM(IP9_3_0) IP9_3_0 FM(IP10_3_0) IP10_3_0 FM(IP11_3_0) IP11_3_0 \ +FM(IP8_7_4) IP8_7_4 FM(IP9_7_4) IP9_7_4 FM(IP10_7_4) IP10_7_4 FM(IP11_7_4) IP11_7_4 \ +FM(IP8_11_8) IP8_11_8 FM(IP9_11_8) IP9_11_8 FM(IP10_11_8) IP10_11_8 FM(IP11_11_8) IP11_11_8 \ +FM(IP8_15_12) IP8_15_12 FM(IP9_15_12) IP9_15_12 FM(IP10_15_12) IP10_15_12 FM(IP11_15_12) IP11_15_12 \ +FM(IP8_19_16) IP8_19_16 FM(IP9_19_16) IP9_19_16 FM(IP10_19_16) IP10_19_16 FM(IP11_19_16) IP11_19_16 \ +FM(IP8_23_20) IP8_23_20 FM(IP9_23_20) IP9_23_20 FM(IP10_23_20) IP10_23_20 FM(IP11_23_20) IP11_23_20 \ +FM(IP8_27_24) IP8_27_24 FM(IP9_27_24) IP9_27_24 FM(IP10_27_24) IP10_27_24 FM(IP11_27_24) IP11_27_24 \ +FM(IP8_31_28) IP8_31_28 FM(IP9_31_28) IP9_31_28 FM(IP10_31_28) IP10_31_28 FM(IP11_31_28) IP11_31_28 \ +\ +FM(IP12_3_0) IP12_3_0 FM(IP13_3_0) IP13_3_0 FM(IP14_3_0) IP14_3_0 FM(IP15_3_0) IP15_3_0 \ +FM(IP12_7_4) IP12_7_4 FM(IP13_7_4) IP13_7_4 FM(IP14_7_4) IP14_7_4 FM(IP15_7_4) IP15_7_4 \ +FM(IP12_11_8) IP12_11_8 FM(IP13_11_8) IP13_11_8 FM(IP14_11_8) IP14_11_8 FM(IP15_11_8) IP15_11_8 \ +FM(IP12_15_12) IP12_15_12 FM(IP13_15_12) IP13_15_12 FM(IP14_15_12) IP14_15_12 FM(IP15_15_12) IP15_15_12 \ +FM(IP12_19_16) IP12_19_16 FM(IP13_19_16) IP13_19_16 FM(IP14_19_16) IP14_19_16 FM(IP15_19_16) IP15_19_16 \ +FM(IP12_23_20) IP12_23_20 FM(IP13_23_20) IP13_23_20 FM(IP14_23_20) IP14_23_20 FM(IP15_23_20) IP15_23_20 \ +FM(IP12_27_24) IP12_27_24 FM(IP13_27_24) IP13_27_24 FM(IP14_27_24) IP14_27_24 FM(IP15_27_24) IP15_27_24 \ +FM(IP12_31_28) IP12_31_28 FM(IP13_31_28) IP13_31_28 FM(IP14_31_28) IP14_31_28 FM(IP15_31_28) IP15_31_28 + +/* MOD_SEL0 */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ +#define MOD_SEL0_30_29 FM(SEL_ADGB_0) FM(SEL_ADGB_1) FM(SEL_ADGB_2) F_(0, 0) +#define MOD_SEL0_28 FM(SEL_DRIF0_0) FM(SEL_DRIF0_1) +#define MOD_SEL0_27_26 FM(SEL_FM_0) FM(SEL_FM_1) FM(SEL_FM_2) F_(0, 0) +#define MOD_SEL0_25 FM(SEL_FSO_0) FM(SEL_FSO_1) +#define MOD_SEL0_24 FM(SEL_HSCIF0_0) FM(SEL_HSCIF0_1) +#define MOD_SEL0_23 FM(SEL_HSCIF1_0) FM(SEL_HSCIF1_1) +#define MOD_SEL0_22 FM(SEL_HSCIF2_0) FM(SEL_HSCIF2_1) +#define MOD_SEL0_21_20 FM(SEL_I2C1_0) FM(SEL_I2C1_1) FM(SEL_I2C1_2) FM(SEL_I2C1_3) FM(SEL_I2C1_4) F_(0, 0) F_(0, 0) F_(0, 0) +#define MOD_SEL0_19_18_17 FM(SEL_I2C2_0) FM(SEL_I2C2_1) FM(SEL_I2C2_2) FM(SEL_I2C2_3) FM(SEL_I2C2_4) F_(0, 0) F_(0, 0) F_(0, 0) +#define MOD_SEL0_16 FM(SEL_NDFC_0) FM(SEL_NDFC_1) +#define MOD_SEL0_15 FM(SEL_PWM0_0) FM(SEL_PWM0_1) +#define MOD_SEL0_14 FM(SEL_PWM1_0) FM(SEL_PWM1_1) +#define MOD_SEL0_13_12 FM(SEL_PWM2_0) FM(SEL_PWM2_1) FM(SEL_PWM2_2) F_(0, 0) +#define MOD_SEL0_11_10 FM(SEL_PWM3_0) FM(SEL_PWM3_1) FM(SEL_PWM3_2) F_(0, 0) +#define MOD_SEL0_9 FM(SEL_PWM4_0) FM(SEL_PWM4_1) +#define MOD_SEL0_8 FM(SEL_PWM5_0) FM(SEL_PWM5_1) +#define MOD_SEL0_7 FM(SEL_PWM6_0) FM(SEL_PWM6_1) +#define MOD_SEL0_6_5 FM(SEL_REMOCON_0) FM(SEL_REMOCON_1) FM(SEL_REMOCON_2) F_(0, 0) +#define MOD_SEL0_4 FM(SEL_SCIF_0) FM(SEL_SCIF_1) +#define MOD_SEL0_3 FM(SEL_SCIF0_0) FM(SEL_SCIF0_1) +#define MOD_SEL0_2 FM(SEL_SCIF2_0) FM(SEL_SCIF2_1) +#define MOD_SEL0_1_0 FM(SEL_SPEED_PULSE_IF_0) FM(SEL_SPEED_PULSE_IF_1) FM(SEL_SPEED_PULSE_IF_2) F_(0, 0) + +/* MOD_SEL1 */ /* 0 */ /* 1 */ /* 2 */ /* 3 */ /* 4 */ /* 5 */ /* 6 */ /* 7 */ +#define MOD_SEL1_31 FM(SEL_SIMCARD_0) FM(SEL_SIMCARD_1) +#define MOD_SEL1_30 FM(SEL_SSI2_0) FM(SEL_SSI2_1) +#define MOD_SEL1_29 FM(SEL_TIMER_TMU_0) FM(SEL_TIMER_TMU_1) +#define MOD_SEL1_28 FM(SEL_USB_20_CH0_0) FM(SEL_USB_20_CH0_1) +#define MOD_SEL1_26 FM(SEL_DRIF2_0) FM(SEL_DRIF2_1) +#define MOD_SEL1_25 FM(SEL_DRIF3_0) FM(SEL_DRIF3_1) +#define MOD_SEL1_24_23_22 FM(SEL_HSCIF3_0) FM(SEL_HSCIF3_1) FM(SEL_HSCIF3_2) FM(SEL_HSCIF3_3) FM(SEL_HSCIF3_4) F_(0, 0) F_(0, 0) F_(0, 0) +#define MOD_SEL1_21_20_19 FM(SEL_HSCIF4_0) FM(SEL_HSCIF4_1) FM(SEL_HSCIF4_2) FM(SEL_HSCIF4_3) FM(SEL_HSCIF4_4) F_(0, 0) F_(0, 0) F_(0, 0) +#define MOD_SEL1_18 FM(SEL_I2C6_0) FM(SEL_I2C6_1) +#define MOD_SEL1_17 FM(SEL_I2C7_0) FM(SEL_I2C7_1) +#define MOD_SEL1_16 FM(SEL_MSIOF2_0) FM(SEL_MSIOF2_1) +#define MOD_SEL1_15 FM(SEL_MSIOF3_0) FM(SEL_MSIOF3_1) +#define MOD_SEL1_14_13 FM(SEL_SCIF3_0) FM(SEL_SCIF3_1) FM(SEL_SCIF3_2) F_(0, 0) +#define MOD_SEL1_12_11 FM(SEL_SCIF4_0) FM(SEL_SCIF4_1) FM(SEL_SCIF4_2) F_(0, 0) +#define MOD_SEL1_10_9 FM(SEL_SCIF5_0) FM(SEL_SCIF5_1) FM(SEL_SCIF5_2) F_(0, 0) +#define MOD_SEL1_8 FM(SEL_VIN4_0) FM(SEL_VIN4_1) +#define MOD_SEL1_7 FM(SEL_VIN5_0) FM(SEL_VIN5_1) +#define MOD_SEL1_6_5 FM(SEL_ADGC_0) FM(SEL_ADGC_1) FM(SEL_ADGC_2) F_(0, 0) +#define MOD_SEL1_4 FM(SEL_SSI9_0) FM(SEL_SSI9_1) + +#define PINMUX_MOD_SELS \ +\ + MOD_SEL1_31 \ +MOD_SEL0_30_29 MOD_SEL1_30 \ + MOD_SEL1_29 \ +MOD_SEL0_28 MOD_SEL1_28 \ +MOD_SEL0_27_26 \ + MOD_SEL1_26 \ +MOD_SEL0_25 MOD_SEL1_25 \ +MOD_SEL0_24 MOD_SEL1_24_23_22 \ +MOD_SEL0_23 \ +MOD_SEL0_22 \ +MOD_SEL0_21_20 MOD_SEL1_21_20_19 \ +MOD_SEL0_19_18_17 MOD_SEL1_18 \ + MOD_SEL1_17 \ +MOD_SEL0_16 MOD_SEL1_16 \ +MOD_SEL0_15 MOD_SEL1_15 \ +MOD_SEL0_14 MOD_SEL1_14_13 \ +MOD_SEL0_13_12 \ + MOD_SEL1_12_11 \ +MOD_SEL0_11_10 \ + MOD_SEL1_10_9 \ +MOD_SEL0_9 \ +MOD_SEL0_8 MOD_SEL1_8 \ +MOD_SEL0_7 MOD_SEL1_7 \ +MOD_SEL0_6_5 MOD_SEL1_6_5 \ +MOD_SEL0_4 MOD_SEL1_4 \ +MOD_SEL0_3 \ +MOD_SEL0_2 \ +MOD_SEL0_1_0 + +enum { + PINMUX_RESERVED = 0, + + PINMUX_DATA_BEGIN, + GP_ALL(DATA), + PINMUX_DATA_END, + +#define F_(x, y) +#define FM(x) FN_##x, + PINMUX_FUNCTION_BEGIN, + GP_ALL(FN), + PINMUX_GPSR + PINMUX_IPSR + PINMUX_MOD_SELS + PINMUX_FUNCTION_END, +#undef F_ +#undef FM + +#define F_(x, y) +#define FM(x) x##_MARK, + PINMUX_MARK_BEGIN, + PINMUX_GPSR + PINMUX_IPSR + PINMUX_MOD_SELS + PINMUX_MARK_END, +#undef F_ +#undef FM +}; + +static const u16 pinmux_data[] = { + PINMUX_DATA_GP_ALL(), + + /* IPSR0 */ + PINMUX_IPSR_GPSR(IP0_3_0, QSPI0_SPCLK), + PINMUX_IPSR_MSEL(IP0_3_0, HSCK4_A, SEL_HSCIF4_0), + + PINMUX_IPSR_GPSR(IP0_7_4, QSPI0_MOSI_IO0), + PINMUX_IPSR_MSEL(IP0_7_4, HCTS4_N_A, SEL_HSCIF4_0), + + PINMUX_IPSR_GPSR(IP0_11_8, QSPI0_MISO_IO1), + PINMUX_IPSR_MSEL(IP0_11_8, HRTS4_N_A, SEL_HSCIF4_0), + + PINMUX_IPSR_GPSR(IP0_15_12, QSPI0_IO2), + PINMUX_IPSR_GPSR(IP0_15_12, HTX4_A), + + PINMUX_IPSR_GPSR(IP0_19_16, QSPI0_IO3), + PINMUX_IPSR_MSEL(IP0_19_16, HRX4_A, SEL_HSCIF4_0), + + PINMUX_IPSR_GPSR(IP0_23_20, QSPI1_SPCLK), + PINMUX_IPSR_MSEL(IP0_23_20, RIF2_CLK_A, SEL_DRIF2_0), + PINMUX_IPSR_MSEL(IP0_23_20, HSCK4_B, SEL_HSCIF4_1), + PINMUX_IPSR_MSEL(IP0_23_20, VI4_DATA0_A, SEL_VIN4_0), + + PINMUX_IPSR_GPSR(IP0_27_24, QSPI1_MOSI_IO0), + PINMUX_IPSR_MSEL(IP0_27_24, RIF2_SYNC_A, SEL_DRIF2_0), + PINMUX_IPSR_GPSR(IP0_27_24, HTX4_B), + PINMUX_IPSR_MSEL(IP0_27_24, VI4_DATA1_A, SEL_VIN4_0), + + PINMUX_IPSR_GPSR(IP0_31_28, QSPI1_MISO_IO1), + PINMUX_IPSR_MSEL(IP0_31_28, RIF2_D0_A, SEL_DRIF2_0), + PINMUX_IPSR_MSEL(IP0_31_28, HRX4_B, SEL_HSCIF4_1), + PINMUX_IPSR_MSEL(IP0_31_28, VI4_DATA2_A, SEL_VIN4_0), + + /* IPSR1 */ + PINMUX_IPSR_GPSR(IP1_3_0, QSPI1_IO2), + PINMUX_IPSR_MSEL(IP1_3_0, RIF2_D1_A, SEL_DRIF2_0), + PINMUX_IPSR_GPSR(IP1_3_0, HTX3_C), + PINMUX_IPSR_MSEL(IP1_3_0, VI4_DATA3_A, SEL_VIN4_0), + + PINMUX_IPSR_GPSR(IP1_7_4, QSPI1_IO3), + PINMUX_IPSR_MSEL(IP1_7_4, RIF3_CLK_A, SEL_DRIF3_0), + PINMUX_IPSR_MSEL(IP1_7_4, HRX3_C, SEL_HSCIF3_2), + PINMUX_IPSR_MSEL(IP1_7_4, VI4_DATA4_A, SEL_VIN4_0), + + PINMUX_IPSR_GPSR(IP1_11_8, QSPI1_SSL), + PINMUX_IPSR_MSEL(IP1_11_8, RIF3_SYNC_A, SEL_DRIF3_0), + PINMUX_IPSR_MSEL(IP1_11_8, HSCK3_C, SEL_HSCIF3_2), + PINMUX_IPSR_MSEL(IP1_11_8, VI4_DATA5_A, SEL_VIN4_0), + + PINMUX_IPSR_GPSR(IP1_15_12, RPC_INT_N), + PINMUX_IPSR_MSEL(IP1_15_12, RIF3_D0_A, SEL_DRIF3_0), + PINMUX_IPSR_MSEL(IP1_15_12, HCTS3_N_C, SEL_HSCIF3_2), + PINMUX_IPSR_MSEL(IP1_15_12, VI4_DATA6_A, SEL_VIN4_0), + + PINMUX_IPSR_GPSR(IP1_19_16, RPC_RESET_N), + PINMUX_IPSR_MSEL(IP1_19_16, RIF3_D1_A, SEL_DRIF3_0), + PINMUX_IPSR_MSEL(IP1_19_16, HRTS3_N_C, SEL_HSCIF3_2), + PINMUX_IPSR_MSEL(IP1_19_16, VI4_DATA7_A, SEL_VIN4_0), + + PINMUX_IPSR_GPSR(IP1_23_20, AVB_RD0), + + PINMUX_IPSR_GPSR(IP1_27_24, AVB_RD1), + + PINMUX_IPSR_GPSR(IP1_31_28, AVB_RD2), + + /* IPSR2 */ + PINMUX_IPSR_GPSR(IP2_3_0, AVB_TXCREFCLK), + + PINMUX_IPSR_GPSR(IP2_7_4, AVB_MDIO), + + PINMUX_IPSR_GPSR(IP2_11_8, AVB_MDC), + + PINMUX_IPSR_GPSR(IP2_15_12, BS_N), + PINMUX_IPSR_MSEL(IP2_15_12, PWM0_A, SEL_PWM0_0), + PINMUX_IPSR_GPSR(IP2_15_12, AVB_MAGIC), + PINMUX_IPSR_GPSR(IP2_15_12, VI4_CLK), + PINMUX_IPSR_GPSR(IP2_15_12, TX3_C), + PINMUX_IPSR_MSEL(IP2_15_12, VI5_CLK_B, SEL_VIN5_1), + + PINMUX_IPSR_GPSR(IP2_19_16, RD_N), + PINMUX_IPSR_MSEL(IP2_19_16, PWM1_A, SEL_PWM1_0), + PINMUX_IPSR_GPSR(IP2_19_16, AVB_LINK), + PINMUX_IPSR_GPSR(IP2_19_16, VI4_FIELD), + PINMUX_IPSR_MSEL(IP2_19_16, RX3_C, SEL_SCIF3_2), + PINMUX_IPSR_GPSR(IP2_19_16, FSCLKST2_N_A), + PINMUX_IPSR_MSEL(IP2_19_16, VI5_DATA0_B, SEL_VIN5_1), + + PINMUX_IPSR_GPSR(IP2_23_20, RD_WR_N), + PINMUX_IPSR_MSEL(IP2_23_20, SCL7_A, SEL_I2C7_0), + PINMUX_IPSR_GPSR(IP2_23_20, AVB_AVTP_MATCH_A), + PINMUX_IPSR_GPSR(IP2_23_20, VI4_VSYNC_N), + PINMUX_IPSR_GPSR(IP2_23_20, TX5_B), + PINMUX_IPSR_MSEL(IP2_23_20, SCK3_C, SEL_SCIF3_2), + PINMUX_IPSR_MSEL(IP2_23_20, PWM5_A, SEL_PWM5_0), + + PINMUX_IPSR_GPSR(IP2_27_24, EX_WAIT0), + PINMUX_IPSR_MSEL(IP2_27_24, SDA7_A, SEL_I2C7_0), + PINMUX_IPSR_GPSR(IP2_27_24, AVB_AVTP_CAPTURE_A), + PINMUX_IPSR_GPSR(IP2_27_24, VI4_HSYNC_N), + PINMUX_IPSR_MSEL(IP2_27_24, RX5_B, SEL_SCIF5_1), + PINMUX_IPSR_MSEL(IP2_27_24, PWM6_A, SEL_PWM6_0), + + PINMUX_IPSR_GPSR(IP2_31_28, A0), + PINMUX_IPSR_GPSR(IP2_31_28, IRQ0), + PINMUX_IPSR_MSEL(IP2_31_28, PWM2_A, SEL_PWM2_0), + PINMUX_IPSR_MSEL(IP2_31_28, MSIOF3_SS1_B, SEL_MSIOF3_1), + PINMUX_IPSR_MSEL(IP2_31_28, VI5_CLK_A, SEL_VIN5_0), + PINMUX_IPSR_GPSR(IP2_31_28, DU_CDE), + PINMUX_IPSR_MSEL(IP2_31_28, HRX3_D, SEL_HSCIF3_3), + PINMUX_IPSR_GPSR(IP2_31_28, IERX), + PINMUX_IPSR_GPSR(IP2_31_28, QSTB_QHE), + + /* IPSR3 */ + PINMUX_IPSR_GPSR(IP3_3_0, A1), + PINMUX_IPSR_GPSR(IP3_3_0, IRQ1), + PINMUX_IPSR_MSEL(IP3_3_0, PWM3_A, SEL_PWM3_0), + PINMUX_IPSR_GPSR(IP3_3_0, DU_DOTCLKIN1), + PINMUX_IPSR_MSEL(IP3_3_0, VI5_DATA0_A, SEL_VIN5_0), + PINMUX_IPSR_GPSR(IP3_3_0, DU_DISP_CDE), + PINMUX_IPSR_MSEL(IP3_3_0, SDA6_B, SEL_I2C6_1), + PINMUX_IPSR_GPSR(IP3_3_0, IETX), + PINMUX_IPSR_GPSR(IP3_3_0, QCPV_QDE), + + PINMUX_IPSR_GPSR(IP3_7_4, A2), + PINMUX_IPSR_GPSR(IP3_7_4, IRQ2), + PINMUX_IPSR_GPSR(IP3_7_4, AVB_AVTP_PPS), + PINMUX_IPSR_GPSR(IP3_7_4, VI4_CLKENB), + PINMUX_IPSR_MSEL(IP3_7_4, VI5_DATA1_A, SEL_VIN5_0), + PINMUX_IPSR_GPSR(IP3_7_4, DU_DISP), + PINMUX_IPSR_MSEL(IP3_7_4, SCL6_B, SEL_I2C6_1), + PINMUX_IPSR_GPSR(IP3_7_4, QSTVB_QVE), + + PINMUX_IPSR_GPSR(IP3_11_8, A3), + PINMUX_IPSR_MSEL(IP3_11_8, CTS4_N_A, SEL_SCIF4_0), + PINMUX_IPSR_MSEL(IP3_11_8, PWM4_A, SEL_PWM4_0), + PINMUX_IPSR_GPSR(IP3_11_8, VI4_DATA12), + PINMUX_IPSR_GPSR(IP3_11_8, DU_DOTCLKOUT0), + PINMUX_IPSR_GPSR(IP3_11_8, HTX3_D), + PINMUX_IPSR_GPSR(IP3_11_8, IECLK), + PINMUX_IPSR_GPSR(IP3_11_8, LCDOUT12), + + PINMUX_IPSR_GPSR(IP3_15_12, A4), + PINMUX_IPSR_MSEL(IP3_15_12, RTS4_N_TANS_A, SEL_SCIF4_0), + PINMUX_IPSR_MSEL(IP3_15_12, MSIOF3_SYNC_B, SEL_MSIOF3_1), + PINMUX_IPSR_GPSR(IP3_15_12, VI4_DATA8), + PINMUX_IPSR_MSEL(IP3_15_12, PWM2_B, SEL_PWM2_1), + PINMUX_IPSR_GPSR(IP3_15_12, DU_DG4), + PINMUX_IPSR_MSEL(IP3_15_12, RIF2_CLK_B, SEL_DRIF2_1), + + PINMUX_IPSR_GPSR(IP3_19_16, A5), + PINMUX_IPSR_MSEL(IP3_19_16, SCK4_A, SEL_SCIF4_0), + PINMUX_IPSR_MSEL(IP3_19_16, MSIOF3_SCK_B, SEL_MSIOF3_1), + PINMUX_IPSR_GPSR(IP3_19_16, VI4_DATA9), + PINMUX_IPSR_MSEL(IP3_19_16, PWM3_B, SEL_PWM3_1), + PINMUX_IPSR_MSEL(IP3_19_16, RIF2_SYNC_B, SEL_DRIF2_1), + PINMUX_IPSR_GPSR(IP3_19_16, QPOLA), + + PINMUX_IPSR_GPSR(IP3_23_20, A6), + PINMUX_IPSR_MSEL(IP3_23_20, RX4_A, SEL_SCIF4_0), + PINMUX_IPSR_MSEL(IP3_23_20, MSIOF3_RXD_B, SEL_MSIOF3_1), + PINMUX_IPSR_GPSR(IP3_23_20, VI4_DATA10), + PINMUX_IPSR_MSEL(IP3_23_20, RIF2_D0_B, SEL_DRIF2_1), + + PINMUX_IPSR_GPSR(IP3_27_24, A7), + PINMUX_IPSR_GPSR(IP3_27_24, TX4_A), + PINMUX_IPSR_GPSR(IP3_27_24, MSIOF3_TXD_B), + PINMUX_IPSR_GPSR(IP3_27_24, VI4_DATA11), + PINMUX_IPSR_MSEL(IP3_27_24, RIF2_D1_B, SEL_DRIF2_1), + + PINMUX_IPSR_GPSR(IP3_31_28, A8), + PINMUX_IPSR_MSEL(IP3_31_28, SDA6_A, SEL_I2C6_0), + PINMUX_IPSR_MSEL(IP3_31_28, RX3_B, SEL_SCIF3_1), + PINMUX_IPSR_MSEL(IP3_31_28, HRX4_C, SEL_HSCIF4_2), + PINMUX_IPSR_MSEL(IP3_31_28, VI5_HSYNC_N_A, SEL_VIN5_0), + PINMUX_IPSR_GPSR(IP3_31_28, DU_HSYNC), + PINMUX_IPSR_MSEL(IP3_31_28, VI4_DATA0_B, SEL_VIN4_1), + PINMUX_IPSR_GPSR(IP3_31_28, QSTH_QHS), + + /* IPSR4 */ + PINMUX_IPSR_GPSR(IP4_3_0, A9), + PINMUX_IPSR_GPSR(IP4_3_0, TX5_A), + PINMUX_IPSR_GPSR(IP4_3_0, IRQ3), + PINMUX_IPSR_GPSR(IP4_3_0, VI4_DATA16), + PINMUX_IPSR_MSEL(IP4_3_0, VI5_VSYNC_N_A, SEL_VIN5_0), + PINMUX_IPSR_GPSR(IP4_3_0, DU_DG7), + PINMUX_IPSR_GPSR(IP4_3_0, LCDOUT15), + + PINMUX_IPSR_GPSR(IP4_7_4, A10), + PINMUX_IPSR_GPSR(IP4_7_4, IRQ4), + PINMUX_IPSR_MSEL(IP4_7_4, MSIOF2_SYNC_B, SEL_MSIOF2_1), + PINMUX_IPSR_GPSR(IP4_7_4, VI4_DATA13), + PINMUX_IPSR_MSEL(IP4_7_4, VI5_FIELD_A, SEL_VIN5_0), + PINMUX_IPSR_GPSR(IP4_7_4, DU_DG5), + PINMUX_IPSR_GPSR(IP4_7_4, FSCLKST2_N_B), + PINMUX_IPSR_GPSR(IP4_7_4, LCDOUT13), + + PINMUX_IPSR_GPSR(IP4_11_8, A11), + PINMUX_IPSR_MSEL(IP4_11_8, SCL6_A, SEL_I2C6_0), + PINMUX_IPSR_GPSR(IP4_11_8, TX3_B), + PINMUX_IPSR_GPSR(IP4_11_8, HTX4_C), + PINMUX_IPSR_GPSR(IP4_11_8, DU_VSYNC), + PINMUX_IPSR_MSEL(IP4_11_8, VI4_DATA1_B, SEL_VIN4_1), + PINMUX_IPSR_GPSR(IP4_11_8, QSTVA_QVS), + + PINMUX_IPSR_GPSR(IP4_15_12, A12), + PINMUX_IPSR_MSEL(IP4_15_12, RX5_A, SEL_SCIF5_0), + PINMUX_IPSR_GPSR(IP4_15_12, MSIOF2_SS2_B), + PINMUX_IPSR_GPSR(IP4_15_12, VI4_DATA17), + PINMUX_IPSR_MSEL(IP4_15_12, VI5_DATA3_A, SEL_VIN5_0), + PINMUX_IPSR_GPSR(IP4_15_12, DU_DG6), + PINMUX_IPSR_GPSR(IP4_15_12, LCDOUT14), + + PINMUX_IPSR_GPSR(IP4_19_16, A13), + PINMUX_IPSR_MSEL(IP4_19_16, SCK5_A, SEL_SCIF5_0), + PINMUX_IPSR_MSEL(IP4_19_16, MSIOF2_SCK_B, SEL_MSIOF2_1), + PINMUX_IPSR_GPSR(IP4_19_16, VI4_DATA14), + PINMUX_IPSR_MSEL(IP4_19_16, HRX4_D, SEL_HSCIF4_3), + PINMUX_IPSR_GPSR(IP4_19_16, DU_DB2), + PINMUX_IPSR_GPSR(IP4_19_16, LCDOUT2), + + PINMUX_IPSR_GPSR(IP4_23_20, A14), + PINMUX_IPSR_GPSR(IP4_23_20, MSIOF1_SS1), + PINMUX_IPSR_MSEL(IP4_23_20, MSIOF2_RXD_B, SEL_MSIOF2_1), + PINMUX_IPSR_GPSR(IP4_23_20, VI4_DATA15), + PINMUX_IPSR_GPSR(IP4_23_20, HTX4_D), + PINMUX_IPSR_GPSR(IP4_23_20, DU_DB3), + PINMUX_IPSR_GPSR(IP4_23_20, LCDOUT3), + + PINMUX_IPSR_GPSR(IP4_27_24, A15), + PINMUX_IPSR_GPSR(IP4_27_24, MSIOF1_SS2), + PINMUX_IPSR_GPSR(IP4_27_24, MSIOF2_TXD_B), + PINMUX_IPSR_GPSR(IP4_27_24, VI4_DATA18), + PINMUX_IPSR_MSEL(IP4_27_24, VI5_DATA4_A, SEL_VIN5_0), + PINMUX_IPSR_GPSR(IP4_27_24, DU_DB4), + PINMUX_IPSR_GPSR(IP4_27_24, LCDOUT4), + + PINMUX_IPSR_GPSR(IP4_31_28, A16), + PINMUX_IPSR_GPSR(IP4_31_28, MSIOF1_SYNC), + PINMUX_IPSR_GPSR(IP4_31_28, MSIOF2_SS1_B), + PINMUX_IPSR_GPSR(IP4_31_28, VI4_DATA19), + PINMUX_IPSR_MSEL(IP4_31_28, VI5_DATA5_A, SEL_VIN5_0), + PINMUX_IPSR_GPSR(IP4_31_28, DU_DB5), + PINMUX_IPSR_GPSR(IP4_31_28, LCDOUT5), + + /* IPSR5 */ + PINMUX_IPSR_GPSR(IP5_3_0, A17), + PINMUX_IPSR_GPSR(IP5_3_0, MSIOF1_RXD), + PINMUX_IPSR_GPSR(IP5_3_0, VI4_DATA20), + PINMUX_IPSR_MSEL(IP5_3_0, VI5_DATA6_A, SEL_VIN5_0), + PINMUX_IPSR_GPSR(IP5_3_0, DU_DB6), + PINMUX_IPSR_GPSR(IP5_3_0, LCDOUT6), + + PINMUX_IPSR_GPSR(IP5_7_4, A18), + PINMUX_IPSR_GPSR(IP5_7_4, MSIOF1_TXD), + PINMUX_IPSR_GPSR(IP5_7_4, VI4_DATA21), + PINMUX_IPSR_MSEL(IP5_7_4, VI5_DATA7_A, SEL_VIN5_0), + PINMUX_IPSR_GPSR(IP5_7_4, DU_DB0), + PINMUX_IPSR_MSEL(IP5_7_4, HRX4_E, SEL_HSCIF4_4), + PINMUX_IPSR_GPSR(IP5_7_4, LCDOUT0), + + PINMUX_IPSR_GPSR(IP5_11_8, A19), + PINMUX_IPSR_GPSR(IP5_11_8, MSIOF1_SCK), + PINMUX_IPSR_GPSR(IP5_11_8, VI4_DATA22), + PINMUX_IPSR_MSEL(IP5_11_8, VI5_DATA2_A, SEL_VIN5_0), + PINMUX_IPSR_GPSR(IP5_11_8, DU_DB1), + PINMUX_IPSR_GPSR(IP5_11_8, HTX4_E), + PINMUX_IPSR_GPSR(IP5_11_8, LCDOUT1), + + PINMUX_IPSR_GPSR(IP5_15_12, CS0_N), + PINMUX_IPSR_GPSR(IP5_15_12, SCL5), + PINMUX_IPSR_GPSR(IP5_15_12, DU_DR0), + PINMUX_IPSR_MSEL(IP5_15_12, VI4_DATA2_B, SEL_VIN4_1), + PINMUX_IPSR_GPSR(IP5_15_12, LCDOUT16), + + PINMUX_IPSR_GPSR(IP5_19_16, WE0_N), + PINMUX_IPSR_GPSR(IP5_19_16, SDA5), + PINMUX_IPSR_GPSR(IP5_19_16, DU_DR1), + PINMUX_IPSR_MSEL(IP5_19_16, VI4_DATA3_B, SEL_VIN4_1), + PINMUX_IPSR_GPSR(IP5_19_16, LCDOUT17), + + PINMUX_IPSR_GPSR(IP5_23_20, D0), + PINMUX_IPSR_MSEL(IP5_23_20, MSIOF3_SCK_A, SEL_MSIOF3_0), + PINMUX_IPSR_GPSR(IP5_23_20, DU_DR2), + PINMUX_IPSR_MSEL(IP5_23_20, CTS4_N_C, SEL_SCIF4_2), + PINMUX_IPSR_GPSR(IP5_23_20, LCDOUT18), + + PINMUX_IPSR_GPSR(IP5_27_24, D1), + PINMUX_IPSR_MSEL(IP5_27_24, MSIOF3_SYNC_A, SEL_MSIOF3_0), + PINMUX_IPSR_MSEL(IP5_27_24, SCK3_A, SEL_SCIF3_0), + PINMUX_IPSR_GPSR(IP5_27_24, VI4_DATA23), + PINMUX_IPSR_MSEL(IP5_27_24, VI5_CLKENB_A, SEL_VIN5_0), + PINMUX_IPSR_GPSR(IP5_27_24, DU_DB7), + PINMUX_IPSR_MSEL(IP5_27_24, RTS4_N_TANS_C, SEL_SCIF4_2), + PINMUX_IPSR_GPSR(IP5_27_24, LCDOUT7), + + PINMUX_IPSR_GPSR(IP5_31_28, D2), + PINMUX_IPSR_MSEL(IP5_31_28, MSIOF3_RXD_A, SEL_MSIOF3_0), + PINMUX_IPSR_MSEL(IP5_31_28, RX5_C, SEL_SCIF5_2), + PINMUX_IPSR_MSEL(IP5_31_28, VI5_DATA14_A, SEL_VIN5_0), + PINMUX_IPSR_GPSR(IP5_31_28, DU_DR3), + PINMUX_IPSR_MSEL(IP5_31_28, RX4_C, SEL_SCIF4_2), + PINMUX_IPSR_GPSR(IP5_31_28, LCDOUT19), + + /* IPSR6 */ + PINMUX_IPSR_GPSR(IP6_3_0, D3), + PINMUX_IPSR_GPSR(IP6_3_0, MSIOF3_TXD_A), + PINMUX_IPSR_GPSR(IP6_3_0, TX5_C), + PINMUX_IPSR_MSEL(IP6_3_0, VI5_DATA15_A, SEL_VIN5_0), + PINMUX_IPSR_GPSR(IP6_3_0, DU_DR4), + PINMUX_IPSR_GPSR(IP6_3_0, TX4_C), + PINMUX_IPSR_GPSR(IP6_3_0, LCDOUT20), + + PINMUX_IPSR_GPSR(IP6_7_4, D4), + PINMUX_IPSR_GPSR(IP6_7_4, CANFD1_TX), + PINMUX_IPSR_MSEL(IP6_7_4, HSCK3_B, SEL_HSCIF3_1), + PINMUX_IPSR_GPSR(IP6_7_4, CAN1_TX), + PINMUX_IPSR_MSEL(IP6_7_4, RTS3_N_TANS_A, SEL_SCIF3_0), + PINMUX_IPSR_GPSR(IP6_7_4, MSIOF3_SS2_A), + PINMUX_IPSR_MSEL(IP6_7_4, VI5_DATA1_B, SEL_VIN5_1), + + PINMUX_IPSR_GPSR(IP6_11_8, D5), + PINMUX_IPSR_MSEL(IP6_11_8, RX3_A, SEL_SCIF3_0), + PINMUX_IPSR_MSEL(IP6_11_8, HRX3_B, SEL_HSCIF3_1), + PINMUX_IPSR_GPSR(IP6_11_8, DU_DR5), + PINMUX_IPSR_MSEL(IP6_11_8, VI4_DATA4_B, SEL_VIN4_1), + PINMUX_IPSR_GPSR(IP6_11_8, LCDOUT21), + + PINMUX_IPSR_GPSR(IP6_15_12, D6), + PINMUX_IPSR_GPSR(IP6_15_12, TX3_A), + PINMUX_IPSR_GPSR(IP6_15_12, HTX3_B), + PINMUX_IPSR_GPSR(IP6_15_12, DU_DR6), + PINMUX_IPSR_MSEL(IP6_15_12, VI4_DATA5_B, SEL_VIN4_1), + PINMUX_IPSR_GPSR(IP6_15_12, LCDOUT22), + + PINMUX_IPSR_GPSR(IP6_19_16, D7), + PINMUX_IPSR_GPSR(IP6_19_16, CANFD1_RX), + PINMUX_IPSR_GPSR(IP6_19_16, IRQ5), + PINMUX_IPSR_GPSR(IP6_19_16, CAN1_RX), + PINMUX_IPSR_MSEL(IP6_19_16, CTS3_N_A, SEL_SCIF3_0), + PINMUX_IPSR_MSEL(IP6_19_16, VI5_DATA2_B, SEL_VIN5_1), + + PINMUX_IPSR_GPSR(IP6_23_20, D8), + PINMUX_IPSR_MSEL(IP6_23_20, MSIOF2_SCK_A, SEL_MSIOF2_0), + PINMUX_IPSR_MSEL(IP6_23_20, SCK4_B, SEL_SCIF4_1), + PINMUX_IPSR_MSEL(IP6_23_20, VI5_DATA12_A, SEL_VIN5_0), + PINMUX_IPSR_GPSR(IP6_23_20, DU_DR7), + PINMUX_IPSR_MSEL(IP6_23_20, RIF3_CLK_B, SEL_DRIF3_1), + PINMUX_IPSR_MSEL(IP6_23_20, HCTS3_N_E, SEL_HSCIF3_4), + PINMUX_IPSR_GPSR(IP6_23_20, LCDOUT23), + + PINMUX_IPSR_GPSR(IP6_27_24, D9), + PINMUX_IPSR_MSEL(IP6_27_24, MSIOF2_SYNC_A, SEL_MSIOF2_0), + PINMUX_IPSR_MSEL(IP6_27_24, VI5_DATA10_A, SEL_VIN5_0), + PINMUX_IPSR_GPSR(IP6_27_24, DU_DG0), + PINMUX_IPSR_MSEL(IP6_27_24, RIF3_SYNC_B, SEL_DRIF3_1), + PINMUX_IPSR_MSEL(IP6_27_24, HRX3_E, SEL_HSCIF3_4), + PINMUX_IPSR_GPSR(IP6_27_24, LCDOUT8), + + PINMUX_IPSR_GPSR(IP6_31_28, D10), + PINMUX_IPSR_MSEL(IP6_31_28, MSIOF2_RXD_A, SEL_MSIOF2_0), + PINMUX_IPSR_MSEL(IP6_31_28, VI5_DATA13_A, SEL_VIN5_0), + PINMUX_IPSR_GPSR(IP6_31_28, DU_DG1), + PINMUX_IPSR_MSEL(IP6_31_28, RIF3_D0_B, SEL_DRIF3_1), + PINMUX_IPSR_GPSR(IP6_31_28, HTX3_E), + PINMUX_IPSR_GPSR(IP6_31_28, LCDOUT9), + + /* IPSR7 */ + PINMUX_IPSR_GPSR(IP7_3_0, D11), + PINMUX_IPSR_GPSR(IP7_3_0, MSIOF2_TXD_A), + PINMUX_IPSR_MSEL(IP7_3_0, VI5_DATA11_A, SEL_VIN5_0), + PINMUX_IPSR_GPSR(IP7_3_0, DU_DG2), + PINMUX_IPSR_MSEL(IP7_3_0, RIF3_D1_B, SEL_DRIF3_1), + PINMUX_IPSR_MSEL(IP7_3_0, HRTS3_N_E, SEL_HSCIF3_4), + PINMUX_IPSR_GPSR(IP7_3_0, LCDOUT10), + + PINMUX_IPSR_GPSR(IP7_7_4, D12), + PINMUX_IPSR_GPSR(IP7_7_4, CANFD0_TX), + PINMUX_IPSR_GPSR(IP7_7_4, TX4_B), + PINMUX_IPSR_GPSR(IP7_7_4, CAN0_TX), + PINMUX_IPSR_MSEL(IP7_7_4, VI5_DATA8_A, SEL_VIN5_0), + PINMUX_IPSR_MSEL(IP7_7_4, VI5_DATA3_B, SEL_VIN5_1), + + PINMUX_IPSR_GPSR(IP7_11_8, D13), + PINMUX_IPSR_GPSR(IP7_11_8, CANFD0_RX), + PINMUX_IPSR_MSEL(IP7_11_8, RX4_B, SEL_SCIF4_1), + PINMUX_IPSR_GPSR(IP7_11_8, CAN0_RX), + PINMUX_IPSR_MSEL(IP7_11_8, VI5_DATA9_A, SEL_VIN5_0), + PINMUX_IPSR_MSEL(IP7_11_8, SCL7_B, SEL_I2C7_1), + PINMUX_IPSR_MSEL(IP7_11_8, VI5_DATA4_B, SEL_VIN5_1), + + PINMUX_IPSR_GPSR(IP7_15_12, D14), + PINMUX_IPSR_GPSR(IP7_15_12, CAN_CLK), + PINMUX_IPSR_MSEL(IP7_15_12, HRX3_A, SEL_HSCIF3_0), + PINMUX_IPSR_GPSR(IP7_15_12, MSIOF2_SS2_A), + PINMUX_IPSR_MSEL(IP7_15_12, SDA7_B, SEL_I2C7_1), + PINMUX_IPSR_MSEL(IP7_15_12, VI5_DATA5_B, SEL_VIN5_1), + + PINMUX_IPSR_GPSR(IP7_19_16, D15), + PINMUX_IPSR_GPSR(IP7_19_16, MSIOF2_SS1_A), + PINMUX_IPSR_GPSR(IP7_19_16, HTX3_A), + PINMUX_IPSR_GPSR(IP7_19_16, MSIOF3_SS1_A), + PINMUX_IPSR_GPSR(IP7_19_16, DU_DG3), + PINMUX_IPSR_GPSR(IP7_19_16, LCDOUT11), + + PINMUX_IPSR_GPSR(IP7_23_20, SCL4), + PINMUX_IPSR_GPSR(IP7_23_20, CS1_N_A26), + PINMUX_IPSR_GPSR(IP7_23_20, DU_DOTCLKIN0), + PINMUX_IPSR_MSEL(IP7_23_20, VI4_DATA6_B, SEL_VIN4_1), + PINMUX_IPSR_MSEL(IP7_23_20, VI5_DATA6_B, SEL_VIN5_1), + PINMUX_IPSR_GPSR(IP7_23_20, QCLK), + + PINMUX_IPSR_GPSR(IP7_27_24, SDA4), + PINMUX_IPSR_GPSR(IP7_27_24, WE1_N), + PINMUX_IPSR_MSEL(IP7_27_24, VI4_DATA7_B, SEL_VIN4_1), + PINMUX_IPSR_MSEL(IP7_27_24, VI5_DATA7_B, SEL_VIN5_1), + PINMUX_IPSR_GPSR(IP7_27_24, QPOLB), + + PINMUX_IPSR_GPSR(IP7_31_28, SD0_CLK), + PINMUX_IPSR_GPSR(IP7_31_28, NFDATA8), + PINMUX_IPSR_MSEL(IP7_31_28, SCL1_C, SEL_I2C1_2), + PINMUX_IPSR_MSEL(IP7_31_28, HSCK1_B, SEL_HSCIF1_1), + PINMUX_IPSR_MSEL(IP7_31_28, SDA2_E, SEL_I2C2_4), + PINMUX_IPSR_MSEL(IP7_31_28, FMCLK_B, SEL_FM_1), + + /* IPSR8 */ + PINMUX_IPSR_GPSR(IP8_3_0, SD0_CMD), + PINMUX_IPSR_GPSR(IP8_3_0, NFDATA9), + PINMUX_IPSR_MSEL(IP8_3_0, HRX1_B, SEL_HSCIF1_1), + PINMUX_IPSR_MSEL(IP8_3_0, SPEEDIN_B, SEL_SPEED_PULSE_IF_1), + + PINMUX_IPSR_GPSR(IP8_7_4, SD0_DAT0), + PINMUX_IPSR_GPSR(IP8_7_4, NFDATA10), + PINMUX_IPSR_GPSR(IP8_7_4, HTX1_B), + PINMUX_IPSR_MSEL(IP8_7_4, REMOCON_B, SEL_REMOCON_1), + + PINMUX_IPSR_GPSR(IP8_11_8, SD0_DAT1), + PINMUX_IPSR_GPSR(IP8_11_8, NFDATA11), + PINMUX_IPSR_MSEL(IP8_11_8, SDA2_C, SEL_I2C2_2), + PINMUX_IPSR_MSEL(IP8_11_8, HCTS1_N_B, SEL_HSCIF1_1), + PINMUX_IPSR_MSEL(IP8_11_8, FMIN_B, SEL_FM_1), + + PINMUX_IPSR_GPSR(IP8_15_12, SD0_DAT2), + PINMUX_IPSR_GPSR(IP8_15_12, NFDATA12), + PINMUX_IPSR_MSEL(IP8_15_12, SCL2_C, SEL_I2C2_2), + PINMUX_IPSR_MSEL(IP8_15_12, HRTS1_N_B, SEL_HSCIF1_1), + PINMUX_IPSR_GPSR(IP8_15_12, BPFCLK_B), + + PINMUX_IPSR_GPSR(IP8_19_16, SD0_DAT3), + PINMUX_IPSR_GPSR(IP8_19_16, NFDATA13), + PINMUX_IPSR_MSEL(IP8_19_16, SDA1_C, SEL_I2C1_2), + PINMUX_IPSR_MSEL(IP8_19_16, SCL2_E, SEL_I2C2_4), + PINMUX_IPSR_MSEL(IP8_19_16, SPEEDIN_C, SEL_SPEED_PULSE_IF_2), + PINMUX_IPSR_MSEL(IP8_19_16, REMOCON_C, SEL_REMOCON_2), + + PINMUX_IPSR_GPSR(IP8_23_20, SD1_CLK), + PINMUX_IPSR_MSEL(IP8_23_20, NFDATA14_B, SEL_NDFC_1), + + PINMUX_IPSR_GPSR(IP8_27_24, SD1_CMD), + PINMUX_IPSR_MSEL(IP8_27_24, NFDATA15_B, SEL_NDFC_1), + + PINMUX_IPSR_GPSR(IP8_31_28, SD1_DAT0), + PINMUX_IPSR_MSEL(IP8_31_28, NFWP_N_B, SEL_NDFC_1), + + /* IPSR9 */ + PINMUX_IPSR_GPSR(IP9_3_0, SD1_DAT1), + PINMUX_IPSR_MSEL(IP9_3_0, NFCE_N_B, SEL_NDFC_1), + + PINMUX_IPSR_GPSR(IP9_7_4, SD1_DAT2), + PINMUX_IPSR_MSEL(IP9_7_4, NFALE_B, SEL_NDFC_1), + + PINMUX_IPSR_GPSR(IP9_11_8, SD1_DAT3), + PINMUX_IPSR_MSEL(IP9_11_8, NFRB_N_B, SEL_NDFC_1), + + PINMUX_IPSR_GPSR(IP9_15_12, SD3_CLK), + PINMUX_IPSR_GPSR(IP9_15_12, NFWE_N), + + PINMUX_IPSR_GPSR(IP9_19_16, SD3_CMD), + PINMUX_IPSR_GPSR(IP9_19_16, NFRE_N), + + PINMUX_IPSR_GPSR(IP9_23_20, SD3_DAT0), + PINMUX_IPSR_GPSR(IP9_23_20, NFDATA0), + + PINMUX_IPSR_GPSR(IP9_27_24, SD3_DAT1), + PINMUX_IPSR_GPSR(IP9_27_24, NFDATA1), + + PINMUX_IPSR_GPSR(IP9_31_28, SD3_DAT2), + PINMUX_IPSR_GPSR(IP9_31_28, NFDATA2), + + /* IPSR10 */ + PINMUX_IPSR_GPSR(IP10_3_0, SD3_DAT3), + PINMUX_IPSR_GPSR(IP10_3_0, NFDATA3), + + PINMUX_IPSR_GPSR(IP10_7_4, SD3_DAT4), + PINMUX_IPSR_GPSR(IP10_7_4, NFDATA4), + + PINMUX_IPSR_GPSR(IP10_11_8, SD3_DAT5), + PINMUX_IPSR_GPSR(IP10_11_8, NFDATA5), + + PINMUX_IPSR_GPSR(IP10_15_12, SD3_DAT6), + PINMUX_IPSR_GPSR(IP10_15_12, NFDATA6), + + PINMUX_IPSR_GPSR(IP10_19_16, SD3_DAT7), + PINMUX_IPSR_GPSR(IP10_19_16, NFDATA7), + + PINMUX_IPSR_GPSR(IP10_23_20, SD3_DS), + PINMUX_IPSR_GPSR(IP10_23_20, NFCLE), + + PINMUX_IPSR_GPSR(IP10_27_24, SD0_CD), + PINMUX_IPSR_GPSR(IP10_27_24, NFALE_A), + PINMUX_IPSR_GPSR(IP10_27_24, SD3_CD), + PINMUX_IPSR_MSEL(IP10_27_24, RIF0_CLK_B, SEL_DRIF0_1), + PINMUX_IPSR_MSEL(IP10_27_24, SCL2_B, SEL_I2C2_1), + PINMUX_IPSR_MSEL(IP10_27_24, TCLK1_A, SEL_TIMER_TMU_0), + PINMUX_IPSR_MSEL(IP10_27_24, SSI_SCK2_B, SEL_SSI2_1), + PINMUX_IPSR_GPSR(IP10_27_24, TS_SCK0), + + PINMUX_IPSR_GPSR(IP10_31_28, SD0_WP), + PINMUX_IPSR_GPSR(IP10_31_28, NFRB_N_A), + PINMUX_IPSR_GPSR(IP10_31_28, SD3_WP), + PINMUX_IPSR_MSEL(IP10_31_28, RIF0_D0_B, SEL_DRIF0_1), + PINMUX_IPSR_MSEL(IP10_31_28, SDA2_B, SEL_I2C2_1), + PINMUX_IPSR_MSEL(IP10_31_28, TCLK2_A, SEL_TIMER_TMU_0), + PINMUX_IPSR_MSEL(IP10_31_28, SSI_WS2_B, SEL_SSI2_1), + PINMUX_IPSR_GPSR(IP10_31_28, TS_SDAT0), + + /* IPSR11 */ + PINMUX_IPSR_GPSR(IP11_3_0, SD1_CD), + PINMUX_IPSR_MSEL(IP11_3_0, NFCE_N_A, SEL_NDFC_0), + PINMUX_IPSR_GPSR(IP11_3_0, SSI_SCK1), + PINMUX_IPSR_MSEL(IP11_3_0, RIF0_D1_B, SEL_DRIF0_1), + PINMUX_IPSR_GPSR(IP11_3_0, TS_SDEN0), + + PINMUX_IPSR_GPSR(IP11_7_4, SD1_WP), + PINMUX_IPSR_MSEL(IP11_7_4, NFWP_N_A, SEL_NDFC_0), + PINMUX_IPSR_GPSR(IP11_7_4, SSI_WS1), + PINMUX_IPSR_MSEL(IP11_7_4, RIF0_SYNC_B, SEL_DRIF0_1), + PINMUX_IPSR_GPSR(IP11_7_4, TS_SPSYNC0), + + PINMUX_IPSR_MSEL(IP11_11_8, RX0_A, SEL_SCIF0_0), + PINMUX_IPSR_MSEL(IP11_11_8, HRX1_A, SEL_HSCIF1_0), + PINMUX_IPSR_MSEL(IP11_11_8, SSI_SCK2_A, SEL_SSI2_0), + PINMUX_IPSR_GPSR(IP11_11_8, RIF1_SYNC), + PINMUX_IPSR_GPSR(IP11_11_8, TS_SCK1), + + PINMUX_IPSR_GPSR(IP11_15_12, TX0_A), + PINMUX_IPSR_GPSR(IP11_15_12, HTX1_A), + PINMUX_IPSR_MSEL(IP11_15_12, SSI_WS2_A, SEL_SSI2_0), + PINMUX_IPSR_GPSR(IP11_15_12, RIF1_D0), + PINMUX_IPSR_GPSR(IP11_15_12, TS_SDAT1), + + PINMUX_IPSR_MSEL(IP11_19_16, CTS0_N_A, SEL_SCIF0_0), + PINMUX_IPSR_MSEL(IP11_19_16, NFDATA14_A, SEL_NDFC_0), + PINMUX_IPSR_GPSR(IP11_19_16, AUDIO_CLKOUT_A), + PINMUX_IPSR_GPSR(IP11_19_16, RIF1_D1), + PINMUX_IPSR_MSEL(IP11_19_16, SCIF_CLK_A, SEL_SCIF_0), + PINMUX_IPSR_MSEL(IP11_19_16, FMCLK_A, SEL_FM_0), + + PINMUX_IPSR_MSEL(IP11_23_20, RTS0_N_TANS_A, SEL_SCIF0_0), + PINMUX_IPSR_MSEL(IP11_23_20, NFDATA15_A, SEL_NDFC_0), + PINMUX_IPSR_GPSR(IP11_23_20, AUDIO_CLKOUT1_A), + PINMUX_IPSR_GPSR(IP11_23_20, RIF1_CLK), + PINMUX_IPSR_MSEL(IP11_23_20, SCL2_A, SEL_I2C2_0), + PINMUX_IPSR_MSEL(IP11_23_20, FMIN_A, SEL_FM_0), + + PINMUX_IPSR_MSEL(IP11_27_24, SCK0_A, SEL_SCIF0_0), + PINMUX_IPSR_MSEL(IP11_27_24, HSCK1_A, SEL_HSCIF1_0), + PINMUX_IPSR_GPSR(IP11_27_24, USB3HS0_ID), + PINMUX_IPSR_GPSR(IP11_27_24, RTS1_N_TANS), + PINMUX_IPSR_MSEL(IP11_27_24, SDA2_A, SEL_I2C2_0), + PINMUX_IPSR_MSEL(IP11_27_24, FMCLK_C, SEL_FM_2), + PINMUX_IPSR_GPSR(IP11_27_24, USB1_ID), + + PINMUX_IPSR_GPSR(IP11_31_28, RX1), + PINMUX_IPSR_MSEL(IP11_31_28, HRX2_B, SEL_HSCIF2_1), + PINMUX_IPSR_MSEL(IP11_31_28, SSI_SCK9_B, SEL_SSI9_1), + PINMUX_IPSR_GPSR(IP11_31_28, AUDIO_CLKOUT1_B), + + /* IPSR12 */ + PINMUX_IPSR_GPSR(IP12_3_0, TX1), + PINMUX_IPSR_GPSR(IP12_3_0, HTX2_B), + PINMUX_IPSR_MSEL(IP12_3_0, SSI_WS9_B, SEL_SSI9_1), + PINMUX_IPSR_GPSR(IP12_3_0, AUDIO_CLKOUT3_B), + + PINMUX_IPSR_GPSR(IP12_7_4, SCK2_A), + PINMUX_IPSR_MSEL(IP12_7_4, HSCK0_A, SEL_HSCIF0_0), + PINMUX_IPSR_MSEL(IP12_7_4, AUDIO_CLKB_A, SEL_ADGB_0), + PINMUX_IPSR_GPSR(IP12_7_4, CTS1_N), + PINMUX_IPSR_MSEL(IP12_7_4, RIF0_CLK_A, SEL_DRIF0_0), + PINMUX_IPSR_MSEL(IP12_7_4, REMOCON_A, SEL_REMOCON_0), + PINMUX_IPSR_MSEL(IP12_7_4, SCIF_CLK_B, SEL_SCIF_1), + + PINMUX_IPSR_GPSR(IP12_11_8, TX2_A), + PINMUX_IPSR_MSEL(IP12_11_8, HRX0_A, SEL_HSCIF0_0), + PINMUX_IPSR_GPSR(IP12_11_8, AUDIO_CLKOUT2_A), + PINMUX_IPSR_MSEL(IP12_11_8, SCL1_A, SEL_I2C1_0), + PINMUX_IPSR_MSEL(IP12_11_8, FSO_CFE_0_N_A, SEL_FSO_0), + PINMUX_IPSR_GPSR(IP12_11_8, TS_SDEN1), + + PINMUX_IPSR_GPSR(IP12_15_12, RX2_A), + PINMUX_IPSR_GPSR(IP12_15_12, HTX0_A), + PINMUX_IPSR_GPSR(IP12_15_12, AUDIO_CLKOUT3_A), + PINMUX_IPSR_MSEL(IP12_15_12, SDA1_A, SEL_I2C1_0), + PINMUX_IPSR_MSEL(IP12_15_12, FSO_CFE_1_N_A, SEL_FSO_0), + PINMUX_IPSR_GPSR(IP12_15_12, TS_SPSYNC1), + + PINMUX_IPSR_GPSR(IP12_19_16, MSIOF0_SCK), + PINMUX_IPSR_GPSR(IP12_19_16, SSI_SCK78), + + PINMUX_IPSR_GPSR(IP12_23_20, MSIOF0_RXD), + PINMUX_IPSR_GPSR(IP12_23_20, SSI_WS78), + PINMUX_IPSR_GPSR(IP12_23_20, TX2_B), + + PINMUX_IPSR_GPSR(IP12_27_24, MSIOF0_TXD), + PINMUX_IPSR_GPSR(IP12_27_24, SSI_SDATA7), + PINMUX_IPSR_GPSR(IP12_27_24, RX2_B), + + PINMUX_IPSR_GPSR(IP12_31_28, MSIOF0_SYNC), + PINMUX_IPSR_GPSR(IP12_31_28, AUDIO_CLKOUT_B), + PINMUX_IPSR_GPSR(IP12_31_28, SSI_SDATA8), + + /* IPSR13 */ + PINMUX_IPSR_GPSR(IP13_3_0, MSIOF0_SS1), + PINMUX_IPSR_MSEL(IP13_3_0, HRX2_A, SEL_HSCIF2_0), + PINMUX_IPSR_GPSR(IP13_3_0, SSI_SCK4), + PINMUX_IPSR_MSEL(IP13_3_0, HCTS0_N_A, SEL_HSCIF0_0), + PINMUX_IPSR_GPSR(IP13_3_0, BPFCLK_C), + PINMUX_IPSR_MSEL(IP13_3_0, SPEEDIN_A, SEL_SPEED_PULSE_IF_0), + + PINMUX_IPSR_GPSR(IP13_7_4, MSIOF0_SS2), + PINMUX_IPSR_GPSR(IP13_7_4, HTX2_A), + PINMUX_IPSR_GPSR(IP13_7_4, SSI_WS4), + PINMUX_IPSR_MSEL(IP13_7_4, HRTS0_N_A, SEL_HSCIF0_0), + PINMUX_IPSR_MSEL(IP13_7_4, FMIN_C, SEL_FM_2), + PINMUX_IPSR_GPSR(IP13_7_4, BPFCLK_A), + + PINMUX_IPSR_GPSR(IP13_11_8, SSI_SDATA9), + PINMUX_IPSR_MSEL(IP13_11_8, AUDIO_CLKC_A, SEL_ADGC_0), + PINMUX_IPSR_GPSR(IP13_11_8, SCK1), + + PINMUX_IPSR_GPSR(IP13_15_12, MLB_CLK), + PINMUX_IPSR_MSEL(IP13_15_12, RX0_B, SEL_SCIF0_1), + PINMUX_IPSR_MSEL(IP13_15_12, RIF0_D0_A, SEL_DRIF0_0), + PINMUX_IPSR_MSEL(IP13_15_12, SCL1_B, SEL_I2C1_1), + PINMUX_IPSR_MSEL(IP13_15_12, TCLK1_B, SEL_TIMER_TMU_1), + PINMUX_IPSR_GPSR(IP13_15_12, SIM0_RST_A), + + PINMUX_IPSR_GPSR(IP13_19_16, MLB_SIG), + PINMUX_IPSR_MSEL(IP13_19_16, SCK0_B, SEL_SCIF0_1), + PINMUX_IPSR_MSEL(IP13_19_16, RIF0_D1_A, SEL_DRIF0_0), + PINMUX_IPSR_MSEL(IP13_19_16, SDA1_B, SEL_I2C1_1), + PINMUX_IPSR_MSEL(IP13_19_16, TCLK2_B, SEL_TIMER_TMU_1), + PINMUX_IPSR_MSEL(IP13_19_16, SIM0_D_A, SEL_SIMCARD_0), + + PINMUX_IPSR_GPSR(IP13_23_20, MLB_DAT), + PINMUX_IPSR_GPSR(IP13_23_20, TX0_B), + PINMUX_IPSR_MSEL(IP13_23_20, RIF0_SYNC_A, SEL_DRIF0_0), + PINMUX_IPSR_GPSR(IP13_23_20, SIM0_CLK_A), + + PINMUX_IPSR_GPSR(IP13_27_24, SSI_SCK01239), + + PINMUX_IPSR_GPSR(IP13_31_28, SSI_WS01239), + + /* IPSR14 */ + PINMUX_IPSR_GPSR(IP14_3_0, SSI_SDATA0), + + PINMUX_IPSR_GPSR(IP14_7_4, SSI_SDATA1), + PINMUX_IPSR_MSEL(IP14_7_4, AUDIO_CLKC_B, SEL_ADGC_1), + PINMUX_IPSR_MSEL(IP14_7_4, PWM0_B, SEL_PWM0_1), + + PINMUX_IPSR_GPSR(IP14_11_8, SSI_SDATA2), + PINMUX_IPSR_GPSR(IP14_11_8, AUDIO_CLKOUT2_B), + PINMUX_IPSR_MSEL(IP14_11_8, SSI_SCK9_A, SEL_SSI9_0), + PINMUX_IPSR_MSEL(IP14_11_8, PWM1_B, SEL_PWM1_1), + + PINMUX_IPSR_GPSR(IP14_15_12, SSI_SCK349), + PINMUX_IPSR_MSEL(IP14_15_12, PWM2_C, SEL_PWM2_2), + + PINMUX_IPSR_GPSR(IP14_19_16, SSI_WS349), + PINMUX_IPSR_MSEL(IP14_19_16, PWM3_C, SEL_PWM3_2), + + PINMUX_IPSR_GPSR(IP14_23_20, SSI_SDATA3), + PINMUX_IPSR_GPSR(IP14_23_20, AUDIO_CLKOUT1_C), + PINMUX_IPSR_MSEL(IP14_23_20, AUDIO_CLKB_B, SEL_ADGB_1), + PINMUX_IPSR_MSEL(IP14_23_20, PWM4_B, SEL_PWM4_1), + + PINMUX_IPSR_GPSR(IP14_27_24, SSI_SDATA4), + PINMUX_IPSR_MSEL(IP14_27_24, SSI_WS9_A, SEL_SSI9_0), + PINMUX_IPSR_MSEL(IP14_27_24, PWM5_B, SEL_PWM5_1), + + PINMUX_IPSR_GPSR(IP14_31_28, SSI_SCK5), + PINMUX_IPSR_MSEL(IP14_31_28, HRX0_B, SEL_HSCIF0_1), + PINMUX_IPSR_GPSR(IP14_31_28, USB0_PWEN_B), + PINMUX_IPSR_MSEL(IP14_31_28, SCL2_D, SEL_I2C2_3), + PINMUX_IPSR_MSEL(IP14_31_28, PWM6_B, SEL_PWM6_1), + + /* IPSR15 */ + PINMUX_IPSR_GPSR(IP15_3_0, SSI_WS5), + PINMUX_IPSR_GPSR(IP15_3_0, HTX0_B), + PINMUX_IPSR_MSEL(IP15_3_0, USB0_OVC_B, SEL_USB_20_CH0_1), + PINMUX_IPSR_MSEL(IP15_3_0, SDA2_D, SEL_I2C2_3), + + PINMUX_IPSR_GPSR(IP15_7_4, SSI_SDATA5), + PINMUX_IPSR_MSEL(IP15_7_4, HSCK0_B, SEL_HSCIF0_1), + PINMUX_IPSR_MSEL(IP15_7_4, AUDIO_CLKB_C, SEL_ADGB_2), + PINMUX_IPSR_GPSR(IP15_7_4, TPU0TO0), + + PINMUX_IPSR_GPSR(IP15_11_8, SSI_SCK6), + PINMUX_IPSR_MSEL(IP15_11_8, HSCK2_A, SEL_HSCIF2_0), + PINMUX_IPSR_MSEL(IP15_11_8, AUDIO_CLKC_C, SEL_ADGC_2), + PINMUX_IPSR_GPSR(IP15_11_8, TPU0TO1), + PINMUX_IPSR_MSEL(IP15_11_8, FSO_CFE_0_N_B, SEL_FSO_1), + PINMUX_IPSR_GPSR(IP15_11_8, SIM0_RST_B), + + PINMUX_IPSR_GPSR(IP15_15_12, SSI_WS6), + PINMUX_IPSR_MSEL(IP15_15_12, HCTS2_N_A, SEL_HSCIF2_0), + PINMUX_IPSR_GPSR(IP15_15_12, AUDIO_CLKOUT2_C), + PINMUX_IPSR_GPSR(IP15_15_12, TPU0TO2), + PINMUX_IPSR_MSEL(IP15_15_12, SDA1_D, SEL_I2C1_3), + PINMUX_IPSR_MSEL(IP15_15_12, FSO_CFE_1_N_B, SEL_FSO_1), + PINMUX_IPSR_MSEL(IP15_15_12, SIM0_D_B, SEL_SIMCARD_1), + + PINMUX_IPSR_GPSR(IP15_19_16, SSI_SDATA6), + PINMUX_IPSR_MSEL(IP15_19_16, HRTS2_N_A, SEL_HSCIF2_0), + PINMUX_IPSR_GPSR(IP15_19_16, AUDIO_CLKOUT3_C), + PINMUX_IPSR_GPSR(IP15_19_16, TPU0TO3), + PINMUX_IPSR_MSEL(IP15_19_16, SCL1_D, SEL_I2C1_3), + PINMUX_IPSR_MSEL(IP15_19_16, FSO_TOE_N_B, SEL_FSO_1), + PINMUX_IPSR_GPSR(IP15_19_16, SIM0_CLK_B), + + PINMUX_IPSR_GPSR(IP15_23_20, AUDIO_CLKA), + + PINMUX_IPSR_GPSR(IP15_27_24, USB30_PWEN), + PINMUX_IPSR_GPSR(IP15_27_24, USB0_PWEN_A), + + PINMUX_IPSR_GPSR(IP15_31_28, USB30_OVC), + PINMUX_IPSR_MSEL(IP15_31_28, USB0_OVC_A, SEL_USB_20_CH0_0), +}; + +static const struct sh_pfc_pin pinmux_pins[] = { + PINMUX_GPIO_GP_ALL(), +}; + +static const struct sh_pfc_pin_group pinmux_groups[] = { +}; + +static const struct sh_pfc_function pinmux_functions[] = { +}; + +static const struct pinmux_cfg_reg pinmux_config_regs[] = { +#define F_(x, y) FN_##y +#define FM(x) FN_##x + { PINMUX_CFG_REG("GPSR0", 0xe6060100, 32, 1) { + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + GP_0_17_FN, GPSR0_17, + GP_0_16_FN, GPSR0_16, + GP_0_15_FN, GPSR0_15, + GP_0_14_FN, GPSR0_14, + GP_0_13_FN, GPSR0_13, + GP_0_12_FN, GPSR0_12, + GP_0_11_FN, GPSR0_11, + GP_0_10_FN, GPSR0_10, + GP_0_9_FN, GPSR0_9, + GP_0_8_FN, GPSR0_8, + GP_0_7_FN, GPSR0_7, + GP_0_6_FN, GPSR0_6, + GP_0_5_FN, GPSR0_5, + GP_0_4_FN, GPSR0_4, + GP_0_3_FN, GPSR0_3, + GP_0_2_FN, GPSR0_2, + GP_0_1_FN, GPSR0_1, + GP_0_0_FN, GPSR0_0, } + }, + { PINMUX_CFG_REG("GPSR1", 0xe6060104, 32, 1) { + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + GP_1_22_FN, GPSR1_22, + GP_1_21_FN, GPSR1_21, + GP_1_20_FN, GPSR1_20, + GP_1_19_FN, GPSR1_19, + GP_1_18_FN, GPSR1_18, + GP_1_17_FN, GPSR1_17, + GP_1_16_FN, GPSR1_16, + GP_1_15_FN, GPSR1_15, + GP_1_14_FN, GPSR1_14, + GP_1_13_FN, GPSR1_13, + GP_1_12_FN, GPSR1_12, + GP_1_11_FN, GPSR1_11, + GP_1_10_FN, GPSR1_10, + GP_1_9_FN, GPSR1_9, + GP_1_8_FN, GPSR1_8, + GP_1_7_FN, GPSR1_7, + GP_1_6_FN, GPSR1_6, + GP_1_5_FN, GPSR1_5, + GP_1_4_FN, GPSR1_4, + GP_1_3_FN, GPSR1_3, + GP_1_2_FN, GPSR1_2, + GP_1_1_FN, GPSR1_1, + GP_1_0_FN, GPSR1_0, } + }, + { PINMUX_CFG_REG("GPSR2", 0xe6060108, 32, 1) { + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + GP_2_25_FN, GPSR2_25, + GP_2_24_FN, GPSR2_24, + GP_2_23_FN, GPSR2_23, + GP_2_22_FN, GPSR2_22, + GP_2_21_FN, GPSR2_21, + GP_2_20_FN, GPSR2_20, + GP_2_19_FN, GPSR2_19, + GP_2_18_FN, GPSR2_18, + GP_2_17_FN, GPSR2_17, + GP_2_16_FN, GPSR2_16, + GP_2_15_FN, GPSR2_15, + GP_2_14_FN, GPSR2_14, + GP_2_13_FN, GPSR2_13, + GP_2_12_FN, GPSR2_12, + GP_2_11_FN, GPSR2_11, + GP_2_10_FN, GPSR2_10, + GP_2_9_FN, GPSR2_9, + GP_2_8_FN, GPSR2_8, + GP_2_7_FN, GPSR2_7, + GP_2_6_FN, GPSR2_6, + GP_2_5_FN, GPSR2_5, + GP_2_4_FN, GPSR2_4, + GP_2_3_FN, GPSR2_3, + GP_2_2_FN, GPSR2_2, + GP_2_1_FN, GPSR2_1, + GP_2_0_FN, GPSR2_0, } + }, + { PINMUX_CFG_REG("GPSR3", 0xe606010c, 32, 1) { + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + GP_3_15_FN, GPSR3_15, + GP_3_14_FN, GPSR3_14, + GP_3_13_FN, GPSR3_13, + GP_3_12_FN, GPSR3_12, + GP_3_11_FN, GPSR3_11, + GP_3_10_FN, GPSR3_10, + GP_3_9_FN, GPSR3_9, + GP_3_8_FN, GPSR3_8, + GP_3_7_FN, GPSR3_7, + GP_3_6_FN, GPSR3_6, + GP_3_5_FN, GPSR3_5, + GP_3_4_FN, GPSR3_4, + GP_3_3_FN, GPSR3_3, + GP_3_2_FN, GPSR3_2, + GP_3_1_FN, GPSR3_1, + GP_3_0_FN, GPSR3_0, } + }, + { PINMUX_CFG_REG("GPSR4", 0xe6060110, 32, 1) { + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + GP_4_10_FN, GPSR4_10, + GP_4_9_FN, GPSR4_9, + GP_4_8_FN, GPSR4_8, + GP_4_7_FN, GPSR4_7, + GP_4_6_FN, GPSR4_6, + GP_4_5_FN, GPSR4_5, + GP_4_4_FN, GPSR4_4, + GP_4_3_FN, GPSR4_3, + GP_4_2_FN, GPSR4_2, + GP_4_1_FN, GPSR4_1, + GP_4_0_FN, GPSR4_0, } + }, + { PINMUX_CFG_REG("GPSR5", 0xe6060114, 32, 1) { + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + GP_5_19_FN, GPSR5_19, + GP_5_18_FN, GPSR5_18, + GP_5_17_FN, GPSR5_17, + GP_5_16_FN, GPSR5_16, + GP_5_15_FN, GPSR5_15, + GP_5_14_FN, GPSR5_14, + GP_5_13_FN, GPSR5_13, + GP_5_12_FN, GPSR5_12, + GP_5_11_FN, GPSR5_11, + GP_5_10_FN, GPSR5_10, + GP_5_9_FN, GPSR5_9, + GP_5_8_FN, GPSR5_8, + GP_5_7_FN, GPSR5_7, + GP_5_6_FN, GPSR5_6, + GP_5_5_FN, GPSR5_5, + GP_5_4_FN, GPSR5_4, + GP_5_3_FN, GPSR5_3, + GP_5_2_FN, GPSR5_2, + GP_5_1_FN, GPSR5_1, + GP_5_0_FN, GPSR5_0, } + }, + { PINMUX_CFG_REG("GPSR6", 0xe6060118, 32, 1) { + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + GP_6_17_FN, GPSR6_17, + GP_6_16_FN, GPSR6_16, + GP_6_15_FN, GPSR6_15, + GP_6_14_FN, GPSR6_14, + GP_6_13_FN, GPSR6_13, + GP_6_12_FN, GPSR6_12, + GP_6_11_FN, GPSR6_11, + GP_6_10_FN, GPSR6_10, + GP_6_9_FN, GPSR6_9, + GP_6_8_FN, GPSR6_8, + GP_6_7_FN, GPSR6_7, + GP_6_6_FN, GPSR6_6, + GP_6_5_FN, GPSR6_5, + GP_6_4_FN, GPSR6_4, + GP_6_3_FN, GPSR6_3, + GP_6_2_FN, GPSR6_2, + GP_6_1_FN, GPSR6_1, + GP_6_0_FN, GPSR6_0, } + }, +#undef F_ +#undef FM + +#define F_(x, y) x, +#define FM(x) FN_##x, + { PINMUX_CFG_REG("IPSR0", 0xe6060200, 32, 4) { + IP0_31_28 + IP0_27_24 + IP0_23_20 + IP0_19_16 + IP0_15_12 + IP0_11_8 + IP0_7_4 + IP0_3_0 } + }, + { PINMUX_CFG_REG("IPSR1", 0xe6060204, 32, 4) { + IP1_31_28 + IP1_27_24 + IP1_23_20 + IP1_19_16 + IP1_15_12 + IP1_11_8 + IP1_7_4 + IP1_3_0 } + }, + { PINMUX_CFG_REG("IPSR2", 0xe6060208, 32, 4) { + IP2_31_28 + IP2_27_24 + IP2_23_20 + IP2_19_16 + IP2_15_12 + IP2_11_8 + IP2_7_4 + IP2_3_0 } + }, + { PINMUX_CFG_REG("IPSR3", 0xe606020c, 32, 4) { + IP3_31_28 + IP3_27_24 + IP3_23_20 + IP3_19_16 + IP3_15_12 + IP3_11_8 + IP3_7_4 + IP3_3_0 } + }, + { PINMUX_CFG_REG("IPSR4", 0xe6060210, 32, 4) { + IP4_31_28 + IP4_27_24 + IP4_23_20 + IP4_19_16 + IP4_15_12 + IP4_11_8 + IP4_7_4 + IP4_3_0 } + }, + { PINMUX_CFG_REG("IPSR5", 0xe6060214, 32, 4) { + IP5_31_28 + IP5_27_24 + IP5_23_20 + IP5_19_16 + IP5_15_12 + IP5_11_8 + IP5_7_4 + IP5_3_0 } + }, + { PINMUX_CFG_REG("IPSR6", 0xe6060218, 32, 4) { + IP6_31_28 + IP6_27_24 + IP6_23_20 + IP6_19_16 + IP6_15_12 + IP6_11_8 + IP6_7_4 + IP6_3_0 } + }, + { PINMUX_CFG_REG("IPSR7", 0xe606021c, 32, 4) { + IP7_31_28 + IP7_27_24 + IP7_23_20 + IP7_19_16 + IP7_15_12 + IP7_11_8 + IP7_7_4 + IP7_3_0 } + }, + { PINMUX_CFG_REG("IPSR8", 0xe6060220, 32, 4) { + IP8_31_28 + IP8_27_24 + IP8_23_20 + IP8_19_16 + IP8_15_12 + IP8_11_8 + IP8_7_4 + IP8_3_0 } + }, + { PINMUX_CFG_REG("IPSR9", 0xe6060224, 32, 4) { + IP9_31_28 + IP9_27_24 + IP9_23_20 + IP9_19_16 + IP9_15_12 + IP9_11_8 + IP9_7_4 + IP9_3_0 } + }, + { PINMUX_CFG_REG("IPSR10", 0xe6060228, 32, 4) { + IP10_31_28 + IP10_27_24 + IP10_23_20 + IP10_19_16 + IP10_15_12 + IP10_11_8 + IP10_7_4 + IP10_3_0 } + }, + { PINMUX_CFG_REG("IPSR11", 0xe606022c, 32, 4) { + IP11_31_28 + IP11_27_24 + IP11_23_20 + IP11_19_16 + IP11_15_12 + IP11_11_8 + IP11_7_4 + IP11_3_0 } + }, + { PINMUX_CFG_REG("IPSR12", 0xe6060230, 32, 4) { + IP12_31_28 + IP12_27_24 + IP12_23_20 + IP12_19_16 + IP12_15_12 + IP12_11_8 + IP12_7_4 + IP12_3_0 } + }, + { PINMUX_CFG_REG("IPSR13", 0xe6060234, 32, 4) { + IP13_31_28 + IP13_27_24 + IP13_23_20 + IP13_19_16 + IP13_15_12 + IP13_11_8 + IP13_7_4 + IP13_3_0 } + }, + { PINMUX_CFG_REG("IPSR14", 0xe6060238, 32, 4) { + IP14_31_28 + IP14_27_24 + IP14_23_20 + IP14_19_16 + IP14_15_12 + IP14_11_8 + IP14_7_4 + IP14_3_0 } + }, + { PINMUX_CFG_REG("IPSR15", 0xe606023c, 32, 4) { + IP15_31_28 + IP15_27_24 + IP15_23_20 + IP15_19_16 + IP15_15_12 + IP15_11_8 + IP15_7_4 + IP15_3_0 } + }, +#undef F_ +#undef FM + +#define F_(x, y) x, +#define FM(x) FN_##x, + { PINMUX_CFG_REG_VAR("MOD_SEL0", 0xe6060500, 32, + 1, 2, 1, 2, 1, 1, 1, 1, 2, 3, 1, + 1, 1, 2, 2, 1, 1, 1, 2, 1, 1, 1, 2) { + /* RESERVED 31 */ + 0, 0, + MOD_SEL0_30_29 + MOD_SEL0_28 + MOD_SEL0_27_26 + MOD_SEL0_25 + MOD_SEL0_24 + MOD_SEL0_23 + MOD_SEL0_22 + MOD_SEL0_21_20 + MOD_SEL0_19_18_17 + MOD_SEL0_16 + MOD_SEL0_15 + MOD_SEL0_14 + MOD_SEL0_13_12 + MOD_SEL0_11_10 + MOD_SEL0_9 + MOD_SEL0_8 + MOD_SEL0_7 + MOD_SEL0_6_5 + MOD_SEL0_4 + MOD_SEL0_3 + MOD_SEL0_2 + MOD_SEL0_1_0 } + }, + { PINMUX_CFG_REG_VAR("MOD_SEL1", 0xe6060504, 32, + 1, 1, 1, 1, 1, 1, 1, 3, 3, 1, 1, 1, + 1, 2, 2, 2, 1, 1, 2, 1, 4) { + MOD_SEL1_31 + MOD_SEL1_30 + MOD_SEL1_29 + MOD_SEL1_28 + /* RESERVED 27 */ + 0, 0, + MOD_SEL1_26 + MOD_SEL1_25 + MOD_SEL1_24_23_22 + MOD_SEL1_21_20_19 + MOD_SEL1_18 + MOD_SEL1_17 + MOD_SEL1_16 + MOD_SEL1_15 + MOD_SEL1_14_13 + MOD_SEL1_12_11 + MOD_SEL1_10_9 + MOD_SEL1_8 + MOD_SEL1_7 + MOD_SEL1_6_5 + MOD_SEL1_4 + /* RESERVED 3, 2, 1, 0 */ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } + }, + { }, +}; + +const struct sh_pfc_soc_info r8a77990_pinmux_info = { + .name = "r8a77990_pfc", + .unlock_reg = 0xe6060000, /* PMMR */ + + .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, + + .pins = pinmux_pins, + .nr_pins = ARRAY_SIZE(pinmux_pins), + .groups = pinmux_groups, + .nr_groups = ARRAY_SIZE(pinmux_groups), + .functions = pinmux_functions, + .nr_functions = ARRAY_SIZE(pinmux_functions), + + .cfg_regs = pinmux_config_regs, + + .pinmux_data = pinmux_data, + .pinmux_data_size = ARRAY_SIZE(pinmux_data), +}; diff --git a/drivers/pinctrl/renesas/pfc.c b/drivers/pinctrl/renesas/pfc.c index 66f0ce11b68..01a027f6636 100644 --- a/drivers/pinctrl/renesas/pfc.c +++ b/drivers/pinctrl/renesas/pfc.c @@ -29,6 +29,7 @@ enum sh_pfc_model { SH_PFC_R8A7795, SH_PFC_R8A7796, SH_PFC_R8A77970, + SH_PFC_R8A77990, SH_PFC_R8A77995, }; @@ -806,6 +807,10 @@ static int sh_pfc_pinctrl_probe(struct udevice *dev) if (model == SH_PFC_R8A77970) priv->pfc.info = &r8a77970_pinmux_info; #endif +#ifdef CONFIG_PINCTRL_PFC_R8A77990 + if (model == SH_PFC_R8A77990) + priv->pfc.info = &r8a77990_pinmux_info; +#endif #ifdef CONFIG_PINCTRL_PFC_R8A77995 if (model == SH_PFC_R8A77995) priv->pfc.info = &r8a77995_pinmux_info; @@ -870,6 +875,12 @@ static const struct udevice_id sh_pfc_pinctrl_ids[] = { .data = SH_PFC_R8A77970, }, #endif +#ifdef CONFIG_PINCTRL_PFC_R8A77990 + { + .compatible = "renesas,pfc-r8a77990", + .data = SH_PFC_R8A77990, + }, +#endif #ifdef CONFIG_PINCTRL_PFC_R8A77995 { .compatible = "renesas,pfc-r8a77995", diff --git a/drivers/pinctrl/renesas/sh_pfc.h b/drivers/pinctrl/renesas/sh_pfc.h index 22b8c950097..f4060096e22 100644 --- a/drivers/pinctrl/renesas/sh_pfc.h +++ b/drivers/pinctrl/renesas/sh_pfc.h @@ -253,6 +253,7 @@ extern const struct sh_pfc_soc_info r8a7794_pinmux_info; extern const struct sh_pfc_soc_info r8a7795_pinmux_info; extern const struct sh_pfc_soc_info r8a7796_pinmux_info; extern const struct sh_pfc_soc_info r8a77970_pinmux_info; +extern const struct sh_pfc_soc_info r8a77990_pinmux_info; extern const struct sh_pfc_soc_info r8a77995_pinmux_info; /* ----------------------------------------------------------------------------- * Helper macros to create pin and port lists @@ -368,9 +369,13 @@ extern const struct sh_pfc_soc_info r8a77995_pinmux_info; PORT_GP_CFG_1(bank, 9, fn, sfx, cfg) #define PORT_GP_10(bank, fn, sfx) PORT_GP_CFG_10(bank, fn, sfx, 0) -#define PORT_GP_CFG_12(bank, fn, sfx, cfg) \ +#define PORT_GP_CFG_11(bank, fn, sfx, cfg) \ PORT_GP_CFG_10(bank, fn, sfx, cfg), \ - PORT_GP_CFG_1(bank, 10, fn, sfx, cfg), \ + PORT_GP_CFG_1(bank, 10, fn, sfx, cfg) +#define PORT_GP_11(bank, fn, sfx) PORT_GP_CFG_11(bank, fn, sfx, 0) + +#define PORT_GP_CFG_12(bank, fn, sfx, cfg) \ + PORT_GP_CFG_11(bank, fn, sfx, cfg), \ PORT_GP_CFG_1(bank, 11, fn, sfx, cfg) #define PORT_GP_12(bank, fn, sfx) PORT_GP_CFG_12(bank, fn, sfx, 0) diff --git a/drivers/power/domain/bcm6328-power-domain.c b/drivers/power/domain/bcm6328-power-domain.c index f9276e63bf4..a90b2c83df8 100644 --- a/drivers/power/domain/bcm6328-power-domain.c +++ b/drivers/power/domain/bcm6328-power-domain.c @@ -48,15 +48,11 @@ static int bcm6328_power_domain_off(struct power_domain *power_domain) static int bcm6328_power_domain_probe(struct udevice *dev) { struct bcm6328_power_domain *priv = dev_get_priv(dev); - fdt_addr_t addr; - fdt_size_t size; - addr = devfdt_get_addr_size_index(dev, 0, &size); - if (addr == FDT_ADDR_T_NONE) + priv->regs = dev_remap_addr(dev); + if (!priv->regs) return -EINVAL; - priv->regs = ioremap(addr, size); - return 0; } diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig index 40ab9f7fa51..d504c28b77f 100644 --- a/drivers/power/pmic/Kconfig +++ b/drivers/power/pmic/Kconfig @@ -69,6 +69,13 @@ config DM_PMIC_MAX8998 This config enables implementation of driver-model pmic uclass features for PMIC MAX8998. The driver implements read/write operations. +config DM_PMIC_MC34708 + bool "Enable Driver Model for PMIC MC34708" + depends on DM_PMIC + help + This config enables implementation of driver-model pmic uclass features + for PMIC MC34708. The driver implements read/write operations. + config PMIC_MAX8997 bool "Enable Driver Model for PMIC MAX8997" depends on DM_PMIC diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile index 85ab176c0a6..29ca4429332 100644 --- a/drivers/power/pmic/Makefile +++ b/drivers/power/pmic/Makefile @@ -6,6 +6,7 @@ obj-$(CONFIG_DM_PMIC) += pmic-uclass.o obj-$(CONFIG_DM_PMIC_MAX77686) += max77686.o obj-$(CONFIG_DM_PMIC_MAX8998) += max8998.o +obj-$(CONFIG_DM_PMIC_MC34708) += mc34708.o obj-$(CONFIG_$(SPL_)DM_PMIC_PFUZE100) += pfuze100.o obj-$(CONFIG_PMIC_S2MPS11) += s2mps11.o obj-$(CONFIG_DM_PMIC_SANDBOX) += sandbox.o i2c_pmic_emul.o diff --git a/drivers/power/pmic/i2c_pmic_emul.c b/drivers/power/pmic/i2c_pmic_emul.c index c0b53091cc1..61fa76a5619 100644 --- a/drivers/power/pmic/i2c_pmic_emul.c +++ b/drivers/power/pmic/i2c_pmic_emul.c @@ -18,8 +18,11 @@ * @reg: PMICs registers array */ struct sandbox_i2c_pmic_plat_data { - u8 rw_reg; - u8 reg[SANDBOX_PMIC_REG_COUNT]; + u8 rw_reg, rw_idx; + u8 reg_count; + u8 trans_len; + u8 buf_size; + u8 *reg; }; static int sandbox_i2c_pmic_read_data(struct udevice *emul, uchar chip, @@ -27,16 +30,16 @@ static int sandbox_i2c_pmic_read_data(struct udevice *emul, uchar chip, { struct sandbox_i2c_pmic_plat_data *plat = dev_get_platdata(emul); - if (plat->rw_reg + len > SANDBOX_PMIC_REG_COUNT) { + if (plat->rw_idx + len > plat->buf_size) { pr_err("Request exceeds PMIC register range! Max register: %#x", - SANDBOX_PMIC_REG_COUNT); + plat->reg_count); return -EFAULT; } - debug("Read PMIC: %#x at register: %#x count: %d\n", - (unsigned)chip & 0xff, plat->rw_reg, len); + debug("Read PMIC: %#x at register: %#x idx: %#x count: %d\n", + (unsigned int)chip & 0xff, plat->rw_reg, plat->rw_idx, len); - memcpy(buffer, &plat->reg[plat->rw_reg], len); + memcpy(buffer, plat->reg + plat->rw_idx, len); return 0; } @@ -53,9 +56,10 @@ static int sandbox_i2c_pmic_write_data(struct udevice *emul, uchar chip, /* Set PMIC register for I/O */ plat->rw_reg = *buffer; + plat->rw_idx = plat->rw_reg * plat->trans_len; - debug("Write PMIC: %#x at register: %#x count: %d\n", - (unsigned)chip & 0xff, plat->rw_reg, len); + debug("Write PMIC: %#x at register: %#x idx: %#x count: %d\n", + (unsigned int)chip & 0xff, plat->rw_reg, plat->rw_idx, len); /* For read operation, set (write) only chip reg */ if (next_is_read) @@ -64,12 +68,12 @@ static int sandbox_i2c_pmic_write_data(struct udevice *emul, uchar chip, buffer++; len--; - if (plat->rw_reg + len > SANDBOX_PMIC_REG_COUNT) { + if (plat->rw_idx + len > plat->buf_size) { pr_err("Request exceeds PMIC register range! Max register: %#x", - SANDBOX_PMIC_REG_COUNT); + plat->reg_count); } - memcpy(&plat->reg[plat->rw_reg], buffer, len); + memcpy(plat->reg + plat->rw_idx, buffer, len); return 0; } @@ -100,20 +104,33 @@ static int sandbox_i2c_pmic_xfer(struct udevice *emul, struct i2c_msg *msg, static int sandbox_i2c_pmic_ofdata_to_platdata(struct udevice *emul) { struct sandbox_i2c_pmic_plat_data *plat = dev_get_platdata(emul); + struct udevice *pmic_dev = dev_get_parent(emul); + struct uc_pmic_priv *priv = dev_get_uclass_priv(pmic_dev); const u8 *reg_defaults; debug("%s:%d Setting PMIC default registers\n", __func__, __LINE__); + plat->reg_count = pmic_reg_count(pmic_dev); + plat->trans_len = priv->trans_len; + plat->buf_size = plat->reg_count * plat->trans_len; + + plat->reg = calloc(1, plat->buf_size); + if (!plat->reg) { + debug("Canot allocate memory (%d B) for PMIC I2C emulation!\n", + plat->buf_size); + return -ENOMEM; + } reg_defaults = dev_read_u8_array_ptr(emul, "reg-defaults", - SANDBOX_PMIC_REG_COUNT); + plat->buf_size); if (!reg_defaults) { pr_err("Property \"reg-defaults\" not found for device: %s!", emul->name); + free(plat->reg); return -EINVAL; } - memcpy(&plat->reg, reg_defaults, SANDBOX_PMIC_REG_COUNT); + memcpy(plat->reg, reg_defaults, plat->buf_size); return 0; } diff --git a/drivers/power/pmic/mc34708.c b/drivers/power/pmic/mc34708.c new file mode 100644 index 00000000000..2b2fc72a472 --- /dev/null +++ b/drivers/power/pmic/mc34708.c @@ -0,0 +1,105 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de + * + */ + +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <fsl_pmic.h> +#include <i2c.h> +#include <power/pmic.h> + +DECLARE_GLOBAL_DATA_PTR; + +static int mc34708_reg_count(struct udevice *dev) +{ + return PMIC_NUM_OF_REGS; +} + +static int mc34708_write(struct udevice *dev, uint reg, const u8 *buff, + int len) +{ + u8 buf[3] = { 0 }; + int ret; + + if (len != MC34708_TRANSFER_SIZE) + return -EINVAL; + + /* + * The MC34708 sends data with big endian format, hence we need to + * perform manual byte swap. + */ + buf[0] = buff[2]; + buf[1] = buff[1]; + buf[2] = buff[0]; + + ret = dm_i2c_write(dev, reg, buf, len); + if (ret) + printf("write error to device: %p register: %#x!", dev, reg); + + return ret; +} + +static int mc34708_read(struct udevice *dev, uint reg, u8 *buff, int len) +{ + u8 buf[3] = { 0 }; + int ret; + + if (len != MC34708_TRANSFER_SIZE) + return -EINVAL; + + ret = dm_i2c_read(dev, reg, buf, len); + if (ret) + printf("read error from device: %p register: %#x!", dev, reg); + + buff[0] = buf[2]; + buff[1] = buf[1]; + buff[2] = buf[0]; + + return ret; +} + +static int mc34708_probe(struct udevice *dev) +{ + struct uc_pmic_priv *priv = dev_get_uclass_priv(dev); + + priv->trans_len = MC34708_TRANSFER_SIZE; + + /* + * Handle PMIC Errata 37: APS mode not fully functional, + * use explicit PWM or PFM instead + */ + pmic_clrsetbits(dev, MC34708_REG_SW12_OPMODE, + MC34708_SW1AMODE_MASK | MC34708_SW2MODE_MASK, + SW_MODE_PWMPWM | (SW_MODE_PWMPWM << 14u)); + + pmic_clrsetbits(dev, MC34708_REG_SW345_OPMODE, + MC34708_SW3MODE_MASK | MC34708_SW4AMODE_MASK | + MC34708_SW4BMODE_MASK | MC34708_SW5MODE_MASK, + SW_MODE_PWMPWM | (SW_MODE_PWMPWM << 6u) | + (SW_MODE_PWMPWM << 12u) | (SW_MODE_PWMPWM << 18u)); + + return 0; +} + +static struct dm_pmic_ops mc34708_ops = { + .reg_count = mc34708_reg_count, + .read = mc34708_read, + .write = mc34708_write, +}; + +static const struct udevice_id mc34708_ids[] = { + { .compatible = "fsl,mc34708" }, + { } +}; + +U_BOOT_DRIVER(pmic_mc34708) = { + .name = "mc34708_pmic", + .id = UCLASS_PMIC, + .of_match = mc34708_ids, + .probe = mc34708_probe, + .ops = &mc34708_ops, +}; diff --git a/drivers/power/pmic/pmic-uclass.c b/drivers/power/pmic/pmic-uclass.c index 5f0f6ff93e1..db68c766f5d 100644 --- a/drivers/power/pmic/pmic-uclass.c +++ b/drivers/power/pmic/pmic-uclass.c @@ -130,23 +130,35 @@ int pmic_write(struct udevice *dev, uint reg, const uint8_t *buffer, int len) int pmic_reg_read(struct udevice *dev, uint reg) { - u8 byte; + struct uc_pmic_priv *priv = dev_get_uclass_priv(dev); + u32 val = 0; int ret; - debug("%s: reg=%x", __func__, reg); - ret = pmic_read(dev, reg, &byte, 1); - debug(", value=%x, ret=%d\n", byte, ret); + if (priv->trans_len < 1 || priv->trans_len > sizeof(val)) { + debug("Wrong transmission size [%d]\n", priv->trans_len); + return -EINVAL; + } + + debug("%s: reg=%x priv->trans_len:%d", __func__, reg, priv->trans_len); + ret = pmic_read(dev, reg, (uint8_t *)&val, priv->trans_len); + debug(", value=%x, ret=%d\n", val, ret); - return ret ? ret : byte; + return ret ? ret : val; } int pmic_reg_write(struct udevice *dev, uint reg, uint value) { - u8 byte = value; + struct uc_pmic_priv *priv = dev_get_uclass_priv(dev); int ret; - debug("%s: reg=%x, value=%x", __func__, reg, value); - ret = pmic_write(dev, reg, &byte, 1); + if (priv->trans_len < 1 || priv->trans_len > sizeof(value)) { + debug("Wrong transmission size [%d]\n", priv->trans_len); + return -EINVAL; + } + + debug("%s: reg=%x, value=%x priv->trans_len:%d", __func__, reg, value, + priv->trans_len); + ret = pmic_write(dev, reg, (uint8_t *)&value, priv->trans_len); debug(", ret=%d\n", ret); return ret; @@ -154,18 +166,34 @@ int pmic_reg_write(struct udevice *dev, uint reg, uint value) int pmic_clrsetbits(struct udevice *dev, uint reg, uint clr, uint set) { - u8 byte; + struct uc_pmic_priv *priv = dev_get_uclass_priv(dev); + u32 val = 0; int ret; - ret = pmic_reg_read(dev, reg); + if (priv->trans_len < 1 || priv->trans_len > sizeof(val)) { + debug("Wrong transmission size [%d]\n", priv->trans_len); + return -EINVAL; + } + + ret = pmic_read(dev, reg, (uint8_t *)&val, priv->trans_len); if (ret < 0) return ret; - byte = (ret & ~clr) | set; - return pmic_reg_write(dev, reg, byte); + val = (val & ~clr) | set; + return pmic_write(dev, reg, (uint8_t *)&val, priv->trans_len); +} + +static int pmic_pre_probe(struct udevice *dev) +{ + struct uc_pmic_priv *pmic_priv = dev_get_uclass_priv(dev); + + pmic_priv->trans_len = 1; + return 0; } UCLASS_DRIVER(pmic) = { .id = UCLASS_PMIC, .name = "pmic", + .pre_probe = pmic_pre_probe, + .per_device_auto_alloc_size = sizeof(struct uc_pmic_priv), }; diff --git a/drivers/ram/bmips_ram.c b/drivers/ram/bmips_ram.c index ad2f0ac2f07..cc37dfa08c1 100644 --- a/drivers/ram/bmips_ram.c +++ b/drivers/ram/bmips_ram.c @@ -150,14 +150,11 @@ static int bmips_ram_probe(struct udevice *dev) struct bmips_ram_priv *priv = dev_get_priv(dev); const struct bmips_ram_hw *hw = (const struct bmips_ram_hw *)dev_get_driver_data(dev); - fdt_addr_t addr; - fdt_size_t size; - addr = devfdt_get_addr_size_index(dev, 0, &size); - if (addr == FDT_ADDR_T_NONE) + priv->regs = dev_remap_addr(dev); + if (!priv->regs) return -EINVAL; - priv->regs = ioremap(addr, size); priv->hw = hw; return 0; diff --git a/drivers/ram/stm32_sdram.c b/drivers/ram/stm32_sdram.c index dc39f33d16a..f6cac8eb90b 100644 --- a/drivers/ram/stm32_sdram.c +++ b/drivers/ram/stm32_sdram.c @@ -11,6 +11,8 @@ #include <asm/io.h> #define MEM_MODE_MASK GENMASK(2, 0) +#define SWP_FMC_OFFSET 10 +#define SWP_FMC_MASK GENMASK(SWP_FMC_OFFSET+1, SWP_FMC_OFFSET) #define NOT_FOUND 0xff struct stm32_fmc_regs { @@ -256,27 +258,36 @@ static int stm32_fmc_ofdata_to_platdata(struct udevice *dev) struct ofnode_phandle_args args; u32 *syscfg_base; u32 mem_remap; + u32 swp_fmc; ofnode bank_node; char *bank_name; u8 bank = 0; int ret; - mem_remap = dev_read_u32_default(dev, "st,mem_remap", NOT_FOUND); - if (mem_remap != NOT_FOUND) { - ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0, + ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0, &args); - if (ret) { - debug("%s: can't find syscon device (%d)\n", __func__, - ret); - return ret; - } - + if (ret) { + dev_dbg(dev, "%s: can't find syscon device (%d)\n", __func__, ret); + } else { syscfg_base = (u32 *)ofnode_get_addr(args.node); - /* set memory mapping selection */ - clrsetbits_le32(syscfg_base, MEM_MODE_MASK, mem_remap); - } else { - debug("%s: cannot find st,mem_remap property\n", __func__); + mem_remap = dev_read_u32_default(dev, "st,mem_remap", NOT_FOUND); + if (mem_remap != NOT_FOUND) { + /* set memory mapping selection */ + clrsetbits_le32(syscfg_base, MEM_MODE_MASK, mem_remap); + } else { + dev_dbg(dev, "%s: cannot find st,mem_remap property\n", __func__); + } + + swp_fmc = dev_read_u32_default(dev, "st,swp_fmc", NOT_FOUND); + if (swp_fmc != NOT_FOUND) { + /* set fmc swapping selection */ + clrsetbits_le32(syscfg_base, SWP_FMC_MASK, swp_fmc << SWP_FMC_OFFSET); + } else { + dev_dbg(dev, "%s: cannot find st,swp_fmc property\n", __func__); + } + + dev_dbg(dev, "syscfg %x = %x\n", (u32)syscfg_base, *syscfg_base); } dev_for_each_subnode(bank_node, dev) { diff --git a/drivers/reset/reset-bcm6345.c b/drivers/reset/reset-bcm6345.c index 62b9563ce14..753c1108a96 100644 --- a/drivers/reset/reset-bcm6345.c +++ b/drivers/reset/reset-bcm6345.c @@ -66,15 +66,11 @@ static const struct udevice_id bcm6345_reset_ids[] = { static int bcm6345_reset_probe(struct udevice *dev) { struct bcm6345_reset_priv *priv = dev_get_priv(dev); - fdt_addr_t addr; - fdt_size_t size; - addr = devfdt_get_addr_size_index(dev, 0, &size); - if (addr == FDT_ADDR_T_NONE) + priv->regs = dev_remap_addr(dev); + if (!priv->regs) return -EINVAL; - priv->regs = ioremap(addr, size); - return 0; } diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 277dc3de737..a3f8c8aecc7 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -48,6 +48,13 @@ config RTC_RX8010SJ help Support for Epson RX8010SJ Real Time Clock devices. +config RTC_MV + bool "Enable Marvell RTC driver" + depends on DM_RTC + help + Enable Marvell RTC driver. This driver supports the rtc that is present + on some Marvell SoCs. + config RTC_S35392A bool "Enable S35392A driver" select BITREVERSE diff --git a/drivers/rtc/mvrtc.c b/drivers/rtc/mvrtc.c index f2a226650fc..94a065379c9 100644 --- a/drivers/rtc/mvrtc.c +++ b/drivers/rtc/mvrtc.c @@ -10,6 +10,7 @@ #include <common.h> #include <command.h> +#include <dm.h> #include <rtc.h> #include <asm/io.h> #include "mvrtc.h" @@ -17,19 +18,16 @@ /* This RTC does not support century, so we assume 20 */ #define CENTURY 20 -int rtc_get(struct rtc_time *t) +static int __mv_rtc_get(struct mvrtc_registers *regs, struct rtc_time *t) { u32 time; u32 date; - struct mvrtc_registers *mvrtc_regs; - - mvrtc_regs = (struct mvrtc_registers *)KW_RTC_BASE; /* read the time register */ - time = readl(&mvrtc_regs->time); + time = readl(®s->time); /* read the date register */ - date = readl(&mvrtc_regs->date); + date = readl(®s->date); /* test for 12 hour clock (can't tell if it's am/pm) */ if (time & MVRTC_HRFMT_MSK) { @@ -57,13 +55,20 @@ int rtc_get(struct rtc_time *t) return 0; } -int rtc_set(struct rtc_time *t) +#ifndef CONFIG_DM_RTC +int rtc_get(struct rtc_time *t) +{ + struct mvrtc_registers *regs; + + regs = (struct mvrtc_registers *)KW_RTC_BASE; + return __mv_rtc_get(regs, t); +} +#endif /* !CONFIG_DM_RTC */ + +static int __mv_rtc_set(struct mvrtc_registers *regs, const struct rtc_time *t) { u32 time = 0; /* sets hour format bit to zero, 24hr format. */ u32 date = 0; - struct mvrtc_registers *mvrtc_regs; - - mvrtc_regs = (struct mvrtc_registers *)KW_RTC_BASE; /* check that this code isn't 80+ years old ;-) */ if ((t->tm_year / 100) != CENTURY) @@ -81,28 +86,100 @@ int rtc_set(struct rtc_time *t) date |= (bin2bcd(t->tm_year % 100) & MVRTC_YEAR_MSK) << MVRTC_YEAR_SFT; /* write the time register */ - writel(time, &mvrtc_regs->time); + writel(time, ®s->time); /* write the date register */ - writel(date, &mvrtc_regs->date); + writel(date, ®s->date); return 0; } -void rtc_reset(void) +#ifndef CONFIG_DM_RTC +int rtc_set(struct rtc_time *t) +{ + struct mvrtc_registers *regs; + + regs = (struct mvrtc_registers *)KW_RTC_BASE; + return __mv_rtc_set(regs, t); +} +#endif /* !CONFIG_DM_RTC */ + +static void __mv_rtc_reset(struct mvrtc_registers *regs) { u32 time; u32 sec; - struct mvrtc_registers *mvrtc_regs; - - mvrtc_regs = (struct mvrtc_registers *)KW_RTC_BASE; /* no init routine for this RTC needed, just check that it's working */ - time = readl(&mvrtc_regs->time); + time = readl(®s->time); sec = bcd2bin((time >> MVRTC_SEC_SFT) & MVRTC_SEC_MSK); udelay(1000000); - time = readl(&mvrtc_regs->time); + time = readl(®s->time); if (sec == bcd2bin((time >> MVRTC_SEC_SFT) & MVRTC_SEC_MSK)) printf("Error: RTC did not increment.\n"); } + +#ifndef CONFIG_DM_RTC +void rtc_reset(void) +{ + struct mvrtc_registers *regs; + + regs = (struct mvrtc_registers *)KW_RTC_BASE; + __mv_rtc_reset(regs); +} +#endif /* !CONFIG_DM_RTC */ + +#ifdef CONFIG_DM_RTC +static int mv_rtc_get(struct udevice *dev, struct rtc_time *tm) +{ + struct mvrtc_pdata *pdata = dev_get_platdata(dev); + struct mvrtc_registers *regs = (struct mvrtc_registers *)pdata->iobase; + + return __mv_rtc_get(regs, tm); +} + +static int mv_rtc_set(struct udevice *dev, const struct rtc_time *tm) +{ + struct mvrtc_pdata *pdata = dev_get_platdata(dev); + struct mvrtc_registers *regs = (struct mvrtc_registers *)pdata->iobase; + + return __mv_rtc_set(regs, tm); +} + +static int mv_rtc_reset(struct udevice *dev) +{ + struct mvrtc_pdata *pdata = dev_get_platdata(dev); + struct mvrtc_registers *regs = (struct mvrtc_registers *)pdata->iobase; + + __mv_rtc_reset(regs); + return 0; +} + +static const struct rtc_ops mv_rtc_ops = { + .get = mv_rtc_get, + .set = mv_rtc_set, + .reset = mv_rtc_reset, +}; + +static const struct udevice_id mv_rtc_ids[] = { + { .compatible = "marvell,kirkwood-rtc" }, + { .compatible = "marvell,orion-rtc" }, + { } +}; + +static int mv_rtc_ofdata_to_platdata(struct udevice *dev) +{ + struct mvrtc_pdata *pdata = dev_get_platdata(dev); + + pdata->iobase = devfdt_get_addr(dev); + return 0; +} + +U_BOOT_DRIVER(rtc_mv) = { + .name = "rtc-mv", + .id = UCLASS_RTC, + .ofdata_to_platdata = mv_rtc_ofdata_to_platdata, + .of_match = mv_rtc_ids, + .ops = &mv_rtc_ops, +}; +#endif /* CONFIG_DM_RTC */ diff --git a/drivers/rtc/mvrtc.h b/drivers/rtc/mvrtc.h index dc470a9b73c..87ff43299ca 100644 --- a/drivers/rtc/mvrtc.h +++ b/drivers/rtc/mvrtc.h @@ -20,6 +20,11 @@ struct mvrtc_registers { u32 date; }; +/* Platform data */ +struct mvrtc_pdata { + phys_addr_t iobase; +}; + /* time register */ #define MVRTC_SEC_SFT 0 #define MVRTC_SEC_MSK 0x7f diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 5937910e5bf..2940bd05dc3 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -197,6 +197,15 @@ config DEBUG_UART_AR933X driver will be available until the real driver model serial is running. +config DEBUG_ARC_SERIAL + bool "ARC UART" + depends on ARC_SERIAL + help + Select this to enable a debug UART using the ARC UART driver. + You will need to provide parameters to make this work. The + driver will be available until the real driver model serial is + running. + config DEBUG_UART_ATMEL bool "Atmel USART" help @@ -315,6 +324,15 @@ config DEBUG_UART_MXC will need to provide parameters to make this work. The driver will be available until the real driver model serial is running. +config DEBUG_UART_STM32 + bool "STMicroelectronics STM32" + depends on STM32_SERIAL + help + Select this to enable a debug UART using the serial_stm32 driver + You will need to provide parameters to make this work. + The driver will be available until the real driver model + serial is running. + config DEBUG_UART_UNIPHIER bool "UniPhier on-chip UART" depends on ARCH_UNIPHIER @@ -425,6 +443,13 @@ config AR933X_UART tree binding to operate, please refer to the document at doc/device-tree-bindings/serial/qca,ar9330-uart.txt. +config ARC_SERIAL + bool "ARC UART support" + depends on DM_SERIAL + help + Select this to enable support for ARC UART now typically + only used in Synopsys DesignWare ARC simulators like nSIM. + config ATMEL_USART bool "Atmel USART support" help diff --git a/drivers/serial/serial_arc.c b/drivers/serial/serial_arc.c index da4a07ab2f6..925f0c25554 100644 --- a/drivers/serial/serial_arc.c +++ b/drivers/serial/serial_arc.c @@ -130,3 +130,29 @@ U_BOOT_DRIVER(serial_arc) = { .ops = &arc_serial_ops, .flags = DM_FLAG_PRE_RELOC, }; + +#ifdef CONFIG_DEBUG_ARC_SERIAL +#include <debug_uart.h> + +static inline void _debug_uart_init(void) +{ + struct arc_serial_regs *regs = (struct arc_serial_regs *)CONFIG_DEBUG_UART_BASE; + int arc_console_baud = CONFIG_DEBUG_UART_CLOCK / (CONFIG_BAUDRATE * 4) - 1; + + writeb(arc_console_baud & 0xff, ®s->baudl); + writeb((arc_console_baud & 0xff00) >> 8, ®s->baudh); +} + +static inline void _debug_uart_putc(int c) +{ + struct arc_serial_regs *regs = (struct arc_serial_regs *)CONFIG_DEBUG_UART_BASE; + + while (!(readb(®s->status) & UART_TXEMPTY)) + ; + + writeb(c, ®s->data); +} + +DEBUG_UART_FUNCS + +#endif diff --git a/drivers/serial/serial_bcm6345.c b/drivers/serial/serial_bcm6345.c index 8838c41b7ce..ee5d561bfd1 100644 --- a/drivers/serial/serial_bcm6345.c +++ b/drivers/serial/serial_bcm6345.c @@ -227,17 +227,13 @@ static int bcm6345_serial_probe(struct udevice *dev) { struct bcm6345_serial_priv *priv = dev_get_priv(dev); struct clk clk; - fdt_addr_t addr; - fdt_size_t size; int ret; /* get address */ - addr = devfdt_get_addr_size_index(dev, 0, &size); - if (addr == FDT_ADDR_T_NONE) + priv->base = dev_remap_addr(dev); + if (!priv->base) return -EINVAL; - priv->base = ioremap(addr, size); - /* get clock rate */ ret = clk_get_by_index(dev, 0, &clk); if (ret < 0) diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c index 119e6b9846d..c462394dbdc 100644 --- a/drivers/serial/serial_msm.c +++ b/drivers/serial/serial_msm.c @@ -16,6 +16,7 @@ #include <watchdog.h> #include <asm/io.h> #include <linux/compiler.h> +#include <dm/pinctrl.h> /* Serial registers - this driver works in uartdm mode*/ @@ -25,6 +26,9 @@ #define UARTDM_RXFS 0x50 /* RX channel status register */ #define UARTDM_RXFS_BUF_SHIFT 0x7 /* Number of bytes in the packing buffer */ #define UARTDM_RXFS_BUF_MASK 0x7 +#define UARTDM_MR1 0x00 +#define UARTDM_MR2 0x04 +#define UARTDM_CSR 0xA0 #define UARTDM_SR 0xA4 /* Status register */ #define UARTDM_SR_RX_READY (1 << 0) /* Word is the receiver FIFO */ @@ -45,6 +49,10 @@ #define UARTDM_TF 0x100 /* UART Transmit FIFO register */ #define UARTDM_RF 0x140 /* UART Receive FIFO register */ +#define UART_DM_CLK_RX_TX_BIT_RATE 0xCC +#define MSM_BOOT_UART_DM_8_N_1_MODE 0x34 +#define MSM_BOOT_UART_DM_CMD_RESET_RX 0x10 +#define MSM_BOOT_UART_DM_CMD_RESET_TX 0x20 DECLARE_GLOBAL_DATA_PTR; @@ -179,19 +187,29 @@ static int msm_uart_clk_init(struct udevice *dev) return 0; } +static void uart_dm_init(struct msm_serial_data *priv) +{ + writel(UART_DM_CLK_RX_TX_BIT_RATE, priv->base + UARTDM_CSR); + writel(0x0, priv->base + UARTDM_MR1); + writel(MSM_BOOT_UART_DM_8_N_1_MODE, priv->base + UARTDM_MR2); + writel(MSM_BOOT_UART_DM_CMD_RESET_RX, priv->base + UARTDM_CR); + writel(MSM_BOOT_UART_DM_CMD_RESET_TX, priv->base + UARTDM_CR); +} static int msm_serial_probe(struct udevice *dev) { + int ret; struct msm_serial_data *priv = dev_get_priv(dev); - msm_uart_clk_init(dev); /* Ignore return value and hope clock was - properly initialized by earlier loaders */ + /* No need to reinitialize the UART after relocation */ + if (gd->flags & GD_FLG_RELOC) + return 0; - if (readl(priv->base + UARTDM_SR) & UARTDM_SR_UART_OVERRUN) - writel(UARTDM_CR_CMD_RESET_ERR, priv->base + UARTDM_CR); + ret = msm_uart_clk_init(dev); + if (ret) + return ret; - writel(0, priv->base + UARTDM_IMR); - writel(UARTDM_CR_CMD_STALE_EVENT_DISABLE, priv->base + UARTDM_CR); - msm_serial_fetch(dev); + pinctrl_select_state(dev, "uart"); + uart_dm_init(priv); return 0; } diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c index 6717ffaaa5b..f26234549c3 100644 --- a/drivers/serial/serial_stm32.c +++ b/drivers/serial/serial_stm32.c @@ -7,19 +7,21 @@ #include <common.h> #include <clk.h> #include <dm.h> -#include <asm/io.h> #include <serial.h> +#include <watchdog.h> +#include <asm/io.h> #include <asm/arch/stm32.h> #include "serial_stm32.h" -static int stm32_serial_setbrg(struct udevice *dev, int baudrate) +static void _stm32_serial_setbrg(fdt_addr_t base, + struct stm32_uart_info *uart_info, + u32 clock_rate, + int baudrate) { - struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); - bool stm32f4 = plat->uart_info->stm32f4; - fdt_addr_t base = plat->base; + bool stm32f4 = uart_info->stm32f4; u32 int_div, mantissa, fraction, oversampling; - int_div = DIV_ROUND_CLOSEST(plat->clock_rate, baudrate); + int_div = DIV_ROUND_CLOSEST(clock_rate, baudrate); if (int_div < 16) { oversampling = 8; @@ -33,6 +35,53 @@ static int stm32_serial_setbrg(struct udevice *dev, int baudrate) fraction = int_div % oversampling; writel(mantissa | fraction, base + BRR_OFFSET(stm32f4)); +} + +static int stm32_serial_setbrg(struct udevice *dev, int baudrate) +{ + struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); + + _stm32_serial_setbrg(plat->base, plat->uart_info, + plat->clock_rate, baudrate); + + return 0; +} + +static int stm32_serial_setparity(struct udevice *dev, enum serial_par parity) +{ + struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); + bool stm32f4 = plat->uart_info->stm32f4; + u8 uart_enable_bit = plat->uart_info->uart_enable_bit; + u32 cr1 = plat->base + CR1_OFFSET(stm32f4); + u32 config = 0; + + if (stm32f4) + return -EINVAL; /* not supported in driver*/ + + clrbits_le32(cr1, USART_CR1_RE | USART_CR1_TE | BIT(uart_enable_bit)); + /* update usart configuration (uart need to be disable) + * PCE: parity check control + * PS : '0' : Even / '1' : Odd + * M[1:0] = '00' : 8 Data bits + * M[1:0] = '01' : 9 Data bits with parity + */ + switch (parity) { + default: + case SERIAL_PAR_NONE: + config = 0; + break; + case SERIAL_PAR_ODD: + config = USART_CR1_PCE | USART_CR1_PS | USART_CR1_M0; + break; + case SERIAL_PAR_EVEN: + config = USART_CR1_PCE | USART_CR1_M0; + break; + } + clrsetbits_le32(cr1, + USART_CR1_PCE | USART_CR1_PS | USART_CR1_M1 | + USART_CR1_M0, + config); + setbits_le32(cr1, USART_CR1_RE | USART_CR1_TE | BIT(uart_enable_bit)); return 0; } @@ -44,12 +93,13 @@ static int stm32_serial_getc(struct udevice *dev) fdt_addr_t base = plat->base; u32 isr = readl(base + ISR_OFFSET(stm32f4)); - if ((isr & USART_ISR_FLAG_RXNE) == 0) + if ((isr & USART_ISR_RXNE) == 0) return -EAGAIN; - if (isr & USART_ISR_FLAG_ORE) { + if (isr & (USART_ISR_PE | USART_ISR_ORE)) { if (!stm32f4) - setbits_le32(base + ICR_OFFSET, USART_ICR_OREF); + setbits_le32(base + ICR_OFFSET, + USART_ICR_PCECF | USART_ICR_ORECF); else readl(base + RDR_OFFSET(stm32f4)); return -EIO; @@ -58,13 +108,13 @@ static int stm32_serial_getc(struct udevice *dev) return readl(base + RDR_OFFSET(stm32f4)); } -static int stm32_serial_putc(struct udevice *dev, const char c) +static int _stm32_serial_putc(fdt_addr_t base, + struct stm32_uart_info *uart_info, + const char c) { - struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); - bool stm32f4 = plat->uart_info->stm32f4; - fdt_addr_t base = plat->base; + bool stm32f4 = uart_info->stm32f4; - if ((readl(base + ISR_OFFSET(stm32f4)) & USART_ISR_FLAG_TXE) == 0) + if ((readl(base + ISR_OFFSET(stm32f4)) & USART_ISR_TXE) == 0) return -EAGAIN; writel(c, base + TDR_OFFSET(stm32f4)); @@ -72,6 +122,13 @@ static int stm32_serial_putc(struct udevice *dev, const char c) return 0; } +static int stm32_serial_putc(struct udevice *dev, const char c) +{ + struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); + + return _stm32_serial_putc(plat->base, plat->uart_info, c); +} + static int stm32_serial_pending(struct udevice *dev, bool input) { struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); @@ -80,24 +137,34 @@ static int stm32_serial_pending(struct udevice *dev, bool input) if (input) return readl(base + ISR_OFFSET(stm32f4)) & - USART_ISR_FLAG_RXNE ? 1 : 0; + USART_ISR_RXNE ? 1 : 0; else return readl(base + ISR_OFFSET(stm32f4)) & - USART_ISR_FLAG_TXE ? 0 : 1; + USART_ISR_TXE ? 0 : 1; +} + +static void _stm32_serial_init(fdt_addr_t base, + struct stm32_uart_info *uart_info) +{ + bool stm32f4 = uart_info->stm32f4; + u8 uart_enable_bit = uart_info->uart_enable_bit; + + /* Disable uart-> enable fifo -> enable uart */ + clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | + BIT(uart_enable_bit)); + if (uart_info->has_fifo) + setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); + setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | + BIT(uart_enable_bit)); } static int stm32_serial_probe(struct udevice *dev) { struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); struct clk clk; - fdt_addr_t base = plat->base; int ret; - bool stm32f4; - u8 uart_enable_bit; plat->uart_info = (struct stm32_uart_info *)dev_get_driver_data(dev); - stm32f4 = plat->uart_info->stm32f4; - uart_enable_bit = plat->uart_info->uart_enable_bit; ret = clk_get_by_index(dev, 0, &clk); if (ret < 0) @@ -115,13 +182,7 @@ static int stm32_serial_probe(struct udevice *dev) return plat->clock_rate; }; - /* Disable uart-> enable fifo-> enable uart */ - clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | - BIT(uart_enable_bit)); - if (plat->uart_info->has_fifo) - setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); - setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | - BIT(uart_enable_bit)); + _stm32_serial_init(plat->base, plat->uart_info); return 0; } @@ -149,6 +210,7 @@ static const struct dm_serial_ops stm32_serial_ops = { .pending = stm32_serial_pending, .getc = stm32_serial_getc, .setbrg = stm32_serial_setbrg, + .setparity = stm32_serial_setparity }; U_BOOT_DRIVER(serial_stm32) = { @@ -161,3 +223,43 @@ U_BOOT_DRIVER(serial_stm32) = { .probe = stm32_serial_probe, .flags = DM_FLAG_PRE_RELOC, }; + +#ifdef CONFIG_DEBUG_UART_STM32 +#include <debug_uart.h> +static inline struct stm32_uart_info *_debug_uart_info(void) +{ + struct stm32_uart_info *uart_info; + +#if defined(CONFIG_STM32F4) + uart_info = &stm32f4_info; +#elif defined(CONFIG_STM32F7) + uart_info = &stm32f7_info; +#else + uart_info = &stm32h7_info; +#endif + return uart_info; +} + +static inline void _debug_uart_init(void) +{ + fdt_addr_t base = CONFIG_DEBUG_UART_BASE; + struct stm32_uart_info *uart_info = _debug_uart_info(); + + _stm32_serial_init(base, uart_info); + _stm32_serial_setbrg(base, uart_info, + CONFIG_DEBUG_UART_CLOCK, + CONFIG_BAUDRATE); + printf("DEBUG done\n"); +} + +static inline void _debug_uart_putc(int c) +{ + fdt_addr_t base = CONFIG_DEBUG_UART_BASE; + struct stm32_uart_info *uart_info = _debug_uart_info(); + + while (_stm32_serial_putc(base, uart_info, c) == -EAGAIN) + WATCHDOG_RESET(); +} + +DEBUG_UART_FUNCS +#endif diff --git a/drivers/serial/serial_stm32.h b/drivers/serial/serial_stm32.h index 8a1a24fda8f..ccafa31219a 100644 --- a/drivers/serial/serial_stm32.h +++ b/drivers/serial/serial_stm32.h @@ -13,6 +13,7 @@ #define ISR_OFFSET(x) (x ? 0x00 : 0x1c) #define ICR_OFFSET 0x20 + /* * STM32F4 has one Data Register (DR) for received or transmitted * data, so map Receive Data Register (RDR) and Transmit Data @@ -53,19 +54,26 @@ struct stm32x7_serial_platdata { }; #define USART_CR1_FIFOEN BIT(29) +#define USART_CR1_M1 BIT(28) #define USART_CR1_OVER8 BIT(15) +#define USART_CR1_M0 BIT(12) +#define USART_CR1_PCE BIT(10) +#define USART_CR1_PS BIT(9) #define USART_CR1_TE BIT(3) #define USART_CR1_RE BIT(2) #define USART_CR3_OVRDIS BIT(12) -#define USART_ISR_FLAG_ORE BIT(3) -#define USART_ISR_FLAG_RXNE BIT(5) -#define USART_ISR_FLAG_TXE BIT(7) +#define USART_ISR_TXE BIT(7) +#define USART_ISR_RXNE BIT(5) +#define USART_ISR_ORE BIT(3) +#define USART_ISR_PE BIT(0) #define USART_BRR_F_MASK GENMASK(7, 0) #define USART_BRR_M_SHIFT 4 #define USART_BRR_M_MASK GENMASK(15, 4) -#define USART_ICR_OREF BIT(3) +#define USART_ICR_ORECF BIT(3) +#define USART_ICR_PCECF BIT(0) + #endif diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c index 06f0a48e670..3650af21573 100644 --- a/drivers/serial/serial_zynq.c +++ b/drivers/serial/serial_zynq.c @@ -175,7 +175,9 @@ static int zynq_serial_ofdata_to_platdata(struct udevice *dev) { struct zynq_uart_priv *priv = dev_get_priv(dev); - priv->regs = (struct uart_zynq *)devfdt_get_addr(dev); + priv->regs = (struct uart_zynq *)dev_read_addr(dev); + if (IS_ERR(priv->regs)) + return PTR_ERR(priv->regs); return 0; } diff --git a/drivers/spi/atcspi200_spi.c b/drivers/spi/atcspi200_spi.c index 2c1d36ee673..af96c6d21e5 100644 --- a/drivers/spi/atcspi200_spi.c +++ b/drivers/spi/atcspi200_spi.c @@ -197,7 +197,7 @@ static int __atcspi200_spi_xfer(struct nds_spi_slave *ns, int num_bytes; u8 *cmd_buf = ns->cmd_buf; size_t cmd_len = ns->cmd_len; - size_t data_len = bitlen / 8; + unsigned long data_len = bitlen / 8; int rf_cnt; int ret = 0; @@ -229,13 +229,15 @@ static int __atcspi200_spi_xfer(struct nds_spi_slave *ns, __atcspi200_spi_start(ns); break; } - debug("spi_xfer: data_out %08X(%p) data_in %08X(%p) data_len %u\n", - *(uint *)data_out, data_out, *(uint *)data_in, data_in, data_len); + if (data_out) + debug("spi_xfer: data_out %08X(%p) data_in %08X(%p) data_len %lu\n", + *(uint *)data_out, data_out, *(uint *)data_in, + data_in, data_len); num_chunks = DIV_ROUND_UP(data_len, max_tran_len); din = data_in; dout = data_out; while (num_chunks--) { - tran_len = min(data_len, (size_t)max_tran_len); + tran_len = min((size_t)data_len, (size_t)max_tran_len); ns->tran_len = tran_len; num_blks = DIV_ROUND_UP(tran_len , CHUNK_SIZE); num_bytes = (tran_len) % CHUNK_SIZE; diff --git a/drivers/spi/bcm63xx_hsspi.c b/drivers/spi/bcm63xx_hsspi.c index 262ed6242bc..4f527fa74aa 100644 --- a/drivers/spi/bcm63xx_hsspi.c +++ b/drivers/spi/bcm63xx_hsspi.c @@ -15,8 +15,6 @@ #include <wait_bit.h> #include <asm/io.h> -DECLARE_GLOBAL_DATA_PTR; - #define HSSPI_PP 0 #define SPI_MAX_SYNC_CLOCK 30000000 @@ -337,17 +335,13 @@ static int bcm63xx_hsspi_probe(struct udevice *dev) struct bcm63xx_hsspi_priv *priv = dev_get_priv(dev); struct reset_ctl rst_ctl; struct clk clk; - fdt_addr_t addr; - fdt_size_t size; int ret; - addr = devfdt_get_addr_size_index(dev, 0, &size); - if (addr == FDT_ADDR_T_NONE) + priv->regs = dev_remap_addr(dev); + if (!priv->regs) return -EINVAL; - priv->regs = ioremap(addr, size); - priv->num_cs = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), - "num-cs", 8); + priv->num_cs = dev_read_u32_default(dev, "num-cs", 8); /* enable clock */ ret = clk_get_by_name(dev, "hsspi", &clk); diff --git a/drivers/spi/bcm63xx_spi.c b/drivers/spi/bcm63xx_spi.c index 473f002c3a0..4d19e03523f 100644 --- a/drivers/spi/bcm63xx_spi.c +++ b/drivers/spi/bcm63xx_spi.c @@ -15,8 +15,6 @@ #include <wait_bit.h> #include <asm/io.h> -DECLARE_GLOBAL_DATA_PTR; - /* BCM6348 SPI core */ #define SPI_6348_CLK 0x06 #define SPI_6348_CMD 0x00 @@ -373,18 +371,14 @@ static int bcm63xx_spi_probe(struct udevice *dev) (const unsigned long *)dev_get_driver_data(dev); struct reset_ctl rst_ctl; struct clk clk; - fdt_addr_t addr; - fdt_size_t size; int ret; - addr = devfdt_get_addr_size_index(dev, 0, &size); - if (addr == FDT_ADDR_T_NONE) + priv->base = dev_remap_addr(dev); + if (!priv->base) return -EINVAL; priv->regs = regs; - priv->base = ioremap(addr, size); - priv->num_cs = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), - "num-cs", 8); + priv->num_cs = dev_read_u32_default(dev, "num-cs", 8); /* enable clock */ ret = clk_get_by_index(dev, 0, &clk); diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index b88837c0ebf..91742ba5f15 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -283,18 +283,9 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus) const void *blob = gd->fdt_blob; int node = dev_of_offset(bus); int subnode; - u32 data[4]; - int ret; - /* 2 base addresses are needed, lets get them from the DT */ - ret = fdtdec_get_int_array(blob, node, "reg", data, ARRAY_SIZE(data)); - if (ret) { - printf("Error: Can't get base addresses (ret=%d)!\n", ret); - return -ENODEV; - } - - plat->regbase = (void *)data[0]; - plat->ahbbase = (void *)data[2]; + plat->regbase = (void *)devfdt_get_addr_index(bus, 0); + plat->ahbbase = (void *)devfdt_get_addr_index(bus, 1); plat->is_decoded_cs = fdtdec_get_bool(blob, node, "cdns,is-decoded-cs"); plat->fifo_depth = fdtdec_get_uint(blob, node, "cdns,fifo-depth", 128); plat->fifo_width = fdtdec_get_uint(blob, node, "cdns,fifo-width", 4); diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c index 36842494847..197f41f9db0 100644 --- a/drivers/spi/fsl_qspi.c +++ b/drivers/spi/fsl_qspi.c @@ -407,7 +407,7 @@ static inline void qspi_ahb_read(struct fsl_qspi_priv *priv, u8 *rxbuf, int len) { struct fsl_qspi_regs *regs = priv->regs; u32 mcr_reg; - void *rx_addr = NULL; + void *rx_addr; mcr_reg = qspi_read32(priv->flags, ®s->mcr); diff --git a/drivers/spi/lpc32xx_ssp.c b/drivers/spi/lpc32xx_ssp.c index e6c876da07b..ce12eee6571 100644 --- a/drivers/spi/lpc32xx_ssp.c +++ b/drivers/spi/lpc32xx_ssp.c @@ -129,7 +129,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, int status = readl(&lslave->regs->sr); if ((idx_out < bytelen) && (status & SSP_SR_TNF)) writel(((u8 *)dout)[idx_out++], &lslave->regs->data); - if ((idx_in < bytelen) && (status & status & SSP_SR_RNE)) + if ((idx_in < bytelen) && (status & SSP_SR_RNE)) ((u8 *)din)[idx_in++] = readl(&lslave->regs->data); if (get_timer(start_time) >= CONFIG_LPC32XX_SSP_TIMEOUT) return -1; diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c index 7d180128077..f6cc3533632 100644 --- a/drivers/spi/stm32_qspi.c +++ b/drivers/spi/stm32_qspi.c @@ -8,16 +8,16 @@ */ #include <common.h> +#include <clk.h> +#include <dm.h> +#include <errno.h> #include <malloc.h> +#include <reset.h> #include <spi.h> #include <spi_flash.h> #include <asm/io.h> -#include <dm.h> -#include <errno.h> #include <asm/arch/stm32.h> -#include <clk.h> - -DECLARE_GLOBAL_DATA_PTR; +#include <linux/ioport.h> struct stm32_qspi_regs { u32 cr; /* 0x00 */ @@ -155,6 +155,8 @@ enum STM32_QSPI_CCR_FMODE { /* default SCK frequency, unit: HZ */ #define STM32_QSPI_DEFAULT_SCK_FREQ 108000000 +#define STM32_MAX_NORCHIP 2 + struct stm32_qspi_platdata { u32 base; u32 memory_map; @@ -206,11 +208,18 @@ static void _stm32_qspi_wait_for_ftf(struct stm32_qspi_priv *priv) static void _stm32_qspi_set_flash_size(struct stm32_qspi_priv *priv, u32 size) { u32 fsize = fls(size) - 1; + clrsetbits_le32(&priv->regs->dcr, STM32_QSPI_DCR_FSIZE_MASK << STM32_QSPI_DCR_FSIZE_SHIFT, fsize << STM32_QSPI_DCR_FSIZE_SHIFT); } +static void _stm32_qspi_set_cs(struct stm32_qspi_priv *priv, unsigned int cs) +{ + clrsetbits_le32(&priv->regs->cr, STM32_QSPI_CR_FSEL, + cs ? STM32_QSPI_CR_FSEL : 0); +} + static unsigned int _stm32_qspi_gen_ccr(struct stm32_qspi_priv *priv) { unsigned int ccr_reg = 0; @@ -255,13 +264,15 @@ static unsigned int _stm32_qspi_gen_ccr(struct stm32_qspi_priv *priv) } static void _stm32_qspi_enable_mmap(struct stm32_qspi_priv *priv, - struct spi_flash *flash) + struct spi_flash *flash) { + unsigned int ccr_reg; + priv->command = flash->read_cmd | CMD_HAS_ADR | CMD_HAS_DATA | CMD_HAS_DUMMY; priv->dummycycles = flash->dummy_byte * 8; - unsigned int ccr_reg = _stm32_qspi_gen_ccr(priv); + ccr_reg = _stm32_qspi_gen_ccr(priv); ccr_reg |= (STM32_QSPI_CCR_MEM_MAP << STM32_QSPI_CCR_FMODE_SHIFT); _stm32_qspi_wait_for_not_busy(priv); @@ -291,10 +302,12 @@ static void _stm32_qspi_start_xfer(struct stm32_qspi_priv *priv, u32 cr_reg) } static int _stm32_qspi_xfer(struct stm32_qspi_priv *priv, - struct spi_flash *flash, unsigned int bitlen, - const u8 *dout, u8 *din, unsigned long flags) + struct spi_flash *flash, unsigned int bitlen, + const u8 *dout, u8 *din, unsigned long flags) { unsigned int words = bitlen / 8; + u32 ccr_reg; + int i; if (flags & SPI_XFER_MMAP) { _stm32_qspi_enable_mmap(priv, flash); @@ -346,7 +359,7 @@ static int _stm32_qspi_xfer(struct stm32_qspi_priv *priv, } if (flags & SPI_XFER_END) { - u32 ccr_reg = _stm32_qspi_gen_ccr(priv); + ccr_reg = _stm32_qspi_gen_ccr(priv); ccr_reg |= STM32_QSPI_CCR_IND_WRITE << STM32_QSPI_CCR_FMODE_SHIFT; @@ -365,7 +378,7 @@ static int _stm32_qspi_xfer(struct stm32_qspi_priv *priv, debug("%s: words:%d data:", __func__, words); - int i = 0; + i = 0; while (words > i) { writeb(dout[i], &priv->regs->dr); debug("%02x ", dout[i]); @@ -379,7 +392,7 @@ static int _stm32_qspi_xfer(struct stm32_qspi_priv *priv, } } } else if (din) { - u32 ccr_reg = _stm32_qspi_gen_ccr(priv); + ccr_reg = _stm32_qspi_gen_ccr(priv); ccr_reg |= STM32_QSPI_CCR_IND_READ << STM32_QSPI_CCR_FMODE_SHIFT; @@ -394,7 +407,7 @@ static int _stm32_qspi_xfer(struct stm32_qspi_priv *priv, debug("%s: data:", __func__); - int i = 0; + i = 0; while (words > i) { din[i] = readb(&priv->regs->dr); debug("%02x ", din[i]); @@ -408,27 +421,23 @@ static int _stm32_qspi_xfer(struct stm32_qspi_priv *priv, static int stm32_qspi_ofdata_to_platdata(struct udevice *bus) { - struct fdt_resource res_regs, res_mem; + struct resource res_regs, res_mem; struct stm32_qspi_platdata *plat = bus->platdata; - const void *blob = gd->fdt_blob; - int node = dev_of_offset(bus); int ret; - ret = fdt_get_named_resource(blob, node, "reg", "reg-names", - "QuadSPI", &res_regs); + ret = dev_read_resource_byname(bus, "qspi", &res_regs); if (ret) { debug("Error: can't get regs base addresses(ret = %d)!\n", ret); return -ENOMEM; } - ret = fdt_get_named_resource(blob, node, "reg", "reg-names", - "QuadSPI-memory", &res_mem); + ret = dev_read_resource_byname(bus, "qspi_mm", &res_mem); if (ret) { debug("Error: can't get mmap base address(ret = %d)!\n", ret); return -ENOMEM; } - plat->max_hz = fdtdec_get_int(blob, node, "spi-max-frequency", - STM32_QSPI_DEFAULT_SCK_FREQ); + plat->max_hz = dev_read_u32_default(bus, "spi-max-frequency", + STM32_QSPI_DEFAULT_SCK_FREQ); plat->base = res_regs.start; plat->memory_map = res_mem.start; @@ -448,6 +457,9 @@ static int stm32_qspi_probe(struct udevice *bus) struct stm32_qspi_platdata *plat = dev_get_platdata(bus); struct stm32_qspi_priv *priv = dev_get_priv(bus); struct dm_spi_bus *dm_spi_bus; + struct clk clk; + struct reset_ctl reset_ctl; + int ret; dm_spi_bus = bus->uclass_priv; @@ -457,9 +469,6 @@ static int stm32_qspi_probe(struct udevice *bus) priv->max_hz = plat->max_hz; -#ifdef CONFIG_CLK - int ret; - struct clk clk; ret = clk_get_by_index(bus, 0, &clk); if (ret < 0) return ret; @@ -477,7 +486,19 @@ static int stm32_qspi_probe(struct udevice *bus) return priv->clock_rate; } -#endif + ret = reset_get_by_index(bus, 0, &reset_ctl); + if (ret) { + if (ret != -ENOENT) { + dev_err(bus, "failed to get reset\n"); + clk_disable(&clk); + return ret; + } + } else { + /* Reset QSPI controller */ + reset_assert(&reset_ctl); + udelay(2); + reset_deassert(&reset_ctl); + } setbits_le32(&priv->regs->cr, STM32_QSPI_CR_SSHIFT); @@ -494,10 +515,17 @@ static int stm32_qspi_claim_bus(struct udevice *dev) struct stm32_qspi_priv *priv; struct udevice *bus; struct spi_flash *flash; + struct dm_spi_slave_platdata *slave_plat; bus = dev->parent; priv = dev_get_priv(bus); flash = dev_get_uclass_priv(dev); + slave_plat = dev_get_parent_platdata(dev); + + if (slave_plat->cs >= STM32_MAX_NORCHIP) + return -ENODEV; + + _stm32_qspi_set_cs(priv, slave_plat->cs); _stm32_qspi_set_flash_size(priv, flash->size); @@ -520,7 +548,7 @@ static int stm32_qspi_release_bus(struct udevice *dev) } static int stm32_qspi_xfer(struct udevice *dev, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) + const void *dout, void *din, unsigned long flags) { struct stm32_qspi_priv *priv; struct udevice *bus; @@ -538,12 +566,13 @@ static int stm32_qspi_set_speed(struct udevice *bus, uint speed) { struct stm32_qspi_platdata *plat = bus->platdata; struct stm32_qspi_priv *priv = dev_get_priv(bus); + u32 qspi_clk = priv->clock_rate; + u32 prescaler = 255; + u32 csht; if (speed > plat->max_hz) speed = plat->max_hz; - u32 qspi_clk = priv->clock_rate; - u32 prescaler = 255; if (speed > 0) { prescaler = DIV_ROUND_UP(qspi_clk, speed) - 1; if (prescaler > 255) @@ -552,7 +581,7 @@ static int stm32_qspi_set_speed(struct udevice *bus, uint speed) prescaler = 0; } - u32 csht = DIV_ROUND_UP((5 * qspi_clk) / (prescaler + 1), 100000000); + csht = DIV_ROUND_UP((5 * qspi_clk) / (prescaler + 1), 100000000); csht = (csht - 1) & STM32_QSPI_DCR_CSHT_MASK; _stm32_qspi_wait_for_not_busy(priv); @@ -562,7 +591,6 @@ static int stm32_qspi_set_speed(struct udevice *bus, uint speed) STM32_QSPI_CR_PRESCALER_SHIFT, prescaler << STM32_QSPI_CR_PRESCALER_SHIFT); - clrsetbits_le32(&priv->regs->dcr, STM32_QSPI_DCR_CSHT_MASK << STM32_QSPI_DCR_CSHT_SHIFT, csht << STM32_QSPI_DCR_CSHT_SHIFT); @@ -632,6 +660,7 @@ static const struct dm_spi_ops stm32_qspi_ops = { static const struct udevice_id stm32_qspi_ids[] = { { .compatible = "st,stm32-qspi" }, + { .compatible = "st,stm32f469-qspi" }, { } }; diff --git a/drivers/timer/cadence-ttc.c b/drivers/timer/cadence-ttc.c index 5b91c8a90b3..3541e5c8412 100644 --- a/drivers/timer/cadence-ttc.c +++ b/drivers/timer/cadence-ttc.c @@ -64,8 +64,10 @@ static int cadence_ttc_ofdata_to_platdata(struct udevice *dev) { struct cadence_ttc_priv *priv = dev_get_priv(dev); - priv->regs = map_physmem(devfdt_get_addr(dev), + priv->regs = map_physmem(dev_read_addr(dev), sizeof(struct cadence_ttc_regs), MAP_NOCACHE); + if (IS_ERR(priv->regs)) + return PTR_ERR(priv->regs); return 0; } diff --git a/drivers/tpm/Kconfig b/drivers/tpm/Kconfig index 2a64bc49c3f..93264ddd343 100644 --- a/drivers/tpm/Kconfig +++ b/drivers/tpm/Kconfig @@ -4,18 +4,31 @@ menu "TPM support" +comment "Please select only one TPM revision" + depends on TPM_V1 && TPM_V2 + +config TPM_V1 + bool "TPMv1.x support" + depends on TPM + default y + help + Major TPM versions are not compatible at all, choose either + one or the other. This option enables TPMv1.x drivers/commands. + +if TPM_V1 && !TPM_V2 + config TPM_TIS_SANDBOX bool "Enable sandbox TPM driver" - depends on SANDBOX + depends on TPM_V1 && SANDBOX help - This driver emulates a TPM, providing access to base functions + This driver emulates a TPMv1.x, providing access to base functions such as reading and writing TPM private data. This is enough to support Chrome OS verified boot. Extend functionality is not implemented. config TPM_ATMEL_TWI bool "Enable Atmel TWI TPM device driver" - depends on TPM + depends on TPM_V1 help This driver supports an Atmel TPM device connected on the I2C bus. The usual tpm operations and the 'tpm' command can be used to talk @@ -24,7 +37,7 @@ config TPM_ATMEL_TWI config TPM_TIS_INFINEON bool "Enable support for Infineon SLB9635/45 TPMs on I2C" - depends on TPM && DM_I2C + depends on TPM_V1 && DM_I2C help This driver supports Infineon TPM devices connected on the I2C bus. The usual tpm operations and the 'tpm' command can be used to talk @@ -48,7 +61,8 @@ config TPM_TIS_I2C_BURST_LIMITATION_LEN config TPM_TIS_LPC bool "Enable support for Infineon SLB9635/45 TPMs on LPC" - depends on TPM && X86 + depends on TPM_V1 && X86 + select TPM_DRIVER_SELECTED help This driver supports Infineon TPM devices connected on the LPC bus. The usual tpm operations and the 'tpm' command can be used to talk @@ -57,7 +71,7 @@ config TPM_TIS_LPC config TPM_AUTH_SESSIONS bool "Enable TPM authentication session support" - depends on TPM + depends on TPM_V1 help Enable support for authorised (AUTH1) commands as specified in the TCG Main Specification 1.2. OIAP-authorised versions of the commands @@ -66,7 +80,7 @@ config TPM_AUTH_SESSIONS config TPM_ST33ZP24_I2C bool "STMicroelectronics ST33ZP24 I2C TPM" - depends on TPM && DM_I2C + depends on TPM_V1 && DM_I2C ---help--- This driver supports STMicroelectronics TPM devices connected on the I2C bus. The usual tpm operations and the 'tpm' command can be used to talk @@ -75,7 +89,7 @@ config TPM_ST33ZP24_I2C config TPM_ST33ZP24_SPI bool "STMicroelectronics ST33ZP24 SPI TPM" - depends on TPM && DM_SPI + depends on TPM_V1 && DM_SPI ---help--- This driver supports STMicroelectronics TPM devices connected on the SPI bus. The usual tpm operations and the 'tpm' command can be used to talk @@ -84,14 +98,14 @@ config TPM_ST33ZP24_SPI config TPM_FLUSH_RESOURCES bool "Enable TPM resource flushing support" - depends on TPM + depends on TPM_V1 help Enable support to flush specific resources (e.g. keys) from the TPM. The functionality is available via the 'tpm' command as well. config TPM_LOAD_KEY_BY_SHA1 bool "Enable TPM key loading by SHA1 support" - depends on TPM + depends on TPM_V1 help Enable support to load keys into the TPM by identifying their parent via the public key's SHA1 hash. @@ -99,8 +113,41 @@ config TPM_LOAD_KEY_BY_SHA1 config TPM_LIST_RESOURCES bool "Enable TPM resource listing support" - depends on TPM + depends on TPM_V1 help Enable support to list specific resources (e.g. keys) within the TPM. The functionality is available via the 'tpm' command as well. + +endif # TPM_V1 + +config TPM_V2 + bool "TPMv2.x support" + depends on TPM + help + Major TPM versions are not compatible at all, choose either + one or the other. This option enables TPMv2.x drivers/commands. + +if TPM_V2 && !TPM_V1 + +config TPM2_TIS_SANDBOX + bool "Enable sandbox TPMv2.x driver" + depends on TPM_V2 && SANDBOX + select TPM_DRIVER_SELECTED + help + This driver emulates a TPMv2.x, providing access to base functions + such as basic configuration, PCR extension and PCR read. Extended + functionalities are not implemented. + +config TPM2_TIS_SPI + bool "Enable support for TPMv2.x SPI chips" + depends on TPM_V2 && DM_SPI + select TPM_DRIVER_SELECTED + help + This driver supports TPMv2.x devices connected on the SPI bus. + The usual TPM operations and the 'tpm' command can be used to talk + to the device using the standard TPM Interface Specification (TIS) + protocol. + +endif # TPM_V2 + endmenu diff --git a/drivers/tpm/Makefile b/drivers/tpm/Makefile index e5fc86ff953..af473ef662e 100644 --- a/drivers/tpm/Makefile +++ b/drivers/tpm/Makefile @@ -9,3 +9,6 @@ obj-$(CONFIG_TPM_TIS_LPC) += tpm_tis_lpc.o obj-$(CONFIG_TPM_TIS_SANDBOX) += tpm_tis_sandbox.o obj-$(CONFIG_TPM_ST33ZP24_I2C) += tpm_tis_st33zp24_i2c.o obj-$(CONFIG_TPM_ST33ZP24_SPI) += tpm_tis_st33zp24_spi.o + +obj-$(CONFIG_TPM2_TIS_SANDBOX) += tpm2_tis_sandbox.o +obj-$(CONFIG_TPM2_TIS_SPI) += tpm2_tis_spi.o diff --git a/drivers/tpm/tpm-uclass.c b/drivers/tpm/tpm-uclass.c index e71545235cf..412697eedc4 100644 --- a/drivers/tpm/tpm-uclass.c +++ b/drivers/tpm/tpm-uclass.c @@ -6,8 +6,12 @@ #include <common.h> #include <dm.h> -#include <tpm.h> #include <linux/unaligned/be_byteshift.h> +#if defined(CONFIG_TPM_V1) +#include <tpm-v1.h> +#elif defined(CONFIG_TPM_V2) +#include <tpm-v2.h> +#endif #include "tpm_internal.h" int tpm_open(struct udevice *dev) diff --git a/drivers/tpm/tpm2_tis_sandbox.c b/drivers/tpm/tpm2_tis_sandbox.c new file mode 100644 index 00000000000..3240cc5dbab --- /dev/null +++ b/drivers/tpm/tpm2_tis_sandbox.c @@ -0,0 +1,625 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2018, Bootlin + * Author: Miquel Raynal <miquel.raynal@bootlin.com> + */ + +#include <common.h> +#include <dm.h> +#include <tpm-v2.h> +#include <asm/state.h> +#include <asm/unaligned.h> +#include <linux/crc8.h> + +/* Hierarchies */ +enum tpm2_hierarchy { + TPM2_HIERARCHY_LOCKOUT = 0, + TPM2_HIERARCHY_ENDORSEMENT, + TPM2_HIERARCHY_PLATFORM, + TPM2_HIERARCHY_NB, +}; + +/* Subset of supported capabilities */ +enum tpm2_capability { + TPM_CAP_TPM_PROPERTIES = 0x6, +}; + +/* Subset of supported properties */ +#define TPM2_PROPERTIES_OFFSET 0x0000020E + +enum tpm2_cap_tpm_property { + TPM2_FAIL_COUNTER = 0, + TPM2_PROP_MAX_TRIES, + TPM2_RECOVERY_TIME, + TPM2_LOCKOUT_RECOVERY, + TPM2_PROPERTY_NB, +}; + +#define SANDBOX_TPM_PCR_NB 1 + +static const u8 sandbox_extended_once_pcr[] = { + 0xf5, 0xa5, 0xfd, 0x42, 0xd1, 0x6a, 0x20, 0x30, + 0x27, 0x98, 0xef, 0x6e, 0xd3, 0x09, 0x97, 0x9b, + 0x43, 0x00, 0x3d, 0x23, 0x20, 0xd9, 0xf0, 0xe8, + 0xea, 0x98, 0x31, 0xa9, 0x27, 0x59, 0xfb, 0x4b, +}; + +struct sandbox_tpm2 { + /* TPM internal states */ + bool init_done; + bool startup_done; + bool tests_done; + /* TPM password per hierarchy */ + char pw[TPM2_HIERARCHY_NB][TPM2_DIGEST_LEN + 1]; + int pw_sz[TPM2_HIERARCHY_NB]; + /* TPM properties */ + u32 properties[TPM2_PROPERTY_NB]; + /* TPM PCRs */ + u8 pcr[SANDBOX_TPM_PCR_NB][TPM2_DIGEST_LEN]; + /* TPM PCR extensions */ + u32 pcr_extensions[SANDBOX_TPM_PCR_NB]; +}; + +/* + * Check the tag validity depending on the command (authentication required or + * not). If authentication is required, check it is valid. Update the auth + * pointer to point to the next chunk of data to process if needed. + */ +static int sandbox_tpm2_check_session(struct udevice *dev, u32 command, u16 tag, + const u8 **auth, + enum tpm2_hierarchy *hierarchy) +{ + struct sandbox_tpm2 *tpm = dev_get_priv(dev); + u32 handle, auth_sz, session_handle; + u16 nonce_sz, pw_sz; + const char *pw; + + switch (command) { + case TPM2_CC_STARTUP: + case TPM2_CC_SELF_TEST: + case TPM2_CC_GET_CAPABILITY: + case TPM2_CC_PCR_READ: + if (tag != TPM2_ST_NO_SESSIONS) { + printf("No session required for command 0x%x\n", + command); + return TPM2_RC_BAD_TAG; + } + + return 0; + + case TPM2_CC_CLEAR: + case TPM2_CC_HIERCHANGEAUTH: + case TPM2_CC_DAM_RESET: + case TPM2_CC_DAM_PARAMETERS: + case TPM2_CC_PCR_EXTEND: + if (tag != TPM2_ST_SESSIONS) { + printf("Session required for command 0x%x\n", command); + return TPM2_RC_AUTH_CONTEXT; + } + + handle = get_unaligned_be32(*auth); + *auth += sizeof(handle); + + /* + * PCR_Extend had a different protection mechanism and does not + * use the same standards as other commands. + */ + if (command == TPM2_CC_PCR_EXTEND) + break; + + switch (handle) { + case TPM2_RH_LOCKOUT: + *hierarchy = TPM2_HIERARCHY_LOCKOUT; + break; + case TPM2_RH_ENDORSEMENT: + if (command == TPM2_CC_CLEAR) { + printf("Endorsement hierarchy unsupported\n"); + return TPM2_RC_AUTH_MISSING; + } + *hierarchy = TPM2_HIERARCHY_ENDORSEMENT; + break; + case TPM2_RH_PLATFORM: + *hierarchy = TPM2_HIERARCHY_PLATFORM; + break; + default: + printf("Wrong handle 0x%x\n", handle); + return TPM2_RC_VALUE; + } + + break; + + default: + printf("Command code not recognized: 0x%x\n", command); + return TPM2_RC_COMMAND_CODE; + } + + auth_sz = get_unaligned_be32(*auth); + *auth += sizeof(auth_sz); + + session_handle = get_unaligned_be32(*auth); + *auth += sizeof(session_handle); + if (session_handle != TPM2_RS_PW) { + printf("Wrong session handle 0x%x\n", session_handle); + return TPM2_RC_VALUE; + } + + nonce_sz = get_unaligned_be16(*auth); + *auth += sizeof(nonce_sz); + if (nonce_sz) { + printf("Nonces not supported in Sandbox, aborting\n"); + return TPM2_RC_HANDLE; + } + + /* Ignore attributes */ + *auth += sizeof(u8); + + pw_sz = get_unaligned_be16(*auth); + *auth += sizeof(pw_sz); + if (auth_sz != (9 + nonce_sz + pw_sz)) { + printf("Authentication size (%d) do not match %d\n", + auth_sz, 9 + nonce_sz + pw_sz); + return TPM2_RC_SIZE; + } + + /* No passwork is acceptable */ + if (!pw_sz && !tpm->pw_sz[*hierarchy]) + return TPM2_RC_SUCCESS; + + /* Password is too long */ + if (pw_sz > TPM2_DIGEST_LEN) { + printf("Password should not be more than %dB\n", + TPM2_DIGEST_LEN); + return TPM2_RC_AUTHSIZE; + } + + pw = (const char *)*auth; + *auth += pw_sz; + + /* Password is wrong */ + if (pw_sz != tpm->pw_sz[*hierarchy] || + strncmp(pw, tpm->pw[*hierarchy], tpm->pw_sz[*hierarchy])) { + printf("Authentication failed: wrong password.\n"); + return TPM2_RC_BAD_AUTH; + } + + return TPM2_RC_SUCCESS; +} + +static int sandbox_tpm2_check_readyness(struct udevice *dev, int command) +{ + struct sandbox_tpm2 *tpm = dev_get_priv(dev); + + switch (command) { + case TPM2_CC_STARTUP: + if (!tpm->init_done || tpm->startup_done) + return TPM2_RC_INITIALIZE; + + break; + case TPM2_CC_GET_CAPABILITY: + if (!tpm->init_done || !tpm->startup_done) + return TPM2_RC_INITIALIZE; + + break; + case TPM2_CC_SELF_TEST: + if (!tpm->startup_done) + return TPM2_RC_INITIALIZE; + + break; + default: + if (!tpm->tests_done) + return TPM2_RC_NEEDS_TEST; + + break; + } + + return 0; +} + +static int sandbox_tpm2_fill_buf(u8 **recv, size_t *recv_len, u16 tag, u32 rc) +{ + *recv_len = sizeof(tag) + sizeof(u32) + sizeof(rc); + + /* Write tag */ + put_unaligned_be16(tag, *recv); + *recv += sizeof(tag); + + /* Write length */ + put_unaligned_be32(*recv_len, *recv); + *recv += sizeof(u32); + + /* Write return code */ + put_unaligned_be32(rc, *recv); + *recv += sizeof(rc); + + /* Add trailing \0 */ + *recv = '\0'; + + return 0; +} + +static int sandbox_tpm2_extend(struct udevice *dev, int pcr_index, + const u8 *extension) +{ + struct sandbox_tpm2 *tpm = dev_get_priv(dev); + int i; + + /* Only simulate the first extensions from all '0' with only '0' */ + for (i = 0; i < TPM2_DIGEST_LEN; i++) + if (tpm->pcr[pcr_index][i] || extension[i]) + return TPM2_RC_FAILURE; + + memcpy(tpm->pcr[pcr_index], sandbox_extended_once_pcr, + TPM2_DIGEST_LEN); + tpm->pcr_extensions[pcr_index]++; + + return 0; +}; + +static int sandbox_tpm2_xfer(struct udevice *dev, const u8 *sendbuf, + size_t send_size, u8 *recvbuf, + size_t *recv_len) +{ + struct sandbox_tpm2 *tpm = dev_get_priv(dev); + enum tpm2_hierarchy hierarchy = 0; + const u8 *sent = sendbuf; + u8 *recv = recvbuf; + u32 length, command, rc = 0; + u16 tag, mode, new_pw_sz; + u8 yes_no; + int i, j; + + /* TPM2_GetProperty */ + u32 capability, property, property_count; + + /* TPM2_PCR_Read/Extend variables */ + int pcr_index; + u64 pcr_map = 0; + u32 selections, pcr_nb; + u16 alg; + u8 pcr_array_sz; + + tag = get_unaligned_be16(sent); + sent += sizeof(tag); + + length = get_unaligned_be32(sent); + sent += sizeof(length); + if (length != send_size) { + printf("TPM2: Unmatching length, received: %ld, expected: %d\n", + send_size, length); + rc = TPM2_RC_SIZE; + sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + return 0; + } + + command = get_unaligned_be32(sent); + sent += sizeof(command); + rc = sandbox_tpm2_check_readyness(dev, command); + if (rc) { + sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + return 0; + } + + rc = sandbox_tpm2_check_session(dev, command, tag, &sent, &hierarchy); + if (rc) { + sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + return 0; + } + + switch (command) { + case TPM2_CC_STARTUP: + mode = get_unaligned_be16(sent); + sent += sizeof(mode); + switch (mode) { + case TPM2_SU_CLEAR: + case TPM2_SU_STATE: + break; + default: + rc = TPM2_RC_VALUE; + } + + tpm->startup_done = true; + + sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + break; + + case TPM2_CC_SELF_TEST: + yes_no = *sent; + sent += sizeof(yes_no); + switch (yes_no) { + case TPMI_YES: + case TPMI_NO: + break; + default: + rc = TPM2_RC_VALUE; + } + + tpm->tests_done = true; + + sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + break; + + case TPM2_CC_CLEAR: + /* Reset this hierarchy password */ + tpm->pw_sz[hierarchy] = 0; + + /* Reset all password if thisis the PLATFORM hierarchy */ + if (hierarchy == TPM2_HIERARCHY_PLATFORM) + for (i = 0; i < TPM2_HIERARCHY_NB; i++) + tpm->pw_sz[i] = 0; + + /* Reset the properties */ + for (i = 0; i < TPM2_PROPERTY_NB; i++) + tpm->properties[i] = 0; + + /* Reset the PCRs and their number of extensions */ + for (i = 0; i < SANDBOX_TPM_PCR_NB; i++) { + tpm->pcr_extensions[i] = 0; + for (j = 0; j < TPM2_DIGEST_LEN; j++) + tpm->pcr[i][j] = 0; + } + + sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + break; + + case TPM2_CC_HIERCHANGEAUTH: + new_pw_sz = get_unaligned_be16(sent); + sent += sizeof(new_pw_sz); + if (new_pw_sz > TPM2_DIGEST_LEN) { + rc = TPM2_RC_SIZE; + } else if (new_pw_sz) { + tpm->pw_sz[hierarchy] = new_pw_sz; + memcpy(tpm->pw[hierarchy], sent, new_pw_sz); + sent += new_pw_sz; + } + + sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + break; + + case TPM2_CC_GET_CAPABILITY: + capability = get_unaligned_be32(sent); + sent += sizeof(capability); + if (capability != TPM_CAP_TPM_PROPERTIES) { + printf("Sandbox TPM only support TPM_CAPABILITIES\n"); + return TPM2_RC_HANDLE; + } + + property = get_unaligned_be32(sent); + sent += sizeof(property); + property -= TPM2_PROPERTIES_OFFSET; + + property_count = get_unaligned_be32(sent); + sent += sizeof(property_count); + if (!property_count || + property + property_count > TPM2_PROPERTY_NB) { + rc = TPM2_RC_HANDLE; + return sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + } + + /* Write tag */ + put_unaligned_be16(tag, recv); + recv += sizeof(tag); + + /* Ignore length for now */ + recv += sizeof(u32); + + /* Write return code */ + put_unaligned_be32(rc, recv); + recv += sizeof(rc); + + /* Tell there is more data to read */ + *recv = TPMI_YES; + recv += sizeof(yes_no); + + /* Repeat the capability */ + put_unaligned_be32(capability, recv); + recv += sizeof(capability); + + /* Give the number of properties that follow */ + put_unaligned_be32(property_count, recv); + recv += sizeof(property_count); + + /* Fill with the properties */ + for (i = 0; i < property_count; i++) { + put_unaligned_be32(TPM2_PROPERTIES_OFFSET + property + + i, recv); + recv += sizeof(property); + put_unaligned_be32(tpm->properties[property + i], + recv); + recv += sizeof(property); + } + + /* Add trailing \0 */ + *recv = '\0'; + + /* Write response length */ + *recv_len = recv - recvbuf; + put_unaligned_be32(*recv_len, recvbuf + sizeof(tag)); + + break; + + case TPM2_CC_DAM_PARAMETERS: + tpm->properties[TPM2_PROP_MAX_TRIES] = get_unaligned_be32(sent); + sent += sizeof(*tpm->properties); + tpm->properties[TPM2_RECOVERY_TIME] = get_unaligned_be32(sent); + sent += sizeof(*tpm->properties); + tpm->properties[TPM2_LOCKOUT_RECOVERY] = get_unaligned_be32(sent); + sent += sizeof(*tpm->properties); + + sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + break; + + case TPM2_CC_PCR_READ: + selections = get_unaligned_be32(sent); + sent += sizeof(selections); + if (selections != 1) { + printf("Sandbox cannot handle more than one PCR\n"); + rc = TPM2_RC_VALUE; + return sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + } + + alg = get_unaligned_be16(sent); + sent += sizeof(alg); + if (alg != TPM2_ALG_SHA256) { + printf("Sandbox TPM only handle SHA256 algorithm\n"); + rc = TPM2_RC_VALUE; + return sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + } + + pcr_array_sz = *sent; + sent += sizeof(pcr_array_sz); + if (!pcr_array_sz || pcr_array_sz > 8) { + printf("Sandbox TPM cannot handle so much PCRs\n"); + rc = TPM2_RC_VALUE; + return sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + } + + for (i = 0; i < pcr_array_sz; i++) + pcr_map += (u64)sent[i] << (i * 8); + + if (pcr_map >> SANDBOX_TPM_PCR_NB) { + printf("Sandbox TPM handles up to %d PCR(s)\n", + SANDBOX_TPM_PCR_NB); + rc = TPM2_RC_VALUE; + return sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + } + + if (pcr_map >> SANDBOX_TPM_PCR_NB) { + printf("Wrong PCR map.\n"); + rc = TPM2_RC_VALUE; + return sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + } + + for (i = 0; i < SANDBOX_TPM_PCR_NB; i++) + if (pcr_map & BIT(i)) + pcr_index = i; + + /* Write tag */ + put_unaligned_be16(tag, recv); + recv += sizeof(tag); + + /* Ignore length for now */ + recv += sizeof(u32); + + /* Write return code */ + put_unaligned_be32(rc, recv); + recv += sizeof(rc); + + /* Number of extensions */ + put_unaligned_be32(tpm->pcr_extensions[pcr_index], recv); + recv += sizeof(u32); + + /* Copy the PCR */ + memcpy(recv, tpm->pcr[pcr_index], TPM2_DIGEST_LEN); + recv += TPM2_DIGEST_LEN; + + /* Add trailing \0 */ + *recv = '\0'; + + /* Write response length */ + *recv_len = recv - recvbuf; + put_unaligned_be32(*recv_len, recvbuf + sizeof(tag)); + + break; + + case TPM2_CC_PCR_EXTEND: + /* Get the PCR index */ + pcr_index = get_unaligned_be32(sendbuf + sizeof(tag) + + sizeof(length) + + sizeof(command)); + if (pcr_index > SANDBOX_TPM_PCR_NB) { + printf("Sandbox TPM handles up to %d PCR(s)\n", + SANDBOX_TPM_PCR_NB); + rc = TPM2_RC_VALUE; + } + + /* Check the number of hashes */ + pcr_nb = get_unaligned_be32(sent); + sent += sizeof(pcr_nb); + if (pcr_nb != 1) { + printf("Sandbox cannot handle more than one PCR\n"); + rc = TPM2_RC_VALUE; + return sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + } + + /* Check the hash algorithm */ + alg = get_unaligned_be16(sent); + sent += sizeof(alg); + if (alg != TPM2_ALG_SHA256) { + printf("Sandbox TPM only handle SHA256 algorithm\n"); + rc = TPM2_RC_VALUE; + return sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + } + + /* Extend the PCR */ + rc = sandbox_tpm2_extend(dev, pcr_index, sent); + + sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + break; + + default: + printf("TPM2 command %02x unknown in Sandbox\n", command); + rc = TPM2_RC_COMMAND_CODE; + sandbox_tpm2_fill_buf(&recv, recv_len, tag, rc); + } + + return 0; +} + +static int sandbox_tpm2_get_desc(struct udevice *dev, char *buf, int size) +{ + if (size < 15) + return -ENOSPC; + + return snprintf(buf, size, "Sandbox TPM2.x"); +} + +static int sandbox_tpm2_open(struct udevice *dev) +{ + struct sandbox_tpm2 *tpm = dev_get_priv(dev); + + if (tpm->init_done) + return -EIO; + + tpm->init_done = true; + + return 0; +} + +static int sandbox_tpm2_probe(struct udevice *dev) +{ + struct sandbox_tpm2 *tpm = dev_get_priv(dev); + struct tpm_chip_priv *priv = dev_get_uclass_priv(dev); + + memset(tpm, 0, sizeof(*tpm)); + + priv->pcr_count = 32; + priv->pcr_select_min = 2; + + return 0; +} + +static int sandbox_tpm2_close(struct udevice *dev) +{ + return 0; +} + +static const struct tpm_ops sandbox_tpm2_ops = { + .open = sandbox_tpm2_open, + .close = sandbox_tpm2_close, + .get_desc = sandbox_tpm2_get_desc, + .xfer = sandbox_tpm2_xfer, +}; + +static const struct udevice_id sandbox_tpm2_ids[] = { + { .compatible = "sandbox,tpm2" }, + { } +}; + +U_BOOT_DRIVER(sandbox_tpm2) = { + .name = "sandbox_tpm2", + .id = UCLASS_TPM, + .of_match = sandbox_tpm2_ids, + .ops = &sandbox_tpm2_ops, + .probe = sandbox_tpm2_probe, + .priv_auto_alloc_size = sizeof(struct sandbox_tpm2), +}; diff --git a/drivers/tpm/tpm2_tis_spi.c b/drivers/tpm/tpm2_tis_spi.c new file mode 100644 index 00000000000..c5d17a679d2 --- /dev/null +++ b/drivers/tpm/tpm2_tis_spi.c @@ -0,0 +1,679 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Author: + * Miquel Raynal <miquel.raynal@bootlin.com> + * + * Description: + * SPI-level driver for TCG/TIS TPM (trusted platform module). + * Specifications at www.trustedcomputinggroup.org + * + * This device driver implements the TPM interface as defined in + * the TCG SPI protocol stack version 2.0. + * + * It is based on the U-Boot driver tpm_tis_infineon_i2c.c. + */ + +#include <common.h> +#include <dm.h> +#include <fdtdec.h> +#include <log.h> +#include <spi.h> +#include <tpm-v2.h> +#include <linux/errno.h> +#include <linux/compiler.h> +#include <linux/types.h> +#include <linux/unaligned/be_byteshift.h> +#include <asm-generic/gpio.h> + +#include "tpm_tis.h" +#include "tpm_internal.h" + +DECLARE_GLOBAL_DATA_PTR; + +#define TPM_ACCESS(l) (0x0000 | ((l) << 12)) +#define TPM_INT_ENABLE(l) (0x0008 | ((l) << 12)) +#define TPM_STS(l) (0x0018 | ((l) << 12)) +#define TPM_DATA_FIFO(l) (0x0024 | ((l) << 12)) +#define TPM_DID_VID(l) (0x0F00 | ((l) << 12)) +#define TPM_RID(l) (0x0F04 | ((l) << 12)) + +#define MAX_SPI_FRAMESIZE 64 + +/* Number of wait states to wait for */ +#define TPM_WAIT_STATES 100 + +/** + * struct tpm_tis_chip_data - Non-discoverable TPM information + * + * @pcr_count: Number of PCR per bank + * @pcr_select_min: Size in octets of the pcrSelect array + */ +struct tpm_tis_chip_data { + unsigned int pcr_count; + unsigned int pcr_select_min; + unsigned int time_before_first_cmd_ms; +}; + +/** + * tpm_tis_spi_read() - Read from TPM register + * + * @addr: register address to read from + * @buffer: provided by caller + * @len: number of bytes to read + * + * Read len bytes from TPM register and put them into + * buffer (little-endian format, i.e. first byte is put into buffer[0]). + * + * NOTE: TPM is big-endian for multi-byte values. Multi-byte + * values have to be swapped. + * + * @return -EIO on error, 0 on success. + */ +static int tpm_tis_spi_xfer(struct udevice *dev, u32 addr, const u8 *out, + u8 *in, u16 len) +{ + struct spi_slave *slave = dev_get_parent_priv(dev); + int transfer_len, ret; + u8 tx_buf[MAX_SPI_FRAMESIZE]; + u8 rx_buf[MAX_SPI_FRAMESIZE]; + + if (in && out) { + log(LOGC_NONE, LOGL_ERR, "%s: can't do full duplex\n", + __func__); + return -EINVAL; + } + + ret = spi_claim_bus(slave); + if (ret < 0) { + log(LOGC_NONE, LOGL_ERR, "%s: could not claim bus\n", __func__); + return ret; + } + + while (len) { + /* Request */ + transfer_len = min_t(u16, len, MAX_SPI_FRAMESIZE); + tx_buf[0] = (in ? BIT(7) : 0) | (transfer_len - 1); + tx_buf[1] = 0xD4; + tx_buf[2] = addr >> 8; + tx_buf[3] = addr; + + ret = spi_xfer(slave, 4 * 8, tx_buf, rx_buf, SPI_XFER_BEGIN); + if (ret < 0) { + log(LOGC_NONE, LOGL_ERR, + "%s: spi request transfer failed (err: %d)\n", + __func__, ret); + goto release_bus; + } + + /* Wait state */ + if (!(rx_buf[3] & 0x1)) { + int i; + + for (i = 0; i < TPM_WAIT_STATES; i++) { + ret = spi_xfer(slave, 1 * 8, NULL, rx_buf, 0); + if (ret) { + log(LOGC_NONE, LOGL_ERR, + "%s: wait state failed: %d\n", + __func__, ret); + goto release_bus; + } + + if (rx_buf[0] & 0x1) + break; + } + + if (i == TPM_WAIT_STATES) { + log(LOGC_NONE, LOGL_ERR, + "%s: timeout on wait state\n", __func__); + ret = -ETIMEDOUT; + goto release_bus; + } + } + + /* Read/Write */ + if (out) { + memcpy(tx_buf, out, transfer_len); + out += transfer_len; + } + + ret = spi_xfer(slave, transfer_len * 8, + out ? tx_buf : NULL, + in ? rx_buf : NULL, + SPI_XFER_END); + if (ret) { + log(LOGC_NONE, LOGL_ERR, + "%s: spi read transfer failed (err: %d)\n", + __func__, ret); + goto release_bus; + } + + if (in) { + memcpy(in, rx_buf, transfer_len); + in += transfer_len; + } + + len -= transfer_len; + } + +release_bus: + /* If an error occurred, release the chip by deasserting the CS */ + if (ret < 0) + spi_xfer(slave, 0, NULL, NULL, SPI_XFER_END); + + spi_release_bus(slave); + + return ret; +} + +static int tpm_tis_spi_read(struct udevice *dev, u16 addr, u8 *in, u16 len) +{ + return tpm_tis_spi_xfer(dev, addr, NULL, in, len); +} + +static int tpm_tis_spi_read32(struct udevice *dev, u32 addr, u32 *result) +{ + __le32 result_le; + int ret; + + ret = tpm_tis_spi_read(dev, addr, (u8 *)&result_le, sizeof(u32)); + if (!ret) + *result = le32_to_cpu(result_le); + + return ret; +} + +static int tpm_tis_spi_write(struct udevice *dev, u16 addr, const u8 *out, + u16 len) +{ + return tpm_tis_spi_xfer(dev, addr, out, NULL, len); +} + +static int tpm_tis_spi_check_locality(struct udevice *dev, int loc) +{ + const u8 mask = TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID; + struct tpm_chip *chip = dev_get_priv(dev); + u8 buf; + int ret; + + ret = tpm_tis_spi_read(dev, TPM_ACCESS(loc), &buf, 1); + if (ret) + return ret; + + if ((buf & mask) == mask) { + chip->locality = loc; + return 0; + } + + return -ENOENT; +} + +static void tpm_tis_spi_release_locality(struct udevice *dev, int loc, + bool force) +{ + const u8 mask = TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID; + u8 buf; + + if (tpm_tis_spi_read(dev, TPM_ACCESS(loc), &buf, 1) < 0) + return; + + if (force || (buf & mask) == mask) { + buf = TPM_ACCESS_ACTIVE_LOCALITY; + tpm_tis_spi_write(dev, TPM_ACCESS(loc), &buf, 1); + } +} + +static int tpm_tis_spi_request_locality(struct udevice *dev, int loc) +{ + struct tpm_chip *chip = dev_get_priv(dev); + unsigned long start, stop; + u8 buf = TPM_ACCESS_REQUEST_USE; + int ret; + + ret = tpm_tis_spi_check_locality(dev, loc); + if (!ret) + return 0; + + if (ret != -ENOENT) { + log(LOGC_NONE, LOGL_ERR, "%s: Failed to get locality: %d\n", + __func__, ret); + return ret; + } + + ret = tpm_tis_spi_write(dev, TPM_ACCESS(loc), &buf, 1); + if (ret) { + log(LOGC_NONE, LOGL_ERR, "%s: Failed to write to TPM: %d\n", + __func__, ret); + return ret; + } + + start = get_timer(0); + stop = chip->timeout_a; + do { + ret = tpm_tis_spi_check_locality(dev, loc); + if (!ret) + return 0; + + if (ret != -ENOENT) { + log(LOGC_NONE, LOGL_ERR, + "%s: Failed to get locality: %d\n", __func__, ret); + return ret; + } + + mdelay(TPM_TIMEOUT_MS); + } while (get_timer(start) < stop); + + log(LOGC_NONE, LOGL_ERR, "%s: Timeout getting locality: %d\n", __func__, + ret); + + return ret; +} + +static u8 tpm_tis_spi_status(struct udevice *dev, u8 *status) +{ + struct tpm_chip *chip = dev_get_priv(dev); + + return tpm_tis_spi_read(dev, TPM_STS(chip->locality), status, 1); +} + +static int tpm_tis_spi_wait_for_stat(struct udevice *dev, u8 mask, + unsigned long timeout, u8 *status) +{ + unsigned long start = get_timer(0); + unsigned long stop = timeout; + int ret; + + do { + mdelay(TPM_TIMEOUT_MS); + ret = tpm_tis_spi_status(dev, status); + if (ret) + return ret; + + if ((*status & mask) == mask) + return 0; + } while (get_timer(start) < stop); + + return -ETIMEDOUT; +} + +static int tpm_tis_spi_get_burstcount(struct udevice *dev) +{ + struct tpm_chip *chip = dev_get_priv(dev); + unsigned long start, stop; + u32 burstcount, ret; + + /* wait for burstcount */ + start = get_timer(0); + stop = chip->timeout_d; + do { + ret = tpm_tis_spi_read32(dev, TPM_STS(chip->locality), + &burstcount); + if (ret) + return -EBUSY; + + burstcount = (burstcount >> 8) & 0xFFFF; + if (burstcount) + return burstcount; + + mdelay(TPM_TIMEOUT_MS); + } while (get_timer(start) < stop); + + return -EBUSY; +} + +static int tpm_tis_spi_cancel(struct udevice *dev) +{ + struct tpm_chip *chip = dev_get_priv(dev); + u8 data = TPM_STS_COMMAND_READY; + + return tpm_tis_spi_write(dev, TPM_STS(chip->locality), &data, 1); +} + +static int tpm_tis_spi_recv_data(struct udevice *dev, u8 *buf, size_t count) +{ + struct tpm_chip *chip = dev_get_priv(dev); + int size = 0, burstcnt, len, ret; + u8 status; + + while (size < count && + tpm_tis_spi_wait_for_stat(dev, + TPM_STS_DATA_AVAIL | TPM_STS_VALID, + chip->timeout_c, &status) == 0) { + burstcnt = tpm_tis_spi_get_burstcount(dev); + if (burstcnt < 0) + return burstcnt; + + len = min_t(int, burstcnt, count - size); + ret = tpm_tis_spi_read(dev, TPM_DATA_FIFO(chip->locality), + buf + size, len); + if (ret < 0) + return ret; + + size += len; + } + + return size; +} + +static int tpm_tis_spi_recv(struct udevice *dev, u8 *buf, size_t count) +{ + struct tpm_chip *chip = dev_get_priv(dev); + int size, expected; + + if (!chip) + return -ENODEV; + + if (count < TPM_HEADER_SIZE) { + size = -EIO; + goto out; + } + + size = tpm_tis_spi_recv_data(dev, buf, TPM_HEADER_SIZE); + if (size < TPM_HEADER_SIZE) { + log(LOGC_NONE, LOGL_ERR, "TPM error, unable to read header\n"); + goto out; + } + + expected = get_unaligned_be32(buf + 2); + if (expected > count) { + size = -EIO; + goto out; + } + + size += tpm_tis_spi_recv_data(dev, &buf[TPM_HEADER_SIZE], + expected - TPM_HEADER_SIZE); + if (size < expected) { + log(LOGC_NONE, LOGL_ERR, + "TPM error, unable to read remaining bytes of result\n"); + size = -EIO; + goto out; + } + +out: + tpm_tis_spi_cancel(dev); + tpm_tis_spi_release_locality(dev, chip->locality, false); + + return size; +} + +static int tpm_tis_spi_send(struct udevice *dev, const u8 *buf, size_t len) +{ + struct tpm_chip *chip = dev_get_priv(dev); + u32 i, size; + u8 status; + int burstcnt, ret; + u8 data; + + if (!chip) + return -ENODEV; + + if (len > TPM_DEV_BUFSIZE) + return -E2BIG; /* Command is too long for our tpm, sorry */ + + ret = tpm_tis_spi_request_locality(dev, 0); + if (ret < 0) + return -EBUSY; + + /* + * Check if the TPM is ready. If not, if not, cancel the pending command + * and poll on the status to be finally ready. + */ + ret = tpm_tis_spi_status(dev, &status); + if (ret) + return ret; + + if (!(status & TPM_STS_COMMAND_READY)) { + /* Force the transition, usually this will be done at startup */ + ret = tpm_tis_spi_cancel(dev); + if (ret) { + log(LOGC_NONE, LOGL_ERR, + "%s: Could not cancel previous operation\n", + __func__); + goto out_err; + } + + ret = tpm_tis_spi_wait_for_stat(dev, TPM_STS_COMMAND_READY, + chip->timeout_b, &status); + if (ret < 0 || !(status & TPM_STS_COMMAND_READY)) { + log(LOGC_NONE, LOGL_ERR, + "status %d after wait for stat returned %d\n", + status, ret); + goto out_err; + } + } + + for (i = 0; i < len - 1;) { + burstcnt = tpm_tis_spi_get_burstcount(dev); + if (burstcnt < 0) + return burstcnt; + + size = min_t(int, len - i - 1, burstcnt); + ret = tpm_tis_spi_write(dev, TPM_DATA_FIFO(chip->locality), + buf + i, size); + if (ret < 0) + goto out_err; + + i += size; + } + + ret = tpm_tis_spi_status(dev, &status); + if (ret) + goto out_err; + + if ((status & TPM_STS_DATA_EXPECT) == 0) { + ret = -EIO; + goto out_err; + } + + ret = tpm_tis_spi_write(dev, TPM_DATA_FIFO(chip->locality), + buf + len - 1, 1); + if (ret) + goto out_err; + + ret = tpm_tis_spi_status(dev, &status); + if (ret) + goto out_err; + + if ((status & TPM_STS_DATA_EXPECT) != 0) { + ret = -EIO; + goto out_err; + } + + data = TPM_STS_GO; + ret = tpm_tis_spi_write(dev, TPM_STS(chip->locality), &data, 1); + if (ret) + goto out_err; + + return len; + +out_err: + tpm_tis_spi_cancel(dev); + tpm_tis_spi_release_locality(dev, chip->locality, false); + + return ret; +} + +static int tpm_tis_spi_cleanup(struct udevice *dev) +{ + struct tpm_chip *chip = dev_get_priv(dev); + + tpm_tis_spi_cancel(dev); + /* + * The TPM needs some time to clean up here, + * so we sleep rather than keeping the bus busy + */ + mdelay(2); + tpm_tis_spi_release_locality(dev, chip->locality, false); + + return 0; +} + +static int tpm_tis_spi_open(struct udevice *dev) +{ + struct tpm_chip *chip = dev_get_priv(dev); + + if (chip->is_open) + return -EBUSY; + + chip->is_open = 1; + + return 0; +} + +static int tpm_tis_spi_close(struct udevice *dev) +{ + struct tpm_chip *chip = dev_get_priv(dev); + + if (chip->is_open) { + tpm_tis_spi_release_locality(dev, chip->locality, true); + chip->is_open = 0; + } + + return 0; +} + +static int tpm_tis_get_desc(struct udevice *dev, char *buf, int size) +{ + struct tpm_chip *chip = dev_get_priv(dev); + + if (size < 80) + return -ENOSPC; + + return snprintf(buf, size, + "%s v2.0: VendorID 0x%04x, DeviceID 0x%04x, RevisionID 0x%02x [%s]", + dev->name, chip->vend_dev & 0xFFFF, + chip->vend_dev >> 16, chip->rid, + (chip->is_open ? "open" : "closed")); +} + +static int tpm_tis_wait_init(struct udevice *dev, int loc) +{ + struct tpm_chip *chip = dev_get_priv(dev); + unsigned long start, stop; + u8 status; + int ret; + + start = get_timer(0); + stop = chip->timeout_b; + do { + mdelay(TPM_TIMEOUT_MS); + + ret = tpm_tis_spi_read(dev, TPM_ACCESS(loc), &status, 1); + if (ret) + break; + + if (status & TPM_ACCESS_VALID) + return 0; + } while (get_timer(start) < stop); + + return -EIO; +} + +static int tpm_tis_spi_probe(struct udevice *dev) +{ + struct tpm_tis_chip_data *drv_data = (void *)dev_get_driver_data(dev); + struct tpm_chip_priv *priv = dev_get_uclass_priv(dev); + struct tpm_chip *chip = dev_get_priv(dev); + int ret; + + if (IS_ENABLED(CONFIG_DM_GPIO)) { + struct gpio_desc reset_gpio; + + ret = gpio_request_by_name(dev, "gpio-reset", 0, + &reset_gpio, GPIOD_IS_OUT); + if (ret) { + log(LOGC_NONE, LOGL_NOTICE, "%s: missing reset GPIO\n", + __func__); + } else { + dm_gpio_set_value(&reset_gpio, 0); + mdelay(1); + dm_gpio_set_value(&reset_gpio, 1); + } + } + + /* Ensure a minimum amount of time elapsed since reset of the TPM */ + mdelay(drv_data->time_before_first_cmd_ms); + + chip->locality = 0; + chip->timeout_a = TIS_SHORT_TIMEOUT_MS; + chip->timeout_b = TIS_LONG_TIMEOUT_MS; + chip->timeout_c = TIS_SHORT_TIMEOUT_MS; + chip->timeout_d = TIS_SHORT_TIMEOUT_MS; + priv->pcr_count = drv_data->pcr_count; + priv->pcr_select_min = drv_data->pcr_select_min; + + ret = tpm_tis_wait_init(dev, chip->locality); + if (ret) { + log(LOGC_DM, LOGL_ERR, "%s: no device found\n", __func__); + return ret; + } + + ret = tpm_tis_spi_request_locality(dev, chip->locality); + if (ret) { + log(LOGC_NONE, LOGL_ERR, "%s: could not request locality %d\n", + __func__, chip->locality); + return ret; + } + + ret = tpm_tis_spi_read32(dev, TPM_DID_VID(chip->locality), + &chip->vend_dev); + if (ret) { + log(LOGC_NONE, LOGL_ERR, + "%s: could not retrieve VendorID/DeviceID\n", __func__); + return ret; + } + + ret = tpm_tis_spi_read(dev, TPM_RID(chip->locality), &chip->rid, 1); + if (ret) { + log(LOGC_NONE, LOGL_ERR, "%s: could not retrieve RevisionID\n", + __func__); + return ret; + } + + log(LOGC_NONE, LOGL_ERR, + "SPI TPMv2.0 found (vid:%04x, did:%04x, rid:%02x)\n", + chip->vend_dev & 0xFFFF, chip->vend_dev >> 16, chip->rid); + + return 0; +} + +static int tpm_tis_spi_remove(struct udevice *dev) +{ + struct tpm_chip *chip = dev_get_priv(dev); + + tpm_tis_spi_release_locality(dev, chip->locality, true); + + return 0; +} + +static const struct tpm_ops tpm_tis_spi_ops = { + .open = tpm_tis_spi_open, + .close = tpm_tis_spi_close, + .get_desc = tpm_tis_get_desc, + .send = tpm_tis_spi_send, + .recv = tpm_tis_spi_recv, + .cleanup = tpm_tis_spi_cleanup, +}; + +static const struct tpm_tis_chip_data tpm_tis_std_chip_data = { + .pcr_count = 24, + .pcr_select_min = 3, + .time_before_first_cmd_ms = 30, +}; + +static const struct udevice_id tpm_tis_spi_ids[] = { + { + .compatible = "tis,tpm2-spi", + .data = (ulong)&tpm_tis_std_chip_data, + }, + { } +}; + +U_BOOT_DRIVER(tpm_tis_spi) = { + .name = "tpm_tis_spi", + .id = UCLASS_TPM, + .of_match = tpm_tis_spi_ids, + .ops = &tpm_tis_spi_ops, + .probe = tpm_tis_spi_probe, + .remove = tpm_tis_spi_remove, + .priv_auto_alloc_size = sizeof(struct tpm_chip), +}; diff --git a/drivers/tpm/tpm_atmel_twi.c b/drivers/tpm/tpm_atmel_twi.c index 8547580c244..2079ea913e4 100644 --- a/drivers/tpm/tpm_atmel_twi.c +++ b/drivers/tpm/tpm_atmel_twi.c @@ -7,7 +7,7 @@ #include <common.h> #include <dm.h> -#include <tpm.h> +#include <tpm-v1.h> #include <i2c.h> #include <asm/unaligned.h> diff --git a/drivers/tpm/tpm_tis.h b/drivers/tpm/tpm_tis.h index a899bc0b46a..947585f8e33 100644 --- a/drivers/tpm/tpm_tis.h +++ b/drivers/tpm/tpm_tis.h @@ -40,6 +40,7 @@ struct tpm_chip { int is_open; int locality; u32 vend_dev; + u8 rid; unsigned long timeout_a, timeout_b, timeout_c, timeout_d; /* msec */ ulong chip_type; }; diff --git a/drivers/tpm/tpm_tis_infineon.c b/drivers/tpm/tpm_tis_infineon.c index 9b2a0250e19..b5fe43ee50f 100644 --- a/drivers/tpm/tpm_tis_infineon.c +++ b/drivers/tpm/tpm_tis_infineon.c @@ -23,7 +23,7 @@ #include <dm.h> #include <fdtdec.h> #include <i2c.h> -#include <tpm.h> +#include <tpm-v1.h> #include <linux/errno.h> #include <linux/compiler.h> #include <linux/types.h> diff --git a/drivers/tpm/tpm_tis_lpc.c b/drivers/tpm/tpm_tis_lpc.c index 572926382ef..7664bb1a605 100644 --- a/drivers/tpm/tpm_tis_lpc.c +++ b/drivers/tpm/tpm_tis_lpc.c @@ -15,7 +15,7 @@ #include <common.h> #include <dm.h> #include <mapmem.h> -#include <tpm.h> +#include <tpm-v1.h> #include <asm/io.h> #define PREFIX "lpc_tpm: " diff --git a/drivers/tpm/tpm_tis_sandbox.c b/drivers/tpm/tpm_tis_sandbox.c index 44157542a1f..8816d55759f 100644 --- a/drivers/tpm/tpm_tis_sandbox.c +++ b/drivers/tpm/tpm_tis_sandbox.c @@ -5,7 +5,7 @@ #include <common.h> #include <dm.h> -#include <tpm.h> +#include <tpm-v1.h> #include <asm/state.h> #include <asm/unaligned.h> #include <linux/crc8.h> diff --git a/drivers/tpm/tpm_tis_st33zp24_i2c.c b/drivers/tpm/tpm_tis_st33zp24_i2c.c index 9cf302caffd..0d380375eb3 100644 --- a/drivers/tpm/tpm_tis_st33zp24_i2c.c +++ b/drivers/tpm/tpm_tis_st33zp24_i2c.c @@ -16,7 +16,7 @@ #include <dm.h> #include <fdtdec.h> #include <i2c.h> -#include <tpm.h> +#include <tpm-v1.h> #include <errno.h> #include <linux/types.h> #include <asm/unaligned.h> diff --git a/drivers/tpm/tpm_tis_st33zp24_spi.c b/drivers/tpm/tpm_tis_st33zp24_spi.c index d5fde11a83d..f6087e76338 100644 --- a/drivers/tpm/tpm_tis_st33zp24_spi.c +++ b/drivers/tpm/tpm_tis_st33zp24_spi.c @@ -16,7 +16,7 @@ #include <dm.h> #include <fdtdec.h> #include <spi.h> -#include <tpm.h> +#include <tpm-v1.h> #include <errno.h> #include <linux/types.h> #include <asm/unaligned.h> diff --git a/drivers/usb/common/common.c b/drivers/usb/common/common.c index 17a0ab23ff5..a55def5aba6 100644 --- a/drivers/usb/common/common.c +++ b/drivers/usb/common/common.c @@ -9,6 +9,7 @@ #include <common.h> #include <linux/libfdt.h> #include <linux/usb/otg.h> +#include <linux/usb/ch9.h> DECLARE_GLOBAL_DATA_PTR; @@ -37,3 +38,31 @@ enum usb_dr_mode usb_get_dr_mode(int node) return USB_DR_MODE_UNKNOWN; } + +static const char *const speed_names[] = { + [USB_SPEED_UNKNOWN] = "UNKNOWN", + [USB_SPEED_LOW] = "low-speed", + [USB_SPEED_FULL] = "full-speed", + [USB_SPEED_HIGH] = "high-speed", + [USB_SPEED_WIRELESS] = "wireless", + [USB_SPEED_SUPER] = "super-speed", +}; + +enum usb_device_speed usb_get_maximum_speed(int node) +{ + const void *fdt = gd->fdt_blob; + const char *max_speed; + int i; + + max_speed = fdt_getprop(fdt, node, "maximum-speed", NULL); + if (!max_speed) { + pr_err("usb maximum-speed not found\n"); + return USB_SPEED_UNKNOWN; + } + + for (i = 0; i < ARRAY_SIZE(speed_names); i++) + if (!strcmp(max_speed, speed_names[i])) + return i; + + return USB_SPEED_UNKNOWN; +} diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig index ae7fc1c6304..943b7630eba 100644 --- a/drivers/usb/dwc3/Kconfig +++ b/drivers/usb/dwc3/Kconfig @@ -37,6 +37,12 @@ config USB_DWC3_OMAP Say 'Y' here if you have one such device +config USB_DWC3_GENERIC + bool "Xilinx ZynqMP and similar Platforms" + depends on DM_USB && USB_DWC3 + help + Some platforms can reuse this DWC3 generic implementation. + config USB_DWC3_UNIPHIER bool "DesignWare USB3 Host Support on UniPhier Platforms" depends on ARCH_UNIPHIER && USB_XHCI_DWC3 diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile index cd18b8d9ec0..60b5515a67d 100644 --- a/drivers/usb/dwc3/Makefile +++ b/drivers/usb/dwc3/Makefile @@ -7,6 +7,7 @@ dwc3-y := core.o obj-$(CONFIG_USB_DWC3_GADGET) += gadget.o ep0.o obj-$(CONFIG_USB_DWC3_OMAP) += dwc3-omap.o +obj-$(CONFIG_USB_DWC3_GENERIC) += dwc3-generic.o obj-$(CONFIG_USB_DWC3_UNIPHIER) += dwc3-uniphier.o obj-$(CONFIG_USB_DWC3_PHY_OMAP) += ti_usb_phy.o obj-$(CONFIG_USB_DWC3_PHY_SAMSUNG) += samsung_usb_phy.o diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 7a91015048f..1ab5cee6096 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -18,6 +18,7 @@ #include <dwc3-uboot.h> #include <asm/dma-mapping.h> #include <linux/ioport.h> +#include <dm.h> #include <linux/usb/ch9.h> #include <linux/usb/gadget.h> @@ -110,7 +111,8 @@ static struct dwc3_event_buffer *dwc3_alloc_one_event_buffer(struct dwc3 *dwc, { struct dwc3_event_buffer *evt; - evt = devm_kzalloc(dwc->dev, sizeof(*evt), GFP_KERNEL); + evt = devm_kzalloc((struct udevice *)dwc->dev, sizeof(*evt), + GFP_KERNEL); if (!evt) return ERR_PTR(-ENOMEM); @@ -623,7 +625,8 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev) void *mem; - mem = devm_kzalloc(dev, sizeof(*dwc) + DWC3_ALIGN_MASK, GFP_KERNEL); + mem = devm_kzalloc((struct udevice *)dev, + sizeof(*dwc) + DWC3_ALIGN_MASK, GFP_KERNEL); if (!mem) return -ENOMEM; @@ -785,3 +788,58 @@ MODULE_ALIAS("platform:dwc3"); MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>"); MODULE_LICENSE("GPL v2"); MODULE_DESCRIPTION("DesignWare USB3 DRD Controller Driver"); + +#ifdef CONFIG_DM_USB + +int dwc3_init(struct dwc3 *dwc) +{ + int ret; + + dwc3_cache_hwparams(dwc); + + ret = dwc3_alloc_event_buffers(dwc, DWC3_EVENT_BUFFERS_SIZE); + if (ret) { + dev_err(dwc->dev, "failed to allocate event buffers\n"); + return -ENOMEM; + } + + ret = dwc3_core_init(dwc); + if (ret) { + dev_err(dev, "failed to initialize core\n"); + goto core_fail; + } + + ret = dwc3_event_buffers_setup(dwc); + if (ret) { + dev_err(dwc->dev, "failed to setup event buffers\n"); + goto event_fail; + } + + ret = dwc3_core_init_mode(dwc); + if (ret) + goto mode_fail; + + return 0; + +mode_fail: + dwc3_event_buffers_cleanup(dwc); + +event_fail: + dwc3_core_exit(dwc); + +core_fail: + dwc3_free_event_buffers(dwc); + + return ret; +} + +void dwc3_remove(struct dwc3 *dwc) +{ + dwc3_core_exit_mode(dwc); + dwc3_event_buffers_cleanup(dwc); + dwc3_free_event_buffers(dwc); + dwc3_core_exit(dwc); + kfree(dwc->mem); +} + +#endif diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index cbe9850a0bd..58fe91dc513 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -712,7 +712,11 @@ struct dwc3 { /* device lock */ spinlock_t lock; +#if defined(__UBOOT__) && defined(CONFIG_DM_USB) + struct udevice *dev; +#else struct device *dev; +#endif struct platform_device *xhci; struct resource xhci_resources[DWC3_XHCI_RESOURCES_NUM]; @@ -987,6 +991,8 @@ struct dwc3_gadget_ep_cmd_params { /* prototypes */ int dwc3_gadget_resize_tx_fifos(struct dwc3 *dwc); +int dwc3_init(struct dwc3 *dwc); +void dwc3_remove(struct dwc3 *dwc); #ifdef CONFIG_USB_DWC3_HOST int dwc3_host_init(struct dwc3 *dwc); diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c new file mode 100644 index 00000000000..ca63eac3d98 --- /dev/null +++ b/drivers/usb/dwc3/dwc3-generic.c @@ -0,0 +1,157 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Generic DWC3 Glue layer + * + * Copyright (C) 2016 - 2018 Xilinx, Inc. + * + * Based on dwc3-omap.c. + */ + +#include <common.h> +#include <dm.h> +#include <dm/device-internal.h> +#include <dm/lists.h> +#include <linux/usb/otg.h> +#include <linux/compat.h> +#include <linux/usb/ch9.h> +#include <linux/usb/gadget.h> +#include <malloc.h> +#include <usb.h> +#include "core.h" +#include "gadget.h" +#include "linux-compat.h" + +DECLARE_GLOBAL_DATA_PTR; + +int usb_gadget_handle_interrupts(int index) +{ + struct dwc3 *priv; + struct udevice *dev; + int ret; + + ret = uclass_first_device(UCLASS_USB_DEV_GENERIC, &dev); + if (!dev || ret) { + pr_err("No USB device found\n"); + return -ENODEV; + } + + priv = dev_get_priv(dev); + + dwc3_gadget_uboot_handle_interrupt(priv); + + return 0; +} + +static int dwc3_generic_peripheral_probe(struct udevice *dev) +{ + struct dwc3 *priv = dev_get_priv(dev); + + return dwc3_init(priv); +} + +static int dwc3_generic_peripheral_remove(struct udevice *dev) +{ + struct dwc3 *priv = dev_get_priv(dev); + + dwc3_remove(priv); + + return 0; +} + +static int dwc3_generic_peripheral_ofdata_to_platdata(struct udevice *dev) +{ + struct dwc3 *priv = dev_get_priv(dev); + int node = dev_of_offset(dev); + + priv->regs = (void *)devfdt_get_addr(dev); + priv->regs += DWC3_GLOBALS_REGS_START; + + priv->maximum_speed = usb_get_maximum_speed(node); + if (priv->maximum_speed == USB_SPEED_UNKNOWN) { + pr_err("Invalid usb maximum speed\n"); + return -ENODEV; + } + + priv->dr_mode = usb_get_dr_mode(node); + if (priv->dr_mode == USB_DR_MODE_UNKNOWN) { + pr_err("Invalid usb mode setup\n"); + return -ENODEV; + } + + return 0; +} + +static int dwc3_generic_peripheral_bind(struct udevice *dev) +{ + return device_probe(dev); +} + +U_BOOT_DRIVER(dwc3_generic_peripheral) = { + .name = "dwc3-generic-peripheral", + .id = UCLASS_USB_DEV_GENERIC, + .ofdata_to_platdata = dwc3_generic_peripheral_ofdata_to_platdata, + .probe = dwc3_generic_peripheral_probe, + .remove = dwc3_generic_peripheral_remove, + .bind = dwc3_generic_peripheral_bind, + .platdata_auto_alloc_size = sizeof(struct usb_platdata), + .priv_auto_alloc_size = sizeof(struct dwc3), + .flags = DM_FLAG_ALLOC_PRIV_DMA, +}; + +static int dwc3_generic_bind(struct udevice *parent) +{ + const void *fdt = gd->fdt_blob; + int node; + int ret; + + for (node = fdt_first_subnode(fdt, dev_of_offset(parent)); node > 0; + node = fdt_next_subnode(fdt, node)) { + const char *name = fdt_get_name(fdt, node, NULL); + enum usb_dr_mode dr_mode; + struct udevice *dev; + const char *driver; + + debug("%s: subnode name: %s\n", __func__, name); + if (strncmp(name, "dwc3@", 4)) + continue; + + dr_mode = usb_get_dr_mode(node); + + switch (dr_mode) { + case USB_DR_MODE_PERIPHERAL: + case USB_DR_MODE_OTG: + debug("%s: dr_mode: OTG or Peripheral\n", __func__); + driver = "dwc3-generic-peripheral"; + break; + case USB_DR_MODE_HOST: + debug("%s: dr_mode: HOST\n", __func__); + driver = "dwc3-generic-host"; + break; + default: + debug("%s: unsupported dr_mode\n", __func__); + return -ENODEV; + }; + + ret = device_bind_driver_to_node(parent, driver, name, + offset_to_ofnode(node), &dev); + if (ret) { + debug("%s: not able to bind usb device mode\n", + __func__); + return ret; + } + } + + return 0; +} + +static const struct udevice_id dwc3_generic_ids[] = { + { .compatible = "xlnx,zynqmp-dwc3" }, + { } +}; + +U_BOOT_DRIVER(dwc3_generic_wrapper) = { + .name = "dwc3-generic-wrapper", + .id = UCLASS_MISC, + .of_match = dwc3_generic_ids, + .bind = dwc3_generic_bind, +}; diff --git a/drivers/usb/dwc3/dwc3-omap.c b/drivers/usb/dwc3/dwc3-omap.c index 64822ee7399..8b191401829 100644 --- a/drivers/usb/dwc3/dwc3-omap.c +++ b/drivers/usb/dwc3/dwc3-omap.c @@ -16,6 +16,7 @@ #include <common.h> #include <malloc.h> #include <asm/io.h> +#include <dm.h> #include <dwc3-omap-uboot.h> #include <linux/usb/dwc3-omap.h> #include <linux/ioport.h> @@ -376,7 +377,7 @@ int dwc3_omap_uboot_init(struct dwc3_omap_device *omap_dev) struct device *dev = NULL; struct dwc3_omap *omap; - omap = devm_kzalloc(dev, sizeof(*omap), GFP_KERNEL); + omap = devm_kzalloc((struct udevice *)dev, sizeof(*omap), GFP_KERNEL); if (!omap) return -ENOMEM; diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index d45fae044c4..e340cb268fc 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -2609,7 +2609,7 @@ int dwc3_gadget_init(struct dwc3 *dwc) if (ret) goto err4; - ret = usb_add_gadget_udc(dwc->dev, &dwc->gadget); + ret = usb_add_gadget_udc((struct device *)dwc->dev, &dwc->gadget); if (ret) { dev_err(dwc->dev, "failed to register udc\n"); goto err4; diff --git a/drivers/usb/dwc3/linux-compat.h b/drivers/usb/dwc3/linux-compat.h index 27ae21247b1..35850f91a36 100644 --- a/drivers/usb/dwc3/linux-compat.h +++ b/drivers/usb/dwc3/linux-compat.h @@ -20,9 +20,4 @@ static inline size_t strlcat(char *dest, const char *src, size_t n) return strlen(dest) + strlen(src); } -static inline void *devm_kzalloc(struct device *dev, unsigned int size, - unsigned int flags) -{ - return kzalloc(size, flags); -} #endif diff --git a/drivers/usb/dwc3/ti_usb_phy.c b/drivers/usb/dwc3/ti_usb_phy.c index 925f56c97c8..d168e868e35 100644 --- a/drivers/usb/dwc3/ti_usb_phy.c +++ b/drivers/usb/dwc3/ti_usb_phy.c @@ -23,6 +23,7 @@ #include <linux/ioport.h> #include <asm/io.h> #include <asm/arch/sys_proto.h> +#include <dm.h> #include "linux-compat.h" diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c index e307c738fd7..5106cc56cb6 100644 --- a/drivers/usb/gadget/composite.c +++ b/drivers/usb/gadget/composite.c @@ -378,7 +378,7 @@ static int set_config(struct usb_composite_dev *cdev, ep = (struct usb_endpoint_descriptor *)*descriptors; addr = ((ep->bEndpointAddress & 0x80) >> 3) | (ep->bEndpointAddress & 0x0f); - __set_bit(addr, f->endpoints); + generic_set_bit(addr, f->endpoints); } result = f->set_alt(f, tmp, 0); diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c index 3acadae8b17..3ad4346f2d0 100644 --- a/drivers/usb/gadget/f_fastboot.c +++ b/drivers/usb/gadget/f_fastboot.c @@ -18,16 +18,7 @@ #include <linux/usb/gadget.h> #include <linux/usb/composite.h> #include <linux/compiler.h> -#include <version.h> #include <g_dnl.h> -#ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV -#include <fb_mmc.h> -#endif -#ifdef CONFIG_FASTBOOT_FLASH_NAND_DEV -#include <fb_nand.h> -#endif - -#define FASTBOOT_VERSION "0.4" #define FASTBOOT_INTERFACE_CLASS 0xff #define FASTBOOT_INTERFACE_SUB_CLASS 0x42 @@ -58,8 +49,6 @@ static inline struct f_fastboot *func_to_fastboot(struct usb_function *f) } static struct f_fastboot *fastboot_func; -static unsigned int download_size; -static unsigned int download_bytes; static struct usb_endpoint_descriptor fs_ep_in = { .bLength = USB_DT_ENDPOINT_SIZE, @@ -147,22 +136,6 @@ static struct usb_gadget_strings *fastboot_strings[] = { }; static void rx_handler_command(struct usb_ep *ep, struct usb_request *req); -static int strcmp_l1(const char *s1, const char *s2); - - -static char *fb_response_str; - -void fastboot_fail(const char *reason) -{ - strncpy(fb_response_str, "FAIL\0", 5); - strncat(fb_response_str, reason, FASTBOOT_RESPONSE_LEN - 4 - 1); -} - -void fastboot_okay(const char *reason) -{ - strncpy(fb_response_str, "OKAY\0", 5); - strncat(fb_response_str, reason, FASTBOOT_RESPONSE_LEN - 4 - 1); -} static void fastboot_complete(struct usb_ep *ep, struct usb_request *req) { @@ -372,90 +345,9 @@ static void compl_do_reset(struct usb_ep *ep, struct usb_request *req) do_reset(NULL, 0, 0, NULL); } -int __weak fb_set_reboot_flag(void) -{ - return -ENOSYS; -} - -static void cb_reboot(struct usb_ep *ep, struct usb_request *req) -{ - char *cmd = req->buf; - if (!strcmp_l1("reboot-bootloader", cmd)) { - if (fb_set_reboot_flag()) { - fastboot_tx_write_str("FAILCannot set reboot flag"); - return; - } - } - fastboot_func->in_req->complete = compl_do_reset; - fastboot_tx_write_str("OKAY"); -} - -static int strcmp_l1(const char *s1, const char *s2) -{ - if (!s1 || !s2) - return -1; - return strncmp(s1, s2, strlen(s1)); -} - -static void cb_getvar(struct usb_ep *ep, struct usb_request *req) -{ - char *cmd = req->buf; - char response[FASTBOOT_RESPONSE_LEN]; - const char *s; - size_t chars_left; - - strcpy(response, "OKAY"); - chars_left = sizeof(response) - strlen(response) - 1; - - strsep(&cmd, ":"); - if (!cmd) { - pr_err("missing variable"); - fastboot_tx_write_str("FAILmissing var"); - return; - } - - if (!strcmp_l1("version", cmd)) { - strncat(response, FASTBOOT_VERSION, chars_left); - } else if (!strcmp_l1("bootloader-version", cmd)) { - strncat(response, U_BOOT_VERSION, chars_left); - } else if (!strcmp_l1("downloadsize", cmd) || - !strcmp_l1("max-download-size", cmd)) { - char str_num[12]; - - sprintf(str_num, "0x%08x", CONFIG_FASTBOOT_BUF_SIZE); - strncat(response, str_num, chars_left); - } else if (!strcmp_l1("serialno", cmd)) { - s = env_get("serial#"); - if (s) - strncat(response, s, chars_left); - else - strcpy(response, "FAILValue not set"); - } else { - char *envstr; - - envstr = malloc(strlen("fastboot.") + strlen(cmd) + 1); - if (!envstr) { - fastboot_tx_write_str("FAILmalloc error"); - return; - } - - sprintf(envstr, "fastboot.%s", cmd); - s = env_get(envstr); - if (s) { - strncat(response, s, chars_left); - } else { - printf("WARNING: unknown variable: %s\n", cmd); - strcpy(response, "FAILVariable not implemented"); - } - - free(envstr); - } - fastboot_tx_write_str(response); -} - static unsigned int rx_bytes_expected(struct usb_ep *ep) { - int rx_remain = download_size - download_bytes; + int rx_remain = fastboot_data_remaining(); unsigned int rem; unsigned int maxpacket = ep->maxpacket; @@ -477,14 +369,12 @@ static unsigned int rx_bytes_expected(struct usb_ep *ep) return rx_remain; } -#define BYTES_PER_DOT 0x20000 static void rx_handler_dl_image(struct usb_ep *ep, struct usb_request *req) { - char response[FASTBOOT_RESPONSE_LEN]; - unsigned int transfer_size = download_size - download_bytes; + char response[FASTBOOT_RESPONSE_LEN] = {0}; + unsigned int transfer_size = fastboot_data_remaining(); const unsigned char *buffer = req->buf; unsigned int buffer_size = req->actual; - unsigned int pre_dot_num, now_dot_num; if (req->status != 0) { printf("Bad status: %d\n", req->status); @@ -494,33 +384,19 @@ static void rx_handler_dl_image(struct usb_ep *ep, struct usb_request *req) if (buffer_size < transfer_size) transfer_size = buffer_size; - memcpy((void *)CONFIG_FASTBOOT_BUF_ADDR + download_bytes, - buffer, transfer_size); - - pre_dot_num = download_bytes / BYTES_PER_DOT; - download_bytes += transfer_size; - now_dot_num = download_bytes / BYTES_PER_DOT; - - if (pre_dot_num != now_dot_num) { - putc('.'); - if (!(now_dot_num % 74)) - putc('\n'); - } + fastboot_data_download(buffer, transfer_size, response); + if (response[0]) { + fastboot_tx_write_str(response); + } else if (!fastboot_data_remaining()) { + fastboot_data_complete(response); - /* Check if transfer is done */ - if (download_bytes >= download_size) { /* - * Reset global transfer variable, keep download_bytes because - * it will be used in the next possible flashing command + * Reset global transfer variable */ - download_size = 0; req->complete = rx_handler_command; req->length = EP_BUFFER_SIZE; - strcpy(response, "OKAY"); fastboot_tx_write_str(response); - - printf("\ndownloading of %d bytes finished\n", download_bytes); } else { req->length = rx_bytes_expected(ep); } @@ -529,204 +405,55 @@ static void rx_handler_dl_image(struct usb_ep *ep, struct usb_request *req) usb_ep_queue(ep, req, 0); } -static void cb_download(struct usb_ep *ep, struct usb_request *req) -{ - char *cmd = req->buf; - char response[FASTBOOT_RESPONSE_LEN]; - - strsep(&cmd, ":"); - download_size = simple_strtoul(cmd, NULL, 16); - download_bytes = 0; - - printf("Starting download of %d bytes\n", download_size); - - if (0 == download_size) { - strcpy(response, "FAILdata invalid size"); - } else if (download_size > CONFIG_FASTBOOT_BUF_SIZE) { - download_size = 0; - strcpy(response, "FAILdata too large"); - } else { - sprintf(response, "DATA%08x", download_size); - req->complete = rx_handler_dl_image; - req->length = rx_bytes_expected(ep); - } - fastboot_tx_write_str(response); -} - -static void do_bootm_on_complete(struct usb_ep *ep, struct usb_request *req) -{ - char boot_addr_start[12]; - char *bootm_args[] = { "bootm", boot_addr_start, NULL }; - - puts("Booting kernel..\n"); - - sprintf(boot_addr_start, "0x%lx", (long)CONFIG_FASTBOOT_BUF_ADDR); - do_bootm(NULL, 0, 2, bootm_args); - - /* This only happens if image is somehow faulty so we start over */ - do_reset(NULL, 0, 0, NULL); -} - -static void cb_boot(struct usb_ep *ep, struct usb_request *req) -{ - fastboot_func->in_req->complete = do_bootm_on_complete; - fastboot_tx_write_str("OKAY"); -} - static void do_exit_on_complete(struct usb_ep *ep, struct usb_request *req) { g_dnl_trigger_detach(); } -static void cb_continue(struct usb_ep *ep, struct usb_request *req) +static void do_bootm_on_complete(struct usb_ep *ep, struct usb_request *req) { - fastboot_func->in_req->complete = do_exit_on_complete; - fastboot_tx_write_str("OKAY"); + fastboot_boot(); + do_exit_on_complete(ep, req); } -#ifdef CONFIG_FASTBOOT_FLASH -static void cb_flash(struct usb_ep *ep, struct usb_request *req) +static void rx_handler_command(struct usb_ep *ep, struct usb_request *req) { - char *cmd = req->buf; - char response[FASTBOOT_RESPONSE_LEN]; + char *cmdbuf = req->buf; + char response[FASTBOOT_RESPONSE_LEN] = {0}; + int cmd = -1; - strsep(&cmd, ":"); - if (!cmd) { - pr_err("missing partition name"); - fastboot_tx_write_str("FAILmissing partition name"); + if (req->status != 0 || req->length == 0) return; - } - - /* initialize the response buffer */ - fb_response_str = response; - - fastboot_fail("no flash device defined"); -#ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV - fb_mmc_flash_write(cmd, (void *)CONFIG_FASTBOOT_BUF_ADDR, - download_bytes); -#endif -#ifdef CONFIG_FASTBOOT_FLASH_NAND_DEV - fb_nand_flash_write(cmd, - (void *)CONFIG_FASTBOOT_BUF_ADDR, - download_bytes); -#endif - fastboot_tx_write_str(response); -} -#endif -static void cb_oem(struct usb_ep *ep, struct usb_request *req) -{ - char *cmd = req->buf; -#ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV - if (strncmp("format", cmd + 4, 6) == 0) { - char cmdbuf[32]; - sprintf(cmdbuf, "gpt write mmc %x $partitions", - CONFIG_FASTBOOT_FLASH_MMC_DEV); - if (run_command(cmdbuf, 0)) - fastboot_tx_write_str("FAIL"); - else - fastboot_tx_write_str("OKAY"); - } else -#endif - if (strncmp("unlock", cmd + 4, 8) == 0) { - fastboot_tx_write_str("FAILnot implemented"); - } - else { - fastboot_tx_write_str("FAILunknown oem command"); + if (req->actual < req->length) { + cmdbuf[req->actual] = '\0'; + cmd = fastboot_handle_command(cmdbuf, response); + } else { + pr_err("buffer overflow"); + fastboot_fail("buffer overflow", response); } -} - -#ifdef CONFIG_FASTBOOT_FLASH -static void cb_erase(struct usb_ep *ep, struct usb_request *req) -{ - char *cmd = req->buf; - char response[FASTBOOT_RESPONSE_LEN]; - strsep(&cmd, ":"); - if (!cmd) { - pr_err("missing partition name"); - fastboot_tx_write_str("FAILmissing partition name"); - return; + if (!strncmp("DATA", response, 4)) { + req->complete = rx_handler_dl_image; + req->length = rx_bytes_expected(ep); } - /* initialize the response buffer */ - fb_response_str = response; - - fastboot_fail("no flash device defined"); -#ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV - fb_mmc_erase(cmd); -#endif -#ifdef CONFIG_FASTBOOT_FLASH_NAND_DEV - fb_nand_erase(cmd); -#endif fastboot_tx_write_str(response); -} -#endif - -struct cmd_dispatch_info { - char *cmd; - void (*cb)(struct usb_ep *ep, struct usb_request *req); -}; - -static const struct cmd_dispatch_info cmd_dispatch_info[] = { - { - .cmd = "reboot", - .cb = cb_reboot, - }, { - .cmd = "getvar:", - .cb = cb_getvar, - }, { - .cmd = "download:", - .cb = cb_download, - }, { - .cmd = "boot", - .cb = cb_boot, - }, { - .cmd = "continue", - .cb = cb_continue, - }, -#ifdef CONFIG_FASTBOOT_FLASH - { - .cmd = "flash", - .cb = cb_flash, - }, { - .cmd = "erase", - .cb = cb_erase, - }, -#endif - { - .cmd = "oem", - .cb = cb_oem, - }, -}; - -static void rx_handler_command(struct usb_ep *ep, struct usb_request *req) -{ - char *cmdbuf = req->buf; - void (*func_cb)(struct usb_ep *ep, struct usb_request *req) = NULL; - int i; - if (req->status != 0 || req->length == 0) - return; + if (!strncmp("OKAY", response, 4)) { + switch (cmd) { + case FASTBOOT_COMMAND_BOOT: + fastboot_func->in_req->complete = do_bootm_on_complete; + break; - for (i = 0; i < ARRAY_SIZE(cmd_dispatch_info); i++) { - if (!strcmp_l1(cmd_dispatch_info[i].cmd, cmdbuf)) { - func_cb = cmd_dispatch_info[i].cb; + case FASTBOOT_COMMAND_CONTINUE: + fastboot_func->in_req->complete = do_exit_on_complete; break; - } - } - if (!func_cb) { - pr_err("unknown command: %.*s", req->actual, cmdbuf); - fastboot_tx_write_str("FAILunknown command"); - } else { - if (req->actual < req->length) { - u8 *buf = (u8 *)req->buf; - buf[req->actual] = 0; - func_cb(ep, req); - } else { - pr_err("buffer overflow"); - fastboot_tx_write_str("FAILbuffer overflow"); + case FASTBOOT_COMMAND_REBOOT: + case FASTBOOT_COMMAND_REBOOT_BOOTLOADER: + fastboot_func->in_req->complete = compl_do_reset; + break; } } diff --git a/drivers/usb/gadget/f_mass_storage.c b/drivers/usb/gadget/f_mass_storage.c index 90c95615638..c7348fcf4bf 100644 --- a/drivers/usb/gadget/f_mass_storage.c +++ b/drivers/usb/gadget/f_mass_storage.c @@ -251,6 +251,7 @@ #include <usb_mass_storage.h> #include <asm/unaligned.h> +#include <linux/bitops.h> #include <linux/usb/gadget.h> #include <linux/usb/gadget.h> #include <linux/usb/composite.h> @@ -282,26 +283,6 @@ static const char fsg_string_interface[] = "Mass Storage"; struct kref {int x; }; struct completion {int x; }; -inline void set_bit(int nr, volatile void *addr) -{ - int mask; - unsigned int *a = (unsigned int *) addr; - - a += nr >> 5; - mask = 1 << (nr & 0x1f); - *a |= mask; -} - -inline void clear_bit(int nr, volatile void *addr) -{ - int mask; - unsigned int *a = (unsigned int *) addr; - - a += nr >> 5; - mask = 1 << (nr & 0x1f); - *a &= ~mask; -} - struct fsg_dev; struct fsg_common; @@ -2085,7 +2066,7 @@ static int received_cbw(struct fsg_dev *fsg, struct fsg_buffhd *bh) * we can simply accept and discard any data received * until the next reset. */ wedge_bulk_in_endpoint(fsg); - set_bit(IGNORE_BULK_OUT, &fsg->atomic_bitflags); + generic_set_bit(IGNORE_BULK_OUT, &fsg->atomic_bitflags); return -EINVAL; } @@ -2249,7 +2230,7 @@ reset: fsg->bulk_out_enabled = 1; common->bulk_out_maxpacket = le16_to_cpu(get_unaligned(&d->wMaxPacketSize)); - clear_bit(IGNORE_BULK_OUT, &fsg->atomic_bitflags); + generic_clear_bit(IGNORE_BULK_OUT, &fsg->atomic_bitflags); /* Allocate the requests */ for (i = 0; i < FSG_NUM_BUFFERS; ++i) { diff --git a/drivers/usb/gadget/f_thor.c b/drivers/usb/gadget/f_thor.c index f874509cf38..1aa6be44bb4 100644 --- a/drivers/usb/gadget/f_thor.c +++ b/drivers/usb/gadget/f_thor.c @@ -47,7 +47,7 @@ DEFINE_CACHE_ALIGN_BUFFER(unsigned char, thor_rx_data_buf, /* ********************************************************** */ /* THOR protocol - transmission handling */ /* ********************************************************** */ -DEFINE_CACHE_ALIGN_BUFFER(char, f_name, F_NAME_BUF_SIZE); +DEFINE_CACHE_ALIGN_BUFFER(char, f_name, F_NAME_BUF_SIZE + 1); static unsigned long long int thor_file_size; static int alt_setting_num; @@ -262,8 +262,10 @@ static long long int process_rqt_download(const struct rqt_box *rqt) switch (rqt->rqt_data) { case RQT_DL_INIT: - thor_file_size = rqt->int_data[0]; - debug("INIT: total %d bytes\n", rqt->int_data[0]); + thor_file_size = (unsigned long long int)rqt->int_data[0] + + (((unsigned long long int)rqt->int_data[1]) + << 32); + debug("INIT: total %llu bytes\n", thor_file_size); break; case RQT_DL_FILE_INFO: file_type = rqt->int_data[0]; @@ -274,8 +276,11 @@ static long long int process_rqt_download(const struct rqt_box *rqt) break; } - thor_file_size = rqt->int_data[1]; + thor_file_size = (unsigned long long int)rqt->int_data[1] + + (((unsigned long long int)rqt->int_data[2]) + << 32); memcpy(f_name, rqt->str_data[0], F_NAME_BUF_SIZE); + f_name[F_NAME_BUF_SIZE] = '\0'; debug("INFO: name(%s, %d), size(%llu), type(%d)\n", f_name, 0, thor_file_size, file_type); @@ -615,22 +620,6 @@ static void thor_rx_tx_complete(struct usb_ep *ep, struct usb_request *req) status, req->actual, req->length); } -static struct usb_request *thor_start_ep(struct usb_ep *ep) -{ - struct usb_request *req; - - req = alloc_ep_req(ep, THOR_PACKET_SIZE); - debug("%s: ep:%p req:%p\n", __func__, ep, req); - - if (!req) - return NULL; - - memset(req->buf, 0, req->length); - req->complete = thor_rx_tx_complete; - - return req; -} - static void thor_setup_complete(struct usb_ep *ep, struct usb_request *req) { if (req->status || req->actual != req->length) @@ -747,6 +736,13 @@ int thor_handle(void) return 0; } +static void free_ep_req(struct usb_ep *ep, struct usb_request *req) +{ + if (req->buf) + free(req->buf); + usb_ep_free_request(ep, req); +} + static int thor_func_bind(struct usb_configuration *c, struct usb_function *f) { struct usb_gadget *gadget = c->cdev->gadget; @@ -855,21 +851,18 @@ static int thor_func_bind(struct usb_configuration *c, struct usb_function *f) return 0; fail: + if (dev->req) + free_ep_req(gadget->ep0, dev->req); free(dev); return status; } -static void free_ep_req(struct usb_ep *ep, struct usb_request *req) -{ - free(req->buf); - usb_ep_free_request(ep, req); -} - static void thor_unbind(struct usb_configuration *c, struct usb_function *f) { struct f_thor *f_thor = func_to_thor(f); struct thor_dev *dev = f_thor->dev; + free_ep_req(dev->gadget->ep0, dev->req); free(dev); memset(thor_func, 0, sizeof(*thor_func)); thor_func = NULL; @@ -890,8 +883,6 @@ static void thor_func_disable(struct usb_function *f) } if (dev->out_ep->driver_data) { - free(dev->out_req->buf); - dev->out_req->buf = NULL; usb_ep_free_request(dev->out_ep, dev->out_req); usb_ep_disable(dev->out_ep); dev->out_ep->driver_data = NULL; @@ -919,16 +910,17 @@ static int thor_eps_setup(struct usb_function *f) result = usb_ep_enable(ep, d); if (result) - goto exit; + goto err; ep->driver_data = cdev; /* claim */ - req = thor_start_ep(ep); + req = alloc_ep_req(ep, THOR_PACKET_SIZE); if (!req) { - usb_ep_disable(ep); result = -EIO; - goto exit; + goto err_disable_in_ep; } + memset(req->buf, 0, req->length); + req->complete = thor_rx_tx_complete; dev->in_req = req; ep = dev->out_ep; d = ep_desc(gadget, &hs_out_desc, &fs_out_desc); @@ -936,22 +928,34 @@ static int thor_eps_setup(struct usb_function *f) result = usb_ep_enable(ep, d); if (result) - goto exit; + goto err_free_in_req; ep->driver_data = cdev; /* claim */ - req = thor_start_ep(ep); + req = usb_ep_alloc_request(ep, 0); if (!req) { - usb_ep_disable(ep); result = -EIO; - goto exit; + goto err_disable_out_ep; } + req->complete = thor_rx_tx_complete; dev->out_req = req; /* ACM control EP */ ep = dev->int_ep; ep->driver_data = cdev; /* claim */ - exit: + return 0; + + err_disable_out_ep: + usb_ep_disable(dev->out_ep); + + err_free_in_req: + free_ep_req(dev->in_ep, dev->in_req); + dev->in_req = NULL; + + err_disable_in_ep: + usb_ep_disable(dev->in_ep); + + err: return result; } diff --git a/drivers/usb/gadget/f_thor.h b/drivers/usb/gadget/f_thor.h index 47abc8aebd5..8ba3fa21b73 100644 --- a/drivers/usb/gadget/f_thor.h +++ b/drivers/usb/gadget/f_thor.h @@ -34,7 +34,7 @@ struct usb_cdc_attribute_vendor_descriptor { __u8 DAUValue; } __packed; -#define VER_PROTOCOL_MAJOR 4 +#define VER_PROTOCOL_MAJOR 5 #define VER_PROTOCOL_MINOR 0 enum rqt { diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 3455e8113bb..b4dd005651c 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -75,6 +75,7 @@ config USB_XHCI_STI config USB_XHCI_ZYNQMP bool "Support for Xilinx ZynqMP on-chip xHCI USB controller" depends on ARCH_ZYNQMP + depends on DM_USB help Enables support for the on-chip xHCI controller on Xilinx ZynqMP SoCs. diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c index 1297fdb6a71..360efc91160 100644 --- a/drivers/usb/host/ehci-sunxi.c +++ b/drivers/usb/host/ehci-sunxi.c @@ -11,34 +11,62 @@ #include <common.h> #include <asm/arch/clock.h> -#include <asm/arch/usb_phy.h> #include <asm/io.h> #include <dm.h> #include "ehci.h" +#include <generic-phy.h> #ifdef CONFIG_SUNXI_GEN_SUN4I -#define BASE_DIST 0x8000 #define AHB_CLK_DIST 2 #else -#define BASE_DIST 0x1000 #define AHB_CLK_DIST 1 #endif struct ehci_sunxi_priv { struct ehci_ctrl ehci; + struct sunxi_ccm_reg *ccm; int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */ - int phy_index; /* Index of the usb-phy attached to this hcd */ + struct phy phy; }; static int ehci_usb_probe(struct udevice *dev) { - struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; struct usb_platdata *plat = dev_get_platdata(dev); struct ehci_sunxi_priv *priv = dev_get_priv(dev); struct ehci_hccr *hccr = (struct ehci_hccr *)devfdt_get_addr(dev); struct ehci_hcor *hcor; int extra_ahb_gate_mask = 0; + int phys, ret; + priv->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; + if (IS_ERR(priv->ccm)) + return PTR_ERR(priv->ccm); + + phys = dev_count_phandle_with_args(dev, "phys", "#phy-cells"); + if (phys < 0) { + phys = 0; + goto no_phy; + } + + ret = generic_phy_get_by_name(dev, "usb", &priv->phy); + if (ret) { + pr_err("failed to get %s usb PHY\n", dev->name); + return ret; + } + + ret = generic_phy_init(&priv->phy); + if (ret) { + pr_err("failed to init %s USB PHY\n", dev->name); + return ret; + } + + ret = generic_phy_power_on(&priv->phy); + if (ret) { + pr_err("failed to power on %s USB PHY\n", dev->name); + return ret; + } + +no_phy: /* * This should go away once we've moved to the driver model for * clocks resp. phys. @@ -47,21 +75,16 @@ static int ehci_usb_probe(struct udevice *dev) #if defined(CONFIG_MACH_SUNXI_H3_H5) || defined(CONFIG_MACH_SUN50I) extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_OHCI0; #endif - priv->phy_index = ((uintptr_t)hccr - SUNXI_USB1_BASE) / BASE_DIST; - priv->ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST; - extra_ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST; - priv->phy_index++; /* Non otg phys start at 1 */ + priv->ahb_gate_mask <<= phys * AHB_CLK_DIST; + extra_ahb_gate_mask <<= phys * AHB_CLK_DIST; - setbits_le32(&ccm->ahb_gate0, + setbits_le32(&priv->ccm->ahb_gate0, priv->ahb_gate_mask | extra_ahb_gate_mask); #ifdef CONFIG_SUNXI_GEN_SUN6I - setbits_le32(&ccm->ahb_reset0_cfg, + setbits_le32(&priv->ccm->ahb_reset0_cfg, priv->ahb_gate_mask | extra_ahb_gate_mask); #endif - sunxi_usb_phy_init(priv->phy_index); - sunxi_usb_phy_power_on(priv->phy_index); - hcor = (struct ehci_hcor *)((uintptr_t)hccr + HC_LENGTH(ehci_readl(&hccr->cr_capbase))); @@ -70,20 +93,25 @@ static int ehci_usb_probe(struct udevice *dev) static int ehci_usb_remove(struct udevice *dev) { - struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; struct ehci_sunxi_priv *priv = dev_get_priv(dev); int ret; + if (generic_phy_valid(&priv->phy)) { + ret = generic_phy_exit(&priv->phy); + if (ret) { + pr_err("failed to exit %s USB PHY\n", dev->name); + return ret; + } + } + ret = ehci_deregister(dev); if (ret) return ret; - sunxi_usb_phy_exit(priv->phy_index); - #ifdef CONFIG_SUNXI_GEN_SUN6I - clrbits_le32(&ccm->ahb_reset0_cfg, priv->ahb_gate_mask); + clrbits_le32(&priv->ccm->ahb_reset0_cfg, priv->ahb_gate_mask); #endif - clrbits_le32(&ccm->ahb_gate0, priv->ahb_gate_mask); + clrbits_le32(&priv->ccm->ahb_gate0, priv->ahb_gate_mask); return 0; } diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c index b78fad29a35..ce2b47a5c4b 100644 --- a/drivers/usb/host/ohci-sunxi.c +++ b/drivers/usb/host/ohci-sunxi.c @@ -10,35 +10,63 @@ #include <common.h> #include <asm/arch/clock.h> -#include <asm/arch/usb_phy.h> #include <asm/io.h> #include <dm.h> #include <usb.h> #include "ohci.h" +#include <generic-phy.h> #ifdef CONFIG_SUNXI_GEN_SUN4I -#define BASE_DIST 0x8000 #define AHB_CLK_DIST 2 #else -#define BASE_DIST 0x1000 #define AHB_CLK_DIST 1 #endif struct ohci_sunxi_priv { + struct sunxi_ccm_reg *ccm; ohci_t ohci; int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */ int usb_gate_mask; /* Mask of usb_clk_cfg clk gate bits for this hcd */ - int phy_index; /* Index of the usb-phy attached to this hcd */ + struct phy phy; }; static int ohci_usb_probe(struct udevice *dev) { - struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; struct usb_bus_priv *bus_priv = dev_get_uclass_priv(dev); struct ohci_sunxi_priv *priv = dev_get_priv(dev); struct ohci_regs *regs = (struct ohci_regs *)devfdt_get_addr(dev); int extra_ahb_gate_mask = 0; + int phys, ret; + priv->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; + if (IS_ERR(priv->ccm)) + return PTR_ERR(priv->ccm); + + phys = dev_count_phandle_with_args(dev, "phys", "#phy-cells"); + if (phys < 0) { + phys = 0; + goto no_phy; + } + + ret = generic_phy_get_by_name(dev, "usb", &priv->phy); + if (ret) { + pr_err("failed to get %s usb PHY\n", dev->name); + return ret; + } + + ret = generic_phy_init(&priv->phy); + if (ret) { + pr_err("failed to init %s USB PHY\n", dev->name); + return ret; + } + + ret = generic_phy_power_on(&priv->phy); + if (ret) { + pr_err("failed to power on %s USB PHY\n", dev->name); + return ret; + } + +no_phy: bus_priv->companion = true; /* @@ -50,43 +78,43 @@ static int ohci_usb_probe(struct udevice *dev) extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0; #endif priv->usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK; - priv->phy_index = ((uintptr_t)regs - (SUNXI_USB1_BASE + 0x400)) / BASE_DIST; - priv->ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST; - extra_ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST; - priv->usb_gate_mask <<= priv->phy_index; - priv->phy_index++; /* Non otg phys start at 1 */ + priv->ahb_gate_mask <<= phys * AHB_CLK_DIST; + extra_ahb_gate_mask <<= phys * AHB_CLK_DIST; + priv->usb_gate_mask <<= phys; - setbits_le32(&ccm->ahb_gate0, + setbits_le32(&priv->ccm->ahb_gate0, priv->ahb_gate_mask | extra_ahb_gate_mask); - setbits_le32(&ccm->usb_clk_cfg, priv->usb_gate_mask); + setbits_le32(&priv->ccm->usb_clk_cfg, priv->usb_gate_mask); #ifdef CONFIG_SUNXI_GEN_SUN6I - setbits_le32(&ccm->ahb_reset0_cfg, + setbits_le32(&priv->ccm->ahb_reset0_cfg, priv->ahb_gate_mask | extra_ahb_gate_mask); #endif - sunxi_usb_phy_init(priv->phy_index); - sunxi_usb_phy_power_on(priv->phy_index); - return ohci_register(dev, regs); } static int ohci_usb_remove(struct udevice *dev) { - struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; struct ohci_sunxi_priv *priv = dev_get_priv(dev); int ret; + if (generic_phy_valid(&priv->phy)) { + ret = generic_phy_exit(&priv->phy); + if (ret) { + pr_err("failed to exit %s USB PHY\n", dev->name); + return ret; + } + } + ret = ohci_deregister(dev); if (ret) return ret; - sunxi_usb_phy_exit(priv->phy_index); - #ifdef CONFIG_SUNXI_GEN_SUN6I - clrbits_le32(&ccm->ahb_reset0_cfg, priv->ahb_gate_mask); + clrbits_le32(&priv->ccm->ahb_reset0_cfg, priv->ahb_gate_mask); #endif - clrbits_le32(&ccm->usb_clk_cfg, priv->usb_gate_mask); - clrbits_le32(&ccm->ahb_gate0, priv->ahb_gate_mask); + clrbits_le32(&priv->ccm->usb_clk_cfg, priv->usb_gate_mask); + clrbits_le32(&priv->ccm->ahb_gate0, priv->ahb_gate_mask); return 0; } diff --git a/drivers/usb/host/xhci-rcar.c b/drivers/usb/host/xhci-rcar.c index a837afc483b..f2e91ef0feb 100644 --- a/drivers/usb/host/xhci-rcar.c +++ b/drivers/usb/host/xhci-rcar.c @@ -117,12 +117,15 @@ err_clk: static int xhci_rcar_deregister(struct udevice *dev) { + int ret; struct rcar_xhci_platdata *plat = dev_get_platdata(dev); + ret = xhci_deregister(dev); + clk_disable(&plat->clk); clk_free(&plat->clk); - return xhci_deregister(dev); + return ret; } static int xhci_rcar_ofdata_to_platdata(struct udevice *dev) diff --git a/drivers/usb/host/xhci-rockchip.c b/drivers/usb/host/xhci-rockchip.c index 060a6c43092..f19bea3a91b 100644 --- a/drivers/usb/host/xhci-rockchip.c +++ b/drivers/usb/host/xhci-rockchip.c @@ -17,7 +17,6 @@ struct rockchip_xhci_platdata { fdt_addr_t hcd_base; - fdt_addr_t phy_base; struct udevice *vbus_supply; }; @@ -35,7 +34,6 @@ struct rockchip_xhci { static int xhci_usb_ofdata_to_platdata(struct udevice *dev) { struct rockchip_xhci_platdata *plat = dev_get_platdata(dev); - struct udevice *child; int ret = 0; /* @@ -47,20 +45,6 @@ static int xhci_usb_ofdata_to_platdata(struct udevice *dev) return -ENXIO; } - /* Get the base address for usbphy from the device node */ - for (device_find_first_child(dev, &child); child; - device_find_next_child(&child)) { - if (!device_is_compatible(child, "rockchip,rk3399-usb3-phy")) - continue; - plat->phy_base = devfdt_get_addr(child); - break; - } - - if (plat->phy_base == FDT_ADDR_T_NONE) { - pr_err("Can't get the usbphy register address\n"); - return -ENXIO; - } - /* Vbus regulator */ ret = device_get_supply_regulator(dev, "vbus-supply", &plat->vbus_supply); diff --git a/drivers/usb/host/xhci-zynqmp.c b/drivers/usb/host/xhci-zynqmp.c index 1723d2f6862..e44e1ae1d91 100644 --- a/drivers/usb/host/xhci-zynqmp.c +++ b/drivers/usb/host/xhci-zynqmp.c @@ -10,9 +10,10 @@ */ #include <common.h> +#include <dm.h> #include <usb.h> #include <linux/errno.h> -#include <asm/arch-zynqmp/hardware.h> +#include <asm/arch/hardware.h> #include <linux/compat.h> #include <linux/usb/dwc3.h> #include "xhci.h" @@ -54,13 +55,15 @@ #define USBOTGSS_IRQ_SET_1_DMADISABLECLR_EN BIT(17) struct zynqmp_xhci { + struct usb_platdata usb_plat; + struct xhci_ctrl ctrl; struct xhci_hccr *hcd; struct dwc3 *dwc3_reg; }; -static struct zynqmp_xhci zynqmp_xhci; - -unsigned long ctr_addr[] = CONFIG_ZYNQMP_XHCI_LIST; +struct zynqmp_xhci_platdata { + fdt_addr_t hcd_base; +}; static int zynqmp_xhci_core_init(struct zynqmp_xhci *zynqmp_xhci) { @@ -78,46 +81,66 @@ static int zynqmp_xhci_core_init(struct zynqmp_xhci *zynqmp_xhci) return ret; } -int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor) +void xhci_hcd_stop(int index) { - struct zynqmp_xhci *ctx = &zynqmp_xhci; - int ret = 0; - uint32_t hclen; + /* + * Currently zynqmp socs do not support PHY shutdown from + * sw. But this support may be added in future socs. + */ - if (index < 0 || index >= ARRAY_SIZE(ctr_addr)) - return -EINVAL; + return; +} - ctx->hcd = (struct xhci_hccr *)ctr_addr[index]; - ctx->dwc3_reg = (struct dwc3 *)((void *)ctx->hcd + DWC3_REG_OFFSET); +static int xhci_usb_probe(struct udevice *dev) +{ + struct zynqmp_xhci_platdata *plat = dev_get_platdata(dev); + struct zynqmp_xhci *ctx = dev_get_priv(dev); + struct xhci_hcor *hcor; + int ret; - ret = board_usb_init(index, USB_INIT_HOST); - if (ret != 0) { - puts("Failed to initialize board for USB\n"); - return ret; - } + ctx->hcd = (struct xhci_hccr *)plat->hcd_base; + ctx->dwc3_reg = (struct dwc3 *)((char *)(ctx->hcd) + DWC3_REG_OFFSET); ret = zynqmp_xhci_core_init(ctx); - if (ret < 0) { - puts("Failed to initialize xhci\n"); - return ret; + if (ret) { + puts("XHCI: failed to initialize controller\n"); + return -EINVAL; } - *hccr = (struct xhci_hccr *)ctx->hcd; - hclen = HC_LENGTH(xhci_readl(&(*hccr)->cr_capbase)); - *hcor = (struct xhci_hcor *)((uintptr_t) *hccr + hclen); + hcor = (struct xhci_hcor *)((ulong)ctx->hcd + + HC_LENGTH(xhci_readl(&ctx->hcd->cr_capbase))); - debug("zynqmp-xhci: init hccr %p and hcor %p hc_length %d\n", - *hccr, *hcor, hclen); + return xhci_register(dev, ctx->hcd, hcor); +} - return ret; +static int xhci_usb_remove(struct udevice *dev) +{ + return xhci_deregister(dev); } -void xhci_hcd_stop(int index) +static int xhci_usb_ofdata_to_platdata(struct udevice *dev) { - /* - * Currently zynqmp socs do not support PHY shutdown from - * sw. But this support may be added in future socs. - */ + struct zynqmp_xhci_platdata *plat = dev_get_platdata(dev); + const void *blob = gd->fdt_blob; + + /* Get the base address for XHCI controller from the device node */ + plat->hcd_base = fdtdec_get_addr(blob, dev_of_offset(dev), "reg"); + if (plat->hcd_base == FDT_ADDR_T_NONE) { + debug("Can't get the XHCI register base address\n"); + return -ENXIO; + } - return; + return 0; } + +U_BOOT_DRIVER(dwc3_generic_host) = { + .name = "dwc3-generic-host", + .id = UCLASS_USB, + .ofdata_to_platdata = xhci_usb_ofdata_to_platdata, + .probe = xhci_usb_probe, + .remove = xhci_usb_remove, + .ops = &xhci_usb_ops, + .platdata_auto_alloc_size = sizeof(struct zynqmp_xhci_platdata), + .priv_auto_alloc_size = sizeof(struct zynqmp_xhci), + .flags = DM_FLAG_ALLOC_PRIV_DMA, +}; diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c index 3adb0028f2a..9ded14cc3cb 100644 --- a/drivers/usb/host/xhci.c +++ b/drivers/usb/host/xhci.c @@ -536,7 +536,7 @@ static int xhci_set_configuration(struct usb_device *udev) /* slot context */ xhci_slot_copy(ctrl, in_ctx, out_ctx); slot_ctx = xhci_get_slot_ctx(ctrl, in_ctx); - slot_ctx->dev_info &= ~(LAST_CTX_MASK); + slot_ctx->dev_info &= ~(cpu_to_le32(LAST_CTX_MASK)); slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(max_ep_flag + 1) | 0); xhci_endpoint_copy(ctrl, in_ctx, out_ctx, 0); @@ -1424,7 +1424,7 @@ static int xhci_update_hub_device(struct udevice *dev, struct usb_device *udev) ctrl_ctx = xhci_get_input_control_ctx(in_ctx); /* Initialize the input context control */ - ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG); + ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG); ctrl_ctx->drop_flags = 0; xhci_inval_cache((uintptr_t)out_ctx->bytes, out_ctx->size); @@ -1435,8 +1435,15 @@ static int xhci_update_hub_device(struct udevice *dev, struct usb_device *udev) /* Update hub related fields */ slot_ctx->dev_info |= cpu_to_le32(DEV_HUB); - if (hub->tt.multi && udev->speed == USB_SPEED_HIGH) + /* + * refer to section 6.2.2: MTT should be 0 for full speed hub, + * but it may be already set to 1 when setup an xHCI virtual + * device, so clear it anyway. + */ + if (hub->tt.multi) slot_ctx->dev_info |= cpu_to_le32(DEV_MTT); + else if (udev->speed == USB_SPEED_FULL) + slot_ctx->dev_info &= cpu_to_le32(~DEV_MTT); slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(udev->maxchild)); /* * Set TT think time - convert from ns to FS bit times. @@ -1452,6 +1459,7 @@ static int xhci_update_hub_device(struct udevice *dev, struct usb_device *udev) think_time = (think_time / 666) - 1; if (udev->speed == USB_SPEED_HIGH) slot_ctx->tt_info |= cpu_to_le32(TT_THINK_TIME(think_time)); + slot_ctx->dev_state = 0; return xhci_configure_endpoints(udev, false); } diff --git a/drivers/usb/musb-new/musb_core.h b/drivers/usb/musb-new/musb_core.h index fa4cf86c79b..821d0e06f61 100644 --- a/drivers/usb/musb-new/musb_core.h +++ b/drivers/usb/musb-new/musb_core.h @@ -200,6 +200,8 @@ enum musb_g_ep0_state { * @vbus_status: returns vbus status if possible * @set_vbus: forces vbus status * @adjust_channel_params: pre check for standard dma channel_program func + * @pre_root_reset_end: called before the root usb port reset flag gets cleared + * @post_root_reset_end: called after the root usb port reset flag gets cleared */ struct musb_platform_ops { int (*init)(struct musb *musb); @@ -221,6 +223,8 @@ struct musb_platform_ops { int (*adjust_channel_params)(struct dma_channel *channel, u16 packet_sz, u8 *mode, dma_addr_t *dma_addr, u32 *len); + void (*pre_root_reset_end)(struct musb *musb); + void (*post_root_reset_end)(struct musb *musb); }; /* diff --git a/drivers/usb/musb-new/musb_regs.h b/drivers/usb/musb-new/musb_regs.h index ab0d98e7c48..c4d7203b851 100644 --- a/drivers/usb/musb-new/musb_regs.h +++ b/drivers/usb/musb-new/musb_regs.h @@ -431,7 +431,8 @@ static inline u8 musb_read_ulpi_buscontrol(void __iomem *mbase) static inline u8 musb_read_configdata(void __iomem *mbase) { -#if defined CONFIG_MACH_SUN8I_A33 || defined CONFIG_MACH_SUN8I_A83T +#if defined CONFIG_MACH_SUN8I_A33 || defined CONFIG_MACH_SUN8I_A83T || \ + defined CONFIG_MACH_SUNXI_H3_H5 || defined CONFIG_MACH_SUN50I /* <Sigh> allwinner saves a reg, and we need to hardcode this */ return 0xde; #else diff --git a/drivers/usb/musb-new/musb_uboot.c b/drivers/usb/musb-new/musb_uboot.c index 8662c0ff707..2b04fbd046e 100644 --- a/drivers/usb/musb-new/musb_uboot.c +++ b/drivers/usb/musb-new/musb_uboot.c @@ -1,9 +1,6 @@ #include <common.h> #include <console.h> #include <watchdog.h> -#ifdef CONFIG_ARCH_SUNXI -#include <asm/arch/usb_phy.h> -#endif #include <linux/errno.h> #include <linux/usb/ch9.h> #include <linux/usb/gadget.h> @@ -193,19 +190,16 @@ static int _musb_reset_root_port(struct musb_host_data *host, power &= 0xf0; musb_writeb(mbase, MUSB_POWER, MUSB_POWER_RESET | power); mdelay(50); -#ifdef CONFIG_ARCH_SUNXI - /* - * sunxi phy has a bug and it will wrongly detect high speed squelch - * when clearing reset on low-speed devices, temporary disable - * squelch detection to work around this. - */ - sunxi_usb_phy_enable_squelch_detect(0, 0); -#endif + + if (host->host->ops->pre_root_reset_end) + host->host->ops->pre_root_reset_end(host->host); + power = musb_readb(mbase, MUSB_POWER); musb_writeb(mbase, MUSB_POWER, ~MUSB_POWER_RESET & power); -#ifdef CONFIG_ARCH_SUNXI - sunxi_usb_phy_enable_squelch_detect(0, 1); -#endif + + if (host->host->ops->post_root_reset_end) + host->host->ops->post_root_reset_end(host->host); + host->host->isr(0, host->host); host->host_speed = (musb_readb(mbase, MUSB_POWER) & MUSB_POWER_HSMODE) ? USB_SPEED_HIGH : diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c index f55368b6016..08de9c69c71 100644 --- a/drivers/usb/musb-new/sunxi.c +++ b/drivers/usb/musb-new/sunxi.c @@ -17,10 +17,11 @@ */ #include <common.h> #include <dm.h> +#include <generic-phy.h> +#include <phy-sun4i-usb.h> #include <asm/arch/cpu.h> #include <asm/arch/clock.h> #include <asm/arch/gpio.h> -#include <asm/arch/usb_phy.h> #include <asm-generic/gpio.h> #include <dm/lists.h> #include <dm/root.h> @@ -75,13 +76,28 @@ * From usbc/usbc.c ******************************************************************************/ +struct sunxi_musb_config { + struct musb_hdrc_config *config; + u8 rst_bit; + u8 clkgate_bit; +}; + +struct sunxi_glue { + struct musb_host_data mdata; + struct sunxi_ccm_reg *ccm; + struct sunxi_musb_config *cfg; + struct device dev; + struct phy *phy; +}; +#define to_sunxi_glue(d) container_of(d, struct sunxi_glue, dev) + static u32 USBC_WakeUp_ClearChangeDetect(u32 reg_val) { u32 temp = reg_val; - temp &= ~(1 << USBC_BP_ISCR_VBUS_CHANGE_DETECT); - temp &= ~(1 << USBC_BP_ISCR_ID_CHANGE_DETECT); - temp &= ~(1 << USBC_BP_ISCR_DPDM_CHANGE_DETECT); + temp &= ~BIT(USBC_BP_ISCR_VBUS_CHANGE_DETECT); + temp &= ~BIT(USBC_BP_ISCR_ID_CHANGE_DETECT); + temp &= ~BIT(USBC_BP_ISCR_DPDM_CHANGE_DETECT); return temp; } @@ -91,7 +107,7 @@ static void USBC_EnableIdPullUp(__iomem void *base) u32 reg_val; reg_val = musb_readl(base, USBC_REG_o_ISCR); - reg_val |= (1 << USBC_BP_ISCR_ID_PULLUP_EN); + reg_val |= BIT(USBC_BP_ISCR_ID_PULLUP_EN); reg_val = USBC_WakeUp_ClearChangeDetect(reg_val); musb_writel(base, USBC_REG_o_ISCR, reg_val); } @@ -101,7 +117,7 @@ static void USBC_EnableDpDmPullUp(__iomem void *base) u32 reg_val; reg_val = musb_readl(base, USBC_REG_o_ISCR); - reg_val |= (1 << USBC_BP_ISCR_DPDM_PULLUP_EN); + reg_val |= BIT(USBC_BP_ISCR_DPDM_PULLUP_EN); reg_val = USBC_WakeUp_ClearChangeDetect(reg_val); musb_writel(base, USBC_REG_o_ISCR, reg_val); } @@ -157,7 +173,7 @@ static void USBC_ConfigFIFO_Base(void) /* config usb fifo, 8kb mode */ reg_value = readl(SUNXI_SRAMC_BASE + 0x04); reg_value &= ~(0x03 << 0); - reg_value |= (1 << 0); + reg_value |= BIT(0); writel(reg_value, SUNXI_SRAMC_BASE + 0x04); } @@ -204,6 +220,7 @@ static bool enabled = false; static int sunxi_musb_enable(struct musb *musb) { + struct sunxi_glue *glue = to_sunxi_glue(musb->controller); int ret; pr_debug("%s():\n", __func__); @@ -218,17 +235,23 @@ static int sunxi_musb_enable(struct musb *musb) musb_writeb(musb->mregs, USBC_REG_o_VEND0, 0); if (is_host_enabled(musb)) { - ret = sunxi_usb_phy_vbus_detect(0); + ret = sun4i_usb_phy_vbus_detect(glue->phy); if (ret == 1) { printf("A charger is plugged into the OTG: "); return -ENODEV; } - ret = sunxi_usb_phy_id_detect(0); + + ret = sun4i_usb_phy_id_detect(glue->phy); if (ret == 1) { printf("No host cable detected: "); return -ENODEV; } - sunxi_usb_phy_power_on(0); /* port power on */ + + ret = generic_phy_power_on(glue->phy); + if (ret) { + pr_err("failed to power on USB PHY\n"); + return ret; + } } USBC_ForceVbusValidToHigh(musb->mregs); @@ -239,13 +262,21 @@ static int sunxi_musb_enable(struct musb *musb) static void sunxi_musb_disable(struct musb *musb) { + struct sunxi_glue *glue = to_sunxi_glue(musb->controller); + int ret; + pr_debug("%s():\n", __func__); if (!enabled) return; - if (is_host_enabled(musb)) - sunxi_usb_phy_power_off(0); /* port power off */ + if (is_host_enabled(musb)) { + ret = generic_phy_power_off(glue->phy); + if (ret) { + pr_err("failed to power off USB PHY\n"); + return; + } + } USBC_ForceVbusValidToLow(musb->mregs); mdelay(200); /* Wait for the current session to timeout */ @@ -255,17 +286,29 @@ static void sunxi_musb_disable(struct musb *musb) static int sunxi_musb_init(struct musb *musb) { - struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; + struct sunxi_glue *glue = to_sunxi_glue(musb->controller); + int ret; pr_debug("%s():\n", __func__); + ret = generic_phy_init(glue->phy); + if (ret) { + pr_err("failed to init USB PHY\n"); + return ret; + } + musb->isr = sunxi_musb_interrupt; - setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0); + setbits_le32(&glue->ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_USB0)); + if (glue->cfg->clkgate_bit) + setbits_le32(&glue->ccm->ahb_gate0, + BIT(glue->cfg->clkgate_bit)); #ifdef CONFIG_SUNXI_GEN_SUN6I - setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0); + setbits_le32(&glue->ccm->ahb_reset0_cfg, BIT(AHB_GATE_OFFSET_USB0)); + if (glue->cfg->rst_bit) + setbits_le32(&glue->ccm->ahb_reset0_cfg, + BIT(glue->cfg->rst_bit)); #endif - sunxi_usb_phy_init(0); USBC_ConfigFIFO_Base(); USBC_EnableDpDmPullUp(musb->mregs); @@ -283,44 +326,116 @@ static int sunxi_musb_init(struct musb *musb) return 0; } +static void sunxi_musb_pre_root_reset_end(struct musb *musb) +{ + struct sunxi_glue *glue = to_sunxi_glue(musb->controller); + + sun4i_usb_phy_set_squelch_detect(glue->phy, false); +} + +static void sunxi_musb_post_root_reset_end(struct musb *musb) +{ + struct sunxi_glue *glue = to_sunxi_glue(musb->controller); + + sun4i_usb_phy_set_squelch_detect(glue->phy, true); +} + static const struct musb_platform_ops sunxi_musb_ops = { .init = sunxi_musb_init, .enable = sunxi_musb_enable, .disable = sunxi_musb_disable, + .pre_root_reset_end = sunxi_musb_pre_root_reset_end, + .post_root_reset_end = sunxi_musb_post_root_reset_end, +}; + +/* Allwinner OTG supports up to 5 endpoints */ +#define SUNXI_MUSB_MAX_EP_NUM 6 +#define SUNXI_MUSB_RAM_BITS 11 + +static struct musb_fifo_cfg sunxi_musb_mode_cfg[] = { + MUSB_EP_FIFO_SINGLE(1, FIFO_TX, 512), + MUSB_EP_FIFO_SINGLE(1, FIFO_RX, 512), + MUSB_EP_FIFO_SINGLE(2, FIFO_TX, 512), + MUSB_EP_FIFO_SINGLE(2, FIFO_RX, 512), + MUSB_EP_FIFO_SINGLE(3, FIFO_TX, 512), + MUSB_EP_FIFO_SINGLE(3, FIFO_RX, 512), + MUSB_EP_FIFO_SINGLE(4, FIFO_TX, 512), + MUSB_EP_FIFO_SINGLE(4, FIFO_RX, 512), + MUSB_EP_FIFO_SINGLE(5, FIFO_TX, 512), + MUSB_EP_FIFO_SINGLE(5, FIFO_RX, 512), +}; + +/* H3/V3s OTG supports only 4 endpoints */ +#define SUNXI_MUSB_MAX_EP_NUM_H3 5 + +static struct musb_fifo_cfg sunxi_musb_mode_cfg_h3[] = { + MUSB_EP_FIFO_SINGLE(1, FIFO_TX, 512), + MUSB_EP_FIFO_SINGLE(1, FIFO_RX, 512), + MUSB_EP_FIFO_SINGLE(2, FIFO_TX, 512), + MUSB_EP_FIFO_SINGLE(2, FIFO_RX, 512), + MUSB_EP_FIFO_SINGLE(3, FIFO_TX, 512), + MUSB_EP_FIFO_SINGLE(3, FIFO_RX, 512), + MUSB_EP_FIFO_SINGLE(4, FIFO_TX, 512), + MUSB_EP_FIFO_SINGLE(4, FIFO_RX, 512), }; static struct musb_hdrc_config musb_config = { - .multipoint = 1, - .dyn_fifo = 1, - .num_eps = 6, - .ram_bits = 11, + .fifo_cfg = sunxi_musb_mode_cfg, + .fifo_cfg_size = ARRAY_SIZE(sunxi_musb_mode_cfg), + .multipoint = true, + .dyn_fifo = true, + .num_eps = SUNXI_MUSB_MAX_EP_NUM, + .ram_bits = SUNXI_MUSB_RAM_BITS, }; -static struct musb_hdrc_platform_data musb_plat = { -#if defined(CONFIG_USB_MUSB_HOST) - .mode = MUSB_HOST, -#else - .mode = MUSB_PERIPHERAL, -#endif - .config = &musb_config, - .power = 250, - .platform_ops = &sunxi_musb_ops, +static struct musb_hdrc_config musb_config_h3 = { + .fifo_cfg = sunxi_musb_mode_cfg_h3, + .fifo_cfg_size = ARRAY_SIZE(sunxi_musb_mode_cfg_h3), + .multipoint = true, + .dyn_fifo = true, + .soft_con = true, + .num_eps = SUNXI_MUSB_MAX_EP_NUM_H3, + .ram_bits = SUNXI_MUSB_RAM_BITS, }; static int musb_usb_probe(struct udevice *dev) { - struct musb_host_data *host = dev_get_priv(dev); + struct sunxi_glue *glue = dev_get_priv(dev); + struct musb_host_data *host = &glue->mdata; struct usb_bus_priv *priv = dev_get_uclass_priv(dev); + struct musb_hdrc_platform_data pdata; void *base = dev_read_addr_ptr(dev); + struct phy phy; int ret; if (!base) return -EINVAL; + glue->cfg = (struct sunxi_musb_config *)dev_get_driver_data(dev); + if (!glue->cfg) + return -EINVAL; + + glue->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; + if (IS_ERR(glue->ccm)) + return PTR_ERR(glue->ccm); + + ret = generic_phy_get_by_name(dev, "usb", &phy); + if (ret) { + pr_err("failed to get usb PHY\n"); + return ret; + } + + glue->phy = &phy; priv->desc_before_addr = true; + memset(&pdata, 0, sizeof(pdata)); + pdata.power = 250; + pdata.platform_ops = &sunxi_musb_ops; + pdata.config = glue->cfg->config; + #ifdef CONFIG_USB_MUSB_HOST - host->host = musb_init_controller(&musb_plat, NULL, base); + pdata.mode = MUSB_HOST; + host->host = musb_init_controller(&pdata, &glue->dev, base); if (!host->host) return -EIO; @@ -328,7 +443,8 @@ static int musb_usb_probe(struct udevice *dev) if (!ret) printf("Allwinner mUSB OTG (Host)\n"); #else - ret = musb_register(&musb_plat, NULL, base); + pdata.mode = MUSB_PERIPHERAL; + ret = musb_register(&pdata, &glue->dev, base); if (!ret) printf("Allwinner mUSB OTG (Peripheral)\n"); #endif @@ -338,16 +454,30 @@ static int musb_usb_probe(struct udevice *dev) static int musb_usb_remove(struct udevice *dev) { - struct musb_host_data *host = dev_get_priv(dev); - struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; + struct sunxi_glue *glue = dev_get_priv(dev); + struct musb_host_data *host = &glue->mdata; + int ret; + + if (generic_phy_valid(glue->phy)) { + ret = generic_phy_exit(glue->phy); + if (ret) { + pr_err("failed to exit %s USB PHY\n", dev->name); + return ret; + } + } musb_stop(host->host); - sunxi_usb_phy_exit(0); #ifdef CONFIG_SUNXI_GEN_SUN6I - clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0); + clrbits_le32(&glue->ccm->ahb_reset0_cfg, BIT(AHB_GATE_OFFSET_USB0)); + if (glue->cfg->rst_bit) + clrbits_le32(&glue->ccm->ahb_reset0_cfg, + BIT(glue->cfg->rst_bit)); #endif - clrbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0); + clrbits_le32(&glue->ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_USB0)); + if (glue->cfg->clkgate_bit) + clrbits_le32(&glue->ccm->ahb_gate0, + BIT(glue->cfg->clkgate_bit)); free(host->host); host->host = NULL; @@ -355,11 +485,25 @@ static int musb_usb_remove(struct udevice *dev) return 0; } +static const struct sunxi_musb_config sun4i_a10_cfg = { + .config = &musb_config, +}; + +static const struct sunxi_musb_config sun8i_h3_cfg = { + .config = &musb_config_h3, + .rst_bit = 23, + .clkgate_bit = 23, +}; + static const struct udevice_id sunxi_musb_ids[] = { - { .compatible = "allwinner,sun4i-a10-musb" }, - { .compatible = "allwinner,sun6i-a31-musb" }, - { .compatible = "allwinner,sun8i-a33-musb" }, - { .compatible = "allwinner,sun8i-h3-musb" }, + { .compatible = "allwinner,sun4i-a10-musb", + .data = (ulong)&sun4i_a10_cfg }, + { .compatible = "allwinner,sun6i-a31-musb", + .data = (ulong)&sun4i_a10_cfg }, + { .compatible = "allwinner,sun8i-a33-musb", + .data = (ulong)&sun4i_a10_cfg }, + { .compatible = "allwinner,sun8i-h3-musb", + .data = (ulong)&sun8i_h3_cfg }, { } }; @@ -377,5 +521,5 @@ U_BOOT_DRIVER(usb_musb) = { .ops = &musb_usb_ops, #endif .platdata_auto_alloc_size = sizeof(struct usb_platdata), - .priv_auto_alloc_size = sizeof(struct musb_host_data), + .priv_auto_alloc_size = sizeof(struct sunxi_glue), }; diff --git a/drivers/video/sunxi/sunxi_de2.c b/drivers/video/sunxi/sunxi_de2.c index a2303db9af5..4ed035d556a 100644 --- a/drivers/video/sunxi/sunxi_de2.c +++ b/drivers/video/sunxi/sunxi_de2.c @@ -9,6 +9,7 @@ #include <display.h> #include <dm.h> #include <edid.h> +#include <efi_loader.h> #include <fdtdec.h> #include <fdt_support.h> #include <video.h> @@ -221,6 +222,13 @@ static int sunxi_de2_init(struct udevice *dev, ulong fbbase, uc_priv->bpix = l2bpp; debug("fb=%lx, size=%d %d\n", fbbase, uc_priv->xsize, uc_priv->ysize); +#ifdef CONFIG_EFI_LOADER + efi_add_memory_map(fbbase, + ALIGN(timing.hactive.typ * timing.vactive.typ * + (1 << l2bpp) / 8, EFI_PAGE_SIZE) >> EFI_PAGE_SHIFT, + EFI_RESERVED_MEMORY_TYPE, false); +#endif + return 0; } diff --git a/drivers/watchdog/bcm6345_wdt.c b/drivers/watchdog/bcm6345_wdt.c index 54b02fadd41..e1bd73dfd4d 100644 --- a/drivers/watchdog/bcm6345_wdt.c +++ b/drivers/watchdog/bcm6345_wdt.c @@ -85,15 +85,11 @@ static const struct udevice_id bcm6345_wdt_ids[] = { static int bcm6345_wdt_probe(struct udevice *dev) { struct bcm6345_wdt_priv *priv = dev_get_priv(dev); - fdt_addr_t addr; - fdt_size_t size; - addr = devfdt_get_addr_size_index(dev, 0, &size); - if (addr == FDT_ADDR_T_NONE) + priv->regs = dev_remap_addr(dev); + if (!priv->regs) return -EINVAL; - priv->regs = ioremap(addr, size); - bcm6345_wdt_stop(dev); return 0; diff --git a/drivers/watchdog/cdns_wdt.c b/drivers/watchdog/cdns_wdt.c index 9a07fa10fd9..f7618f86da1 100644 --- a/drivers/watchdog/cdns_wdt.c +++ b/drivers/watchdog/cdns_wdt.c @@ -231,17 +231,16 @@ static int cdns_wdt_probe(struct udevice *dev) static int cdns_wdt_ofdata_to_platdata(struct udevice *dev) { - int node = dev_of_offset(dev); struct cdns_wdt_priv *priv = dev_get_priv(dev); - priv->regs = devfdt_get_addr_ptr(dev); + priv->regs = (struct cdns_regs *)dev_read_addr(dev); if (IS_ERR(priv->regs)) return PTR_ERR(priv->regs); - priv->timeout = fdtdec_get_int(gd->fdt_blob, node, "timeout-sec", - CDNS_WDT_DEFAULT_TIMEOUT); + priv->timeout = dev_read_u32_default(dev, "timeout-sec", + CDNS_WDT_DEFAULT_TIMEOUT); - priv->rst = fdtdec_get_bool(gd->fdt_blob, node, "reset-on-timeout"); + priv->rst = dev_read_bool(dev, "reset-on-timeout"); debug("%s: timeout %d, reset %d\n", __func__, priv->timeout, priv->rst); diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c index 4b36a3e6082..2a28031d14c 100644 --- a/fs/ext4/ext4fs.c +++ b/fs/ext4/ext4fs.c @@ -164,7 +164,7 @@ int ext4fs_read_file(struct ext2fs_node *node, loff_t pos, int ext4fs_ls(const char *dirname) { - struct ext2fs_node *dirnode; + struct ext2fs_node *dirnode = NULL; int status; if (dirname == NULL) @@ -174,7 +174,8 @@ int ext4fs_ls(const char *dirname) FILETYPE_DIRECTORY); if (status != 1) { printf("** Can not find directory. **\n"); - ext4fs_free_node(dirnode, &ext4fs_root->diropen); + if (dirnode) + ext4fs_free_node(dirnode, &ext4fs_root->diropen); return 1; } @@ -265,6 +265,19 @@ static struct fstype_info *fs_get_info(int fstype) return info; } +/** + * fs_get_type_name() - Get type of current filesystem + * + * Return: Pointer to filesystem name + * + * Returns a string describing the current filesystem, or the sentinel + * "unsupported" for any unrecognised filesystem. + */ +const char *fs_get_type_name(void) +{ + return fs_get_info(fs_type)->name; +} + int fs_set_blk_dev(const char *ifname, const char *dev_part_str, int fstype) { struct fstype_info *info; diff --git a/include/asm-generic/unaligned.h b/include/asm-generic/unaligned.h index fd0255099aa..3d33a5a063e 100644 --- a/include/asm-generic/unaligned.h +++ b/include/asm-generic/unaligned.h @@ -20,4 +20,7 @@ #error invalid endian #endif +/* Allow unaligned memory access */ +void allow_unaligned(void); + #endif diff --git a/include/bootm.h b/include/bootm.h index 9e42e179878..0501414e0dc 100644 --- a/include/bootm.h +++ b/include/bootm.h @@ -72,4 +72,12 @@ int bootm_decomp_image(int comp, ulong load, ulong image_start, int type, void *load_buf, void *image_buf, ulong image_len, uint unc_len, ulong *load_end); +/* + * boards should define this to disable devices when EFI exits from boot + * services. + * + * TODO(sjg@chromium.org>): Update this to use driver model's device_remove(). + */ +void board_quiesce_devices(void); + #endif diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h index 8d5feb3ac77..d672e8ebe65 100644 --- a/include/config_distro_bootcmd.h +++ b/include/config_distro_bootcmd.h @@ -99,6 +99,10 @@ #define BOOTEFI_NAME "bootia32.efi" #elif defined(CONFIG_X86_RUN_64BIT) #define BOOTEFI_NAME "bootx64.efi" +#elif defined(CONFIG_CPU_RISCV_32) +#define BOOTEFI_NAME "bootriscv32.efi" +#elif defined(CONFIG_CPU_RISCV_64) +#define BOOTEFI_NAME "bootriscv64.efi" #endif #endif @@ -240,6 +244,7 @@ #if defined(CONFIG_CMD_DHCP) #if defined(CONFIG_EFI_LOADER) +/* http://www.iana.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xml */ #if defined(CONFIG_ARM64) #define BOOTENV_EFI_PXE_ARCH "0xb" #define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:00011:UNDI:003000" @@ -250,6 +255,12 @@ /* Always assume we're running 64bit */ #define BOOTENV_EFI_PXE_ARCH "0x7" #define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:00007:UNDI:003000" +#elif defined(CONFIG_CPU_RISCV_32) +#define BOOTENV_EFI_PXE_ARCH "0x19" +#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:00025:UNDI:003000" +#elif defined(CONFIG_CPU_RISCV_64) +#define BOOTENV_EFI_PXE_ARCH "0x1b" +#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:00027:UNDI:003000" #else #error Please specify an EFI client identifier #endif diff --git a/include/configs/SBx81LIFKW.h b/include/configs/SBx81LIFKW.h new file mode 100644 index 00000000000..bcc2c201d22 --- /dev/null +++ b/include/configs/SBx81LIFKW.h @@ -0,0 +1,119 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2016 Allied Telesis <www.alliedtelesis.co.nz> + */ + +#ifndef _CONFIG_SBX81LIFKW_H +#define _CONFIG_SBX81LIFKW_H + +/* + * High Level Configuration Options (easy to change) + */ +#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ +#define CONFIG_KW88F6281 1 /* SOC Name */ +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ +#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg +#define CONFIG_BUILD_TARGET "u-boot.kwb" + +/* additions for new ARM relocation support */ +#define CONFIG_SYS_SDRAM_BASE 0x00000000 + +#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */ +#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */ +#define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 */ +#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ +#define CONFIG_KIRKWOOD_GPIO 1 + +#define CONFIG_MISC_INIT_R /* call misc_init_r */ + +/* + * NS16550 Configuration + */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK +#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE + +/* + * Serial Port configuration + * The following definitions let you select what serial you want to use + * for your console driver. + */ + +#define CONFIG_CONS_INDEX 1 /*Console on UART0 */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 8 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */ +#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */ + +#define MTDPARTS_DEFAULT "mtdparts=spi0.0:768K(boot)ro,256K(boot-env),14M(user),1M(errlog)" +#define MTDPARTS_MTDOOPS "errlog" +#define CONFIG_DOS_PARTITION + +/* + * Environment variables configurations + */ +#define CONFIG_ENV_SPI_BUS 0 +#define CONFIG_ENV_SPI_CS 0 +#define CONFIG_ENV_SPI_MAX_HZ 20000000 /* 20Mhz */ +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SECT_SIZE 0x40000 /* 256K */ +#define CONFIG_ENV_SIZE 0x02000 +#define CONFIG_ENV_OFFSET 0xc0000 /* env starts here - 768K */ + +/* + * U-Boot bootcode configuration + */ + +#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for monitor */ +#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* Reserve 4.0 MB for malloc */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 8 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Mem map for Linux*/ + +/* size in bytes reserved for initial data */ + +#include <asm/arch/config.h> +/* There is no PHY directly connected so don't ask it for link status */ +#undef CONFIG_SYS_FAULT_ECHO_LINK_DOWN + +/* + * Other required minimal configurations + */ +#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ +#define CONFIG_NR_DRAM_BANKS 4 +#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */ +#define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */ +#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ + +/* + * Ethernet Driver configuration + */ +#ifdef CONFIG_CMD_NET +#define CONFIG_NETCONSOLE /* include NetConsole support */ +#define CONFIG_NET_MULTI /* specify more that one ports available */ +#define CONFIG_MII /* expose smi over miiphy interface */ +#define CONFIG_MVGBE /* Enable kirkwood Gbe Controller Driver */ +#define CONFIG_MVGBE_PORTS {1, 0} /* enable a single port */ +#define CONFIG_PHY_BASE_ADR 0x01 +#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ +#endif /* CONFIG_CMD_NET */ + +/* + * Time settings + */ +#define CONFIG_RTC_MV + +#define CONFIG_SYS_LOAD_ADDR 0x1000000 /* default location for tftp and bootm */ + +#endif /* _CONFIG_SBX81LIFKW_H */ diff --git a/include/configs/advantech_dms-ba16.h b/include/configs/advantech_dms-ba16.h index a6e99192baa..8e33d38f97d 100644 --- a/include/configs/advantech_dms-ba16.h +++ b/include/configs/advantech_dms-ba16.h @@ -45,7 +45,6 @@ /* MMC Configs */ #define CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_BOUNCE_BUFFER /* USB Configs */ #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 00255c80d6d..7225c03ac50 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -56,7 +56,6 @@ #define CONFIG_SYS_FSL_USDHC_NUM 3 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ -#define CONFIG_BOUNCE_BUFFER /* * SATA Configs diff --git a/include/configs/at91-sama5_common.h b/include/configs/at91-sama5_common.h index 5af7d1d1d24..30c6cd47cac 100644 --- a/include/configs/at91-sama5_common.h +++ b/include/configs/at91-sama5_common.h @@ -57,7 +57,7 @@ #ifdef CONFIG_NAND_BOOT /* u-boot env in nand flash */ -#define CONFIG_ENV_OFFSET 0xc0000 +#define CONFIG_ENV_OFFSET 0x140000 #define CONFIG_ENV_OFFSET_REDUND 0x100000 #define CONFIG_ENV_SIZE 0x20000 #define CONFIG_BOOTCOMMAND "nand read 0x21000000 0x180000 0x80000;" \ diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 433e4a8029c..137d7f0bbff 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -138,7 +138,7 @@ #elif defined(CONFIG_SYS_USE_NANDFLASH) /* bootstrap + u-boot + env + linux in nandflash */ -#define CONFIG_ENV_OFFSET 0x120000 +#define CONFIG_ENV_OFFSET 0x140000 #define CONFIG_ENV_OFFSET_REDUND 0x100000 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index 6a085dd3e9e..9e852599094 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -125,7 +125,7 @@ #else /* CONFIG_SYS_USE_NANDFLASH */ /* bootstrap + u-boot + env + linux in nandflash */ -#define CONFIG_ENV_OFFSET 0x120000 +#define CONFIG_ENV_OFFSET 0x140000 #define CONFIG_ENV_OFFSET_REDUND 0x100000 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index f37ef594e5c..4c476fc6a2b 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -234,7 +234,7 @@ #elif CONFIG_SYS_USE_NANDFLASH /* bootstrap + u-boot + env + linux in nandflash */ -#define CONFIG_ENV_OFFSET 0x120000 +#define CONFIG_ENV_OFFSET 0x140000 #define CONFIG_ENV_OFFSET_REDUND 0x100000 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 25970666c80..bec1558d6ba 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -76,7 +76,7 @@ #ifdef CONFIG_NAND_BOOT /* bootstrap + u-boot + env in nandflash */ -#define CONFIG_ENV_OFFSET 0x120000 +#define CONFIG_ENV_OFFSET 0x140000 #define CONFIG_ENV_OFFSET_REDUND 0x100000 #define CONFIG_ENV_SIZE 0x20000 diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index b284db36daa..a6865b2d6fb 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -110,7 +110,7 @@ #elif defined(CONFIG_NAND_BOOT) /* bootstrap + u-boot + env + linux in nandflash */ -#define CONFIG_ENV_OFFSET 0x120000 +#define CONFIG_ENV_OFFSET 0x140000 #define CONFIG_ENV_OFFSET_REDUND 0x100000 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ #define CONFIG_BOOTCOMMAND \ diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index f805c7590fb..5ddb7673e54 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -86,7 +86,7 @@ #elif CONFIG_SYS_USE_NANDFLASH /* bootstrap + u-boot + env + linux in nandflash */ -#define CONFIG_ENV_OFFSET 0x120000 +#define CONFIG_ENV_OFFSET 0x140000 #define CONFIG_ENV_OFFSET_REDUND 0x100000 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x600000; " \ diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index de10fadfbd9..8fc97509455 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -86,7 +86,7 @@ #ifdef CONFIG_NAND_BOOT /* bootstrap + u-boot + env + linux in nandflash */ -#define CONFIG_ENV_OFFSET 0x120000 +#define CONFIG_ENV_OFFSET 0x140000 #define CONFIG_ENV_OFFSET_REDUND 0x100000 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ #define CONFIG_BOOTCOMMAND "nand read " \ diff --git a/include/configs/nx25-ae250.h b/include/configs/ax25-ae350.h index 930cdbd4e40..b1ca5ac11a9 100644 --- a/include/configs/nx25-ae250.h +++ b/include/configs/ax25-ae350.h @@ -79,6 +79,44 @@ #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_0 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) +/* + * FLASH and environment organization + */ + +/* use CFI framework */ +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_FLASH_CFI_DRIVER + +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE +#define CONFIG_SYS_CFI_FLASH_STATUS_POLL + +/* support JEDEC */ +#ifdef CONFIG_CFI_FLASH +#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 +#endif/* Do not use CONFIG_FLASH_CFI_LEGACY to detect on board flash */ +#define PHYS_FLASH_1 0x88000000 /* BANK 0 */ +#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 +#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, } +#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 + +#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* TO for Flash Erase (ms) */ +#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* TO for Flash Write (ms) */ + +/* max number of memory banks */ +/* + * There are 4 banks supported for this Controller, + * but we have only 1 bank connected to flash on board +*/ +#ifndef CONFIG_SYS_MAX_FLASH_BANKS_DETECT +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#endif +#define CONFIG_SYS_FLASH_BANKS_SIZES {0x4000000} + +/* max number of sectors on one chip */ +#define CONFIG_FLASH_SECTOR_SIZE (0x10000*2) +#define CONFIG_SYS_MAX_FLASH_SECT 512 + /* environments */ #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_CS 0 @@ -104,4 +142,21 @@ /* Increase max gunzip size */ #define CONFIG_SYS_BOOTM_LEN (64 << 20) +/* When we use RAM as ENV */ +#define CONFIG_ENV_SIZE 0x2000 + +/* Enable distro boot */ +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(DHCP, dhcp, na) +#include <config_distro_bootcmd.h> + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "kernel_addr_r=0x00080000\0" \ + "pxefile_addr_r=0x01f00000\0" \ + "scriptaddr=0x01f00000\0" \ + "fdt_addr_r=0x02000000\0" \ + "ramdisk_addr_r=0x02800000\0" \ + BOOTENV + #endif /* __CONFIG_H */ diff --git a/include/configs/bitmain_antminer_s9.h b/include/configs/bitmain_antminer_s9.h new file mode 100644 index 00000000000..226750215e7 --- /dev/null +++ b/include/configs/bitmain_antminer_s9.h @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * (C) Copyright 2018 Michal Simek <monstr@monstr.eu> + */ + +#ifndef __CONFIG_BITMAIN_ANTMINER_S9_H +#define __CONFIG_BITMAIN_ANTMINER_S9_H + +#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CONFIG_SYS_SDRAM_SIZE 0x40000000 + +#define CONFIG_ENV_SIZE 0x20000 +#define CONFIG_ENV_OFFSET 0x300000 + +#define CONFIG_BOOTP_SERVERIP + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "autoload=no\0" \ + "pxefile_addr_r=0x2000000\0" \ + "scriptaddr=0x3000000\0" \ + "kernel_addr_r=0x2000000\0" \ + "fdt_high=0xefff000\0" \ + "initrd_high=0xefff000\0" \ + "devnum=0\0" \ + "wdstop=mw f8005000 ABC000\0" \ + BOOTENV + +#include <configs/zynq-common.h> + +#endif /* __CONFIG_BITMAIN_ANTMINER_S9_H */ diff --git a/include/configs/blanche.h b/include/configs/blanche.h index 8ff82d3489a..6df0e9bcc09 100644 --- a/include/configs/blanche.h +++ b/include/configs/blanche.h @@ -12,9 +12,9 @@ #include "rcar-gen2-common.h" /* STACK */ -#define CONFIG_SYS_INIT_SP_ADDR 0xE817FFFC -#define STACK_AREA_SIZE 0xC000 -#define LOW_LEVEL_MERAM_STACK \ +#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000 +#define STACK_AREA_SIZE 0x00100000 +#define LOW_LEVEL_MERAM_STACK \ (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) /* MEMORY */ @@ -22,12 +22,6 @@ #define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024) #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) -/* SCIF */ -#define CONFIG_CONS_SCIF0 - -#define CONFIG_SYS_MEMTEST_START (RCAR_GEN2_SDRAM_BASE) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 504 * 1024 * 1024) - #undef CONFIG_SYS_MEMTEST_SCRATCH #undef CONFIG_SYS_LOADS_BAUD_CHANGE @@ -55,7 +49,6 @@ #undef CONFIG_CMD_SPI #endif - /* Board Clock */ #define RMOBILE_XTAL_CLK 20000000u #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK @@ -73,21 +66,4 @@ #define CONFIG_ENV_SIZE_REDUND (CONFIG_SYS_MONITOR_LEN) #endif -/* Module stop status bits */ -/* INTC-RT */ -#define CONFIG_SMSTP0_ENA 0x00400000 -/* SDHI0 */ -#define CONFIG_SMSTP3_ENA 0x00004000 -/* INTC-SYS, IRQC */ -#define CONFIG_SMSTP4_ENA 0x00000180 -/* SCIF0 */ -#define CONFIG_SMSTP7_ENA 0x00200000 -/* QSPI */ -#define CONFIG_SMSTP9_ENA 0x00020000 -/* SYS-DMAC0 */ -#define CONFIG_RMSTP2_ENA 0x00080000 - -/* SDHI */ -#define CONFIG_SH_SDHI_FREQ 97500000 - #endif /* __BLANCHE_H */ diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h index f57f9b21aba..1141aee08b6 100644 --- a/include/configs/clearfog.h +++ b/include/configs/clearfog.h @@ -21,13 +21,6 @@ * Commands configuration */ -/* I2C */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_MVTWSI -#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE -#define CONFIG_SYS_I2C_SLAVE 0x0 -#define CONFIG_SYS_I2C_SPEED 100000 - /* SPI NOR flash default params, used by sf commands */ #define CONFIG_SF_DEFAULT_BUS 1 @@ -62,6 +55,15 @@ #define CONFIG_PCI_SCAN_SHOW #endif +/* SATA support */ +#ifdef CONFIG_SCSI +#define CONFIG_SCSI_AHCI_PLAT +#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 +#define CONFIG_SYS_SCSI_MAX_LUN 1 +#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ + CONFIG_SYS_SCSI_MAX_LUN) +#endif + /* Keep device tree and initrd in lower memory so the kernel can access them */ #define RELOCATION_LIMITS_ENV_SETTINGS \ "fdt_high=0x10000000\0" \ diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 49ec0bf108c..7e3463e1844 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -54,7 +54,6 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ -#define CONFIG_BOUNCE_BUFFER /* Network */ #define CONFIG_FEC_MXC diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index 24b35161b6d..3e0ac152295 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -33,7 +33,6 @@ #define CONFIG_INITRD_TAG #define CONFIG_REVISION_TAG -#define CONFIG_BOUNCE_BUFFER #define CONFIG_BZIP2 /* Size of malloc() pool */ diff --git a/include/configs/dns325.h b/include/configs/dns325.h index 5b78785ee25..dec71038bf2 100644 --- a/include/configs/dns325.h +++ b/include/configs/dns325.h @@ -27,7 +27,8 @@ /* * Commands configuration */ -#define CONFIG_SYS_MVFS +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ +#define CONFIG_MTD_PARTITIONS #define CONFIG_NR_DRAM_BANKS 1 diff --git a/include/configs/ds414.h b/include/configs/ds414.h index 5b444542f4e..27308c92ffb 100644 --- a/include/configs/ds414.h +++ b/include/configs/ds414.h @@ -61,7 +61,8 @@ #endif /* why is this only defined in mv-common.h if CONFIG_DM is undefined? */ -#define CONFIG_SYS_MVFS +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ +#define CONFIG_MTD_PARTITIONS /* * mv-common.h should be defined after CMD configs since it used them diff --git a/include/configs/ebisu.h b/include/configs/ebisu.h new file mode 100644 index 00000000000..560fe5c45e0 --- /dev/null +++ b/include/configs/ebisu.h @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * include/configs/ebisu.h + * This file is Ebisu board configuration. + * + * Copyright (C) 2018 Renesas Electronics Corporation + */ + +#ifndef __EBISU_H +#define __EBISU_H + +#undef DEBUG + +#include "rcar-gen3-common.h" + +/* Ethernet RAVB */ +#define CONFIG_NET_MULTI +#define CONFIG_BITBANGMII +#define CONFIG_BITBANGMII_MULTI + +/* Board Clock */ +/* XTAL_CLK : 33.33MHz */ +#define CONFIG_SYS_CLK_FREQ 48000000u + +/* Generic Timer Definitions (use in assembler source) */ +#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ + +/* Environment in eMMC, at the end of 2nd "boot sector" */ +#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) +#define CONFIG_SYS_MMC_ENV_DEV 2 +#define CONFIG_SYS_MMC_ENV_PART 2 + +#endif /* __EBISU_H */ diff --git a/include/configs/emdk.h b/include/configs/emdk.h new file mode 100644 index 00000000000..dca13e2fffb --- /dev/null +++ b/include/configs/emdk.h @@ -0,0 +1,40 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2018 Synopsys, Inc. All rights reserved. + */ + +#ifndef _CONFIG_EMDK_H_ +#define _CONFIG_EMDK_H_ + +#include <linux/sizes.h> + +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE + +#define CONFIG_SYS_SDRAM_BASE 0x10000000 +#define CONFIG_SYS_SDRAM_SIZE SZ_8M + +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_1M) + +#define CONFIG_SYS_MALLOC_LEN SZ_64K +#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + +/* Required by DW MMC driver */ +#define CONFIG_BOUNCE_BUFFER + +/* + * Environment + */ +#define CONFIG_ENV_SIZE SZ_4K +#define CONFIG_BOOTFILE "app.bin" +#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "upgrade_image=u-boot.bin\0" \ + "upgrade=emdk rom unlock && " \ + "fatload mmc 0 ${loadaddr} ${upgrade_image} && " \ + "cp.b ${loadaddr} 0 ${filesize} && " \ + "dcache flush && " \ + "emdk rom lock\0" + +#endif /* _CONFIG_EMDK_H_ */ + diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index 32631a20c35..1b947db9d46 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -14,19 +14,7 @@ #include <asm/arch/imx-regs.h> #include <asm/mach-imx/gpio.h> -#define BX50V3_BOOTARGS_EXTRA -#if defined(CONFIG_TARGET_GE_B450V3) -#define CONFIG_BOARD_NAME "General Electric B450v3" -#elif defined(CONFIG_TARGET_GE_B650V3) -#define CONFIG_BOARD_NAME "General Electric B650v3" -#elif defined(CONFIG_TARGET_GE_B850V3) -#define CONFIG_BOARD_NAME "General Electric B850v3" -#undef BX50V3_BOOTARGS_EXTRA -#define BX50V3_BOOTARGS_EXTRA "video=DP-1:1024x768@60 " \ - "video=HDMI-A-1:1024x768@60 " -#else -#define CONFIG_BOARD_NAME "General Electric BA16 Generic" -#endif +#define CONFIG_BOARD_NAME "General Electric Bx50v3" #define CONFIG_MXC_UART_BASE UART3_BASE #define CONSOLE_DEV "ttymxc2" @@ -62,7 +50,6 @@ /* MMC Configs */ #define CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_BOUNCE_BUFFER /* USB Configs */ #ifdef CONFIG_USB @@ -113,7 +100,7 @@ "ro rootwait cma=128M " \ "bootcause=${bootcause} " \ "${quiet} console=${console} ${rtc_status} " \ - BX50V3_BOOTARGS_EXTRA "\0" \ + "${videoargs}" "\0" \ "doquiet=" \ "if ext2load ${dev} ${devnum}:5 0x7000A000 /boot/console; " \ "then setenv quiet; fi\0" \ diff --git a/include/configs/goflexhome.h b/include/configs/goflexhome.h index 1d9fe29f9ed..8b05e0a53d7 100644 --- a/include/configs/goflexhome.h +++ b/include/configs/goflexhome.h @@ -41,7 +41,8 @@ * Commands configuration */ -#define CONFIG_SYS_MVFS /* Picks up Filesystem from mv-common.h */ +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ +#define CONFIG_MTD_PARTITIONS /* * mv-common.h should be defined after CMD configs since it used them diff --git a/include/configs/guruplug.h b/include/configs/guruplug.h index d59cddb002e..04b7e944a46 100644 --- a/include/configs/guruplug.h +++ b/include/configs/guruplug.h @@ -17,7 +17,9 @@ /* * Standard filesystems */ -#define CONFIG_SYS_MVFS +#define CONFIG_BZIP2 +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ +#define CONFIG_MTD_PARTITIONS /* * mv-plug-common.h should be defined after CMD configs since it used them @@ -37,6 +39,11 @@ */ #define CONFIG_ENV_SIZE 0x20000 /* 128k */ #define CONFIG_ENV_OFFSET 0xE0000 /* env starts here */ +/* + * Environment is right behind U-Boot in flash. Make sure U-Boot + * doesn't grow into the environment area. + */ +#define CONFIG_BOARD_SIZE_LIMIT CONFIG_ENV_OFFSET /* * Default environment variables diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index b8eefe3b118..1b7e29ca5e7 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -89,7 +89,6 @@ /* eMMC Configs */ #define CONFIG_SUPPORT_EMMC_BOOT -#define CONFIG_SUPPORT_EMMC_RPMB /* * SATA Configs diff --git a/include/configs/ib62x0.h b/include/configs/ib62x0.h index 5f071d02b73..a7643166f41 100644 --- a/include/configs/ib62x0.h +++ b/include/configs/ib62x0.h @@ -26,7 +26,8 @@ /* * Commands configuration */ -#define CONFIG_SYS_MVFS +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ +#define CONFIG_MTD_PARTITIONS /* * mv-common.h should be defined after CMD configs since it used them diff --git a/include/configs/iconnect.h b/include/configs/iconnect.h index 66131cca622..1fe4618da5e 100644 --- a/include/configs/iconnect.h +++ b/include/configs/iconnect.h @@ -28,7 +28,8 @@ /* * Commands configuration */ -#define CONFIG_SYS_MVFS +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ +#define CONFIG_MTD_PARTITIONS /* * mv-common.h should be defined after CMD configs since it used them diff --git a/include/configs/imx6dl-mamoj.h b/include/configs/imx6dl-mamoj.h new file mode 100644 index 00000000000..5a3c2d68b5d --- /dev/null +++ b/include/configs/imx6dl-mamoj.h @@ -0,0 +1,101 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2018 Simone CIANNI <simone.cianni@bticino.it> + * Copyright (C) 2018 Raffaele RECALCATI <raffaele.recalcati@bticino.it> + * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com> + * + * Configuration settings for the BTicion i.MX6DL Mamoj board. + */ + +#ifndef __IMX6DL_MAMOJ_CONFIG_H +#define __IMX6DL_MAMOJ_CONFIG_H + +#include <linux/sizes.h> +#include "mx6_common.h" + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) + +/* Total Size of Environment Sector */ +#define CONFIG_ENV_SIZE SZ_128K + +/* Allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +/* Environment */ +#ifndef CONFIG_ENV_IS_NOWHERE +/* Environment in MMC */ +# if defined(CONFIG_ENV_IS_IN_MMC) +# define CONFIG_ENV_OFFSET 0x100000 +# endif +#endif + +#ifndef CONFIG_SPL_BUILD +#define CONFIG_EXTRA_ENV_SETTINGS \ + "scriptaddr=0x14000000\0" \ + "fdt_addr_r=0x13000000\0" \ + "kernel_addr_r=0x10008000\0" \ + "fdt_high=0xffffffff\0" \ + "dfu_alt_info_spl=spl raw 0x2 0x400\0" \ + "dfu_alt_info_uboot=u-boot raw 0x8a 0x11400\0" \ + BOOTENV + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 2) + +#include <config_distro_bootcmd.h> +#endif + +/* UART */ +#define CONFIG_MXC_UART_BASE UART3_BASE + +/* MMC */ +#define CONFIG_SYS_MMC_ENV_DEV 2 +#define CONFIG_SUPPORT_EMMC_BOOT + +/* Ethernet */ +#define CONFIG_FEC_MXC_PHYADDR 1 +#define CONFIG_MII + +/* USB */ +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 + +/* Falcon */ +#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" +#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" +#define CONFIG_CMD_SPL +#define CONFIG_SYS_SPL_ARGS_ADDR 0x13000000 +#define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K) + +/* MMC support: args@1MB kernel@2MB */ +#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ +#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) +#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */ + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_HZ 1000 + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_SP_OFFSET) + +/* SPL */ +#include "imx6_spl.h" + +#endif /* __IMX6DL_MAMOJ_CONFIG_H */ diff --git a/include/configs/kp_imx53.h b/include/configs/kp_imx53.h new file mode 100644 index 00000000000..530c3557d03 --- /dev/null +++ b/include/configs/kp_imx53.h @@ -0,0 +1,112 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2018 + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de + */ + +#ifndef __CONFIG_H_ +#define __CONFIG_H_ + +#include <asm/arch/imx-regs.h> +#include <linux/sizes.h> + +#define CONFIG_SYS_FSL_CLK + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_ESDHC_NUM 1 + +/* Eth Configs */ +#define CONFIG_MII + +/* USB Configs */ +#define CONFIG_USB_EHCI_MX5 +#define CONFIG_MXC_USB_PORT 1 +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 + +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 +#define CONFIG_SYS_EEPROM_BUS_NUM 1 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +/* Command definition */ +#define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */ + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "console=ttymxc1,115200\0" \ + "fdt_addr=0x75000000\0" \ + "fdt_high=0xffffffff\0" \ + "scriptaddr=0x74000000\0" \ + "kernel_file=fitImage\0"\ + "rdinit=/sbin/init\0" \ + "addinitrd=setenv bootargs ${bootargs} rdinit=${rdinit} ${debug} \0" \ + "upd_image=st.4k\0" \ + "uboot_file=u-boot.imx\0" \ + "updargs=setenv bootargs console=${console} ${smp}"\ + "rdinit=${rdinit} ${debug} ${displayargs}\0" \ + "loadusb=usb start; " \ + "fatload usb 0 ${loadaddr} ${upd_image}\0" \ + "up=if tftp ${loadaddr} ${uboot_file}; then " \ + "setexpr blkc ${filesize} / 0x200; " \ + "setexpr blkc ${blkc} + 1; " \ + "mmc write ${loadaddr} 0x2 ${blkc}" \ + "; fi\0" \ + "upwic=setenv wic_file kp-image-kp${boardsoc}${boardtype}.wic; "\ + "if tftp ${loadaddr} ${wic_file}; then " \ + "setexpr blkc ${filesize} / 0x200; " \ + "setexpr blkc ${blkc} + 1; " \ + "mmc write ${loadaddr} 0x0 ${blkc}" \ + "; fi\0" \ + "usbupd=echo Booting update from usb ...; " \ + "setenv bootargs; " \ + "run updargs; " \ + "run loadusb; " \ + "bootm ${loadaddr}#${fit_config}\0" \ + BOOTENV + +#define CONFIG_BOOTCOMMAND "run usbupd; run distro_bootcmd" + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(DHCP, dhcp, na) + +#include <config_distro_bootcmd.h> + +#define CONFIG_ARP_TIMEOUT 200UL + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM_1 CSD0_BASE_ADDR +#define PHYS_SDRAM_1_SIZE (512 * SZ_1M) +#define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE) + +#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) +#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) +#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* environment organization */ +#define CONFIG_ENV_OFFSET (SZ_1M) +#define CONFIG_ENV_SIZE (SZ_8K) +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT +#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE +#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) +#define CONFIG_SYS_MMC_ENV_DEV 0 + +#endif /* __CONFIG_H_ */ diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h index d243fc675fa..bf3cc174cd6 100644 --- a/include/configs/kp_imx6q_tpc.h +++ b/include/configs/kp_imx6q_tpc.h @@ -21,8 +21,6 @@ #define CONFIG_INITRD_TAG #define CONFIG_REVISION_TAG -#define CONFIG_BOUNCE_BUFFER - /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (4 * SZ_1M) diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index 542b8f072c7..7a0511f88e6 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -39,61 +39,6 @@ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ( \ - DAVINCI_SYSCFG_SUSPSRC_TIMER0 | \ - DAVINCI_SYSCFG_SUSPSRC_SPI0 | \ - DAVINCI_SYSCFG_SUSPSRC_UART1 | \ - DAVINCI_SYSCFG_SUSPSRC_EMAC | \ - DAVINCI_SYSCFG_SUSPSRC_I2C) - -/* - * PLL configuration - */ - -#define CONFIG_SYS_DA850_PLL0_PLLM 24 -#define CONFIG_SYS_DA850_PLL1_PLLM 21 - -/* - * DDR2 memory configuration - */ -#define CONFIG_SYS_DA850_DDR2_DDRPHYCR (DV_DDR_PHY_PWRDNEN | \ - DV_DDR_PHY_EXT_STRBEN | \ - (0x4 << DV_DDR_PHY_RD_LATENCY_SHIFT)) - -#define CONFIG_SYS_DA850_DDR2_SDBCR ( \ - (1 << DV_DDR_SDCR_MSDRAMEN_SHIFT) | \ - (1 << DV_DDR_SDCR_DDREN_SHIFT) | \ - (1 << DV_DDR_SDCR_SDRAMEN_SHIFT) | \ - (1 << DV_DDR_SDCR_BUS_WIDTH_SHIFT) | \ - (0x3 << DV_DDR_SDCR_CL_SHIFT) | \ - (0x2 << DV_DDR_SDCR_IBANK_SHIFT) | \ - (0x2 << DV_DDR_SDCR_PAGESIZE_SHIFT)) - -/* SDBCR2 is only used if IBANK_POS bit in SDBCR is set */ -#define CONFIG_SYS_DA850_DDR2_SDBCR2 0 - -#define CONFIG_SYS_DA850_DDR2_SDTIMR ( \ - (14 << DV_DDR_SDTMR1_RFC_SHIFT) | \ - (2 << DV_DDR_SDTMR1_RP_SHIFT) | \ - (2 << DV_DDR_SDTMR1_RCD_SHIFT) | \ - (1 << DV_DDR_SDTMR1_WR_SHIFT) | \ - (5 << DV_DDR_SDTMR1_RAS_SHIFT) | \ - (8 << DV_DDR_SDTMR1_RC_SHIFT) | \ - (1 << DV_DDR_SDTMR1_RRD_SHIFT) | \ - (0 << DV_DDR_SDTMR1_WTR_SHIFT)) - -#define CONFIG_SYS_DA850_DDR2_SDTIMR2 ( \ - (7 << DV_DDR_SDTMR2_RASMAX_SHIFT) | \ - (0 << DV_DDR_SDTMR2_XP_SHIFT) | \ - (0 << DV_DDR_SDTMR2_ODT_SHIFT) | \ - (17 << DV_DDR_SDTMR2_XSNR_SHIFT) | \ - (199 << DV_DDR_SDTMR2_XSRD_SHIFT) | \ - (0 << DV_DDR_SDTMR2_RTP_SHIFT) | \ - (0 << DV_DDR_SDTMR2_CKE_SHIFT)) - -#define CONFIG_SYS_DA850_DDR2_SDRCR 0x00000494 -#define CONFIG_SYS_DA850_DDR2_PBBPR 0x30 - /* * Serial Driver info */ @@ -139,35 +84,60 @@ "if run loadbootscr; then " \ "run bootscript; " \ "else " \ + "if run loadbootenv; then " \ + "echo Loaded env from ${bootenvfile};" \ + "run importbootenv;" \ + "fi;" \ + "if test -n $uenvcmd; then " \ + "echo Running uenvcmd...;" \ + "run uenvcmd;" \ + "fi;" \ "if run loadimage; then " \ "run mmcargs; " \ + "if run loadfdt; then " \ + "echo Using ${fdtfile}...;" \ + "run fdtfixup; " \ + "run fdtboot; "\ + "fi; " \ "run mmcboot; " \ - "else " \ - "run flashargs; " \ - "run flashboot; " \ "fi; " \ "fi; " \ - "else " \ - "run flashargs; " \ - "run flashboot; " \ - "fi" + "fi; "\ + "run flashargs; " \ + "run flashboot" #define CONFIG_EXTRA_ENV_SETTINGS \ - "hostname=EV3\0" \ + "bootenvfile=uEnv.txt\0" \ + "fdtfile=da850-lego-ev3.dtb\0" \ "memsize=64M\0" \ "filesyssize=10M\0" \ "verify=n\0" \ "console=ttyS1,115200n8\0" \ "bootscraddr=0xC0600000\0" \ + "fdtaddr=0xC0600000\0" \ "loadaddr=0xC0007FC0\0" \ "filesysaddr=0xC1180000\0" \ "fwupdateboot=mw 0xFFFF1FFC 0x5555AAAA; reset\0" \ - "mmcargs=setenv bootargs mem=${memsize} console=${console} root=/dev/mmcblk0p2 rw rootwait lpj=747520\0" \ + "importbootenv=echo Importing environment...; " \ + "env import -t ${loadaddr} ${filesize}\0" \ + "loadbootenv=fatload mmc 0 ${loadaddr} ${bootenvfile}\0" \ + "mmcargs=setenv bootargs console=${console} root=/dev/mmcblk0p2 rw " \ + "rootwait ${optargs}\0" \ "mmcboot=bootm ${loadaddr}\0" \ - "flashargs=setenv bootargs mem=${memsize} initrd=${filesysaddr},${filesyssize} root=/dev/ram0 rw rootfstype=squashfs console=${console} lpj=747520\0" \ - "flashboot=sf probe 0; sf read ${loadaddr} 0x50000 0x300000; sf read ${filesysaddr} 0x350000 0x960000; bootm ${loadaddr}\0" \ + "flashargs=setenv bootargs initrd=${filesysaddr},${filesyssize} " \ + "root=/dev/ram0 rw rootfstype=squashfs console=${console} " \ + "${optargs}\0" \ + "flashboot=sf probe 0; " \ + "sf read ${fdtaddr} 0x40000 0x10000; " \ + "sf read ${loadaddr} 0x50000 0x400000; " \ + "sf read ${filesysaddr} 0x450000 0xA00000; " \ + "run fdtfixup; " \ + "run fdtboot\0" \ "loadimage=fatload mmc 0 ${loadaddr} uImage\0" \ + "loadfdt=fatload mmc 0 ${fdtaddr} ${fdtfile}\0" \ + "fdtfixup=fdt addr ${fdtaddr}; fdt resize; fdt chosen\0" \ + "fdtboot=bootm ${loadaddr} - ${fdtaddr}\0" \ "loadbootscr=fatload mmc 0 ${bootscraddr} boot.scr\0" \ - "bootscript=source ${bootscraddr}\0" \ + "bootscript=source ${bootscraddr}\0" #ifdef CONFIG_CMD_BDI #define CONFIG_CLOCKS diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index fa9b5bcf3a5..79d61c599e5 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -29,10 +29,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* - * CLKs configurations - */ - -/* * NS16550 Configuration */ #define CONFIG_SYS_NS16550_SERIAL @@ -101,18 +97,4 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #endif -/* - * Common SPI Flash configuration - */ -#ifdef CONFIG_CMD_SF -#endif - -/* - * File system - */ -#ifdef CONFIG_SYS_MVFS -#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -#define CONFIG_MTD_PARTITIONS -#endif - #endif /* _MV_COMMON_H */ diff --git a/include/configs/mv-plug-common.h b/include/configs/mv-plug-common.h index df686dbe4f6..81c07a889a3 100644 --- a/include/configs/mv-plug-common.h +++ b/include/configs/mv-plug-common.h @@ -17,21 +17,6 @@ #define CONFIG_BUILD_TARGET "u-boot.kwb" /* - * Compression configuration - */ -#ifdef CONFIG_SYS_MVFS -#define CONFIG_BZIP2 -#endif /* CONFIG_SYS_MVFS */ - -/* - * Commands configuration - */ - -/* - * Extra file system - */ - -/* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros */ diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 583892fed21..3ec31262338 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -16,8 +16,6 @@ #include <asm/arch/imx-regs.h> /* High Level Configuration Options */ -#define CONFIG_MX31 /* This is a mx31 */ - #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h index d8a724c71aa..e08e83151fb 100644 --- a/include/configs/mx53ppd.h +++ b/include/configs/mx53ppd.h @@ -198,7 +198,6 @@ /* FLASH and environment organization */ #define CONFIG_ENV_OFFSET (12 * 64 * 1024) #define CONFIG_ENV_SIZE (10 * 1024) -#define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_CMD_FUSE diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index a8182b3434f..1b2961f68e5 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -15,7 +15,6 @@ #define CONFIG_SYS_PL310_BASE L2_PL310_BASE #endif -#define CONFIG_MP #endif #define CONFIG_BOARD_POSTCLK_INIT #define CONFIG_MXC_GPT_HCLK @@ -51,8 +50,6 @@ /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE -/* Filesystems and image support */ - /* Miscellaneous configurable options */ #define CONFIG_SYS_CBSIZE 512 #define CONFIG_SYS_MAXARGS 32 diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index da5a92502bd..b0b7e1edd4f 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -36,9 +36,6 @@ #define CONFIG_SYS_CBSIZE 512 #define CONFIG_SYS_MAXARGS 32 -#ifndef CONFIG_SYS_DCACHE_OFF -#endif - /* UART */ #define CONFIG_MXC_UART diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 5ed88d26542..4e375d88d1d 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -79,161 +79,68 @@ #define CONFIG_PREBOOT "" -#ifdef CONFIG_CMD_SATA -#define CONFIG_DRIVE_SATA "sata " +#ifdef CONFIG_CMD_MMC +#define DISTRO_BOOT_DEV_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1) #else -#define CONFIG_DRIVE_SATA +#define DISTRO_BOOT_DEV_MMC(func) #endif -#ifdef CONFIG_CMD_MMC -#define CONFIG_DRIVE_MMC "mmc " +#ifdef CONFIG_CMD_SATA +#define DISTRO_BOOT_DEV_SATA(func) func(SATA, sata, 0) #else -#define CONFIG_DRIVE_MMC +#define DISTRO_BOOT_DEV_SATA(func) #endif #ifdef CONFIG_USB_STORAGE -#define CONFIG_DRIVE_USB "usb " +#define DISTRO_BOOT_DEV_USB(func) func(USB, usb, 0) #else -#define CONFIG_DRIVE_USB +#define DISTRO_BOOT_DEV_USB(func) +#endif + +#ifdef CONFIG_CMD_PXE +#define DISTRO_BOOT_DEV_PXE(func) func(PXE, pxe, na) +#else +#define DISTRO_BOOT_DEV_PXE(func) +#endif + +#ifdef CONFIG_CMD_DHCP +#define DISTRO_BOOT_DEV_DHCP(func) func(DHCP, dhcp, na) +#else +#define DISTRO_BOOT_DEV_DHCP(func) #endif -#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC CONFIG_DRIVE_USB -#define CONFIG_UMSDEVS CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC #if defined(CONFIG_SABRELITE) +#define FDTFILE "fdtfile=imx6q-sabrelite.dtb\0" +#else +/* FIXME: nitrogen6x covers multiple configs. Define fdtfile for each supported config. */ +#define FDTFILE +#endif + +#define BOOT_TARGET_DEVICES(func) \ + DISTRO_BOOT_DEV_MMC(func) \ + DISTRO_BOOT_DEV_SATA(func) \ + DISTRO_BOOT_DEV_USB(func) \ + DISTRO_BOOT_DEV_PXE(func) \ + DISTRO_BOOT_DEV_DHCP(func) + +#include <config_distro_bootcmd.h> + #define CONFIG_EXTRA_ENV_SETTINGS \ - "script=boot.scr\0" \ - "uimage=uImage\0" \ "console=ttymxc1\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ - "fdt_file=imx6q-sabrelite.dtb\0" \ - "fdt_addr=0x18000000\0" \ - "boot_fdt=try\0" \ + "fdt_addr_r=0x18000000\0" \ + FDTFILE \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ + "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ + "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ + "ramdisk_addr_r=0x13000000\0" \ + "ramdiskaddr=0x13000000\0" \ "ip_dyn=yes\0" \ "usb_pgood_delay=2000\0" \ - "mmcdevs=0 1\0" \ - "mmcpart=1\0" \ - "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ - "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "root=${mmcroot}\0" \ - "loadbootscript=" \ - "load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ - "bootscript=echo Running bootscript from mmc ...; " \ - "source\0" \ - "loaduimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ - "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if run loadfdt; then " \ - "bootm ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "if test ${boot_fdt} = try; then " \ - "bootm; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi; " \ - "else " \ - "bootm; " \ - "fi;\0" \ - "netargs=setenv bootargs console=${console},${baudrate} " \ - "root=/dev/nfs " \ - "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ - "netboot=echo Booting from net ...; " \ - "run netargs; " \ - "if test ${ip_dyn} = yes; then " \ - "setenv get_cmd dhcp; " \ - "else " \ - "setenv get_cmd tftp; " \ - "fi; " \ - "${get_cmd} ${uimage}; " \ - "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ - "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ - "bootm ${loadaddr} - ${fdt_addr}; " \ - "else " \ - "if test ${boot_fdt} = try; then " \ - "bootm; " \ - "else " \ - "echo WARN: Cannot load the DT; " \ - "fi; " \ - "fi; " \ - "else " \ - "bootm; " \ - "fi;\0" - -#define CONFIG_BOOTCOMMAND \ - "for mmcdev in ${mmcdevs}; do " \ - "mmc dev ${mmcdev}; " \ - "if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loaduimage; then " \ - "run mmcboot; " \ - "fi; " \ - "fi; " \ - "fi; " \ - "done; " \ - "run netboot; " -#else -#define CONFIG_EXTRA_ENV_SETTINGS \ - "bootdevs=" CONFIG_DRIVE_TYPES "\0" \ - "umsdevs=" CONFIG_UMSDEVS "\0" \ - "usb_pgood_delay=2000\0" \ - "console=ttymxc1\0" \ - "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ - "sf erase 0xc0000 0x2000 && " \ - "echo restored environment to factory default ; fi\0" \ - "bootcmd=for dtype in ${bootdevs}" \ - "; do " \ - "if itest.s \"xusb\" == \"x${dtype}\" ; then " \ - "usb start ;" \ - "fi; " \ - "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ - "load " \ - "${dtype} ${disk}:1 " \ - "10008000 " \ - "/6x_bootscript" \ - "&& source 10008000 ; " \ - "done ; " \ - "done; " \ - "setenv stdout serial,vga ; " \ - "echo ; echo 6x_bootscript not found ; " \ - "echo ; echo serial console at 115200, 8N1 ; echo ; " \ - "echo details at http://boundarydevices.com/6q_bootscript ; " \ - "setenv stdout serial;" \ - "setenv stdin serial,usbkbd;" \ - "for dtype in ${umsdevs} ; do " \ - "if itest.s sata == ${dtype}; then " \ - "initcmd='sata init' ;" \ - "else " \ - "initcmd='mmc rescan' ;" \ - "fi; " \ - "for disk in 0 1 ; do " \ - "if $initcmd && $dtype dev $disk ; then " \ - "setenv stdout serial,vga; " \ - "echo expose ${dtype} ${disk} " \ - "over USB; " \ - "ums 0 $dtype $disk ;" \ - "fi; " \ - " done; " \ - "done ;" \ - "setenv stdout serial,vga; " \ - "echo no block devices found;" \ - "\0" \ - "initrd_high=0xffffffff\0" \ - "upgradeu=for dtype in ${bootdevs}" \ - "; do " \ - "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ - "load ${dtype} ${disk}:1 10008000 " \ - "/6x_upgrade " \ - "&& source 10008000 ; " \ - "done ; " \ - "done\0" \ + BOOTENV -#endif /* Miscellaneous configurable options */ #define CONFIG_SYS_MEMTEST_START 0x10000000 #define CONFIG_SYS_MEMTEST_END 0x10010000 diff --git a/include/configs/nsa310s.h b/include/configs/nsa310s.h index 4c320522d2f..2f904393834 100644 --- a/include/configs/nsa310s.h +++ b/include/configs/nsa310s.h @@ -22,7 +22,8 @@ #define CONFIG_BZIP2 /* commands configuration */ -#define CONFIG_SYS_MVFS +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ +#define CONFIG_MTD_PARTITIONS /* * mv-common.h should be defined after CMD configs since it used them diff --git a/include/configs/nsim.h b/include/configs/nsim.h index 0f22606feed..c3f34a91e43 100644 --- a/include/configs/nsim.h +++ b/include/configs/nsim.h @@ -25,16 +25,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x82000000 /* - * UART configuration - * - */ -#define CONFIG_ARC_SERIAL - -/* - * Command line configuration - */ - -/* * Environment settings */ #define CONFIG_ENV_SIZE SZ_512 diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index 9898c42b8ea..f495f6219ba 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -101,7 +101,6 @@ EXYNOS_FDTFILE_SETTING \ MEM_LAYOUT_ENV_SETTINGS \ BOOTENV \ - "bootdelay=0\0" \ "rootfstype=ext4\0" \ "console=" CONFIG_DEFAULT_CONSOLE "\0"\ "fdtfile=exynos5422-odroidxu3.dtb\0" \ diff --git a/include/configs/openrd.h b/include/configs/openrd.h index dfdad56dcc9..aa5425af02e 100644 --- a/include/configs/openrd.h +++ b/include/configs/openrd.h @@ -23,7 +23,8 @@ /* * Commands configuration */ -#define CONFIG_SYS_MVFS +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ +#define CONFIG_MTD_PARTITIONS /* * mv-common.h should be defined after CMD configs since it used them diff --git a/include/configs/pogo_e02.h b/include/configs/pogo_e02.h index 0416baef452..a654df6d6f8 100644 --- a/include/configs/pogo_e02.h +++ b/include/configs/pogo_e02.h @@ -27,7 +27,8 @@ /* * Commands configuration */ -#define CONFIG_SYS_MVFS +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ +#define CONFIG_MTD_PARTITIONS /* * mv-common.h should be defined after CMD configs since it used them diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h index eadf5594c84..231c4ecea45 100644 --- a/include/configs/rcar-gen2-common.h +++ b/include/configs/rcar-gen2-common.h @@ -51,4 +51,12 @@ #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) #define CONFIG_ENV_SIZE_REDUND (CONFIG_SYS_MONITOR_LEN) +/* SF MTD */ +#if defined(CONFIG_SPI_FLASH_MTD) && !defined(CONFIG_SPL_BUILD) +#define CONFIG_MTD_DEVICE +#define CONFIG_MTD_PARTITIONS +#else +#undef CONFIG_SPI_FLASH_MTD +#endif + #endif /* __RCAR_GEN2_COMMON_H */ diff --git a/include/configs/rpi.h b/include/configs/rpi.h index 69a22e17009..a97550b7320 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -90,44 +90,63 @@ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" +#ifdef CONFIG_ARM64 +#define FDT_HIGH "ffffffffffffffff" +#define INITRD_HIGH "ffffffffffffffff" +#else +#define FDT_HIGH "ffffffff" +#define INITRD_HIGH "ffffffff" +#endif + /* * Memory layout for where various images get loaded by boot scripts: * * I suspect address 0 is used as the SMP pen on the RPi2, so avoid this. * - * fdt_addr_r simply shouldn't overlap anything else. However, the RPi's - * binary firmware loads a DT to address 0x100, so we choose this address to - * match it. This allows custom boot scripts to pass this DT on to Linux - * simply by not over-writing the data at this address. When using U-Boot, - * U-Boot (and scripts it executes) typicaly ignore the DT loaded by the FW - * and loads its own DT from disk (triggered by boot.scr or extlinux.conf). + * Older versions of the boot firmware place the firmware-loaded DTB at 0x100, + * newer versions place it in high memory. So prevent U-Boot from doing its own + * DTB + initrd relocation so that we won't accidentally relocate the initrd + * over the firmware-loaded DTB and generally try to lay out things starting + * from the bottom of RAM. * - * pxefile_addr_r can be pretty much anywhere that doesn't conflict with - * something else. Put it low in memory to avoid conflicts. + * kernel_addr_r has different constraints on ARM and Aarch64. For 32-bit ARM, + * it must be within the first 128M of RAM in order for the kernel's + * CONFIG_AUTO_ZRELADDR option to work. The kernel itself will be decompressed + * to 0x8000 but the decompressor clobbers 0x4000-0x8000 as well. The + * decompressor also likes to relocate itself to right past the end of the + * decompressed kernel, so in total the sum of the compressed and and + * decompressed kernel needs to be reserved. * - * kernel_addr_r must be within the first 128M of RAM in order for the - * kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will - * decompress itself to 0x8000 after the start of RAM, kernel_addr_r - * should not overlap that area, or the kernel will have to copy itself - * somewhere else before decompression. Similarly, the address of any other - * data passed to the kernel shouldn't overlap the start of RAM. Pushing - * this up to 16M allows for a sizable kernel to be decompressed below the - * compressed load address. + * For Aarch64, the kernel image is uncompressed and must be loaded at + * text_offset bytes (specified in the header of the Image) into a 2MB + * boundary. The 'booti' command relocates the image if necessary. Linux uses + * a default text_offset of 0x80000. In summary, loading at 0x80000 + * satisfies all these constraints and reserving memory up to 0x02400000 + * permits fairly large (roughly 36M) kernels. * - * scriptaddr can be pretty much anywhere that doesn't conflict with something - * else. Choosing 32M allows for the compressed kernel to be up to 16M. + * scriptaddr and pxefile_addr_r can be pretty much anywhere that doesn't + * conflict with something else. Reserving 1M for each of them at + * 0x02400000-0x02500000 and 0x02500000-0x02600000 should be plenty. * - * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows - * for any boot script to be up to 1M, which is hopefully plenty. + * On ARM, both the DTB and any possible initrd must be loaded such that they + * fit inside the lowmem mapping in Linux. In practice, this usually means not + * more than ~700M away from the start of the kernel image but this number can + * be larger OR smaller depending on e.g. the 'vmalloc=xxxM' command line + * parameter given to the kernel. So reserving memory from low to high + * satisfies this constraint again. Reserving 1M at 0x02600000-0x02700000 for + * the DTB leaves rest of the free RAM to the initrd starting at 0x02700000. + * Even with the smallest possible CPU-GPU memory split of the CPU getting + * only 64M, the remaining 25M starting at 0x02700000 should allow quite + * large initrds before they start colliding with U-Boot. */ #define ENV_MEM_LAYOUT_SETTINGS \ - "fdt_high=ffffffff\0" \ - "initrd_high=ffffffff\0" \ - "fdt_addr_r=0x00000100\0" \ - "pxefile_addr_r=0x00100000\0" \ - "kernel_addr_r=0x01000000\0" \ - "scriptaddr=0x02000000\0" \ - "ramdisk_addr_r=0x02100000\0" \ + "fdt_high=" FDT_HIGH "\0" \ + "initrd_high=" INITRD_HIGH "\0" \ + "kernel_addr_r=0x00080000\0" \ + "scriptaddr=0x02400000\0" \ + "pxefile_addr_r=0x02500000\0" \ + "fdt_addr_r=0x02600000\0" \ + "ramdisk_addr_r=0x02700000\0" #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ diff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h index f70ca83b25c..b205d8d6045 100644 --- a/include/configs/sama5d2_xplained.h +++ b/include/configs/sama5d2_xplained.h @@ -43,6 +43,15 @@ "fatload mmc 1:1 0x22000000 zImage; " \ "bootz 0x22000000 - 0x21000000" +#elif CONFIG_SPI_BOOT + +/* bootstrap + u-boot + env in sd card, but kernel + dtb in eMMC */ +#undef CONFIG_BOOTCOMMAND + +#define CONFIG_BOOTCOMMAND "ext4load mmc 0:1 0x21000000 /boot/at91-sama5d2_xplained.dtb; " \ + "ext4load mmc 0:1 0x22000000 /boot/zImage; " \ + "bootz 0x22000000 - 0x21000000" + #endif /* SPL */ diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h index 656db45adf1..dc6375841ed 100644 --- a/include/configs/sheevaplug.h +++ b/include/configs/sheevaplug.h @@ -21,7 +21,9 @@ /* * Standard filesystems */ -#define CONFIG_SYS_MVFS +#define CONFIG_BZIP2 +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ +#define CONFIG_MTD_PARTITIONS /* * mv-plug-common.h should be defined after CMD configs since it used them @@ -42,6 +44,11 @@ #define CONFIG_ENV_SIZE 0x20000 /* 128k */ #define CONFIG_ENV_ADDR 0x80000 #define CONFIG_ENV_OFFSET 0x80000 /* env starts here */ +/* + * Environment is right behind U-Boot in flash. Make sure U-Boot + * doesn't grow into the environment area. + */ +#define CONFIG_BOARD_SIZE_LIMIT CONFIG_ENV_OFFSET /* * Default environment variables diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 4de2aa79290..acac4a71083 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -5,9 +5,6 @@ #ifndef __CONFIG_SOCFPGA_COMMON_H__ #define __CONFIG_SOCFPGA_COMMON_H__ -/* Virtual target or real hardware */ -#undef CONFIG_SOCFPGA_VIRTUAL_TARGET - /* * High level configuration */ @@ -35,10 +32,8 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0xFFE00000 #define CONFIG_SYS_INIT_RAM_SIZE 0x40000 /* 256KB */ #endif -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE) #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 @@ -78,7 +73,7 @@ /* * Ethernet on SoC (EMAC) */ -#if defined(CONFIG_CMD_NET) && !defined(CONFIG_SOCFPGA_VIRTUAL_TARGET) +#ifdef CONFIG_CMD_NET #define CONFIG_DW_ALTDESCRIPTOR #define CONFIG_MII #endif @@ -97,11 +92,7 @@ #define CONFIG_SYS_TIMERBASE SOCFPGA_OSC1TIMER0_ADDRESS #define CONFIG_SYS_TIMER_COUNTS_DOWN #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4) -#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET -#define CONFIG_SYS_TIMER_RATE 2400000 -#else #define CONFIG_SYS_TIMER_RATE 25000000 -#endif /* * L4 Watchdog @@ -182,16 +173,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); * Serial Driver */ #define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE -4 -#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET -#define CONFIG_SYS_NS16550_CLK 1000000 -#elif defined(CONFIG_TARGET_SOCFPGA_GEN5) -#define CONFIG_SYS_NS16550_COM1 SOCFPGA_UART0_ADDRESS -#define CONFIG_SYS_NS16550_CLK 100000000 -#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) -#define CONFIG_SYS_NS16550_COM1 SOCFPGA_UART1_ADDRESS -#define CONFIG_SYS_NS16550_CLK 50000000 -#endif /* * USB @@ -245,17 +226,34 @@ unsigned int cm_get_qspi_controller_clk_hz(void); /* * SPL * - * SRAM Memory layout: + * SRAM Memory layout for gen 5: * * 0xFFFF_0000 ...... Start of SRAM * 0xFFFF_xxxx ...... Top of stack (grows down) * 0xFFFF_yyyy ...... Malloc area * 0xFFFF_zzzz ...... Global Data * 0xFFFF_FF00 ...... End of SRAM + * + * SRAM Memory layout for Arria 10: + * 0xFFE0_0000 ...... Start of SRAM (bottom) + * 0xFFEx_xxxx ...... Top of stack (grows down to bottom) + * 0xFFEy_yyyy ...... Global Data + * 0xFFEz_zzzz ...... Malloc area (grows up to top) + * 0xFFE3_FFFF ...... End of SRAM (top) */ #define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR #define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_SIZE +#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10) +/* SPL memory allocation configuration, this is for FAT implementation */ +#ifndef CONFIG_SYS_SPL_MALLOC_START +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 +#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_INIT_RAM_SIZE - \ + CONFIG_SYS_SPL_MALLOC_SIZE + \ + CONFIG_SYS_INIT_RAM_ADDR) +#endif +#endif + /* SPL SDMMC boot support */ #ifdef CONFIG_SPL_MMC_SUPPORT #if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT) @@ -282,7 +280,11 @@ unsigned int cm_get_qspi_controller_clk_hz(void); /* * Stack setup */ +#if defined(CONFIG_TARGET_SOCFPGA_GEN5) #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR +#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) +#define CONFIG_SPL_STACK CONFIG_SYS_SPL_MALLOC_START +#endif /* Extra Environment */ #ifndef CONFIG_SPL_BUILD diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h index b4e4619266a..d8bf3b6580e 100644 --- a/include/configs/stih410-b2260.h +++ b/include/configs/stih410-b2260.h @@ -31,6 +31,7 @@ "fdtfile=stih410-b2260.dtb\0" \ "fdt_addr_r=0x47000000\0" \ "scriptaddr=0x50000000\0" \ + "pxefile_addr_r=0x50100000\0" \ "fdt_high=0xffffffffffffffff\0" \ "initrd_high=0xffffffffffffffff\0" \ "ramdisk_addr_r=0x48000000\0" \ diff --git a/include/configs/stm32f429-discovery.h b/include/configs/stm32f429-discovery.h index 4fd9c23e4e9..46eda1d5182 100644 --- a/include/configs/stm32f429-discovery.h +++ b/include/configs/stm32f429-discovery.h @@ -22,10 +22,10 @@ #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_RAM_CS 1 #define CONFIG_SYS_RAM_FREQ_DIV 2 -#define CONFIG_SYS_RAM_BASE 0xD0000000 +#define CONFIG_SYS_RAM_BASE 0x90000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_RAM_BASE -#define CONFIG_SYS_LOAD_ADDR 0xD0400000 -#define CONFIG_LOADADDR 0xD0400000 +#define CONFIG_SYS_LOAD_ADDR 0x90400000 +#define CONFIG_LOADADDR 0x90400000 #define CONFIG_SYS_MAX_FLASH_SECT 12 #define CONFIG_SYS_MAX_FLASH_BANKS 2 diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index f710c8fe2a4..b631f79df8c 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -168,10 +168,10 @@ "run boot_common\0" \ "tftpboot=tftpboot $kernel_addr_load $bootfile && " \ "tftpboot $ramdisk_addr_r $ramdisk_file &&" \ - "tftpboot $fdt_addr_r $fdt_file &&" \ + "tftpboot $fdt_addr_r $fdtfile &&" \ "run boot_common\0" \ "__nfsboot=tftpboot $kernel_addr_load $bootfile && " \ - "tftpboot $fdt_addr_r $fdt_file &&" \ + "tftpboot $fdt_addr_r $fdtfile &&" \ "setenv ramdisk_addr_r - &&" \ "run boot_common\0" #endif diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h index 0b5f9403412..43f986342de 100644 --- a/include/configs/vining_2000.h +++ b/include/configs/vining_2000.h @@ -98,7 +98,6 @@ #ifdef CONFIG_ENV_IS_IN_MMC #define CONFIG_SUPPORT_EMMC_BOOT -#define CONFIG_SUPPORT_EMMC_RPMB #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC4 eMMC */ /* 0=user, 1=boot0, 2=boot1, * 4..7=general0..3. */ #define CONFIG_SYS_MMC_ENV_PART 1 /* boot0 */ diff --git a/include/configs/xilinx_zynqmp_mini.h b/include/configs/xilinx_zynqmp_mini.h index 947d3083dae..96ff6c9f021 100644 --- a/include/configs/xilinx_zynqmp_mini.h +++ b/include/configs/xilinx_zynqmp_mini.h @@ -32,7 +32,6 @@ /* BOOTP options */ #undef CONFIG_BOOTP_BOOTFILESIZE #undef CONFIG_BOOTP_MAY_FAIL -#undef CONFIG_CMD_UNZIP #undef CONFIG_NR_DRAM_BANKS diff --git a/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h b/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h index 852c2238de4..f0ab3f15922 100644 --- a/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h +++ b/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h @@ -11,7 +11,6 @@ #define CONFIG_ZYNQ_SDHCI0 #define CONFIG_ZYNQ_SDHCI1 -#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR} #include <configs/xilinx_zynqmp.h> diff --git a/include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h b/include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h deleted file mode 100644 index 2533ab86090..00000000000 --- a/include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h +++ /dev/null @@ -1,16 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Configuration for Xilinx ZynqMP zc1751 XM016 DC2 - * - * (C) Copyright 2015 Xilinx, Inc. - * Michal Simek <michal.simek@xilinx.com> - */ - -#ifndef __CONFIG_ZYNQMP_ZC1751_XM016_DC2_H -#define __CONFIG_ZYNQMP_ZC1751_XM016_DC2_H - -#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB1_XHCI_BASEADDR} - -#include <configs/xilinx_zynqmp.h> - -#endif /* __CONFIG_ZYNQMP_ZC1751_XM016_DC2_H */ diff --git a/include/configs/xilinx_zynqmp_zc1751_xm017_dc3.h b/include/configs/xilinx_zynqmp_zc1751_xm017_dc3.h index f7d4ab2800c..bd4a0c3178b 100644 --- a/include/configs/xilinx_zynqmp_zc1751_xm017_dc3.h +++ b/include/configs/xilinx_zynqmp_zc1751_xm017_dc3.h @@ -11,9 +11,6 @@ #define CONFIG_ZYNQ_SDHCI1 -#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \ - ZYNQMP_USB1_XHCI_BASEADDR} - #include <configs/xilinx_zynqmp.h> #endif /* __CONFIG_ZYNQMP_ZC1751_XM017_DC3_H */ diff --git a/include/configs/xilinx_zynqmp_zcu100.h b/include/configs/xilinx_zynqmp_zcu100.h index 029347da479..b65d0c1cddd 100644 --- a/include/configs/xilinx_zynqmp_zcu100.h +++ b/include/configs/xilinx_zynqmp_zcu100.h @@ -24,9 +24,6 @@ {0, {{I2C_MUX_PCA9548, 0x75, 7} } }, \ } -#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \ - ZYNQMP_USB1_XHCI_BASEADDR} - #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_ASIX diff --git a/include/configs/xilinx_zynqmp_zcu102.h b/include/configs/xilinx_zynqmp_zcu102.h index c61e1b5e27c..ca11b97c7c4 100644 --- a/include/configs/xilinx_zynqmp_zcu102.h +++ b/include/configs/xilinx_zynqmp_zcu102.h @@ -35,8 +35,6 @@ #define CONFIG_PCA953X -#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR} - #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 #define CONFIG_ZYNQ_EEPROM_BUS 5 #define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x54 diff --git a/include/configs/xilinx_zynqmp_zcu104.h b/include/configs/xilinx_zynqmp_zcu104.h index 8d417f45e01..7e3b9ad7058 100644 --- a/include/configs/xilinx_zynqmp_zcu104.h +++ b/include/configs/xilinx_zynqmp_zcu104.h @@ -26,8 +26,6 @@ #define CONFIG_PCA953X -#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR} - #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 #include <configs/xilinx_zynqmp.h> diff --git a/include/configs/xilinx_zynqmp_zcu106.h b/include/configs/xilinx_zynqmp_zcu106.h index 01ac12a53c1..cc2d145ddd9 100644 --- a/include/configs/xilinx_zynqmp_zcu106.h +++ b/include/configs/xilinx_zynqmp_zcu106.h @@ -35,8 +35,6 @@ #define CONFIG_PCA953X -#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR} - #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 #define CONFIG_ZYNQ_EEPROM_BUS 5 #define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x54 diff --git a/include/configs/xilinx_zynqmp_zcu111.h b/include/configs/xilinx_zynqmp_zcu111.h index 3233b379798..8f8cb4f0870 100644 --- a/include/configs/xilinx_zynqmp_zcu111.h +++ b/include/configs/xilinx_zynqmp_zcu111.h @@ -38,8 +38,6 @@ #define CONFIG_PCA953X -#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR} - #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 #define CONFIG_ZYNQ_EEPROM_BUS 5 #define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x54 diff --git a/include/dm/fdtaddr.h b/include/dm/fdtaddr.h index db4c11e0832..49a6ffd5f83 100644 --- a/include/dm/fdtaddr.h +++ b/include/dm/fdtaddr.h @@ -34,6 +34,28 @@ fdt_addr_t devfdt_get_addr(struct udevice *dev); void *devfdt_get_addr_ptr(struct udevice *dev); /** + * devfdt_remap_addr() - Return pointer to the memory-mapped I/O address + * of the reg property of a device + * + * @dev: Pointer to a device + * + * @return Pointer to addr, or NULL if there is no such property + */ +void *devfdt_remap_addr(struct udevice *dev); + +/** + * devfdt_remap_addr_index() - Return indexed pointer to the memory-mapped + * I/O address of the reg property of a device + * @index: the 'reg' property can hold a list of <addr, size> pairs + * and @index is used to select which one is required + * + * @dev: Pointer to a device + * + * @return Pointer to addr, or NULL if there is no such property + */ +void *devfdt_remap_addr_index(struct udevice *dev, int index); + +/** * devfdt_map_physmem() - Read device address from reg property of the * device node and map the address into CPU address * space. diff --git a/include/dm/read.h b/include/dm/read.h index 4a725bc923b..a27b8554fb1 100644 --- a/include/dm/read.h +++ b/include/dm/read.h @@ -113,6 +113,18 @@ int dev_read_size(struct udevice *dev, const char *propname); fdt_addr_t dev_read_addr_index(struct udevice *dev, int index); /** + * dev_remap_addr_index() - Get the indexed reg property of a device + * as a memory-mapped I/O pointer + * + * @dev: Device to read from + * @index: the 'reg' property can hold a list of <addr, size> pairs + * and @index is used to select which one is required + * + * @return pointer or NULL if not found + */ +void *dev_remap_addr_index(struct udevice *dev, int index); + +/** * dev_read_addr() - Get the reg property of a device * * @dev: Device to read from @@ -132,6 +144,16 @@ fdt_addr_t dev_read_addr(struct udevice *dev); void *dev_read_addr_ptr(struct udevice *dev); /** + * dev_remap_addr() - Get the reg property of a device as a + * memory-mapped I/O pointer + * + * @dev: Device to read from + * + * @return pointer or NULL if not found + */ +void *dev_remap_addr(struct udevice *dev); + +/** * dev_read_addr_size() - get address and size from a device property * * This does no address translation. It simply reads an property that contains @@ -482,6 +504,16 @@ static inline void *dev_read_addr_ptr(struct udevice *dev) return devfdt_get_addr_ptr(dev); } +static inline void *dev_remap_addr(struct udevice *dev) +{ + return devfdt_remap_addr(dev); +} + +static inline void *dev_remap_addr_index(struct udevice *dev, int index) +{ + return devfdt_remap_addr_index(dev, index); +} + static inline fdt_addr_t dev_read_addr_size(struct udevice *dev, const char *propname, fdt_size_t *sizep) diff --git a/include/dt-bindings/clock/r8a77990-cpg-mssr.h b/include/dt-bindings/clock/r8a77990-cpg-mssr.h new file mode 100644 index 00000000000..c806fce449d --- /dev/null +++ b/include/dt-bindings/clock/r8a77990-cpg-mssr.h @@ -0,0 +1,63 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2018 Renesas Electronics Corp. + */ +#ifndef __DT_BINDINGS_CLOCK_R8A77990_CPG_MSSR_H__ +#define __DT_BINDINGS_CLOCK_R8A77990_CPG_MSSR_H__ + +#include <dt-bindings/clock/renesas-cpg-mssr.h> + +/* r8a77990 CPG Core Clocks */ +#define R8A77990_CLK_Z2 0 +#define R8A77990_CLK_ZR 1 +#define R8A77990_CLK_ZG 2 +#define R8A77990_CLK_ZTR 3 +#define R8A77990_CLK_ZT 4 +#define R8A77990_CLK_ZX 5 +#define R8A77990_CLK_S0D1 6 +#define R8A77990_CLK_S0D3 7 +#define R8A77990_CLK_S0D6 8 +#define R8A77990_CLK_S0D12 9 +#define R8A77990_CLK_S0D24 10 +#define R8A77990_CLK_S1D1 11 +#define R8A77990_CLK_S1D2 12 +#define R8A77990_CLK_S1D4 13 +#define R8A77990_CLK_S2D1 14 +#define R8A77990_CLK_S2D2 15 +#define R8A77990_CLK_S2D4 16 +#define R8A77990_CLK_S3D1 17 +#define R8A77990_CLK_S3D2 18 +#define R8A77990_CLK_S3D4 19 +#define R8A77990_CLK_S0D6C 20 +#define R8A77990_CLK_S3D1C 21 +#define R8A77990_CLK_S3D2C 22 +#define R8A77990_CLK_S3D4C 23 +#define R8A77990_CLK_LB 24 +#define R8A77990_CLK_CL 25 +#define R8A77990_CLK_ZB3 26 +#define R8A77990_CLK_ZB3D2 27 +#define R8A77990_CLK_CR 28 +#define R8A77990_CLK_CRD2 29 +#define R8A77990_CLK_SD0H 30 +#define R8A77990_CLK_SD0 31 +#define R8A77990_CLK_SD1H 32 +#define R8A77990_CLK_SD1 33 +#define R8A77990_CLK_SD3H 34 +#define R8A77990_CLK_SD3 35 +#define R8A77990_CLK_RPC 36 +#define R8A77990_CLK_RPCD2 37 +#define R8A77990_CLK_ZA2 38 +#define R8A77990_CLK_ZA8 39 +#define R8A77990_CLK_Z2D 40 +#define R8A77990_CLK_CANFD 41 +#define R8A77990_CLK_MSO 42 +#define R8A77990_CLK_R 43 +#define R8A77990_CLK_OSC 44 +#define R8A77990_CLK_LV0 45 +#define R8A77990_CLK_LV1 46 +#define R8A77990_CLK_CSI0 47 +#define R8A77990_CLK_POST3 48 +#define R8A77990_CLK_CP 49 +#define R8A77990_CLK_CPEX 50 + +#endif /* __DT_BINDINGS_CLOCK_R8A77990_CPG_MSSR_H__ */ diff --git a/include/dt-bindings/leds/leds-netxbig.h b/include/dt-bindings/leds/leds-netxbig.h new file mode 100644 index 00000000000..92658b0310b --- /dev/null +++ b/include/dt-bindings/leds/leds-netxbig.h @@ -0,0 +1,18 @@ +/* + * This header provides constants for netxbig LED bindings. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef _DT_BINDINGS_LEDS_NETXBIG_H +#define _DT_BINDINGS_LEDS_NETXBIG_H + +#define NETXBIG_LED_OFF 0 +#define NETXBIG_LED_ON 1 +#define NETXBIG_LED_SATA 2 +#define NETXBIG_LED_TIMER1 3 +#define NETXBIG_LED_TIMER2 4 + +#endif /* _DT_BINDINGS_LEDS_NETXBIG_H */ diff --git a/include/dt-bindings/leds/leds-ns2.h b/include/dt-bindings/leds/leds-ns2.h new file mode 100644 index 00000000000..fd615749e70 --- /dev/null +++ b/include/dt-bindings/leds/leds-ns2.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _DT_BINDINGS_LEDS_NS2_H +#define _DT_BINDINGS_LEDS_NS2_H + +#define NS_V2_LED_OFF 0 +#define NS_V2_LED_ON 1 +#define NS_V2_LED_SATA 2 + +#endif diff --git a/include/dt-bindings/pinctrl/pinctrl-snapdragon.h b/include/dt-bindings/pinctrl/pinctrl-snapdragon.h new file mode 100644 index 00000000000..615affb6f26 --- /dev/null +++ b/include/dt-bindings/pinctrl/pinctrl-snapdragon.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * This header provides constants for Qualcomm Snapdragon pinctrl bindings. + * + * (C) Copyright 2018 Ramon Fried <ramon.fried@gmail.com> + * + */ + +#ifndef _DT_BINDINGS_PINCTRL_SNAPDRAGON_H +#define _DT_BINDINGS_PINCTRL_SNAPDRAGON_H + +/* GPIO Drive Strength */ +#define DRIVE_STRENGTH_2MA 0 +#define DRIVE_STRENGTH_4MA 1 +#define DRIVE_STRENGTH_6MA 2 +#define DRIVE_STRENGTH_8MA 3 +#define DRIVE_STRENGTH_10MA 4 +#define DRIVE_STRENGTH_12MA 5 +#define DRIVE_STRENGTH_14MA 6 +#define DRIVE_STRENGTH_16MA 7 + +#endif diff --git a/include/dt_table.h b/include/dt_table.h new file mode 100644 index 00000000000..7fb16e900c1 --- /dev/null +++ b/include/dt_table.h @@ -0,0 +1,49 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ +/* + * This is from the Android Project, + * Repository: https://android.googlesource.com/platform/system/libufdt + * File: utils/src/dt_table.h + * Commit: 2626d8b9e4d8e8c6cc67ceb1dc4e05a47779785c + * Copyright (C) 2017 The Android Open Source Project + */ + +#ifndef DT_TABLE_H +#define DT_TABLE_H + +#include <linux/types.h> + +#define DT_TABLE_MAGIC 0xd7b7ab1e +#define DT_TABLE_DEFAULT_PAGE_SIZE 2048 +#define DT_TABLE_DEFAULT_VERSION 0 + +struct dt_table_header { + u32 magic; /* DT_TABLE_MAGIC */ + u32 total_size; /* includes dt_table_header + all dt_table_entry + * and all dtb/dtbo + */ + u32 header_size; /* sizeof(dt_table_header) */ + + u32 dt_entry_size; /* sizeof(dt_table_entry) */ + u32 dt_entry_count; /* number of dt_table_entry */ + u32 dt_entries_offset; /* offset to the first dt_table_entry + * from head of dt_table_header. + * The value will be equal to header_size if + * no padding is appended + */ + u32 page_size; /* flash page size we assume */ + u32 version; /* DTBO image version, the current version is 0. + * The version will be incremented when the + * dt_table_header struct is updated. + */ +}; + +struct dt_table_entry { + u32 dt_size; + u32 dt_offset; /* offset from head of dt_table_header */ + + u32 id; /* optional, must be zero if unused */ + u32 rev; /* optional, must be zero if unused */ + u32 custom[4]; /* optional, must be zero if unused */ +}; + +#endif diff --git a/include/efi_api.h b/include/efi_api.h index 64c27e494bc..094be6edf9b 100644 --- a/include/efi_api.h +++ b/include/efi_api.h @@ -214,15 +214,15 @@ struct efi_runtime_services { uint32_t descriptor_version, struct efi_mem_desc *virtmap); efi_status_t (*convert_pointer)(unsigned long dbg, void **address); - efi_status_t (EFIAPI *get_variable)(s16 *variable_name, - efi_guid_t *vendor, u32 *attributes, - unsigned long *data_size, void *data); - efi_status_t (EFIAPI *get_next_variable)( - unsigned long *variable_name_size, - s16 *variable_name, efi_guid_t *vendor); - efi_status_t (EFIAPI *set_variable)(s16 *variable_name, - efi_guid_t *vendor, u32 attributes, - unsigned long data_size, void *data); + efi_status_t (EFIAPI *get_variable)(u16 *variable_name, + efi_guid_t *vendor, u32 *attributes, + efi_uintn_t *data_size, void *data); + efi_status_t (EFIAPI *get_next_variable_name)( + efi_uintn_t *variable_name_size, + u16 *variable_name, efi_guid_t *vendor); + efi_status_t (EFIAPI *set_variable)(u16 *variable_name, + efi_guid_t *vendor, u32 attributes, + efi_uintn_t data_size, void *data); efi_status_t (EFIAPI *get_next_high_mono_count)( uint32_t *high_count); void (EFIAPI *reset_system)(enum efi_reset_type reset_type, @@ -239,9 +239,9 @@ struct efi_runtime_services { u32 reset_type); efi_status_t (EFIAPI *query_variable_info)( u32 attributes, - u64 maximum_variable_storage_size, - u64 remaining_variable_storage_size, - u64 maximum_variable_size); + u64 *maximum_variable_storage_size, + u64 *remaining_variable_storage_size, + u64 *maximum_variable_size); }; /* EFI event group GUID definitions */ diff --git a/include/efi_loader.h b/include/efi_loader.h index 2868ca25abb..c66252a7dd2 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -75,6 +75,13 @@ const char *__efi_nesting_dec(void); ##__VA_ARGS__); \ }) +#ifdef CONFIG_SYS_CACHELINE_SIZE +#define EFI_CACHELINE_SIZE CONFIG_SYS_CACHELINE_SIZE +#else +/* Just use the greatest cache flush alignment requirement I'm aware of */ +#define EFI_CACHELINE_SIZE 128 +#endif + extern struct efi_runtime_services efi_runtime_services; extern struct efi_system_table systab; @@ -207,6 +214,13 @@ efi_status_t efi_net_register(void); /* Called by bootefi to make the watchdog available */ efi_status_t efi_watchdog_register(void); /* Called by bootefi to make SMBIOS tables available */ +/** + * efi_smbios_register() - write out SMBIOS tables + * + * Called by bootefi to make SMBIOS tables available + * + * @return 0 if OK, -ENOMEM if no memory is available for the tables + */ efi_status_t efi_smbios_register(void); struct efi_simple_file_system_protocol * @@ -415,15 +429,15 @@ efi_status_t EFIAPI efi_selftest(efi_handle_t image_handle, struct efi_system_table *systab); #endif -efi_status_t EFIAPI efi_get_variable(s16 *variable_name, - efi_guid_t *vendor, u32 *attributes, - unsigned long *data_size, void *data); -efi_status_t EFIAPI efi_get_next_variable( - unsigned long *variable_name_size, - s16 *variable_name, efi_guid_t *vendor); -efi_status_t EFIAPI efi_set_variable(s16 *variable_name, - efi_guid_t *vendor, u32 attributes, - unsigned long data_size, void *data); +efi_status_t EFIAPI efi_get_variable(u16 *variable_name, efi_guid_t *vendor, + u32 *attributes, efi_uintn_t *data_size, + void *data); +efi_status_t EFIAPI efi_get_next_variable_name(efi_uintn_t *variable_name_size, + u16 *variable_name, + efi_guid_t *vendor); +efi_status_t EFIAPI efi_set_variable(u16 *variable_name, efi_guid_t *vendor, + u32 attributes, efi_uintn_t data_size, + void *data); void *efi_bootmgr_load(struct efi_device_path **device_path, struct efi_device_path **file_path); diff --git a/include/fastboot-internal.h b/include/fastboot-internal.h new file mode 100644 index 00000000000..bf2f2b3c891 --- /dev/null +++ b/include/fastboot-internal.h @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef _FASTBOOT_INTERNAL_H_ +#define _FASTBOOT_INTERNAL_H_ + +/** + * fastboot_buf_addr - base address of the fastboot download buffer + */ +extern void *fastboot_buf_addr; + +/** + * fastboot_buf_size - size of the fastboot download buffer + */ +extern u32 fastboot_buf_size; + +/** + * fastboot_progress_callback - callback executed during long operations + */ +extern void (*fastboot_progress_callback)(const char *msg); + +/** + * fastboot_getvar() - Writes variable indicated by cmd_parameter to response. + * + * @cmd_parameter: Pointer to command parameter + * @response: Pointer to fastboot response buffer + * + * Look up cmd_parameter first as an environment variable of the form + * fastboot.<cmd_parameter>, if that exists return use its value to set + * response. + * + * Otherwise lookup the name of variable and execute the appropriate + * function to return the requested value. + */ +void fastboot_getvar(char *cmd_parameter, char *response); + +#endif diff --git a/include/fastboot.h b/include/fastboot.h index 009f1a72e10..1933b1d98e3 100644 --- a/include/fastboot.h +++ b/include/fastboot.h @@ -12,10 +12,143 @@ #ifndef _FASTBOOT_H_ #define _FASTBOOT_H_ +#define FASTBOOT_VERSION "0.4" + /* The 64 defined bytes plus \0 */ +#define FASTBOOT_COMMAND_LEN (64 + 1) #define FASTBOOT_RESPONSE_LEN (64 + 1) -void fastboot_fail(const char *reason); -void fastboot_okay(const char *reason); +/** + * All known commands to fastboot + */ +enum { + FASTBOOT_COMMAND_GETVAR = 0, + FASTBOOT_COMMAND_DOWNLOAD, +#if CONFIG_IS_ENABLED(FASTBOOT_FLASH) + FASTBOOT_COMMAND_FLASH, + FASTBOOT_COMMAND_ERASE, +#endif + FASTBOOT_COMMAND_BOOT, + FASTBOOT_COMMAND_CONTINUE, + FASTBOOT_COMMAND_REBOOT, + FASTBOOT_COMMAND_REBOOT_BOOTLOADER, + FASTBOOT_COMMAND_SET_ACTIVE, +#if CONFIG_IS_ENABLED(FASTBOOT_CMD_OEM_FORMAT) + FASTBOOT_COMMAND_OEM_FORMAT, +#endif + + FASTBOOT_COMMAND_COUNT +}; + +/** + * fastboot_response() - Writes a response of the form "$tag$reason". + * + * @tag: The first part of the response + * @response: Pointer to fastboot response buffer + * @format: printf style format string + */ +void fastboot_response(const char *tag, char *response, + const char *format, ...) + __attribute__ ((format (__printf__, 3, 4))); + +/** + * fastboot_fail() - Write a FAIL response of the form "FAIL$reason". + * + * @reason: Pointer to returned reason string + * @response: Pointer to fastboot response buffer + */ +void fastboot_fail(const char *reason, char *response); + +/** + * fastboot_okay() - Write an OKAY response of the form "OKAY$reason". + * + * @reason: Pointer to returned reason string, or NULL to send a bare "OKAY" + * @response: Pointer to fastboot response buffer + */ +void fastboot_okay(const char *reason, char *response); + +/** + * fastboot_set_reboot_flag() - Set flag to indicate reboot-bootloader + * + * Set flag which indicates that we should reboot into the bootloader + * following the reboot that fastboot executes after this function. + * + * This function should be overridden in your board file with one + * which sets whatever flag your board specific Android bootloader flow + * requires in order to re-enter the bootloader. + */ +int fastboot_set_reboot_flag(void); + +/** + * fastboot_set_progress_callback() - set progress callback + * + * @progress: Pointer to progress callback + * + * Set a callback which is invoked periodically during long running operations + * (flash and erase). This can be used (for example) by the UDP transport to + * send INFO responses to keep the client alive whilst those commands are + * executing. + */ +void fastboot_set_progress_callback(void (*progress)(const char *msg)); + +/* + * fastboot_init() - initialise new fastboot protocol session + * + * @buf_addr: Pointer to download buffer, or NULL for default + * @buf_size: Size of download buffer, or zero for default + */ +void fastboot_init(void *buf_addr, u32 buf_size); + +/** + * fastboot_boot() - Execute fastboot boot command + * + * If ${fastboot_bootcmd} is set, run that command to execute the boot + * process, if that returns, then exit the fastboot server and return + * control to the caller. + * + * Otherwise execute "bootm <fastboot_buf_addr>", if that fails, reset + * the board. + */ +void fastboot_boot(void); + +/** + * fastboot_handle_command() - Handle fastboot command + * + * @cmd_string: Pointer to command string + * @response: Pointer to fastboot response buffer + * + * Return: Executed command, or -1 if not recognized + */ +int fastboot_handle_command(char *cmd_string, char *response); + +/** + * fastboot_data_remaining() - return bytes remaining in current transfer + * + * Return: Number of bytes left in the current download + */ +u32 fastboot_data_remaining(void); + +/** + * fastboot_data_download() - Copy image data to fastboot_buf_addr. + * + * @fastboot_data: Pointer to received fastboot data + * @fastboot_data_len: Length of received fastboot data + * @response: Pointer to fastboot response buffer + * + * Copies image data from fastboot_data to fastboot_buf_addr. Writes to + * response. fastboot_bytes_received is updated to indicate the number + * of bytes that have been transferred. + */ +void fastboot_data_download(const void *fastboot_data, + unsigned int fastboot_data_len, char *response); + +/** + * fastboot_data_complete() - Mark current transfer complete + * + * @response: Pointer to fastboot response buffer + * + * Set image_size and ${filesize} to the total size of the downloaded image. + */ +void fastboot_data_complete(char *response); #endif /* _FASTBOOT_H_ */ diff --git a/include/fb_mmc.h b/include/fb_mmc.h index a2d7c4895fa..fd5db9eac87 100644 --- a/include/fb_mmc.h +++ b/include/fb_mmc.h @@ -3,6 +3,35 @@ * Copyright 2014 Broadcom Corporation. */ -void fb_mmc_flash_write(const char *cmd, void *download_buffer, - unsigned int download_bytes); -void fb_mmc_erase(const char *cmd); +#ifndef _FB_MMC_H_ +#define _FB_MMC_H_ + +/** + * fastboot_mmc_get_part_info() - Lookup eMMC partion by name + * + * @part_name: Named partition to lookup + * @dev_desc: Pointer to returned blk_desc pointer + * @part_info: Pointer to returned disk_partition_t + * @response: Pointer to fastboot response buffer + */ +int fastboot_mmc_get_part_info(char *part_name, struct blk_desc **dev_desc, + disk_partition_t *part_info, char *response); + +/** + * fastboot_mmc_flash_write() - Write image to eMMC for fastboot + * + * @cmd: Named partition to write image to + * @download_buffer: Pointer to image data + * @download_bytes: Size of image data + * @response: Pointer to fastboot response buffer + */ +void fastboot_mmc_flash_write(const char *cmd, void *download_buffer, + u32 download_bytes, char *response); +/** + * fastboot_mmc_flash_erase() - Erase eMMC for fastboot + * + * @cmd: Named partition to erase + * @response: Pointer to fastboot response buffer + */ +void fastboot_mmc_erase(const char *cmd, char *response); +#endif diff --git a/include/fb_nand.h b/include/fb_nand.h index 3daae8c4ca4..08ab0e28a65 100644 --- a/include/fb_nand.h +++ b/include/fb_nand.h @@ -4,6 +4,37 @@ * Copyright 2015 Free Electrons. */ -void fb_nand_flash_write(const char *cmd, void *download_buffer, - unsigned int download_bytes); -void fb_nand_erase(const char *cmd); +#ifndef _FB_NAND_H_ +#define _FB_NAND_H_ + +#include <jffs2/load_kernel.h> + +/** + * fastboot_nand_get_part_info() - Lookup NAND partion by name + * + * @part_name: Named device to lookup + * @part_info: Pointer to returned part_info pointer + * @response: Pointer to fastboot response buffer + */ +int fastboot_nand_get_part_info(char *part_name, struct part_info **part_info, + char *response); + +/** + * fastboot_nand_flash_write() - Write image to NAND for fastboot + * + * @cmd: Named device to write image to + * @download_buffer: Pointer to image data + * @download_bytes: Size of image data + * @response: Pointer to fastboot response buffer + */ +void fastboot_nand_flash_write(const char *cmd, void *download_buffer, + u32 download_bytes, char *response); + +/** + * fastboot_nand_flash_erase() - Erase NAND for fastboot + * + * @cmd: Named device to erase + * @response: Pointer to fastboot response buffer + */ +void fastboot_nand_erase(const char *cmd, char *response); +#endif diff --git a/include/fdtdec.h b/include/fdtdec.h index 5456a17d1a7..c15b2a04a7a 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -160,6 +160,7 @@ enum fdt_compat_id { COMPAT_ALTERA_SOCFPGA_F2SDR2, /* SoCFPGA fpga2SDRAM2 bridge */ COMPAT_ALTERA_SOCFPGA_FPGA0, /* SOCFPGA FPGA manager */ COMPAT_ALTERA_SOCFPGA_NOC, /* SOCFPGA Arria 10 NOC */ + COMPAT_ALTERA_SOCFPGA_CLK_INIT, /* SOCFPGA Arria 10 clk init */ COMPAT_COUNT, }; diff --git a/include/fpga.h b/include/fpga.h index f4440933531..195f0bdd57a 100644 --- a/include/fpga.h +++ b/include/fpga.h @@ -20,6 +20,9 @@ /* device numbers must be non-negative */ #define FPGA_INVALID_DEVICE -1 +#define FPGA_ENC_USR_KEY 1 +#define FPGA_NO_ENC_OR_NO_AUTH 2 + /* root data type defintions */ typedef enum { /* typedef fpga_type */ fpga_min_type, /* range check value */ @@ -42,6 +45,12 @@ typedef struct { /* typedef fpga_desc */ int fstype; } fpga_fs_info; +struct fpga_secure_info { + u8 *userkey_addr; + u8 authflag; + u8 encflag; +}; + typedef enum { BIT_FULL = 0, BIT_PARTIAL, @@ -58,6 +67,8 @@ int fpga_load(int devnum, const void *buf, size_t bsize, bitstream_type bstype); int fpga_fsload(int devnum, const void *buf, size_t size, fpga_fs_info *fpga_fsinfo); +int fpga_loads(int devnum, const void *buf, size_t size, + struct fpga_secure_info *fpga_sec_info); int fpga_loadbitstream(int devnum, char *fpgadata, size_t size, bitstream_type bstype); int fpga_dump(int devnum, const void *buf, size_t bsize); diff --git a/include/fs.h b/include/fs.h index d703ed5027e..163da103b47 100644 --- a/include/fs.h +++ b/include/fs.h @@ -37,6 +37,16 @@ int fs_set_blk_dev(const char *ifname, const char *dev_part_str, int fstype); */ int fs_set_blk_dev_with_part(struct blk_desc *desc, int part); +/** + * fs_get_type_name() - Get type of current filesystem + * + * Return: Pointer to filesystem name + * + * Returns a string describing the current filesystem, or the sentinel + * "unsupported" for any unrecognised filesystem. + */ +const char *fs_get_type_name(void); + /* * Print the list of files on the partition previously set by fs_set_blk_dev(), * in directory "dirname". diff --git a/include/fsl_pmic.h b/include/fsl_pmic.h index 6cab77ecb59..132db817577 100644 --- a/include/fsl_pmic.h +++ b/include/fsl_pmic.h @@ -107,6 +107,7 @@ enum { /* MC34708 Definitions */ #define SWx_VOLT_MASK_MC34708 0x3F +#define SWx_1_110V_MC34708 0x24 #define SWx_1_250V_MC34708 0x30 #define SWx_1_300V_MC34708 0x34 #define TIMER_MASK_MC34708 0x300 @@ -116,4 +117,44 @@ enum { #define SWBST_CTRL 31 #define SWBST_AUTO 0x8 +#define MC34708_REG_SW12_OPMODE 28 + +#define MC34708_SW1AMODE_MASK 0x00000f +#define MC34708_SW1AMHMODE 0x000010 +#define MC34708_SW1AUOMODE 0x000020 +#define MC34708_SW1DVSSPEED 0x0000c0 +#define MC34708_SW2MODE_MASK 0x03c000 +#define MC34708_SW2MHMODE 0x040000 +#define MC34708_SW2UOMODE 0x080000 +#define MC34708_SW2DVSSPEED 0x300000 +#define MC34708_PLLEN 0x400000 +#define MC34708_PLLX 0x800000 + +#define MC34708_REG_SW345_OPMODE 29 + +#define MC34708_SW3MODE_MASK 0x00000f +#define MC34708_SW3MHMODE 0x000010 +#define MC34708_SW3UOMODE 0x000020 +#define MC34708_SW4AMODE_MASK 0x0003c0 +#define MC34708_SW4AMHMODE 0x000400 +#define MC34708_SW4AUOMODE 0x000800 +#define MC34708_SW4BMODE_MASK 0x00f000 +#define MC34708_SW4BMHMODE 0x010000 +#define MC34708_SW4BUOMODE 0x020000 +#define MC34708_SW5MODE_MASK 0x3c0000 +#define MC34708_SW5MHMODE 0x400000 +#define MC34708_SW5UOMODE 0x800000 + +#define SW_MODE_OFFOFF 0x00 +#define SW_MODE_PWMOFF 0x01 +#define SW_MODE_PFMOFF 0x03 +#define SW_MODE_APSOFF 0x04 +#define SW_MODE_PWMPWM 0x05 +#define SW_MODE_PWMAPS 0x06 +#define SW_MODE_APSAPS 0x08 +#define SW_MODE_APSPFM 0x0c +#define SW_MODE_PWMPFM 0x0d +#define SW_MODE_PFMPFM 0x0f + +#define MC34708_TRANSFER_SIZE 3 #endif diff --git a/include/image-sparse.h b/include/image-sparse.h index f39dc16617f..234c237b845 100644 --- a/include/image-sparse.h +++ b/include/image-sparse.h @@ -23,7 +23,7 @@ struct sparse_storage { lbaint_t blk, lbaint_t blkcnt); - void (*mssg)(const char *str); + void (*mssg)(const char *str, char *response); }; static inline int is_sparse_image(void *buf) @@ -38,4 +38,4 @@ static inline int is_sparse_image(void *buf) } int write_sparse_image(struct sparse_storage *info, const char *part_name, - void *data); + void *data, char *response); diff --git a/include/image.h b/include/image.h index df701e34705..95d5934344c 100644 --- a/include/image.h +++ b/include/image.h @@ -922,6 +922,7 @@ int booti_setup(ulong image, ulong *relocated_addr, ulong *size); #define FIT_SETUP_PROP "setup" #define FIT_FPGA_PROP "fpga" #define FIT_FIRMWARE_PROP "firmware" +#define FIT_STANDALONE_PROP "standalone" #define FIT_MAX_HASH_LEN HASH_MAX_DIGEST_SIZE @@ -987,6 +988,8 @@ int fit_image_get_data_offset(const void *fit, int noffset, int *data_offset); int fit_image_get_data_position(const void *fit, int noffset, int *data_position); int fit_image_get_data_size(const void *fit, int noffset, int *data_size); +int fit_image_get_data_and_size(const void *fit, int noffset, + const void **data, size_t *size); int fit_image_hash_get_algo(const void *fit, int noffset, char **algo); int fit_image_hash_get_value(const void *fit, int noffset, uint8_t **value, @@ -1046,8 +1049,6 @@ int fit_conf_get_node(const void *fit, const char *conf_uname); int fit_conf_get_prop_node(const void *fit, int noffset, const char *prop_name); -void fit_conf_print(const void *fit, int noffset, const char *p); - int fit_check_ramdisk(const void *fit, int os_noffset, uint8_t arch, int verify); diff --git a/include/linux/libfdt_env.h b/include/linux/libfdt_env.h index 0d209a64928..e2bf79c7ee8 100644 --- a/include/linux/libfdt_env.h +++ b/include/linux/libfdt_env.h @@ -6,8 +6,8 @@ * Using the same guard name as that of scripts/dtc/libfdt/libfdt_env.h * prevents it from being included. */ -#ifndef _LIBFDT_ENV_H -#define _LIBFDT_ENV_H +#ifndef LIBFDT_ENV_H +#define LIBFDT_ENV_H #include <linux/string.h> @@ -27,5 +27,5 @@ typedef __be64 fdt64_t; #define strtoul(cp, endp, base) simple_strtoul(cp, endp, base) -#endif /* _LIBFDT_ENV_H */ +#endif /* LIBFDT_ENV_H */ #endif diff --git a/include/linux/usb/otg.h b/include/linux/usb/otg.h index 0b273d8e2e8..d2604c5cafb 100644 --- a/include/linux/usb/otg.h +++ b/include/linux/usb/otg.h @@ -25,4 +25,13 @@ enum usb_dr_mode { */ enum usb_dr_mode usb_get_dr_mode(int node); +/** + * usb_get_maximum_speed() - Get maximum speed for given device + * @node: Node offset to the given device + * + * The function gets phy interface string from property 'maximum-speed', + * and returns the correspondig enum usb_device_speed + */ +enum usb_device_speed usb_get_maximum_speed(int node); + #endif /* __LINUX_USB_OTG_H */ diff --git a/include/net.h b/include/net.h index 65f51d77a55..57606855564 100644 --- a/include/net.h +++ b/include/net.h @@ -535,7 +535,7 @@ extern int net_restart_wrap; /* Tried all network devices */ enum proto_t { BOOTP, RARP, ARP, TFTPGET, DHCP, PING, DNS, NFS, CDP, NETCONS, SNTP, - TFTPSRV, TFTPPUT, LINKLOCAL + TFTPSRV, TFTPPUT, LINKLOCAL, FASTBOOT }; extern char net_boot_file_name[1024];/* Boot File name */ diff --git a/include/net/fastboot.h b/include/net/fastboot.h new file mode 100644 index 00000000000..68602095d2b --- /dev/null +++ b/include/net/fastboot.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (C) 2016 The Android Open Source Project + */ + +#ifndef __NET_FASTBOOT_H__ +#define __NET_FASTBOOT_H__ + +/**********************************************************************/ +/* + * Global functions and variables. + */ + +/** + * Wait for incoming fastboot comands. + */ +void fastboot_start_server(void); + +/**********************************************************************/ + +#endif /* __NET_FASTBOOT_H__ */ diff --git a/include/netdev.h b/include/netdev.h index 79fcee56d41..f27869072f4 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -69,7 +69,6 @@ int sh_eth_initialize(bd_t *bis); int skge_initialize(bd_t *bis); int smc91111_initialize(u8 dev_num, int base_addr); int smc911x_initialize(u8 dev_num, int base_addr); -int tsi108_eth_initialize(bd_t *bis); int uec_standard_init(bd_t *bis); int uli526x_initialize(bd_t *bis); int armada100_fec_register(unsigned long base_addr); diff --git a/include/os.h b/include/os.h index 64e89a06c94..c8e0f52d306 100644 --- a/include/os.h +++ b/include/os.h @@ -330,4 +330,25 @@ int os_spl_to_uboot(const char *fname); */ void os_localtime(struct rtc_time *rt); +/** + * os_setjmp() - Call setjmp() + * + * Call the host system's setjmp() function. + * + * @jmp: Buffer to store current execution state + * @size: Size of buffer + * @return normal setjmp() value if OK, -ENOSPC if @size is too small + */ +int os_setjmp(ulong *jmp, int size); + +/** + * os_longjmp() - Call longjmp() + * + * Call the host system's longjmp() function. + * + * @jmp: Buffer where previous execution state was stored + * @ret: Value to pass to longjmp() + */ +void os_longjmp(ulong *jmp, int ret); + #endif diff --git a/include/part_efi.h b/include/part_efi.h index 6065c571f3f..8525770445a 100644 --- a/include/part_efi.h +++ b/include/part_efi.h @@ -20,6 +20,7 @@ #include <efi.h> #define MSDOS_MBR_SIGNATURE 0xAA55 +#define MSDOS_MBR_BOOT_CODE_SIZE 440 #define EFI_PMBR_OSTYPE_EFI 0xEF #define EFI_PMBR_OSTYPE_EFI_GPT 0xEE @@ -111,7 +112,7 @@ typedef struct _gpt_entry { } __packed gpt_entry; typedef struct _legacy_mbr { - u8 boot_code[440]; + u8 boot_code[MSDOS_MBR_BOOT_CODE_SIZE]; __le32 unique_mbr_signature; __le16 unknown; struct partition partition_record[4]; diff --git a/include/pci.h b/include/pci.h index cda69076889..8e27cbfaf14 100644 --- a/include/pci.h +++ b/include/pci.h @@ -680,8 +680,21 @@ extern int pci_write_config_dword(pci_dev_t dev, int where, u32 val); void pciauto_region_init(struct pci_region *res); void pciauto_region_align(struct pci_region *res, pci_size_t size); void pciauto_config_init(struct pci_controller *hose); + +/** + * pciauto_region_allocate() - Allocate resources from a PCI resource region + * + * Allocates @size bytes from the PCI resource @res. If @supports_64bit is + * false, the result will be guaranteed to fit in 32 bits. + * + * @res: PCI region to allocate from + * @size: Amount of bytes to allocate + * @bar: Returns the PCI bus address of the allocated resource + * @supports_64bit: Whether to allow allocations above the 32-bit boundary + * @return 0 if successful, -1 on failure + */ int pciauto_region_allocate(struct pci_region *res, pci_size_t size, - pci_addr_t *bar); + pci_addr_t *bar, bool supports_64bit); #if !defined(CONFIG_DM_PCI) || defined(CONFIG_DM_PCI_COMPAT) extern int pci_hose_read_config_byte_via_dword(struct pci_controller *hose, diff --git a/include/phy-sun4i-usb.h b/include/phy-sun4i-usb.h new file mode 100644 index 00000000000..b0a45b20580 --- /dev/null +++ b/include/phy-sun4i-usb.h @@ -0,0 +1,34 @@ +/* + * Copyright (C) 2017 Jagan Teki <jagan@amarulasolutions.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __GENERIC_PHY_SUN4I_USB_H +#define __GENERIC_PHY_SUN4I_USB_H + +/** + * sun4i_usb_phy_id_detect - detect ID pin of USB PHY + * + * @phy: USB PHY port to detect ID pin + * @return 0 if OK, or a negative error code + */ +int sun4i_usb_phy_id_detect(struct phy *phy); + +/** + * sun4i_usb_phy_vbus_detect - detect VBUS pin of USB PHY + * + * @phy: USB PHY port to detect VBUS pin + * @return 0 if OK, or a negative error code + */ +int sun4i_usb_phy_vbus_detect(struct phy *phy); + +/** + * sun4i_usb_phy_set_squelch_detect() - Enable/disable squelch detect + * + * @phy: reference to a sun4i usb phy + * @enabled: wether to enable or disable squelch detect + */ +void sun4i_usb_phy_set_squelch_detect(struct phy *phy, bool enabled); + +#endif /*__GENERIC_PHY_SUN4I_USB_H */ diff --git a/include/power/pmic.h b/include/power/pmic.h index 2ca9365fc8a..be9de6b4de7 100644 --- a/include/power/pmic.h +++ b/include/power/pmic.h @@ -297,6 +297,15 @@ int pmic_reg_write(struct udevice *dev, uint reg, uint value); */ int pmic_clrsetbits(struct udevice *dev, uint reg, uint clr, uint set); +/* + * This structure holds the private data for PMIC uclass + * For now we store information about the number of bytes + * being sent at once to the device. + */ +struct uc_pmic_priv { + uint trans_len; +}; + #endif /* CONFIG_DM_PMIC */ #ifdef CONFIG_POWER diff --git a/include/serial.h b/include/serial.h index 384df94ed0b..b9ef6d91c9c 100644 --- a/include/serial.h +++ b/include/serial.h @@ -67,6 +67,12 @@ extern int usbtty_tstc(void); struct udevice; +enum serial_par { + SERIAL_PAR_NONE, + SERIAL_PAR_ODD, + SERIAL_PAR_EVEN +}; + /** * struct struct dm_serial_ops - Driver model serial operations * @@ -143,6 +149,16 @@ struct dm_serial_ops { */ int (*loop)(struct udevice *dev, int on); #endif + /** + * setparity() - Set up the parity + * + * Set up a new parity for this device. + * + * @dev: Device pointer + * @parity: parity to use + * @return 0 if OK, -ve on error + */ + int (*setparity)(struct udevice *dev, enum serial_par parity); }; /** diff --git a/include/smbios.h b/include/smbios.h index 79880ef5b5c..97b9ddce237 100644 --- a/include/smbios.h +++ b/include/smbios.h @@ -231,8 +231,9 @@ typedef int (*smbios_write_type)(ulong *addr, int handle); * * This writes SMBIOS table at a given address. * - * @addr: start address to write SMBIOS table - * @return: end address of SMBIOS table + * @addr: start address to write SMBIOS table. If this is not + * 16-byte-aligned then it will be aligned before the table is written + * @return: end address of SMBIOS table (and start address for next entry) */ ulong write_smbios_table(ulong addr); diff --git a/include/tpm-common.h b/include/tpm-common.h new file mode 100644 index 00000000000..734c2c9d539 --- /dev/null +++ b/include/tpm-common.h @@ -0,0 +1,217 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2013 The Chromium OS Authors. + * Coypright (c) 2013 Guntermann & Drunck GmbH + */ + +#ifndef __TPM_COMMON_H +#define __TPM_COMMON_H + +enum tpm_duration { + TPM_SHORT = 0, + TPM_MEDIUM = 1, + TPM_LONG = 2, + TPM_UNDEFINED, + + TPM_DURATION_COUNT, +}; + +/* + * Here is a partial implementation of TPM commands. Please consult TCG Main + * Specification for definitions of TPM commands. + */ + +#define TPM_HEADER_SIZE 10 + +/* Max buffer size supported by our tpm */ +#define TPM_DEV_BUFSIZE 1260 + +/** + * struct tpm_chip_priv - Information about a TPM, stored by the uclass + * + * These values must be set up by the device's probe() method before + * communcation is attempted. If the device has an xfer() method, this is + * not needed. There is no need to set up @buf. + * + * @duration_ms: Length of each duration type in milliseconds + * @retry_time_ms: Time to wait before retrying receive + * @pcr_count: Number of PCR per bank + * @pcr_select_min: Minimum size in bytes of the pcrSelect array + * @buf: Buffer used during the exchanges with the chip + */ +struct tpm_chip_priv { + uint duration_ms[TPM_DURATION_COUNT]; + uint retry_time_ms; +#if defined(CONFIG_TPM_V2) + uint pcr_count; + uint pcr_select_min; +#endif + u8 buf[TPM_DEV_BUFSIZE + sizeof(u8)]; /* Max buffer size + addr */ +}; + +/** + * struct tpm_ops - low-level TPM operations + * + * These are designed to avoid loops and delays in the driver itself. These + * should be handled in the uclass. + * + * In gneral you should implement everything except xfer(). Where you need + * complete control of the transfer, then xfer() can be provided and will + * override the other methods. + * + * This interface is for low-level TPM access. It does not understand the + * concept of localities or the various TPM messages. That interface is + * defined in the functions later on in this file, but they all translate + * to bytes which are sent and received. + */ +struct tpm_ops { + /** + * open() - Request access to locality 0 for the caller + * + * After all commands have been completed the caller should call + * close(). + * + * @dev: Device to close + * @return 0 ok OK, -ve on error + */ + int (*open)(struct udevice *dev); + + /** + * close() - Close the current session + * + * Releasing the locked locality. Returns 0 on success, -ve 1 on + * failure (in case lock removal did not succeed). + * + * @dev: Device to close + * @return 0 ok OK, -ve on error + */ + int (*close)(struct udevice *dev); + + /** + * get_desc() - Get a text description of the TPM + * + * @dev: Device to check + * @buf: Buffer to put the string + * @size: Maximum size of buffer + * @return length of string, or -ENOSPC it no space + */ + int (*get_desc)(struct udevice *dev, char *buf, int size); + + /** + * send() - send data to the TPM + * + * @dev: Device to talk to + * @sendbuf: Buffer of the data to send + * @send_size: Size of the data to send + * + * Returns 0 on success or -ve on failure. + */ + int (*send)(struct udevice *dev, const u8 *sendbuf, size_t send_size); + + /** + * recv() - receive a response from the TPM + * + * @dev: Device to talk to + * @recvbuf: Buffer to save the response to + * @max_size: Maximum number of bytes to receive + * + * Returns number of bytes received on success, -EAGAIN if the TPM + * response is not ready, -EINTR if cancelled, or other -ve value on + * failure. + */ + int (*recv)(struct udevice *dev, u8 *recvbuf, size_t max_size); + + /** + * cleanup() - clean up after an operation in progress + * + * This is called if receiving times out. The TPM may need to abort + * the current transaction if it did not complete, and make itself + * ready for another. + * + * @dev: Device to talk to + */ + int (*cleanup)(struct udevice *dev); + + /** + * xfer() - send data to the TPM and get response + * + * This method is optional. If it exists it is used in preference + * to send(), recv() and cleanup(). It should handle all aspects of + * TPM communication for a single transfer. + * + * @dev: Device to talk to + * @sendbuf: Buffer of the data to send + * @send_size: Size of the data to send + * @recvbuf: Buffer to save the response to + * @recv_size: Pointer to the size of the response buffer + * + * Returns 0 on success (and places the number of response bytes at + * recv_size) or -ve on failure. + */ + int (*xfer)(struct udevice *dev, const u8 *sendbuf, size_t send_size, + u8 *recvbuf, size_t *recv_size); +}; + +#define tpm_get_ops(dev) ((struct tpm_ops *)device_get_ops(dev)) + +#define MAKE_TPM_CMD_ENTRY(cmd) \ + U_BOOT_CMD_MKENT(cmd, 0, 1, do_tpm_ ## cmd, "", "") + +#define TPM_COMMAND_NO_ARG(cmd) \ +int do_##cmd(cmd_tbl_t *cmdtp, int flag, \ + int argc, char * const argv[]) \ +{ \ + if (argc != 1) \ + return CMD_RET_USAGE; \ + return report_return_code(cmd()); \ +} + +/** + * tpm_get_desc() - Get a text description of the TPM + * + * @dev: Device to check + * @buf: Buffer to put the string + * @size: Maximum size of buffer + * @return length of string, or -ENOSPC it no space + */ +int tpm_get_desc(struct udevice *dev, char *buf, int size); + +/** + * tpm_xfer() - send data to the TPM and get response + * + * This first uses the device's send() method to send the bytes. Then it calls + * recv() to get the reply. If recv() returns -EAGAIN then it will delay a + * short time and then call recv() again. + * + * Regardless of whether recv() completes successfully, it will then call + * cleanup() to finish the transaction. + * + * Note that the outgoing data is inspected to determine command type + * (ordinal) and a timeout is used for that command type. + * + * @sendbuf - buffer of the data to send + * @send_size size of the data to send + * @recvbuf - memory to save the response to + * @recv_len - pointer to the size of the response buffer + * + * Returns 0 on success (and places the number of response bytes at + * recv_len) or -ve on failure. + */ +int tpm_xfer(struct udevice *dev, const u8 *sendbuf, size_t send_size, + u8 *recvbuf, size_t *recv_size); + +/** + * Initialize TPM device. It must be called before any TPM commands. + * + * @return 0 on success, non-0 on error. + */ +int tpm_init(void); + +/** + * Retrieve the array containing all the commands. + * + * @return a cmd_tbl_t array. + */ +cmd_tbl_t *get_tpm_commands(unsigned int *size); + +#endif /* __TPM_COMMON_H */ diff --git a/include/tpm.h b/include/tpm-v1.h index c6316329f5a..6b4941ef9a2 100644 --- a/include/tpm.h +++ b/include/tpm-v1.h @@ -4,23 +4,22 @@ * Coypright (c) 2013 Guntermann & Drunck GmbH */ -#ifndef __TPM_H -#define __TPM_H +#ifndef __TPM_V1_H +#define __TPM_V1_H -/* - * Here is a partial implementation of TPM commands. Please consult TCG Main - * Specification for definitions of TPM commands. - */ - -#define TPM_HEADER_SIZE 10 +#include <tpm-common.h> -enum tpm_duration { - TPM_SHORT = 0, - TPM_MEDIUM = 1, - TPM_LONG = 2, - TPM_UNDEFINED, - - TPM_DURATION_COUNT, +/* Useful constants */ +enum { + TPM_REQUEST_HEADER_LENGTH = 10, + TPM_RESPONSE_HEADER_LENGTH = 10, + PCR_DIGEST_LENGTH = 20, + DIGEST_LENGTH = 20, + TPM_REQUEST_AUTH_LENGTH = 45, + TPM_RESPONSE_AUTH_LENGTH = 41, + /* some max lengths, valid for RSA keys <= 2048 bits */ + TPM_KEY12_MAX_LENGTH = 618, + TPM_PUBKEY_MAX_LENGTH = 288, }; enum tpm_startup_type { @@ -82,13 +81,13 @@ enum tpm_capability_areas { TPM_CAP_VERSION_VAL = 0x0000001A, }; -#define TPM_NV_PER_GLOBALLOCK (1U << 15) -#define TPM_NV_PER_PPREAD (1U << 16) -#define TPM_NV_PER_PPWRITE (1U << 0) -#define TPM_NV_PER_READ_STCLEAR (1U << 31) -#define TPM_NV_PER_WRITE_STCLEAR (1U << 14) -#define TPM_NV_PER_WRITEDEFINE (1U << 13) -#define TPM_NV_PER_WRITEALL (1U << 12) +#define TPM_NV_PER_GLOBALLOCK BIT(15) +#define TPM_NV_PER_PPREAD BIT(16) +#define TPM_NV_PER_PPWRITE BIT(0) +#define TPM_NV_PER_READ_STCLEAR BIT(31) +#define TPM_NV_PER_WRITE_STCLEAR BIT(14) +#define TPM_NV_PER_WRITEDEFINE BIT(13) +#define TPM_NV_PER_WRITEALL BIT(12) enum { TPM_PUBEK_SIZE = 256, @@ -232,211 +231,27 @@ struct tpm_permanent_flags { u8 disable_full_da_logic_info; } __packed; -/* Max buffer size supported by our tpm */ -#define TPM_DEV_BUFSIZE 1260 - -/** - * struct tpm_chip_priv - Information about a TPM, stored by the uclass - * - * These values must be set up by the device's probe() method before - * communcation is attempted. If the device has an xfer() method, this is - * not needed. There is no need to set up @buf. - * - * @duration_ms: Length of each duration type in milliseconds - * @retry_time_ms: Time to wait before retrying receive - */ -struct tpm_chip_priv { - uint duration_ms[TPM_DURATION_COUNT]; - uint retry_time_ms; - u8 buf[TPM_DEV_BUFSIZE + sizeof(u8)]; /* Max buffer size + addr */ -}; - -/** - * struct tpm_ops - low-level TPM operations - * - * These are designed to avoid loops and delays in the driver itself. These - * should be handled in the uclass. - * - * In gneral you should implement everything except xfer(). Where you need - * complete control of the transfer, then xfer() can be provided and will - * override the other methods. - * - * This interface is for low-level TPM access. It does not understand the - * concept of localities or the various TPM messages. That interface is - * defined in the functions later on in this file, but they all translate - * to bytes which are sent and received. - */ -struct tpm_ops { - /** - * open() - Request access to locality 0 for the caller - * - * After all commands have been completed the caller should call - * close(). - * - * @dev: Device to close - * @return 0 ok OK, -ve on error - */ - int (*open)(struct udevice *dev); - - /** - * close() - Close the current session - * - * Releasing the locked locality. Returns 0 on success, -ve 1 on - * failure (in case lock removal did not succeed). - * - * @dev: Device to close - * @return 0 ok OK, -ve on error - */ - int (*close)(struct udevice *dev); - - /** - * get_desc() - Get a text description of the TPM - * - * @dev: Device to check - * @buf: Buffer to put the string - * @size: Maximum size of buffer - * @return length of string, or -ENOSPC it no space - */ - int (*get_desc)(struct udevice *dev, char *buf, int size); - - /** - * send() - send data to the TPM - * - * @dev: Device to talk to - * @sendbuf: Buffer of the data to send - * @send_size: Size of the data to send - * - * Returns 0 on success or -ve on failure. - */ - int (*send)(struct udevice *dev, const uint8_t *sendbuf, - size_t send_size); - - /** - * recv() - receive a response from the TPM - * - * @dev: Device to talk to - * @recvbuf: Buffer to save the response to - * @max_size: Maximum number of bytes to receive - * - * Returns number of bytes received on success, -EAGAIN if the TPM - * response is not ready, -EINTR if cancelled, or other -ve value on - * failure. - */ - int (*recv)(struct udevice *dev, uint8_t *recvbuf, size_t max_size); - - /** - * cleanup() - clean up after an operation in progress - * - * This is called if receiving times out. The TPM may need to abort - * the current transaction if it did not complete, and make itself - * ready for another. - * - * @dev: Device to talk to - */ - int (*cleanup)(struct udevice *dev); - - /** - * xfer() - send data to the TPM and get response - * - * This method is optional. If it exists it is used in preference - * to send(), recv() and cleanup(). It should handle all aspects of - * TPM communication for a single transfer. - * - * @dev: Device to talk to - * @sendbuf: Buffer of the data to send - * @send_size: Size of the data to send - * @recvbuf: Buffer to save the response to - * @recv_size: Pointer to the size of the response buffer - * - * Returns 0 on success (and places the number of response bytes at - * recv_size) or -ve on failure. - */ - int (*xfer)(struct udevice *dev, const uint8_t *sendbuf, - size_t send_size, uint8_t *recvbuf, size_t *recv_size); -}; - -#define tpm_get_ops(dev) ((struct tpm_ops *)device_get_ops(dev)) - -/** - * tpm_open() - Request access to locality 0 for the caller - * - * After all commands have been completed the caller is supposed to - * call tpm_close(). - * - * Returns 0 on success, -ve on failure. - */ -int tpm_open(struct udevice *dev); - -/** - * tpm_close() - Close the current session - * - * Releasing the locked locality. Returns 0 on success, -ve 1 on - * failure (in case lock removal did not succeed). - */ -int tpm_close(struct udevice *dev); - -/** - * tpm_get_desc() - Get a text description of the TPM - * - * @dev: Device to check - * @buf: Buffer to put the string - * @size: Maximum size of buffer - * @return length of string, or -ENOSPC it no space - */ -int tpm_get_desc(struct udevice *dev, char *buf, int size); - -/** - * tpm_xfer() - send data to the TPM and get response - * - * This first uses the device's send() method to send the bytes. Then it calls - * recv() to get the reply. If recv() returns -EAGAIN then it will delay a - * short time and then call recv() again. - * - * Regardless of whether recv() completes successfully, it will then call - * cleanup() to finish the transaction. - * - * Note that the outgoing data is inspected to determine command type - * (ordinal) and a timeout is used for that command type. - * - * @sendbuf - buffer of the data to send - * @send_size size of the data to send - * @recvbuf - memory to save the response to - * @recv_len - pointer to the size of the response buffer - * - * Returns 0 on success (and places the number of response bytes at - * recv_len) or -ve on failure. - */ -int tpm_xfer(struct udevice *dev, const uint8_t *sendbuf, size_t send_size, - uint8_t *recvbuf, size_t *recv_size); - -/** - * Initialize TPM device. It must be called before any TPM commands. - * - * @return 0 on success, non-0 on error. - */ -int tpm_init(void); - /** * Issue a TPM_Startup command. * * @param mode TPM startup mode * @return return code of the operation */ -uint32_t tpm_startup(enum tpm_startup_type mode); +u32 tpm_startup(enum tpm_startup_type mode); /** * Issue a TPM_SelfTestFull command. * * @return return code of the operation */ -uint32_t tpm_self_test_full(void); +u32 tpm_self_test_full(void); /** * Issue a TPM_ContinueSelfTest command. * * @return return code of the operation */ -uint32_t tpm_continue_self_test(void); +u32 tpm_continue_self_test(void); /** * Issue a TPM_NV_DefineSpace command. The implementation is limited @@ -448,7 +263,7 @@ uint32_t tpm_continue_self_test(void); * @param size size of the area * @return return code of the operation */ -uint32_t tpm_nv_define_space(uint32_t index, uint32_t perm, uint32_t size); +u32 tpm_nv_define_space(u32 index, u32 perm, u32 size); /** * Issue a TPM_NV_ReadValue command. This implementation is limited @@ -460,7 +275,7 @@ uint32_t tpm_nv_define_space(uint32_t index, uint32_t perm, uint32_t size); * @param count size of output buffer * @return return code of the operation */ -uint32_t tpm_nv_read_value(uint32_t index, void *data, uint32_t count); +u32 tpm_nv_read_value(u32 index, void *data, u32 count); /** * Issue a TPM_NV_WriteValue command. This implementation is limited @@ -472,7 +287,7 @@ uint32_t tpm_nv_read_value(uint32_t index, void *data, uint32_t count); * @param length length of data bytes of input buffer * @return return code of the operation */ -uint32_t tpm_nv_write_value(uint32_t index, const void *data, uint32_t length); +u32 tpm_nv_write_value(u32 index, const void *data, u32 length); /** * Issue a TPM_Extend command. @@ -484,7 +299,7 @@ uint32_t tpm_nv_write_value(uint32_t index, const void *data, uint32_t length); * command * @return return code of the operation */ -uint32_t tpm_extend(uint32_t index, const void *in_digest, void *out_digest); +u32 tpm_extend(u32 index, const void *in_digest, void *out_digest); /** * Issue a TPM_PCRRead command. @@ -494,7 +309,7 @@ uint32_t tpm_extend(uint32_t index, const void *in_digest, void *out_digest); * @param count size of output buffer * @return return code of the operation */ -uint32_t tpm_pcr_read(uint32_t index, void *data, size_t count); +u32 tpm_pcr_read(u32 index, void *data, size_t count); /** * Issue a TSC_PhysicalPresence command. TPM physical presence flag @@ -503,37 +318,37 @@ uint32_t tpm_pcr_read(uint32_t index, void *data, size_t count); * @param presence TPM physical presence flag * @return return code of the operation */ -uint32_t tpm_tsc_physical_presence(uint16_t presence); +u32 tpm_tsc_physical_presence(u16 presence); /** * Issue a TPM_ReadPubek command. * * @param data output buffer for the public endorsement key - * @param count size of ouput buffer + * @param count size of output buffer * @return return code of the operation */ -uint32_t tpm_read_pubek(void *data, size_t count); +u32 tpm_read_pubek(void *data, size_t count); /** * Issue a TPM_ForceClear command. * * @return return code of the operation */ -uint32_t tpm_force_clear(void); +u32 tpm_force_clear(void); /** * Issue a TPM_PhysicalEnable command. * * @return return code of the operation */ -uint32_t tpm_physical_enable(void); +u32 tpm_physical_enable(void); /** * Issue a TPM_PhysicalDisable command. * * @return return code of the operation */ -uint32_t tpm_physical_disable(void); +u32 tpm_physical_disable(void); /** * Issue a TPM_PhysicalSetDeactivated command. @@ -541,7 +356,7 @@ uint32_t tpm_physical_disable(void); * @param state boolean state of the deactivated flag * @return return code of the operation */ -uint32_t tpm_physical_set_deactivated(uint8_t state); +u32 tpm_physical_set_deactivated(u8 state); /** * Issue a TPM_GetCapability command. This implementation is limited @@ -551,22 +366,21 @@ uint32_t tpm_physical_set_deactivated(uint8_t state); * @param sub_cap further definition of capability, which is * limited to be 4-byte wide * @param cap output buffer for capability information - * @param count size of ouput buffer + * @param count size of output buffer * @return return code of the operation */ -uint32_t tpm_get_capability(uint32_t cap_area, uint32_t sub_cap, - void *cap, size_t count); +u32 tpm_get_capability(u32 cap_area, u32 sub_cap, void *cap, size_t count); /** - * Issue a TPM_FlushSpecific command for a AUTH ressource. + * Issue a TPM_FlushSpecific command for a AUTH resource. * * @param auth_handle handle of the auth session * @return return code of the operation */ -uint32_t tpm_terminate_auth_session(uint32_t auth_handle); +u32 tpm_terminate_auth_session(u32 auth_handle); /** - * Issue a TPM_OIAP command to setup an object independant authorization + * Issue a TPM_OIAP command to setup an object independent authorization * session. * Information about the session is stored internally. * If there was already an OIAP session active it is terminated and a new @@ -575,14 +389,14 @@ uint32_t tpm_terminate_auth_session(uint32_t auth_handle); * @param auth_handle pointer to the (new) auth handle or NULL. * @return return code of the operation */ -uint32_t tpm_oiap(uint32_t *auth_handle); +u32 tpm_oiap(u32 *auth_handle); /** * Ends an active OIAP session. * * @return return code of the operation */ -uint32_t tpm_end_oiap(void); +u32 tpm_end_oiap(void); /** * Issue a TPM_LoadKey2 (Auth1) command using an OIAP session for authenticating @@ -595,10 +409,8 @@ uint32_t tpm_end_oiap(void); * @param key_handle pointer to the key handle * @return return code of the operation */ -uint32_t tpm_load_key2_oiap(uint32_t parent_handle, - const void *key, size_t key_length, - const void *parent_key_usage_auth, - uint32_t *key_handle); +u32 tpm_load_key2_oiap(u32 parent_handle, const void *key, size_t key_length, + const void *parent_key_usage_auth, u32 *key_handle); /** * Issue a TPM_GetPubKey (Auth1) command using an OIAP session for @@ -613,8 +425,8 @@ uint32_t tpm_load_key2_oiap(uint32_t parent_handle, * of the stored TPM_PUBKEY structure (iff pubkey != NULL). * @return return code of the operation */ -uint32_t tpm_get_pub_key_oiap(uint32_t key_handle, const void *usage_auth, - void *pubkey, size_t *pubkey_len); +u32 tpm_get_pub_key_oiap(u32 key_handle, const void *usage_auth, void *pubkey, + size_t *pubkey_len); /** * Get the TPM permanent flags value @@ -622,7 +434,7 @@ uint32_t tpm_get_pub_key_oiap(uint32_t key_handle, const void *usage_auth, * @param pflags Place to put permanent flags * @return return code of the operation */ -uint32_t tpm_get_permanent_flags(struct tpm_permanent_flags *pflags); +u32 tpm_get_permanent_flags(struct tpm_permanent_flags *pflags); /** * Get the TPM permissions @@ -630,7 +442,7 @@ uint32_t tpm_get_permanent_flags(struct tpm_permanent_flags *pflags); * @param perm Returns permissions value * @return return code of the operation */ -uint32_t tpm_get_permissions(uint32_t index, uint32_t *perm); +u32 tpm_get_permissions(u32 index, u32 *perm); /** * Flush a resource with a given handle and type from the TPM @@ -639,7 +451,7 @@ uint32_t tpm_get_permissions(uint32_t index, uint32_t *perm); * @param resource_type type of the resource * @return return code of the operation */ -uint32_t tpm_flush_specific(uint32_t key_handle, uint32_t resource_type); +u32 tpm_flush_specific(u32 key_handle, u32 resource_type); #ifdef CONFIG_TPM_LOAD_KEY_BY_SHA1 /** @@ -650,8 +462,8 @@ uint32_t tpm_flush_specific(uint32_t key_handle, uint32_t resource_type); * @param[out] handle The handle of the key (Non-null iff found) * @return 0 if key was found in TPM; != 0 if not. */ -uint32_t tpm_find_key_sha1(const uint8_t auth[20], const uint8_t - pubkey_digest[20], uint32_t *handle); +u32 tpm_find_key_sha1(const u8 auth[20], const u8 pubkey_digest[20], + u32 *handle); #endif /* CONFIG_TPM_LOAD_KEY_BY_SHA1 */ /** @@ -663,6 +475,6 @@ uint32_t tpm_find_key_sha1(const uint8_t auth[20], const uint8_t * @param count size of output buffer * @return return code of the operation */ -uint32_t tpm_get_random(void *data, uint32_t count); +u32 tpm_get_random(void *data, u32 count); -#endif /* __TPM_H */ +#endif /* __TPM_V1_H */ diff --git a/include/tpm-v2.h b/include/tpm-v2.h new file mode 100644 index 00000000000..780e0619750 --- /dev/null +++ b/include/tpm-v2.h @@ -0,0 +1,262 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2018 Bootlin + * Author: Miquel Raynal <miquel.raynal@bootlin.com> + */ + +#ifndef __TPM_V2_H +#define __TPM_V2_H + +#include <tpm-common.h> + +#define TPM2_DIGEST_LEN 32 + +/** + * TPM2 Structure Tags for command/response buffers. + * + * @TPM2_ST_NO_SESSIONS: the command does not need an authentication. + * @TPM2_ST_SESSIONS: the command needs an authentication. + */ +enum tpm2_structures { + TPM2_ST_NO_SESSIONS = 0x8001, + TPM2_ST_SESSIONS = 0x8002, +}; + +/** + * TPM2 type of boolean. + */ +enum tpm2_yes_no { + TPMI_YES = 1, + TPMI_NO = 0, +}; + +/** + * TPM2 startup values. + * + * @TPM2_SU_CLEAR: reset the internal state. + * @TPM2_SU_STATE: restore saved state (if any). + */ +enum tpm2_startup_types { + TPM2_SU_CLEAR = 0x0000, + TPM2_SU_STATE = 0x0001, +}; + +/** + * TPM2 permanent handles. + * + * @TPM2_RH_OWNER: refers to the 'owner' hierarchy. + * @TPM2_RS_PW: indicates a password. + * @TPM2_RH_LOCKOUT: refers to the 'lockout' hierarchy. + * @TPM2_RH_ENDORSEMENT: refers to the 'endorsement' hierarchy. + * @TPM2_RH_PLATFORM: refers to the 'platform' hierarchy. + */ +enum tpm2_handles { + TPM2_RH_OWNER = 0x40000001, + TPM2_RS_PW = 0x40000009, + TPM2_RH_LOCKOUT = 0x4000000A, + TPM2_RH_ENDORSEMENT = 0x4000000B, + TPM2_RH_PLATFORM = 0x4000000C, +}; + +/** + * TPM2 command codes used at the beginning of a buffer, gives the command. + * + * @TPM2_CC_STARTUP: TPM2_Startup(). + * @TPM2_CC_SELF_TEST: TPM2_SelfTest(). + * @TPM2_CC_CLEAR: TPM2_Clear(). + * @TPM2_CC_CLEARCONTROL: TPM2_ClearControl(). + * @TPM2_CC_HIERCHANGEAUTH: TPM2_HierarchyChangeAuth(). + * @TPM2_CC_PCR_SETAUTHPOL: TPM2_PCR_SetAuthPolicy(). + * @TPM2_CC_DAM_RESET: TPM2_DictionaryAttackLockReset(). + * @TPM2_CC_DAM_PARAMETERS: TPM2_DictionaryAttackParameters(). + * @TPM2_CC_GET_CAPABILITY: TPM2_GetCapibility(). + * @TPM2_CC_PCR_READ: TPM2_PCR_Read(). + * @TPM2_CC_PCR_EXTEND: TPM2_PCR_Extend(). + * @TPM2_CC_PCR_SETAUTHVAL: TPM2_PCR_SetAuthValue(). + */ +enum tpm2_command_codes { + TPM2_CC_STARTUP = 0x0144, + TPM2_CC_SELF_TEST = 0x0143, + TPM2_CC_CLEAR = 0x0126, + TPM2_CC_CLEARCONTROL = 0x0127, + TPM2_CC_HIERCHANGEAUTH = 0x0129, + TPM2_CC_PCR_SETAUTHPOL = 0x012C, + TPM2_CC_DAM_RESET = 0x0139, + TPM2_CC_DAM_PARAMETERS = 0x013A, + TPM2_CC_GET_CAPABILITY = 0x017A, + TPM2_CC_PCR_READ = 0x017E, + TPM2_CC_PCR_EXTEND = 0x0182, + TPM2_CC_PCR_SETAUTHVAL = 0x0183, +}; + +/** + * TPM2 return codes. + */ +enum tpm2_return_codes { + TPM2_RC_SUCCESS = 0x0000, + TPM2_RC_BAD_TAG = 0x001E, + TPM2_RC_FMT1 = 0x0080, + TPM2_RC_HASH = TPM2_RC_FMT1 + 0x0003, + TPM2_RC_VALUE = TPM2_RC_FMT1 + 0x0004, + TPM2_RC_SIZE = TPM2_RC_FMT1 + 0x0015, + TPM2_RC_BAD_AUTH = TPM2_RC_FMT1 + 0x0022, + TPM2_RC_HANDLE = TPM2_RC_FMT1 + 0x000B, + TPM2_RC_VER1 = 0x0100, + TPM2_RC_INITIALIZE = TPM2_RC_VER1 + 0x0000, + TPM2_RC_FAILURE = TPM2_RC_VER1 + 0x0001, + TPM2_RC_DISABLED = TPM2_RC_VER1 + 0x0020, + TPM2_RC_AUTH_MISSING = TPM2_RC_VER1 + 0x0025, + TPM2_RC_COMMAND_CODE = TPM2_RC_VER1 + 0x0043, + TPM2_RC_AUTHSIZE = TPM2_RC_VER1 + 0x0044, + TPM2_RC_AUTH_CONTEXT = TPM2_RC_VER1 + 0x0045, + TPM2_RC_NEEDS_TEST = TPM2_RC_VER1 + 0x0053, + TPM2_RC_WARN = 0x0900, + TPM2_RC_TESTING = TPM2_RC_WARN + 0x000A, + TPM2_RC_REFERENCE_H0 = TPM2_RC_WARN + 0x0010, + TPM2_RC_LOCKOUT = TPM2_RC_WARN + 0x0021, +}; + +/** + * TPM2 algorithms. + */ +enum tpm2_algorithms { + TPM2_ALG_XOR = 0x0A, + TPM2_ALG_SHA256 = 0x0B, + TPM2_ALG_SHA384 = 0x0C, + TPM2_ALG_SHA512 = 0x0D, + TPM2_ALG_NULL = 0x10, +}; + +/** + * Issue a TPM2_Startup command. + * + * @mode TPM startup mode + * + * @return code of the operation + */ +u32 tpm2_startup(enum tpm2_startup_types mode); + +/** + * Issue a TPM2_SelfTest command. + * + * @full_test Asking to perform all tests or only the untested ones + * + * @return code of the operation + */ +u32 tpm2_self_test(enum tpm2_yes_no full_test); + +/** + * Issue a TPM2_Clear command. + * + * @handle Handle + * @pw Password + * @pw_sz Length of the password + * + * @return code of the operation + */ +u32 tpm2_clear(u32 handle, const char *pw, const ssize_t pw_sz); + +/** + * Issue a TPM2_PCR_Extend command. + * + * @index Index of the PCR + * @digest Value representing the event to be recorded + * + * @return code of the operation + */ +u32 tpm2_pcr_extend(u32 index, const uint8_t *digest); + +/** + * Issue a TPM2_PCR_Read command. + * + * @idx Index of the PCR + * @idx_min_sz Minimum size in bytes of the pcrSelect array + * @data Output buffer for contents of the named PCR + * @updates Optional out parameter: number of updates for this PCR + * + * @return code of the operation + */ +u32 tpm2_pcr_read(u32 idx, unsigned int idx_min_sz, void *data, + unsigned int *updates); + +/** + * Issue a TPM2_GetCapability command. This implementation is limited + * to query property index that is 4-byte wide. + * + * @capability Partition of capabilities + * @property Further definition of capability, limited to be 4 bytes wide + * @buf Output buffer for capability information + * @prop_count Size of output buffer + * + * @return code of the operation + */ +u32 tpm2_get_capability(u32 capability, u32 property, void *buf, + size_t prop_count); + +/** + * Issue a TPM2_DictionaryAttackLockReset command. + * + * @pw Password + * @pw_sz Length of the password + * + * @return code of the operation + */ +u32 tpm2_dam_reset(const char *pw, const ssize_t pw_sz); + +/** + * Issue a TPM2_DictionaryAttackParameters command. + * + * @pw Password + * @pw_sz Length of the password + * @max_tries Count of authorizations before lockout + * @recovery_time Time before decrementation of the failure count + * @lockout_recovery Time to wait after a lockout + * + * @return code of the operation + */ +u32 tpm2_dam_parameters(const char *pw, const ssize_t pw_sz, + unsigned int max_tries, unsigned int recovery_time, + unsigned int lockout_recovery); + +/** + * Issue a TPM2_HierarchyChangeAuth command. + * + * @handle Handle + * @newpw New password + * @newpw_sz Length of the new password + * @oldpw Old password + * @oldpw_sz Length of the old password + * + * @return code of the operation + */ +int tpm2_change_auth(u32 handle, const char *newpw, const ssize_t newpw_sz, + const char *oldpw, const ssize_t oldpw_sz); + +/** + * Issue a TPM_PCR_SetAuthPolicy command. + * + * @pw Platform password + * @pw_sz Length of the password + * @index Index of the PCR + * @digest New key to access the PCR + * + * @return code of the operation + */ +u32 tpm2_pcr_setauthpolicy(const char *pw, const ssize_t pw_sz, u32 index, + const char *key); + +/** + * Issue a TPM_PCR_SetAuthValue command. + * + * @pw Platform password + * @pw_sz Length of the password + * @index Index of the PCR + * @digest New key to access the PCR + * @key_sz Length of the new key + * + * @return code of the operation + */ +u32 tpm2_pcr_setauthvalue(const char *pw, const ssize_t pw_sz, u32 index, + const char *key, const ssize_t key_sz); + +#endif /* __TPM_V2_H */ diff --git a/include/tsi108.h b/include/tsi108.h deleted file mode 100644 index 8e246b857e7..00000000000 --- a/include/tsi108.h +++ /dev/null @@ -1,207 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/***************************************************************************** - * (C) Copyright 2003; Tundra Semiconductor Corp. - * (C) Copyright 2006; Freescale Semiconductor Corp. - *****************************************************************************/ - -/* - * FILENAME: tsi108.h - * - * Originator: Alex Bounine - * - * DESCRIPTION: - * Common definitions for the Tundra Tsi108 bridge chip - * - */ - -#ifndef _TSI108_H_ -#define _TSI108_H_ - -#define TSI108_HLP_REG_OFFSET (0x0000) -#define TSI108_PCI_REG_OFFSET (0x1000) -#define TSI108_CLK_REG_OFFSET (0x2000) -#define TSI108_PB_REG_OFFSET (0x3000) -#define TSI108_SD_REG_OFFSET (0x4000) -#define TSI108_MPIC_REG_OFFSET (0x7400) - -#define PB_ID (0x000) -#define PB_RSR (0x004) -#define PB_BUS_MS_SELECT (0x008) -#define PB_ISR (0x00C) -#define PB_ARB_CTRL (0x018) -#define PB_PVT_CTRL2 (0x034) -#define PB_SCR (0x400) -#define PB_ERRCS (0x404) -#define PB_AERR (0x408) -#define PB_REG_BAR (0x410) -#define PB_OCN_BAR1 (0x414) -#define PB_OCN_BAR2 (0x418) -#define PB_SDRAM_BAR1 (0x41C) -#define PB_SDRAM_BAR2 (0x420) -#define PB_MCR (0xC00) -#define PB_MCMD (0xC04) - -#define HLP_B0_ADDR (0x000) -#define HLP_B1_ADDR (0x010) -#define HLP_B2_ADDR (0x020) -#define HLP_B3_ADDR (0x030) - -#define HLP_B0_MASK (0x004) -#define HLP_B1_MASK (0x014) -#define HLP_B2_MASK (0x024) -#define HLP_B3_MASK (0x034) - -#define HLP_B0_CTRL0 (0x008) -#define HLP_B1_CTRL0 (0x018) -#define HLP_B2_CTRL0 (0x028) -#define HLP_B3_CTRL0 (0x038) - -#define HLP_B0_CTRL1 (0x00C) -#define HLP_B1_CTRL1 (0x01C) -#define HLP_B2_CTRL1 (0x02C) -#define HLP_B3_CTRL1 (0x03C) - -#define PCI_CSR (0x004) -#define PCI_P2O_BAR0 (0x010) -#define PCI_P2O_BAR0_UPPER (0x014) -#define PCI_P2O_BAR2 (0x018) -#define PCI_P2O_BAR2_UPPER (0x01C) -#define PCI_P2O_BAR3 (0x020) -#define PCI_P2O_BAR3_UPPER (0x024) - -#define PCI_MISC_CSR (0x040) -#define PCI_P2O_PAGE_SIZES (0x04C) - -#define PCI_PCIX_STAT (0x0F4) - -#define PCI_IRP_STAT (0x184) - -#define PCI_PFAB_BAR0 (0x204) -#define PCI_PFAB_BAR0_UPPER (0x208) -#define PCI_PFAB_IO (0x20C) -#define PCI_PFAB_IO_UPPER (0x210) - -#define PCI_PFAB_MEM32 (0x214) -#define PCI_PFAB_MEM32_REMAP (0x218) -#define PCI_PFAB_MEM32_MASK (0x21C) - -#define CG_PLL0_CTRL0 (0x210) -#define CG_PLL0_CTRL1 (0x214) -#define CG_PLL1_CTRL0 (0x220) -#define CG_PLL1_CTRL1 (0x224) -#define CG_PWRUP_STATUS (0x234) - -#define MPIC_CSR(n) (0x30C + (n * 0x40)) - -#define SD_CTRL (0x000) -#define SD_STATUS (0x004) -#define SD_TIMING (0x008) -#define SD_REFRESH (0x00C) -#define SD_INT_STATUS (0x010) -#define SD_INT_ENABLE (0x014) -#define SD_INT_SET (0x018) -#define SD_D0_CTRL (0x020) -#define SD_D1_CTRL (0x024) -#define SD_D0_BAR (0x028) -#define SD_D1_BAR (0x02C) -#define SD_ECC_CTRL (0x040) -#define SD_DLL_STATUS (0x250) - -#define TS_SD_CTRL_ENABLE (1 << 31) - -#define PB_ERRCS_ES (1 << 1) -#define PB_ISR_PBS_RD_ERR (1 << 8) -#define PCI_IRP_STAT_P_CSR (1 << 23) - -/* - * I2C : Register address offset definitions - */ -#define I2C_CNTRL1 (0x00000000) -#define I2C_CNTRL2 (0x00000004) -#define I2C_RD_DATA (0x00000008) -#define I2C_TX_DATA (0x0000000c) - -/* - * I2C : Register Bit Masks and Reset Values - * definitions for every register - */ - -/* I2C_CNTRL1 : Reset Value */ -#define I2C_CNTRL1_RESET_VALUE (0x0000000a) - -/* I2C_CNTRL1 : Register Bits Masks Definitions */ -#define I2C_CNTRL1_DEVCODE (0x0000000f) -#define I2C_CNTRL1_PAGE (0x00000700) -#define I2C_CNTRL1_BYTADDR (0x00ff0000) -#define I2C_CNTRL1_I2CWRITE (0x01000000) - -/* I2C_CNTRL1 : Read/Write Bit Mask Definition */ -#define I2C_CNTRL1_RWMASK (0x01ff070f) - -/* I2C_CNTRL1 : Unused/Reserved bits Definition */ -#define I2C_CNTRL1_RESERVED (0xfe00f8f0) - -/* I2C_CNTRL2 : Reset Value */ -#define I2C_CNTRL2_RESET_VALUE (0x00000000) - -/* I2C_CNTRL2 : Register Bits Masks Definitions */ -#define I2C_CNTRL2_SIZE (0x00000003) -#define I2C_CNTRL2_LANE (0x0000000c) -#define I2C_CNTRL2_MULTIBYTE (0x00000010) -#define I2C_CNTRL2_START (0x00000100) -#define I2C_CNTRL2_WR_STATUS (0x00010000) -#define I2C_CNTRL2_RD_STATUS (0x00020000) -#define I2C_CNTRL2_I2C_TO_ERR (0x04000000) -#define I2C_CNTRL2_I2C_CFGERR (0x08000000) -#define I2C_CNTRL2_I2C_CMPLT (0x10000000) - -/* I2C_CNTRL2 : Read/Write Bit Mask Definition */ -#define I2C_CNTRL2_RWMASK (0x0000011f) - -/* I2C_CNTRL2 : Unused/Reserved bits Definition */ -#define I2C_CNTRL2_RESERVED (0xe3fcfee0) - -/* I2C_RD_DATA : Reset Value */ -#define I2C_RD_DATA_RESET_VALUE (0x00000000) - -/* I2C_RD_DATA : Register Bits Masks Definitions */ -#define I2C_RD_DATA_RBYTE0 (0x000000ff) -#define I2C_RD_DATA_RBYTE1 (0x0000ff00) -#define I2C_RD_DATA_RBYTE2 (0x00ff0000) -#define I2C_RD_DATA_RBYTE3 (0xff000000) - -/* I2C_RD_DATA : Read/Write Bit Mask Definition */ -#define I2C_RD_DATA_RWMASK (0x00000000) - -/* I2C_RD_DATA : Unused/Reserved bits Definition */ -#define I2C_RD_DATA_RESERVED (0x00000000) - -/* I2C_TX_DATA : Reset Value */ -#define I2C_TX_DATA_RESET_VALUE (0x00000000) - -/* I2C_TX_DATA : Register Bits Masks Definitions */ -#define I2C_TX_DATA_TBYTE0 (0x000000ff) -#define I2C_TX_DATA_TBYTE1 (0x0000ff00) -#define I2C_TX_DATA_TBYTE2 (0x00ff0000) -#define I2C_TX_DATA_TBYTE3 (0xff000000) - -/* I2C_TX_DATA : Read/Write Bit Mask Definition */ -#define I2C_TX_DATA_RWMASK (0xffffffff) - -/* I2C_TX_DATA : Unused/Reserved bits Definition */ -#define I2C_TX_DATA_RESERVED (0x00000000) - -#define TSI108_I2C_OFFSET 0x7000 /* offset for general use I2C channel */ -#define TSI108_I2C_SDRAM_OFFSET 0x4400 /* offset for SPD I2C channel */ - -#define I2C_EEPROM_DEVCODE 0xA /* standard I2C EEPROM device code */ - -/* I2C status codes */ - -#define TSI108_I2C_SUCCESS 0 -#define TSI108_I2C_PARAM_ERR 1 -#define TSI108_I2C_TIMEOUT_ERR 2 -#define TSI108_I2C_IF_BUSY 3 -#define TSI108_I2C_IF_ERROR 4 - -#endif /* _TSI108_H_ */ diff --git a/include/xilinx.h b/include/xilinx.h index 9429f51b48a..af40befa52d 100644 --- a/include/xilinx.h +++ b/include/xilinx.h @@ -48,6 +48,8 @@ typedef struct { /* typedef xilinx_desc */ struct xilinx_fpga_op { int (*load)(xilinx_desc *, const void *, size_t, bitstream_type); int (*loadfs)(xilinx_desc *, const void *, size_t, fpga_fs_info *); + int (*loads)(xilinx_desc *desc, const void *buf, size_t bsize, + struct fpga_secure_info *fpga_sec_info); int (*dump)(xilinx_desc *, const void *, size_t); int (*info)(xilinx_desc *); }; @@ -60,6 +62,8 @@ int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize); int xilinx_info(xilinx_desc *desc); int xilinx_loadfs(xilinx_desc *desc, const void *buf, size_t bsize, fpga_fs_info *fpga_fsinfo); +int xilinx_loads(xilinx_desc *desc, const void *buf, size_t bsize, + struct fpga_secure_info *fpga_sec_info); /* Board specific implementation specific function types *********************************************************************/ diff --git a/include/zynqmppl.h b/include/zynqmppl.h index a0f4e68a0c1..5214db99fba 100644 --- a/include/zynqmppl.h +++ b/include/zynqmppl.h @@ -16,6 +16,9 @@ #define ZYNQMP_FPGA_OP_LOAD (1 << 1) #define ZYNQMP_FPGA_OP_DONE (1 << 2) +#define ZYNQMP_FPGA_FLAG_AUTHENTICATED BIT(2) +#define ZYNQMP_FPGA_FLAG_ENCRYPTED BIT(3) + #define ZYNQMP_CSU_IDCODE_DEVICE_CODE_SHIFT 15 #define ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK (0xf << \ ZYNQMP_CSU_IDCODE_DEVICE_CODE_SHIFT) diff --git a/lib/Kconfig b/lib/Kconfig index 1590f7afa40..15c6a52d4a1 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -61,6 +61,17 @@ config SPL_STRTO config TPL_STRTO bool +config IMAGE_SPARSE + bool + +config IMAGE_SPARSE_FILLBUF_SIZE + hex "Android sparse image CHUNK_TYPE_FILL buffer size" + default 0x80000 + depends on IMAGE_SPARSE + help + Set the size of the fill buffer used when processing CHUNK_TYPE_FILL + chunks. + config USE_PRIVATE_LIBGCC bool "Use private libgcc" depends on HAVE_PRIVATE_LIBGCC diff --git a/lib/Makefile b/lib/Makefile index d531ea54b31..c0511cbff84 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -29,6 +29,7 @@ obj-$(CONFIG_FIT) += fdtdec_common.o obj-$(CONFIG_TEST_FDTDEC) += fdtdec_test.o obj-$(CONFIG_GZIP_COMPRESSED) += gzip.o obj-$(CONFIG_GENERATE_SMBIOS_TABLE) += smbios.o +obj-$(CONFIG_IMAGE_SPARSE) += image-sparse.o obj-y += initcall.o obj-$(CONFIG_LMB) += lmb.o obj-y += ldiv.o @@ -39,7 +40,9 @@ obj-$(CONFIG_PHYSMEM) += physmem.o obj-y += qsort.o obj-y += rc4.o obj-$(CONFIG_SUPPORT_EMMC_RPMB) += sha256.o -obj-$(CONFIG_TPM) += tpm.o +obj-$(CONFIG_TPM) += tpm-common.o +obj-$(CONFIG_TPM_V1) += tpm-v1.o +obj-$(CONFIG_TPM_V2) += tpm-v2.o obj-$(CONFIG_RBTREE) += rbtree.o obj-$(CONFIG_BITREVERSE) += bitrev.o obj-y += list_sort.o diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig index d38780b604e..df58e633d1c 100644 --- a/lib/efi_loader/Kconfig +++ b/lib/efi_loader/Kconfig @@ -1,6 +1,6 @@ config EFI_LOADER bool "Support running EFI Applications in U-Boot" - depends on (ARM || X86) && OF_LIBFDT + depends on (ARM || X86 || RISCV) && OF_LIBFDT # We do not support bootefi booting ARMv7 in non-secure mode depends on !ARMV7_NONSEC # We need EFI_STUB_64BIT to be set on x86_64 with EFI_STUB @@ -10,6 +10,7 @@ config EFI_LOADER default y select LIB_UUID select HAVE_BLOCK_DEVICE + imply CFB_CONSOLE_ANSI help Select this option if you want to run EFI applications (like grub2) on top of U-Boot. If this option is enabled, U-Boot will expose EFI diff --git a/lib/efi_loader/efi_bootmgr.c b/lib/efi_loader/efi_bootmgr.c index 153e1737573..853358ab937 100644 --- a/lib/efi_loader/efi_bootmgr.c +++ b/lib/efi_loader/efi_bootmgr.c @@ -70,17 +70,17 @@ static void parse_load_option(struct load_option *lo, void *ptr) /* free() the result */ static void *get_var(u16 *name, const efi_guid_t *vendor, - unsigned long *size) + efi_uintn_t *size) { efi_guid_t *v = (efi_guid_t *)vendor; efi_status_t ret; void *buf = NULL; *size = 0; - EFI_CALL(ret = rs->get_variable((s16 *)name, v, NULL, size, buf)); + EFI_CALL(ret = rs->get_variable(name, v, NULL, size, buf)); if (ret == EFI_BUFFER_TOO_SMALL) { buf = malloc(*size); - EFI_CALL(ret = rs->get_variable((s16 *)name, v, NULL, size, buf)); + EFI_CALL(ret = rs->get_variable(name, v, NULL, size, buf)); } if (ret != EFI_SUCCESS) { @@ -104,7 +104,7 @@ static void *try_load_entry(uint16_t n, struct efi_device_path **device_path, u16 varname[] = L"Boot0000"; u16 hexmap[] = L"0123456789ABCDEF"; void *load_option, *image = NULL; - unsigned long size; + efi_uintn_t size; varname[4] = hexmap[(n & 0xf000) >> 12]; varname[5] = hexmap[(n & 0x0f00) >> 8]; @@ -147,7 +147,7 @@ void *efi_bootmgr_load(struct efi_device_path **device_path, struct efi_device_path **file_path) { uint16_t *bootorder; - unsigned long size; + efi_uintn_t size; void *image = NULL; int i, num; diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c index 5715a8b810e..50d311548e2 100644 --- a/lib/efi_loader/efi_boottime.c +++ b/lib/efi_loader/efi_boottime.c @@ -10,7 +10,6 @@ #include <efi_loader.h> #include <environment.h> #include <malloc.h> -#include <asm/global_data.h> #include <linux/libfdt_env.h> #include <u-boot/crc.h> #include <bootm.h> @@ -130,12 +129,15 @@ void efi_restore_gd(void) #endif } -/* - * Return a string for indenting with two spaces per level. A maximum of ten - * indent levels is supported. Higher indent levels will be truncated. +/** + * indent_string - returns a string for indenting with two spaces per level + * + * A maximum of ten indent levels is supported. Higher indent levels will be + * truncated. * - * @level indent level - * @return indent string + * @level: indent level + * Return Value: A string for indenting with two spaces per level is + * returned. */ static const char *indent_string(int level) { @@ -161,8 +163,8 @@ const char *__efi_nesting_dec(void) return indent_string(--nesting_level); } -/* - * Queue an EFI event. +/** + * efi_queue_event - queue an EFI event * * This function queues the notification function of the event for future * execution. @@ -172,8 +174,8 @@ const char *__efi_nesting_dec(void) * * For the SignalEvent service see efi_signal_event_ext. * - * @event event to signal - * @check_tpl check the TPL level + * @event: event to signal + * @check_tpl: check the TPL level */ static void efi_queue_event(struct efi_event *event, bool check_tpl) { @@ -188,8 +190,8 @@ static void efi_queue_event(struct efi_event *event, bool check_tpl) event->is_queued = false; } -/* - * Signal an EFI event. +/** + * efi_signal_event - signal an EFI event * * This function signals an event. If the event belongs to an event group * all events of the group are signaled. If they are of type EVT_NOTIFY_SIGNAL @@ -197,8 +199,8 @@ static void efi_queue_event(struct efi_event *event, bool check_tpl) * * For the SignalEvent service see efi_signal_event_ext. * - * @event event to signal - * @check_tpl check the TPL level + * @event: event to signal + * @check_tpl: check the TPL level */ void efi_signal_event(struct efi_event *event, bool check_tpl) { @@ -232,15 +234,15 @@ void efi_signal_event(struct efi_event *event, bool check_tpl) } } -/* - * Raise the task priority level. +/** + * efi_raise_tpl - raise the task priority level * * This function implements the RaiseTpl service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @new_tpl new value of the task priority level - * @return old value of the task priority level + * @new_tpl: new value of the task priority level + * Return Value: old value of the task priority level */ static unsigned long EFIAPI efi_raise_tpl(efi_uintn_t new_tpl) { @@ -258,14 +260,14 @@ static unsigned long EFIAPI efi_raise_tpl(efi_uintn_t new_tpl) return old_tpl; } -/* - * Lower the task priority level. +/** + * efi_restore_tpl - lower the task priority level * * This function implements the RestoreTpl service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @old_tpl value of the task priority level to be restored + * @old_tpl: value of the task priority level to be restored */ static void EFIAPI efi_restore_tpl(efi_uintn_t old_tpl) { @@ -285,18 +287,18 @@ static void EFIAPI efi_restore_tpl(efi_uintn_t old_tpl) EFI_EXIT(EFI_SUCCESS); } -/* - * Allocate memory pages. +/** + * efi_allocate_pages_ext - allocate memory pages * * This function implements the AllocatePages service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @type type of allocation to be performed - * @memory_type usage type of the allocated memory - * @pages number of pages to be allocated - * @memory allocated memory - * @return status code + * @type: type of allocation to be performed + * @memory_type: usage type of the allocated memory + * @pages: number of pages to be allocated + * @memory: allocated memory + * Return Value: status code */ static efi_status_t EFIAPI efi_allocate_pages_ext(int type, int memory_type, efi_uintn_t pages, @@ -309,16 +311,16 @@ static efi_status_t EFIAPI efi_allocate_pages_ext(int type, int memory_type, return EFI_EXIT(r); } -/* - * Free memory pages. +/** + * efi_free_pages_ext - Free memory pages. * * This function implements the FreePages service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @memory start of the memory area to be freed - * @pages number of pages to be freed - * @return status code + * @memory: start of the memory area to be freed + * @pages: number of pages to be freed + * Return Value: status code */ static efi_status_t EFIAPI efi_free_pages_ext(uint64_t memory, efi_uintn_t pages) @@ -330,20 +332,20 @@ static efi_status_t EFIAPI efi_free_pages_ext(uint64_t memory, return EFI_EXIT(r); } -/* - * Get map describing memory usage. +/** + * efi_get_memory_map_ext - get map describing memory usage * * This function implements the GetMemoryMap service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @memory_map_size on entry the size, in bytes, of the memory map buffer, + * @memory_map_size: on entry the size, in bytes, of the memory map buffer, * on exit the size of the copied memory map - * @memory_map buffer to which the memory map is written - * @map_key key for the memory map - * @descriptor_size size of an individual memory descriptor - * @descriptor_version version number of the memory descriptor structure - * @return status code + * @memory_map: buffer to which the memory map is written + * @map_key: key for the memory map + * @descriptor_size: size of an individual memory descriptor + * @descriptor_version: version number of the memory descriptor structure + * Return Value: status code */ static efi_status_t EFIAPI efi_get_memory_map_ext( efi_uintn_t *memory_map_size, @@ -361,17 +363,17 @@ static efi_status_t EFIAPI efi_get_memory_map_ext( return EFI_EXIT(r); } -/* - * Allocate memory from pool. +/** + * efi_allocate_pool_ext - allocate memory from pool * * This function implements the AllocatePool service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @pool_type type of the pool from which memory is to be allocated - * @size number of bytes to be allocated - * @buffer allocated memory - * @return status code + * @pool_type: type of the pool from which memory is to be allocated + * @size: number of bytes to be allocated + * @buffer: allocated memory + * Return Value: status code */ static efi_status_t EFIAPI efi_allocate_pool_ext(int pool_type, efi_uintn_t size, @@ -384,15 +386,15 @@ static efi_status_t EFIAPI efi_allocate_pool_ext(int pool_type, return EFI_EXIT(r); } -/* - * Free memory from pool. +/** + * efi_free_pool_ext - free memory from pool * * This function implements the FreePool service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @buffer start of memory to be freed - * @return status code + * @buffer: start of memory to be freed + * Return Value: status code */ static efi_status_t EFIAPI efi_free_pool_ext(void *buffer) { @@ -403,13 +405,13 @@ static efi_status_t EFIAPI efi_free_pool_ext(void *buffer) return EFI_EXIT(r); } -/* - * Add a new object to the object list. +/** + * efi_add_handle - add a new object to the object list * * The protocols list is initialized. * The object handle is set. * - * @obj object to be added + * @obj: object to be added */ void efi_add_handle(struct efi_object *obj) { @@ -420,34 +422,33 @@ void efi_add_handle(struct efi_object *obj) list_add_tail(&obj->link, &efi_obj_list); } -/* - * Create handle. +/** + * efi_create_handle - create handle * - * @handle new handle - * @return status code + * @handle: new handle + * Return Value: status code */ efi_status_t efi_create_handle(efi_handle_t *handle) { struct efi_object *obj; - efi_status_t r; - r = efi_allocate_pool(EFI_ALLOCATE_ANY_PAGES, - sizeof(struct efi_object), - (void **)&obj); - if (r != EFI_SUCCESS) - return r; + obj = calloc(1, sizeof(struct efi_object)); + if (!obj) + return EFI_OUT_OF_RESOURCES; + efi_add_handle(obj); *handle = obj->handle; - return r; + + return EFI_SUCCESS; } -/* - * Find a protocol on a handle. +/** + * efi_search_protocol - find a protocol on a handle. * - * @handle handle - * @protocol_guid GUID of the protocol - * @handler reference to the protocol - * @return status code + * @handle: handle + * @protocol_guid: GUID of the protocol + * @handler: reference to the protocol + * Return Value: status code */ efi_status_t efi_search_protocol(const efi_handle_t handle, const efi_guid_t *protocol_guid, @@ -474,13 +475,13 @@ efi_status_t efi_search_protocol(const efi_handle_t handle, return EFI_NOT_FOUND; } -/* - * Delete protocol from a handle. +/** + * efi_remove_protocol - delete protocol from a handle * - * @handle handle from which the protocol shall be deleted - * @protocol GUID of the protocol to be deleted - * @protocol_interface interface of the protocol implementation - * @return status code + * @handle: handle from which the protocol shall be deleted + * @protocol: GUID of the protocol to be deleted + * @protocol_interface: interface of the protocol implementation + * Return Value: status code */ efi_status_t efi_remove_protocol(const efi_handle_t handle, const efi_guid_t *protocol, @@ -494,16 +495,18 @@ efi_status_t efi_remove_protocol(const efi_handle_t handle, return ret; if (guidcmp(handler->guid, protocol)) return EFI_INVALID_PARAMETER; + if (handler->protocol_interface != protocol_interface) + return EFI_INVALID_PARAMETER; list_del(&handler->link); free(handler); return EFI_SUCCESS; } -/* - * Delete all protocols from a handle. +/** + * efi_remove_all_protocols - delete all protocols from a handle * - * @handle handle from which the protocols shall be deleted - * @return status code + * @handle: handle from which the protocols shall be deleted + * Return Value: status code */ efi_status_t efi_remove_all_protocols(const efi_handle_t handle) { @@ -525,10 +528,10 @@ efi_status_t efi_remove_all_protocols(const efi_handle_t handle) return EFI_SUCCESS; } -/* - * Delete handle. +/** + * efi_delete_handle - delete handle * - * @handle handle to delete + * @obj: handle to delete */ void efi_delete_handle(struct efi_object *obj) { @@ -539,11 +542,11 @@ void efi_delete_handle(struct efi_object *obj) free(obj); } -/* - * Check if a pointer is a valid event. +/** + * efi_is_event - check if a pointer is a valid event * - * @event pointer to check - * @return status code + * @event: pointer to check + * Return Value: status code */ static efi_status_t efi_is_event(const struct efi_event *event) { @@ -558,20 +561,21 @@ static efi_status_t efi_is_event(const struct efi_event *event) return EFI_INVALID_PARAMETER; } -/* - * Create an event. +/** + * efi_create_event - create an event * * This function is used inside U-Boot code to create an event. * * For the API function implementing the CreateEvent service see * efi_create_event_ext. * - * @type type of the event to create - * @notify_tpl task priority level of the event - * @notify_function notification function of the event - * @notify_context pointer passed to the notification function - * @event created event - * @return status code + * @type: type of the event to create + * @notify_tpl: task priority level of the event + * @notify_function: notification function of the event + * @notify_context: pointer passed to the notification function + * @group: event group + * @event: created event + * Return Value: status code */ efi_status_t efi_create_event(uint32_t type, efi_uintn_t notify_tpl, void (EFIAPI *notify_function) ( @@ -610,20 +614,19 @@ efi_status_t efi_create_event(uint32_t type, efi_uintn_t notify_tpl, } /* - * Create an event in a group. + * efi_create_event_ex - create an event in a group * * This function implements the CreateEventEx service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. - * TODO: Support event groups * - * @type type of the event to create - * @notify_tpl task priority level of the event - * @notify_function notification function of the event - * @notify_context pointer passed to the notification function - * @event created event - * @event_group event group - * @return status code + * @type: type of the event to create + * @notify_tpl: task priority level of the event + * @notify_function: notification function of the event + * @notify_context: pointer passed to the notification function + * @event: created event + * @event_group: event group + * Return Value: status code */ efi_status_t EFIAPI efi_create_event_ex(uint32_t type, efi_uintn_t notify_tpl, void (EFIAPI *notify_function) ( @@ -639,19 +642,19 @@ efi_status_t EFIAPI efi_create_event_ex(uint32_t type, efi_uintn_t notify_tpl, notify_context, event_group, event)); } -/* - * Create an event. +/** + * efi_create_event_ext - create an event * * This function implements the CreateEvent service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @type type of the event to create - * @notify_tpl task priority level of the event - * @notify_function notification function of the event - * @notify_context pointer passed to the notification function - * @event created event - * @return status code + * @type: type of the event to create + * @notify_tpl: task priority level of the event + * @notify_function: notification function of the event + * @notify_context: pointer passed to the notification function + * @event: created event + * Return Value: status code */ static efi_status_t EFIAPI efi_create_event_ext( uint32_t type, efi_uintn_t notify_tpl, @@ -666,7 +669,9 @@ static efi_status_t EFIAPI efi_create_event_ext( notify_context, NULL, event)); } -/* +/** + * efi_timer_check - check if a timer event has occurred + * * Check if a timer event has occurred or a queued notification function should * be called. * @@ -699,16 +704,16 @@ void efi_timer_check(void) WATCHDOG_RESET(); } -/* - * Set the trigger time for a timer event or stop the event. +/** + * efi_set_timer - set the trigger time for a timer event or stop the event * * This is the function for internal usage in U-Boot. For the API function * implementing the SetTimer service see efi_set_timer_ext. * - * @event event for which the timer is set - * @type type of the timer - * @trigger_time trigger period in multiples of 100ns - * @return status code + * @event: event for which the timer is set + * @type: type of the timer + * @trigger_time: trigger period in multiples of 100ns + * Return Value: status code */ efi_status_t efi_set_timer(struct efi_event *event, enum efi_timer_delay type, uint64_t trigger_time) @@ -740,17 +745,17 @@ efi_status_t efi_set_timer(struct efi_event *event, enum efi_timer_delay type, return EFI_SUCCESS; } -/* - * Set the trigger time for a timer event or stop the event. +/** + * efi_set_timer_ext - Set the trigger time for a timer event or stop the event * * This function implements the SetTimer service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @event event for which the timer is set - * @type type of the timer - * @trigger_time trigger period in multiples of 100ns - * @return status code + * @event: event for which the timer is set + * @type: type of the timer + * @trigger_time: trigger period in multiples of 100ns + * Return Value: status code */ static efi_status_t EFIAPI efi_set_timer_ext(struct efi_event *event, enum efi_timer_delay type, @@ -760,17 +765,17 @@ static efi_status_t EFIAPI efi_set_timer_ext(struct efi_event *event, return EFI_EXIT(efi_set_timer(event, type, trigger_time)); } -/* - * Wait for events to be signaled. +/** + * efi_wait_for_event - wait for events to be signaled * * This function implements the WaitForEvent service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @num_events number of events to be waited for - * @events events to be waited for - * @index index of the event that was signaled - * @return status code + * @num_events: number of events to be waited for + * @event: events to be waited for + * @index: index of the event that was signaled + * Return Value: status code */ static efi_status_t EFIAPI efi_wait_for_event(efi_uintn_t num_events, struct efi_event **event, @@ -817,8 +822,8 @@ out: return EFI_EXIT(EFI_SUCCESS); } -/* - * Signal an EFI event. +/** + * efi_signal_event_ext - signal an EFI event * * This function implements the SignalEvent service. * See the Unified Extensible Firmware Interface (UEFI) specification @@ -827,8 +832,8 @@ out: * This functions sets the signaled state of the event and queues the * notification function for execution. * - * @event event to signal - * @return status code + * @event: event to signal + * Return Value: status code */ static efi_status_t EFIAPI efi_signal_event_ext(struct efi_event *event) { @@ -839,15 +844,15 @@ static efi_status_t EFIAPI efi_signal_event_ext(struct efi_event *event) return EFI_EXIT(EFI_SUCCESS); } -/* - * Close an EFI event. +/** + * efi_close_event - close an EFI event * * This function implements the CloseEvent service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @event event to close - * @return status code + * @event: event to close + * Return Value: status code */ static efi_status_t EFIAPI efi_close_event(struct efi_event *event) { @@ -859,8 +864,8 @@ static efi_status_t EFIAPI efi_close_event(struct efi_event *event) return EFI_EXIT(EFI_SUCCESS); } -/* - * Check if an event is signaled. +/** + * efi_check_event - check if an event is signaled * * This function implements the CheckEvent service. * See the Unified Extensible Firmware Interface (UEFI) specification @@ -869,8 +874,8 @@ static efi_status_t EFIAPI efi_close_event(struct efi_event *event) * If an event is not signaled yet, the notification function is queued. * The signaled state is cleared. * - * @event event to check - * @return status code + * @event: event to check + * Return Value: status code */ static efi_status_t EFIAPI efi_check_event(struct efi_event *event) { @@ -888,11 +893,11 @@ static efi_status_t EFIAPI efi_check_event(struct efi_event *event) return EFI_EXIT(EFI_NOT_READY); } -/* - * Find the internal EFI object for a handle. +/** + * efi_search_obj - find the internal EFI object for a handle * - * @handle handle to find - * @return EFI object + * @handle: handle to find + * Return Value: EFI object */ struct efi_object *efi_search_obj(const efi_handle_t handle) { @@ -906,11 +911,12 @@ struct efi_object *efi_search_obj(const efi_handle_t handle) return NULL; } -/* - * Create open protocol info entry and add it to a protocol. +/** + * efi_open_protocol_info_entry - create open protocol info entry and add it + * to a protocol * - * @handler handler of a protocol - * @return open protocol info entry + * @handler: handler of a protocol + * Return Value: open protocol info entry */ static struct efi_open_protocol_info_entry *efi_create_open_info( struct efi_handler *handler) @@ -926,11 +932,11 @@ static struct efi_open_protocol_info_entry *efi_create_open_info( return &item->info; } -/* - * Remove an open protocol info entry from a protocol. +/** + * efi_delete_open_info - remove an open protocol info entry from a protocol * - * @handler handler of a protocol - * @return status code + * @item: open protocol info entry to delete + * Return Value: status code */ static efi_status_t efi_delete_open_info( struct efi_open_protocol_info_item *item) @@ -940,13 +946,13 @@ static efi_status_t efi_delete_open_info( return EFI_SUCCESS; } -/* - * Install new protocol on a handle. +/** + * efi_add_protocol - install new protocol on a handle * - * @handle handle on which the protocol shall be installed - * @protocol GUID of the protocol to be installed - * @protocol_interface interface of the protocol implementation - * @return status code + * @handle: handle on which the protocol shall be installed + * @protocol: GUID of the protocol to be installed + * @protocol_interface: interface of the protocol implementation + * Return Value: status code */ efi_status_t efi_add_protocol(const efi_handle_t handle, const efi_guid_t *protocol, @@ -974,19 +980,19 @@ efi_status_t efi_add_protocol(const efi_handle_t handle, return EFI_SUCCESS; } -/* - * Install protocol interface. +/** + * efi_install_protocol_interface - install protocol interface * * This function implements the InstallProtocolInterface service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @handle handle on which the protocol shall be installed - * @protocol GUID of the protocol to be installed - * @protocol_interface_type type of the interface to be installed, + * @handle: handle on which the protocol shall be installed + * @protocol: GUID of the protocol to be installed + * @protocol_interface_type: type of the interface to be installed, * always EFI_NATIVE_INTERFACE - * @protocol_interface interface of the protocol implementation - * @return status code + * @protocol_interface: interface of the protocol implementation + * Return Value: status code */ static efi_status_t EFIAPI efi_install_protocol_interface( void **handle, const efi_guid_t *protocol, @@ -1020,38 +1026,16 @@ out: return EFI_EXIT(r); } -/* - * Reinstall protocol interface. - * - * This function implements the ReinstallProtocolInterface service. - * See the Unified Extensible Firmware Interface (UEFI) specification - * for details. +/** + * efi_get_drivers - get all drivers associated to a controller * - * @handle handle on which the protocol shall be - * reinstalled - * @protocol GUID of the protocol to be installed - * @old_interface interface to be removed - * @new_interface interface to be installed - * @return status code - */ -static efi_status_t EFIAPI efi_reinstall_protocol_interface( - efi_handle_t handle, const efi_guid_t *protocol, - void *old_interface, void *new_interface) -{ - EFI_ENTRY("%p, %pUl, %p, %p", handle, protocol, old_interface, - new_interface); - return EFI_EXIT(EFI_ACCESS_DENIED); -} - -/* - * Get all drivers associated to a controller. * The allocated buffer has to be freed with free(). * - * @efiobj handle of the controller - * @protocol protocol guid (optional) - * @number_of_drivers number of child controllers - * @driver_handle_buffer handles of the the drivers - * @return status code + * @efiobj: handle of the controller + * @protocol: protocol guid (optional) + * @number_of_drivers: number of child controllers + * @driver_handle_buffer: handles of the the drivers + * Return Value: status code */ static efi_status_t efi_get_drivers(struct efi_object *efiobj, const efi_guid_t *protocol, @@ -1107,17 +1091,17 @@ static efi_status_t efi_get_drivers(struct efi_object *efiobj, return EFI_SUCCESS; } -/* - * Disconnect all drivers from a controller. +/** + * efi_disconnect_all_drivers - disconnect all drivers from a controller * * This function implements the DisconnectController service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @efiobj handle of the controller - * @protocol protocol guid (optional) - * @child_handle handle of the child to destroy - * @return status code + * @efiobj: handle of the controller + * @protocol: protocol guid (optional) + * @child_handle: handle of the child to destroy + * Return Value: status code */ static efi_status_t efi_disconnect_all_drivers( struct efi_object *efiobj, @@ -1146,17 +1130,17 @@ static efi_status_t efi_disconnect_all_drivers( return ret; } -/* - * Uninstall protocol interface. +/** + * efi_uninstall_protocol_interface - uninstall protocol interface * * This function implements the UninstallProtocolInterface service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @handle handle from which the protocol shall be removed - * @protocol GUID of the protocol to be removed - * @protocol_interface interface to be removed - * @return status code + * @handle: handle from which the protocol shall be removed + * @protocol: GUID of the protocol to be removed + * @protocol_interface: interface to be removed + * Return Value: status code */ static efi_status_t EFIAPI efi_uninstall_protocol_interface( efi_handle_t handle, const efi_guid_t *protocol, @@ -1203,18 +1187,19 @@ out: return EFI_EXIT(r); } -/* - * Register an event for notification when a protocol is installed. +/** + * efi_register_protocol_notify - register an event for notification when a + * protocol is installed. * * This function implements the RegisterProtocolNotify service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @protocol GUID of the protocol whose installation shall be + * @protocol: GUID of the protocol whose installation shall be * notified - * @event event to be signaled upon installation of the protocol - * @registration key for retrieving the registration information - * @return status code + * @event: event to be signaled upon installation of the protocol + * @registration: key for retrieving the registration information + * Return Value: status code */ static efi_status_t EFIAPI efi_register_protocol_notify( const efi_guid_t *protocol, @@ -1225,16 +1210,16 @@ static efi_status_t EFIAPI efi_register_protocol_notify( return EFI_EXIT(EFI_OUT_OF_RESOURCES); } -/* - * Determine if an EFI handle implements a protocol. +/** + * efi_search - determine if an EFI handle implements a protocol * * See the documentation of the LocateHandle service in the UEFI specification. * - * @search_type selection criterion - * @protocol GUID of the protocol - * @search_key registration key - * @efiobj handle - * @return 0 if the handle implements the protocol + * @search_type: selection criterion + * @protocol: GUID of the protocol + * @search_key: registration key + * @efiobj: handle + * Return Value: 0 if the handle implements the protocol */ static int efi_search(enum efi_locate_search_type search_type, const efi_guid_t *protocol, void *search_key, @@ -1257,18 +1242,18 @@ static int efi_search(enum efi_locate_search_type search_type, } } -/* - * Locate handles implementing a protocol. +/** + * efi_locate_handle - locate handles implementing a protocol * * This function is meant for U-Boot internal calls. For the API implementation * of the LocateHandle service see efi_locate_handle_ext. * - * @search_type selection criterion - * @protocol GUID of the protocol - * @search_key registration key - * @buffer_size size of the buffer to receive the handles in bytes - * @buffer buffer to receive the relevant handles - * @return status code + * @search_type: selection criterion + * @protocol: GUID of the protocol + * @search_key: registration key + * @buffer_size: size of the buffer to receive the handles in bytes + * @buffer: buffer to receive the relevant handles + * Return Value: status code */ static efi_status_t efi_locate_handle( enum efi_locate_search_type search_type, @@ -1327,19 +1312,19 @@ static efi_status_t efi_locate_handle( return EFI_SUCCESS; } -/* - * Locate handles implementing a protocol. +/** + * efi_locate_handle_ext - locate handles implementing a protocol. * * This function implements the LocateHandle service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @search_type selection criterion - * @protocol GUID of the protocol - * @search_key registration key - * @buffer_size size of the buffer to receive the handles in bytes - * @buffer buffer to receive the relevant handles - * @return 0 if the handle implements the protocol + * @search_type: selection criterion + * @protocol: GUID of the protocol + * @search_key: registration key + * @buffer_size: size of the buffer to receive the handles in bytes + * @buffer: buffer to receive the relevant handles + * Return Value: 0 if the handle implements the protocol */ static efi_status_t EFIAPI efi_locate_handle_ext( enum efi_locate_search_type search_type, @@ -1353,7 +1338,12 @@ static efi_status_t EFIAPI efi_locate_handle_ext( buffer_size, buffer)); } -/* Collapses configuration table entries, removing index i */ +/** + * efi_remove_configuration_table - collapses configuration table entries, + * removing index i + * + * @i: index of the table entry to be removed + */ static void efi_remove_configuration_table(int i) { struct efi_configuration_table *this = &efi_conf_table[i]; @@ -1364,15 +1354,16 @@ static void efi_remove_configuration_table(int i) systab.nr_tables--; } -/* - * Adds, updates, or removes a configuration table. +/** + * efi_install_configuration_table - adds, updates, or removes a configuration + * table * * This function is used for internal calls. For the API implementation of the * InstallConfigurationTable service see efi_install_configuration_table_ext. * - * @guid GUID of the installed table - * @table table to be installed - * @return status code + * @guid: GUID of the installed table + * @table: table to be installed + * Return Value: status code */ efi_status_t efi_install_configuration_table(const efi_guid_t *guid, void *table) @@ -1418,16 +1409,17 @@ out: return EFI_SUCCESS; } -/* - * Adds, updates, or removes a configuration table. +/** + * efi_install_configuration_table_ex - Adds, updates, or removes a + * configuration table. * * This function implements the InstallConfigurationTable service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @guid GUID of the installed table - * @table table to be installed - * @return status code + * @guid: GUID of the installed table + * @table: table to be installed + * Return Value: status code */ static efi_status_t EFIAPI efi_install_configuration_table_ext(efi_guid_t *guid, void *table) @@ -1436,16 +1428,18 @@ static efi_status_t EFIAPI efi_install_configuration_table_ext(efi_guid_t *guid, return EFI_EXIT(efi_install_configuration_table(guid, table)); } -/* - * Initialize a loaded_image_info + loaded_image_info object with correct +/** + * efi_setup_loaded_image - initialize a loaded image + * + * Initialize a loaded_image_info and loaded_image_info object with correct * protocols, boot-device, etc. * - * @info loaded image info to be passed to the entry point of the + * @info: loaded image info to be passed to the entry point of the * image - * @obj internal object associated with the loaded image - * @device_path device path of the loaded image - * @file_path file path of the loaded image - * @return status code + * @obj: internal object associated with the loaded image + * @device_path: device path of the loaded image + * @file_path: file path of the loaded image + * Return Value: status code */ efi_status_t efi_setup_loaded_image( struct efi_loaded_image *info, struct efi_object *obj, @@ -1499,12 +1493,12 @@ failure: return ret; } -/* - * Load an image using a file path. +/** + * efi_load_image_from_path - load an image using a file path * - * @file_path the path of the image to load - * @buffer buffer containing the loaded image - * @return status code + * @file_path: the path of the image to load + * @buffer: buffer containing the loaded image + * Return Value: status code */ efi_status_t efi_load_image_from_path(struct efi_device_path *file_path, void **buffer) @@ -1548,21 +1542,21 @@ error: return ret; } -/* - * Load an EFI image into memory. +/** + * efi_load_image - load an EFI image into memory * * This function implements the LoadImage service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @boot_policy true for request originating from the boot manager - * @parent_image the caller's image handle - * @file_path the path of the image to load - * @source_buffer memory location from which the image is installed - * @source_size size of the memory area from which the image is + * @boot_policy: true for request originating from the boot manager + * @parent_image: the caller's image handle + * @file_path: the path of the image to load + * @source_buffer: memory location from which the image is installed + * @source_size: size of the memory area from which the image is * installed - * @image_handle handle for the newly installed image - * @return status code + * @image_handle: handle for the newly installed image + * Return Value: status code */ static efi_status_t EFIAPI efi_load_image(bool boot_policy, efi_handle_t parent_image, @@ -1638,17 +1632,17 @@ error: return EFI_EXIT(ret); } -/* - * Call the entry point of an image. +/** + * efi_start_image - dall the entry point of an image * * This function implements the StartImage service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @image_handle handle of the image - * @exit_data_size size of the buffer - * @exit_data buffer to receive the exit data of the called image - * @return status code + * @image_handle: handle of the image + * @exit_data_size: size of the buffer + * @exit_data: buffer to receive the exit data of the called image + * Return Value: status code */ static efi_status_t EFIAPI efi_start_image(efi_handle_t image_handle, unsigned long *exit_data_size, @@ -1704,18 +1698,18 @@ static efi_status_t EFIAPI efi_start_image(efi_handle_t image_handle, return EFI_CALL(systab.boottime->exit(image_handle, ret, 0, NULL)); } -/* - * Leave an EFI application or driver. +/** + * efi_exit - leave an EFI application or driver * * This function implements the Exit service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @image_handle handle of the application or driver that is exiting - * @exit_status status code - * @exit_data_size size of the buffer in bytes - * @exit_data buffer with data describing an error - * @return status code + * @image_handle: handle of the application or driver that is exiting + * @exit_status: status code + * @exit_data_size: size of the buffer in bytes + * @exit_data: buffer with data describing an error + * Return Value: status code */ static efi_status_t EFIAPI efi_exit(efi_handle_t image_handle, efi_status_t exit_status, @@ -1753,15 +1747,15 @@ static efi_status_t EFIAPI efi_exit(efi_handle_t image_handle, panic("EFI application exited"); } -/* - * Unload an EFI image. +/** + * efi_unload_image - unload an EFI image * * This function implements the UnloadImage service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @image_handle handle of the image to be unloaded - * @return status code + * @image_handle: handle of the image to be unloaded + * Return Value: status code */ static efi_status_t EFIAPI efi_unload_image(efi_handle_t image_handle) { @@ -1775,8 +1769,8 @@ static efi_status_t EFIAPI efi_unload_image(efi_handle_t image_handle) return EFI_EXIT(EFI_SUCCESS); } -/* - * Fix up caches for EFI payloads if necessary. +/** + * efi_exit_caches - fix up caches for EFI payloads if necessary */ static void efi_exit_caches(void) { @@ -1790,8 +1784,8 @@ static void efi_exit_caches(void) #endif } -/* - * Stop all boot services. +/** + * efi_exit_boot_services - stop all boot services * * This function implements the ExitBootServices service. * See the Unified Extensible Firmware Interface (UEFI) specification @@ -1801,9 +1795,9 @@ static void efi_exit_caches(void) * For exit boot services events the notification function is called. * The boot services are disabled in the system table. * - * @image_handle handle of the loaded image - * @map_key key of the memory map - * @return status code + * @image_handle: handle of the loaded image + * @map_key: key of the memory map + * Return Value: status code */ static efi_status_t EFIAPI efi_exit_boot_services(efi_handle_t image_handle, unsigned long map_key) @@ -1865,15 +1859,15 @@ static efi_status_t EFIAPI efi_exit_boot_services(efi_handle_t image_handle, return EFI_EXIT(EFI_SUCCESS); } -/* - * Get next value of the counter. +/** + * efi_get_next_monotonic_count - get next value of the counter * * This function implements the NextMonotonicCount service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @count returned value of the counter - * @return status code + * @count: returned value of the counter + * Return Value: status code */ static efi_status_t EFIAPI efi_get_next_monotonic_count(uint64_t *count) { @@ -1884,15 +1878,15 @@ static efi_status_t EFIAPI efi_get_next_monotonic_count(uint64_t *count) return EFI_EXIT(EFI_SUCCESS); } -/* - * Sleep. +/** + * efi_stall - sleep * * This function implements the Stall sercive. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @microseconds period to sleep in microseconds - * @return status code + * @microseconds: period to sleep in microseconds + * Return Value: status code */ static efi_status_t EFIAPI efi_stall(unsigned long microseconds) { @@ -1901,18 +1895,18 @@ static efi_status_t EFIAPI efi_stall(unsigned long microseconds) return EFI_EXIT(EFI_SUCCESS); } -/* - * Reset the watchdog timer. +/** + * efi_set_watchdog_timer - reset the watchdog timer * * This function implements the SetWatchdogTimer service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @timeout seconds before reset by watchdog - * @watchdog_code code to be logged when resetting - * @data_size size of buffer in bytes - * @watchdog_data buffer with data describing the reset reason - * @return status code + * @timeout: seconds before reset by watchdog + * @watchdog_code: code to be logged when resetting + * @data_size: size of buffer in bytes + * @watchdog_data: buffer with data describing the reset reason + * Return Value: status code */ static efi_status_t EFIAPI efi_set_watchdog_timer(unsigned long timeout, uint64_t watchdog_code, @@ -1924,18 +1918,18 @@ static efi_status_t EFIAPI efi_set_watchdog_timer(unsigned long timeout, return EFI_EXIT(efi_set_watchdog(timeout)); } -/* - * Close a protocol. +/** + * efi_close_protocol - close a protocol * * This function implements the CloseProtocol service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @handle handle on which the protocol shall be closed - * @protocol GUID of the protocol to close - * @agent_handle handle of the driver - * @controller_handle handle of the controller - * @return status code + * @handle: handle on which the protocol shall be closed + * @protocol: GUID of the protocol to close + * @agent_handle: handle of the driver + * @controller_handle: handle of the controller + * Return Value: status code */ static efi_status_t EFIAPI efi_close_protocol(efi_handle_t handle, const efi_guid_t *protocol, @@ -1971,18 +1965,19 @@ out: return EFI_EXIT(r); } -/* - * Provide information about then open status of a protocol on a handle +/** + * efi_open_protocol_information - provide information about then open status + * of a protocol on a handle * * This function implements the OpenProtocolInformation service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @handle handle for which the information shall be retrieved - * @protocol GUID of the protocol - * @entry_buffer buffer to receive the open protocol information - * @entry_count number of entries available in the buffer - * @return status code + * @handle: handle for which the information shall be retrieved + * @protocol: GUID of the protocol + * @entry_buffer: buffer to receive the open protocol information + * @entry_count: number of entries available in the buffer + * Return Value: status code */ static efi_status_t EFIAPI efi_open_protocol_information( efi_handle_t handle, const efi_guid_t *protocol, @@ -2034,17 +2029,17 @@ out: return EFI_EXIT(r); } -/* - * Get protocols installed on a handle. +/** + * efi_protocols_per_handle - get protocols installed on a handle * * This function implements the ProtocolsPerHandleService. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @handle handle for which the information is retrieved - * @protocol_buffer buffer with protocol GUIDs - * @protocol_buffer_count number of entries in the buffer - * @return status code + * @handle: handle for which the information is retrieved + * @protocol_buffer: buffer with protocol GUIDs + * @protocol_buffer_count: number of entries in the buffer + * Return Value: status code */ static efi_status_t EFIAPI efi_protocols_per_handle( efi_handle_t handle, efi_guid_t ***protocol_buffer, @@ -2095,19 +2090,19 @@ static efi_status_t EFIAPI efi_protocols_per_handle( return EFI_EXIT(EFI_SUCCESS); } -/* - * Locate handles implementing a protocol. +/** + * efi_locate_handle_buffer - locate handles implementing a protocol * * This function implements the LocateHandleBuffer service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @search_type selection criterion - * @protocol GUID of the protocol - * @search_key registration key - * @no_handles number of returned handles - * @buffer buffer with the returned handles - * @return status code + * @search_type: selection criterion + * @protocol: GUID of the protocol + * @search_key: registration key + * @no_handles: number of returned handles + * @buffer: buffer with the returned handles + * Return Value: status code */ static efi_status_t EFIAPI efi_locate_handle_buffer( enum efi_locate_search_type search_type, @@ -2142,17 +2137,17 @@ out: return EFI_EXIT(r); } -/* - * Find an interface implementing a protocol. +/** + * efi_locate_protocol - find an interface implementing a protocol * * This function implements the LocateProtocol service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @protocol GUID of the protocol - * @registration registration key passed to the notification function - * @protocol_interface interface implementing the protocol - * @return status code + * @protocol: GUID of the protocol + * @registration: registration key passed to the notification function + * @protocol_interface: interface implementing the protocol + * Return Value: status code */ static efi_status_t EFIAPI efi_locate_protocol(const efi_guid_t *protocol, void *registration, @@ -2183,17 +2178,18 @@ static efi_status_t EFIAPI efi_locate_protocol(const efi_guid_t *protocol, return EFI_EXIT(EFI_NOT_FOUND); } -/* - * Get the device path and handle of an device implementing a protocol. +/** + * efi_locate_device_path - Get the device path and handle of an device + * implementing a protocol * * This function implements the LocateDevicePath service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @protocol GUID of the protocol - * @device_path device path - * @device handle of the device - * @return status code + * @protocol: GUID of the protocol + * @device_path: device path + * @device: handle of the device + * Return Value: status code */ static efi_status_t EFIAPI efi_locate_device_path( const efi_guid_t *protocol, @@ -2259,17 +2255,18 @@ out: return EFI_EXIT(ret); } -/* +/** * Install multiple protocol interfaces. * * This function implements the MultipleProtocolInterfaces service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @handle handle on which the protocol interfaces shall be installed - * @... NULL terminated argument list with pairs of protocol GUIDS and - * interfaces - * @return status code + * @handle: handle on which the protocol interfaces shall be + * installed + * @...: NULL terminated argument list with pairs of protocol + * GUIDS and interfaces + * Return Value: status code */ static efi_status_t EFIAPI efi_install_multiple_protocol_interfaces( void **handle, ...) @@ -2316,17 +2313,19 @@ static efi_status_t EFIAPI efi_install_multiple_protocol_interfaces( return EFI_EXIT(r); } -/* - * Uninstall multiple protocol interfaces. +/** + * efi_uninstall_multiple_protocol_interfaces - uninstall multiple protocol + * interfaces * * This function implements the UninstallMultipleProtocolInterfaces service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @handle handle from which the protocol interfaces shall be removed - * @... NULL terminated argument list with pairs of protocol GUIDS and - * interfaces - * @return status code + * @handle: handle from which the protocol interfaces shall be + * removed + * @...: NULL terminated argument list with pairs of protocol + * GUIDS and interfaces + * Return Value: status code */ static efi_status_t EFIAPI efi_uninstall_multiple_protocol_interfaces( void *handle, ...) @@ -2373,17 +2372,17 @@ static efi_status_t EFIAPI efi_uninstall_multiple_protocol_interfaces( return EFI_EXIT(r); } -/* - * Calculate cyclic redundancy code. +/** + * efi_calculate_crc32 - calculate cyclic redundancy code * * This function implements the CalculateCrc32 service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @data buffer with data - * @data_size size of buffer in bytes - * @crc32_p cyclic redundancy code - * @return status code + * @data: buffer with data + * @data_size: size of buffer in bytes + * @crc32_p: cyclic redundancy code + * Return Value: status code */ static efi_status_t EFIAPI efi_calculate_crc32(void *data, unsigned long data_size, @@ -2394,16 +2393,16 @@ static efi_status_t EFIAPI efi_calculate_crc32(void *data, return EFI_EXIT(EFI_SUCCESS); } -/* - * Copy memory. +/** + * efi_copy_mem - copy memory * * This function implements the CopyMem service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @destination destination of the copy operation - * @source source of the copy operation - * @length number of bytes to copy + * @destination: destination of the copy operation + * @source: source of the copy operation + * @length: number of bytes to copy */ static void EFIAPI efi_copy_mem(void *destination, const void *source, size_t length) @@ -2413,16 +2412,16 @@ static void EFIAPI efi_copy_mem(void *destination, const void *source, EFI_EXIT(EFI_SUCCESS); } -/* - * Fill memory with a byte value. +/** + * efi_set_mem - Fill memory with a byte value. * * This function implements the SetMem service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @buffer buffer to fill - * @size size of buffer in bytes - * @value byte to copy to the buffer + * @buffer: buffer to fill + * @size: size of buffer in bytes + * @value: byte to copy to the buffer */ static void EFIAPI efi_set_mem(void *buffer, size_t size, uint8_t value) { @@ -2431,15 +2430,15 @@ static void EFIAPI efi_set_mem(void *buffer, size_t size, uint8_t value) EFI_EXIT(EFI_SUCCESS); } -/* - * Open protocol interface on a handle. +/** + * efi_protocol_open - open protocol interface on a handle * - * @handler handler of a protocol - * @protocol_interface interface implementing the protocol - * @agent_handle handle of the driver - * @controller_handle handle of the controller - * @attributes attributes indicating how to open the protocol - * @return status code + * @handler: handler of a protocol + * @protocol_interface: interface implementing the protocol + * @agent_handle: handle of the driver + * @controller_handle: handle of the controller + * @attributes: attributes indicating how to open the protocol + * Return Value: status code */ static efi_status_t efi_protocol_open( struct efi_handler *handler, @@ -2526,20 +2525,20 @@ out: return EFI_SUCCESS; } -/* - * Open protocol interface on a handle. +/** + * efi_open_protocol - open protocol interface on a handle * * This function implements the OpenProtocol interface. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @handle handle on which the protocol shall be opened - * @protocol GUID of the protocol - * @protocol_interface interface implementing the protocol - * @agent_handle handle of the driver - * @controller_handle handle of the controller - * @attributes attributes indicating how to open the protocol - * @return status code + * @handle: handle on which the protocol shall be opened + * @protocol: GUID of the protocol + * @protocol_interface: interface implementing the protocol + * @agent_handle: handle of the driver + * @controller_handle: handle of the controller + * @attributes: attributes indicating how to open the protocol + * Return Value: status code */ static efi_status_t EFIAPI efi_open_protocol( void *handle, const efi_guid_t *protocol, @@ -2593,17 +2592,17 @@ out: return EFI_EXIT(r); } -/* - * Get interface of a protocol on a handle. +/** + * efi_handle_protocol - get interface of a protocol on a handle * * This function implements the HandleProtocol service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @handle handle on which the protocol shall be opened - * @protocol GUID of the protocol - * @protocol_interface interface implementing the protocol - * @return status code + * @handle: handle on which the protocol shall be opened + * @protocol: GUID of the protocol + * @protocol_interface: interface implementing the protocol + * Return Value: status code */ static efi_status_t EFIAPI efi_handle_protocol(efi_handle_t handle, const efi_guid_t *protocol, @@ -2613,6 +2612,14 @@ static efi_status_t EFIAPI efi_handle_protocol(efi_handle_t handle, NULL, EFI_OPEN_PROTOCOL_BY_HANDLE_PROTOCOL); } +/** + * efi_bind_controller - bind a single driver to a controller + * + * @controller_handle: controller handle + * @driver_image_handle: driver handle + * @remain_device_path: remaining path + * Return Value: status code + */ static efi_status_t efi_bind_controller( efi_handle_t controller_handle, efi_handle_t driver_image_handle, @@ -2641,6 +2648,14 @@ static efi_status_t efi_bind_controller( return r; } +/** + * efi_connect_single_controller - connect a single driver to a controller + * + * @controller_handle: controller + * @driver_image_handle: driver + * @remain_device_path: remainting path + * Return Value: status code + */ static efi_status_t efi_connect_single_controller( efi_handle_t controller_handle, efi_handle_t *driver_image_handle, @@ -2705,8 +2720,8 @@ static efi_status_t efi_connect_single_controller( return EFI_SUCCESS; } -/* - * Connect a controller to a driver. +/** + * efi_connect_controller - connect a controller to a driver * * This function implements the ConnectController service. * See the Unified Extensible Firmware Interface (UEFI) specification @@ -2716,11 +2731,11 @@ static efi_status_t efi_connect_single_controller( * Afterwards all handles that have openened a protocol of the controller * with EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER are connected to drivers. * - * @controller_handle handle of the controller - * @driver_image_handle handle of the driver - * @remain_device_path device path of a child controller - * @recursive true to connect all child controllers - * @return status code + * @controller_handle: handle of the controller + * @driver_image_handle: handle of the driver + * @remain_device_path: device path of a child controller + * @recursive: true to connect all child controllers + * Return Value: status code */ static efi_status_t EFIAPI efi_connect_controller( efi_handle_t controller_handle, @@ -2773,14 +2788,59 @@ out: return EFI_EXIT(ret); } -/* - * Get all child controllers associated to a driver. +/** + * efi_reinstall_protocol_interface - reinstall protocol interface + * + * This function implements the ReinstallProtocolInterface service. + * See the Unified Extensible Firmware Interface (UEFI) specification + * for details. + * + * The old interface is uninstalled. The new interface is installed. + * Drivers are connected. + * + * @handle: handle on which the protocol shall be + * reinstalled + * @protocol: GUID of the protocol to be installed + * @old_interface: interface to be removed + * @new_interface: interface to be installed + * Return Value: status code + */ +static efi_status_t EFIAPI efi_reinstall_protocol_interface( + efi_handle_t handle, const efi_guid_t *protocol, + void *old_interface, void *new_interface) +{ + efi_status_t ret; + + EFI_ENTRY("%p, %pUl, %p, %p", handle, protocol, old_interface, + new_interface); + ret = EFI_CALL(efi_uninstall_protocol_interface(handle, protocol, + old_interface)); + if (ret != EFI_SUCCESS) + goto out; + ret = EFI_CALL(efi_install_protocol_interface(&handle, protocol, + EFI_NATIVE_INTERFACE, + new_interface)); + if (ret != EFI_SUCCESS) + goto out; + /* + * The returned status code has to be ignored. + * Do not create an error if no suitable driver for the handle exists. + */ + EFI_CALL(efi_connect_controller(handle, NULL, NULL, true)); +out: + return EFI_EXIT(ret); +} + +/** + * efi_get_child_controllers - get all child controllers associated to a driver + * * The allocated buffer has to be freed with free(). * - * @efiobj handle of the controller - * @driver_handle handle of the driver - * @number_of_children number of child controllers - * @child_handle_buffer handles of the the child controllers + * @efiobj: handle of the controller + * @driver_handle: handle of the driver + * @number_of_children: number of child controllers + * @child_handle_buffer: handles of the the child controllers + * Return Value: status code */ static efi_status_t efi_get_child_controllers( struct efi_object *efiobj, @@ -2835,17 +2895,17 @@ static efi_status_t efi_get_child_controllers( return EFI_SUCCESS; } -/* - * Disconnect a controller from a driver. +/** + * efi_disconnect_controller - disconnect a controller from a driver * * This function implements the DisconnectController service. * See the Unified Extensible Firmware Interface (UEFI) specification * for details. * - * @controller_handle handle of the controller - * @driver_image_handle handle of the driver - * @child_handle handle of the child to destroy - * @return status code + * @controller_handle: handle of the controller + * @driver_image_handle: handle of the driver + * @child_handle: handle of the child to destroy + * Return Value: status code */ static efi_status_t EFIAPI efi_disconnect_controller( efi_handle_t controller_handle, diff --git a/lib/efi_loader/efi_console.c b/lib/efi_loader/efi_console.c index d777db8a3ed..ce66c935ecb 100644 --- a/lib/efi_loader/efi_console.c +++ b/lib/efi_loader/efi_console.c @@ -12,8 +12,6 @@ #include <stdio_dev.h> #include <video_console.h> -static bool console_size_queried; - #define EFI_COUT_MODE_2 2 #define EFI_MAX_COUT_MODE 3 @@ -62,7 +60,15 @@ static struct simple_text_output_mode efi_con_mode = { .cursor_visible = 1, }; -static int term_read_reply(int *n, int maxnum, char end_char) +/* + * Receive and parse a reply from the terminal. + * + * @n: array of return values + * @num: number of return values expected + * @end_char: character indicating end of terminal message + * @return: non-zero indicates error + */ +static int term_read_reply(int *n, int num, char end_char) { char c; int i = 0; @@ -79,7 +85,7 @@ static int term_read_reply(int *n, int maxnum, char end_char) c = getc(); if (c == ';') { i++; - if (i >= maxnum) + if (i >= num) return -1; n[i] = 0; continue; @@ -93,6 +99,8 @@ static int term_read_reply(int *n, int maxnum, char end_char) n[i] *= 10; n[i] += c - '0'; } + if (i != num - 1) + return -1; return 0; } @@ -116,25 +124,36 @@ static efi_status_t EFIAPI efi_cout_output_string( unsigned int n16 = utf16_strlen(string); char buf[MAX_UTF8_PER_UTF16 * n16 + 1]; - char *p; + u16 *p; *utf16_to_utf8((u8 *)buf, string, n16) = '\0'; fputs(stdout, buf); - for (p = buf; *p; p++) { + /* + * Update the cursor position. + * + * The UEFI spec provides advance rules for U+0000, U+0008, U+000A, + * and U000D. All other characters, including control characters + * U+0007 (bel) and U+0009 (tab), have to increase the column by one. + */ + for (p = string; *p; ++p) { switch (*p) { - case '\r': /* carriage-return */ - con->cursor_column = 0; + case '\b': /* U+0008, backspace */ + con->cursor_column = max(0, con->cursor_column - 1); break; - case '\n': /* newline */ + case '\n': /* U+000A, newline */ con->cursor_column = 0; con->cursor_row++; break; - case '\t': /* tab, assume 8 char align */ + case '\r': /* U+000D, carriage-return */ + con->cursor_column = 0; break; - case '\b': /* backspace */ - con->cursor_column = max(0, con->cursor_column - 1); + case 0xd800 ... 0xdbff: + /* + * Ignore high surrogates, we do not want to count a + * Unicode character twice. + */ break; default: con->cursor_column++; @@ -194,6 +213,51 @@ static int query_console_serial(int *rows, int *cols) return 0; } +/* + * Update the mode table. + * + * By default the only mode available is 80x25. If the console has at least 50 + * lines, enable mode 80x50. If we can query the console size and it is neither + * 80x25 nor 80x50, set it as an additional mode. + */ +static void query_console_size(void) +{ + const char *stdout_name = env_get("stdout"); + int rows = 25, cols = 80; + + if (stdout_name && !strcmp(stdout_name, "vidconsole") && + IS_ENABLED(CONFIG_DM_VIDEO)) { + struct stdio_dev *stdout_dev = + stdio_get_by_name("vidconsole"); + struct udevice *dev = stdout_dev->priv; + struct vidconsole_priv *priv = + dev_get_uclass_priv(dev); + rows = priv->rows; + cols = priv->cols; + } else if (query_console_serial(&rows, &cols)) { + return; + } + + /* Test if we can have Mode 1 */ + if (cols >= 80 && rows >= 50) { + efi_cout_modes[1].present = 1; + efi_con_mode.max_mode = 2; + } + + /* + * Install our mode as mode 2 if it is different + * than mode 0 or 1 and set it as the currently selected mode + */ + if (!cout_mode_matches(&efi_cout_modes[0], rows, cols) && + !cout_mode_matches(&efi_cout_modes[1], rows, cols)) { + efi_cout_modes[EFI_COUT_MODE_2].columns = cols; + efi_cout_modes[EFI_COUT_MODE_2].rows = rows; + efi_cout_modes[EFI_COUT_MODE_2].present = 1; + efi_con_mode.max_mode = EFI_MAX_COUT_MODE; + efi_con_mode.mode = EFI_COUT_MODE_2; + } +} + static efi_status_t EFIAPI efi_cout_query_mode( struct efi_simple_text_output_protocol *this, unsigned long mode_number, unsigned long *columns, @@ -201,52 +265,12 @@ static efi_status_t EFIAPI efi_cout_query_mode( { EFI_ENTRY("%p, %ld, %p, %p", this, mode_number, columns, rows); - if (!console_size_queried) { - const char *stdout_name = env_get("stdout"); - int rows, cols; - - console_size_queried = true; - - if (stdout_name && !strcmp(stdout_name, "vidconsole") && - IS_ENABLED(CONFIG_DM_VIDEO)) { - struct stdio_dev *stdout_dev = - stdio_get_by_name("vidconsole"); - struct udevice *dev = stdout_dev->priv; - struct vidconsole_priv *priv = - dev_get_uclass_priv(dev); - rows = priv->rows; - cols = priv->cols; - } else if (query_console_serial(&rows, &cols)) { - goto out; - } - - /* Test if we can have Mode 1 */ - if (cols >= 80 && rows >= 50) { - efi_cout_modes[1].present = 1; - efi_con_mode.max_mode = 2; - } - - /* - * Install our mode as mode 2 if it is different - * than mode 0 or 1 and set it as the currently selected mode - */ - if (!cout_mode_matches(&efi_cout_modes[0], rows, cols) && - !cout_mode_matches(&efi_cout_modes[1], rows, cols)) { - efi_cout_modes[EFI_COUT_MODE_2].columns = cols; - efi_cout_modes[EFI_COUT_MODE_2].rows = rows; - efi_cout_modes[EFI_COUT_MODE_2].present = 1; - efi_con_mode.max_mode = EFI_MAX_COUT_MODE; - efi_con_mode.mode = EFI_COUT_MODE_2; - } - } - if (mode_number >= efi_con_mode.max_mode) return EFI_EXIT(EFI_UNSUPPORTED); if (efi_cout_modes[mode_number].present != 1) return EFI_EXIT(EFI_UNSUPPORTED); -out: if (columns) *columns = efi_cout_modes[mode_number].columns; if (rows) @@ -554,6 +578,9 @@ int efi_console_register(void) struct efi_object *efi_console_output_obj; struct efi_object *efi_console_input_obj; + /* Set up mode information */ + query_console_size(); + /* Create handles */ r = efi_create_handle((efi_handle_t *)&efi_console_output_obj); if (r != EFI_SUCCESS) diff --git a/lib/efi_loader/efi_image_loader.c b/lib/efi_loader/efi_image_loader.c index e832cde9016..3cffe9ef461 100644 --- a/lib/efi_loader/efi_image_loader.c +++ b/lib/efi_loader/efi_image_loader.c @@ -10,7 +10,6 @@ #include <common.h> #include <efi_loader.h> #include <pe.h> -#include <asm/global_data.h> const efi_guid_t efi_global_variable_guid = EFI_GLOBAL_VARIABLE_GUID; const efi_guid_t efi_guid_device_path = DEVICE_PATH_GUID; @@ -90,11 +89,16 @@ void efi_print_image_infos(void *pc) } static efi_status_t efi_loader_relocate(const IMAGE_BASE_RELOCATION *rel, - unsigned long rel_size, void *efi_reloc) + unsigned long rel_size, void *efi_reloc, + unsigned long pref_address) { + unsigned long delta = (unsigned long)efi_reloc - pref_address; const IMAGE_BASE_RELOCATION *end; int i; + if (delta == 0) + return EFI_SUCCESS; + end = (const IMAGE_BASE_RELOCATION *)((const char *)rel + rel_size); while (rel < end - 1 && rel->SizeOfBlock) { const uint16_t *relocs = (const uint16_t *)(rel + 1); @@ -103,7 +107,6 @@ static efi_status_t efi_loader_relocate(const IMAGE_BASE_RELOCATION *rel, uint32_t offset = (uint32_t)(*relocs & 0xfff) + rel->VirtualAddress; int type = *relocs >> EFI_PAGE_SHIFT; - unsigned long delta = (unsigned long)efi_reloc; uint64_t *x64 = efi_reloc + offset; uint32_t *x32 = efi_reloc + offset; uint16_t *x16 = efi_reloc + offset; @@ -191,6 +194,7 @@ void *efi_load_pe(void *efi, struct efi_loaded_image *loaded_image_info) unsigned long rel_size; int rel_idx = IMAGE_DIRECTORY_ENTRY_BASERELOC; void *entry; + uint64_t image_base; uint64_t image_size; unsigned long virt_size = 0; int supported = 0; @@ -234,6 +238,7 @@ void *efi_load_pe(void *efi, struct efi_loaded_image *loaded_image_info) if (nt->OptionalHeader.Magic == IMAGE_NT_OPTIONAL_HDR64_MAGIC) { IMAGE_NT_HEADERS64 *nt64 = (void *)nt; IMAGE_OPTIONAL_HEADER64 *opt = &nt64->OptionalHeader; + image_base = opt->ImageBase; image_size = opt->SizeOfImage; efi_set_code_and_data_type(loaded_image_info, opt->Subsystem); efi_reloc = efi_alloc(virt_size, @@ -249,6 +254,7 @@ void *efi_load_pe(void *efi, struct efi_loaded_image *loaded_image_info) virt_size = ALIGN(virt_size, opt->SectionAlignment); } else if (nt->OptionalHeader.Magic == IMAGE_NT_OPTIONAL_HDR32_MAGIC) { IMAGE_OPTIONAL_HEADER32 *opt = &nt->OptionalHeader; + image_base = opt->ImageBase; image_size = opt->SizeOfImage; efi_set_code_and_data_type(loaded_image_info, opt->Subsystem); efi_reloc = efi_alloc(virt_size, @@ -279,7 +285,8 @@ void *efi_load_pe(void *efi, struct efi_loaded_image *loaded_image_info) } /* Run through relocations */ - if (efi_loader_relocate(rel, rel_size, efi_reloc) != EFI_SUCCESS) { + if (efi_loader_relocate(rel, rel_size, efi_reloc, + (unsigned long)image_base) != EFI_SUCCESS) { efi_free_pages((uintptr_t) efi_reloc, (virt_size + EFI_PAGE_MASK) >> EFI_PAGE_SHIFT); return NULL; @@ -287,7 +294,7 @@ void *efi_load_pe(void *efi, struct efi_loaded_image *loaded_image_info) /* Flush cache */ flush_cache((ulong)efi_reloc, - ALIGN(virt_size, CONFIG_SYS_CACHELINE_SIZE)); + ALIGN(virt_size, EFI_CACHELINE_SIZE)); invalidate_icache_all(); /* Populate the loaded image interface bits */ diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c index 664c651db56..ec66af98ea8 100644 --- a/lib/efi_loader/efi_memory.c +++ b/lib/efi_loader/efi_memory.c @@ -10,7 +10,6 @@ #include <inttypes.h> #include <malloc.h> #include <watchdog.h> -#include <asm/global_data.h> #include <linux/list_sort.h> DECLARE_GLOBAL_DATA_PTR; @@ -69,23 +68,27 @@ static void efi_mem_sort(void) list_sort(NULL, &efi_mem, efi_mem_cmp); } -/* - * Unmaps all memory occupied by the carve_desc region from the - * list entry pointed to by map. +/** efi_mem_carve_out - unmap memory region + * + * @map: memory map + * @carve_desc: memory region to unmap + * @overlap_only_ram: the carved out region may only overlap RAM + * Return Value: the number of overlapping pages which have been + * removed from the map, + * EFI_CARVE_NO_OVERLAP, if the regions don't overlap, + * EFI_CARVE_OVERLAPS_NONRAM, if the carve and map overlap, + * and the map contains anything but free ram + * (only when overlap_only_ram is true), + * EFI_CARVE_LOOP_AGAIN, if the mapping list should be + * traversed again, as it has been altered. * - * Returns EFI_CARVE_NO_OVERLAP if the regions don't overlap. - * Returns EFI_CARVE_OVERLAPS_NONRAM if the carve and map overlap, - * and the map contains anything but free ram. - * (only when overlap_only_ram is true) - * Returns EFI_CARVE_LOOP_AGAIN if the mapping list should be traversed - * again, as it has been altered - * Returns the number of overlapping pages. The pages are removed from - * the mapping list. + * Unmaps all memory occupied by the carve_desc region from the list entry + * pointed to by map. * * In case of EFI_CARVE_OVERLAPS_NONRAM it is the callers responsibility - * to readd the already carved out pages to the mapping. + * to re-add the already carved out pages to the mapping. */ -static int efi_mem_carve_out(struct efi_mem_list *map, +static s64 efi_mem_carve_out(struct efi_mem_list *map, struct efi_mem_desc *carve_desc, bool overlap_only_ram) { @@ -184,7 +187,7 @@ uint64_t efi_add_memory_map(uint64_t start, uint64_t pages, int memory_type, carve_again = false; list_for_each(lhandle, &efi_mem) { struct efi_mem_list *lmem; - int r; + s64 r; lmem = list_entry(lhandle, struct efi_mem_list, link); r = efi_mem_carve_out(lmem, &newlist->desc, @@ -338,7 +341,8 @@ void *efi_alloc(uint64_t len, int memory_type) uint64_t pages = (len + EFI_PAGE_MASK) >> EFI_PAGE_SHIFT; efi_status_t r; - r = efi_allocate_pages(0, memory_type, pages, &ret); + r = efi_allocate_pages(EFI_ALLOCATE_ANY_PAGES, memory_type, pages, + &ret); if (r == EFI_SUCCESS) return (void*)(uintptr_t)ret; @@ -385,7 +389,8 @@ efi_status_t efi_allocate_pool(int pool_type, efi_uintn_t size, void **buffer) return EFI_SUCCESS; } - r = efi_allocate_pages(0, pool_type, num_pages, &t); + r = efi_allocate_pages(EFI_ALLOCATE_ANY_PAGES, pool_type, num_pages, + &t); if (r == EFI_SUCCESS) { struct efi_pool_allocation *alloc = (void *)(uintptr_t)t; @@ -516,7 +521,7 @@ int efi_memory_init(void) /* Request a 32bit 64MB bounce buffer region */ uint64_t efi_bounce_buffer_addr = 0xffffffff; - if (efi_allocate_pages(1, EFI_LOADER_DATA, + if (efi_allocate_pages(EFI_ALLOCATE_MAX_ADDRESS, EFI_LOADER_DATA, (64 * 1024 * 1024) >> EFI_PAGE_SHIFT, &efi_bounce_buffer_addr) != EFI_SUCCESS) return -1; diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c index 52f1301d75b..65f2bcf1401 100644 --- a/lib/efi_loader/efi_runtime.c +++ b/lib/efi_loader/efi_runtime.c @@ -10,7 +10,6 @@ #include <dm.h> #include <efi_loader.h> #include <rtc.h> -#include <asm/global_data.h> /* For manual relocation support */ DECLARE_GLOBAL_DATA_PTR; @@ -29,13 +28,6 @@ static efi_status_t __efi_runtime EFIAPI efi_unimplemented(void); static efi_status_t __efi_runtime EFIAPI efi_device_error(void); static efi_status_t __efi_runtime EFIAPI efi_invalid_parameter(void); -#ifdef CONFIG_SYS_CACHELINE_SIZE -#define EFI_CACHELINE_SIZE CONFIG_SYS_CACHELINE_SIZE -#else -/* Just use the greatest cache flush alignment requirement I'm aware of */ -#define EFI_CACHELINE_SIZE 128 -#endif - #if defined(CONFIG_ARM64) #define R_RELATIVE 1027 #define R_MASK 0xffffffffULL @@ -47,6 +39,25 @@ static efi_status_t __efi_runtime EFIAPI efi_invalid_parameter(void); #include <asm/elf.h> #define R_RELATIVE R_386_RELATIVE #define R_MASK 0xffULL +#elif defined(CONFIG_RISCV) +#include <elf.h> +#define R_RELATIVE R_RISCV_RELATIVE +#define R_MASK 0xffULL +#define IS_RELA 1 + +struct dyn_sym { + ulong foo1; + ulong addr; + u32 foo2; + u32 foo3; +}; +#ifdef CONFIG_CPU_RISCV_32 +#define R_ABSOLUTE R_RISCV_32 +#define SYM_INDEX 8 +#else +#define R_ABSOLUTE R_RISCV_64 +#define SYM_INDEX 32 +#endif #else #error Need to add relocation awareness #endif @@ -201,7 +212,7 @@ static const struct efi_runtime_detach_list_struct efi_runtime_detach_list[] = { .ptr = &efi_runtime_services.get_variable, .patchto = &efi_device_error, }, { - .ptr = &efi_runtime_services.get_next_variable, + .ptr = &efi_runtime_services.get_next_variable_name, .patchto = &efi_device_error, }, { .ptr = &efi_runtime_services.set_variable, @@ -253,15 +264,27 @@ void efi_runtime_relocate(ulong offset, struct efi_mem_desc *map) p = (void*)((ulong)rel->offset - base) + gd->relocaddr; - if ((rel->info & R_MASK) != R_RELATIVE) { - continue; - } + debug("%s: rel->info=%#lx *p=%#lx rel->offset=%p\n", __func__, rel->info, *p, rel->offset); + switch (rel->info & R_MASK) { + case R_RELATIVE: #ifdef IS_RELA newaddr = rel->addend + offset - CONFIG_SYS_TEXT_BASE; #else newaddr = *p - lastoff + offset; #endif + break; +#ifdef R_ABSOLUTE + case R_ABSOLUTE: { + ulong symidx = rel->info >> SYM_INDEX; + extern struct dyn_sym __dyn_sym_start[]; + newaddr = __dyn_sym_start[symidx].addr + offset; + break; + } +#endif + default: + continue; + } /* Check if the relocation is inside bounds */ if (map && ((newaddr < map->virtual_start) || @@ -421,9 +444,9 @@ efi_status_t __efi_runtime EFIAPI efi_query_capsule_caps( efi_status_t __efi_runtime EFIAPI efi_query_variable_info( u32 attributes, - u64 maximum_variable_storage_size, - u64 remaining_variable_storage_size, - u64 maximum_variable_size) + u64 *maximum_variable_storage_size, + u64 *remaining_variable_storage_size, + u64 *maximum_variable_size) { return EFI_UNSUPPORTED; } @@ -441,7 +464,7 @@ struct efi_runtime_services __efi_runtime_data efi_runtime_services = { .set_virtual_address_map = &efi_set_virtual_address_map, .convert_pointer = (void *)&efi_invalid_parameter, .get_variable = efi_get_variable, - .get_next_variable = efi_get_next_variable, + .get_next_variable_name = efi_get_next_variable_name, .set_variable = efi_set_variable, .get_next_high_mono_count = (void *)&efi_device_error, .reset_system = &efi_reset_system_boottime, diff --git a/lib/efi_loader/efi_smbios.c b/lib/efi_loader/efi_smbios.c index 482436e2adb..7c3fc8af0b2 100644 --- a/lib/efi_loader/efi_smbios.c +++ b/lib/efi_loader/efi_smbios.c @@ -29,7 +29,12 @@ efi_status_t efi_smbios_register(void) if (ret != EFI_SUCCESS) return ret; - /* Generate SMBIOS tables */ + /* + * Generate SMBIOS tables - we know that efi_allocate_pages() returns + * a 4k-aligned address, so it is safe to assume that + * write_smbios_table() will write the table at that address. + */ + assert(!(dmi & 0xf)); write_smbios_table(dmi); /* And expose them to our EFI payload */ diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c index 7e0e7f020ee..90b637215e4 100644 --- a/lib/efi_loader/efi_variable.c +++ b/lib/efi_loader/efi_variable.c @@ -49,7 +49,7 @@ (strlen("efi_xxxxxxxx-xxxx-xxxx-xxxxxxxxxxxxxxxx_") + \ (MAX_VAR_NAME * MAX_UTF8_PER_UTF16)) -static int hex(unsigned char ch) +static int hex(int ch) { if (ch >= 'a' && ch <= 'f') return ch-'a'+10; @@ -60,44 +60,32 @@ static int hex(unsigned char ch) return -1; } -static const char *hex2mem(u8 *mem, const char *hexstr, int count) +static int hex2mem(u8 *mem, const char *hexstr, int size) { - memset(mem, 0, count/2); + int nibble; + int i; - do { - int nibble; - - *mem = 0; - - if (!count || !*hexstr) + for (i = 0; i < size; i++) { + if (*hexstr == '\0') break; nibble = hex(*hexstr); if (nibble < 0) - break; + return -1; *mem = nibble; - count--; hexstr++; - if (!count || !*hexstr) - break; - nibble = hex(*hexstr); if (nibble < 0) - break; + return -1; *mem = (*mem << 4) | nibble; - count--; hexstr++; mem++; + } - } while (1); - - if (*hexstr) - return hexstr; - - return NULL; + return i; } static char *mem2hex(char *hexstr, const u8 *mem, int count) @@ -113,8 +101,8 @@ static char *mem2hex(char *hexstr, const u8 *mem, int count) return hexstr; } -static efi_status_t efi_to_native(char *native, s16 *variable_name, - efi_guid_t *vendor) +static efi_status_t efi_to_native(char *native, u16 *variable_name, + efi_guid_t *vendor) { size_t len; @@ -176,9 +164,9 @@ static const char *parse_attr(const char *str, u32 *attrp) } /* http://wiki.phoenix.com/wiki/index.php/EFI_RUNTIME_SERVICES#GetVariable.28.29 */ -efi_status_t EFIAPI efi_get_variable(s16 *variable_name, - efi_guid_t *vendor, u32 *attributes, - unsigned long *data_size, void *data) +efi_status_t EFIAPI efi_get_variable(u16 *variable_name, efi_guid_t *vendor, + u32 *attributes, efi_uintn_t *data_size, + void *data) { char native_name[MAX_NATIVE_VAR_NAME + 1]; efi_status_t ret; @@ -209,8 +197,12 @@ efi_status_t EFIAPI efi_get_variable(s16 *variable_name, if ((s = prefix(val, "(blob)"))) { unsigned len = strlen(s); + /* number of hexadecimal digits must be even */ + if (len & 1) + return EFI_EXIT(EFI_DEVICE_ERROR); + /* two characters per byte: */ - len = DIV_ROUND_UP(len, 2); + len /= 2; *data_size = len; if (in_size < len) @@ -219,7 +211,7 @@ efi_status_t EFIAPI efi_get_variable(s16 *variable_name, if (!data) return EFI_EXIT(EFI_INVALID_PARAMETER); - if (hex2mem(data, s, len * 2)) + if (hex2mem(data, s, len) != len) return EFI_EXIT(EFI_DEVICE_ERROR); debug("%s: got value: \"%s\"\n", __func__, s); @@ -250,9 +242,9 @@ efi_status_t EFIAPI efi_get_variable(s16 *variable_name, } /* http://wiki.phoenix.com/wiki/index.php/EFI_RUNTIME_SERVICES#GetNextVariableName.28.29 */ -efi_status_t EFIAPI efi_get_next_variable( - unsigned long *variable_name_size, - s16 *variable_name, efi_guid_t *vendor) +efi_status_t EFIAPI efi_get_next_variable_name(efi_uintn_t *variable_name_size, + u16 *variable_name, + efi_guid_t *vendor) { EFI_ENTRY("%p \"%ls\" %pUl", variable_name_size, variable_name, vendor); @@ -260,16 +252,16 @@ efi_status_t EFIAPI efi_get_next_variable( } /* http://wiki.phoenix.com/wiki/index.php/EFI_RUNTIME_SERVICES#SetVariable.28.29 */ -efi_status_t EFIAPI efi_set_variable(s16 *variable_name, - efi_guid_t *vendor, u32 attributes, - unsigned long data_size, void *data) +efi_status_t EFIAPI efi_set_variable(u16 *variable_name, efi_guid_t *vendor, + u32 attributes, efi_uintn_t data_size, + void *data) { char native_name[MAX_NATIVE_VAR_NAME + 1]; efi_status_t ret = EFI_SUCCESS; char *val, *s; u32 attr; - EFI_ENTRY("\"%ls\" %pUl %x %lu %p", variable_name, vendor, attributes, + EFI_ENTRY("\"%ls\" %pUl %x %zu %p", variable_name, vendor, attributes, data_size, data); if (!variable_name || !vendor) diff --git a/lib/efi_selftest/Kconfig b/lib/efi_selftest/Kconfig index 3b5f3a1230b..59f9f36801c 100644 --- a/lib/efi_selftest/Kconfig +++ b/lib/efi_selftest/Kconfig @@ -1,6 +1,8 @@ config CMD_BOOTEFI_SELFTEST bool "Allow booting an EFI efi_selftest" depends on CMD_BOOTEFI + imply FAT + imply FAT_WRITE help This adds an EFI test application to U-Boot that can be executed with the 'bootefi selftest' command. It provides extended tests of diff --git a/lib/efi_selftest/Makefile b/lib/efi_selftest/Makefile index 80c43026458..4fe404d88d8 100644 --- a/lib/efi_selftest/Makefile +++ b/lib/efi_selftest/Makefile @@ -28,8 +28,13 @@ efi_selftest_textinput.o \ efi_selftest_textoutput.o \ efi_selftest_tpl.o \ efi_selftest_util.o \ +efi_selftest_variables.o \ efi_selftest_watchdog.o +ifeq ($(CONFIG_CMD_BOOTEFI_SELFTEST),y) +obj-$(CONFIG_CPU_V7) += efi_selftest_unaligned.o +endif + ifeq ($(CONFIG_BLK)$(CONFIG_PARTITIONS),yy) obj-$(CONFIG_CMD_BOOTEFI_SELFTEST) += efi_selftest_block_device.o endif diff --git a/lib/efi_selftest/efi_selftest_controllers.c b/lib/efi_selftest/efi_selftest_controllers.c index e30c11b1e45..ceefa03444f 100644 --- a/lib/efi_selftest/efi_selftest_controllers.c +++ b/lib/efi_selftest/efi_selftest_controllers.c @@ -6,7 +6,7 @@ * * This unit test checks the following protocol services: * ConnectController, DisconnectController, - * InstallProtocol, UninstallProtocol, + * InstallProtocol, ReinstallProtocol, UninstallProtocol, * OpenProtocol, CloseProtcol, OpenProtocolInformation */ @@ -14,6 +14,8 @@ #define NUMBER_OF_CHILD_CONTROLLERS 4 +static int interface1 = 1; +static int interface2 = 2; static struct efi_boot_services *boottime; const efi_guid_t guid_driver_binding_protocol = EFI_DRIVER_BINDING_PROTOCOL_GUID; @@ -271,7 +273,7 @@ static int setup(const efi_handle_t img_handle, /* Create controller handle */ ret = boottime->install_protocol_interface( &handle_controller, &guid_controller, - EFI_NATIVE_INTERFACE, NULL); + EFI_NATIVE_INTERFACE, &interface1); if (ret != EFI_SUCCESS) { efi_st_error("InstallProtocolInterface failed\n"); return EFI_ST_FAILURE; @@ -299,6 +301,7 @@ static int setup(const efi_handle_t img_handle, * Disconnect and destroy the remaining child controllers. * * Connect a controller to a driver. + * Reinstall the driver protocol on the controller. * Uninstall the driver protocol from the controller. */ static int execute(void) @@ -361,9 +364,35 @@ static int execute(void) efi_st_error("Number of children %u != %u\n", (unsigned int)count, NUMBER_OF_CHILD_CONTROLLERS); } + /* Try to uninstall controller protocol using the wrong interface */ + ret = boottime->uninstall_protocol_interface(handle_controller, + &guid_controller, + &interface2); + if (ret == EFI_SUCCESS) { + efi_st_error( + "Interface not checked when uninstalling protocol\n"); + return EFI_ST_FAILURE; + } + /* Reinstall controller protocol */ + ret = boottime->reinstall_protocol_interface(handle_controller, + &guid_controller, + &interface1, + &interface2); + if (ret != EFI_SUCCESS) { + efi_st_error("Failed to reinstall protocols\n"); + return EFI_ST_FAILURE; + } + /* Check number of child controllers */ + ret = count_child_controllers(handle_controller, &guid_controller, + &count); + if (ret != EFI_SUCCESS || count != NUMBER_OF_CHILD_CONTROLLERS) { + efi_st_error("Number of children %u != %u\n", + (unsigned int)count, NUMBER_OF_CHILD_CONTROLLERS); + } /* Uninstall controller protocol */ ret = boottime->uninstall_protocol_interface(handle_controller, - &guid_controller, NULL); + &guid_controller, + &interface2); if (ret != EFI_SUCCESS) { efi_st_error("Failed to uninstall protocols\n"); return EFI_ST_FAILURE; diff --git a/lib/efi_selftest/efi_selftest_manageprotocols.c b/lib/efi_selftest/efi_selftest_manageprotocols.c index 3e4755c25e9..44b8da3ba5d 100644 --- a/lib/efi_selftest/efi_selftest_manageprotocols.c +++ b/lib/efi_selftest/efi_selftest_manageprotocols.c @@ -335,7 +335,7 @@ static int execute(void) return EFI_ST_FAILURE; } ret = boottime->uninstall_protocol_interface(handle1, &guid3, - &interface1); + &interface3); if (ret != EFI_SUCCESS) { efi_st_error("UninstallProtocolInterface failed\n"); return EFI_ST_FAILURE; diff --git a/lib/efi_selftest/efi_selftest_textoutput.c b/lib/efi_selftest/efi_selftest_textoutput.c index 3533647fd49..a87f65e197f 100644 --- a/lib/efi_selftest/efi_selftest_textoutput.c +++ b/lib/efi_selftest/efi_selftest_textoutput.c @@ -23,6 +23,13 @@ static int execute(void) size_t background; size_t attrib; efi_status_t ret; + s16 col; + u16 cr[] = { 0x0d, 0x00 }; + u16 lf[] = { 0x0a, 0x00 }; + u16 brahmi[] = { /* 2 Brahmi letters */ + 0xD804, 0xDC05, + 0xD804, 0xDC22, + 0}; /* SetAttribute */ efi_st_printf("\nColor palette\n"); @@ -42,6 +49,77 @@ static int execute(void) efi_st_error("TestString failed for ANSI characters\n"); return EFI_ST_FAILURE; } + /* OutputString */ + ret = con_out->output_string(con_out, + L"Testing cursor column update\n"); + if (ret != EFI_ST_SUCCESS) { + efi_st_error("OutputString failed for ANSI characters"); + return EFI_ST_FAILURE; + } + col = con_out->mode->cursor_column; + ret = con_out->output_string(con_out, lf); + if (ret != EFI_ST_SUCCESS) { + efi_st_error("OutputString failed for line feed\n"); + return EFI_ST_FAILURE; + } + if (con_out->mode->cursor_column != col) { + efi_st_error("Cursor column changed by line feed\n"); + return EFI_ST_FAILURE; + } + ret = con_out->output_string(con_out, cr); + if (ret != EFI_ST_SUCCESS) { + efi_st_error("OutputString failed for carriage return\n"); + return EFI_ST_FAILURE; + } + if (con_out->mode->cursor_column) { + efi_st_error("Cursor column not 0 at beginning of line\n"); + return EFI_ST_FAILURE; + } + ret = con_out->output_string(con_out, L"123"); + if (ret != EFI_ST_SUCCESS) { + efi_st_error("OutputString failed for ANSI characters\n"); + return EFI_ST_FAILURE; + } + if (con_out->mode->cursor_column != 3) { + efi_st_error("Cursor column not incremented properly\n"); + return EFI_ST_FAILURE; + } + ret = con_out->output_string(con_out, L"\b"); + if (ret != EFI_ST_SUCCESS) { + efi_st_error("OutputString failed for backspace\n"); + return EFI_ST_FAILURE; + } + if (con_out->mode->cursor_column != 2) { + efi_st_error("Cursor column not decremented properly\n"); + return EFI_ST_FAILURE; + } + ret = con_out->output_string(con_out, L"\b\b"); + if (ret != EFI_ST_SUCCESS) { + efi_st_error("OutputString failed for backspace\n"); + return EFI_ST_FAILURE; + } + if (con_out->mode->cursor_column) { + efi_st_error("Cursor column not decremented properly\n"); + return EFI_ST_FAILURE; + } + ret = con_out->output_string(con_out, L"\b\b"); + if (ret != EFI_ST_SUCCESS) { + efi_st_error("OutputString failed for backspace\n"); + return EFI_ST_FAILURE; + } + if (con_out->mode->cursor_column) { + efi_st_error("Cursor column decremented past zero\n"); + return EFI_ST_FAILURE; + } + ret = con_out->output_string(con_out, brahmi); + if (ret != EFI_ST_SUCCESS) { + efi_st_todo("Unicode output not fully supported\n"); + } else if (con_out->mode->cursor_column != 2) { + efi_st_printf("Unicode not handled properly\n"); + return EFI_ST_FAILURE; + } + efi_st_printf("\n"); + return EFI_ST_SUCCESS; } diff --git a/lib/efi_selftest/efi_selftest_unaligned.c b/lib/efi_selftest/efi_selftest_unaligned.c new file mode 100644 index 00000000000..1802948e675 --- /dev/null +++ b/lib/efi_selftest/efi_selftest_unaligned.c @@ -0,0 +1,66 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * efi_selftest_unaligned + * + * Copyright (c) 2018 Heinrich Schuchardt <xypron.glpk@gmx.de> + * + * Test unaligned memory access on ARMv7. + */ + +#include <efi_selftest.h> + +struct aligned_buffer { + char a[8] __aligned(8); +}; + +/* + * Return an u32 at a give address. + * If the address is not four byte aligned, an unaligned memory access + * occurs. + * + * @addr: address to read + * @return: value at the address + */ +static inline u32 deref(u32 *addr) +{ + int ret; + + asm( + "ldr %[out], [%[in]]\n\t" + : [out] "=r" (ret) + : [in] "r" (addr) + ); + return ret; +} + +/* + * Execute unit test. + * An unaligned memory access is executed. The result is checked. + * + * @return: EFI_ST_SUCCESS for success + */ +static int execute(void) +{ + struct aligned_buffer buf = { + {0, 1, 2, 3, 4, 5, 6, 7}, + }; + void *v = &buf; + u32 r = 0; + + /* Read an unaligned address */ + r = deref(v + 1); + + /* UEFI only supports low endian systems */ + if (r != 0x04030201) { + efi_st_error("Unaligned access failed"); + return EFI_ST_FAILURE; + } + + return EFI_ST_SUCCESS; +} + +EFI_UNIT_TEST(unaligned) = { + .name = "unaligned memory access", + .phase = EFI_EXECUTE_BEFORE_BOOTTIME_EXIT, + .execute = execute, +}; diff --git a/lib/efi_selftest/efi_selftest_variables.c b/lib/efi_selftest/efi_selftest_variables.c new file mode 100644 index 00000000000..146378fb9a2 --- /dev/null +++ b/lib/efi_selftest/efi_selftest_variables.c @@ -0,0 +1,196 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * efi_selftest_variables + * + * Copyright (c) 2018 Heinrich Schuchardt <xypron.glpk@gmx.de> + * + * This unit test checks the following protocol services: + * ConnectController, DisconnectController, + * InstallProtocol, ReinstallProtocol, UninstallProtocol, + * OpenProtocol, CloseProtcol, OpenProtocolInformation + */ + +#include <efi_selftest.h> + +#define EFI_ST_MAX_DATA_SIZE 16 +#define EFI_ST_MAX_VARNAME_SIZE 40 + +static struct efi_boot_services *boottime; +static struct efi_runtime_services *runtime; +static efi_guid_t guid_vendor0 = + EFI_GUID(0x67029eb5, 0x0af2, 0xf6b1, + 0xda, 0x53, 0xfc, 0xb5, 0x66, 0xdd, 0x1c, 0xe6); +static efi_guid_t guid_vendor1 = + EFI_GUID(0xff629290, 0x1fc1, 0xd73f, + 0x8f, 0xb1, 0x32, 0xf9, 0x0c, 0xa0, 0x42, 0xea); + +/* + * Setup unit test. + * + * @handle handle of the loaded image + * @systable system table + */ +static int setup(const efi_handle_t img_handle, + const struct efi_system_table *systable) +{ + boottime = systable->boottime; + runtime = systable->runtime; + + return EFI_ST_SUCCESS; +} + +/* + * Execute unit test. + */ +static int execute(void) +{ + efi_status_t ret; + efi_uintn_t len; + u32 attr; + u8 v[16] = {0x5d, 0xd1, 0x5e, 0x51, 0x5a, 0x05, 0xc7, 0x0c, + 0x35, 0x4a, 0xae, 0x87, 0xa5, 0xdf, 0x0f, 0x65,}; + u8 data[EFI_ST_MAX_DATA_SIZE]; + u16 varname[EFI_ST_MAX_VARNAME_SIZE]; + int flag; + efi_guid_t guid; + u64 max_storage, rem_storage, max_size; + + ret = runtime->query_variable_info(EFI_VARIABLE_BOOTSERVICE_ACCESS, + &max_storage, &rem_storage, + &max_size); + if (ret != EFI_SUCCESS) { + efi_st_todo("QueryVariableInfo failed\n"); + } else if (!max_storage || !rem_storage || !max_size) { + efi_st_error("QueryVariableInfo: wrong info\n"); + return EFI_ST_FAILURE; + } + /* Set variable 0 */ + ret = runtime->set_variable(L"efi_st_var0", &guid_vendor0, + EFI_VARIABLE_BOOTSERVICE_ACCESS, + 3, v + 4); + if (ret != EFI_SUCCESS) { + efi_st_error("SetVariable failed\n"); + return EFI_ST_FAILURE; + } + data[3] = 0xff; + len = 3; + ret = runtime->get_variable(L"efi_st_var0", &guid_vendor0, + &attr, &len, data); + if (ret != EFI_SUCCESS) { + efi_st_error("GetVariable failed\n"); + return EFI_ST_FAILURE; + } + if (efi_st_memcmp(data, v + 4, 3)) { + efi_st_error("GetVariable returned wrong value\n"); + return EFI_ST_FAILURE; + } + if (data[3] != 0xff) { + efi_st_error("GetVariable wrote past the end of the buffer\n"); + return EFI_ST_FAILURE; + } + /* Set variable 1 */ + ret = runtime->set_variable(L"efi_st_var1", &guid_vendor1, + EFI_VARIABLE_BOOTSERVICE_ACCESS, + 8, v); + if (ret != EFI_SUCCESS) { + efi_st_error("SetVariable failed\n"); + return EFI_ST_FAILURE; + } + len = EFI_ST_MAX_DATA_SIZE; + ret = runtime->get_variable(L"efi_st_var1", &guid_vendor1, + &attr, &len, data); + if (ret != EFI_SUCCESS) { + efi_st_error("GetVariable failed\n"); + return EFI_ST_FAILURE; + } + if (len != 8) { + efi_st_error("GetVariable returned wrong length %u\n", + (unsigned int)len); + return EFI_ST_FAILURE; + } + if (efi_st_memcmp(data, v, 8)) { + efi_st_error("GetVariable returned wrong value\n"); + return EFI_ST_FAILURE; + } + /* Append variable 1 */ + ret = runtime->set_variable(L"efi_st_var1", &guid_vendor1, + EFI_VARIABLE_BOOTSERVICE_ACCESS | + EFI_VARIABLE_APPEND_WRITE, + 7, v + 8); + if (ret != EFI_SUCCESS) { + efi_st_error("SetVariable failed\n"); + return EFI_ST_FAILURE; + } + len = EFI_ST_MAX_DATA_SIZE; + ret = runtime->get_variable(L"efi_st_var1", &guid_vendor1, + &attr, &len, data); + if (ret != EFI_SUCCESS) { + efi_st_error("GetVariable failed\n"); + return EFI_ST_FAILURE; + } + if (len != 15) + efi_st_todo("GetVariable returned wrong length %u\n", + (unsigned int)len); + if (efi_st_memcmp(data, v, len)) + efi_st_todo("GetVariable returned wrong value\n"); + /* Enumerate variables */ + boottime->set_mem(&guid, 16, 0); + *varname = 0; + flag = 0; + for (;;) { + len = EFI_ST_MAX_VARNAME_SIZE; + ret = runtime->get_next_variable_name(&len, varname, &guid); + if (ret == EFI_NOT_FOUND) + break; + if (ret != EFI_SUCCESS) { + efi_st_todo("GetNextVariableName failed\n"); + break; + } + if (!efi_st_memcmp(&guid, &guid_vendor0, sizeof(efi_guid_t)) && + !efi_st_strcmp_16_8(varname, "efi_st_var0")) + flag |= 2; + if (!efi_st_memcmp(&guid, &guid_vendor1, sizeof(efi_guid_t)) && + !efi_st_strcmp_16_8(varname, "efi_st_var1")) + flag |= 2; + } + if (flag != 3) + efi_st_todo( + "GetNextVariableName did not return all variables\n"); + /* Delete variable 1 */ + ret = runtime->set_variable(L"efi_st_var1", &guid_vendor1, + 0, 0, NULL); + if (ret != EFI_SUCCESS) { + efi_st_error("SetVariable failed\n"); + return EFI_ST_FAILURE; + } + len = EFI_ST_MAX_DATA_SIZE; + ret = runtime->get_variable(L"efi_st_var1", &guid_vendor1, + &attr, &len, data); + if (ret != EFI_NOT_FOUND) { + efi_st_error("Variable was not deleted\n"); + return EFI_ST_FAILURE; + } + /* Delete variable 0 */ + ret = runtime->set_variable(L"efi_st_var0", &guid_vendor0, + 0, 0, NULL); + if (ret != EFI_SUCCESS) { + efi_st_error("SetVariable failed\n"); + return EFI_ST_FAILURE; + } + len = EFI_ST_MAX_DATA_SIZE; + ret = runtime->get_variable(L"efi_st_var0", &guid_vendor0, + &attr, &len, data); + if (ret != EFI_NOT_FOUND) { + efi_st_error("Variable was not deleted\n"); + return EFI_ST_FAILURE; + } + + return EFI_ST_SUCCESS; +} + +EFI_UNIT_TEST(variables) = { + .name = "variables", + .phase = EFI_EXECUTE_BEFORE_BOOTTIME_EXIT, + .setup = setup, + .execute = execute, +}; diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 69bf12623e0..f4e8dbf699a 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -72,6 +72,7 @@ static const char * const compat_names[COMPAT_COUNT] = { COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"), COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"), COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"), + COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init") }; const char *fdtdec_get_compatible(enum fdt_compat_id id) diff --git a/common/image-sparse.c b/lib/image-sparse.c index 9223b9a1b86..036062139bb 100644 --- a/common/image-sparse.c +++ b/lib/image-sparse.c @@ -44,14 +44,10 @@ #include <linux/math64.h> -#ifndef CONFIG_FASTBOOT_FLASH_FILLBUF_SIZE -#define CONFIG_FASTBOOT_FLASH_FILLBUF_SIZE (1024 * 512) -#endif - -static void default_log(const char *ignored) {} +static void default_log(const char *ignored, char *response) {} int write_sparse_image(struct sparse_storage *info, - const char *part_name, void *data) + const char *part_name, void *data, char *response) { lbaint_t blk; lbaint_t blkcnt; @@ -69,7 +65,7 @@ int write_sparse_image(struct sparse_storage *info, int i; int j; - fill_buf_num_blks = CONFIG_FASTBOOT_FLASH_FILLBUF_SIZE / info->blksz; + fill_buf_num_blks = CONFIG_IMAGE_SPARSE_FILLBUF_SIZE / info->blksz; /* Read and skip over sparse image header */ sparse_header = (sparse_header_t *)data; @@ -104,7 +100,7 @@ int write_sparse_image(struct sparse_storage *info, if (offset) { printf("%s: Sparse image block size issue [%u]\n", __func__, sparse_header->blk_sz); - info->mssg("sparse image block size issue"); + info->mssg("sparse image block size issue", response); return -1; } @@ -139,7 +135,8 @@ int write_sparse_image(struct sparse_storage *info, case CHUNK_TYPE_RAW: if (chunk_header->total_sz != (sparse_header->chunk_hdr_sz + chunk_data_sz)) { - info->mssg("Bogus chunk size for chunk type Raw"); + info->mssg("Bogus chunk size for chunk type Raw", + response); return -1; } @@ -147,7 +144,8 @@ int write_sparse_image(struct sparse_storage *info, printf( "%s: Request would exceed partition size!\n", __func__); - info->mssg("Request would exceed partition size!"); + info->mssg("Request would exceed partition size!", + response); return -1; } @@ -157,7 +155,7 @@ int write_sparse_image(struct sparse_storage *info, printf("%s: %s" LBAFU " [" LBAFU "]\n", __func__, "Write failed, block #", blk, blks); - info->mssg("flash write failure"); + info->mssg("flash write failure", response); return -1; } blk += blks; @@ -169,7 +167,7 @@ int write_sparse_image(struct sparse_storage *info, case CHUNK_TYPE_FILL: if (chunk_header->total_sz != (sparse_header->chunk_hdr_sz + sizeof(uint32_t))) { - info->mssg("Bogus chunk size for chunk type FILL"); + info->mssg("Bogus chunk size for chunk type FILL", response); return -1; } @@ -179,7 +177,8 @@ int write_sparse_image(struct sparse_storage *info, info->blksz * fill_buf_num_blks, ARCH_DMA_MINALIGN)); if (!fill_buf) { - info->mssg("Malloc failed for: CHUNK_TYPE_FILL"); + info->mssg("Malloc failed for: CHUNK_TYPE_FILL", + response); return -1; } @@ -196,7 +195,8 @@ int write_sparse_image(struct sparse_storage *info, printf( "%s: Request would exceed partition size!\n", __func__); - info->mssg("Request would exceed partition size!"); + info->mssg("Request would exceed partition size!", + response); return -1; } @@ -211,7 +211,8 @@ int write_sparse_image(struct sparse_storage *info, __func__, "Write failed, block #", blk, j); - info->mssg("flash write failure"); + info->mssg("flash write failure", + response); free(fill_buf); return -1; } @@ -231,7 +232,8 @@ int write_sparse_image(struct sparse_storage *info, case CHUNK_TYPE_CRC32: if (chunk_header->total_sz != sparse_header->chunk_hdr_sz) { - info->mssg("Bogus chunk size for chunk type Dont Care"); + info->mssg("Bogus chunk size for chunk type Dont Care", + response); return -1; } total_blocks += chunk_header->chunk_sz; @@ -241,7 +243,7 @@ int write_sparse_image(struct sparse_storage *info, default: printf("%s: Unknown chunk type: %x\n", __func__, chunk_header->chunk_type); - info->mssg("Unknown chunk type"); + info->mssg("Unknown chunk type", response); return -1; } } @@ -251,7 +253,7 @@ int write_sparse_image(struct sparse_storage *info, printf("........ wrote %u bytes to '%s'\n", bytes_written, part_name); if (total_blocks != sparse_header->total_blks) { - info->mssg("sparse image write failure"); + info->mssg("sparse image write failure", response); return -1; } diff --git a/lib/libfdt/fdt_ro.c b/lib/libfdt/fdt_ro.c index 4b7008d88fe..b6ca4e0b0c3 100644 --- a/lib/libfdt/fdt_ro.c +++ b/lib/libfdt/fdt_ro.c @@ -76,8 +76,8 @@ uint32_t fdt_get_max_phandle(const void *fdt) int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size) { FDT_CHECK_HEADER(fdt); - *address = fdt64_to_cpu(_fdt_mem_rsv(fdt, n)->address); - *size = fdt64_to_cpu(_fdt_mem_rsv(fdt, n)->size); + *address = fdt64_to_cpu(fdt_mem_rsv_(fdt, n)->address); + *size = fdt64_to_cpu(fdt_mem_rsv_(fdt, n)->size); return 0; } @@ -85,7 +85,7 @@ int fdt_num_mem_rsv(const void *fdt) { int i = 0; - while (fdt64_to_cpu(_fdt_mem_rsv(fdt, i)->size) != 0) + while (fdt64_to_cpu(fdt_mem_rsv_(fdt, i)->size) != 0) i++; return i; } @@ -211,11 +211,11 @@ int fdt_path_offset(const void *fdt, const char *path) const char *fdt_get_name(const void *fdt, int nodeoffset, int *len) { - const struct fdt_node_header *nh = _fdt_offset_ptr(fdt, nodeoffset); + const struct fdt_node_header *nh = fdt_offset_ptr_(fdt, nodeoffset); int err; if (((err = fdt_check_header(fdt)) != 0) - || ((err = _fdt_check_node_offset(fdt, nodeoffset)) < 0)) + || ((err = fdt_check_node_offset_(fdt, nodeoffset)) < 0)) goto fail; if (len) @@ -233,7 +233,7 @@ int fdt_first_property_offset(const void *fdt, int nodeoffset) { int offset; - if ((offset = _fdt_check_node_offset(fdt, nodeoffset)) < 0) + if ((offset = fdt_check_node_offset_(fdt, nodeoffset)) < 0) return offset; return _nextprop(fdt, offset); @@ -241,7 +241,7 @@ int fdt_first_property_offset(const void *fdt, int nodeoffset) int fdt_next_property_offset(const void *fdt, int offset) { - if ((offset = _fdt_check_prop_offset(fdt, offset)) < 0) + if ((offset = fdt_check_prop_offset_(fdt, offset)) < 0) return offset; return _nextprop(fdt, offset); @@ -254,13 +254,13 @@ const struct fdt_property *fdt_get_property_by_offset(const void *fdt, int err; const struct fdt_property *prop; - if ((err = _fdt_check_prop_offset(fdt, offset)) < 0) { + if ((err = fdt_check_prop_offset_(fdt, offset)) < 0) { if (lenp) *lenp = err; return NULL; } - prop = _fdt_offset_ptr(fdt, offset); + prop = fdt_offset_ptr_(fdt, offset); if (lenp) *lenp = fdt32_to_cpu(prop->len); diff --git a/lib/tpm-common.c b/lib/tpm-common.c new file mode 100644 index 00000000000..43b530865a0 --- /dev/null +++ b/lib/tpm-common.c @@ -0,0 +1,197 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2013 The Chromium OS Authors. + * Coypright (c) 2013 Guntermann & Drunck GmbH + */ + +#include <common.h> +#include <dm.h> +#include <asm/unaligned.h> +#include <tpm-common.h> +#include "tpm-utils.h" + +int pack_byte_string(u8 *str, size_t size, const char *format, ...) +{ + va_list args; + size_t offset = 0, length = 0; + u8 *data = NULL; + u32 value = 0; + + va_start(args, format); + for (; *format; format++) { + switch (*format) { + case 'b': + offset = va_arg(args, size_t); + value = va_arg(args, int); + length = 1; + break; + case 'w': + offset = va_arg(args, size_t); + value = va_arg(args, int); + length = 2; + break; + case 'd': + offset = va_arg(args, size_t); + value = va_arg(args, u32); + length = 4; + break; + case 's': + offset = va_arg(args, size_t); + data = va_arg(args, u8 *); + length = va_arg(args, u32); + break; + default: + debug("Couldn't recognize format string\n"); + va_end(args); + return -1; + } + + if (offset + length > size) { + va_end(args); + return -1; + } + + switch (*format) { + case 'b': + str[offset] = value; + break; + case 'w': + put_unaligned_be16(value, str + offset); + break; + case 'd': + put_unaligned_be32(value, str + offset); + break; + case 's': + memcpy(str + offset, data, length); + break; + } + } + va_end(args); + + return 0; +} + +int unpack_byte_string(const u8 *str, size_t size, const char *format, ...) +{ + va_list args; + size_t offset = 0, length = 0; + u8 *ptr8 = NULL; + u16 *ptr16 = NULL; + u32 *ptr32 = NULL; + + va_start(args, format); + for (; *format; format++) { + switch (*format) { + case 'b': + offset = va_arg(args, size_t); + ptr8 = va_arg(args, u8 *); + length = 1; + break; + case 'w': + offset = va_arg(args, size_t); + ptr16 = va_arg(args, u16 *); + length = 2; + break; + case 'd': + offset = va_arg(args, size_t); + ptr32 = va_arg(args, u32 *); + length = 4; + break; + case 's': + offset = va_arg(args, size_t); + ptr8 = va_arg(args, u8 *); + length = va_arg(args, u32); + break; + default: + va_end(args); + debug("Couldn't recognize format string\n"); + return -1; + } + + if (offset + length > size) { + va_end(args); + return -1; + } + + switch (*format) { + case 'b': + *ptr8 = str[offset]; + break; + case 'w': + *ptr16 = get_unaligned_be16(str + offset); + break; + case 'd': + *ptr32 = get_unaligned_be32(str + offset); + break; + case 's': + memcpy(ptr8, str + offset, length); + break; + } + } + va_end(args); + + return 0; +} + +u32 tpm_command_size(const void *command) +{ + const size_t command_size_offset = 2; + + return get_unaligned_be32(command + command_size_offset); +} + +u32 tpm_return_code(const void *response) +{ + const size_t return_code_offset = 6; + + return get_unaligned_be32(response + return_code_offset); +} + +u32 tpm_sendrecv_command(const void *command, void *response, size_t *size_ptr) +{ + struct udevice *dev; + int err, ret; + u8 response_buffer[COMMAND_BUFFER_SIZE]; + size_t response_length; + int i; + + if (response) { + response_length = *size_ptr; + } else { + response = response_buffer; + response_length = sizeof(response_buffer); + } + + ret = uclass_first_device_err(UCLASS_TPM, &dev); + if (ret) + return ret; + err = tpm_xfer(dev, command, tpm_command_size(command), + response, &response_length); + + if (err < 0) + return err; + + if (size_ptr) + *size_ptr = response_length; + + ret = tpm_return_code(response); + + log(LOGC_NONE, LOGL_DEBUG, "TPM response [ret:%d]: ", ret); + for (i = 0; i < response_length; i++) + log(LOGC_NONE, LOGL_DEBUG, "%02x ", ((u8 *)response)[i]); + log(LOGC_NONE, LOGL_DEBUG, "\n"); + + return ret; +} + +int tpm_init(void) +{ + struct udevice *dev; + int err; + + err = uclass_first_device_err(UCLASS_TPM, &dev); + if (err) + return err; + + return tpm_open(dev); +} diff --git a/lib/tpm-utils.h b/lib/tpm-utils.h new file mode 100644 index 00000000000..a9cb7dc7ee5 --- /dev/null +++ b/lib/tpm-utils.h @@ -0,0 +1,101 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2013 The Chromium OS Authors. + * Coypright (c) 2013 Guntermann & Drunck GmbH + */ + +#ifndef __TPM_UTILS_H +#define __TPM_UTILS_H + +#define COMMAND_BUFFER_SIZE 256 + +/* Internal error of TPM command library */ +#define TPM_LIB_ERROR ((u32)~0u) + +/* To make strings of commands more easily */ +#define __MSB(x) ((x) >> 8) +#define __LSB(x) ((x) & 0xFF) +#define tpm_u16(x) __MSB(x), __LSB(x) +#define tpm_u32(x) tpm_u16((x) >> 16), tpm_u16((x) & 0xFFFF) + +/** + * tpm_open() - Request access to locality 0 for the caller + * + * After all commands have been completed the caller is supposed to + * call tpm_close(). + * + * Returns 0 on success, -ve on failure. + */ +int tpm_open(struct udevice *dev); + +/** + * tpm_close() - Close the current session + * + * Releasing the locked locality. Returns 0 on success, -ve 1 on + * failure (in case lock removal did not succeed). + */ +int tpm_close(struct udevice *dev); + +/** + * Pack data into a byte string. The data types are specified in + * the format string: 'b' means unsigned byte, 'w' unsigned word, + * 'd' unsigned double word, and 's' byte string. The data are a + * series of offsets and values (for type byte string there are also + * lengths). The data values are packed into the byte string + * sequentially, and so a latter value could over-write a former + * value. + * + * @param str output string + * @param size size of output string + * @param format format string + * @param ... data points + * @return 0 on success, non-0 on error + */ +int pack_byte_string(u8 *str, size_t size, const char *format, ...); + +/** + * Unpack data from a byte string. The data types are specified in + * the format string: 'b' means unsigned byte, 'w' unsigned word, + * 'd' unsigned double word, and 's' byte string. The data are a + * series of offsets and pointers (for type byte string there are also + * lengths). + * + * @param str output string + * @param size size of output string + * @param format format string + * @param ... data points + * @return 0 on success, non-0 on error + */ +int unpack_byte_string(const u8 *str, size_t size, const char *format, ...); + +/** + * Get TPM command size. + * + * @param command byte string of TPM command + * @return command size of the TPM command + */ +u32 tpm_command_size(const void *command); + +/** + * Get TPM response return code, which is one of TPM_RESULT values. + * + * @param response byte string of TPM response + * @return return code of the TPM response + */ +u32 tpm_return_code(const void *response); + +/** + * Send a TPM command and return response's return code, and optionally + * return response to caller. + * + * @param command byte string of TPM command + * @param response output buffer for TPM response, or NULL if the + * caller does not care about it + * @param size_ptr output buffer size (input parameter) and TPM + * response length (output parameter); this parameter + * is a bidirectional + * @return return code of the TPM response + */ +u32 tpm_sendrecv_command(const void *command, void *response, size_t *size_ptr); + +#endif /* __TPM_UTILS_H */ diff --git a/lib/tpm.c b/lib/tpm-v1.c index bc9652d8e4e..7aecb24f921 100644 --- a/lib/tpm.c +++ b/lib/tpm-v1.c @@ -6,26 +6,11 @@ #include <common.h> #include <dm.h> -#include <tpm.h> #include <asm/unaligned.h> #include <u-boot/sha1.h> - -/* Internal error of TPM command library */ -#define TPM_LIB_ERROR ((uint32_t)~0u) - -/* Useful constants */ -enum { - COMMAND_BUFFER_SIZE = 256, - TPM_REQUEST_HEADER_LENGTH = 10, - TPM_RESPONSE_HEADER_LENGTH = 10, - PCR_DIGEST_LENGTH = 20, - DIGEST_LENGTH = 20, - TPM_REQUEST_AUTH_LENGTH = 45, - TPM_RESPONSE_AUTH_LENGTH = 41, - /* some max lengths, valid for RSA keys <= 2048 bits */ - TPM_KEY12_MAX_LENGTH = 618, - TPM_PUBKEY_MAX_LENGTH = 288, -}; +#include <tpm-common.h> +#include <tpm-v1.h> +#include "tpm-utils.h" #ifdef CONFIG_TPM_AUTH_SESSIONS @@ -35,277 +20,50 @@ enum { struct session_data { int valid; - uint32_t handle; - uint8_t nonce_even[DIGEST_LENGTH]; - uint8_t nonce_odd[DIGEST_LENGTH]; + u32 handle; + u8 nonce_even[DIGEST_LENGTH]; + u8 nonce_odd[DIGEST_LENGTH]; }; static struct session_data oiap_session = {0, }; #endif /* CONFIG_TPM_AUTH_SESSIONS */ -/** - * Pack data into a byte string. The data types are specified in - * the format string: 'b' means unsigned byte, 'w' unsigned word, - * 'd' unsigned double word, and 's' byte string. The data are a - * series of offsets and values (for type byte string there are also - * lengths). The data values are packed into the byte string - * sequentially, and so a latter value could over-write a former - * value. - * - * @param str output string - * @param size size of output string - * @param format format string - * @param ... data points - * @return 0 on success, non-0 on error - */ -int pack_byte_string(uint8_t *str, size_t size, const char *format, ...) -{ - va_list args; - size_t offset = 0, length = 0; - uint8_t *data = NULL; - uint32_t value = 0; - - va_start(args, format); - for (; *format; format++) { - switch (*format) { - case 'b': - offset = va_arg(args, size_t); - value = va_arg(args, int); - length = 1; - break; - case 'w': - offset = va_arg(args, size_t); - value = va_arg(args, int); - length = 2; - break; - case 'd': - offset = va_arg(args, size_t); - value = va_arg(args, uint32_t); - length = 4; - break; - case 's': - offset = va_arg(args, size_t); - data = va_arg(args, uint8_t *); - length = va_arg(args, uint32_t); - break; - default: - debug("Couldn't recognize format string\n"); - va_end(args); - return -1; - } - - if (offset + length > size) { - va_end(args); - return -1; - } - - switch (*format) { - case 'b': - str[offset] = value; - break; - case 'w': - put_unaligned_be16(value, str + offset); - break; - case 'd': - put_unaligned_be32(value, str + offset); - break; - case 's': - memcpy(str + offset, data, length); - break; - } - } - va_end(args); - - return 0; -} - -/** - * Unpack data from a byte string. The data types are specified in - * the format string: 'b' means unsigned byte, 'w' unsigned word, - * 'd' unsigned double word, and 's' byte string. The data are a - * series of offsets and pointers (for type byte string there are also - * lengths). - * - * @param str output string - * @param size size of output string - * @param format format string - * @param ... data points - * @return 0 on success, non-0 on error - */ -int unpack_byte_string(const uint8_t *str, size_t size, const char *format, ...) -{ - va_list args; - size_t offset = 0, length = 0; - uint8_t *ptr8 = NULL; - uint16_t *ptr16 = NULL; - uint32_t *ptr32 = NULL; - - va_start(args, format); - for (; *format; format++) { - switch (*format) { - case 'b': - offset = va_arg(args, size_t); - ptr8 = va_arg(args, uint8_t *); - length = 1; - break; - case 'w': - offset = va_arg(args, size_t); - ptr16 = va_arg(args, uint16_t *); - length = 2; - break; - case 'd': - offset = va_arg(args, size_t); - ptr32 = va_arg(args, uint32_t *); - length = 4; - break; - case 's': - offset = va_arg(args, size_t); - ptr8 = va_arg(args, uint8_t *); - length = va_arg(args, uint32_t); - break; - default: - va_end(args); - debug("Couldn't recognize format string\n"); - return -1; - } - - if (offset + length > size) { - va_end(args); - return -1; - } - - switch (*format) { - case 'b': - *ptr8 = str[offset]; - break; - case 'w': - *ptr16 = get_unaligned_be16(str + offset); - break; - case 'd': - *ptr32 = get_unaligned_be32(str + offset); - break; - case 's': - memcpy(ptr8, str + offset, length); - break; - } - } - va_end(args); - - return 0; -} - -/** - * Get TPM command size. - * - * @param command byte string of TPM command - * @return command size of the TPM command - */ -static uint32_t tpm_command_size(const void *command) +u32 tpm_startup(enum tpm_startup_type mode) { - const size_t command_size_offset = 2; - return get_unaligned_be32(command + command_size_offset); -} - -/** - * Get TPM response return code, which is one of TPM_RESULT values. - * - * @param response byte string of TPM response - * @return return code of the TPM response - */ -static uint32_t tpm_return_code(const void *response) -{ - const size_t return_code_offset = 6; - return get_unaligned_be32(response + return_code_offset); -} - -/** - * Send a TPM command and return response's return code, and optionally - * return response to caller. - * - * @param command byte string of TPM command - * @param response output buffer for TPM response, or NULL if the - * caller does not care about it - * @param size_ptr output buffer size (input parameter) and TPM - * response length (output parameter); this parameter - * is a bidirectional - * @return return code of the TPM response - */ -static uint32_t tpm_sendrecv_command(const void *command, - void *response, size_t *size_ptr) -{ - struct udevice *dev; - int err, ret; - uint8_t response_buffer[COMMAND_BUFFER_SIZE]; - size_t response_length; - - if (response) { - response_length = *size_ptr; - } else { - response = response_buffer; - response_length = sizeof(response_buffer); - } - - ret = uclass_first_device_err(UCLASS_TPM, &dev); - if (ret) - return ret; - err = tpm_xfer(dev, command, tpm_command_size(command), - response, &response_length); - - if (err < 0) - return TPM_LIB_ERROR; - if (size_ptr) - *size_ptr = response_length; - - return tpm_return_code(response); -} - -int tpm_init(void) -{ - int err; - struct udevice *dev; - - err = uclass_first_device_err(UCLASS_TPM, &dev); - if (err) - return err; - return tpm_open(dev); -} - -uint32_t tpm_startup(enum tpm_startup_type mode) -{ - const uint8_t command[12] = { + const u8 command[12] = { 0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x0, 0x0, 0x0, 0x99, 0x0, 0x0, }; const size_t mode_offset = 10; - uint8_t buf[COMMAND_BUFFER_SIZE]; + u8 buf[COMMAND_BUFFER_SIZE]; if (pack_byte_string(buf, sizeof(buf), "sw", - 0, command, sizeof(command), - mode_offset, mode)) + 0, command, sizeof(command), + mode_offset, mode)) return TPM_LIB_ERROR; return tpm_sendrecv_command(buf, NULL, NULL); } -uint32_t tpm_self_test_full(void) +u32 tpm_self_test_full(void) { - const uint8_t command[10] = { + const u8 command[10] = { 0x0, 0xc1, 0x0, 0x0, 0x0, 0xa, 0x0, 0x0, 0x0, 0x50, }; return tpm_sendrecv_command(command, NULL, NULL); } -uint32_t tpm_continue_self_test(void) +u32 tpm_continue_self_test(void) { - const uint8_t command[10] = { + const u8 command[10] = { 0x0, 0xc1, 0x0, 0x0, 0x0, 0xa, 0x0, 0x0, 0x0, 0x53, }; return tpm_sendrecv_command(command, NULL, NULL); } -uint32_t tpm_nv_define_space(uint32_t index, uint32_t perm, uint32_t size) +u32 tpm_nv_define_space(u32 index, u32 perm, u32 size) { - const uint8_t command[101] = { + const u8 command[101] = { 0x0, 0xc1, /* TPM_TAG */ 0x0, 0x0, 0x0, 0x65, /* parameter size */ 0x0, 0x0, 0x0, 0xcc, /* TPM_COMMAND_CODE */ @@ -334,55 +92,55 @@ uint32_t tpm_nv_define_space(uint32_t index, uint32_t perm, uint32_t size) const size_t index_offset = 12; const size_t perm_offset = 70; const size_t size_offset = 77; - uint8_t buf[COMMAND_BUFFER_SIZE]; + u8 buf[COMMAND_BUFFER_SIZE]; if (pack_byte_string(buf, sizeof(buf), "sddd", - 0, command, sizeof(command), - index_offset, index, - perm_offset, perm, - size_offset, size)) + 0, command, sizeof(command), + index_offset, index, + perm_offset, perm, + size_offset, size)) return TPM_LIB_ERROR; return tpm_sendrecv_command(buf, NULL, NULL); } -uint32_t tpm_nv_read_value(uint32_t index, void *data, uint32_t count) +u32 tpm_nv_read_value(u32 index, void *data, u32 count) { - const uint8_t command[22] = { + const u8 command[22] = { 0x0, 0xc1, 0x0, 0x0, 0x0, 0x16, 0x0, 0x0, 0x0, 0xcf, }; const size_t index_offset = 10; const size_t length_offset = 18; const size_t data_size_offset = 10; const size_t data_offset = 14; - uint8_t buf[COMMAND_BUFFER_SIZE], response[COMMAND_BUFFER_SIZE]; + u8 buf[COMMAND_BUFFER_SIZE], response[COMMAND_BUFFER_SIZE]; size_t response_length = sizeof(response); - uint32_t data_size; - uint32_t err; + u32 data_size; + u32 err; if (pack_byte_string(buf, sizeof(buf), "sdd", - 0, command, sizeof(command), - index_offset, index, - length_offset, count)) + 0, command, sizeof(command), + index_offset, index, + length_offset, count)) return TPM_LIB_ERROR; err = tpm_sendrecv_command(buf, response, &response_length); if (err) return err; if (unpack_byte_string(response, response_length, "d", - data_size_offset, &data_size)) + data_size_offset, &data_size)) return TPM_LIB_ERROR; if (data_size > count) return TPM_LIB_ERROR; if (unpack_byte_string(response, response_length, "s", - data_offset, data, data_size)) + data_offset, data, data_size)) return TPM_LIB_ERROR; return 0; } -uint32_t tpm_nv_write_value(uint32_t index, const void *data, uint32_t length) +u32 tpm_nv_write_value(u32 index, const void *data, u32 length) { - const uint8_t command[256] = { + const u8 command[256] = { 0x0, 0xc1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0xcd, }; const size_t command_size_offset = 2; @@ -390,18 +148,18 @@ uint32_t tpm_nv_write_value(uint32_t index, const void *data, uint32_t length) const size_t length_offset = 18; const size_t data_offset = 22; const size_t write_info_size = 12; - const uint32_t total_length = + const u32 total_length = TPM_REQUEST_HEADER_LENGTH + write_info_size + length; - uint8_t buf[COMMAND_BUFFER_SIZE], response[COMMAND_BUFFER_SIZE]; + u8 buf[COMMAND_BUFFER_SIZE], response[COMMAND_BUFFER_SIZE]; size_t response_length = sizeof(response); - uint32_t err; + u32 err; if (pack_byte_string(buf, sizeof(buf), "sddds", - 0, command, sizeof(command), - command_size_offset, total_length, - index_offset, index, - length_offset, length, - data_offset, data, length)) + 0, command, sizeof(command), + command_size_offset, total_length, + index_offset, index, + length_offset, length, + data_offset, data, length)) return TPM_LIB_ERROR; err = tpm_sendrecv_command(buf, response, &response_length); if (err) @@ -410,99 +168,99 @@ uint32_t tpm_nv_write_value(uint32_t index, const void *data, uint32_t length) return 0; } -uint32_t tpm_extend(uint32_t index, const void *in_digest, void *out_digest) +u32 tpm_extend(u32 index, const void *in_digest, void *out_digest) { - const uint8_t command[34] = { + const u8 command[34] = { 0x0, 0xc1, 0x0, 0x0, 0x0, 0x22, 0x0, 0x0, 0x0, 0x14, }; const size_t index_offset = 10; const size_t in_digest_offset = 14; const size_t out_digest_offset = 10; - uint8_t buf[COMMAND_BUFFER_SIZE]; - uint8_t response[TPM_RESPONSE_HEADER_LENGTH + PCR_DIGEST_LENGTH]; + u8 buf[COMMAND_BUFFER_SIZE]; + u8 response[TPM_RESPONSE_HEADER_LENGTH + PCR_DIGEST_LENGTH]; size_t response_length = sizeof(response); - uint32_t err; + u32 err; if (pack_byte_string(buf, sizeof(buf), "sds", - 0, command, sizeof(command), - index_offset, index, - in_digest_offset, in_digest, - PCR_DIGEST_LENGTH)) + 0, command, sizeof(command), + index_offset, index, + in_digest_offset, in_digest, + PCR_DIGEST_LENGTH)) return TPM_LIB_ERROR; err = tpm_sendrecv_command(buf, response, &response_length); if (err) return err; if (unpack_byte_string(response, response_length, "s", - out_digest_offset, out_digest, - PCR_DIGEST_LENGTH)) + out_digest_offset, out_digest, + PCR_DIGEST_LENGTH)) return TPM_LIB_ERROR; return 0; } -uint32_t tpm_pcr_read(uint32_t index, void *data, size_t count) +u32 tpm_pcr_read(u32 index, void *data, size_t count) { - const uint8_t command[14] = { + const u8 command[14] = { 0x0, 0xc1, 0x0, 0x0, 0x0, 0xe, 0x0, 0x0, 0x0, 0x15, }; const size_t index_offset = 10; const size_t out_digest_offset = 10; - uint8_t buf[COMMAND_BUFFER_SIZE], response[COMMAND_BUFFER_SIZE]; + u8 buf[COMMAND_BUFFER_SIZE], response[COMMAND_BUFFER_SIZE]; size_t response_length = sizeof(response); - uint32_t err; + u32 err; if (count < PCR_DIGEST_LENGTH) return TPM_LIB_ERROR; if (pack_byte_string(buf, sizeof(buf), "sd", - 0, command, sizeof(command), - index_offset, index)) + 0, command, sizeof(command), + index_offset, index)) return TPM_LIB_ERROR; err = tpm_sendrecv_command(buf, response, &response_length); if (err) return err; if (unpack_byte_string(response, response_length, "s", - out_digest_offset, data, PCR_DIGEST_LENGTH)) + out_digest_offset, data, PCR_DIGEST_LENGTH)) return TPM_LIB_ERROR; return 0; } -uint32_t tpm_tsc_physical_presence(uint16_t presence) +u32 tpm_tsc_physical_presence(u16 presence) { - const uint8_t command[12] = { + const u8 command[12] = { 0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x40, 0x0, 0x0, 0xa, 0x0, 0x0, }; const size_t presence_offset = 10; - uint8_t buf[COMMAND_BUFFER_SIZE]; + u8 buf[COMMAND_BUFFER_SIZE]; if (pack_byte_string(buf, sizeof(buf), "sw", - 0, command, sizeof(command), - presence_offset, presence)) + 0, command, sizeof(command), + presence_offset, presence)) return TPM_LIB_ERROR; return tpm_sendrecv_command(buf, NULL, NULL); } -uint32_t tpm_read_pubek(void *data, size_t count) +u32 tpm_read_pubek(void *data, size_t count) { - const uint8_t command[30] = { + const u8 command[30] = { 0x0, 0xc1, 0x0, 0x0, 0x0, 0x1e, 0x0, 0x0, 0x0, 0x7c, }; const size_t response_size_offset = 2; const size_t data_offset = 10; const size_t header_and_checksum_size = TPM_RESPONSE_HEADER_LENGTH + 20; - uint8_t response[COMMAND_BUFFER_SIZE + TPM_PUBEK_SIZE]; + u8 response[COMMAND_BUFFER_SIZE + TPM_PUBEK_SIZE]; size_t response_length = sizeof(response); - uint32_t data_size; - uint32_t err; + u32 data_size; + u32 err; err = tpm_sendrecv_command(command, response, &response_length); if (err) return err; if (unpack_byte_string(response, response_length, "d", - response_size_offset, &data_size)) + response_size_offset, &data_size)) return TPM_LIB_ERROR; if (data_size < header_and_checksum_size) return TPM_LIB_ERROR; @@ -510,59 +268,58 @@ uint32_t tpm_read_pubek(void *data, size_t count) if (data_size > count) return TPM_LIB_ERROR; if (unpack_byte_string(response, response_length, "s", - data_offset, data, data_size)) + data_offset, data, data_size)) return TPM_LIB_ERROR; return 0; } -uint32_t tpm_force_clear(void) +u32 tpm_force_clear(void) { - const uint8_t command[10] = { + const u8 command[10] = { 0x0, 0xc1, 0x0, 0x0, 0x0, 0xa, 0x0, 0x0, 0x0, 0x5d, }; return tpm_sendrecv_command(command, NULL, NULL); } -uint32_t tpm_physical_enable(void) +u32 tpm_physical_enable(void) { - const uint8_t command[10] = { + const u8 command[10] = { 0x0, 0xc1, 0x0, 0x0, 0x0, 0xa, 0x0, 0x0, 0x0, 0x6f, }; return tpm_sendrecv_command(command, NULL, NULL); } -uint32_t tpm_physical_disable(void) +u32 tpm_physical_disable(void) { - const uint8_t command[10] = { + const u8 command[10] = { 0x0, 0xc1, 0x0, 0x0, 0x0, 0xa, 0x0, 0x0, 0x0, 0x70, }; return tpm_sendrecv_command(command, NULL, NULL); } -uint32_t tpm_physical_set_deactivated(uint8_t state) +u32 tpm_physical_set_deactivated(u8 state) { - const uint8_t command[11] = { + const u8 command[11] = { 0x0, 0xc1, 0x0, 0x0, 0x0, 0xb, 0x0, 0x0, 0x0, 0x72, }; const size_t state_offset = 10; - uint8_t buf[COMMAND_BUFFER_SIZE]; + u8 buf[COMMAND_BUFFER_SIZE]; if (pack_byte_string(buf, sizeof(buf), "sb", - 0, command, sizeof(command), - state_offset, state)) + 0, command, sizeof(command), + state_offset, state)) return TPM_LIB_ERROR; return tpm_sendrecv_command(buf, NULL, NULL); } -uint32_t tpm_get_capability(uint32_t cap_area, uint32_t sub_cap, - void *cap, size_t count) +u32 tpm_get_capability(u32 cap_area, u32 sub_cap, void *cap, size_t count) { - const uint8_t command[22] = { + const u8 command[22] = { 0x0, 0xc1, /* TPM_TAG */ 0x0, 0x0, 0x0, 0x16, /* parameter size */ 0x0, 0x0, 0x0, 0x65, /* TPM_COMMAND_CODE */ @@ -574,34 +331,34 @@ uint32_t tpm_get_capability(uint32_t cap_area, uint32_t sub_cap, const size_t sub_cap_offset = 18; const size_t cap_offset = 14; const size_t cap_size_offset = 10; - uint8_t buf[COMMAND_BUFFER_SIZE], response[COMMAND_BUFFER_SIZE]; + u8 buf[COMMAND_BUFFER_SIZE], response[COMMAND_BUFFER_SIZE]; size_t response_length = sizeof(response); - uint32_t cap_size; - uint32_t err; + u32 cap_size; + u32 err; if (pack_byte_string(buf, sizeof(buf), "sdd", - 0, command, sizeof(command), - cap_area_offset, cap_area, - sub_cap_offset, sub_cap)) + 0, command, sizeof(command), + cap_area_offset, cap_area, + sub_cap_offset, sub_cap)) return TPM_LIB_ERROR; err = tpm_sendrecv_command(buf, response, &response_length); if (err) return err; if (unpack_byte_string(response, response_length, "d", - cap_size_offset, &cap_size)) + cap_size_offset, &cap_size)) return TPM_LIB_ERROR; if (cap_size > response_length || cap_size > count) return TPM_LIB_ERROR; if (unpack_byte_string(response, response_length, "s", - cap_offset, cap, cap_size)) + cap_offset, cap, cap_size)) return TPM_LIB_ERROR; return 0; } -uint32_t tpm_get_permanent_flags(struct tpm_permanent_flags *pflags) +u32 tpm_get_permanent_flags(struct tpm_permanent_flags *pflags) { - const uint8_t command[22] = { + const u8 command[22] = { 0x0, 0xc1, /* TPM_TAG */ 0x0, 0x0, 0x0, 0x16, /* parameter size */ 0x0, 0x0, 0x0, 0x65, /* TPM_COMMAND_CODE */ @@ -610,11 +367,11 @@ uint32_t tpm_get_permanent_flags(struct tpm_permanent_flags *pflags) 0x0, 0x0, 0x1, 0x8, /* subcap value */ }; const size_t data_size_offset = TPM_HEADER_SIZE; - const size_t data_offset = TPM_HEADER_SIZE + sizeof (uint32_t); - uint8_t response[COMMAND_BUFFER_SIZE]; + const size_t data_offset = TPM_HEADER_SIZE + sizeof(u32); + u8 response[COMMAND_BUFFER_SIZE]; size_t response_length = sizeof(response); - uint32_t err; - uint32_t data_size; + u32 err; + u32 data_size; err = tpm_sendrecv_command(command, response, &response_length); if (err) @@ -631,9 +388,9 @@ uint32_t tpm_get_permanent_flags(struct tpm_permanent_flags *pflags) return 0; } -uint32_t tpm_get_permissions(uint32_t index, uint32_t *perm) +u32 tpm_get_permissions(u32 index, u32 *perm) { - const uint8_t command[22] = { + const u8 command[22] = { 0x0, 0xc1, /* TPM_TAG */ 0x0, 0x0, 0x0, 0x16, /* parameter size */ 0x0, 0x0, 0x0, 0x65, /* TPM_COMMAND_CODE */ @@ -642,9 +399,9 @@ uint32_t tpm_get_permissions(uint32_t index, uint32_t *perm) }; const size_t index_offset = 18; const size_t perm_offset = 60; - uint8_t buf[COMMAND_BUFFER_SIZE], response[COMMAND_BUFFER_SIZE]; + u8 buf[COMMAND_BUFFER_SIZE], response[COMMAND_BUFFER_SIZE]; size_t response_length = sizeof(response); - uint32_t err; + u32 err; if (pack_byte_string(buf, sizeof(buf), "d", 0, command, sizeof(command), index_offset, index)) @@ -660,9 +417,9 @@ uint32_t tpm_get_permissions(uint32_t index, uint32_t *perm) } #ifdef CONFIG_TPM_FLUSH_RESOURCES -uint32_t tpm_flush_specific(uint32_t key_handle, uint32_t resource_type) +u32 tpm_flush_specific(u32 key_handle, u32 resource_type) { - const uint8_t command[18] = { + const u8 command[18] = { 0x00, 0xc1, /* TPM_TAG */ 0x00, 0x00, 0x00, 0x12, /* parameter size */ 0x00, 0x00, 0x00, 0xba, /* TPM_COMMAND_CODE */ @@ -671,9 +428,9 @@ uint32_t tpm_flush_specific(uint32_t key_handle, uint32_t resource_type) }; const size_t key_handle_offset = 10; const size_t resource_type_offset = 14; - uint8_t buf[COMMAND_BUFFER_SIZE], response[COMMAND_BUFFER_SIZE]; + u8 buf[COMMAND_BUFFER_SIZE], response[COMMAND_BUFFER_SIZE]; size_t response_length = sizeof(response); - uint32_t err; + u32 err; if (pack_byte_string(buf, sizeof(buf), "sdd", 0, command, sizeof(command), @@ -702,12 +459,12 @@ uint32_t tpm_flush_specific(uint32_t key_handle, uint32_t resource_type) * @param request_auth pointer to the auth block of the request to be filled * @param auth authentication data (HMAC key) */ -static uint32_t create_request_auth(const void *request, size_t request_len0, - size_t handles_len, - struct session_data *auth_session, - void *request_auth, const void *auth) +static u32 create_request_auth(const void *request, size_t request_len0, + size_t handles_len, + struct session_data *auth_session, + void *request_auth, const void *auth) { - uint8_t hmac_data[DIGEST_LENGTH * 3 + 1]; + u8 hmac_data[DIGEST_LENGTH * 3 + 1]; sha1_context hash_ctx; const size_t command_code_offset = 6; const size_t auth_nonce_odd_offset = 4; @@ -765,19 +522,18 @@ static uint32_t create_request_auth(const void *request, size_t request_len0, * @param response_auth pointer to the auth block of the response to be verified * @param auth authentication data (HMAC key) */ -static uint32_t verify_response_auth(uint32_t command_code, - const void *response, size_t response_len0, - size_t handles_len, - struct session_data *auth_session, - const void *response_auth, const void *auth) +static u32 verify_response_auth(u32 command_code, const void *response, + size_t response_len0, size_t handles_len, + struct session_data *auth_session, + const void *response_auth, const void *auth) { - uint8_t hmac_data[DIGEST_LENGTH * 3 + 1]; - uint8_t computed_auth[DIGEST_LENGTH]; + u8 hmac_data[DIGEST_LENGTH * 3 + 1]; + u8 computed_auth[DIGEST_LENGTH]; sha1_context hash_ctx; const size_t return_code_offset = 6; const size_t auth_continue_offset = 20; const size_t auth_auth_offset = 21; - uint8_t auth_continue; + u8 auth_continue; if (!auth_session || !auth_session->valid) return TPM_AUTHFAIL; @@ -798,7 +554,7 @@ static uint32_t verify_response_auth(uint32_t command_code, sha1_finish(&hash_ctx, hmac_data); memcpy(auth_session->nonce_even, response_auth, DIGEST_LENGTH); - auth_continue = ((uint8_t *)response_auth)[auth_continue_offset]; + auth_continue = ((u8 *)response_auth)[auth_continue_offset]; if (pack_byte_string(hmac_data, sizeof(hmac_data), "ssb", DIGEST_LENGTH, response_auth, @@ -820,18 +576,17 @@ static uint32_t verify_response_auth(uint32_t command_code, return TPM_SUCCESS; } - -uint32_t tpm_terminate_auth_session(uint32_t auth_handle) +u32 tpm_terminate_auth_session(u32 auth_handle) { - const uint8_t command[18] = { + const u8 command[18] = { 0x00, 0xc1, /* TPM_TAG */ 0x00, 0x00, 0x00, 0x00, /* parameter size */ 0x00, 0x00, 0x00, 0xba, /* TPM_COMMAND_CODE */ 0x00, 0x00, 0x00, 0x00, /* TPM_HANDLE */ - 0x00, 0x00, 0x00, 0x02, /* TPM_RESSOURCE_TYPE */ + 0x00, 0x00, 0x00, 0x02, /* TPM_RESOURCE_TYPE */ }; const size_t req_handle_offset = TPM_REQUEST_HEADER_LENGTH; - uint8_t request[COMMAND_BUFFER_SIZE]; + u8 request[COMMAND_BUFFER_SIZE]; if (pack_byte_string(request, sizeof(request), "sd", 0, command, sizeof(command), @@ -843,26 +598,27 @@ uint32_t tpm_terminate_auth_session(uint32_t auth_handle) return tpm_sendrecv_command(request, NULL, NULL); } -uint32_t tpm_end_oiap(void) +u32 tpm_end_oiap(void) { - uint32_t err = TPM_SUCCESS; + u32 err = TPM_SUCCESS; + if (oiap_session.valid) err = tpm_terminate_auth_session(oiap_session.handle); return err; } -uint32_t tpm_oiap(uint32_t *auth_handle) +u32 tpm_oiap(u32 *auth_handle) { - const uint8_t command[10] = { + const u8 command[10] = { 0x00, 0xc1, /* TPM_TAG */ 0x00, 0x00, 0x00, 0x0a, /* parameter size */ 0x00, 0x00, 0x00, 0x0a, /* TPM_COMMAND_CODE */ }; const size_t res_auth_handle_offset = TPM_RESPONSE_HEADER_LENGTH; const size_t res_nonce_even_offset = TPM_RESPONSE_HEADER_LENGTH + 4; - uint8_t response[COMMAND_BUFFER_SIZE]; + u8 response[COMMAND_BUFFER_SIZE]; size_t response_length = sizeof(response); - uint32_t err; + u32 err; if (oiap_session.valid) tpm_terminate_auth_session(oiap_session.handle); @@ -873,7 +629,7 @@ uint32_t tpm_oiap(uint32_t *auth_handle) if (unpack_byte_string(response, response_length, "ds", res_auth_handle_offset, &oiap_session.handle, res_nonce_even_offset, &oiap_session.nonce_even, - (uint32_t)DIGEST_LENGTH)) + (u32)DIGEST_LENGTH)) return TPM_LIB_ERROR; oiap_session.valid = 1; if (auth_handle) @@ -881,12 +637,10 @@ uint32_t tpm_oiap(uint32_t *auth_handle) return 0; } -uint32_t tpm_load_key2_oiap(uint32_t parent_handle, - const void *key, size_t key_length, - const void *parent_key_usage_auth, - uint32_t *key_handle) +u32 tpm_load_key2_oiap(u32 parent_handle, const void *key, size_t key_length, + const void *parent_key_usage_auth, u32 *key_handle) { - const uint8_t command[14] = { + const u8 command[14] = { 0x00, 0xc2, /* TPM_TAG */ 0x00, 0x00, 0x00, 0x00, /* parameter size */ 0x00, 0x00, 0x00, 0x41, /* TPM_COMMAND_CODE */ @@ -896,11 +650,11 @@ uint32_t tpm_load_key2_oiap(uint32_t parent_handle, const size_t req_parent_handle_offset = TPM_REQUEST_HEADER_LENGTH; const size_t req_key_offset = TPM_REQUEST_HEADER_LENGTH + 4; const size_t res_handle_offset = TPM_RESPONSE_HEADER_LENGTH; - uint8_t request[sizeof(command) + TPM_KEY12_MAX_LENGTH - + TPM_REQUEST_AUTH_LENGTH]; - uint8_t response[COMMAND_BUFFER_SIZE]; + u8 request[sizeof(command) + TPM_KEY12_MAX_LENGTH + + TPM_REQUEST_AUTH_LENGTH]; + u8 response[COMMAND_BUFFER_SIZE]; size_t response_length = sizeof(response); - uint32_t err; + u32 err; if (!oiap_session.valid) { err = tpm_oiap(NULL); @@ -918,9 +672,9 @@ uint32_t tpm_load_key2_oiap(uint32_t parent_handle, return TPM_LIB_ERROR; err = create_request_auth(request, sizeof(command) + key_length, 4, - &oiap_session, - request + sizeof(command) + key_length, - parent_key_usage_auth); + &oiap_session, + request + sizeof(command) + key_length, + parent_key_usage_auth); if (err) return err; err = tpm_sendrecv_command(request, response, &response_length); @@ -931,10 +685,11 @@ uint32_t tpm_load_key2_oiap(uint32_t parent_handle, } err = verify_response_auth(0x00000041, response, - response_length - TPM_RESPONSE_AUTH_LENGTH, - 4, &oiap_session, - response + response_length - TPM_RESPONSE_AUTH_LENGTH, - parent_key_usage_auth); + response_length - TPM_RESPONSE_AUTH_LENGTH, + 4, &oiap_session, + response + response_length - + TPM_RESPONSE_AUTH_LENGTH, + parent_key_usage_auth); if (err) return err; @@ -947,10 +702,10 @@ uint32_t tpm_load_key2_oiap(uint32_t parent_handle, return 0; } -uint32_t tpm_get_pub_key_oiap(uint32_t key_handle, const void *usage_auth, - void *pubkey, size_t *pubkey_len) +u32 tpm_get_pub_key_oiap(u32 key_handle, const void *usage_auth, void *pubkey, + size_t *pubkey_len) { - const uint8_t command[14] = { + const u8 command[14] = { 0x00, 0xc2, /* TPM_TAG */ 0x00, 0x00, 0x00, 0x00, /* parameter size */ 0x00, 0x00, 0x00, 0x21, /* TPM_COMMAND_CODE */ @@ -959,11 +714,11 @@ uint32_t tpm_get_pub_key_oiap(uint32_t key_handle, const void *usage_auth, const size_t req_size_offset = 2; const size_t req_key_handle_offset = TPM_REQUEST_HEADER_LENGTH; const size_t res_pubkey_offset = TPM_RESPONSE_HEADER_LENGTH; - uint8_t request[sizeof(command) + TPM_REQUEST_AUTH_LENGTH]; - uint8_t response[TPM_RESPONSE_HEADER_LENGTH + TPM_PUBKEY_MAX_LENGTH - + TPM_RESPONSE_AUTH_LENGTH]; + u8 request[sizeof(command) + TPM_REQUEST_AUTH_LENGTH]; + u8 response[TPM_RESPONSE_HEADER_LENGTH + TPM_PUBKEY_MAX_LENGTH + + TPM_RESPONSE_AUTH_LENGTH]; size_t response_length = sizeof(response); - uint32_t err; + u32 err; if (!oiap_session.valid) { err = tpm_oiap(NULL); @@ -973,13 +728,13 @@ uint32_t tpm_get_pub_key_oiap(uint32_t key_handle, const void *usage_auth, if (pack_byte_string(request, sizeof(request), "sdd", 0, command, sizeof(command), req_size_offset, - (uint32_t)(sizeof(command) + (u32)(sizeof(command) + TPM_REQUEST_AUTH_LENGTH), req_key_handle_offset, key_handle )) return TPM_LIB_ERROR; err = create_request_auth(request, sizeof(command), 4, &oiap_session, - request + sizeof(command), usage_auth); + request + sizeof(command), usage_auth); if (err) return err; err = tpm_sendrecv_command(request, response, &response_length); @@ -989,16 +744,17 @@ uint32_t tpm_get_pub_key_oiap(uint32_t key_handle, const void *usage_auth, return err; } err = verify_response_auth(0x00000021, response, - response_length - TPM_RESPONSE_AUTH_LENGTH, - 0, &oiap_session, - response + response_length - TPM_RESPONSE_AUTH_LENGTH, - usage_auth); + response_length - TPM_RESPONSE_AUTH_LENGTH, + 0, &oiap_session, + response + response_length - + TPM_RESPONSE_AUTH_LENGTH, + usage_auth); if (err) return err; if (pubkey) { if ((response_length - TPM_RESPONSE_HEADER_LENGTH - - TPM_RESPONSE_AUTH_LENGTH) > *pubkey_len) + - TPM_RESPONSE_AUTH_LENGTH) > *pubkey_len) return TPM_LIB_ERROR; *pubkey_len = response_length - TPM_RESPONSE_HEADER_LENGTH - TPM_RESPONSE_AUTH_LENGTH; @@ -1011,15 +767,15 @@ uint32_t tpm_get_pub_key_oiap(uint32_t key_handle, const void *usage_auth, } #ifdef CONFIG_TPM_LOAD_KEY_BY_SHA1 -uint32_t tpm_find_key_sha1(const uint8_t auth[20], const uint8_t - pubkey_digest[20], uint32_t *handle) -{ - uint16_t key_count; - uint32_t key_handles[10]; - uint8_t buf[288]; - uint8_t *ptr; - uint32_t err; - uint8_t digest[20]; +u32 tpm_find_key_sha1(const u8 auth[20], const u8 pubkey_digest[20], + u32 *handle) +{ + u16 key_count; + u32 key_handles[10]; + u8 buf[288]; + u8 *ptr; + u32 err; + u8 digest[20]; size_t buf_len; unsigned int i; @@ -1052,9 +808,9 @@ uint32_t tpm_find_key_sha1(const uint8_t auth[20], const uint8_t #endif /* CONFIG_TPM_AUTH_SESSIONS */ -uint32_t tpm_get_random(void *data, uint32_t count) +u32 tpm_get_random(void *data, u32 count) { - const uint8_t command[14] = { + const u8 command[14] = { 0x0, 0xc1, /* TPM_TAG */ 0x0, 0x0, 0x0, 0xe, /* parameter size */ 0x0, 0x0, 0x0, 0x46, /* TPM_COMMAND_CODE */ @@ -1062,15 +818,15 @@ uint32_t tpm_get_random(void *data, uint32_t count) const size_t length_offset = 10; const size_t data_size_offset = 10; const size_t data_offset = 14; - uint8_t buf[COMMAND_BUFFER_SIZE], response[COMMAND_BUFFER_SIZE]; + u8 buf[COMMAND_BUFFER_SIZE], response[COMMAND_BUFFER_SIZE]; size_t response_length = sizeof(response); - uint32_t data_size; - uint8_t *out = data; + u32 data_size; + u8 *out = data; while (count > 0) { - uint32_t this_bytes = min((size_t)count, - sizeof (response) - data_offset); - uint32_t err; + u32 this_bytes = min((size_t)count, + sizeof(response) - data_offset); + u32 err; if (pack_byte_string(buf, sizeof(buf), "sd", 0, command, sizeof(command), diff --git a/lib/tpm-v2.c b/lib/tpm-v2.c new file mode 100644 index 00000000000..f1bbca8e7aa --- /dev/null +++ b/lib/tpm-v2.c @@ -0,0 +1,419 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2018 Bootlin + * Author: Miquel Raynal <miquel.raynal@bootlin.com> + */ + +#include <common.h> +#include <dm.h> +#include <tpm-common.h> +#include <tpm-v2.h> +#include "tpm-utils.h" + +u32 tpm2_startup(enum tpm2_startup_types mode) +{ + const u8 command_v2[12] = { + tpm_u16(TPM2_ST_NO_SESSIONS), + tpm_u32(12), + tpm_u32(TPM2_CC_STARTUP), + tpm_u16(mode), + }; + int ret; + + /* + * Note TPM2_Startup command will return RC_SUCCESS the first time, + * but will return RC_INITIALIZE otherwise. + */ + ret = tpm_sendrecv_command(command_v2, NULL, NULL); + if (ret && ret != TPM2_RC_INITIALIZE) + return ret; + + return 0; +} + +u32 tpm2_self_test(enum tpm2_yes_no full_test) +{ + const u8 command_v2[12] = { + tpm_u16(TPM2_ST_NO_SESSIONS), + tpm_u32(11), + tpm_u32(TPM2_CC_SELF_TEST), + full_test, + }; + + return tpm_sendrecv_command(command_v2, NULL, NULL); +} + +u32 tpm2_clear(u32 handle, const char *pw, const ssize_t pw_sz) +{ + u8 command_v2[COMMAND_BUFFER_SIZE] = { + tpm_u16(TPM2_ST_SESSIONS), /* TAG */ + tpm_u32(27 + pw_sz), /* Length */ + tpm_u32(TPM2_CC_CLEAR), /* Command code */ + + /* HANDLE */ + tpm_u32(handle), /* TPM resource handle */ + + /* AUTH_SESSION */ + tpm_u32(9 + pw_sz), /* Authorization size */ + tpm_u32(TPM2_RS_PW), /* Session handle */ + tpm_u16(0), /* Size of <nonce> */ + /* <nonce> (if any) */ + 0, /* Attributes: Cont/Excl/Rst */ + tpm_u16(pw_sz), /* Size of <hmac/password> */ + /* STRING(pw) <hmac/password> (if any) */ + }; + unsigned int offset = 27; + int ret; + + /* + * Fill the command structure starting from the first buffer: + * - the password (if any) + */ + ret = pack_byte_string(command_v2, sizeof(command_v2), "s", + offset, pw, pw_sz); + offset += pw_sz; + if (ret) + return TPM_LIB_ERROR; + + return tpm_sendrecv_command(command_v2, NULL, NULL); +} + +u32 tpm2_pcr_extend(u32 index, const uint8_t *digest) +{ + u8 command_v2[COMMAND_BUFFER_SIZE] = { + tpm_u16(TPM2_ST_SESSIONS), /* TAG */ + tpm_u32(33 + TPM2_DIGEST_LEN), /* Length */ + tpm_u32(TPM2_CC_PCR_EXTEND), /* Command code */ + + /* HANDLE */ + tpm_u32(index), /* Handle (PCR Index) */ + + /* AUTH_SESSION */ + tpm_u32(9), /* Authorization size */ + tpm_u32(TPM2_RS_PW), /* Session handle */ + tpm_u16(0), /* Size of <nonce> */ + /* <nonce> (if any) */ + 0, /* Attributes: Cont/Excl/Rst */ + tpm_u16(0), /* Size of <hmac/password> */ + /* <hmac/password> (if any) */ + tpm_u32(1), /* Count (number of hashes) */ + tpm_u16(TPM2_ALG_SHA256), /* Algorithm of the hash */ + /* STRING(digest) Digest */ + }; + unsigned int offset = 33; + int ret; + + /* + * Fill the command structure starting from the first buffer: + * - the digest + */ + ret = pack_byte_string(command_v2, sizeof(command_v2), "s", + offset, digest, TPM2_DIGEST_LEN); + offset += TPM2_DIGEST_LEN; + if (ret) + return TPM_LIB_ERROR; + + return tpm_sendrecv_command(command_v2, NULL, NULL); +} + +u32 tpm2_pcr_read(u32 idx, unsigned int idx_min_sz, void *data, + unsigned int *updates) +{ + u8 idx_array_sz = max(idx_min_sz, DIV_ROUND_UP(idx, 8)); + u8 command_v2[COMMAND_BUFFER_SIZE] = { + tpm_u16(TPM2_ST_NO_SESSIONS), /* TAG */ + tpm_u32(17 + idx_array_sz), /* Length */ + tpm_u32(TPM2_CC_PCR_READ), /* Command code */ + + /* TPML_PCR_SELECTION */ + tpm_u32(1), /* Number of selections */ + tpm_u16(TPM2_ALG_SHA256), /* Algorithm of the hash */ + idx_array_sz, /* Array size for selection */ + /* bitmap(idx) Selected PCR bitmap */ + }; + size_t response_len = COMMAND_BUFFER_SIZE; + u8 response[COMMAND_BUFFER_SIZE]; + unsigned int pcr_sel_idx = idx / 8; + u8 pcr_sel_bit = BIT(idx % 8); + unsigned int counter = 0; + int ret; + + if (pack_byte_string(command_v2, COMMAND_BUFFER_SIZE, "b", + 17 + pcr_sel_idx, pcr_sel_bit)) + return TPM_LIB_ERROR; + + ret = tpm_sendrecv_command(command_v2, response, &response_len); + if (ret) + return ret; + + if (unpack_byte_string(response, response_len, "ds", + 10, &counter, + response_len - TPM2_DIGEST_LEN, data, + TPM2_DIGEST_LEN)) + return TPM_LIB_ERROR; + + if (updates) + *updates = counter; + + return 0; +} + +u32 tpm2_get_capability(u32 capability, u32 property, void *buf, + size_t prop_count) +{ + u8 command_v2[COMMAND_BUFFER_SIZE] = { + tpm_u16(TPM2_ST_NO_SESSIONS), /* TAG */ + tpm_u32(22), /* Length */ + tpm_u32(TPM2_CC_GET_CAPABILITY), /* Command code */ + + tpm_u32(capability), /* Capability */ + tpm_u32(property), /* Property */ + tpm_u32(prop_count), /* Property count */ + }; + u8 response[COMMAND_BUFFER_SIZE]; + size_t response_len = COMMAND_BUFFER_SIZE; + unsigned int properties_off; + int ret; + + ret = tpm_sendrecv_command(command_v2, response, &response_len); + if (ret) + return ret; + + /* + * In the response buffer, the properties are located after the: + * tag (u16), response size (u32), response code (u32), + * YES/NO flag (u8), TPM_CAP (u32) and TPMU_CAPABILITIES (u32). + */ + properties_off = sizeof(u16) + sizeof(u32) + sizeof(u32) + + sizeof(u8) + sizeof(u32) + sizeof(u32); + memcpy(buf, &response[properties_off], response_len - properties_off); + + return 0; +} + +u32 tpm2_dam_reset(const char *pw, const ssize_t pw_sz) +{ + u8 command_v2[COMMAND_BUFFER_SIZE] = { + tpm_u16(TPM2_ST_SESSIONS), /* TAG */ + tpm_u32(27 + pw_sz), /* Length */ + tpm_u32(TPM2_CC_DAM_RESET), /* Command code */ + + /* HANDLE */ + tpm_u32(TPM2_RH_LOCKOUT), /* TPM resource handle */ + + /* AUTH_SESSION */ + tpm_u32(9 + pw_sz), /* Authorization size */ + tpm_u32(TPM2_RS_PW), /* Session handle */ + tpm_u16(0), /* Size of <nonce> */ + /* <nonce> (if any) */ + 0, /* Attributes: Cont/Excl/Rst */ + tpm_u16(pw_sz), /* Size of <hmac/password> */ + /* STRING(pw) <hmac/password> (if any) */ + }; + unsigned int offset = 27; + int ret; + + /* + * Fill the command structure starting from the first buffer: + * - the password (if any) + */ + ret = pack_byte_string(command_v2, sizeof(command_v2), "s", + offset, pw, pw_sz); + offset += pw_sz; + if (ret) + return TPM_LIB_ERROR; + + return tpm_sendrecv_command(command_v2, NULL, NULL); +} + +u32 tpm2_dam_parameters(const char *pw, const ssize_t pw_sz, + unsigned int max_tries, unsigned int recovery_time, + unsigned int lockout_recovery) +{ + u8 command_v2[COMMAND_BUFFER_SIZE] = { + tpm_u16(TPM2_ST_SESSIONS), /* TAG */ + tpm_u32(27 + pw_sz + 12), /* Length */ + tpm_u32(TPM2_CC_DAM_PARAMETERS), /* Command code */ + + /* HANDLE */ + tpm_u32(TPM2_RH_LOCKOUT), /* TPM resource handle */ + + /* AUTH_SESSION */ + tpm_u32(9 + pw_sz), /* Authorization size */ + tpm_u32(TPM2_RS_PW), /* Session handle */ + tpm_u16(0), /* Size of <nonce> */ + /* <nonce> (if any) */ + 0, /* Attributes: Cont/Excl/Rst */ + tpm_u16(pw_sz), /* Size of <hmac/password> */ + /* STRING(pw) <hmac/password> (if any) */ + + /* LOCKOUT PARAMETERS */ + /* tpm_u32(max_tries) Max tries (0, always lock) */ + /* tpm_u32(recovery_time) Recovery time (0, no lock) */ + /* tpm_u32(lockout_recovery) Lockout recovery */ + }; + unsigned int offset = 27; + int ret; + + /* + * Fill the command structure starting from the first buffer: + * - the password (if any) + * - max tries + * - recovery time + * - lockout recovery + */ + ret = pack_byte_string(command_v2, sizeof(command_v2), "sddd", + offset, pw, pw_sz, + offset + pw_sz, max_tries, + offset + pw_sz + 4, recovery_time, + offset + pw_sz + 8, lockout_recovery); + offset += pw_sz + 12; + if (ret) + return TPM_LIB_ERROR; + + return tpm_sendrecv_command(command_v2, NULL, NULL); +} + +int tpm2_change_auth(u32 handle, const char *newpw, const ssize_t newpw_sz, + const char *oldpw, const ssize_t oldpw_sz) +{ + unsigned int offset = 27; + u8 command_v2[COMMAND_BUFFER_SIZE] = { + tpm_u16(TPM2_ST_SESSIONS), /* TAG */ + tpm_u32(offset + oldpw_sz + 2 + newpw_sz), /* Length */ + tpm_u32(TPM2_CC_HIERCHANGEAUTH), /* Command code */ + + /* HANDLE */ + tpm_u32(handle), /* TPM resource handle */ + + /* AUTH_SESSION */ + tpm_u32(9 + oldpw_sz), /* Authorization size */ + tpm_u32(TPM2_RS_PW), /* Session handle */ + tpm_u16(0), /* Size of <nonce> */ + /* <nonce> (if any) */ + 0, /* Attributes: Cont/Excl/Rst */ + tpm_u16(oldpw_sz) /* Size of <hmac/password> */ + /* STRING(oldpw) <hmac/password> (if any) */ + + /* TPM2B_AUTH (TPM2B_DIGEST) */ + /* tpm_u16(newpw_sz) Digest size, new pw length */ + /* STRING(newpw) Digest buffer, new pw */ + }; + int ret; + + /* + * Fill the command structure starting from the first buffer: + * - the old password (if any) + * - size of the new password + * - new password + */ + ret = pack_byte_string(command_v2, sizeof(command_v2), "sws", + offset, oldpw, oldpw_sz, + offset + oldpw_sz, newpw_sz, + offset + oldpw_sz + 2, newpw, newpw_sz); + offset += oldpw_sz + 2 + newpw_sz; + if (ret) + return TPM_LIB_ERROR; + + return tpm_sendrecv_command(command_v2, NULL, NULL); +} + +u32 tpm2_pcr_setauthpolicy(const char *pw, const ssize_t pw_sz, u32 index, + const char *key) +{ + u8 command_v2[COMMAND_BUFFER_SIZE] = { + tpm_u16(TPM2_ST_SESSIONS), /* TAG */ + tpm_u32(35 + pw_sz + TPM2_DIGEST_LEN), /* Length */ + tpm_u32(TPM2_CC_PCR_SETAUTHPOL), /* Command code */ + + /* HANDLE */ + tpm_u32(TPM2_RH_PLATFORM), /* TPM resource handle */ + + /* AUTH_SESSION */ + tpm_u32(9 + pw_sz), /* Authorization size */ + tpm_u32(TPM2_RS_PW), /* session handle */ + tpm_u16(0), /* Size of <nonce> */ + /* <nonce> (if any) */ + 0, /* Attributes: Cont/Excl/Rst */ + tpm_u16(pw_sz) /* Size of <hmac/password> */ + /* STRING(pw) <hmac/password> (if any) */ + + /* TPM2B_AUTH (TPM2B_DIGEST) */ + /* tpm_u16(TPM2_DIGEST_LEN) Digest size length */ + /* STRING(key) Digest buffer (PCR key) */ + + /* TPMI_ALG_HASH */ + /* tpm_u16(TPM2_ALG_SHA256) Algorithm of the hash */ + + /* TPMI_DH_PCR */ + /* tpm_u32(index), PCR Index */ + }; + unsigned int offset = 27; + int ret; + + /* + * Fill the command structure starting from the first buffer: + * - the password (if any) + * - the PCR key length + * - the PCR key + * - the hash algorithm + * - the PCR index + */ + ret = pack_byte_string(command_v2, sizeof(command_v2), "swswd", + offset, pw, pw_sz, + offset + pw_sz, TPM2_DIGEST_LEN, + offset + pw_sz + 2, key, TPM2_DIGEST_LEN, + offset + pw_sz + 2 + TPM2_DIGEST_LEN, + TPM2_ALG_SHA256, + offset + pw_sz + 4 + TPM2_DIGEST_LEN, index); + offset += pw_sz + 2 + TPM2_DIGEST_LEN + 2 + 4; + if (ret) + return TPM_LIB_ERROR; + + return tpm_sendrecv_command(command_v2, NULL, NULL); +} + +u32 tpm2_pcr_setauthvalue(const char *pw, const ssize_t pw_sz, u32 index, + const char *key, const ssize_t key_sz) +{ + u8 command_v2[COMMAND_BUFFER_SIZE] = { + tpm_u16(TPM2_ST_SESSIONS), /* TAG */ + tpm_u32(33 + pw_sz + TPM2_DIGEST_LEN), /* Length */ + tpm_u32(TPM2_CC_PCR_SETAUTHVAL), /* Command code */ + + /* HANDLE */ + tpm_u32(index), /* Handle (PCR Index) */ + + /* AUTH_SESSION */ + tpm_u32(9 + pw_sz), /* Authorization size */ + tpm_u32(TPM2_RS_PW), /* session handle */ + tpm_u16(0), /* Size of <nonce> */ + /* <nonce> (if any) */ + 0, /* Attributes: Cont/Excl/Rst */ + tpm_u16(pw_sz), /* Size of <hmac/password> */ + /* STRING(pw) <hmac/password> (if any) */ + + /* TPM2B_DIGEST */ + /* tpm_u16(key_sz) Key length */ + /* STRING(key) Key */ + }; + unsigned int offset = 27; + int ret; + + /* + * Fill the command structure starting from the first buffer: + * - the password (if any) + * - the number of digests, 1 in our case + * - the algorithm, sha256 in our case + * - the digest (64 bytes) + */ + ret = pack_byte_string(command_v2, sizeof(command_v2), "sws", + offset, pw, pw_sz, + offset + pw_sz, key_sz, + offset + pw_sz + 2, key, key_sz); + offset += pw_sz + 2 + key_sz; + if (ret) + return TPM_LIB_ERROR; + + return tpm_sendrecv_command(command_v2, NULL, NULL); +} diff --git a/net/Makefile b/net/Makefile index d1e8e01f62f..07466879f50 100644 --- a/net/Makefile +++ b/net/Makefile @@ -23,6 +23,7 @@ obj-$(CONFIG_CMD_PING) += ping.o obj-$(CONFIG_CMD_RARP) += rarp.o obj-$(CONFIG_CMD_SNTP) += sntp.o obj-$(CONFIG_CMD_TFTPBOOT) += tftp.o +obj-$(CONFIG_UDP_FUNCTION_FASTBOOT) += fastboot.o # Disable this warning as it is triggered by: # sprintf(buf, index ? "foo%d" : "foo", index) diff --git a/net/fastboot.c b/net/fastboot.c new file mode 100644 index 00000000000..a9f7c0743da --- /dev/null +++ b/net/fastboot.c @@ -0,0 +1,317 @@ +// SPDX-License-Identifier: BSD-2-Clause +/* + * Copyright (C) 2016 The Android Open Source Project + */ + +#include <common.h> +#include <fastboot.h> +#include <net.h> +#include <net/fastboot.h> + +/* Fastboot port # defined in spec */ +#define WELL_KNOWN_PORT 5554 + +enum { + FASTBOOT_ERROR = 0, + FASTBOOT_QUERY = 1, + FASTBOOT_INIT = 2, + FASTBOOT_FASTBOOT = 3, +}; + +struct __packed fastboot_header { + uchar id; + uchar flags; + unsigned short seq; +}; + +#define PACKET_SIZE 1024 +#define DATA_SIZE (PACKET_SIZE - sizeof(struct fastboot_header)) + +/* Sequence number sent for every packet */ +static unsigned short sequence_number = 1; +static const unsigned short packet_size = PACKET_SIZE; +static const unsigned short udp_version = 1; + +/* Keep track of last packet for resubmission */ +static uchar last_packet[PACKET_SIZE]; +static unsigned int last_packet_len; + +static struct in_addr fastboot_remote_ip; +/* The UDP port at their end */ +static int fastboot_remote_port; +/* The UDP port at our end */ +static int fastboot_our_port; + +static void boot_downloaded_image(void); + +#if CONFIG_IS_ENABLED(FASTBOOT_FLASH) +/** + * fastboot_udp_send_info() - Send an INFO packet during long commands. + * + * @msg: String describing the reason for waiting + */ +static void fastboot_udp_send_info(const char *msg) +{ + uchar *packet; + uchar *packet_base; + int len = 0; + char response[FASTBOOT_RESPONSE_LEN] = {0}; + + struct fastboot_header response_header = { + .id = FASTBOOT_FASTBOOT, + .flags = 0, + .seq = htons(sequence_number) + }; + ++sequence_number; + packet = net_tx_packet + net_eth_hdr_size() + IP_UDP_HDR_SIZE; + packet_base = packet; + + /* Write headers */ + memcpy(packet, &response_header, sizeof(response_header)); + packet += sizeof(response_header); + /* Write response */ + fastboot_response("INFO", response, "%s", msg); + memcpy(packet, response, strlen(response)); + packet += strlen(response); + + len = packet - packet_base; + + /* Save packet for retransmitting */ + last_packet_len = len; + memcpy(last_packet, packet_base, last_packet_len); + + net_send_udp_packet(net_server_ethaddr, fastboot_remote_ip, + fastboot_remote_port, fastboot_our_port, len); +} + +/** + * fastboot_timed_send_info() - Send INFO packet every 30 seconds + * + * @msg: String describing the reason for waiting + * + * Send an INFO packet during long commands based on timer. An INFO packet + * is sent if the time is 30 seconds after start. Else, noop. + */ +static void fastboot_timed_send_info(const char *msg) +{ + static ulong start; + + /* Initialize timer */ + if (start == 0) + start = get_timer(0); + ulong time = get_timer(start); + /* Send INFO packet to host every 30 seconds */ + if (time >= 30000) { + start = get_timer(0); + fastboot_udp_send_info(msg); + } +} +#endif + +/** + * fastboot_send() - Sends a packet in response to received fastboot packet + * + * @header: Header for response packet + * @fastboot_data: Pointer to received fastboot data + * @fastboot_data_len: Length of received fastboot data + * @retransmit: Nonzero if sending last sent packet + */ +static void fastboot_send(struct fastboot_header header, char *fastboot_data, + unsigned int fastboot_data_len, uchar retransmit) +{ + uchar *packet; + uchar *packet_base; + int len = 0; + const char *error_msg = "An error occurred."; + short tmp; + struct fastboot_header response_header = header; + static char command[FASTBOOT_COMMAND_LEN]; + static int cmd = -1; + static bool pending_command; + char response[FASTBOOT_RESPONSE_LEN] = {0}; + + /* + * We will always be sending some sort of packet, so + * cobble together the packet headers now. + */ + packet = net_tx_packet + net_eth_hdr_size() + IP_UDP_HDR_SIZE; + packet_base = packet; + + /* Resend last packet */ + if (retransmit) { + memcpy(packet, last_packet, last_packet_len); + net_send_udp_packet(net_server_ethaddr, fastboot_remote_ip, + fastboot_remote_port, fastboot_our_port, + last_packet_len); + return; + } + + response_header.seq = htons(response_header.seq); + memcpy(packet, &response_header, sizeof(response_header)); + packet += sizeof(response_header); + + switch (header.id) { + case FASTBOOT_QUERY: + tmp = htons(sequence_number); + memcpy(packet, &tmp, sizeof(tmp)); + packet += sizeof(tmp); + break; + case FASTBOOT_INIT: + tmp = htons(udp_version); + memcpy(packet, &tmp, sizeof(tmp)); + packet += sizeof(tmp); + tmp = htons(packet_size); + memcpy(packet, &tmp, sizeof(tmp)); + packet += sizeof(tmp); + break; + case FASTBOOT_ERROR: + memcpy(packet, error_msg, strlen(error_msg)); + packet += strlen(error_msg); + break; + case FASTBOOT_FASTBOOT: + if (cmd == FASTBOOT_COMMAND_DOWNLOAD) { + if (!fastboot_data_len && !fastboot_data_remaining()) { + fastboot_data_complete(response); + } else { + fastboot_data_download(fastboot_data, + fastboot_data_len, + response); + } + } else if (!pending_command) { + strlcpy(command, fastboot_data, + min((size_t)fastboot_data_len + 1, + sizeof(command))); + pending_command = true; + } else { + cmd = fastboot_handle_command(command, response); + pending_command = false; + } + /* + * Sent some INFO packets, need to update sequence number in + * header + */ + if (header.seq != sequence_number) { + response_header.seq = htons(sequence_number); + memcpy(packet_base, &response_header, + sizeof(response_header)); + } + /* Write response to packet */ + memcpy(packet, response, strlen(response)); + packet += strlen(response); + break; + default: + pr_err("ID %d not implemented.\n", header.id); + return; + } + + len = packet - packet_base; + + /* Save packet for retransmitting */ + last_packet_len = len; + memcpy(last_packet, packet_base, last_packet_len); + + net_send_udp_packet(net_server_ethaddr, fastboot_remote_ip, + fastboot_remote_port, fastboot_our_port, len); + + /* Continue boot process after sending response */ + if (!strncmp("OKAY", response, 4)) { + switch (cmd) { + case FASTBOOT_COMMAND_BOOT: + boot_downloaded_image(); + break; + + case FASTBOOT_COMMAND_CONTINUE: + net_set_state(NETLOOP_SUCCESS); + break; + + case FASTBOOT_COMMAND_REBOOT: + case FASTBOOT_COMMAND_REBOOT_BOOTLOADER: + do_reset(NULL, 0, 0, NULL); + break; + } + } + + if (!strncmp("OKAY", response, 4) || !strncmp("FAIL", response, 4)) + cmd = -1; +} + +/** + * boot_downloaded_image() - Boots into downloaded image. + */ +static void boot_downloaded_image(void) +{ + fastboot_boot(); + net_set_state(NETLOOP_SUCCESS); +} + +/** + * fastboot_handler() - Incoming UDP packet handler. + * + * @packet: Pointer to incoming UDP packet + * @dport: Destination UDP port + * @sip: Source IP address + * @sport: Source UDP port + * @len: Packet length + */ +static void fastboot_handler(uchar *packet, unsigned int dport, + struct in_addr sip, unsigned int sport, + unsigned int len) +{ + struct fastboot_header header; + char fastboot_data[DATA_SIZE] = {0}; + unsigned int fastboot_data_len = 0; + + if (dport != fastboot_our_port) + return; + + fastboot_remote_ip = sip; + fastboot_remote_port = sport; + + if (len < sizeof(struct fastboot_header) || len > PACKET_SIZE) + return; + memcpy(&header, packet, sizeof(header)); + header.flags = 0; + header.seq = ntohs(header.seq); + packet += sizeof(header); + len -= sizeof(header); + + switch (header.id) { + case FASTBOOT_QUERY: + fastboot_send(header, fastboot_data, 0, 0); + break; + case FASTBOOT_INIT: + case FASTBOOT_FASTBOOT: + fastboot_data_len = len; + if (len > 0) + memcpy(fastboot_data, packet, len); + if (header.seq == sequence_number) { + fastboot_send(header, fastboot_data, + fastboot_data_len, 0); + sequence_number++; + } else if (header.seq == sequence_number - 1) { + /* Retransmit last sent packet */ + fastboot_send(header, fastboot_data, + fastboot_data_len, 1); + } + break; + default: + pr_err("ID %d not implemented.\n", header.id); + header.id = FASTBOOT_ERROR; + fastboot_send(header, fastboot_data, 0, 0); + break; + } +} + +void fastboot_start_server(void) +{ + printf("Using %s device\n", eth_get_name()); + printf("Listening for fastboot command on %pI4\n", &net_ip); + + fastboot_our_port = WELL_KNOWN_PORT; + + fastboot_set_progress_callback(fastboot_timed_send_info); + net_set_udp_handler(fastboot_handler); + + /* zero out server ether in case the server ip has changed */ + memset(net_server_ethaddr, 0, 6); +} diff --git a/net/net.c b/net/net.c index 7f852114427..a4932f46d90 100644 --- a/net/net.c +++ b/net/net.c @@ -87,6 +87,7 @@ #include <environment.h> #include <errno.h> #include <net.h> +#include <net/fastboot.h> #include <net/tftp.h> #if defined(CONFIG_LED_STATUS) #include <miiphy.h> @@ -451,6 +452,11 @@ restart: tftp_start_server(); break; #endif +#ifdef CONFIG_UDP_FUNCTION_FASTBOOT + case FASTBOOT: + fastboot_start_server(); + break; +#endif #if defined(CONFIG_CMD_DHCP) case DHCP: bootp_reset(); @@ -1322,6 +1328,7 @@ common: /* Fall through */ case NETCONS: + case FASTBOOT: case TFTPSRV: if (net_ip.s_addr == 0) { puts("*** ERROR: `ipaddr' not set\n"); diff --git a/scripts/Makefile.build b/scripts/Makefile.build index 4a6ed345928..482ed0c8d80 100644 --- a/scripts/Makefile.build +++ b/scripts/Makefile.build @@ -415,6 +415,17 @@ $(call multi_depend, $(multi-used-m), .o, -objs -y) targets += $(multi-used-y) $(multi-used-m) +# Add intermediate targets: +# When building objects with specific suffix patterns, add intermediate +# targets that the final targets are derived from. +intermediate_targets = $(foreach sfx, $(2), \ + $(patsubst %$(strip $(1)),%$(sfx), \ + $(filter %$(strip $(1)), $(targets)))) +# %.lex.o <- %.lex.c <- %.l +# %.tab.o <- %.tab.[ch] <- %.y +targets += $(call intermediate_targets, .lex.o, .lex.c) \ + $(call intermediate_targets, .tab.o, .tab.c .tab.h) + # Descending # --------------------------------------------------------------------------- diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index f9809ce7cef..ef7604c4638 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -209,47 +209,30 @@ $(foreach m, $(notdir $1), \ $(addprefix $(obj)/, $(foreach s, $3, $($(m:%$(strip $2)=%$(s))))))) endef -ifdef REGENERATE_PARSERS - -# GPERF -# --------------------------------------------------------------------------- -quiet_cmd_gperf = GPERF $@ - cmd_gperf = gperf -t --output-file $@ -a -C -E -g -k 1,3,$$ -p -t $< - -.PRECIOUS: $(src)/%.hash.c_shipped -$(src)/%.hash.c_shipped: $(src)/%.gperf - $(call cmd,gperf) - # LEX # --------------------------------------------------------------------------- -LEX_PREFIX = $(if $(LEX_PREFIX_${baseprereq}),$(LEX_PREFIX_${baseprereq}),yy) - quiet_cmd_flex = LEX $@ - cmd_flex = flex -o$@ -L -P $(LEX_PREFIX) $< + cmd_flex = $(LEX) -o$@ -L $< -.PRECIOUS: $(src)/%.lex.c_shipped -$(src)/%.lex.c_shipped: $(src)/%.l - $(call cmd,flex) +.PRECIOUS: $(obj)/%.lex.c +$(obj)/%.lex.c: $(src)/%.l FORCE + $(call if_changed,flex) # YACC # --------------------------------------------------------------------------- -YACC_PREFIX = $(if $(YACC_PREFIX_${baseprereq}),$(YACC_PREFIX_${baseprereq}),yy) - quiet_cmd_bison = YACC $@ - cmd_bison = bison -o$@ -t -l -p $(YACC_PREFIX) $< + cmd_bison = $(YACC) -o$@ -t -l $< -.PRECIOUS: $(src)/%.tab.c_shipped -$(src)/%.tab.c_shipped: $(src)/%.y - $(call cmd,bison) +.PRECIOUS: $(obj)/%.tab.c +$(obj)/%.tab.c: $(src)/%.y FORCE + $(call if_changed,bison) quiet_cmd_bison_h = YACC $@ - cmd_bison_h = bison -o/dev/null --defines=$@ -t -l -p $(YACC_PREFIX) $< + cmd_bison_h = $(YACC) -o/dev/null --defines=$@ -t -l $< -.PRECIOUS: $(src)/%.tab.h_shipped -$(src)/%.tab.h_shipped: $(src)/%.y - $(call cmd,bison_h) - -endif +.PRECIOUS: $(obj)/%.tab.h +$(obj)/%.tab.h: $(src)/%.y FORCE + $(call if_changed,bison_h) # Shipped files # =========================================================================== diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl index 057389997de..ef018b5b405 100644 --- a/scripts/Makefile.spl +++ b/scripts/Makefile.spl @@ -391,6 +391,10 @@ MKIMAGEFLAGS_$(SPL_BIN).multidtb.fit = -f auto -A $(ARCH) -T firmware -C none -O $(obj)/$(SPL_BIN).multidtb.fit: /dev/null $(SHRUNK_ARCH_DTB) FORCE $(call if_changed,mkimage) +ifneq ($(SOURCE_DATE_EPOCH),) + touch -d @$(SOURCE_DATE_EPOCH) $(obj)/$(SPL_BIN).multidtb.fit + chmod 0600 $(obj)/$(SPL_BIN).multidtb.fit +endif $(obj)/$(SPL_BIN).multidtb.fit.gz: $(obj)/$(SPL_BIN).multidtb.fit @gzip -kf9 $< > $@ diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 71df6dbebde..e99ba6b85ab 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -47,7 +47,6 @@ CONFIG_ARCH_RMOBILE_EXTRAM_BOOT CONFIG_ARCH_TEGRA CONFIG_ARCH_USE_BUILTIN_BSWAP CONFIG_ARC_MMU_VER -CONFIG_ARC_SERIAL CONFIG_ARIES_M28_V10 CONFIG_ARMADA100 CONFIG_ARMADA100_FEC @@ -410,7 +409,6 @@ CONFIG_DRIVER_TI_KEYSTONE_NET CONFIG_DRIVE_MMC CONFIG_DRIVE_SATA CONFIG_DRIVE_TYPES -CONFIG_DRIVE_USB CONFIG_DSP_CLUSTER_START CONFIG_DUOVERO CONFIG_DV_USBPHY_CTL @@ -590,8 +588,6 @@ CONFIG_EXYNOS_RELOCATE_CODE_BASE CONFIG_EXYNOS_SPL CONFIG_EXYNOS_TMU CONFIG_FACTORYSET -CONFIG_FASTBOOT_FLASH_FILLBUF_SIZE -CONFIG_FASTBOOT_FLASH_NAND_TRIMFFS CONFIG_FAST_FLASH_BIT CONFIG_FB_ADDR CONFIG_FB_BACKLIGHT @@ -931,7 +927,6 @@ CONFIG_HPS_SDR_CTRLCFG_RFIFOCMAP_RFIFOCMAP CONFIG_HPS_SDR_CTRLCFG_STATICCFG_MEMBL CONFIG_HPS_SDR_CTRLCFG_STATICCFG_USEECCASDATA CONFIG_HPS_SDR_CTRLCFG_WFIFOCMAP_WFIFOCMAP -CONFIG_HP_CLK_FREQ CONFIG_HRCON CONFIG_HRCON_DH CONFIG_HRCON_FANS @@ -1277,7 +1272,6 @@ CONFIG_MMC_SPI_CS CONFIG_MMC_SPI_MODE CONFIG_MMC_SPI_SPEED CONFIG_MMC_SUNXI_SLOT -CONFIG_MMC_TRACE CONFIG_MMU CONFIG_MONITOR_IS_IN_RAM CONFIG_MP @@ -1334,7 +1328,6 @@ CONFIG_MTD_UBI_MODULE CONFIG_MULTI_CS CONFIG_MUSB_HOST CONFIG_MVEBU_MMC -CONFIG_MVGBE CONFIG_MVGBE_PORTS CONFIG_MVMFP_V2 CONFIG_MVS @@ -1349,9 +1342,6 @@ CONFIG_MX27 CONFIG_MX27_CLK32 CONFIG_MX27_TIMER_HIGH_PRECISION CONFIG_MX28_FEC_MAC_IN_OCOTP -CONFIG_MX31 -CONFIG_MX31_CLK32 -CONFIG_MX31_HCLK_FREQ CONFIG_MX35 CONFIG_MX35_CLK32 CONFIG_MX35_HCLK_FREQ @@ -1848,7 +1838,6 @@ CONFIG_SMSTP6_ENA CONFIG_SMSTP7_ENA CONFIG_SMSTP8_ENA CONFIG_SMSTP9_ENA -CONFIG_SOCFPGA_VIRTUAL_TARGET CONFIG_SOCRATES CONFIG_SOC_AU1000 CONFIG_SOC_AU1100 @@ -2034,7 +2023,6 @@ CONFIG_SUNXI_MAX_FB_SIZE CONFIG_SUNXI_USB_PHYS CONFIG_SUPERH_ON_CHIP_R8A66597 CONFIG_SUPPORT_EMMC_BOOT -CONFIG_SUPPORT_EMMC_RPMB CONFIG_SUVD3 CONFIG_SXNI855T CONFIG_SYSFLAGS_ADDR @@ -2595,7 +2583,6 @@ CONFIG_SYS_FAULT_MII_ADDR CONFIG_SYS_FCC_PSMR CONFIG_SYS_FDC_DRIVE_NUMBER CONFIG_SYS_FDC_HW_INIT -CONFIG_SYS_FDT_ADDR CONFIG_SYS_FDT_BASE CONFIG_SYS_FDT_LOAD_ADDR CONFIG_SYS_FDT_PAD @@ -3582,7 +3569,6 @@ CONFIG_SYS_MSC0_VAL CONFIG_SYS_MSC1_VAL CONFIG_SYS_MSC2_VAL CONFIG_SYS_MTDPARTS_RUNTIME -CONFIG_SYS_MVFS CONFIG_SYS_MX5_CLK32 CONFIG_SYS_MX5_HCLK CONFIG_SYS_MX6_CLK32 @@ -4106,13 +4092,9 @@ CONFIG_SYS_RAM_BASE CONFIG_SYS_RAM_CS CONFIG_SYS_RAM_FREQ_DIV CONFIG_SYS_RCAR_I2C0_BASE -CONFIG_SYS_RCAR_I2C0_SPEED CONFIG_SYS_RCAR_I2C1_BASE -CONFIG_SYS_RCAR_I2C1_SPEED CONFIG_SYS_RCAR_I2C2_BASE -CONFIG_SYS_RCAR_I2C2_SPEED CONFIG_SYS_RCAR_I2C3_BASE -CONFIG_SYS_RCAR_I2C3_SPEED CONFIG_SYS_RCWH_PCIHOST CONFIG_SYS_READ_SPD CONFIG_SYS_REDUNDAND_ENVIRONMENT @@ -4550,7 +4532,6 @@ CONFIG_TSECV2 CONFIG_TSECV2_1 CONFIG_TSEC_TBI CONFIG_TSEC_TBICR_SETTINGS -CONFIG_TSI108_ETH_NUM_PORTS CONFIG_TUGE1 CONFIG_TULIP CONFIG_TULIP_FIX_DAVICOM @@ -4594,7 +4575,6 @@ CONFIG_UEC_ETH8 CONFIG_UID16 CONFIG_ULI526X CONFIG_ULPI_REF_CLK -CONFIG_UMSDEVS CONFIG_UPDATEB CONFIG_UPDATE_LOAD_ADDR CONFIG_USART1 @@ -4782,7 +4762,6 @@ CONFIG_ZLIB CONFIG_ZLT CONFIG_ZM7300 CONFIG_ZYNQMP_EEPROM -CONFIG_ZYNQMP_XHCI_LIST CONFIG_ZYNQ_EEPROM CONFIG_ZYNQ_EEPROM_BUS CONFIG_ZYNQ_GEM_EEPROM_ADDR diff --git a/scripts/decodecode b/scripts/decodecode new file mode 100755 index 00000000000..9cef558528a --- /dev/null +++ b/scripts/decodecode @@ -0,0 +1,125 @@ +#!/bin/sh +# SPDX-License-Identifier: GPL-2.0 +# Disassemble the Code: line in Linux oopses +# usage: decodecode < oops.file +# +# options: set env. variable AFLAGS=options to pass options to "as"; +# e.g., to decode an i386 oops on an x86_64 system, use: +# AFLAGS=--32 decodecode < 386.oops + +cleanup() { + rm -f $T $T.s $T.o $T.oo $T.aa $T.dis + exit 1 +} + +die() { + echo "$@" + exit 1 +} + +trap cleanup EXIT + +T=`mktemp` || die "cannot create temp file" +code= +cont= + +while read i ; do + +case "$i" in +*Code:*) + code=$i + cont=yes + ;; +*) + [ -n "$cont" ] && { + xdump="$(echo $i | grep '^[[:xdigit:]<>[:space:]]\+$')" + if [ -n "$xdump" ]; then + code="$code $xdump" + else + cont= + fi + } + ;; +esac + +done + +if [ -z "$code" ]; then + rm $T + exit +fi + +echo $code +code=`echo $code | sed -e 's/.*Code: //'` + +width=`expr index "$code" ' '` +width=$((($width-1)/2)) +case $width in +1) type=byte ;; +2) type=2byte ;; +4) type=4byte ;; +esac + +disas() { + ${CROSS_COMPILE}as $AFLAGS -o $1.o $1.s > /dev/null 2>&1 + + if [ "$ARCH" = "arm" ]; then + if [ $width -eq 2 ]; then + OBJDUMPFLAGS="-M force-thumb" + fi + + ${CROSS_COMPILE}strip $1.o + fi + + if [ "$ARCH" = "arm64" ]; then + if [ $width -eq 4 ]; then + type=inst + fi + + ${CROSS_COMPILE}strip $1.o + fi + + ${CROSS_COMPILE}objdump $OBJDUMPFLAGS -S $1.o | \ + grep -v "/tmp\|Disassembly\|\.text\|^$" > $1.dis 2>&1 +} + +marker=`expr index "$code" "\<"` +if [ $marker -eq 0 ]; then + marker=`expr index "$code" "\("` +fi + +touch $T.oo +if [ $marker -ne 0 ]; then + echo All code >> $T.oo + echo ======== >> $T.oo + beforemark=`echo "$code"` + echo -n " .$type 0x" > $T.s + echo $beforemark | sed -e 's/ /,0x/g; s/[<>()]//g' >> $T.s + disas $T + cat $T.dis >> $T.oo + rm -f $T.o $T.s $T.dis + +# and fix code at-and-after marker + code=`echo "$code" | cut -c$((${marker} + 1))-` +fi +echo Code starting with the faulting instruction > $T.aa +echo =========================================== >> $T.aa +code=`echo $code | sed -e 's/ [<(]/ /;s/[>)] / /;s/ /,0x/g; s/[>)]$//'` +echo -n " .$type 0x" > $T.s +echo $code >> $T.s +disas $T +cat $T.dis >> $T.aa + +# (lines of whole $T.oo) - (lines of $T.aa, i.e. "Code starting") + 3, +# i.e. the title + the "===..=" line (sed is counting from 1, 0 address is +# special) +faultlinenum=$(( $(wc -l $T.oo | cut -d" " -f1) - \ + $(wc -l $T.aa | cut -d" " -f1) + 3)) + +faultline=`cat $T.dis | head -1 | cut -d":" -f2-` +faultline=`echo "$faultline" | sed -e 's/\[/\\\[/g; s/\]/\\\]/g'` + +cat $T.oo | sed -e "${faultlinenum}s/^\(.*:\)\(.*\)/\1\*\2\t\t<-- trapping instruction/" +echo +cat $T.aa +cleanup diff --git a/scripts/dtc/.gitignore b/scripts/dtc/.gitignore index d807c081a25..689b9be0f93 100644 --- a/scripts/dtc/.gitignore +++ b/scripts/dtc/.gitignore @@ -1,4 +1 @@ /dtc -/dtc-lexer.lex.c -/dtc-parser.tab.c -/dtc-parser.tab.h diff --git a/scripts/dtc/Makefile b/scripts/dtc/Makefile index 90ef2db85c5..e999be93983 100644 --- a/scripts/dtc/Makefile +++ b/scripts/dtc/Makefile @@ -1,3 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0 # scripts/dtc makefile hostprogs-y := dtc @@ -27,8 +28,5 @@ HOSTCFLAGS_dtc-parser.tab.o := $(HOSTCFLAGS_DTC) # dependencies on generated files need to be listed explicitly $(obj)/dtc-lexer.lex.o: $(obj)/dtc-parser.tab.h -# generated files need to be cleaned explicitly -clean-files := dtc-lexer.lex.c dtc-parser.tab.c dtc-parser.tab.h - # Added for U-Boot subdir-$(CONFIG_PYLIBFDT) += pylibfdt diff --git a/scripts/dtc/checks.c b/scripts/dtc/checks.c index 08a3a29edae..c07ba4da9e3 100644 --- a/scripts/dtc/checks.c +++ b/scripts/dtc/checks.c @@ -53,26 +53,28 @@ struct check { struct check **prereq; }; -#define CHECK_ENTRY(_nm, _fn, _d, _w, _e, ...) \ - static struct check *_nm##_prereqs[] = { __VA_ARGS__ }; \ - static struct check _nm = { \ - .name = #_nm, \ - .fn = (_fn), \ - .data = (_d), \ - .warn = (_w), \ - .error = (_e), \ +#define CHECK_ENTRY(nm_, fn_, d_, w_, e_, ...) \ + static struct check *nm_##_prereqs[] = { __VA_ARGS__ }; \ + static struct check nm_ = { \ + .name = #nm_, \ + .fn = (fn_), \ + .data = (d_), \ + .warn = (w_), \ + .error = (e_), \ .status = UNCHECKED, \ - .num_prereqs = ARRAY_SIZE(_nm##_prereqs), \ - .prereq = _nm##_prereqs, \ + .num_prereqs = ARRAY_SIZE(nm_##_prereqs), \ + .prereq = nm_##_prereqs, \ }; -#define WARNING(_nm, _fn, _d, ...) \ - CHECK_ENTRY(_nm, _fn, _d, true, false, __VA_ARGS__) -#define ERROR(_nm, _fn, _d, ...) \ - CHECK_ENTRY(_nm, _fn, _d, false, true, __VA_ARGS__) -#define CHECK(_nm, _fn, _d, ...) \ - CHECK_ENTRY(_nm, _fn, _d, false, false, __VA_ARGS__) - -static inline void PRINTF(3, 4) check_msg(struct check *c, struct dt_info *dti, +#define WARNING(nm_, fn_, d_, ...) \ + CHECK_ENTRY(nm_, fn_, d_, true, false, __VA_ARGS__) +#define ERROR(nm_, fn_, d_, ...) \ + CHECK_ENTRY(nm_, fn_, d_, false, true, __VA_ARGS__) +#define CHECK(nm_, fn_, d_, ...) \ + CHECK_ENTRY(nm_, fn_, d_, false, false, __VA_ARGS__) + +static inline void PRINTF(5, 6) check_msg(struct check *c, struct dt_info *dti, + struct node *node, + struct property *prop, const char *fmt, ...) { va_list ap; @@ -83,19 +85,33 @@ static inline void PRINTF(3, 4) check_msg(struct check *c, struct dt_info *dti, fprintf(stderr, "%s: %s (%s): ", strcmp(dti->outname, "-") ? dti->outname : "<stdout>", (c->error) ? "ERROR" : "Warning", c->name); + if (node) { + fprintf(stderr, "%s", node->fullpath); + if (prop) + fprintf(stderr, ":%s", prop->name); + fputs(": ", stderr); + } vfprintf(stderr, fmt, ap); fprintf(stderr, "\n"); } va_end(ap); } -#define FAIL(c, dti, ...) \ +#define FAIL(c, dti, node, ...) \ + do { \ + TRACE((c), "\t\tFAILED at %s:%d", __FILE__, __LINE__); \ + (c)->status = FAILED; \ + check_msg((c), dti, node, NULL, __VA_ARGS__); \ + } while (0) + +#define FAIL_PROP(c, dti, node, prop, ...) \ do { \ TRACE((c), "\t\tFAILED at %s:%d", __FILE__, __LINE__); \ (c)->status = FAILED; \ - check_msg((c), dti, __VA_ARGS__); \ + check_msg((c), dti, node, prop, __VA_ARGS__); \ } while (0) + static void check_nodes_props(struct check *c, struct dt_info *dti, struct node *node) { struct node *child; @@ -126,7 +142,7 @@ static bool run_check(struct check *c, struct dt_info *dti) error = error || run_check(prq, dti); if (prq->status != PASSED) { c->status = PREREQ; - check_msg(c, dti, "Failed prerequisite '%s'", + check_msg(c, dti, NULL, NULL, "Failed prerequisite '%s'", c->prereq[i]->name); } } @@ -156,7 +172,7 @@ out: static inline void check_always_fail(struct check *c, struct dt_info *dti, struct node *node) { - FAIL(c, dti, "always_fail check"); + FAIL(c, dti, node, "always_fail check"); } CHECK(always_fail, check_always_fail, NULL); @@ -171,14 +187,42 @@ static void check_is_string(struct check *c, struct dt_info *dti, return; /* Not present, assumed ok */ if (!data_is_one_string(prop->val)) - FAIL(c, dti, "\"%s\" property in %s is not a string", - propname, node->fullpath); + FAIL_PROP(c, dti, node, prop, "property is not a string"); } #define WARNING_IF_NOT_STRING(nm, propname) \ WARNING(nm, check_is_string, (propname)) #define ERROR_IF_NOT_STRING(nm, propname) \ ERROR(nm, check_is_string, (propname)) +static void check_is_string_list(struct check *c, struct dt_info *dti, + struct node *node) +{ + int rem, l; + struct property *prop; + char *propname = c->data; + char *str; + + prop = get_property(node, propname); + if (!prop) + return; /* Not present, assumed ok */ + + str = prop->val.val; + rem = prop->val.len; + while (rem > 0) { + l = strnlen(str, rem); + if (l == rem) { + FAIL_PROP(c, dti, node, prop, "property is not a string list"); + break; + } + rem -= l + 1; + str += l + 1; + } +} +#define WARNING_IF_NOT_STRING_LIST(nm, propname) \ + WARNING(nm, check_is_string_list, (propname)) +#define ERROR_IF_NOT_STRING_LIST(nm, propname) \ + ERROR(nm, check_is_string_list, (propname)) + static void check_is_cell(struct check *c, struct dt_info *dti, struct node *node) { @@ -190,8 +234,7 @@ static void check_is_cell(struct check *c, struct dt_info *dti, return; /* Not present, assumed ok */ if (prop->val.len != sizeof(cell_t)) - FAIL(c, dti, "\"%s\" property in %s is not a single cell", - propname, node->fullpath); + FAIL_PROP(c, dti, node, prop, "property is not a single cell"); } #define WARNING_IF_NOT_CELL(nm, propname) \ WARNING(nm, check_is_cell, (propname)) @@ -212,8 +255,7 @@ static void check_duplicate_node_names(struct check *c, struct dt_info *dti, child2; child2 = child2->next_sibling) if (streq(child->name, child2->name)) - FAIL(c, dti, "Duplicate node name %s", - child->fullpath); + FAIL(c, dti, node, "Duplicate node name"); } ERROR(duplicate_node_names, check_duplicate_node_names, NULL); @@ -227,8 +269,7 @@ static void check_duplicate_property_names(struct check *c, struct dt_info *dti, if (prop2->deleted) continue; if (streq(prop->name, prop2->name)) - FAIL(c, dti, "Duplicate property name %s in %s", - prop->name, node->fullpath); + FAIL_PROP(c, dti, node, prop, "Duplicate property name"); } } } @@ -246,8 +287,8 @@ static void check_node_name_chars(struct check *c, struct dt_info *dti, int n = strspn(node->name, c->data); if (n < strlen(node->name)) - FAIL(c, dti, "Bad character '%c' in node %s", - node->name[n], node->fullpath); + FAIL(c, dti, node, "Bad character '%c' in node name", + node->name[n]); } ERROR(node_name_chars, check_node_name_chars, PROPNODECHARS "@"); @@ -257,8 +298,8 @@ static void check_node_name_chars_strict(struct check *c, struct dt_info *dti, int n = strspn(node->name, c->data); if (n < node->basenamelen) - FAIL(c, dti, "Character '%c' not recommended in node %s", - node->name[n], node->fullpath); + FAIL(c, dti, node, "Character '%c' not recommended in node name", + node->name[n]); } CHECK(node_name_chars_strict, check_node_name_chars_strict, PROPNODECHARSSTRICT); @@ -266,8 +307,7 @@ static void check_node_name_format(struct check *c, struct dt_info *dti, struct node *node) { if (strchr(get_unitname(node), '@')) - FAIL(c, dti, "Node %s has multiple '@' characters in name", - node->fullpath); + FAIL(c, dti, node, "multiple '@' characters in node name"); } ERROR(node_name_format, check_node_name_format, NULL, &node_name_chars); @@ -285,12 +325,10 @@ static void check_unit_address_vs_reg(struct check *c, struct dt_info *dti, if (prop) { if (!unitname[0]) - FAIL(c, dti, "Node %s has a reg or ranges property, but no unit name", - node->fullpath); + FAIL(c, dti, node, "node has a reg or ranges property, but no unit name"); } else { if (unitname[0]) - FAIL(c, dti, "Node %s has a unit name, but no reg property", - node->fullpath); + FAIL(c, dti, node, "node has a unit name, but no reg property"); } } WARNING(unit_address_vs_reg, check_unit_address_vs_reg, NULL); @@ -304,8 +342,8 @@ static void check_property_name_chars(struct check *c, struct dt_info *dti, int n = strspn(prop->name, c->data); if (n < strlen(prop->name)) - FAIL(c, dti, "Bad character '%c' in property name \"%s\", node %s", - prop->name[n], prop->name, node->fullpath); + FAIL_PROP(c, dti, node, prop, "Bad character '%c' in property name", + prop->name[n]); } } ERROR(property_name_chars, check_property_name_chars, PROPNODECHARS); @@ -336,8 +374,8 @@ static void check_property_name_chars_strict(struct check *c, n = strspn(name, c->data); } if (n < strlen(name)) - FAIL(c, dti, "Character '%c' not recommended in property name \"%s\", node %s", - name[n], prop->name, node->fullpath); + FAIL_PROP(c, dti, node, prop, "Character '%c' not recommended in property name", + name[n]); } } CHECK(property_name_chars_strict, check_property_name_chars_strict, PROPNODECHARSSTRICT); @@ -370,7 +408,7 @@ static void check_duplicate_label(struct check *c, struct dt_info *dti, return; if ((othernode != node) || (otherprop != prop) || (othermark != mark)) - FAIL(c, dti, "Duplicate label '%s' on " DESCLABEL_FMT + FAIL(c, dti, node, "Duplicate label '%s' on " DESCLABEL_FMT " and " DESCLABEL_FMT, label, DESCLABEL_ARGS(node, prop, mark), DESCLABEL_ARGS(othernode, otherprop, othermark)); @@ -410,8 +448,8 @@ static cell_t check_phandle_prop(struct check *c, struct dt_info *dti, return 0; if (prop->val.len != sizeof(cell_t)) { - FAIL(c, dti, "%s has bad length (%d) %s property", - node->fullpath, prop->val.len, prop->name); + FAIL_PROP(c, dti, node, prop, "bad length (%d) %s property", + prop->val.len, prop->name); return 0; } @@ -422,8 +460,8 @@ static cell_t check_phandle_prop(struct check *c, struct dt_info *dti, /* "Set this node's phandle equal to some * other node's phandle". That's nonsensical * by construction. */ { - FAIL(c, dti, "%s in %s is a reference to another node", - prop->name, node->fullpath); + FAIL(c, dti, node, "%s is a reference to another node", + prop->name); } /* But setting this node's phandle equal to its own * phandle is allowed - that means allocate a unique @@ -436,8 +474,8 @@ static cell_t check_phandle_prop(struct check *c, struct dt_info *dti, phandle = propval_cell(prop); if ((phandle == 0) || (phandle == -1)) { - FAIL(c, dti, "%s has bad value (0x%x) in %s property", - node->fullpath, phandle, prop->name); + FAIL_PROP(c, dti, node, prop, "bad value (0x%x) in %s property", + phandle, prop->name); return 0; } @@ -463,16 +501,16 @@ static void check_explicit_phandles(struct check *c, struct dt_info *dti, return; if (linux_phandle && phandle && (phandle != linux_phandle)) - FAIL(c, dti, "%s has mismatching 'phandle' and 'linux,phandle'" - " properties", node->fullpath); + FAIL(c, dti, node, "mismatching 'phandle' and 'linux,phandle'" + " properties"); if (linux_phandle && !phandle) phandle = linux_phandle; other = get_node_by_phandle(root, phandle); if (other && (other != node)) { - FAIL(c, dti, "%s has duplicated phandle 0x%x (seen before at %s)", - node->fullpath, phandle, other->fullpath); + FAIL(c, dti, node, "duplicated phandle 0x%x (seen before at %s)", + phandle, other->fullpath); return; } @@ -496,8 +534,8 @@ static void check_name_properties(struct check *c, struct dt_info *dti, if ((prop->val.len != node->basenamelen+1) || (memcmp(prop->val.val, node->name, node->basenamelen) != 0)) { - FAIL(c, dti, "\"name\" property in %s is incorrect (\"%s\" instead" - " of base node name)", node->fullpath, prop->val.val); + FAIL(c, dti, node, "\"name\" property is incorrect (\"%s\" instead" + " of base node name)", prop->val.val); } else { /* The name property is correct, and therefore redundant. * Delete it */ @@ -531,7 +569,7 @@ static void fixup_phandle_references(struct check *c, struct dt_info *dti, refnode = get_node_by_ref(dt, m->ref); if (! refnode) { if (!(dti->dtsflags & DTSF_PLUGIN)) - FAIL(c, dti, "Reference to non-existent node or " + FAIL(c, dti, node, "Reference to non-existent node or " "label \"%s\"\n", m->ref); else /* mark the entry as unresolved */ *((fdt32_t *)(prop->val.val + m->offset)) = @@ -563,7 +601,7 @@ static void fixup_path_references(struct check *c, struct dt_info *dti, refnode = get_node_by_ref(dt, m->ref); if (!refnode) { - FAIL(c, dti, "Reference to non-existent node or label \"%s\"\n", + FAIL(c, dti, node, "Reference to non-existent node or label \"%s\"\n", m->ref); continue; } @@ -586,6 +624,45 @@ WARNING_IF_NOT_CELL(interrupt_cells_is_cell, "#interrupt-cells"); WARNING_IF_NOT_STRING(device_type_is_string, "device_type"); WARNING_IF_NOT_STRING(model_is_string, "model"); WARNING_IF_NOT_STRING(status_is_string, "status"); +WARNING_IF_NOT_STRING(label_is_string, "label"); + +WARNING_IF_NOT_STRING_LIST(compatible_is_string_list, "compatible"); + +static void check_names_is_string_list(struct check *c, struct dt_info *dti, + struct node *node) +{ + struct property *prop; + + for_each_property(node, prop) { + const char *s = strrchr(prop->name, '-'); + if (!s || !streq(s, "-names")) + continue; + + c->data = prop->name; + check_is_string_list(c, dti, node); + } +} +WARNING(names_is_string_list, check_names_is_string_list, NULL); + +static void check_alias_paths(struct check *c, struct dt_info *dti, + struct node *node) +{ + struct property *prop; + + if (!streq(node->name, "aliases")) + return; + + for_each_property(node, prop) { + if (!prop->val.val || !get_node_by_path(dti->dt, prop->val.val)) { + FAIL_PROP(c, dti, node, prop, "aliases property is not a valid node (%s)", + prop->val.val); + continue; + } + if (strspn(prop->name, LOWERCASE DIGITS "-") != strlen(prop->name)) + FAIL(c, dti, node, "aliases property name must include only lowercase and '-'"); + } +} +WARNING(alias_paths, check_alias_paths, NULL); static void fixup_addr_size_cells(struct check *c, struct dt_info *dti, struct node *node) @@ -622,21 +699,21 @@ static void check_reg_format(struct check *c, struct dt_info *dti, return; /* No "reg", that's fine */ if (!node->parent) { - FAIL(c, dti, "Root node has a \"reg\" property"); + FAIL(c, dti, node, "Root node has a \"reg\" property"); return; } if (prop->val.len == 0) - FAIL(c, dti, "\"reg\" property in %s is empty", node->fullpath); + FAIL_PROP(c, dti, node, prop, "property is empty"); addr_cells = node_addr_cells(node->parent); size_cells = node_size_cells(node->parent); entrylen = (addr_cells + size_cells) * sizeof(cell_t); if (!entrylen || (prop->val.len % entrylen) != 0) - FAIL(c, dti, "\"reg\" property in %s has invalid length (%d bytes) " - "(#address-cells == %d, #size-cells == %d)", - node->fullpath, prop->val.len, addr_cells, size_cells); + FAIL_PROP(c, dti, node, prop, "property has invalid length (%d bytes) " + "(#address-cells == %d, #size-cells == %d)", + prop->val.len, addr_cells, size_cells); } WARNING(reg_format, check_reg_format, NULL, &addr_size_cells); @@ -651,7 +728,7 @@ static void check_ranges_format(struct check *c, struct dt_info *dti, return; if (!node->parent) { - FAIL(c, dti, "Root node has a \"ranges\" property"); + FAIL_PROP(c, dti, node, prop, "Root node has a \"ranges\" property"); return; } @@ -663,20 +740,20 @@ static void check_ranges_format(struct check *c, struct dt_info *dti, if (prop->val.len == 0) { if (p_addr_cells != c_addr_cells) - FAIL(c, dti, "%s has empty \"ranges\" property but its " - "#address-cells (%d) differs from %s (%d)", - node->fullpath, c_addr_cells, node->parent->fullpath, - p_addr_cells); + FAIL_PROP(c, dti, node, prop, "empty \"ranges\" property but its " + "#address-cells (%d) differs from %s (%d)", + c_addr_cells, node->parent->fullpath, + p_addr_cells); if (p_size_cells != c_size_cells) - FAIL(c, dti, "%s has empty \"ranges\" property but its " - "#size-cells (%d) differs from %s (%d)", - node->fullpath, c_size_cells, node->parent->fullpath, - p_size_cells); + FAIL_PROP(c, dti, node, prop, "empty \"ranges\" property but its " + "#size-cells (%d) differs from %s (%d)", + c_size_cells, node->parent->fullpath, + p_size_cells); } else if ((prop->val.len % entrylen) != 0) { - FAIL(c, dti, "\"ranges\" property in %s has invalid length (%d bytes) " - "(parent #address-cells == %d, child #address-cells == %d, " - "#size-cells == %d)", node->fullpath, prop->val.len, - p_addr_cells, c_addr_cells, c_size_cells); + FAIL_PROP(c, dti, node, prop, "\"ranges\" property has invalid length (%d bytes) " + "(parent #address-cells == %d, child #address-cells == %d, " + "#size-cells == %d)", prop->val.len, + p_addr_cells, c_addr_cells, c_size_cells); } } WARNING(ranges_format, check_ranges_format, NULL, &addr_size_cells); @@ -696,41 +773,33 @@ static void check_pci_bridge(struct check *c, struct dt_info *dti, struct node * node->bus = &pci_bus; - if (!strneq(node->name, "pci", node->basenamelen) && - !strneq(node->name, "pcie", node->basenamelen)) - FAIL(c, dti, "Node %s node name is not \"pci\" or \"pcie\"", - node->fullpath); + if (!strprefixeq(node->name, node->basenamelen, "pci") && + !strprefixeq(node->name, node->basenamelen, "pcie")) + FAIL(c, dti, node, "node name is not \"pci\" or \"pcie\""); prop = get_property(node, "ranges"); if (!prop) - FAIL(c, dti, "Node %s missing ranges for PCI bridge (or not a bridge)", - node->fullpath); + FAIL(c, dti, node, "missing ranges for PCI bridge (or not a bridge)"); if (node_addr_cells(node) != 3) - FAIL(c, dti, "Node %s incorrect #address-cells for PCI bridge", - node->fullpath); + FAIL(c, dti, node, "incorrect #address-cells for PCI bridge"); if (node_size_cells(node) != 2) - FAIL(c, dti, "Node %s incorrect #size-cells for PCI bridge", - node->fullpath); + FAIL(c, dti, node, "incorrect #size-cells for PCI bridge"); prop = get_property(node, "bus-range"); if (!prop) { - FAIL(c, dti, "Node %s missing bus-range for PCI bridge", - node->fullpath); + FAIL(c, dti, node, "missing bus-range for PCI bridge"); return; } if (prop->val.len != (sizeof(cell_t) * 2)) { - FAIL(c, dti, "Node %s bus-range must be 2 cells", - node->fullpath); + FAIL_PROP(c, dti, node, prop, "value must be 2 cells"); return; } cells = (cell_t *)prop->val.val; if (fdt32_to_cpu(cells[0]) > fdt32_to_cpu(cells[1])) - FAIL(c, dti, "Node %s bus-range 1st cell must be less than or equal to 2nd cell", - node->fullpath); + FAIL_PROP(c, dti, node, prop, "1st cell must be less than or equal to 2nd cell"); if (fdt32_to_cpu(cells[1]) > 0xff) - FAIL(c, dti, "Node %s bus-range maximum bus number must be less than 256", - node->fullpath); + FAIL_PROP(c, dti, node, prop, "maximum bus number must be less than 256"); } WARNING(pci_bridge, check_pci_bridge, NULL, &device_type_is_string, &addr_size_cells); @@ -760,8 +829,8 @@ static void check_pci_device_bus_num(struct check *c, struct dt_info *dti, struc max_bus = fdt32_to_cpu(cells[0]); } if ((bus_num < min_bus) || (bus_num > max_bus)) - FAIL(c, dti, "Node %s PCI bus number %d out of range, expected (%d - %d)", - node->fullpath, bus_num, min_bus, max_bus); + FAIL_PROP(c, dti, node, prop, "PCI bus number %d out of range, expected (%d - %d)", + bus_num, min_bus, max_bus); } WARNING(pci_device_bus_num, check_pci_device_bus_num, NULL, ®_format, &pci_bridge); @@ -778,25 +847,22 @@ static void check_pci_device_reg(struct check *c, struct dt_info *dti, struct no prop = get_property(node, "reg"); if (!prop) { - FAIL(c, dti, "Node %s missing PCI reg property", node->fullpath); + FAIL(c, dti, node, "missing PCI reg property"); return; } cells = (cell_t *)prop->val.val; if (cells[1] || cells[2]) - FAIL(c, dti, "Node %s PCI reg config space address cells 2 and 3 must be 0", - node->fullpath); + FAIL_PROP(c, dti, node, prop, "PCI reg config space address cells 2 and 3 must be 0"); reg = fdt32_to_cpu(cells[0]); dev = (reg & 0xf800) >> 11; func = (reg & 0x700) >> 8; if (reg & 0xff000000) - FAIL(c, dti, "Node %s PCI reg address is not configuration space", - node->fullpath); + FAIL_PROP(c, dti, node, prop, "PCI reg address is not configuration space"); if (reg & 0x000000ff) - FAIL(c, dti, "Node %s PCI reg config space address register number must be 0", - node->fullpath); + FAIL_PROP(c, dti, node, prop, "PCI reg config space address register number must be 0"); if (func == 0) { snprintf(unit_addr, sizeof(unit_addr), "%x", dev); @@ -808,8 +874,8 @@ static void check_pci_device_reg(struct check *c, struct dt_info *dti, struct no if (streq(unitname, unit_addr)) return; - FAIL(c, dti, "Node %s PCI unit address format error, expected \"%s\"", - node->fullpath, unit_addr); + FAIL(c, dti, node, "PCI unit address format error, expected \"%s\"", + unit_addr); } WARNING(pci_device_reg, check_pci_device_reg, NULL, ®_format, &pci_bridge); @@ -828,7 +894,7 @@ static bool node_is_compatible(struct node *node, const char *compat) for (str = prop->val.val, end = str + prop->val.len; str < end; str += strnlen(str, end - str) + 1) { - if (strneq(str, compat, end - str)) + if (strprefixeq(str, end - str, compat)) return true; } return false; @@ -865,7 +931,7 @@ static void check_simple_bus_reg(struct check *c, struct dt_info *dti, struct no if (!cells) { if (node->parent->parent && !(node->bus == &simple_bus)) - FAIL(c, dti, "Node %s missing or empty reg/ranges property", node->fullpath); + FAIL(c, dti, node, "missing or empty reg/ranges property"); return; } @@ -875,8 +941,8 @@ static void check_simple_bus_reg(struct check *c, struct dt_info *dti, struct no snprintf(unit_addr, sizeof(unit_addr), "%"PRIx64, reg); if (!streq(unitname, unit_addr)) - FAIL(c, dti, "Node %s simple-bus unit address format error, expected \"%s\"", - node->fullpath, unit_addr); + FAIL(c, dti, node, "simple-bus unit address format error, expected \"%s\"", + unit_addr); } WARNING(simple_bus_reg, check_simple_bus_reg, NULL, ®_format, &simple_bus_bridge); @@ -892,14 +958,12 @@ static void check_unit_address_format(struct check *c, struct dt_info *dti, return; if (!strncmp(unitname, "0x", 2)) { - FAIL(c, dti, "Node %s unit name should not have leading \"0x\"", - node->fullpath); + FAIL(c, dti, node, "unit name should not have leading \"0x\""); /* skip over 0x for next test */ unitname += 2; } if (unitname[0] == '0' && isxdigit(unitname[1])) - FAIL(c, dti, "Node %s unit name should not have leading 0s", - node->fullpath); + FAIL(c, dti, node, "unit name should not have leading 0s"); } WARNING(unit_address_format, check_unit_address_format, NULL, &node_name_format, &pci_bridge, &simple_bus_bridge); @@ -922,16 +986,38 @@ static void check_avoid_default_addr_size(struct check *c, struct dt_info *dti, return; if (node->parent->addr_cells == -1) - FAIL(c, dti, "Relying on default #address-cells value for %s", - node->fullpath); + FAIL(c, dti, node, "Relying on default #address-cells value"); if (node->parent->size_cells == -1) - FAIL(c, dti, "Relying on default #size-cells value for %s", - node->fullpath); + FAIL(c, dti, node, "Relying on default #size-cells value"); } WARNING(avoid_default_addr_size, check_avoid_default_addr_size, NULL, &addr_size_cells); +static void check_avoid_unnecessary_addr_size(struct check *c, struct dt_info *dti, + struct node *node) +{ + struct property *prop; + struct node *child; + bool has_reg = false; + + if (!node->parent || node->addr_cells < 0 || node->size_cells < 0) + return; + + if (get_property(node, "ranges") || !node->children) + return; + + for_each_child(node, child) { + prop = get_property(child, "reg"); + if (prop) + has_reg = true; + } + + if (!has_reg) + FAIL(c, dti, node, "unnecessary #address-cells/#size-cells without \"ranges\" or child \"reg\" property"); +} +WARNING(avoid_unnecessary_addr_size, check_avoid_unnecessary_addr_size, NULL, &avoid_default_addr_size); + static void check_obsolete_chosen_interrupt_controller(struct check *c, struct dt_info *dti, struct node *node) @@ -950,12 +1036,61 @@ static void check_obsolete_chosen_interrupt_controller(struct check *c, prop = get_property(chosen, "interrupt-controller"); if (prop) - FAIL(c, dti, "/chosen has obsolete \"interrupt-controller\" " - "property"); + FAIL_PROP(c, dti, node, prop, + "/chosen has obsolete \"interrupt-controller\" property"); } WARNING(obsolete_chosen_interrupt_controller, check_obsolete_chosen_interrupt_controller, NULL); +static void check_chosen_node_is_root(struct check *c, struct dt_info *dti, + struct node *node) +{ + if (!streq(node->name, "chosen")) + return; + + if (node->parent != dti->dt) + FAIL(c, dti, node, "chosen node must be at root node"); +} +WARNING(chosen_node_is_root, check_chosen_node_is_root, NULL); + +static void check_chosen_node_bootargs(struct check *c, struct dt_info *dti, + struct node *node) +{ + struct property *prop; + + if (!streq(node->name, "chosen")) + return; + + prop = get_property(node, "bootargs"); + if (!prop) + return; + + c->data = prop->name; + check_is_string(c, dti, node); +} +WARNING(chosen_node_bootargs, check_chosen_node_bootargs, NULL); + +static void check_chosen_node_stdout_path(struct check *c, struct dt_info *dti, + struct node *node) +{ + struct property *prop; + + if (!streq(node->name, "chosen")) + return; + + prop = get_property(node, "stdout-path"); + if (!prop) { + prop = get_property(node, "linux,stdout-path"); + if (!prop) + return; + FAIL_PROP(c, dti, node, prop, "Use 'stdout-path' instead"); + } + + c->data = prop->name; + check_is_string(c, dti, node); +} +WARNING(chosen_node_stdout_path, check_chosen_node_stdout_path, NULL); + struct provider { const char *prop_name; const char *cell_name; @@ -972,8 +1107,9 @@ static void check_property_phandle_args(struct check *c, int cell, cellsize = 0; if (prop->val.len % sizeof(cell_t)) { - FAIL(c, dti, "property '%s' size (%d) is invalid, expected multiple of %zu in node %s", - prop->name, prop->val.len, sizeof(cell_t), node->fullpath); + FAIL_PROP(c, dti, node, prop, + "property size (%d) is invalid, expected multiple of %zu", + prop->val.len, sizeof(cell_t)); return; } @@ -988,6 +1124,10 @@ static void check_property_phandle_args(struct check *c, * entries when each index position has a specific definition. */ if (phandle == 0 || phandle == -1) { + /* Give up if this is an overlay with external references */ + if (dti->dtsflags & DTSF_PLUGIN) + break; + cellsize = 0; continue; } @@ -1000,14 +1140,16 @@ static void check_property_phandle_args(struct check *c, break; } if (!m) - FAIL(c, dti, "Property '%s', cell %d is not a phandle reference in %s", - prop->name, cell, node->fullpath); + FAIL_PROP(c, dti, node, prop, + "cell %d is not a phandle reference", + cell); } provider_node = get_node_by_phandle(root, phandle); if (!provider_node) { - FAIL(c, dti, "Could not get phandle node for %s:%s(cell %d)", - node->fullpath, prop->name, cell); + FAIL_PROP(c, dti, node, prop, + "Could not get phandle node for (cell %d)", + cell); break; } @@ -1017,16 +1159,17 @@ static void check_property_phandle_args(struct check *c, } else if (provider->optional) { cellsize = 0; } else { - FAIL(c, dti, "Missing property '%s' in node %s or bad phandle (referred from %s:%s[%d])", + FAIL(c, dti, node, "Missing property '%s' in node %s or bad phandle (referred from %s[%d])", provider->cell_name, provider_node->fullpath, - node->fullpath, prop->name, cell); + prop->name, cell); break; } if (prop->val.len < ((cell + cellsize + 1) * sizeof(cell_t))) { - FAIL(c, dti, "%s property size (%d) too small for cell size %d in %s", - prop->name, prop->val.len, cellsize, node->fullpath); + FAIL_PROP(c, dti, node, prop, + "property size (%d) too small for cell size %d", + prop->val.len, cellsize); } } } @@ -1062,7 +1205,7 @@ WARNING_PROPERTY_PHANDLE_CELLS(phys, "phys", "#phy-cells"); WARNING_PROPERTY_PHANDLE_CELLS(power_domains, "power-domains", "#power-domain-cells"); WARNING_PROPERTY_PHANDLE_CELLS(pwms, "pwms", "#pwm-cells"); WARNING_PROPERTY_PHANDLE_CELLS(resets, "resets", "#reset-cells"); -WARNING_PROPERTY_PHANDLE_CELLS(sound_dais, "sound-dais", "#sound-dai-cells"); +WARNING_PROPERTY_PHANDLE_CELLS(sound_dai, "sound-dai", "#sound-dai-cells"); WARNING_PROPERTY_PHANDLE_CELLS(thermal_sensors, "thermal-sensors", "#thermal-sensor-cells"); static bool prop_is_gpio(struct property *prop) @@ -1128,8 +1271,8 @@ static void check_deprecated_gpio_property(struct check *c, if (!streq(str, "gpio")) continue; - FAIL(c, dti, "'[*-]gpio' is deprecated, use '[*-]gpios' instead for %s:%s", - node->fullpath, prop->name); + FAIL_PROP(c, dti, node, prop, + "'[*-]gpio' is deprecated, use '[*-]gpios' instead"); } } @@ -1163,9 +1306,8 @@ static void check_interrupts_property(struct check *c, return; if (irq_prop->val.len % sizeof(cell_t)) - FAIL(c, dti, "property '%s' size (%d) is invalid, expected multiple of %zu in node %s", - irq_prop->name, irq_prop->val.len, sizeof(cell_t), - node->fullpath); + FAIL_PROP(c, dti, node, irq_prop, "size (%d) is invalid, expected multiple of %zu", + irq_prop->val.len, sizeof(cell_t)); while (parent && !prop) { if (parent != node && node_is_interrupt_provider(parent)) { @@ -1176,16 +1318,19 @@ static void check_interrupts_property(struct check *c, prop = get_property(parent, "interrupt-parent"); if (prop) { phandle = propval_cell(prop); + /* Give up if this is an overlay with external references */ + if ((phandle == 0 || phandle == -1) && + (dti->dtsflags & DTSF_PLUGIN)) + return; + irq_node = get_node_by_phandle(root, phandle); if (!irq_node) { - FAIL(c, dti, "Bad interrupt-parent phandle for %s", - node->fullpath); + FAIL_PROP(c, dti, parent, prop, "Bad phandle"); return; } if (!node_is_interrupt_provider(irq_node)) - FAIL(c, dti, - "Missing interrupt-controller or interrupt-map property in %s", - irq_node->fullpath); + FAIL(c, dti, irq_node, + "Missing interrupt-controller or interrupt-map property"); break; } @@ -1194,23 +1339,21 @@ static void check_interrupts_property(struct check *c, } if (!irq_node) { - FAIL(c, dti, "Missing interrupt-parent for %s", node->fullpath); + FAIL(c, dti, node, "Missing interrupt-parent"); return; } prop = get_property(irq_node, "#interrupt-cells"); if (!prop) { - FAIL(c, dti, "Missing #interrupt-cells in interrupt-parent %s", - irq_node->fullpath); + FAIL(c, dti, irq_node, "Missing #interrupt-cells in interrupt-parent"); return; } irq_cells = propval_cell(prop); if (irq_prop->val.len % (irq_cells * sizeof(cell_t))) { - FAIL(c, dti, - "interrupts size is (%d), expected multiple of %d in %s", - irq_prop->val.len, (int)(irq_cells * sizeof(cell_t)), - node->fullpath); + FAIL_PROP(c, dti, node, prop, + "size is (%d), expected multiple of %d", + irq_prop->val.len, (int)(irq_cells * sizeof(cell_t))); } } WARNING(interrupts_property, check_interrupts_property, &phandle_references); @@ -1227,6 +1370,9 @@ static struct check *check_table[] = { &address_cells_is_cell, &size_cells_is_cell, &interrupt_cells_is_cell, &device_type_is_string, &model_is_string, &status_is_string, + &label_is_string, + + &compatible_is_string_list, &names_is_string_list, &property_name_chars_strict, &node_name_chars_strict, @@ -1244,7 +1390,9 @@ static struct check *check_table[] = { &simple_bus_reg, &avoid_default_addr_size, + &avoid_unnecessary_addr_size, &obsolete_chosen_interrupt_controller, + &chosen_node_is_root, &chosen_node_bootargs, &chosen_node_stdout_path, &clocks_property, &cooling_device_property, @@ -1260,13 +1408,15 @@ static struct check *check_table[] = { &power_domains_property, &pwms_property, &resets_property, - &sound_dais_property, + &sound_dai_property, &thermal_sensors_property, &deprecated_gpio_property, &gpios_property, &interrupts_property, + &alias_paths, + &always_fail, }; diff --git a/scripts/dtc/dtc-lexer.lex.c_shipped b/scripts/dtc/dtc-lexer.lex.c_shipped deleted file mode 100644 index 011bb9632ff..00000000000 --- a/scripts/dtc/dtc-lexer.lex.c_shipped +++ /dev/null @@ -1,2259 +0,0 @@ -#line 2 "dtc-lexer.lex.c" - -#line 4 "dtc-lexer.lex.c" - -#define YY_INT_ALIGNED short int - -/* A lexical scanner generated by flex */ - -#define FLEX_SCANNER -#define YY_FLEX_MAJOR_VERSION 2 -#define YY_FLEX_MINOR_VERSION 6 -#define YY_FLEX_SUBMINOR_VERSION 1 -#if YY_FLEX_SUBMINOR_VERSION > 0 -#define FLEX_BETA -#endif - -/* First, we deal with platform-specific or compiler-specific issues. */ - -/* begin standard C headers. */ -#include <stdio.h> -#include <string.h> -#include <errno.h> -#include <stdlib.h> - -/* end standard C headers. */ - -/* flex integer type definitions */ - -#ifndef FLEXINT_H -#define FLEXINT_H - -/* C99 systems have <inttypes.h>. Non-C99 systems may or may not. */ - -#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L - -/* C99 says to define __STDC_LIMIT_MACROS before including stdint.h, - * if you want the limit (max/min) macros for int types. - */ -#ifndef __STDC_LIMIT_MACROS -#define __STDC_LIMIT_MACROS 1 -#endif - -#include <inttypes.h> -typedef int8_t flex_int8_t; -typedef uint8_t flex_uint8_t; -typedef int16_t flex_int16_t; -typedef uint16_t flex_uint16_t; -typedef int32_t flex_int32_t; -typedef uint32_t flex_uint32_t; -#else -typedef signed char flex_int8_t; -typedef short int flex_int16_t; -typedef int flex_int32_t; -typedef unsigned char flex_uint8_t; -typedef unsigned short int flex_uint16_t; -typedef unsigned int flex_uint32_t; - -/* Limits of integral types. */ -#ifndef INT8_MIN -#define INT8_MIN (-128) -#endif -#ifndef INT16_MIN -#define INT16_MIN (-32767-1) -#endif -#ifndef INT32_MIN -#define INT32_MIN (-2147483647-1) -#endif -#ifndef INT8_MAX -#define INT8_MAX (127) -#endif -#ifndef INT16_MAX -#define INT16_MAX (32767) -#endif -#ifndef INT32_MAX -#define INT32_MAX (2147483647) -#endif -#ifndef UINT8_MAX -#define UINT8_MAX (255U) -#endif -#ifndef UINT16_MAX -#define UINT16_MAX (65535U) -#endif -#ifndef UINT32_MAX -#define UINT32_MAX (4294967295U) -#endif - -#endif /* ! C99 */ - -#endif /* ! FLEXINT_H */ - -/* TODO: this is always defined, so inline it */ -#define yyconst const - -#if defined(__GNUC__) && __GNUC__ >= 3 -#define yynoreturn __attribute__((__noreturn__)) -#else -#define yynoreturn -#endif - -/* Returned upon end-of-file. */ -#define YY_NULL 0 - -/* Promotes a possibly negative, possibly signed char to an unsigned - * integer for use as an array index. If the signed char is negative, - * we want to instead treat it as an 8-bit unsigned char, hence the - * double cast. - */ -#define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c) - -/* Enter a start condition. This macro really ought to take a parameter, - * but we do it the disgusting crufty way forced on us by the ()-less - * definition of BEGIN. - */ -#define BEGIN (yy_start) = 1 + 2 * - -/* Translate the current start state into a value that can be later handed - * to BEGIN to return to the state. The YYSTATE alias is for lex - * compatibility. - */ -#define YY_START (((yy_start) - 1) / 2) -#define YYSTATE YY_START - -/* Action number for EOF rule of a given start state. */ -#define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1) - -/* Special action meaning "start processing a new file". */ -#define YY_NEW_FILE yyrestart(yyin ) - -#define YY_END_OF_BUFFER_CHAR 0 - -/* Size of default input buffer. */ -#ifndef YY_BUF_SIZE -#ifdef __ia64__ -/* On IA-64, the buffer size is 16k, not 8k. - * Moreover, YY_BUF_SIZE is 2*YY_READ_BUF_SIZE in the general case. - * Ditto for the __ia64__ case accordingly. - */ -#define YY_BUF_SIZE 32768 -#else -#define YY_BUF_SIZE 16384 -#endif /* __ia64__ */ -#endif - -/* The state buf must be large enough to hold one state per character in the main buffer. - */ -#define YY_STATE_BUF_SIZE ((YY_BUF_SIZE + 2) * sizeof(yy_state_type)) - -#ifndef YY_TYPEDEF_YY_BUFFER_STATE -#define YY_TYPEDEF_YY_BUFFER_STATE -typedef struct yy_buffer_state *YY_BUFFER_STATE; -#endif - -#ifndef YY_TYPEDEF_YY_SIZE_T -#define YY_TYPEDEF_YY_SIZE_T -typedef size_t yy_size_t; -#endif - -extern int yyleng; - -extern FILE *yyin, *yyout; - -#define EOB_ACT_CONTINUE_SCAN 0 -#define EOB_ACT_END_OF_FILE 1 -#define EOB_ACT_LAST_MATCH 2 - - #define YY_LESS_LINENO(n) - #define YY_LINENO_REWIND_TO(ptr) - -/* Return all but the first "n" matched characters back to the input stream. */ -#define yyless(n) \ - do \ - { \ - /* Undo effects of setting up yytext. */ \ - int yyless_macro_arg = (n); \ - YY_LESS_LINENO(yyless_macro_arg);\ - *yy_cp = (yy_hold_char); \ - YY_RESTORE_YY_MORE_OFFSET \ - (yy_c_buf_p) = yy_cp = yy_bp + yyless_macro_arg - YY_MORE_ADJ; \ - YY_DO_BEFORE_ACTION; /* set up yytext again */ \ - } \ - while ( 0 ) - -#define unput(c) yyunput( c, (yytext_ptr) ) - -#ifndef YY_STRUCT_YY_BUFFER_STATE -#define YY_STRUCT_YY_BUFFER_STATE -struct yy_buffer_state - { - FILE *yy_input_file; - - char *yy_ch_buf; /* input buffer */ - char *yy_buf_pos; /* current position in input buffer */ - - /* Size of input buffer in bytes, not including room for EOB - * characters. - */ - int yy_buf_size; - - /* Number of characters read into yy_ch_buf, not including EOB - * characters. - */ - int yy_n_chars; - - /* Whether we "own" the buffer - i.e., we know we created it, - * and can realloc() it to grow it, and should free() it to - * delete it. - */ - int yy_is_our_buffer; - - /* Whether this is an "interactive" input source; if so, and - * if we're using stdio for input, then we want to use getc() - * instead of fread(), to make sure we stop fetching input after - * each newline. - */ - int yy_is_interactive; - - /* Whether we're considered to be at the beginning of a line. - * If so, '^' rules will be active on the next match, otherwise - * not. - */ - int yy_at_bol; - - int yy_bs_lineno; /**< The line count. */ - int yy_bs_column; /**< The column count. */ - - /* Whether to try to fill the input buffer when we reach the - * end of it. - */ - int yy_fill_buffer; - - int yy_buffer_status; - -#define YY_BUFFER_NEW 0 -#define YY_BUFFER_NORMAL 1 - /* When an EOF's been seen but there's still some text to process - * then we mark the buffer as YY_EOF_PENDING, to indicate that we - * shouldn't try reading from the input source any more. We might - * still have a bunch of tokens to match, though, because of - * possible backing-up. - * - * When we actually see the EOF, we change the status to "new" - * (via yyrestart()), so that the user can continue scanning by - * just pointing yyin at a new input file. - */ -#define YY_BUFFER_EOF_PENDING 2 - - }; -#endif /* !YY_STRUCT_YY_BUFFER_STATE */ - -/* Stack of input buffers. */ -static size_t yy_buffer_stack_top = 0; /**< index of top of stack. */ -static size_t yy_buffer_stack_max = 0; /**< capacity of stack. */ -static YY_BUFFER_STATE * yy_buffer_stack = NULL; /**< Stack as an array. */ - -/* We provide macros for accessing buffer states in case in the - * future we want to put the buffer states in a more general - * "scanner state". - * - * Returns the top of the stack, or NULL. - */ -#define YY_CURRENT_BUFFER ( (yy_buffer_stack) \ - ? (yy_buffer_stack)[(yy_buffer_stack_top)] \ - : NULL) - -/* Same as previous macro, but useful when we know that the buffer stack is not - * NULL or when we need an lvalue. For internal use only. - */ -#define YY_CURRENT_BUFFER_LVALUE (yy_buffer_stack)[(yy_buffer_stack_top)] - -/* yy_hold_char holds the character lost when yytext is formed. */ -static char yy_hold_char; -static int yy_n_chars; /* number of characters read into yy_ch_buf */ -int yyleng; - -/* Points to current character in buffer. */ -static char *yy_c_buf_p = NULL; -static int yy_init = 0; /* whether we need to initialize */ -static int yy_start = 0; /* start state number */ - -/* Flag which is used to allow yywrap()'s to do buffer switches - * instead of setting up a fresh yyin. A bit of a hack ... - */ -static int yy_did_buffer_switch_on_eof; - -void yyrestart (FILE *input_file ); -void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer ); -YY_BUFFER_STATE yy_create_buffer (FILE *file,int size ); -void yy_delete_buffer (YY_BUFFER_STATE b ); -void yy_flush_buffer (YY_BUFFER_STATE b ); -void yypush_buffer_state (YY_BUFFER_STATE new_buffer ); -void yypop_buffer_state (void ); - -static void yyensure_buffer_stack (void ); -static void yy_load_buffer_state (void ); -static void yy_init_buffer (YY_BUFFER_STATE b,FILE *file ); - -#define YY_FLUSH_BUFFER yy_flush_buffer(YY_CURRENT_BUFFER ) - -YY_BUFFER_STATE yy_scan_buffer (char *base,yy_size_t size ); -YY_BUFFER_STATE yy_scan_string (yyconst char *yy_str ); -YY_BUFFER_STATE yy_scan_bytes (yyconst char *bytes,int len ); - -void *yyalloc (yy_size_t ); -void *yyrealloc (void *,yy_size_t ); -void yyfree (void * ); - -#define yy_new_buffer yy_create_buffer - -#define yy_set_interactive(is_interactive) \ - { \ - if ( ! YY_CURRENT_BUFFER ){ \ - yyensure_buffer_stack (); \ - YY_CURRENT_BUFFER_LVALUE = \ - yy_create_buffer(yyin,YY_BUF_SIZE ); \ - } \ - YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \ - } - -#define yy_set_bol(at_bol) \ - { \ - if ( ! YY_CURRENT_BUFFER ){\ - yyensure_buffer_stack (); \ - YY_CURRENT_BUFFER_LVALUE = \ - yy_create_buffer(yyin,YY_BUF_SIZE ); \ - } \ - YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \ - } - -#define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol) - -/* Begin user sect3 */ - -#define yywrap() (/*CONSTCOND*/1) -#define YY_SKIP_YYWRAP - -typedef unsigned char YY_CHAR; - -FILE *yyin = NULL, *yyout = NULL; - -typedef int yy_state_type; - -extern int yylineno; - -int yylineno = 1; - -extern char *yytext; -#ifdef yytext_ptr -#undef yytext_ptr -#endif -#define yytext_ptr yytext - -static yy_state_type yy_get_previous_state (void ); -static yy_state_type yy_try_NUL_trans (yy_state_type current_state ); -static int yy_get_next_buffer (void ); -static void yynoreturn yy_fatal_error (yyconst char* msg ); - -/* Done after the current pattern has been matched and before the - * corresponding action - sets up yytext. - */ -#define YY_DO_BEFORE_ACTION \ - (yytext_ptr) = yy_bp; \ - yyleng = (int) (yy_cp - yy_bp); \ - (yy_hold_char) = *yy_cp; \ - *yy_cp = '\0'; \ - (yy_c_buf_p) = yy_cp; - -#define YY_NUM_RULES 31 -#define YY_END_OF_BUFFER 32 -/* This struct is not used in this scanner, - but its presence is necessary. */ -struct yy_trans_info - { - flex_int32_t yy_verify; - flex_int32_t yy_nxt; - }; -static yyconst flex_int16_t yy_accept[166] = - { 0, - 0, 0, 0, 0, 0, 0, 0, 0, 32, 30, - 19, 19, 30, 30, 30, 30, 30, 30, 30, 30, - 30, 30, 30, 30, 30, 30, 16, 17, 17, 30, - 17, 11, 11, 19, 27, 0, 3, 0, 28, 13, - 0, 0, 12, 0, 0, 0, 0, 0, 0, 0, - 0, 22, 24, 26, 25, 23, 0, 10, 29, 0, - 0, 0, 15, 15, 17, 17, 17, 11, 11, 11, - 0, 13, 0, 12, 0, 0, 0, 21, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 17, 11, 11, - 11, 0, 14, 20, 0, 0, 0, 0, 0, 0, - - 0, 0, 0, 0, 17, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 17, 7, 0, 0, 0, - 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 4, 18, 0, 0, 5, 2, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 1, 0, 0, 0, 0, 6, 9, 0, - 0, 0, 0, 8, 0 - } ; - -static yyconst YY_CHAR yy_ec[256] = - { 0, - 1, 1, 1, 1, 1, 1, 1, 1, 2, 3, - 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 2, 5, 6, 7, 1, 1, 8, 9, 1, - 1, 10, 11, 11, 12, 11, 13, 14, 15, 16, - 16, 16, 16, 16, 16, 16, 16, 17, 1, 18, - 19, 20, 11, 11, 21, 21, 21, 21, 21, 21, - 22, 22, 22, 22, 22, 23, 22, 22, 22, 22, - 22, 22, 22, 22, 24, 22, 22, 25, 22, 22, - 1, 26, 27, 1, 22, 1, 21, 28, 29, 30, - - 31, 21, 32, 22, 33, 22, 22, 34, 35, 36, - 37, 38, 22, 39, 40, 41, 42, 43, 22, 25, - 44, 22, 45, 46, 47, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1 - } ; - -static yyconst YY_CHAR yy_meta[48] = - { 0, - 1, 1, 1, 1, 1, 1, 2, 3, 1, 2, - 2, 2, 4, 5, 5, 5, 6, 1, 1, 1, - 7, 8, 8, 8, 8, 1, 1, 7, 7, 7, - 7, 8, 8, 8, 8, 8, 8, 8, 8, 8, - 8, 8, 8, 8, 3, 1, 4 - } ; - -static yyconst flex_uint16_t yy_base[180] = - { 0, - 0, 393, 35, 392, 66, 391, 38, 107, 397, 401, - 55, 113, 377, 112, 111, 111, 114, 42, 376, 106, - 377, 347, 126, 120, 0, 147, 401, 0, 124, 0, - 137, 158, 170, 163, 401, 153, 401, 389, 401, 0, - 378, 120, 401, 131, 380, 386, 355, 139, 351, 355, - 351, 401, 401, 401, 401, 401, 367, 401, 401, 185, - 350, 346, 401, 364, 0, 185, 347, 189, 356, 355, - 0, 0, 330, 180, 366, 141, 372, 361, 332, 338, - 331, 341, 334, 326, 205, 331, 337, 329, 401, 341, - 167, 316, 401, 349, 348, 320, 328, 346, 180, 318, - - 324, 209, 324, 320, 322, 342, 338, 309, 306, 315, - 305, 315, 312, 192, 342, 341, 401, 293, 306, 282, - 268, 252, 255, 203, 285, 282, 272, 268, 252, 233, - 232, 239, 208, 107, 401, 401, 238, 211, 401, 211, - 212, 208, 228, 203, 215, 207, 233, 222, 212, 211, - 203, 227, 401, 237, 225, 204, 185, 401, 401, 149, - 128, 88, 42, 401, 401, 253, 259, 267, 271, 275, - 281, 288, 292, 300, 308, 312, 318, 326, 334 - } ; - -static yyconst flex_int16_t yy_def[180] = - { 0, - 165, 1, 1, 3, 165, 5, 1, 1, 165, 165, - 165, 165, 165, 166, 167, 168, 165, 165, 165, 165, - 169, 165, 165, 165, 170, 169, 165, 171, 172, 171, - 171, 165, 165, 165, 165, 166, 165, 166, 165, 173, - 165, 168, 165, 168, 174, 175, 165, 165, 165, 165, - 165, 165, 165, 165, 165, 165, 169, 165, 165, 165, - 165, 165, 165, 169, 171, 172, 171, 165, 165, 165, - 176, 173, 177, 168, 174, 174, 175, 165, 165, 165, - 165, 165, 165, 165, 165, 165, 165, 171, 165, 165, - 176, 177, 165, 165, 165, 165, 165, 165, 165, 165, - - 165, 165, 165, 165, 171, 165, 165, 165, 165, 165, - 165, 165, 165, 178, 165, 171, 165, 165, 165, 165, - 165, 165, 165, 178, 165, 178, 165, 165, 165, 165, - 165, 165, 165, 165, 165, 165, 165, 165, 165, 165, - 165, 165, 165, 165, 165, 165, 165, 179, 165, 165, - 165, 179, 165, 179, 165, 165, 165, 165, 165, 165, - 165, 165, 165, 165, 0, 165, 165, 165, 165, 165, - 165, 165, 165, 165, 165, 165, 165, 165, 165 - } ; - -static yyconst flex_uint16_t yy_nxt[449] = - { 0, - 10, 11, 12, 11, 13, 14, 10, 15, 16, 10, - 10, 10, 17, 10, 10, 10, 10, 18, 19, 20, - 21, 21, 21, 21, 21, 10, 10, 21, 21, 21, - 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, - 21, 21, 21, 21, 10, 22, 10, 24, 25, 25, - 25, 32, 33, 33, 164, 26, 34, 34, 34, 52, - 53, 27, 26, 26, 26, 26, 10, 11, 12, 11, - 13, 14, 28, 15, 16, 28, 28, 28, 24, 28, - 28, 28, 10, 18, 19, 20, 29, 29, 29, 29, - 29, 30, 10, 29, 29, 29, 29, 29, 29, 29, - - 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, - 10, 22, 10, 23, 34, 34, 34, 37, 39, 43, - 32, 33, 33, 45, 55, 56, 46, 60, 43, 45, - 65, 163, 46, 65, 65, 65, 44, 38, 60, 74, - 58, 47, 141, 48, 142, 44, 49, 47, 50, 48, - 76, 51, 62, 94, 50, 41, 44, 51, 37, 61, - 64, 64, 64, 58, 34, 34, 34, 64, 162, 80, - 67, 68, 68, 68, 64, 64, 64, 64, 38, 81, - 69, 70, 71, 68, 68, 68, 60, 161, 43, 69, - 70, 65, 69, 70, 65, 65, 65, 125, 85, 85, - - 85, 58, 68, 68, 68, 44, 102, 110, 125, 133, - 102, 69, 70, 111, 114, 160, 159, 126, 85, 85, - 85, 140, 140, 140, 140, 140, 140, 153, 126, 147, - 147, 147, 153, 148, 147, 147, 147, 158, 148, 165, - 157, 156, 155, 151, 150, 149, 146, 154, 145, 144, - 143, 139, 154, 36, 36, 36, 36, 36, 36, 36, - 36, 40, 138, 137, 136, 40, 40, 42, 42, 42, - 42, 42, 42, 42, 42, 57, 57, 57, 57, 63, - 135, 63, 65, 134, 165, 65, 133, 65, 65, 66, - 132, 131, 66, 66, 66, 66, 72, 130, 72, 72, - - 75, 75, 75, 75, 75, 75, 75, 75, 77, 77, - 77, 77, 77, 77, 77, 77, 91, 129, 91, 92, - 128, 92, 92, 127, 92, 92, 124, 124, 124, 124, - 124, 124, 124, 124, 152, 152, 152, 152, 152, 152, - 152, 152, 60, 60, 123, 122, 121, 120, 119, 118, - 117, 45, 116, 111, 115, 113, 112, 109, 108, 107, - 46, 106, 93, 89, 105, 104, 103, 101, 100, 99, - 98, 97, 96, 95, 78, 76, 93, 90, 89, 88, - 58, 87, 86, 58, 84, 83, 82, 79, 78, 76, - 73, 165, 59, 58, 54, 35, 165, 31, 23, 23, - - 9, 165, 165, 165, 165, 165, 165, 165, 165, 165, - 165, 165, 165, 165, 165, 165, 165, 165, 165, 165, - 165, 165, 165, 165, 165, 165, 165, 165, 165, 165, - 165, 165, 165, 165, 165, 165, 165, 165, 165, 165, - 165, 165, 165, 165, 165, 165, 165, 165 - } ; - -static yyconst flex_int16_t yy_chk[449] = - { 0, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 3, 3, 3, - 3, 7, 7, 7, 163, 3, 11, 11, 11, 18, - 18, 3, 3, 3, 3, 3, 5, 5, 5, 5, - 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, - 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, - 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, - - 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, - 5, 5, 5, 8, 12, 12, 12, 14, 15, 16, - 8, 8, 8, 17, 20, 20, 17, 23, 42, 24, - 29, 162, 24, 29, 29, 29, 16, 14, 31, 44, - 29, 17, 134, 17, 134, 42, 17, 24, 17, 24, - 76, 17, 24, 76, 24, 15, 44, 24, 36, 23, - 26, 26, 26, 26, 34, 34, 34, 26, 161, 48, - 31, 32, 32, 32, 26, 26, 26, 26, 36, 48, - 32, 32, 32, 33, 33, 33, 60, 160, 74, 91, - 91, 66, 33, 33, 66, 66, 66, 114, 60, 60, - - 60, 66, 68, 68, 68, 74, 85, 99, 124, 133, - 102, 68, 68, 99, 102, 157, 156, 114, 85, 85, - 85, 133, 133, 133, 140, 140, 140, 148, 124, 143, - 143, 143, 152, 143, 147, 147, 147, 155, 147, 154, - 151, 150, 149, 146, 145, 144, 142, 148, 141, 138, - 137, 132, 152, 166, 166, 166, 166, 166, 166, 166, - 166, 167, 131, 130, 129, 167, 167, 168, 168, 168, - 168, 168, 168, 168, 168, 169, 169, 169, 169, 170, - 128, 170, 171, 127, 126, 171, 125, 171, 171, 172, - 123, 122, 172, 172, 172, 172, 173, 121, 173, 173, - - 174, 174, 174, 174, 174, 174, 174, 174, 175, 175, - 175, 175, 175, 175, 175, 175, 176, 120, 176, 177, - 119, 177, 177, 118, 177, 177, 178, 178, 178, 178, - 178, 178, 178, 178, 179, 179, 179, 179, 179, 179, - 179, 179, 116, 115, 113, 112, 111, 110, 109, 108, - 107, 106, 105, 104, 103, 101, 100, 98, 97, 96, - 95, 94, 92, 90, 88, 87, 86, 84, 83, 82, - 81, 80, 79, 78, 77, 75, 73, 70, 69, 67, - 64, 62, 61, 57, 51, 50, 49, 47, 46, 45, - 41, 38, 22, 21, 19, 13, 9, 6, 4, 2, - - 165, 165, 165, 165, 165, 165, 165, 165, 165, 165, - 165, 165, 165, 165, 165, 165, 165, 165, 165, 165, - 165, 165, 165, 165, 165, 165, 165, 165, 165, 165, - 165, 165, 165, 165, 165, 165, 165, 165, 165, 165, - 165, 165, 165, 165, 165, 165, 165, 165 - } ; - -static yy_state_type yy_last_accepting_state; -static char *yy_last_accepting_cpos; - -extern int yy_flex_debug; -int yy_flex_debug = 0; - -/* The intent behind this definition is that it'll catch - * any uses of REJECT which flex missed. - */ -#define REJECT reject_used_but_not_detected -#define yymore() yymore_used_but_not_detected -#define YY_MORE_ADJ 0 -#define YY_RESTORE_YY_MORE_OFFSET -char *yytext; -#line 1 "dtc-lexer.l" -/* - * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation. 2005. - * - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 - * USA - */ -#define YY_NO_INPUT 1 - - - -#line 37 "dtc-lexer.l" -#include "dtc.h" -#include "srcpos.h" -#include "dtc-parser.tab.h" - -YYLTYPE yylloc; -extern bool treesource_error; - -/* CAUTION: this will stop working if we ever use yyless() or yyunput() */ -#define YY_USER_ACTION \ - { \ - srcpos_update(&yylloc, yytext, yyleng); \ - } - -/*#define LEXDEBUG 1*/ - -#ifdef LEXDEBUG -#define DPRINT(fmt, ...) fprintf(stderr, fmt, ##__VA_ARGS__) -#else -#define DPRINT(fmt, ...) do { } while (0) -#endif - -static int dts_version = 1; - -#define BEGIN_DEFAULT() DPRINT("<V1>\n"); \ - BEGIN(V1); \ - -static void push_input_file(const char *filename); -static bool pop_input_file(void); -static void PRINTF(1, 2) lexical_error(const char *fmt, ...); - -#line 661 "dtc-lexer.lex.c" - -#define INITIAL 0 -#define BYTESTRING 1 -#define PROPNODENAME 2 -#define V1 3 - -#ifndef YY_NO_UNISTD_H -/* Special case for "unistd.h", since it is non-ANSI. We include it way - * down here because we want the user's section 1 to have been scanned first. - * The user has a chance to override it with an option. - */ -#include <unistd.h> -#endif - -#ifndef YY_EXTRA_TYPE -#define YY_EXTRA_TYPE void * -#endif - -static int yy_init_globals (void ); - -/* Accessor methods to globals. - These are made visible to non-reentrant scanners for convenience. */ - -int yylex_destroy (void ); - -int yyget_debug (void ); - -void yyset_debug (int debug_flag ); - -YY_EXTRA_TYPE yyget_extra (void ); - -void yyset_extra (YY_EXTRA_TYPE user_defined ); - -FILE *yyget_in (void ); - -void yyset_in (FILE * _in_str ); - -FILE *yyget_out (void ); - -void yyset_out (FILE * _out_str ); - - int yyget_leng (void ); - -char *yyget_text (void ); - -int yyget_lineno (void ); - -void yyset_lineno (int _line_number ); - -/* Macros after this point can all be overridden by user definitions in - * section 1. - */ - -#ifndef YY_SKIP_YYWRAP -#ifdef __cplusplus -extern "C" int yywrap (void ); -#else -extern int yywrap (void ); -#endif -#endif - -#ifndef YY_NO_UNPUT - -#endif - -#ifndef yytext_ptr -static void yy_flex_strncpy (char *,yyconst char *,int ); -#endif - -#ifdef YY_NEED_STRLEN -static int yy_flex_strlen (yyconst char * ); -#endif - -#ifndef YY_NO_INPUT - -#ifdef __cplusplus -static int yyinput (void ); -#else -static int input (void ); -#endif - -#endif - -/* Amount of stuff to slurp up with each read. */ -#ifndef YY_READ_BUF_SIZE -#ifdef __ia64__ -/* On IA-64, the buffer size is 16k, not 8k */ -#define YY_READ_BUF_SIZE 16384 -#else -#define YY_READ_BUF_SIZE 8192 -#endif /* __ia64__ */ -#endif - -/* Copy whatever the last rule matched to the standard output. */ -#ifndef ECHO -/* This used to be an fputs(), but since the string might contain NUL's, - * we now use fwrite(). - */ -#define ECHO do { if (fwrite( yytext, (size_t) yyleng, 1, yyout )) {} } while (0) -#endif - -/* Gets input and stuffs it into "buf". number of characters read, or YY_NULL, - * is returned in "result". - */ -#ifndef YY_INPUT -#define YY_INPUT(buf,result,max_size) \ - if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \ - { \ - int c = '*'; \ - size_t n; \ - for ( n = 0; n < max_size && \ - (c = getc( yyin )) != EOF && c != '\n'; ++n ) \ - buf[n] = (char) c; \ - if ( c == '\n' ) \ - buf[n++] = (char) c; \ - if ( c == EOF && ferror( yyin ) ) \ - YY_FATAL_ERROR( "input in flex scanner failed" ); \ - result = n; \ - } \ - else \ - { \ - errno=0; \ - while ( (result = (int) fread(buf, 1, max_size, yyin))==0 && ferror(yyin)) \ - { \ - if( errno != EINTR) \ - { \ - YY_FATAL_ERROR( "input in flex scanner failed" ); \ - break; \ - } \ - errno=0; \ - clearerr(yyin); \ - } \ - }\ -\ - -#endif - -/* No semi-colon after return; correct usage is to write "yyterminate();" - - * we don't want an extra ';' after the "return" because that will cause - * some compilers to complain about unreachable statements. - */ -#ifndef yyterminate -#define yyterminate() return YY_NULL -#endif - -/* Number of entries by which start-condition stack grows. */ -#ifndef YY_START_STACK_INCR -#define YY_START_STACK_INCR 25 -#endif - -/* Report a fatal error. */ -#ifndef YY_FATAL_ERROR -#define YY_FATAL_ERROR(msg) yy_fatal_error( msg ) -#endif - -/* end tables serialization structures and prototypes */ - -/* Default declaration of generated scanner - a define so the user can - * easily add parameters. - */ -#ifndef YY_DECL -#define YY_DECL_IS_OURS 1 - -extern int yylex (void); - -#define YY_DECL int yylex (void) -#endif /* !YY_DECL */ - -/* Code executed at the beginning of each rule, after yytext and yyleng - * have been set up. - */ -#ifndef YY_USER_ACTION -#define YY_USER_ACTION -#endif - -/* Code executed at the end of each rule. */ -#ifndef YY_BREAK -#define YY_BREAK /*LINTED*/break; -#endif - -#define YY_RULE_SETUP \ - if ( yyleng > 0 ) \ - YY_CURRENT_BUFFER_LVALUE->yy_at_bol = \ - (yytext[yyleng - 1] == '\n'); \ - YY_USER_ACTION - -/** The main scanner function which does all the work. - */ -YY_DECL -{ - yy_state_type yy_current_state; - char *yy_cp, *yy_bp; - int yy_act; - - if ( !(yy_init) ) - { - (yy_init) = 1; - -#ifdef YY_USER_INIT - YY_USER_INIT; -#endif - - if ( ! (yy_start) ) - (yy_start) = 1; /* first start state */ - - if ( ! yyin ) - yyin = stdin; - - if ( ! yyout ) - yyout = stdout; - - if ( ! YY_CURRENT_BUFFER ) { - yyensure_buffer_stack (); - YY_CURRENT_BUFFER_LVALUE = - yy_create_buffer(yyin,YY_BUF_SIZE ); - } - - yy_load_buffer_state( ); - } - - { -#line 69 "dtc-lexer.l" - -#line 885 "dtc-lexer.lex.c" - - while ( /*CONSTCOND*/1 ) /* loops until end-of-file is reached */ - { - yy_cp = (yy_c_buf_p); - - /* Support of yytext. */ - *yy_cp = (yy_hold_char); - - /* yy_bp points to the position in yy_ch_buf of the start of - * the current run. - */ - yy_bp = yy_cp; - - yy_current_state = (yy_start); - yy_current_state += YY_AT_BOL(); -yy_match: - do - { - YY_CHAR yy_c = yy_ec[YY_SC_TO_UI(*yy_cp)] ; - if ( yy_accept[yy_current_state] ) - { - (yy_last_accepting_state) = yy_current_state; - (yy_last_accepting_cpos) = yy_cp; - } - while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) - { - yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 166 ) - yy_c = yy_meta[(unsigned int) yy_c]; - } - yy_current_state = yy_nxt[yy_base[yy_current_state] + (flex_int16_t) yy_c]; - ++yy_cp; - } - while ( yy_current_state != 165 ); - yy_cp = (yy_last_accepting_cpos); - yy_current_state = (yy_last_accepting_state); - -yy_find_action: - yy_act = yy_accept[yy_current_state]; - - YY_DO_BEFORE_ACTION; - -do_action: /* This label is used only to access EOF actions. */ - - switch ( yy_act ) - { /* beginning of action switch */ - case 0: /* must back up */ - /* undo the effects of YY_DO_BEFORE_ACTION */ - *yy_cp = (yy_hold_char); - yy_cp = (yy_last_accepting_cpos); - yy_current_state = (yy_last_accepting_state); - goto yy_find_action; - -case 1: -/* rule 1 can match eol */ -YY_RULE_SETUP -#line 70 "dtc-lexer.l" -{ - char *name = strchr(yytext, '\"') + 1; - yytext[yyleng-1] = '\0'; - push_input_file(name); - } - YY_BREAK -case 2: -/* rule 2 can match eol */ -YY_RULE_SETUP -#line 76 "dtc-lexer.l" -{ - char *line, *fnstart, *fnend; - struct data fn; - /* skip text before line # */ - line = yytext; - while (!isdigit((unsigned char)*line)) - line++; - - /* regexp ensures that first and list " - * in the whole yytext are those at - * beginning and end of the filename string */ - fnstart = memchr(yytext, '"', yyleng); - for (fnend = yytext + yyleng - 1; - *fnend != '"'; fnend--) - ; - assert(fnstart && fnend && (fnend > fnstart)); - - fn = data_copy_escape_string(fnstart + 1, - fnend - fnstart - 1); - - /* Don't allow nuls in filenames */ - if (memchr(fn.val, '\0', fn.len - 1)) - lexical_error("nul in line number directive"); - - /* -1 since #line is the number of the next line */ - srcpos_set_line(xstrdup(fn.val), atoi(line) - 1); - data_free(fn); - } - YY_BREAK -case YY_STATE_EOF(INITIAL): -case YY_STATE_EOF(BYTESTRING): -case YY_STATE_EOF(PROPNODENAME): -case YY_STATE_EOF(V1): -#line 105 "dtc-lexer.l" -{ - if (!pop_input_file()) { - yyterminate(); - } - } - YY_BREAK -case 3: -/* rule 3 can match eol */ -YY_RULE_SETUP -#line 111 "dtc-lexer.l" -{ - DPRINT("String: %s\n", yytext); - yylval.data = data_copy_escape_string(yytext+1, - yyleng-2); - return DT_STRING; - } - YY_BREAK -case 4: -YY_RULE_SETUP -#line 118 "dtc-lexer.l" -{ - DPRINT("Keyword: /dts-v1/\n"); - dts_version = 1; - BEGIN_DEFAULT(); - return DT_V1; - } - YY_BREAK -case 5: -YY_RULE_SETUP -#line 125 "dtc-lexer.l" -{ - DPRINT("Keyword: /plugin/\n"); - return DT_PLUGIN; - } - YY_BREAK -case 6: -YY_RULE_SETUP -#line 130 "dtc-lexer.l" -{ - DPRINT("Keyword: /memreserve/\n"); - BEGIN_DEFAULT(); - return DT_MEMRESERVE; - } - YY_BREAK -case 7: -YY_RULE_SETUP -#line 136 "dtc-lexer.l" -{ - DPRINT("Keyword: /bits/\n"); - BEGIN_DEFAULT(); - return DT_BITS; - } - YY_BREAK -case 8: -YY_RULE_SETUP -#line 142 "dtc-lexer.l" -{ - DPRINT("Keyword: /delete-property/\n"); - DPRINT("<PROPNODENAME>\n"); - BEGIN(PROPNODENAME); - return DT_DEL_PROP; - } - YY_BREAK -case 9: -YY_RULE_SETUP -#line 149 "dtc-lexer.l" -{ - DPRINT("Keyword: /delete-node/\n"); - DPRINT("<PROPNODENAME>\n"); - BEGIN(PROPNODENAME); - return DT_DEL_NODE; - } - YY_BREAK -case 10: -YY_RULE_SETUP -#line 156 "dtc-lexer.l" -{ - DPRINT("Label: %s\n", yytext); - yylval.labelref = xstrdup(yytext); - yylval.labelref[yyleng-1] = '\0'; - return DT_LABEL; - } - YY_BREAK -case 11: -YY_RULE_SETUP -#line 163 "dtc-lexer.l" -{ - char *e; - DPRINT("Integer Literal: '%s'\n", yytext); - - errno = 0; - yylval.integer = strtoull(yytext, &e, 0); - - if (*e && e[strspn(e, "UL")]) { - lexical_error("Bad integer literal '%s'", - yytext); - } - - if (errno == ERANGE) - lexical_error("Integer literal '%s' out of range", - yytext); - else - /* ERANGE is the only strtoull error triggerable - * by strings matching the pattern */ - assert(errno == 0); - return DT_LITERAL; - } - YY_BREAK -case 12: -/* rule 12 can match eol */ -YY_RULE_SETUP -#line 185 "dtc-lexer.l" -{ - struct data d; - DPRINT("Character literal: %s\n", yytext); - - d = data_copy_escape_string(yytext+1, yyleng-2); - if (d.len == 1) { - lexical_error("Empty character literal"); - yylval.integer = 0; - } else { - yylval.integer = (unsigned char)d.val[0]; - - if (d.len > 2) - lexical_error("Character literal has %d" - " characters instead of 1", - d.len - 1); - } - - data_free(d); - return DT_CHAR_LITERAL; - } - YY_BREAK -case 13: -YY_RULE_SETUP -#line 206 "dtc-lexer.l" -{ /* label reference */ - DPRINT("Ref: %s\n", yytext+1); - yylval.labelref = xstrdup(yytext+1); - return DT_REF; - } - YY_BREAK -case 14: -YY_RULE_SETUP -#line 212 "dtc-lexer.l" -{ /* new-style path reference */ - yytext[yyleng-1] = '\0'; - DPRINT("Ref: %s\n", yytext+2); - yylval.labelref = xstrdup(yytext+2); - return DT_REF; - } - YY_BREAK -case 15: -YY_RULE_SETUP -#line 219 "dtc-lexer.l" -{ - yylval.byte = strtol(yytext, NULL, 16); - DPRINT("Byte: %02x\n", (int)yylval.byte); - return DT_BYTE; - } - YY_BREAK -case 16: -YY_RULE_SETUP -#line 225 "dtc-lexer.l" -{ - DPRINT("/BYTESTRING\n"); - BEGIN_DEFAULT(); - return ']'; - } - YY_BREAK -case 17: -YY_RULE_SETUP -#line 231 "dtc-lexer.l" -{ - DPRINT("PropNodeName: %s\n", yytext); - yylval.propnodename = xstrdup((yytext[0] == '\\') ? - yytext + 1 : yytext); - BEGIN_DEFAULT(); - return DT_PROPNODENAME; - } - YY_BREAK -case 18: -YY_RULE_SETUP -#line 239 "dtc-lexer.l" -{ - DPRINT("Binary Include\n"); - return DT_INCBIN; - } - YY_BREAK -case 19: -/* rule 19 can match eol */ -YY_RULE_SETUP -#line 244 "dtc-lexer.l" -/* eat whitespace */ - YY_BREAK -case 20: -/* rule 20 can match eol */ -YY_RULE_SETUP -#line 245 "dtc-lexer.l" -/* eat C-style comments */ - YY_BREAK -case 21: -/* rule 21 can match eol */ -YY_RULE_SETUP -#line 246 "dtc-lexer.l" -/* eat C++-style comments */ - YY_BREAK -case 22: -YY_RULE_SETUP -#line 248 "dtc-lexer.l" -{ return DT_LSHIFT; }; - YY_BREAK -case 23: -YY_RULE_SETUP -#line 249 "dtc-lexer.l" -{ return DT_RSHIFT; }; - YY_BREAK -case 24: -YY_RULE_SETUP -#line 250 "dtc-lexer.l" -{ return DT_LE; }; - YY_BREAK -case 25: -YY_RULE_SETUP -#line 251 "dtc-lexer.l" -{ return DT_GE; }; - YY_BREAK -case 26: -YY_RULE_SETUP -#line 252 "dtc-lexer.l" -{ return DT_EQ; }; - YY_BREAK -case 27: -YY_RULE_SETUP -#line 253 "dtc-lexer.l" -{ return DT_NE; }; - YY_BREAK -case 28: -YY_RULE_SETUP -#line 254 "dtc-lexer.l" -{ return DT_AND; }; - YY_BREAK -case 29: -YY_RULE_SETUP -#line 255 "dtc-lexer.l" -{ return DT_OR; }; - YY_BREAK -case 30: -YY_RULE_SETUP -#line 257 "dtc-lexer.l" -{ - DPRINT("Char: %c (\\x%02x)\n", yytext[0], - (unsigned)yytext[0]); - if (yytext[0] == '[') { - DPRINT("<BYTESTRING>\n"); - BEGIN(BYTESTRING); - } - if ((yytext[0] == '{') - || (yytext[0] == ';')) { - DPRINT("<PROPNODENAME>\n"); - BEGIN(PROPNODENAME); - } - return yytext[0]; - } - YY_BREAK -case 31: -YY_RULE_SETUP -#line 272 "dtc-lexer.l" -ECHO; - YY_BREAK -#line 1257 "dtc-lexer.lex.c" - - case YY_END_OF_BUFFER: - { - /* Amount of text matched not including the EOB char. */ - int yy_amount_of_matched_text = (int) (yy_cp - (yytext_ptr)) - 1; - - /* Undo the effects of YY_DO_BEFORE_ACTION. */ - *yy_cp = (yy_hold_char); - YY_RESTORE_YY_MORE_OFFSET - - if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_NEW ) - { - /* We're scanning a new file or input source. It's - * possible that this happened because the user - * just pointed yyin at a new source and called - * yylex(). If so, then we have to assure - * consistency between YY_CURRENT_BUFFER and our - * globals. Here is the right place to do so, because - * this is the first action (other than possibly a - * back-up) that will match for the new input source. - */ - (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; - YY_CURRENT_BUFFER_LVALUE->yy_input_file = yyin; - YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = YY_BUFFER_NORMAL; - } - - /* Note that here we test for yy_c_buf_p "<=" to the position - * of the first EOB in the buffer, since yy_c_buf_p will - * already have been incremented past the NUL character - * (since all states make transitions on EOB to the - * end-of-buffer state). Contrast this with the test - * in input(). - */ - if ( (yy_c_buf_p) <= &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) - { /* This was really a NUL. */ - yy_state_type yy_next_state; - - (yy_c_buf_p) = (yytext_ptr) + yy_amount_of_matched_text; - - yy_current_state = yy_get_previous_state( ); - - /* Okay, we're now positioned to make the NUL - * transition. We couldn't have - * yy_get_previous_state() go ahead and do it - * for us because it doesn't know how to deal - * with the possibility of jamming (and we don't - * want to build jamming into it because then it - * will run more slowly). - */ - - yy_next_state = yy_try_NUL_trans( yy_current_state ); - - yy_bp = (yytext_ptr) + YY_MORE_ADJ; - - if ( yy_next_state ) - { - /* Consume the NUL. */ - yy_cp = ++(yy_c_buf_p); - yy_current_state = yy_next_state; - goto yy_match; - } - - else - { - yy_cp = (yy_last_accepting_cpos); - yy_current_state = (yy_last_accepting_state); - goto yy_find_action; - } - } - - else switch ( yy_get_next_buffer( ) ) - { - case EOB_ACT_END_OF_FILE: - { - (yy_did_buffer_switch_on_eof) = 0; - - if ( yywrap( ) ) - { - /* Note: because we've taken care in - * yy_get_next_buffer() to have set up - * yytext, we can now set up - * yy_c_buf_p so that if some total - * hoser (like flex itself) wants to - * call the scanner after we return the - * YY_NULL, it'll still work - another - * YY_NULL will get returned. - */ - (yy_c_buf_p) = (yytext_ptr) + YY_MORE_ADJ; - - yy_act = YY_STATE_EOF(YY_START); - goto do_action; - } - - else - { - if ( ! (yy_did_buffer_switch_on_eof) ) - YY_NEW_FILE; - } - break; - } - - case EOB_ACT_CONTINUE_SCAN: - (yy_c_buf_p) = - (yytext_ptr) + yy_amount_of_matched_text; - - yy_current_state = yy_get_previous_state( ); - - yy_cp = (yy_c_buf_p); - yy_bp = (yytext_ptr) + YY_MORE_ADJ; - goto yy_match; - - case EOB_ACT_LAST_MATCH: - (yy_c_buf_p) = - &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)]; - - yy_current_state = yy_get_previous_state( ); - - yy_cp = (yy_c_buf_p); - yy_bp = (yytext_ptr) + YY_MORE_ADJ; - goto yy_find_action; - } - break; - } - - default: - YY_FATAL_ERROR( - "fatal flex scanner internal error--no action found" ); - } /* end of action switch */ - } /* end of scanning one token */ - } /* end of user's declarations */ -} /* end of yylex */ - -/* yy_get_next_buffer - try to read in a new buffer - * - * Returns a code representing an action: - * EOB_ACT_LAST_MATCH - - * EOB_ACT_CONTINUE_SCAN - continue scanning from current position - * EOB_ACT_END_OF_FILE - end of file - */ -static int yy_get_next_buffer (void) -{ - char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf; - char *source = (yytext_ptr); - int number_to_move, i; - int ret_val; - - if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] ) - YY_FATAL_ERROR( - "fatal flex scanner internal error--end of buffer missed" ); - - if ( YY_CURRENT_BUFFER_LVALUE->yy_fill_buffer == 0 ) - { /* Don't try to fill the buffer, so this is an EOF. */ - if ( (yy_c_buf_p) - (yytext_ptr) - YY_MORE_ADJ == 1 ) - { - /* We matched a single character, the EOB, so - * treat this as a final EOF. - */ - return EOB_ACT_END_OF_FILE; - } - - else - { - /* We matched some text prior to the EOB, first - * process it. - */ - return EOB_ACT_LAST_MATCH; - } - } - - /* Try to read more data. */ - - /* First move last chars to start of buffer. */ - number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr) - 1); - - for ( i = 0; i < number_to_move; ++i ) - *(dest++) = *(source++); - - if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_EOF_PENDING ) - /* don't do the read, it's not guaranteed to return an EOF, - * just force an EOF - */ - YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars) = 0; - - else - { - int num_to_read = - YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1; - - while ( num_to_read <= 0 ) - { /* Not enough room in the buffer - grow it. */ - - /* just a shorter name for the current buffer */ - YY_BUFFER_STATE b = YY_CURRENT_BUFFER_LVALUE; - - int yy_c_buf_p_offset = - (int) ((yy_c_buf_p) - b->yy_ch_buf); - - if ( b->yy_is_our_buffer ) - { - int new_size = b->yy_buf_size * 2; - - if ( new_size <= 0 ) - b->yy_buf_size += b->yy_buf_size / 8; - else - b->yy_buf_size *= 2; - - b->yy_ch_buf = (char *) - /* Include room in for 2 EOB chars. */ - yyrealloc((void *) b->yy_ch_buf,b->yy_buf_size + 2 ); - } - else - /* Can't grow it, we don't own it. */ - b->yy_ch_buf = NULL; - - if ( ! b->yy_ch_buf ) - YY_FATAL_ERROR( - "fatal error - scanner input buffer overflow" ); - - (yy_c_buf_p) = &b->yy_ch_buf[yy_c_buf_p_offset]; - - num_to_read = YY_CURRENT_BUFFER_LVALUE->yy_buf_size - - number_to_move - 1; - - } - - if ( num_to_read > YY_READ_BUF_SIZE ) - num_to_read = YY_READ_BUF_SIZE; - - /* Read in more data. */ - YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]), - (yy_n_chars), num_to_read ); - - YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); - } - - if ( (yy_n_chars) == 0 ) - { - if ( number_to_move == YY_MORE_ADJ ) - { - ret_val = EOB_ACT_END_OF_FILE; - yyrestart(yyin ); - } - - else - { - ret_val = EOB_ACT_LAST_MATCH; - YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = - YY_BUFFER_EOF_PENDING; - } - } - - else - ret_val = EOB_ACT_CONTINUE_SCAN; - - if (((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) { - /* Extend the array by 50%, plus the number we really need. */ - int new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1); - YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) yyrealloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size ); - if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf ) - YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" ); - } - - (yy_n_chars) += number_to_move; - YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] = YY_END_OF_BUFFER_CHAR; - YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] = YY_END_OF_BUFFER_CHAR; - - (yytext_ptr) = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[0]; - - return ret_val; -} - -/* yy_get_previous_state - get the state just before the EOB char was reached */ - - static yy_state_type yy_get_previous_state (void) -{ - yy_state_type yy_current_state; - char *yy_cp; - - yy_current_state = (yy_start); - yy_current_state += YY_AT_BOL(); - - for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp ) - { - YY_CHAR yy_c = (*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1); - if ( yy_accept[yy_current_state] ) - { - (yy_last_accepting_state) = yy_current_state; - (yy_last_accepting_cpos) = yy_cp; - } - while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) - { - yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 166 ) - yy_c = yy_meta[(unsigned int) yy_c]; - } - yy_current_state = yy_nxt[yy_base[yy_current_state] + (flex_int16_t) yy_c]; - } - - return yy_current_state; -} - -/* yy_try_NUL_trans - try to make a transition on the NUL character - * - * synopsis - * next_state = yy_try_NUL_trans( current_state ); - */ - static yy_state_type yy_try_NUL_trans (yy_state_type yy_current_state ) -{ - int yy_is_jam; - char *yy_cp = (yy_c_buf_p); - - YY_CHAR yy_c = 1; - if ( yy_accept[yy_current_state] ) - { - (yy_last_accepting_state) = yy_current_state; - (yy_last_accepting_cpos) = yy_cp; - } - while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) - { - yy_current_state = (int) yy_def[yy_current_state]; - if ( yy_current_state >= 166 ) - yy_c = yy_meta[(unsigned int) yy_c]; - } - yy_current_state = yy_nxt[yy_base[yy_current_state] + (flex_int16_t) yy_c]; - yy_is_jam = (yy_current_state == 165); - - return yy_is_jam ? 0 : yy_current_state; -} - -#ifndef YY_NO_UNPUT - -#endif - -#ifndef YY_NO_INPUT -#ifdef __cplusplus - static int yyinput (void) -#else - static int input (void) -#endif - -{ - int c; - - *(yy_c_buf_p) = (yy_hold_char); - - if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR ) - { - /* yy_c_buf_p now points to the character we want to return. - * If this occurs *before* the EOB characters, then it's a - * valid NUL; if not, then we've hit the end of the buffer. - */ - if ( (yy_c_buf_p) < &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) - /* This was really a NUL. */ - *(yy_c_buf_p) = '\0'; - - else - { /* need more input */ - int offset = (yy_c_buf_p) - (yytext_ptr); - ++(yy_c_buf_p); - - switch ( yy_get_next_buffer( ) ) - { - case EOB_ACT_LAST_MATCH: - /* This happens because yy_g_n_b() - * sees that we've accumulated a - * token and flags that we need to - * try matching the token before - * proceeding. But for input(), - * there's no matching to consider. - * So convert the EOB_ACT_LAST_MATCH - * to EOB_ACT_END_OF_FILE. - */ - - /* Reset buffer status. */ - yyrestart(yyin ); - - /*FALLTHROUGH*/ - - case EOB_ACT_END_OF_FILE: - { - if ( yywrap( ) ) - return 0; - - if ( ! (yy_did_buffer_switch_on_eof) ) - YY_NEW_FILE; -#ifdef __cplusplus - return yyinput(); -#else - return input(); -#endif - } - - case EOB_ACT_CONTINUE_SCAN: - (yy_c_buf_p) = (yytext_ptr) + offset; - break; - } - } - } - - c = *(unsigned char *) (yy_c_buf_p); /* cast for 8-bit char's */ - *(yy_c_buf_p) = '\0'; /* preserve yytext */ - (yy_hold_char) = *++(yy_c_buf_p); - - YY_CURRENT_BUFFER_LVALUE->yy_at_bol = (c == '\n'); - - return c; -} -#endif /* ifndef YY_NO_INPUT */ - -/** Immediately switch to a different input stream. - * @param input_file A readable stream. - * - * @note This function does not reset the start condition to @c INITIAL . - */ - void yyrestart (FILE * input_file ) -{ - - if ( ! YY_CURRENT_BUFFER ){ - yyensure_buffer_stack (); - YY_CURRENT_BUFFER_LVALUE = - yy_create_buffer(yyin,YY_BUF_SIZE ); - } - - yy_init_buffer(YY_CURRENT_BUFFER,input_file ); - yy_load_buffer_state( ); -} - -/** Switch to a different input buffer. - * @param new_buffer The new input buffer. - * - */ - void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer ) -{ - - /* TODO. We should be able to replace this entire function body - * with - * yypop_buffer_state(); - * yypush_buffer_state(new_buffer); - */ - yyensure_buffer_stack (); - if ( YY_CURRENT_BUFFER == new_buffer ) - return; - - if ( YY_CURRENT_BUFFER ) - { - /* Flush out information for old buffer. */ - *(yy_c_buf_p) = (yy_hold_char); - YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); - YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); - } - - YY_CURRENT_BUFFER_LVALUE = new_buffer; - yy_load_buffer_state( ); - - /* We don't actually know whether we did this switch during - * EOF (yywrap()) processing, but the only time this flag - * is looked at is after yywrap() is called, so it's safe - * to go ahead and always set it. - */ - (yy_did_buffer_switch_on_eof) = 1; -} - -static void yy_load_buffer_state (void) -{ - (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; - (yytext_ptr) = (yy_c_buf_p) = YY_CURRENT_BUFFER_LVALUE->yy_buf_pos; - yyin = YY_CURRENT_BUFFER_LVALUE->yy_input_file; - (yy_hold_char) = *(yy_c_buf_p); -} - -/** Allocate and initialize an input buffer state. - * @param file A readable stream. - * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE. - * - * @return the allocated buffer state. - */ - YY_BUFFER_STATE yy_create_buffer (FILE * file, int size ) -{ - YY_BUFFER_STATE b; - - b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) ); - if ( ! b ) - YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" ); - - b->yy_buf_size = (yy_size_t)size; - - /* yy_ch_buf has to be 2 characters longer than the size given because - * we need to put in 2 end-of-buffer characters. - */ - b->yy_ch_buf = (char *) yyalloc(b->yy_buf_size + 2 ); - if ( ! b->yy_ch_buf ) - YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" ); - - b->yy_is_our_buffer = 1; - - yy_init_buffer(b,file ); - - return b; -} - -/** Destroy the buffer. - * @param b a buffer created with yy_create_buffer() - * - */ - void yy_delete_buffer (YY_BUFFER_STATE b ) -{ - - if ( ! b ) - return; - - if ( b == YY_CURRENT_BUFFER ) /* Not sure if we should pop here. */ - YY_CURRENT_BUFFER_LVALUE = (YY_BUFFER_STATE) 0; - - if ( b->yy_is_our_buffer ) - yyfree((void *) b->yy_ch_buf ); - - yyfree((void *) b ); -} - -/* Initializes or reinitializes a buffer. - * This function is sometimes called more than once on the same buffer, - * such as during a yyrestart() or at EOF. - */ - static void yy_init_buffer (YY_BUFFER_STATE b, FILE * file ) - -{ - int oerrno = errno; - - yy_flush_buffer(b ); - - b->yy_input_file = file; - b->yy_fill_buffer = 1; - - /* If b is the current buffer, then yy_init_buffer was _probably_ - * called from yyrestart() or through yy_get_next_buffer. - * In that case, we don't want to reset the lineno or column. - */ - if (b != YY_CURRENT_BUFFER){ - b->yy_bs_lineno = 1; - b->yy_bs_column = 0; - } - - b->yy_is_interactive = 0; - - errno = oerrno; -} - -/** Discard all buffered characters. On the next scan, YY_INPUT will be called. - * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER. - * - */ - void yy_flush_buffer (YY_BUFFER_STATE b ) -{ - if ( ! b ) - return; - - b->yy_n_chars = 0; - - /* We always need two end-of-buffer characters. The first causes - * a transition to the end-of-buffer state. The second causes - * a jam in that state. - */ - b->yy_ch_buf[0] = YY_END_OF_BUFFER_CHAR; - b->yy_ch_buf[1] = YY_END_OF_BUFFER_CHAR; - - b->yy_buf_pos = &b->yy_ch_buf[0]; - - b->yy_at_bol = 1; - b->yy_buffer_status = YY_BUFFER_NEW; - - if ( b == YY_CURRENT_BUFFER ) - yy_load_buffer_state( ); -} - -/** Pushes the new state onto the stack. The new state becomes - * the current state. This function will allocate the stack - * if necessary. - * @param new_buffer The new state. - * - */ -void yypush_buffer_state (YY_BUFFER_STATE new_buffer ) -{ - if (new_buffer == NULL) - return; - - yyensure_buffer_stack(); - - /* This block is copied from yy_switch_to_buffer. */ - if ( YY_CURRENT_BUFFER ) - { - /* Flush out information for old buffer. */ - *(yy_c_buf_p) = (yy_hold_char); - YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); - YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); - } - - /* Only push if top exists. Otherwise, replace top. */ - if (YY_CURRENT_BUFFER) - (yy_buffer_stack_top)++; - YY_CURRENT_BUFFER_LVALUE = new_buffer; - - /* copied from yy_switch_to_buffer. */ - yy_load_buffer_state( ); - (yy_did_buffer_switch_on_eof) = 1; -} - -/** Removes and deletes the top of the stack, if present. - * The next element becomes the new top. - * - */ -void yypop_buffer_state (void) -{ - if (!YY_CURRENT_BUFFER) - return; - - yy_delete_buffer(YY_CURRENT_BUFFER ); - YY_CURRENT_BUFFER_LVALUE = NULL; - if ((yy_buffer_stack_top) > 0) - --(yy_buffer_stack_top); - - if (YY_CURRENT_BUFFER) { - yy_load_buffer_state( ); - (yy_did_buffer_switch_on_eof) = 1; - } -} - -/* Allocates the stack if it does not exist. - * Guarantees space for at least one push. - */ -static void yyensure_buffer_stack (void) -{ - int num_to_alloc; - - if (!(yy_buffer_stack)) { - - /* First allocation is just for 2 elements, since we don't know if this - * scanner will even need a stack. We use 2 instead of 1 to avoid an - * immediate realloc on the next call. - */ - num_to_alloc = 1; /* After all that talk, this was set to 1 anyways... */ - (yy_buffer_stack) = (struct yy_buffer_state**)yyalloc - (num_to_alloc * sizeof(struct yy_buffer_state*) - ); - if ( ! (yy_buffer_stack) ) - YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" ); - - memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*)); - - (yy_buffer_stack_max) = num_to_alloc; - (yy_buffer_stack_top) = 0; - return; - } - - if ((yy_buffer_stack_top) >= ((yy_buffer_stack_max)) - 1){ - - /* Increase the buffer to prepare for a possible push. */ - yy_size_t grow_size = 8 /* arbitrary grow size */; - - num_to_alloc = (yy_buffer_stack_max) + grow_size; - (yy_buffer_stack) = (struct yy_buffer_state**)yyrealloc - ((yy_buffer_stack), - num_to_alloc * sizeof(struct yy_buffer_state*) - ); - if ( ! (yy_buffer_stack) ) - YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" ); - - /* zero only the new slots.*/ - memset((yy_buffer_stack) + (yy_buffer_stack_max), 0, grow_size * sizeof(struct yy_buffer_state*)); - (yy_buffer_stack_max) = num_to_alloc; - } -} - -/** Setup the input buffer state to scan directly from a user-specified character buffer. - * @param base the character buffer - * @param size the size in bytes of the character buffer - * - * @return the newly allocated buffer state object. - */ -YY_BUFFER_STATE yy_scan_buffer (char * base, yy_size_t size ) -{ - YY_BUFFER_STATE b; - - if ( size < 2 || - base[size-2] != YY_END_OF_BUFFER_CHAR || - base[size-1] != YY_END_OF_BUFFER_CHAR ) - /* They forgot to leave room for the EOB's. */ - return NULL; - - b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) ); - if ( ! b ) - YY_FATAL_ERROR( "out of dynamic memory in yy_scan_buffer()" ); - - b->yy_buf_size = size - 2; /* "- 2" to take care of EOB's */ - b->yy_buf_pos = b->yy_ch_buf = base; - b->yy_is_our_buffer = 0; - b->yy_input_file = NULL; - b->yy_n_chars = b->yy_buf_size; - b->yy_is_interactive = 0; - b->yy_at_bol = 1; - b->yy_fill_buffer = 0; - b->yy_buffer_status = YY_BUFFER_NEW; - - yy_switch_to_buffer(b ); - - return b; -} - -/** Setup the input buffer state to scan a string. The next call to yylex() will - * scan from a @e copy of @a str. - * @param yystr a NUL-terminated string to scan - * - * @return the newly allocated buffer state object. - * @note If you want to scan bytes that may contain NUL values, then use - * yy_scan_bytes() instead. - */ -YY_BUFFER_STATE yy_scan_string (yyconst char * yystr ) -{ - - return yy_scan_bytes(yystr,(int) strlen(yystr) ); -} - -/** Setup the input buffer state to scan the given bytes. The next call to yylex() will - * scan from a @e copy of @a bytes. - * @param yybytes the byte buffer to scan - * @param _yybytes_len the number of bytes in the buffer pointed to by @a bytes. - * - * @return the newly allocated buffer state object. - */ -YY_BUFFER_STATE yy_scan_bytes (yyconst char * yybytes, int _yybytes_len ) -{ - YY_BUFFER_STATE b; - char *buf; - yy_size_t n; - int i; - - /* Get memory for full buffer, including space for trailing EOB's. */ - n = (yy_size_t) (_yybytes_len + 2); - buf = (char *) yyalloc(n ); - if ( ! buf ) - YY_FATAL_ERROR( "out of dynamic memory in yy_scan_bytes()" ); - - for ( i = 0; i < _yybytes_len; ++i ) - buf[i] = yybytes[i]; - - buf[_yybytes_len] = buf[_yybytes_len+1] = YY_END_OF_BUFFER_CHAR; - - b = yy_scan_buffer(buf,n ); - if ( ! b ) - YY_FATAL_ERROR( "bad buffer in yy_scan_bytes()" ); - - /* It's okay to grow etc. this buffer, and we should throw it - * away when we're done. - */ - b->yy_is_our_buffer = 1; - - return b; -} - -#ifndef YY_EXIT_FAILURE -#define YY_EXIT_FAILURE 2 -#endif - -static void yynoreturn yy_fatal_error (yyconst char* msg ) -{ - (void) fprintf( stderr, "%s\n", msg ); - exit( YY_EXIT_FAILURE ); -} - -/* Redefine yyless() so it works in section 3 code. */ - -#undef yyless -#define yyless(n) \ - do \ - { \ - /* Undo effects of setting up yytext. */ \ - int yyless_macro_arg = (n); \ - YY_LESS_LINENO(yyless_macro_arg);\ - yytext[yyleng] = (yy_hold_char); \ - (yy_c_buf_p) = yytext + yyless_macro_arg; \ - (yy_hold_char) = *(yy_c_buf_p); \ - *(yy_c_buf_p) = '\0'; \ - yyleng = yyless_macro_arg; \ - } \ - while ( 0 ) - -/* Accessor methods (get/set functions) to struct members. */ - -/** Get the current line number. - * - */ -int yyget_lineno (void) -{ - - return yylineno; -} - -/** Get the input stream. - * - */ -FILE *yyget_in (void) -{ - return yyin; -} - -/** Get the output stream. - * - */ -FILE *yyget_out (void) -{ - return yyout; -} - -/** Get the length of the current token. - * - */ -int yyget_leng (void) -{ - return yyleng; -} - -/** Get the current token. - * - */ - -char *yyget_text (void) -{ - return yytext; -} - -/** Set the current line number. - * @param _line_number line number - * - */ -void yyset_lineno (int _line_number ) -{ - - yylineno = _line_number; -} - -/** Set the input stream. This does not discard the current - * input buffer. - * @param _in_str A readable stream. - * - * @see yy_switch_to_buffer - */ -void yyset_in (FILE * _in_str ) -{ - yyin = _in_str ; -} - -void yyset_out (FILE * _out_str ) -{ - yyout = _out_str ; -} - -int yyget_debug (void) -{ - return yy_flex_debug; -} - -void yyset_debug (int _bdebug ) -{ - yy_flex_debug = _bdebug ; -} - -static int yy_init_globals (void) -{ - /* Initialization is the same as for the non-reentrant scanner. - * This function is called from yylex_destroy(), so don't allocate here. - */ - - (yy_buffer_stack) = NULL; - (yy_buffer_stack_top) = 0; - (yy_buffer_stack_max) = 0; - (yy_c_buf_p) = NULL; - (yy_init) = 0; - (yy_start) = 0; - -/* Defined in main.c */ -#ifdef YY_STDINIT - yyin = stdin; - yyout = stdout; -#else - yyin = NULL; - yyout = NULL; -#endif - - /* For future reference: Set errno on error, since we are called by - * yylex_init() - */ - return 0; -} - -/* yylex_destroy is for both reentrant and non-reentrant scanners. */ -int yylex_destroy (void) -{ - - /* Pop the buffer stack, destroying each element. */ - while(YY_CURRENT_BUFFER){ - yy_delete_buffer(YY_CURRENT_BUFFER ); - YY_CURRENT_BUFFER_LVALUE = NULL; - yypop_buffer_state(); - } - - /* Destroy the stack itself. */ - yyfree((yy_buffer_stack) ); - (yy_buffer_stack) = NULL; - - /* Reset the globals. This is important in a non-reentrant scanner so the next time - * yylex() is called, initialization will occur. */ - yy_init_globals( ); - - return 0; -} - -/* - * Internal utility routines. - */ - -#ifndef yytext_ptr -static void yy_flex_strncpy (char* s1, yyconst char * s2, int n ) -{ - - int i; - for ( i = 0; i < n; ++i ) - s1[i] = s2[i]; -} -#endif - -#ifdef YY_NEED_STRLEN -static int yy_flex_strlen (yyconst char * s ) -{ - int n; - for ( n = 0; s[n]; ++n ) - ; - - return n; -} -#endif - -void *yyalloc (yy_size_t size ) -{ - return malloc(size); -} - -void *yyrealloc (void * ptr, yy_size_t size ) -{ - - /* The cast to (char *) in the following accommodates both - * implementations that use char* generic pointers, and those - * that use void* generic pointers. It works with the latter - * because both ANSI C and C++ allow castless assignment from - * any pointer type to void*, and deal with argument conversions - * as though doing an assignment. - */ - return realloc(ptr, size); -} - -void yyfree (void * ptr ) -{ - free( (char *) ptr ); /* see yyrealloc() for (char *) cast */ -} - -#define YYTABLES_NAME "yytables" - -#line 272 "dtc-lexer.l" - - - -static void push_input_file(const char *filename) -{ - assert(filename); - - srcfile_push(filename); - - yyin = current_srcfile->f; - - yypush_buffer_state(yy_create_buffer(yyin,YY_BUF_SIZE)); -} - - -static bool pop_input_file(void) -{ - if (srcfile_pop() == 0) - return false; - - yypop_buffer_state(); - yyin = current_srcfile->f; - - return true; -} - -static void lexical_error(const char *fmt, ...) -{ - va_list ap; - - va_start(ap, fmt); - srcpos_verror(&yylloc, "Lexical error", fmt, ap); - va_end(ap); - - treesource_error = true; -} - diff --git a/scripts/dtc/dtc-parser.tab.c_shipped b/scripts/dtc/dtc-parser.tab.c_shipped deleted file mode 100644 index aea514fa692..00000000000 --- a/scripts/dtc/dtc-parser.tab.c_shipped +++ /dev/null @@ -1,2321 +0,0 @@ -/* A Bison parser, made by GNU Bison 3.0.4. */ - -/* Bison implementation for Yacc-like parsers in C - - Copyright (C) 1984, 1989-1990, 2000-2015 Free Software Foundation, Inc. - - This program is free software: you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation, either version 3 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see <http://www.gnu.org/licenses/>. */ - -/* As a special exception, you may create a larger work that contains - part or all of the Bison parser skeleton and distribute that work - under terms of your choice, so long as that work isn't itself a - parser generator using the skeleton or a modified version thereof - as a parser skeleton. Alternatively, if you modify or redistribute - the parser skeleton itself, you may (at your option) remove this - special exception, which will cause the skeleton and the resulting - Bison output files to be licensed under the GNU General Public - License without this special exception. - - This special exception was added by the Free Software Foundation in - version 2.2 of Bison. */ - -/* C LALR(1) parser skeleton written by Richard Stallman, by - simplifying the original so-called "semantic" parser. */ - -/* All symbols defined below should begin with yy or YY, to avoid - infringing on user name space. This should be done even for local - variables, as they might otherwise be expanded by user macros. - There are some unavoidable exceptions within include files to - define necessary library symbols; they are noted "INFRINGES ON - USER NAME SPACE" below. */ - -/* Identify Bison output. */ -#define YYBISON 1 - -/* Bison version. */ -#define YYBISON_VERSION "3.0.4" - -/* Skeleton name. */ -#define YYSKELETON_NAME "yacc.c" - -/* Pure parsers. */ -#define YYPURE 0 - -/* Push parsers. */ -#define YYPUSH 0 - -/* Pull parsers. */ -#define YYPULL 1 - - - - -/* Copy the first part of user declarations. */ -#line 20 "dtc-parser.y" /* yacc.c:339 */ - -#include <stdio.h> -#include <inttypes.h> - -#include "dtc.h" -#include "srcpos.h" - -extern int yylex(void); -extern void yyerror(char const *s); -#define ERROR(loc, ...) \ - do { \ - srcpos_error((loc), "Error", __VA_ARGS__); \ - treesource_error = true; \ - } while (0) - -extern struct dt_info *parser_output; -extern bool treesource_error; - -#line 85 "dtc-parser.tab.c" /* yacc.c:339 */ - -# ifndef YY_NULLPTR -# if defined __cplusplus && 201103L <= __cplusplus -# define YY_NULLPTR nullptr -# else -# define YY_NULLPTR 0 -# endif -# endif - -/* Enabling verbose error messages. */ -#ifdef YYERROR_VERBOSE -# undef YYERROR_VERBOSE -# define YYERROR_VERBOSE 1 -#else -# define YYERROR_VERBOSE 0 -#endif - -/* In a future release of Bison, this section will be replaced - by #include "dtc-parser.tab.h". */ -#ifndef YY_YY_DTC_PARSER_TAB_H_INCLUDED -# define YY_YY_DTC_PARSER_TAB_H_INCLUDED -/* Debug traces. */ -#ifndef YYDEBUG -# define YYDEBUG 0 -#endif -#if YYDEBUG -extern int yydebug; -#endif - -/* Token type. */ -#ifndef YYTOKENTYPE -# define YYTOKENTYPE - enum yytokentype - { - DT_V1 = 258, - DT_PLUGIN = 259, - DT_MEMRESERVE = 260, - DT_LSHIFT = 261, - DT_RSHIFT = 262, - DT_LE = 263, - DT_GE = 264, - DT_EQ = 265, - DT_NE = 266, - DT_AND = 267, - DT_OR = 268, - DT_BITS = 269, - DT_DEL_PROP = 270, - DT_DEL_NODE = 271, - DT_PROPNODENAME = 272, - DT_LITERAL = 273, - DT_CHAR_LITERAL = 274, - DT_BYTE = 275, - DT_STRING = 276, - DT_LABEL = 277, - DT_REF = 278, - DT_INCBIN = 279 - }; -#endif - -/* Value type. */ -#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED - -union YYSTYPE -{ -#line 39 "dtc-parser.y" /* yacc.c:355 */ - - char *propnodename; - char *labelref; - uint8_t byte; - struct data data; - - struct { - struct data data; - int bits; - } array; - - struct property *prop; - struct property *proplist; - struct node *node; - struct node *nodelist; - struct reserve_info *re; - uint64_t integer; - unsigned int flags; - -#line 170 "dtc-parser.tab.c" /* yacc.c:355 */ -}; - -typedef union YYSTYPE YYSTYPE; -# define YYSTYPE_IS_TRIVIAL 1 -# define YYSTYPE_IS_DECLARED 1 -#endif - -/* Location type. */ -#if ! defined YYLTYPE && ! defined YYLTYPE_IS_DECLARED -typedef struct YYLTYPE YYLTYPE; -struct YYLTYPE -{ - int first_line; - int first_column; - int last_line; - int last_column; -}; -# define YYLTYPE_IS_DECLARED 1 -# define YYLTYPE_IS_TRIVIAL 1 -#endif - - -extern YYSTYPE yylval; -extern YYLTYPE yylloc; -int yyparse (void); - -#endif /* !YY_YY_DTC_PARSER_TAB_H_INCLUDED */ - -/* Copy the second part of user declarations. */ - -#line 201 "dtc-parser.tab.c" /* yacc.c:358 */ - -#ifdef short -# undef short -#endif - -#ifdef YYTYPE_UINT8 -typedef YYTYPE_UINT8 yytype_uint8; -#else -typedef unsigned char yytype_uint8; -#endif - -#ifdef YYTYPE_INT8 -typedef YYTYPE_INT8 yytype_int8; -#else -typedef signed char yytype_int8; -#endif - -#ifdef YYTYPE_UINT16 -typedef YYTYPE_UINT16 yytype_uint16; -#else -typedef unsigned short int yytype_uint16; -#endif - -#ifdef YYTYPE_INT16 -typedef YYTYPE_INT16 yytype_int16; -#else -typedef short int yytype_int16; -#endif - -#ifndef YYSIZE_T -# ifdef __SIZE_TYPE__ -# define YYSIZE_T __SIZE_TYPE__ -# elif defined size_t -# define YYSIZE_T size_t -# elif ! defined YYSIZE_T -# include <stddef.h> /* INFRINGES ON USER NAME SPACE */ -# define YYSIZE_T size_t -# else -# define YYSIZE_T unsigned int -# endif -#endif - -#define YYSIZE_MAXIMUM ((YYSIZE_T) -1) - -#ifndef YY_ -# if defined YYENABLE_NLS && YYENABLE_NLS -# if ENABLE_NLS -# include <libintl.h> /* INFRINGES ON USER NAME SPACE */ -# define YY_(Msgid) dgettext ("bison-runtime", Msgid) -# endif -# endif -# ifndef YY_ -# define YY_(Msgid) Msgid -# endif -#endif - -#ifndef YY_ATTRIBUTE -# if (defined __GNUC__ \ - && (2 < __GNUC__ || (__GNUC__ == 2 && 96 <= __GNUC_MINOR__))) \ - || defined __SUNPRO_C && 0x5110 <= __SUNPRO_C -# define YY_ATTRIBUTE(Spec) __attribute__(Spec) -# else -# define YY_ATTRIBUTE(Spec) /* empty */ -# endif -#endif - -#ifndef YY_ATTRIBUTE_PURE -# define YY_ATTRIBUTE_PURE YY_ATTRIBUTE ((__pure__)) -#endif - -#ifndef YY_ATTRIBUTE_UNUSED -# define YY_ATTRIBUTE_UNUSED YY_ATTRIBUTE ((__unused__)) -#endif - -#if !defined _Noreturn \ - && (!defined __STDC_VERSION__ || __STDC_VERSION__ < 201112) -# if defined _MSC_VER && 1200 <= _MSC_VER -# define _Noreturn __declspec (noreturn) -# else -# define _Noreturn YY_ATTRIBUTE ((__noreturn__)) -# endif -#endif - -/* Suppress unused-variable warnings by "using" E. */ -#if ! defined lint || defined __GNUC__ -# define YYUSE(E) ((void) (E)) -#else -# define YYUSE(E) /* empty */ -#endif - -#if defined __GNUC__ && 407 <= __GNUC__ * 100 + __GNUC_MINOR__ -/* Suppress an incorrect diagnostic about yylval being uninitialized. */ -# define YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN \ - _Pragma ("GCC diagnostic push") \ - _Pragma ("GCC diagnostic ignored \"-Wuninitialized\"")\ - _Pragma ("GCC diagnostic ignored \"-Wmaybe-uninitialized\"") -# define YY_IGNORE_MAYBE_UNINITIALIZED_END \ - _Pragma ("GCC diagnostic pop") -#else -# define YY_INITIAL_VALUE(Value) Value -#endif -#ifndef YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN -# define YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN -# define YY_IGNORE_MAYBE_UNINITIALIZED_END -#endif -#ifndef YY_INITIAL_VALUE -# define YY_INITIAL_VALUE(Value) /* Nothing. */ -#endif - - -#if ! defined yyoverflow || YYERROR_VERBOSE - -/* The parser invokes alloca or malloc; define the necessary symbols. */ - -# ifdef YYSTACK_USE_ALLOCA -# if YYSTACK_USE_ALLOCA -# ifdef __GNUC__ -# define YYSTACK_ALLOC __builtin_alloca -# elif defined __BUILTIN_VA_ARG_INCR -# include <alloca.h> /* INFRINGES ON USER NAME SPACE */ -# elif defined _AIX -# define YYSTACK_ALLOC __alloca -# elif defined _MSC_VER -# include <malloc.h> /* INFRINGES ON USER NAME SPACE */ -# define alloca _alloca -# else -# define YYSTACK_ALLOC alloca -# if ! defined _ALLOCA_H && ! defined EXIT_SUCCESS -# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */ - /* Use EXIT_SUCCESS as a witness for stdlib.h. */ -# ifndef EXIT_SUCCESS -# define EXIT_SUCCESS 0 -# endif -# endif -# endif -# endif -# endif - -# ifdef YYSTACK_ALLOC - /* Pacify GCC's 'empty if-body' warning. */ -# define YYSTACK_FREE(Ptr) do { /* empty */; } while (0) -# ifndef YYSTACK_ALLOC_MAXIMUM - /* The OS might guarantee only one guard page at the bottom of the stack, - and a page size can be as small as 4096 bytes. So we cannot safely - invoke alloca (N) if N exceeds 4096. Use a slightly smaller number - to allow for a few compiler-allocated temporary stack slots. */ -# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */ -# endif -# else -# define YYSTACK_ALLOC YYMALLOC -# define YYSTACK_FREE YYFREE -# ifndef YYSTACK_ALLOC_MAXIMUM -# define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM -# endif -# if (defined __cplusplus && ! defined EXIT_SUCCESS \ - && ! ((defined YYMALLOC || defined malloc) \ - && (defined YYFREE || defined free))) -# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */ -# ifndef EXIT_SUCCESS -# define EXIT_SUCCESS 0 -# endif -# endif -# ifndef YYMALLOC -# define YYMALLOC malloc -# if ! defined malloc && ! defined EXIT_SUCCESS -void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */ -# endif -# endif -# ifndef YYFREE -# define YYFREE free -# if ! defined free && ! defined EXIT_SUCCESS -void free (void *); /* INFRINGES ON USER NAME SPACE */ -# endif -# endif -# endif -#endif /* ! defined yyoverflow || YYERROR_VERBOSE */ - - -#if (! defined yyoverflow \ - && (! defined __cplusplus \ - || (defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL \ - && defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL))) - -/* A type that is properly aligned for any stack member. */ -union yyalloc -{ - yytype_int16 yyss_alloc; - YYSTYPE yyvs_alloc; - YYLTYPE yyls_alloc; -}; - -/* The size of the maximum gap between one aligned stack and the next. */ -# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1) - -/* The size of an array large to enough to hold all stacks, each with - N elements. */ -# define YYSTACK_BYTES(N) \ - ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE) + sizeof (YYLTYPE)) \ - + 2 * YYSTACK_GAP_MAXIMUM) - -# define YYCOPY_NEEDED 1 - -/* Relocate STACK from its old location to the new one. The - local variables YYSIZE and YYSTACKSIZE give the old and new number of - elements in the stack, and YYPTR gives the new location of the - stack. Advance YYPTR to a properly aligned location for the next - stack. */ -# define YYSTACK_RELOCATE(Stack_alloc, Stack) \ - do \ - { \ - YYSIZE_T yynewbytes; \ - YYCOPY (&yyptr->Stack_alloc, Stack, yysize); \ - Stack = &yyptr->Stack_alloc; \ - yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \ - yyptr += yynewbytes / sizeof (*yyptr); \ - } \ - while (0) - -#endif - -#if defined YYCOPY_NEEDED && YYCOPY_NEEDED -/* Copy COUNT objects from SRC to DST. The source and destination do - not overlap. */ -# ifndef YYCOPY -# if defined __GNUC__ && 1 < __GNUC__ -# define YYCOPY(Dst, Src, Count) \ - __builtin_memcpy (Dst, Src, (Count) * sizeof (*(Src))) -# else -# define YYCOPY(Dst, Src, Count) \ - do \ - { \ - YYSIZE_T yyi; \ - for (yyi = 0; yyi < (Count); yyi++) \ - (Dst)[yyi] = (Src)[yyi]; \ - } \ - while (0) -# endif -# endif -#endif /* !YYCOPY_NEEDED */ - -/* YYFINAL -- State number of the termination state. */ -#define YYFINAL 6 -/* YYLAST -- Last index in YYTABLE. */ -#define YYLAST 138 - -/* YYNTOKENS -- Number of terminals. */ -#define YYNTOKENS 48 -/* YYNNTS -- Number of nonterminals. */ -#define YYNNTS 30 -/* YYNRULES -- Number of rules. */ -#define YYNRULES 85 -/* YYNSTATES -- Number of states. */ -#define YYNSTATES 149 - -/* YYTRANSLATE[YYX] -- Symbol number corresponding to YYX as returned - by yylex, with out-of-bounds checking. */ -#define YYUNDEFTOK 2 -#define YYMAXUTOK 279 - -#define YYTRANSLATE(YYX) \ - ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK) - -/* YYTRANSLATE[TOKEN-NUM] -- Symbol number corresponding to TOKEN-NUM - as returned by yylex, without out-of-bounds checking. */ -static const yytype_uint8 yytranslate[] = -{ - 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 47, 2, 2, 2, 45, 41, 2, - 33, 35, 44, 42, 34, 43, 2, 26, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 38, 25, - 36, 29, 30, 37, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 31, 2, 32, 40, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 27, 39, 28, 46, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 1, 2, 3, 4, - 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, - 15, 16, 17, 18, 19, 20, 21, 22, 23, 24 -}; - -#if YYDEBUG - /* YYRLINE[YYN] -- Source line where rule number YYN was defined. */ -static const yytype_uint16 yyrline[] = -{ - 0, 109, 109, 117, 121, 128, 129, 139, 142, 149, - 153, 161, 165, 170, 181, 200, 213, 220, 228, 231, - 238, 242, 246, 250, 258, 262, 266, 270, 274, 290, - 300, 308, 311, 315, 322, 338, 343, 362, 376, 383, - 384, 385, 392, 396, 397, 401, 402, 406, 407, 411, - 412, 416, 417, 421, 422, 426, 427, 428, 432, 433, - 434, 435, 436, 440, 441, 442, 446, 447, 448, 452, - 453, 462, 471, 475, 476, 477, 478, 483, 486, 490, - 498, 501, 505, 513, 517, 521 -}; -#endif - -#if YYDEBUG || YYERROR_VERBOSE || 0 -/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM. - First, the terminals, then, starting at YYNTOKENS, nonterminals. */ -static const char *const yytname[] = -{ - "$end", "error", "$undefined", "DT_V1", "DT_PLUGIN", "DT_MEMRESERVE", - "DT_LSHIFT", "DT_RSHIFT", "DT_LE", "DT_GE", "DT_EQ", "DT_NE", "DT_AND", - "DT_OR", "DT_BITS", "DT_DEL_PROP", "DT_DEL_NODE", "DT_PROPNODENAME", - "DT_LITERAL", "DT_CHAR_LITERAL", "DT_BYTE", "DT_STRING", "DT_LABEL", - "DT_REF", "DT_INCBIN", "';'", "'/'", "'{'", "'}'", "'='", "'>'", "'['", - "']'", "'('", "','", "')'", "'<'", "'?'", "':'", "'|'", "'^'", "'&'", - "'+'", "'-'", "'*'", "'%'", "'~'", "'!'", "$accept", "sourcefile", - "header", "headers", "memreserves", "memreserve", "devicetree", - "nodedef", "proplist", "propdef", "propdata", "propdataprefix", - "arrayprefix", "integer_prim", "integer_expr", "integer_trinary", - "integer_or", "integer_and", "integer_bitor", "integer_bitxor", - "integer_bitand", "integer_eq", "integer_rela", "integer_shift", - "integer_add", "integer_mul", "integer_unary", "bytestring", "subnodes", - "subnode", YY_NULLPTR -}; -#endif - -# ifdef YYPRINT -/* YYTOKNUM[NUM] -- (External) token number corresponding to the - (internal) symbol number NUM (which must be that of a token). */ -static const yytype_uint16 yytoknum[] = -{ - 0, 256, 257, 258, 259, 260, 261, 262, 263, 264, - 265, 266, 267, 268, 269, 270, 271, 272, 273, 274, - 275, 276, 277, 278, 279, 59, 47, 123, 125, 61, - 62, 91, 93, 40, 44, 41, 60, 63, 58, 124, - 94, 38, 43, 45, 42, 37, 126, 33 -}; -# endif - -#define YYPACT_NINF -44 - -#define yypact_value_is_default(Yystate) \ - (!!((Yystate) == (-44))) - -#define YYTABLE_NINF -1 - -#define yytable_value_is_error(Yytable_value) \ - 0 - - /* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing - STATE-NUM. */ -static const yytype_int8 yypact[] = -{ - 14, 27, 61, 14, 8, 18, -44, -44, 37, 8, - 40, 8, 64, -44, -44, -12, 37, -44, 50, 52, - -44, -44, -12, -12, -12, -44, 51, -44, -4, 78, - 53, 54, 55, 17, 2, 30, 38, -3, -44, 66, - -44, -44, 70, 72, 50, 50, -44, -44, -44, -44, - -12, -12, -12, -12, -12, -12, -12, -12, -12, -12, - -12, -12, -12, -12, -12, -12, -12, -12, -12, -44, - 3, 73, 50, -44, -44, 78, 59, 53, 54, 55, - 17, 2, 2, 30, 30, 30, 30, 38, 38, -3, - -3, -44, -44, -44, 82, 83, 44, 3, -44, 74, - 3, -44, -44, -12, 76, 79, -44, -44, -44, -44, - -44, 80, -44, -44, -44, -44, -44, -10, 36, -44, - -44, -44, -44, 85, -44, -44, -44, 75, -44, -44, - 21, 71, 88, -6, -44, -44, -44, -44, -44, 11, - -44, -44, -44, 37, -44, 77, 37, 81, -44 -}; - - /* YYDEFACT[STATE-NUM] -- Default reduction number in state STATE-NUM. - Performed when YYTABLE does not specify something else to do. Zero - means the default is an error. */ -static const yytype_uint8 yydefact[] = -{ - 0, 0, 0, 5, 7, 3, 1, 6, 0, 0, - 16, 7, 0, 39, 40, 0, 0, 10, 0, 2, - 8, 4, 0, 0, 0, 73, 0, 42, 43, 45, - 47, 49, 51, 53, 55, 58, 65, 68, 72, 0, - 18, 11, 0, 0, 0, 0, 74, 75, 76, 41, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 9, - 80, 0, 0, 14, 12, 46, 0, 48, 50, 52, - 54, 56, 57, 61, 62, 60, 59, 63, 64, 66, - 67, 70, 69, 71, 0, 0, 0, 0, 19, 0, - 80, 15, 13, 0, 0, 0, 21, 31, 83, 23, - 85, 0, 82, 81, 44, 22, 84, 0, 0, 17, - 30, 20, 32, 0, 24, 33, 27, 0, 77, 35, - 0, 0, 0, 0, 38, 37, 25, 36, 34, 0, - 78, 79, 26, 0, 29, 0, 0, 0, 28 -}; - - /* YYPGOTO[NTERM-NUM]. */ -static const yytype_int8 yypgoto[] = -{ - -44, -44, -44, 103, 99, 104, -44, -43, -44, -21, - -44, -44, -44, -8, 63, 9, -44, 65, 67, 68, - 69, 62, 26, 4, 22, 23, -19, -44, 20, 28 -}; - - /* YYDEFGOTO[NTERM-NUM]. */ -static const yytype_int16 yydefgoto[] = -{ - -1, 2, 3, 4, 10, 11, 19, 41, 70, 98, - 117, 118, 130, 25, 26, 27, 28, 29, 30, 31, - 32, 33, 34, 35, 36, 37, 38, 133, 99, 100 -}; - - /* YYTABLE[YYPACT[STATE-NUM]] -- What to do in state STATE-NUM. If - positive, shift that token. If negative, reduce the rule whose - number is the opposite. If YYTABLE_NINF, syntax error. */ -static const yytype_uint8 yytable[] = -{ - 16, 73, 74, 46, 47, 48, 13, 14, 39, 50, - 58, 59, 120, 8, 140, 121, 141, 1, 94, 95, - 96, 15, 12, 66, 122, 97, 142, 56, 57, 102, - 9, 22, 60, 51, 23, 24, 62, 63, 61, 13, - 14, 67, 68, 134, 135, 143, 144, 91, 92, 93, - 123, 136, 5, 108, 15, 13, 14, 124, 125, 126, - 127, 6, 83, 84, 85, 86, 18, 128, 42, 106, - 15, 40, 129, 107, 43, 44, 109, 40, 45, 112, - 64, 65, 81, 82, 87, 88, 49, 89, 90, 21, - 52, 69, 53, 71, 54, 72, 55, 103, 101, 104, - 105, 115, 111, 131, 116, 119, 7, 138, 132, 139, - 20, 146, 114, 17, 76, 75, 148, 80, 0, 77, - 113, 78, 137, 79, 0, 110, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 145, 0, 0, 147 -}; - -static const yytype_int16 yycheck[] = -{ - 8, 44, 45, 22, 23, 24, 18, 19, 16, 13, - 8, 9, 22, 5, 20, 25, 22, 3, 15, 16, - 17, 33, 4, 26, 34, 22, 32, 10, 11, 72, - 22, 43, 30, 37, 46, 47, 6, 7, 36, 18, - 19, 44, 45, 22, 23, 34, 35, 66, 67, 68, - 14, 30, 25, 96, 33, 18, 19, 21, 22, 23, - 24, 0, 58, 59, 60, 61, 26, 31, 16, 25, - 33, 27, 36, 29, 22, 23, 97, 27, 26, 100, - 42, 43, 56, 57, 62, 63, 35, 64, 65, 25, - 12, 25, 39, 23, 40, 23, 41, 38, 25, 17, - 17, 25, 28, 18, 25, 25, 3, 36, 33, 21, - 11, 34, 103, 9, 51, 50, 35, 55, -1, 52, - 100, 53, 130, 54, -1, 97, -1, -1, -1, -1, - -1, -1, -1, -1, -1, 143, -1, -1, 146 -}; - - /* YYSTOS[STATE-NUM] -- The (internal number of the) accessing - symbol of state STATE-NUM. */ -static const yytype_uint8 yystos[] = -{ - 0, 3, 49, 50, 51, 25, 0, 51, 5, 22, - 52, 53, 4, 18, 19, 33, 61, 53, 26, 54, - 52, 25, 43, 46, 47, 61, 62, 63, 64, 65, - 66, 67, 68, 69, 70, 71, 72, 73, 74, 61, - 27, 55, 16, 22, 23, 26, 74, 74, 74, 35, - 13, 37, 12, 39, 40, 41, 10, 11, 8, 9, - 30, 36, 6, 7, 42, 43, 26, 44, 45, 25, - 56, 23, 23, 55, 55, 65, 62, 66, 67, 68, - 69, 70, 70, 71, 71, 71, 71, 72, 72, 73, - 73, 74, 74, 74, 15, 16, 17, 22, 57, 76, - 77, 25, 55, 38, 17, 17, 25, 29, 55, 57, - 77, 28, 57, 76, 63, 25, 25, 58, 59, 25, - 22, 25, 34, 14, 21, 22, 23, 24, 31, 36, - 60, 18, 33, 75, 22, 23, 30, 61, 36, 21, - 20, 22, 32, 34, 35, 61, 34, 61, 35 -}; - - /* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */ -static const yytype_uint8 yyr1[] = -{ - 0, 48, 49, 50, 50, 51, 51, 52, 52, 53, - 53, 54, 54, 54, 54, 54, 54, 55, 56, 56, - 57, 57, 57, 57, 58, 58, 58, 58, 58, 58, - 58, 59, 59, 59, 60, 60, 60, 60, 60, 61, - 61, 61, 62, 63, 63, 64, 64, 65, 65, 66, - 66, 67, 67, 68, 68, 69, 69, 69, 70, 70, - 70, 70, 70, 71, 71, 71, 72, 72, 72, 73, - 73, 73, 73, 74, 74, 74, 74, 75, 75, 75, - 76, 76, 76, 77, 77, 77 -}; - - /* YYR2[YYN] -- Number of symbols on the right hand side of rule YYN. */ -static const yytype_uint8 yyr2[] = -{ - 0, 2, 3, 2, 4, 1, 2, 0, 2, 4, - 2, 2, 3, 4, 3, 4, 0, 5, 0, 2, - 4, 2, 3, 2, 2, 3, 4, 2, 9, 5, - 2, 0, 2, 2, 3, 1, 2, 2, 2, 1, - 1, 3, 1, 1, 5, 1, 3, 1, 3, 1, - 3, 1, 3, 1, 3, 1, 3, 3, 1, 3, - 3, 3, 3, 3, 3, 1, 3, 3, 1, 3, - 3, 3, 1, 1, 2, 2, 2, 0, 2, 2, - 0, 2, 2, 2, 3, 2 -}; - - -#define yyerrok (yyerrstatus = 0) -#define yyclearin (yychar = YYEMPTY) -#define YYEMPTY (-2) -#define YYEOF 0 - -#define YYACCEPT goto yyacceptlab -#define YYABORT goto yyabortlab -#define YYERROR goto yyerrorlab - - -#define YYRECOVERING() (!!yyerrstatus) - -#define YYBACKUP(Token, Value) \ -do \ - if (yychar == YYEMPTY) \ - { \ - yychar = (Token); \ - yylval = (Value); \ - YYPOPSTACK (yylen); \ - yystate = *yyssp; \ - goto yybackup; \ - } \ - else \ - { \ - yyerror (YY_("syntax error: cannot back up")); \ - YYERROR; \ - } \ -while (0) - -/* Error token number */ -#define YYTERROR 1 -#define YYERRCODE 256 - - -/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N]. - If N is 0, then set CURRENT to the empty location which ends - the previous symbol: RHS[0] (always defined). */ - -#ifndef YYLLOC_DEFAULT -# define YYLLOC_DEFAULT(Current, Rhs, N) \ - do \ - if (N) \ - { \ - (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \ - (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \ - (Current).last_line = YYRHSLOC (Rhs, N).last_line; \ - (Current).last_column = YYRHSLOC (Rhs, N).last_column; \ - } \ - else \ - { \ - (Current).first_line = (Current).last_line = \ - YYRHSLOC (Rhs, 0).last_line; \ - (Current).first_column = (Current).last_column = \ - YYRHSLOC (Rhs, 0).last_column; \ - } \ - while (0) -#endif - -#define YYRHSLOC(Rhs, K) ((Rhs)[K]) - - -/* Enable debugging if requested. */ -#if YYDEBUG - -# ifndef YYFPRINTF -# include <stdio.h> /* INFRINGES ON USER NAME SPACE */ -# define YYFPRINTF fprintf -# endif - -# define YYDPRINTF(Args) \ -do { \ - if (yydebug) \ - YYFPRINTF Args; \ -} while (0) - - -/* YY_LOCATION_PRINT -- Print the location on the stream. - This macro was not mandated originally: define only if we know - we won't break user code: when these are the locations we know. */ - -#ifndef YY_LOCATION_PRINT -# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL - -/* Print *YYLOCP on YYO. Private, do not rely on its existence. */ - -YY_ATTRIBUTE_UNUSED -static unsigned -yy_location_print_ (FILE *yyo, YYLTYPE const * const yylocp) -{ - unsigned res = 0; - int end_col = 0 != yylocp->last_column ? yylocp->last_column - 1 : 0; - if (0 <= yylocp->first_line) - { - res += YYFPRINTF (yyo, "%d", yylocp->first_line); - if (0 <= yylocp->first_column) - res += YYFPRINTF (yyo, ".%d", yylocp->first_column); - } - if (0 <= yylocp->last_line) - { - if (yylocp->first_line < yylocp->last_line) - { - res += YYFPRINTF (yyo, "-%d", yylocp->last_line); - if (0 <= end_col) - res += YYFPRINTF (yyo, ".%d", end_col); - } - else if (0 <= end_col && yylocp->first_column < end_col) - res += YYFPRINTF (yyo, "-%d", end_col); - } - return res; - } - -# define YY_LOCATION_PRINT(File, Loc) \ - yy_location_print_ (File, &(Loc)) - -# else -# define YY_LOCATION_PRINT(File, Loc) ((void) 0) -# endif -#endif - - -# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \ -do { \ - if (yydebug) \ - { \ - YYFPRINTF (stderr, "%s ", Title); \ - yy_symbol_print (stderr, \ - Type, Value, Location); \ - YYFPRINTF (stderr, "\n"); \ - } \ -} while (0) - - -/*----------------------------------------. -| Print this symbol's value on YYOUTPUT. | -`----------------------------------------*/ - -static void -yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep, YYLTYPE const * const yylocationp) -{ - FILE *yyo = yyoutput; - YYUSE (yyo); - YYUSE (yylocationp); - if (!yyvaluep) - return; -# ifdef YYPRINT - if (yytype < YYNTOKENS) - YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep); -# endif - YYUSE (yytype); -} - - -/*--------------------------------. -| Print this symbol on YYOUTPUT. | -`--------------------------------*/ - -static void -yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep, YYLTYPE const * const yylocationp) -{ - YYFPRINTF (yyoutput, "%s %s (", - yytype < YYNTOKENS ? "token" : "nterm", yytname[yytype]); - - YY_LOCATION_PRINT (yyoutput, *yylocationp); - YYFPRINTF (yyoutput, ": "); - yy_symbol_value_print (yyoutput, yytype, yyvaluep, yylocationp); - YYFPRINTF (yyoutput, ")"); -} - -/*------------------------------------------------------------------. -| yy_stack_print -- Print the state stack from its BOTTOM up to its | -| TOP (included). | -`------------------------------------------------------------------*/ - -static void -yy_stack_print (yytype_int16 *yybottom, yytype_int16 *yytop) -{ - YYFPRINTF (stderr, "Stack now"); - for (; yybottom <= yytop; yybottom++) - { - int yybot = *yybottom; - YYFPRINTF (stderr, " %d", yybot); - } - YYFPRINTF (stderr, "\n"); -} - -# define YY_STACK_PRINT(Bottom, Top) \ -do { \ - if (yydebug) \ - yy_stack_print ((Bottom), (Top)); \ -} while (0) - - -/*------------------------------------------------. -| Report that the YYRULE is going to be reduced. | -`------------------------------------------------*/ - -static void -yy_reduce_print (yytype_int16 *yyssp, YYSTYPE *yyvsp, YYLTYPE *yylsp, int yyrule) -{ - unsigned long int yylno = yyrline[yyrule]; - int yynrhs = yyr2[yyrule]; - int yyi; - YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n", - yyrule - 1, yylno); - /* The symbols being reduced. */ - for (yyi = 0; yyi < yynrhs; yyi++) - { - YYFPRINTF (stderr, " $%d = ", yyi + 1); - yy_symbol_print (stderr, - yystos[yyssp[yyi + 1 - yynrhs]], - &(yyvsp[(yyi + 1) - (yynrhs)]) - , &(yylsp[(yyi + 1) - (yynrhs)]) ); - YYFPRINTF (stderr, "\n"); - } -} - -# define YY_REDUCE_PRINT(Rule) \ -do { \ - if (yydebug) \ - yy_reduce_print (yyssp, yyvsp, yylsp, Rule); \ -} while (0) - -/* Nonzero means print parse trace. It is left uninitialized so that - multiple parsers can coexist. */ -int yydebug; -#else /* !YYDEBUG */ -# define YYDPRINTF(Args) -# define YY_SYMBOL_PRINT(Title, Type, Value, Location) -# define YY_STACK_PRINT(Bottom, Top) -# define YY_REDUCE_PRINT(Rule) -#endif /* !YYDEBUG */ - - -/* YYINITDEPTH -- initial size of the parser's stacks. */ -#ifndef YYINITDEPTH -# define YYINITDEPTH 200 -#endif - -/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only - if the built-in stack extension method is used). - - Do not make this value too large; the results are undefined if - YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH) - evaluated with infinite-precision integer arithmetic. */ - -#ifndef YYMAXDEPTH -# define YYMAXDEPTH 10000 -#endif - - -#if YYERROR_VERBOSE - -# ifndef yystrlen -# if defined __GLIBC__ && defined _STRING_H -# define yystrlen strlen -# else -/* Return the length of YYSTR. */ -static YYSIZE_T -yystrlen (const char *yystr) -{ - YYSIZE_T yylen; - for (yylen = 0; yystr[yylen]; yylen++) - continue; - return yylen; -} -# endif -# endif - -# ifndef yystpcpy -# if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE -# define yystpcpy stpcpy -# else -/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in - YYDEST. */ -static char * -yystpcpy (char *yydest, const char *yysrc) -{ - char *yyd = yydest; - const char *yys = yysrc; - - while ((*yyd++ = *yys++) != '\0') - continue; - - return yyd - 1; -} -# endif -# endif - -# ifndef yytnamerr -/* Copy to YYRES the contents of YYSTR after stripping away unnecessary - quotes and backslashes, so that it's suitable for yyerror. The - heuristic is that double-quoting is unnecessary unless the string - contains an apostrophe, a comma, or backslash (other than - backslash-backslash). YYSTR is taken from yytname. If YYRES is - null, do not copy; instead, return the length of what the result - would have been. */ -static YYSIZE_T -yytnamerr (char *yyres, const char *yystr) -{ - if (*yystr == '"') - { - YYSIZE_T yyn = 0; - char const *yyp = yystr; - - for (;;) - switch (*++yyp) - { - case '\'': - case ',': - goto do_not_strip_quotes; - - case '\\': - if (*++yyp != '\\') - goto do_not_strip_quotes; - /* Fall through. */ - default: - if (yyres) - yyres[yyn] = *yyp; - yyn++; - break; - - case '"': - if (yyres) - yyres[yyn] = '\0'; - return yyn; - } - do_not_strip_quotes: ; - } - - if (! yyres) - return yystrlen (yystr); - - return yystpcpy (yyres, yystr) - yyres; -} -# endif - -/* Copy into *YYMSG, which is of size *YYMSG_ALLOC, an error message - about the unexpected token YYTOKEN for the state stack whose top is - YYSSP. - - Return 0 if *YYMSG was successfully written. Return 1 if *YYMSG is - not large enough to hold the message. In that case, also set - *YYMSG_ALLOC to the required number of bytes. Return 2 if the - required number of bytes is too large to store. */ -static int -yysyntax_error (YYSIZE_T *yymsg_alloc, char **yymsg, - yytype_int16 *yyssp, int yytoken) -{ - YYSIZE_T yysize0 = yytnamerr (YY_NULLPTR, yytname[yytoken]); - YYSIZE_T yysize = yysize0; - enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 }; - /* Internationalized format string. */ - const char *yyformat = YY_NULLPTR; - /* Arguments of yyformat. */ - char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM]; - /* Number of reported tokens (one for the "unexpected", one per - "expected"). */ - int yycount = 0; - - /* There are many possibilities here to consider: - - If this state is a consistent state with a default action, then - the only way this function was invoked is if the default action - is an error action. In that case, don't check for expected - tokens because there are none. - - The only way there can be no lookahead present (in yychar) is if - this state is a consistent state with a default action. Thus, - detecting the absence of a lookahead is sufficient to determine - that there is no unexpected or expected token to report. In that - case, just report a simple "syntax error". - - Don't assume there isn't a lookahead just because this state is a - consistent state with a default action. There might have been a - previous inconsistent state, consistent state with a non-default - action, or user semantic action that manipulated yychar. - - Of course, the expected token list depends on states to have - correct lookahead information, and it depends on the parser not - to perform extra reductions after fetching a lookahead from the - scanner and before detecting a syntax error. Thus, state merging - (from LALR or IELR) and default reductions corrupt the expected - token list. However, the list is correct for canonical LR with - one exception: it will still contain any token that will not be - accepted due to an error action in a later state. - */ - if (yytoken != YYEMPTY) - { - int yyn = yypact[*yyssp]; - yyarg[yycount++] = yytname[yytoken]; - if (!yypact_value_is_default (yyn)) - { - /* Start YYX at -YYN if negative to avoid negative indexes in - YYCHECK. In other words, skip the first -YYN actions for - this state because they are default actions. */ - int yyxbegin = yyn < 0 ? -yyn : 0; - /* Stay within bounds of both yycheck and yytname. */ - int yychecklim = YYLAST - yyn + 1; - int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS; - int yyx; - - for (yyx = yyxbegin; yyx < yyxend; ++yyx) - if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR - && !yytable_value_is_error (yytable[yyx + yyn])) - { - if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM) - { - yycount = 1; - yysize = yysize0; - break; - } - yyarg[yycount++] = yytname[yyx]; - { - YYSIZE_T yysize1 = yysize + yytnamerr (YY_NULLPTR, yytname[yyx]); - if (! (yysize <= yysize1 - && yysize1 <= YYSTACK_ALLOC_MAXIMUM)) - return 2; - yysize = yysize1; - } - } - } - } - - switch (yycount) - { -# define YYCASE_(N, S) \ - case N: \ - yyformat = S; \ - break - YYCASE_(0, YY_("syntax error")); - YYCASE_(1, YY_("syntax error, unexpected %s")); - YYCASE_(2, YY_("syntax error, unexpected %s, expecting %s")); - YYCASE_(3, YY_("syntax error, unexpected %s, expecting %s or %s")); - YYCASE_(4, YY_("syntax error, unexpected %s, expecting %s or %s or %s")); - YYCASE_(5, YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s")); -# undef YYCASE_ - } - - { - YYSIZE_T yysize1 = yysize + yystrlen (yyformat); - if (! (yysize <= yysize1 && yysize1 <= YYSTACK_ALLOC_MAXIMUM)) - return 2; - yysize = yysize1; - } - - if (*yymsg_alloc < yysize) - { - *yymsg_alloc = 2 * yysize; - if (! (yysize <= *yymsg_alloc - && *yymsg_alloc <= YYSTACK_ALLOC_MAXIMUM)) - *yymsg_alloc = YYSTACK_ALLOC_MAXIMUM; - return 1; - } - - /* Avoid sprintf, as that infringes on the user's name space. - Don't have undefined behavior even if the translation - produced a string with the wrong number of "%s"s. */ - { - char *yyp = *yymsg; - int yyi = 0; - while ((*yyp = *yyformat) != '\0') - if (*yyp == '%' && yyformat[1] == 's' && yyi < yycount) - { - yyp += yytnamerr (yyp, yyarg[yyi++]); - yyformat += 2; - } - else - { - yyp++; - yyformat++; - } - } - return 0; -} -#endif /* YYERROR_VERBOSE */ - -/*-----------------------------------------------. -| Release the memory associated to this symbol. | -`-----------------------------------------------*/ - -static void -yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep, YYLTYPE *yylocationp) -{ - YYUSE (yyvaluep); - YYUSE (yylocationp); - if (!yymsg) - yymsg = "Deleting"; - YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp); - - YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN - YYUSE (yytype); - YY_IGNORE_MAYBE_UNINITIALIZED_END -} - - - - -/* The lookahead symbol. */ -int yychar; - -/* The semantic value of the lookahead symbol. */ -YYSTYPE yylval; -/* Location data for the lookahead symbol. */ -YYLTYPE yylloc -# if defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL - = { 1, 1, 1, 1 } -# endif -; -/* Number of syntax errors so far. */ -int yynerrs; - - -/*----------. -| yyparse. | -`----------*/ - -int -yyparse (void) -{ - int yystate; - /* Number of tokens to shift before error messages enabled. */ - int yyerrstatus; - - /* The stacks and their tools: - 'yyss': related to states. - 'yyvs': related to semantic values. - 'yyls': related to locations. - - Refer to the stacks through separate pointers, to allow yyoverflow - to reallocate them elsewhere. */ - - /* The state stack. */ - yytype_int16 yyssa[YYINITDEPTH]; - yytype_int16 *yyss; - yytype_int16 *yyssp; - - /* The semantic value stack. */ - YYSTYPE yyvsa[YYINITDEPTH]; - YYSTYPE *yyvs; - YYSTYPE *yyvsp; - - /* The location stack. */ - YYLTYPE yylsa[YYINITDEPTH]; - YYLTYPE *yyls; - YYLTYPE *yylsp; - - /* The locations where the error started and ended. */ - YYLTYPE yyerror_range[3]; - - YYSIZE_T yystacksize; - - int yyn; - int yyresult; - /* Lookahead token as an internal (translated) token number. */ - int yytoken = 0; - /* The variables used to return semantic value and location from the - action routines. */ - YYSTYPE yyval; - YYLTYPE yyloc; - -#if YYERROR_VERBOSE - /* Buffer for error messages, and its allocated size. */ - char yymsgbuf[128]; - char *yymsg = yymsgbuf; - YYSIZE_T yymsg_alloc = sizeof yymsgbuf; -#endif - -#define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N), yylsp -= (N)) - - /* The number of symbols on the RHS of the reduced rule. - Keep to zero when no symbol should be popped. */ - int yylen = 0; - - yyssp = yyss = yyssa; - yyvsp = yyvs = yyvsa; - yylsp = yyls = yylsa; - yystacksize = YYINITDEPTH; - - YYDPRINTF ((stderr, "Starting parse\n")); - - yystate = 0; - yyerrstatus = 0; - yynerrs = 0; - yychar = YYEMPTY; /* Cause a token to be read. */ - yylsp[0] = yylloc; - goto yysetstate; - -/*------------------------------------------------------------. -| yynewstate -- Push a new state, which is found in yystate. | -`------------------------------------------------------------*/ - yynewstate: - /* In all cases, when you get here, the value and location stacks - have just been pushed. So pushing a state here evens the stacks. */ - yyssp++; - - yysetstate: - *yyssp = yystate; - - if (yyss + yystacksize - 1 <= yyssp) - { - /* Get the current used size of the three stacks, in elements. */ - YYSIZE_T yysize = yyssp - yyss + 1; - -#ifdef yyoverflow - { - /* Give user a chance to reallocate the stack. Use copies of - these so that the &'s don't force the real ones into - memory. */ - YYSTYPE *yyvs1 = yyvs; - yytype_int16 *yyss1 = yyss; - YYLTYPE *yyls1 = yyls; - - /* Each stack pointer address is followed by the size of the - data in use in that stack, in bytes. This used to be a - conditional around just the two extra args, but that might - be undefined if yyoverflow is a macro. */ - yyoverflow (YY_("memory exhausted"), - &yyss1, yysize * sizeof (*yyssp), - &yyvs1, yysize * sizeof (*yyvsp), - &yyls1, yysize * sizeof (*yylsp), - &yystacksize); - - yyls = yyls1; - yyss = yyss1; - yyvs = yyvs1; - } -#else /* no yyoverflow */ -# ifndef YYSTACK_RELOCATE - goto yyexhaustedlab; -# else - /* Extend the stack our own way. */ - if (YYMAXDEPTH <= yystacksize) - goto yyexhaustedlab; - yystacksize *= 2; - if (YYMAXDEPTH < yystacksize) - yystacksize = YYMAXDEPTH; - - { - yytype_int16 *yyss1 = yyss; - union yyalloc *yyptr = - (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize)); - if (! yyptr) - goto yyexhaustedlab; - YYSTACK_RELOCATE (yyss_alloc, yyss); - YYSTACK_RELOCATE (yyvs_alloc, yyvs); - YYSTACK_RELOCATE (yyls_alloc, yyls); -# undef YYSTACK_RELOCATE - if (yyss1 != yyssa) - YYSTACK_FREE (yyss1); - } -# endif -#endif /* no yyoverflow */ - - yyssp = yyss + yysize - 1; - yyvsp = yyvs + yysize - 1; - yylsp = yyls + yysize - 1; - - YYDPRINTF ((stderr, "Stack size increased to %lu\n", - (unsigned long int) yystacksize)); - - if (yyss + yystacksize - 1 <= yyssp) - YYABORT; - } - - YYDPRINTF ((stderr, "Entering state %d\n", yystate)); - - if (yystate == YYFINAL) - YYACCEPT; - - goto yybackup; - -/*-----------. -| yybackup. | -`-----------*/ -yybackup: - - /* Do appropriate processing given the current state. Read a - lookahead token if we need one and don't already have one. */ - - /* First try to decide what to do without reference to lookahead token. */ - yyn = yypact[yystate]; - if (yypact_value_is_default (yyn)) - goto yydefault; - - /* Not known => get a lookahead token if don't already have one. */ - - /* YYCHAR is either YYEMPTY or YYEOF or a valid lookahead symbol. */ - if (yychar == YYEMPTY) - { - YYDPRINTF ((stderr, "Reading a token: ")); - yychar = yylex (); - } - - if (yychar <= YYEOF) - { - yychar = yytoken = YYEOF; - YYDPRINTF ((stderr, "Now at end of input.\n")); - } - else - { - yytoken = YYTRANSLATE (yychar); - YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc); - } - - /* If the proper action on seeing token YYTOKEN is to reduce or to - detect an error, take that action. */ - yyn += yytoken; - if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken) - goto yydefault; - yyn = yytable[yyn]; - if (yyn <= 0) - { - if (yytable_value_is_error (yyn)) - goto yyerrlab; - yyn = -yyn; - goto yyreduce; - } - - /* Count tokens shifted since error; after three, turn off error - status. */ - if (yyerrstatus) - yyerrstatus--; - - /* Shift the lookahead token. */ - YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc); - - /* Discard the shifted token. */ - yychar = YYEMPTY; - - yystate = yyn; - YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN - *++yyvsp = yylval; - YY_IGNORE_MAYBE_UNINITIALIZED_END - *++yylsp = yylloc; - goto yynewstate; - - -/*-----------------------------------------------------------. -| yydefault -- do the default action for the current state. | -`-----------------------------------------------------------*/ -yydefault: - yyn = yydefact[yystate]; - if (yyn == 0) - goto yyerrlab; - goto yyreduce; - - -/*-----------------------------. -| yyreduce -- Do a reduction. | -`-----------------------------*/ -yyreduce: - /* yyn is the number of a rule to reduce with. */ - yylen = yyr2[yyn]; - - /* If YYLEN is nonzero, implement the default value of the action: - '$$ = $1'. - - Otherwise, the following line sets YYVAL to garbage. - This behavior is undocumented and Bison - users should not rely upon it. Assigning to YYVAL - unconditionally makes the parser a bit smaller, and it avoids a - GCC warning that YYVAL may be used uninitialized. */ - yyval = yyvsp[1-yylen]; - - /* Default location. */ - YYLLOC_DEFAULT (yyloc, (yylsp - yylen), yylen); - YY_REDUCE_PRINT (yyn); - switch (yyn) - { - case 2: -#line 110 "dtc-parser.y" /* yacc.c:1646 */ - { - parser_output = build_dt_info((yyvsp[-2].flags), (yyvsp[-1].re), (yyvsp[0].node), - guess_boot_cpuid((yyvsp[0].node))); - } -#line 1478 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 3: -#line 118 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.flags) = DTSF_V1; - } -#line 1486 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 4: -#line 122 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.flags) = DTSF_V1 | DTSF_PLUGIN; - } -#line 1494 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 6: -#line 130 "dtc-parser.y" /* yacc.c:1646 */ - { - if ((yyvsp[0].flags) != (yyvsp[-1].flags)) - ERROR(&(yylsp[0]), "Header flags don't match earlier ones"); - (yyval.flags) = (yyvsp[-1].flags); - } -#line 1504 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 7: -#line 139 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.re) = NULL; - } -#line 1512 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 8: -#line 143 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.re) = chain_reserve_entry((yyvsp[-1].re), (yyvsp[0].re)); - } -#line 1520 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 9: -#line 150 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.re) = build_reserve_entry((yyvsp[-2].integer), (yyvsp[-1].integer)); - } -#line 1528 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 10: -#line 154 "dtc-parser.y" /* yacc.c:1646 */ - { - add_label(&(yyvsp[0].re)->labels, (yyvsp[-1].labelref)); - (yyval.re) = (yyvsp[0].re); - } -#line 1537 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 11: -#line 162 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.node) = name_node((yyvsp[0].node), ""); - } -#line 1545 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 12: -#line 166 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.node) = merge_nodes((yyvsp[-2].node), (yyvsp[0].node)); - } -#line 1553 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 13: -#line 171 "dtc-parser.y" /* yacc.c:1646 */ - { - struct node *target = get_node_by_ref((yyvsp[-3].node), (yyvsp[-1].labelref)); - - if (target) { - add_label(&target->labels, (yyvsp[-2].labelref)); - merge_nodes(target, (yyvsp[0].node)); - } else - ERROR(&(yylsp[-1]), "Label or path %s not found", (yyvsp[-1].labelref)); - (yyval.node) = (yyvsp[-3].node); - } -#line 1568 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 14: -#line 182 "dtc-parser.y" /* yacc.c:1646 */ - { - struct node *target = get_node_by_ref((yyvsp[-2].node), (yyvsp[-1].labelref)); - - if (target) { - merge_nodes(target, (yyvsp[0].node)); - } else { - /* - * We rely on the rule being always: - * versioninfo plugindecl memreserves devicetree - * so $-1 is what we want (plugindecl) - */ - if ((yyvsp[(-1) - (3)].flags) & DTSF_PLUGIN) - add_orphan_node((yyvsp[-2].node), (yyvsp[0].node), (yyvsp[-1].labelref)); - else - ERROR(&(yylsp[-1]), "Label or path %s not found", (yyvsp[-1].labelref)); - } - (yyval.node) = (yyvsp[-2].node); - } -#line 1591 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 15: -#line 201 "dtc-parser.y" /* yacc.c:1646 */ - { - struct node *target = get_node_by_ref((yyvsp[-3].node), (yyvsp[-1].labelref)); - - if (target) - delete_node(target); - else - ERROR(&(yylsp[-1]), "Label or path %s not found", (yyvsp[-1].labelref)); - - - (yyval.node) = (yyvsp[-3].node); - } -#line 1607 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 16: -#line 213 "dtc-parser.y" /* yacc.c:1646 */ - { - /* build empty node */ - (yyval.node) = name_node(build_node(NULL, NULL), ""); - } -#line 1616 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 17: -#line 221 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.node) = build_node((yyvsp[-3].proplist), (yyvsp[-2].nodelist)); - } -#line 1624 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 18: -#line 228 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.proplist) = NULL; - } -#line 1632 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 19: -#line 232 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.proplist) = chain_property((yyvsp[0].prop), (yyvsp[-1].proplist)); - } -#line 1640 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 20: -#line 239 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.prop) = build_property((yyvsp[-3].propnodename), (yyvsp[-1].data)); - } -#line 1648 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 21: -#line 243 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.prop) = build_property((yyvsp[-1].propnodename), empty_data); - } -#line 1656 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 22: -#line 247 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.prop) = build_property_delete((yyvsp[-1].propnodename)); - } -#line 1664 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 23: -#line 251 "dtc-parser.y" /* yacc.c:1646 */ - { - add_label(&(yyvsp[0].prop)->labels, (yyvsp[-1].labelref)); - (yyval.prop) = (yyvsp[0].prop); - } -#line 1673 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 24: -#line 259 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.data) = data_merge((yyvsp[-1].data), (yyvsp[0].data)); - } -#line 1681 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 25: -#line 263 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.data) = data_merge((yyvsp[-2].data), (yyvsp[-1].array).data); - } -#line 1689 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 26: -#line 267 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.data) = data_merge((yyvsp[-3].data), (yyvsp[-1].data)); - } -#line 1697 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 27: -#line 271 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.data) = data_add_marker((yyvsp[-1].data), REF_PATH, (yyvsp[0].labelref)); - } -#line 1705 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 28: -#line 275 "dtc-parser.y" /* yacc.c:1646 */ - { - FILE *f = srcfile_relative_open((yyvsp[-5].data).val, NULL); - struct data d; - - if ((yyvsp[-3].integer) != 0) - if (fseek(f, (yyvsp[-3].integer), SEEK_SET) != 0) - die("Couldn't seek to offset %llu in \"%s\": %s", - (unsigned long long)(yyvsp[-3].integer), (yyvsp[-5].data).val, - strerror(errno)); - - d = data_copy_file(f, (yyvsp[-1].integer)); - - (yyval.data) = data_merge((yyvsp[-8].data), d); - fclose(f); - } -#line 1725 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 29: -#line 291 "dtc-parser.y" /* yacc.c:1646 */ - { - FILE *f = srcfile_relative_open((yyvsp[-1].data).val, NULL); - struct data d = empty_data; - - d = data_copy_file(f, -1); - - (yyval.data) = data_merge((yyvsp[-4].data), d); - fclose(f); - } -#line 1739 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 30: -#line 301 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.data) = data_add_marker((yyvsp[-1].data), LABEL, (yyvsp[0].labelref)); - } -#line 1747 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 31: -#line 308 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.data) = empty_data; - } -#line 1755 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 32: -#line 312 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.data) = (yyvsp[-1].data); - } -#line 1763 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 33: -#line 316 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.data) = data_add_marker((yyvsp[-1].data), LABEL, (yyvsp[0].labelref)); - } -#line 1771 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 34: -#line 323 "dtc-parser.y" /* yacc.c:1646 */ - { - unsigned long long bits; - - bits = (yyvsp[-1].integer); - - if ((bits != 8) && (bits != 16) && - (bits != 32) && (bits != 64)) { - ERROR(&(yylsp[-1]), "Array elements must be" - " 8, 16, 32 or 64-bits"); - bits = 32; - } - - (yyval.array).data = empty_data; - (yyval.array).bits = bits; - } -#line 1791 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 35: -#line 339 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.array).data = empty_data; - (yyval.array).bits = 32; - } -#line 1800 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 36: -#line 344 "dtc-parser.y" /* yacc.c:1646 */ - { - if ((yyvsp[-1].array).bits < 64) { - uint64_t mask = (1ULL << (yyvsp[-1].array).bits) - 1; - /* - * Bits above mask must either be all zero - * (positive within range of mask) or all one - * (negative and sign-extended). The second - * condition is true if when we set all bits - * within the mask to one (i.e. | in the - * mask), all bits are one. - */ - if (((yyvsp[0].integer) > mask) && (((yyvsp[0].integer) | mask) != -1ULL)) - ERROR(&(yylsp[0]), "Value out of range for" - " %d-bit array element", (yyvsp[-1].array).bits); - } - - (yyval.array).data = data_append_integer((yyvsp[-1].array).data, (yyvsp[0].integer), (yyvsp[-1].array).bits); - } -#line 1823 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 37: -#line 363 "dtc-parser.y" /* yacc.c:1646 */ - { - uint64_t val = ~0ULL >> (64 - (yyvsp[-1].array).bits); - - if ((yyvsp[-1].array).bits == 32) - (yyvsp[-1].array).data = data_add_marker((yyvsp[-1].array).data, - REF_PHANDLE, - (yyvsp[0].labelref)); - else - ERROR(&(yylsp[0]), "References are only allowed in " - "arrays with 32-bit elements."); - - (yyval.array).data = data_append_integer((yyvsp[-1].array).data, val, (yyvsp[-1].array).bits); - } -#line 1841 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 38: -#line 377 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.array).data = data_add_marker((yyvsp[-1].array).data, LABEL, (yyvsp[0].labelref)); - } -#line 1849 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 41: -#line 386 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.integer) = (yyvsp[-1].integer); - } -#line 1857 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 44: -#line 397 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-4].integer) ? (yyvsp[-2].integer) : (yyvsp[0].integer); } -#line 1863 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 46: -#line 402 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) || (yyvsp[0].integer); } -#line 1869 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 48: -#line 407 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) && (yyvsp[0].integer); } -#line 1875 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 50: -#line 412 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) | (yyvsp[0].integer); } -#line 1881 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 52: -#line 417 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) ^ (yyvsp[0].integer); } -#line 1887 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 54: -#line 422 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) & (yyvsp[0].integer); } -#line 1893 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 56: -#line 427 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) == (yyvsp[0].integer); } -#line 1899 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 57: -#line 428 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) != (yyvsp[0].integer); } -#line 1905 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 59: -#line 433 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) < (yyvsp[0].integer); } -#line 1911 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 60: -#line 434 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) > (yyvsp[0].integer); } -#line 1917 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 61: -#line 435 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) <= (yyvsp[0].integer); } -#line 1923 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 62: -#line 436 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) >= (yyvsp[0].integer); } -#line 1929 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 63: -#line 440 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) << (yyvsp[0].integer); } -#line 1935 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 64: -#line 441 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) >> (yyvsp[0].integer); } -#line 1941 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 66: -#line 446 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) + (yyvsp[0].integer); } -#line 1947 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 67: -#line 447 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) - (yyvsp[0].integer); } -#line 1953 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 69: -#line 452 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = (yyvsp[-2].integer) * (yyvsp[0].integer); } -#line 1959 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 70: -#line 454 "dtc-parser.y" /* yacc.c:1646 */ - { - if ((yyvsp[0].integer) != 0) { - (yyval.integer) = (yyvsp[-2].integer) / (yyvsp[0].integer); - } else { - ERROR(&(yyloc), "Division by zero"); - (yyval.integer) = 0; - } - } -#line 1972 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 71: -#line 463 "dtc-parser.y" /* yacc.c:1646 */ - { - if ((yyvsp[0].integer) != 0) { - (yyval.integer) = (yyvsp[-2].integer) % (yyvsp[0].integer); - } else { - ERROR(&(yyloc), "Division by zero"); - (yyval.integer) = 0; - } - } -#line 1985 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 74: -#line 476 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = -(yyvsp[0].integer); } -#line 1991 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 75: -#line 477 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = ~(yyvsp[0].integer); } -#line 1997 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 76: -#line 478 "dtc-parser.y" /* yacc.c:1646 */ - { (yyval.integer) = !(yyvsp[0].integer); } -#line 2003 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 77: -#line 483 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.data) = empty_data; - } -#line 2011 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 78: -#line 487 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.data) = data_append_byte((yyvsp[-1].data), (yyvsp[0].byte)); - } -#line 2019 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 79: -#line 491 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.data) = data_add_marker((yyvsp[-1].data), LABEL, (yyvsp[0].labelref)); - } -#line 2027 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 80: -#line 498 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.nodelist) = NULL; - } -#line 2035 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 81: -#line 502 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.nodelist) = chain_node((yyvsp[-1].node), (yyvsp[0].nodelist)); - } -#line 2043 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 82: -#line 506 "dtc-parser.y" /* yacc.c:1646 */ - { - ERROR(&(yylsp[0]), "Properties must precede subnodes"); - YYERROR; - } -#line 2052 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 83: -#line 514 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.node) = name_node((yyvsp[0].node), (yyvsp[-1].propnodename)); - } -#line 2060 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 84: -#line 518 "dtc-parser.y" /* yacc.c:1646 */ - { - (yyval.node) = name_node(build_node_delete(), (yyvsp[-1].propnodename)); - } -#line 2068 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - case 85: -#line 522 "dtc-parser.y" /* yacc.c:1646 */ - { - add_label(&(yyvsp[0].node)->labels, (yyvsp[-1].labelref)); - (yyval.node) = (yyvsp[0].node); - } -#line 2077 "dtc-parser.tab.c" /* yacc.c:1646 */ - break; - - -#line 2081 "dtc-parser.tab.c" /* yacc.c:1646 */ - default: break; - } - /* User semantic actions sometimes alter yychar, and that requires - that yytoken be updated with the new translation. We take the - approach of translating immediately before every use of yytoken. - One alternative is translating here after every semantic action, - but that translation would be missed if the semantic action invokes - YYABORT, YYACCEPT, or YYERROR immediately after altering yychar or - if it invokes YYBACKUP. In the case of YYABORT or YYACCEPT, an - incorrect destructor might then be invoked immediately. In the - case of YYERROR or YYBACKUP, subsequent parser actions might lead - to an incorrect destructor call or verbose syntax error message - before the lookahead is translated. */ - YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc); - - YYPOPSTACK (yylen); - yylen = 0; - YY_STACK_PRINT (yyss, yyssp); - - *++yyvsp = yyval; - *++yylsp = yyloc; - - /* Now 'shift' the result of the reduction. Determine what state - that goes to, based on the state we popped back to and the rule - number reduced by. */ - - yyn = yyr1[yyn]; - - yystate = yypgoto[yyn - YYNTOKENS] + *yyssp; - if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp) - yystate = yytable[yystate]; - else - yystate = yydefgoto[yyn - YYNTOKENS]; - - goto yynewstate; - - -/*--------------------------------------. -| yyerrlab -- here on detecting error. | -`--------------------------------------*/ -yyerrlab: - /* Make sure we have latest lookahead translation. See comments at - user semantic actions for why this is necessary. */ - yytoken = yychar == YYEMPTY ? YYEMPTY : YYTRANSLATE (yychar); - - /* If not already recovering from an error, report this error. */ - if (!yyerrstatus) - { - ++yynerrs; -#if ! YYERROR_VERBOSE - yyerror (YY_("syntax error")); -#else -# define YYSYNTAX_ERROR yysyntax_error (&yymsg_alloc, &yymsg, \ - yyssp, yytoken) - { - char const *yymsgp = YY_("syntax error"); - int yysyntax_error_status; - yysyntax_error_status = YYSYNTAX_ERROR; - if (yysyntax_error_status == 0) - yymsgp = yymsg; - else if (yysyntax_error_status == 1) - { - if (yymsg != yymsgbuf) - YYSTACK_FREE (yymsg); - yymsg = (char *) YYSTACK_ALLOC (yymsg_alloc); - if (!yymsg) - { - yymsg = yymsgbuf; - yymsg_alloc = sizeof yymsgbuf; - yysyntax_error_status = 2; - } - else - { - yysyntax_error_status = YYSYNTAX_ERROR; - yymsgp = yymsg; - } - } - yyerror (yymsgp); - if (yysyntax_error_status == 2) - goto yyexhaustedlab; - } -# undef YYSYNTAX_ERROR -#endif - } - - yyerror_range[1] = yylloc; - - if (yyerrstatus == 3) - { - /* If just tried and failed to reuse lookahead token after an - error, discard it. */ - - if (yychar <= YYEOF) - { - /* Return failure if at end of input. */ - if (yychar == YYEOF) - YYABORT; - } - else - { - yydestruct ("Error: discarding", - yytoken, &yylval, &yylloc); - yychar = YYEMPTY; - } - } - - /* Else will try to reuse lookahead token after shifting the error - token. */ - goto yyerrlab1; - - -/*---------------------------------------------------. -| yyerrorlab -- error raised explicitly by YYERROR. | -`---------------------------------------------------*/ -yyerrorlab: - - /* Pacify compilers like GCC when the user code never invokes - YYERROR and the label yyerrorlab therefore never appears in user - code. */ - if (/*CONSTCOND*/ 0) - goto yyerrorlab; - - yyerror_range[1] = yylsp[1-yylen]; - /* Do not reclaim the symbols of the rule whose action triggered - this YYERROR. */ - YYPOPSTACK (yylen); - yylen = 0; - YY_STACK_PRINT (yyss, yyssp); - yystate = *yyssp; - goto yyerrlab1; - - -/*-------------------------------------------------------------. -| yyerrlab1 -- common code for both syntax error and YYERROR. | -`-------------------------------------------------------------*/ -yyerrlab1: - yyerrstatus = 3; /* Each real token shifted decrements this. */ - - for (;;) - { - yyn = yypact[yystate]; - if (!yypact_value_is_default (yyn)) - { - yyn += YYTERROR; - if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR) - { - yyn = yytable[yyn]; - if (0 < yyn) - break; - } - } - - /* Pop the current state because it cannot handle the error token. */ - if (yyssp == yyss) - YYABORT; - - yyerror_range[1] = *yylsp; - yydestruct ("Error: popping", - yystos[yystate], yyvsp, yylsp); - YYPOPSTACK (1); - yystate = *yyssp; - YY_STACK_PRINT (yyss, yyssp); - } - - YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN - *++yyvsp = yylval; - YY_IGNORE_MAYBE_UNINITIALIZED_END - - yyerror_range[2] = yylloc; - /* Using YYLLOC is tempting, but would change the location of - the lookahead. YYLOC is available though. */ - YYLLOC_DEFAULT (yyloc, yyerror_range, 2); - *++yylsp = yyloc; - - /* Shift the error token. */ - YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp); - - yystate = yyn; - goto yynewstate; - - -/*-------------------------------------. -| yyacceptlab -- YYACCEPT comes here. | -`-------------------------------------*/ -yyacceptlab: - yyresult = 0; - goto yyreturn; - -/*-----------------------------------. -| yyabortlab -- YYABORT comes here. | -`-----------------------------------*/ -yyabortlab: - yyresult = 1; - goto yyreturn; - -#if !defined yyoverflow || YYERROR_VERBOSE -/*-------------------------------------------------. -| yyexhaustedlab -- memory exhaustion comes here. | -`-------------------------------------------------*/ -yyexhaustedlab: - yyerror (YY_("memory exhausted")); - yyresult = 2; - /* Fall through. */ -#endif - -yyreturn: - if (yychar != YYEMPTY) - { - /* Make sure we have latest lookahead translation. See comments at - user semantic actions for why this is necessary. */ - yytoken = YYTRANSLATE (yychar); - yydestruct ("Cleanup: discarding lookahead", - yytoken, &yylval, &yylloc); - } - /* Do not reclaim the symbols of the rule whose action triggered - this YYABORT or YYACCEPT. */ - YYPOPSTACK (yylen); - YY_STACK_PRINT (yyss, yyssp); - while (yyssp != yyss) - { - yydestruct ("Cleanup: popping", - yystos[*yyssp], yyvsp, yylsp); - YYPOPSTACK (1); - } -#ifndef yyoverflow - if (yyss != yyssa) - YYSTACK_FREE (yyss); -#endif -#if YYERROR_VERBOSE - if (yymsg != yymsgbuf) - YYSTACK_FREE (yymsg); -#endif - return yyresult; -} -#line 528 "dtc-parser.y" /* yacc.c:1906 */ - - -void yyerror(char const *s) -{ - ERROR(&yylloc, "%s", s); -} diff --git a/scripts/dtc/dtc-parser.tab.h_shipped b/scripts/dtc/dtc-parser.tab.h_shipped deleted file mode 100644 index 6aa512c1b33..00000000000 --- a/scripts/dtc/dtc-parser.tab.h_shipped +++ /dev/null @@ -1,125 +0,0 @@ -/* A Bison parser, made by GNU Bison 3.0.4. */ - -/* Bison interface for Yacc-like parsers in C - - Copyright (C) 1984, 1989-1990, 2000-2015 Free Software Foundation, Inc. - - This program is free software: you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation, either version 3 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see <http://www.gnu.org/licenses/>. */ - -/* As a special exception, you may create a larger work that contains - part or all of the Bison parser skeleton and distribute that work - under terms of your choice, so long as that work isn't itself a - parser generator using the skeleton or a modified version thereof - as a parser skeleton. Alternatively, if you modify or redistribute - the parser skeleton itself, you may (at your option) remove this - special exception, which will cause the skeleton and the resulting - Bison output files to be licensed under the GNU General Public - License without this special exception. - - This special exception was added by the Free Software Foundation in - version 2.2 of Bison. */ - -#ifndef YY_YY_DTC_PARSER_TAB_H_INCLUDED -# define YY_YY_DTC_PARSER_TAB_H_INCLUDED -/* Debug traces. */ -#ifndef YYDEBUG -# define YYDEBUG 0 -#endif -#if YYDEBUG -extern int yydebug; -#endif - -/* Token type. */ -#ifndef YYTOKENTYPE -# define YYTOKENTYPE - enum yytokentype - { - DT_V1 = 258, - DT_PLUGIN = 259, - DT_MEMRESERVE = 260, - DT_LSHIFT = 261, - DT_RSHIFT = 262, - DT_LE = 263, - DT_GE = 264, - DT_EQ = 265, - DT_NE = 266, - DT_AND = 267, - DT_OR = 268, - DT_BITS = 269, - DT_DEL_PROP = 270, - DT_DEL_NODE = 271, - DT_PROPNODENAME = 272, - DT_LITERAL = 273, - DT_CHAR_LITERAL = 274, - DT_BYTE = 275, - DT_STRING = 276, - DT_LABEL = 277, - DT_REF = 278, - DT_INCBIN = 279 - }; -#endif - -/* Value type. */ -#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED - -union YYSTYPE -{ -#line 39 "dtc-parser.y" /* yacc.c:1909 */ - - char *propnodename; - char *labelref; - uint8_t byte; - struct data data; - - struct { - struct data data; - int bits; - } array; - - struct property *prop; - struct property *proplist; - struct node *node; - struct node *nodelist; - struct reserve_info *re; - uint64_t integer; - unsigned int flags; - -#line 99 "dtc-parser.tab.h" /* yacc.c:1909 */ -}; - -typedef union YYSTYPE YYSTYPE; -# define YYSTYPE_IS_TRIVIAL 1 -# define YYSTYPE_IS_DECLARED 1 -#endif - -/* Location type. */ -#if ! defined YYLTYPE && ! defined YYLTYPE_IS_DECLARED -typedef struct YYLTYPE YYLTYPE; -struct YYLTYPE -{ - int first_line; - int first_column; - int last_line; - int last_column; -}; -# define YYLTYPE_IS_DECLARED 1 -# define YYLTYPE_IS_TRIVIAL 1 -#endif - - -extern YYSTYPE yylval; -extern YYLTYPE yylloc; -int yyparse (void); - -#endif /* !YY_YY_DTC_PARSER_TAB_H_INCLUDED */ diff --git a/scripts/dtc/dtc-parser.y b/scripts/dtc/dtc-parser.y index affc81a8f9a..44af170abfe 100644 --- a/scripts/dtc/dtc-parser.y +++ b/scripts/dtc/dtc-parser.y @@ -166,7 +166,17 @@ devicetree: { $$ = merge_nodes($1, $3); } - + | DT_REF nodedef + { + /* + * We rely on the rule being always: + * versioninfo plugindecl memreserves devicetree + * so $-1 is what we want (plugindecl) + */ + if (!($<flags>-1 & DTSF_PLUGIN)) + ERROR(&@2, "Label or path %s not found", $1); + $$ = add_orphan_node(name_node(build_node(NULL, NULL), ""), $2, $1); + } | devicetree DT_LABEL DT_REF nodedef { struct node *target = get_node_by_ref($1, $3); @@ -209,11 +219,6 @@ devicetree: $$ = $1; } - | /* empty */ - { - /* build empty node */ - $$ = name_node(build_node(NULL, NULL), ""); - } ; nodedef: diff --git a/scripts/dtc/dtc.c b/scripts/dtc/dtc.c index 5ed873c72ad..c36994e6eac 100644 --- a/scripts/dtc/dtc.c +++ b/scripts/dtc/dtc.c @@ -59,8 +59,6 @@ static void fill_fullpaths(struct node *tree, const char *prefix) } /* Usage related data. */ -#define FDT_VERSION(version) _FDT_VERSION(version) -#define _FDT_VERSION(version) #version static const char usage_synopsis[] = "dtc [options] <input file>"; static const char usage_short_opts[] = "qI:O:o:V:d:R:S:p:a:fb:i:H:sW:E:@Ahv"; static struct option const usage_long_opts[] = { @@ -98,7 +96,7 @@ static const char * const usage_opts_help[] = { "\t\tdts - device tree source text\n" "\t\tdtb - device tree blob\n" "\t\tasm - assembler source", - "\n\tBlob version to produce, defaults to "FDT_VERSION(DEFAULT_FDT_VERSION)" (for dtb and asm output)", + "\n\tBlob version to produce, defaults to "stringify(DEFAULT_FDT_VERSION)" (for dtb and asm output)", "\n\tOutput dependency file", "\n\tMake space for <number> reserve map entries (for dtb and asm output)", "\n\tMake the blob at least <bytes> long (extra space)", @@ -319,13 +317,14 @@ int main(int argc, char *argv[]) dti->boot_cpuid_phys = cmdline_boot_cpuid; fill_fullpaths(dti->dt, ""); - process_checks(force, dti); /* on a plugin, generate by default */ if (dti->dtsflags & DTSF_PLUGIN) { generate_fixups = 1; } + process_checks(force, dti); + if (auto_label_aliases) generate_label_tree(dti, "aliases", false); diff --git a/scripts/dtc/dtc.h b/scripts/dtc/dtc.h index 35cf926cc14..3b18a42b866 100644 --- a/scripts/dtc/dtc.h +++ b/scripts/dtc/dtc.h @@ -1,5 +1,5 @@ -#ifndef _DTC_H -#define _DTC_H +#ifndef DTC_H +#define DTC_H /* * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation. 2005. @@ -67,7 +67,8 @@ typedef uint32_t cell_t; #define streq(a, b) (strcmp((a), (b)) == 0) -#define strneq(a, b, n) (strncmp((a), (b), (n)) == 0) +#define strstarts(s, prefix) (strncmp((s), (prefix), strlen(prefix)) == 0) +#define strprefixeq(a, n, b) (strlen(b) == (n) && (memcmp(a, b, n) == 0)) #define ALIGN(x, a) (((x) + (a) - 1) & ~((a) - 1)) @@ -203,7 +204,7 @@ struct node *build_node_delete(void); struct node *name_node(struct node *node, char *name); struct node *chain_node(struct node *first, struct node *list); struct node *merge_nodes(struct node *old_node, struct node *new_node); -void add_orphan_node(struct node *old_node, struct node *new_node, char *ref); +struct node *add_orphan_node(struct node *old_node, struct node *new_node, char *ref); void add_property(struct node *node, struct property *prop); void delete_property_by_name(struct node *node, char *name); @@ -289,4 +290,4 @@ struct dt_info *dt_from_source(const char *f); struct dt_info *dt_from_fs(const char *dirname); -#endif /* _DTC_H */ +#endif /* DTC_H */ diff --git a/scripts/dtc/flattree.c b/scripts/dtc/flattree.c index fcf71541d8a..8d268fb785d 100644 --- a/scripts/dtc/flattree.c +++ b/scripts/dtc/flattree.c @@ -731,7 +731,7 @@ static char *nodename_from_path(const char *ppath, const char *cpath) plen = strlen(ppath); - if (!strneq(ppath, cpath, plen)) + if (!strstarts(cpath, ppath)) die("Path \"%s\" is not valid as a child of \"%s\"\n", cpath, ppath); diff --git a/scripts/dtc/libfdt/fdt.c b/scripts/dtc/libfdt/fdt.c index 22286a1aaea..7855a178776 100644 --- a/scripts/dtc/libfdt/fdt.c +++ b/scripts/dtc/libfdt/fdt.c @@ -88,7 +88,7 @@ const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int len) || ((offset + len) > fdt_size_dt_struct(fdt))) return NULL; - return _fdt_offset_ptr(fdt, offset); + return fdt_offset_ptr_(fdt, offset); } uint32_t fdt_next_tag(const void *fdt, int startoffset, int *nextoffset) @@ -123,6 +123,9 @@ uint32_t fdt_next_tag(const void *fdt, int startoffset, int *nextoffset) /* skip-name offset, length and value */ offset += sizeof(struct fdt_property) - FDT_TAGSIZE + fdt32_to_cpu(*lenp); + if (fdt_version(fdt) < 0x10 && fdt32_to_cpu(*lenp) >= 8 && + ((offset - fdt32_to_cpu(*lenp)) % 8) != 0) + offset += 4; break; case FDT_END: @@ -141,7 +144,7 @@ uint32_t fdt_next_tag(const void *fdt, int startoffset, int *nextoffset) return tag; } -int _fdt_check_node_offset(const void *fdt, int offset) +int fdt_check_node_offset_(const void *fdt, int offset) { if ((offset < 0) || (offset % FDT_TAGSIZE) || (fdt_next_tag(fdt, offset, &offset) != FDT_BEGIN_NODE)) @@ -150,7 +153,7 @@ int _fdt_check_node_offset(const void *fdt, int offset) return offset; } -int _fdt_check_prop_offset(const void *fdt, int offset) +int fdt_check_prop_offset_(const void *fdt, int offset) { if ((offset < 0) || (offset % FDT_TAGSIZE) || (fdt_next_tag(fdt, offset, &offset) != FDT_PROP)) @@ -165,7 +168,7 @@ int fdt_next_node(const void *fdt, int offset, int *depth) uint32_t tag; if (offset >= 0) - if ((nextoffset = _fdt_check_node_offset(fdt, offset)) < 0) + if ((nextoffset = fdt_check_node_offset_(fdt, offset)) < 0) return nextoffset; do { @@ -227,7 +230,7 @@ int fdt_next_subnode(const void *fdt, int offset) return offset; } -const char *_fdt_find_string(const char *strtab, int tabsize, const char *s) +const char *fdt_find_string_(const char *strtab, int tabsize, const char *s) { int len = strlen(s) + 1; const char *last = strtab + tabsize - len; diff --git a/scripts/dtc/libfdt/fdt.h b/scripts/dtc/libfdt/fdt.h index 526aedb5155..74961f9026d 100644 --- a/scripts/dtc/libfdt/fdt.h +++ b/scripts/dtc/libfdt/fdt.h @@ -1,5 +1,5 @@ -#ifndef _FDT_H -#define _FDT_H +#ifndef FDT_H +#define FDT_H /* * libfdt - Flat Device Tree manipulation * Copyright (C) 2006 David Gibson, IBM Corporation. @@ -108,4 +108,4 @@ struct fdt_property { #define FDT_V16_SIZE FDT_V3_SIZE #define FDT_V17_SIZE (FDT_V16_SIZE + sizeof(fdt32_t)) -#endif /* _FDT_H */ +#endif /* FDT_H */ diff --git a/scripts/dtc/libfdt/fdt_overlay.c b/scripts/dtc/libfdt/fdt_overlay.c index bd81241e665..bf75388ec9a 100644 --- a/scripts/dtc/libfdt/fdt_overlay.c +++ b/scripts/dtc/libfdt/fdt_overlay.c @@ -1,3 +1,54 @@ +/* + * libfdt - Flat Device Tree manipulation + * Copyright (C) 2016 Free Electrons + * Copyright (C) 2016 NextThing Co. + * + * libfdt is dual licensed: you can use it either under the terms of + * the GPL, or the BSD license, at your option. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this library; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Alternatively, + * + * b) Redistribution and use in source and binary forms, with or + * without modification, are permitted provided that the following + * conditions are met: + * + * 1. Redistributions of source code must retain the above + * copyright notice, this list of conditions and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ #include "libfdt_env.h" #include <fdt.h> diff --git a/scripts/dtc/libfdt/fdt_ro.c b/scripts/dtc/libfdt/fdt_ro.c index 08de2cce674..dfb3236da38 100644 --- a/scripts/dtc/libfdt/fdt_ro.c +++ b/scripts/dtc/libfdt/fdt_ro.c @@ -55,12 +55,13 @@ #include "libfdt_internal.h" -static int _fdt_nodename_eq(const void *fdt, int offset, +static int fdt_nodename_eq_(const void *fdt, int offset, const char *s, int len) { - const char *p = fdt_offset_ptr(fdt, offset + FDT_TAGSIZE, len+1); + int olen; + const char *p = fdt_get_name(fdt, offset, &olen); - if (!p) + if (!p || olen < len) /* short match */ return 0; @@ -80,7 +81,7 @@ const char *fdt_string(const void *fdt, int stroffset) return (const char *)fdt + fdt_off_dt_strings(fdt) + stroffset; } -static int _fdt_string_eq(const void *fdt, int stroffset, +static int fdt_string_eq_(const void *fdt, int stroffset, const char *s, int len) { const char *p = fdt_string(fdt, stroffset); @@ -117,8 +118,8 @@ uint32_t fdt_get_max_phandle(const void *fdt) int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size) { FDT_CHECK_HEADER(fdt); - *address = fdt64_to_cpu(_fdt_mem_rsv(fdt, n)->address); - *size = fdt64_to_cpu(_fdt_mem_rsv(fdt, n)->size); + *address = fdt64_to_cpu(fdt_mem_rsv_(fdt, n)->address); + *size = fdt64_to_cpu(fdt_mem_rsv_(fdt, n)->size); return 0; } @@ -126,12 +127,12 @@ int fdt_num_mem_rsv(const void *fdt) { int i = 0; - while (fdt64_to_cpu(_fdt_mem_rsv(fdt, i)->size) != 0) + while (fdt64_to_cpu(fdt_mem_rsv_(fdt, i)->size) != 0) i++; return i; } -static int _nextprop(const void *fdt, int offset) +static int nextprop_(const void *fdt, int offset) { uint32_t tag; int nextoffset; @@ -166,7 +167,7 @@ int fdt_subnode_offset_namelen(const void *fdt, int offset, (offset >= 0) && (depth >= 0); offset = fdt_next_node(fdt, offset, &depth)) if ((depth == 1) - && _fdt_nodename_eq(fdt, offset, name, namelen)) + && fdt_nodename_eq_(fdt, offset, name, namelen)) return offset; if (depth < 0) @@ -232,17 +233,35 @@ int fdt_path_offset(const void *fdt, const char *path) const char *fdt_get_name(const void *fdt, int nodeoffset, int *len) { - const struct fdt_node_header *nh = _fdt_offset_ptr(fdt, nodeoffset); + const struct fdt_node_header *nh = fdt_offset_ptr_(fdt, nodeoffset); + const char *nameptr; int err; if (((err = fdt_check_header(fdt)) != 0) - || ((err = _fdt_check_node_offset(fdt, nodeoffset)) < 0)) + || ((err = fdt_check_node_offset_(fdt, nodeoffset)) < 0)) goto fail; + nameptr = nh->name; + + if (fdt_version(fdt) < 0x10) { + /* + * For old FDT versions, match the naming conventions of V16: + * give only the leaf name (after all /). The actual tree + * contents are loosely checked. + */ + const char *leaf; + leaf = strrchr(nameptr, '/'); + if (leaf == NULL) { + err = -FDT_ERR_BADSTRUCTURE; + goto fail; + } + nameptr = leaf+1; + } + if (len) - *len = strlen(nh->name); + *len = strlen(nameptr); - return nh->name; + return nameptr; fail: if (len) @@ -254,34 +273,34 @@ int fdt_first_property_offset(const void *fdt, int nodeoffset) { int offset; - if ((offset = _fdt_check_node_offset(fdt, nodeoffset)) < 0) + if ((offset = fdt_check_node_offset_(fdt, nodeoffset)) < 0) return offset; - return _nextprop(fdt, offset); + return nextprop_(fdt, offset); } int fdt_next_property_offset(const void *fdt, int offset) { - if ((offset = _fdt_check_prop_offset(fdt, offset)) < 0) + if ((offset = fdt_check_prop_offset_(fdt, offset)) < 0) return offset; - return _nextprop(fdt, offset); + return nextprop_(fdt, offset); } -const struct fdt_property *fdt_get_property_by_offset(const void *fdt, - int offset, - int *lenp) +static const struct fdt_property *fdt_get_property_by_offset_(const void *fdt, + int offset, + int *lenp) { int err; const struct fdt_property *prop; - if ((err = _fdt_check_prop_offset(fdt, offset)) < 0) { + if ((err = fdt_check_prop_offset_(fdt, offset)) < 0) { if (lenp) *lenp = err; return NULL; } - prop = _fdt_offset_ptr(fdt, offset); + prop = fdt_offset_ptr_(fdt, offset); if (lenp) *lenp = fdt32_to_cpu(prop->len); @@ -289,23 +308,44 @@ const struct fdt_property *fdt_get_property_by_offset(const void *fdt, return prop; } -const struct fdt_property *fdt_get_property_namelen(const void *fdt, - int offset, - const char *name, - int namelen, int *lenp) +const struct fdt_property *fdt_get_property_by_offset(const void *fdt, + int offset, + int *lenp) +{ + /* Prior to version 16, properties may need realignment + * and this API does not work. fdt_getprop_*() will, however. */ + + if (fdt_version(fdt) < 0x10) { + if (lenp) + *lenp = -FDT_ERR_BADVERSION; + return NULL; + } + + return fdt_get_property_by_offset_(fdt, offset, lenp); +} + +static const struct fdt_property *fdt_get_property_namelen_(const void *fdt, + int offset, + const char *name, + int namelen, + int *lenp, + int *poffset) { for (offset = fdt_first_property_offset(fdt, offset); (offset >= 0); (offset = fdt_next_property_offset(fdt, offset))) { const struct fdt_property *prop; - if (!(prop = fdt_get_property_by_offset(fdt, offset, lenp))) { + if (!(prop = fdt_get_property_by_offset_(fdt, offset, lenp))) { offset = -FDT_ERR_INTERNAL; break; } - if (_fdt_string_eq(fdt, fdt32_to_cpu(prop->nameoff), - name, namelen)) + if (fdt_string_eq_(fdt, fdt32_to_cpu(prop->nameoff), + name, namelen)) { + if (poffset) + *poffset = offset; return prop; + } } if (lenp) @@ -313,6 +353,25 @@ const struct fdt_property *fdt_get_property_namelen(const void *fdt, return NULL; } + +const struct fdt_property *fdt_get_property_namelen(const void *fdt, + int offset, + const char *name, + int namelen, int *lenp) +{ + /* Prior to version 16, properties may need realignment + * and this API does not work. fdt_getprop_*() will, however. */ + if (fdt_version(fdt) < 0x10) { + if (lenp) + *lenp = -FDT_ERR_BADVERSION; + return NULL; + } + + return fdt_get_property_namelen_(fdt, offset, name, namelen, lenp, + NULL); +} + + const struct fdt_property *fdt_get_property(const void *fdt, int nodeoffset, const char *name, int *lenp) @@ -324,12 +383,18 @@ const struct fdt_property *fdt_get_property(const void *fdt, const void *fdt_getprop_namelen(const void *fdt, int nodeoffset, const char *name, int namelen, int *lenp) { + int poffset; const struct fdt_property *prop; - prop = fdt_get_property_namelen(fdt, nodeoffset, name, namelen, lenp); + prop = fdt_get_property_namelen_(fdt, nodeoffset, name, namelen, lenp, + &poffset); if (!prop) return NULL; + /* Handle realignment */ + if (fdt_version(fdt) < 0x10 && (poffset + sizeof(*prop)) % 8 && + fdt32_to_cpu(prop->len) >= 8) + return prop->data + 4; return prop->data; } @@ -338,11 +403,16 @@ const void *fdt_getprop_by_offset(const void *fdt, int offset, { const struct fdt_property *prop; - prop = fdt_get_property_by_offset(fdt, offset, lenp); + prop = fdt_get_property_by_offset_(fdt, offset, lenp); if (!prop) return NULL; if (namep) *namep = fdt_string(fdt, fdt32_to_cpu(prop->nameoff)); + + /* Handle realignment */ + if (fdt_version(fdt) < 0x10 && (offset + sizeof(*prop)) % 8 && + fdt32_to_cpu(prop->len) >= 8) + return prop->data + 4; return prop->data; } diff --git a/scripts/dtc/libfdt/fdt_rw.c b/scripts/dtc/libfdt/fdt_rw.c index 5c3a2bb0bc6..9b829051e44 100644 --- a/scripts/dtc/libfdt/fdt_rw.c +++ b/scripts/dtc/libfdt/fdt_rw.c @@ -55,8 +55,8 @@ #include "libfdt_internal.h" -static int _fdt_blocks_misordered(const void *fdt, - int mem_rsv_size, int struct_size) +static int fdt_blocks_misordered_(const void *fdt, + int mem_rsv_size, int struct_size) { return (fdt_off_mem_rsvmap(fdt) < FDT_ALIGN(sizeof(struct fdt_header), 8)) || (fdt_off_dt_struct(fdt) < @@ -67,13 +67,13 @@ static int _fdt_blocks_misordered(const void *fdt, (fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt))); } -static int _fdt_rw_check_header(void *fdt) +static int fdt_rw_check_header_(void *fdt) { FDT_CHECK_HEADER(fdt); if (fdt_version(fdt) < 17) return -FDT_ERR_BADVERSION; - if (_fdt_blocks_misordered(fdt, sizeof(struct fdt_reserve_entry), + if (fdt_blocks_misordered_(fdt, sizeof(struct fdt_reserve_entry), fdt_size_dt_struct(fdt))) return -FDT_ERR_BADLAYOUT; if (fdt_version(fdt) > 17) @@ -84,20 +84,20 @@ static int _fdt_rw_check_header(void *fdt) #define FDT_RW_CHECK_HEADER(fdt) \ { \ - int __err; \ - if ((__err = _fdt_rw_check_header(fdt)) != 0) \ - return __err; \ + int err_; \ + if ((err_ = fdt_rw_check_header_(fdt)) != 0) \ + return err_; \ } -static inline int _fdt_data_size(void *fdt) +static inline int fdt_data_size_(void *fdt) { return fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt); } -static int _fdt_splice(void *fdt, void *splicepoint, int oldlen, int newlen) +static int fdt_splice_(void *fdt, void *splicepoint, int oldlen, int newlen) { char *p = splicepoint; - char *end = (char *)fdt + _fdt_data_size(fdt); + char *end = (char *)fdt + fdt_data_size_(fdt); if (((p + oldlen) < p) || ((p + oldlen) > end)) return -FDT_ERR_BADOFFSET; @@ -109,12 +109,12 @@ static int _fdt_splice(void *fdt, void *splicepoint, int oldlen, int newlen) return 0; } -static int _fdt_splice_mem_rsv(void *fdt, struct fdt_reserve_entry *p, +static int fdt_splice_mem_rsv_(void *fdt, struct fdt_reserve_entry *p, int oldn, int newn) { int delta = (newn - oldn) * sizeof(*p); int err; - err = _fdt_splice(fdt, p, oldn * sizeof(*p), newn * sizeof(*p)); + err = fdt_splice_(fdt, p, oldn * sizeof(*p), newn * sizeof(*p)); if (err) return err; fdt_set_off_dt_struct(fdt, fdt_off_dt_struct(fdt) + delta); @@ -122,13 +122,13 @@ static int _fdt_splice_mem_rsv(void *fdt, struct fdt_reserve_entry *p, return 0; } -static int _fdt_splice_struct(void *fdt, void *p, +static int fdt_splice_struct_(void *fdt, void *p, int oldlen, int newlen) { int delta = newlen - oldlen; int err; - if ((err = _fdt_splice(fdt, p, oldlen, newlen))) + if ((err = fdt_splice_(fdt, p, oldlen, newlen))) return err; fdt_set_size_dt_struct(fdt, fdt_size_dt_struct(fdt) + delta); @@ -136,20 +136,20 @@ static int _fdt_splice_struct(void *fdt, void *p, return 0; } -static int _fdt_splice_string(void *fdt, int newlen) +static int fdt_splice_string_(void *fdt, int newlen) { void *p = (char *)fdt + fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt); int err; - if ((err = _fdt_splice(fdt, p, 0, newlen))) + if ((err = fdt_splice_(fdt, p, 0, newlen))) return err; fdt_set_size_dt_strings(fdt, fdt_size_dt_strings(fdt) + newlen); return 0; } -static int _fdt_find_add_string(void *fdt, const char *s) +static int fdt_find_add_string_(void *fdt, const char *s) { char *strtab = (char *)fdt + fdt_off_dt_strings(fdt); const char *p; @@ -157,13 +157,13 @@ static int _fdt_find_add_string(void *fdt, const char *s) int len = strlen(s) + 1; int err; - p = _fdt_find_string(strtab, fdt_size_dt_strings(fdt), s); + p = fdt_find_string_(strtab, fdt_size_dt_strings(fdt), s); if (p) /* found it */ return (p - strtab); new = strtab + fdt_size_dt_strings(fdt); - err = _fdt_splice_string(fdt, len); + err = fdt_splice_string_(fdt, len); if (err) return err; @@ -178,8 +178,8 @@ int fdt_add_mem_rsv(void *fdt, uint64_t address, uint64_t size) FDT_RW_CHECK_HEADER(fdt); - re = _fdt_mem_rsv_w(fdt, fdt_num_mem_rsv(fdt)); - err = _fdt_splice_mem_rsv(fdt, re, 0, 1); + re = fdt_mem_rsv_w_(fdt, fdt_num_mem_rsv(fdt)); + err = fdt_splice_mem_rsv_(fdt, re, 0, 1); if (err) return err; @@ -190,17 +190,17 @@ int fdt_add_mem_rsv(void *fdt, uint64_t address, uint64_t size) int fdt_del_mem_rsv(void *fdt, int n) { - struct fdt_reserve_entry *re = _fdt_mem_rsv_w(fdt, n); + struct fdt_reserve_entry *re = fdt_mem_rsv_w_(fdt, n); FDT_RW_CHECK_HEADER(fdt); if (n >= fdt_num_mem_rsv(fdt)) return -FDT_ERR_NOTFOUND; - return _fdt_splice_mem_rsv(fdt, re, 1, 0); + return fdt_splice_mem_rsv_(fdt, re, 1, 0); } -static int _fdt_resize_property(void *fdt, int nodeoffset, const char *name, +static int fdt_resize_property_(void *fdt, int nodeoffset, const char *name, int len, struct fdt_property **prop) { int oldlen; @@ -210,7 +210,7 @@ static int _fdt_resize_property(void *fdt, int nodeoffset, const char *name, if (!*prop) return oldlen; - if ((err = _fdt_splice_struct(fdt, (*prop)->data, FDT_TAGALIGN(oldlen), + if ((err = fdt_splice_struct_(fdt, (*prop)->data, FDT_TAGALIGN(oldlen), FDT_TAGALIGN(len)))) return err; @@ -218,7 +218,7 @@ static int _fdt_resize_property(void *fdt, int nodeoffset, const char *name, return 0; } -static int _fdt_add_property(void *fdt, int nodeoffset, const char *name, +static int fdt_add_property_(void *fdt, int nodeoffset, const char *name, int len, struct fdt_property **prop) { int proplen; @@ -226,17 +226,17 @@ static int _fdt_add_property(void *fdt, int nodeoffset, const char *name, int namestroff; int err; - if ((nextoffset = _fdt_check_node_offset(fdt, nodeoffset)) < 0) + if ((nextoffset = fdt_check_node_offset_(fdt, nodeoffset)) < 0) return nextoffset; - namestroff = _fdt_find_add_string(fdt, name); + namestroff = fdt_find_add_string_(fdt, name); if (namestroff < 0) return namestroff; - *prop = _fdt_offset_ptr_w(fdt, nextoffset); + *prop = fdt_offset_ptr_w_(fdt, nextoffset); proplen = sizeof(**prop) + FDT_TAGALIGN(len); - err = _fdt_splice_struct(fdt, *prop, 0, proplen); + err = fdt_splice_struct_(fdt, *prop, 0, proplen); if (err) return err; @@ -260,7 +260,7 @@ int fdt_set_name(void *fdt, int nodeoffset, const char *name) newlen = strlen(name); - err = _fdt_splice_struct(fdt, namep, FDT_TAGALIGN(oldlen+1), + err = fdt_splice_struct_(fdt, namep, FDT_TAGALIGN(oldlen+1), FDT_TAGALIGN(newlen+1)); if (err) return err; @@ -277,9 +277,9 @@ int fdt_setprop_placeholder(void *fdt, int nodeoffset, const char *name, FDT_RW_CHECK_HEADER(fdt); - err = _fdt_resize_property(fdt, nodeoffset, name, len, &prop); + err = fdt_resize_property_(fdt, nodeoffset, name, len, &prop); if (err == -FDT_ERR_NOTFOUND) - err = _fdt_add_property(fdt, nodeoffset, name, len, &prop); + err = fdt_add_property_(fdt, nodeoffset, name, len, &prop); if (err) return err; @@ -313,7 +313,7 @@ int fdt_appendprop(void *fdt, int nodeoffset, const char *name, prop = fdt_get_property_w(fdt, nodeoffset, name, &oldlen); if (prop) { newlen = len + oldlen; - err = _fdt_splice_struct(fdt, prop->data, + err = fdt_splice_struct_(fdt, prop->data, FDT_TAGALIGN(oldlen), FDT_TAGALIGN(newlen)); if (err) @@ -321,7 +321,7 @@ int fdt_appendprop(void *fdt, int nodeoffset, const char *name, prop->len = cpu_to_fdt32(newlen); memcpy(prop->data + oldlen, val, len); } else { - err = _fdt_add_property(fdt, nodeoffset, name, len, &prop); + err = fdt_add_property_(fdt, nodeoffset, name, len, &prop); if (err) return err; memcpy(prop->data, val, len); @@ -341,7 +341,7 @@ int fdt_delprop(void *fdt, int nodeoffset, const char *name) return len; proplen = sizeof(*prop) + FDT_TAGALIGN(len); - return _fdt_splice_struct(fdt, prop, proplen, 0); + return fdt_splice_struct_(fdt, prop, proplen, 0); } int fdt_add_subnode_namelen(void *fdt, int parentoffset, @@ -369,10 +369,10 @@ int fdt_add_subnode_namelen(void *fdt, int parentoffset, tag = fdt_next_tag(fdt, offset, &nextoffset); } while ((tag == FDT_PROP) || (tag == FDT_NOP)); - nh = _fdt_offset_ptr_w(fdt, offset); + nh = fdt_offset_ptr_w_(fdt, offset); nodelen = sizeof(*nh) + FDT_TAGALIGN(namelen+1) + FDT_TAGSIZE; - err = _fdt_splice_struct(fdt, nh, 0, nodelen); + err = fdt_splice_struct_(fdt, nh, 0, nodelen); if (err) return err; @@ -396,15 +396,15 @@ int fdt_del_node(void *fdt, int nodeoffset) FDT_RW_CHECK_HEADER(fdt); - endoffset = _fdt_node_end_offset(fdt, nodeoffset); + endoffset = fdt_node_end_offset_(fdt, nodeoffset); if (endoffset < 0) return endoffset; - return _fdt_splice_struct(fdt, _fdt_offset_ptr_w(fdt, nodeoffset), + return fdt_splice_struct_(fdt, fdt_offset_ptr_w_(fdt, nodeoffset), endoffset - nodeoffset, 0); } -static void _fdt_packblocks(const char *old, char *new, +static void fdt_packblocks_(const char *old, char *new, int mem_rsv_size, int struct_size) { int mem_rsv_off, struct_off, strings_off; @@ -450,7 +450,7 @@ int fdt_open_into(const void *fdt, void *buf, int bufsize) return struct_size; } - if (!_fdt_blocks_misordered(fdt, mem_rsv_size, struct_size)) { + if (!fdt_blocks_misordered_(fdt, mem_rsv_size, struct_size)) { /* no further work necessary */ err = fdt_move(fdt, buf, bufsize); if (err) @@ -478,7 +478,7 @@ int fdt_open_into(const void *fdt, void *buf, int bufsize) return -FDT_ERR_NOSPACE; } - _fdt_packblocks(fdt, tmp, mem_rsv_size, struct_size); + fdt_packblocks_(fdt, tmp, mem_rsv_size, struct_size); memmove(buf, tmp, newsize); fdt_set_magic(buf, FDT_MAGIC); @@ -498,8 +498,8 @@ int fdt_pack(void *fdt) mem_rsv_size = (fdt_num_mem_rsv(fdt)+1) * sizeof(struct fdt_reserve_entry); - _fdt_packblocks(fdt, fdt, mem_rsv_size, fdt_size_dt_struct(fdt)); - fdt_set_totalsize(fdt, _fdt_data_size(fdt)); + fdt_packblocks_(fdt, fdt, mem_rsv_size, fdt_size_dt_struct(fdt)); + fdt_set_totalsize(fdt, fdt_data_size_(fdt)); return 0; } diff --git a/scripts/dtc/libfdt/fdt_sw.c b/scripts/dtc/libfdt/fdt_sw.c index 2bd15e7aef8..6d33cc29d02 100644 --- a/scripts/dtc/libfdt/fdt_sw.c +++ b/scripts/dtc/libfdt/fdt_sw.c @@ -55,7 +55,7 @@ #include "libfdt_internal.h" -static int _fdt_sw_check_header(void *fdt) +static int fdt_sw_check_header_(void *fdt) { if (fdt_magic(fdt) != FDT_SW_MAGIC) return -FDT_ERR_BADMAGIC; @@ -66,11 +66,11 @@ static int _fdt_sw_check_header(void *fdt) #define FDT_SW_CHECK_HEADER(fdt) \ { \ int err; \ - if ((err = _fdt_sw_check_header(fdt)) != 0) \ + if ((err = fdt_sw_check_header_(fdt)) != 0) \ return err; \ } -static void *_fdt_grab_space(void *fdt, size_t len) +static void *fdt_grab_space_(void *fdt, size_t len) { int offset = fdt_size_dt_struct(fdt); int spaceleft; @@ -82,7 +82,7 @@ static void *_fdt_grab_space(void *fdt, size_t len) return NULL; fdt_set_size_dt_struct(fdt, offset + len); - return _fdt_offset_ptr_w(fdt, offset); + return fdt_offset_ptr_w_(fdt, offset); } int fdt_create(void *buf, int bufsize) @@ -174,7 +174,7 @@ int fdt_begin_node(void *fdt, const char *name) FDT_SW_CHECK_HEADER(fdt); - nh = _fdt_grab_space(fdt, sizeof(*nh) + FDT_TAGALIGN(namelen)); + nh = fdt_grab_space_(fdt, sizeof(*nh) + FDT_TAGALIGN(namelen)); if (! nh) return -FDT_ERR_NOSPACE; @@ -189,7 +189,7 @@ int fdt_end_node(void *fdt) FDT_SW_CHECK_HEADER(fdt); - en = _fdt_grab_space(fdt, FDT_TAGSIZE); + en = fdt_grab_space_(fdt, FDT_TAGSIZE); if (! en) return -FDT_ERR_NOSPACE; @@ -197,7 +197,7 @@ int fdt_end_node(void *fdt) return 0; } -static int _fdt_find_add_string(void *fdt, const char *s) +static int fdt_find_add_string_(void *fdt, const char *s) { char *strtab = (char *)fdt + fdt_totalsize(fdt); const char *p; @@ -205,7 +205,7 @@ static int _fdt_find_add_string(void *fdt, const char *s) int len = strlen(s) + 1; int struct_top, offset; - p = _fdt_find_string(strtab - strtabsize, strtabsize, s); + p = fdt_find_string_(strtab - strtabsize, strtabsize, s); if (p) return p - strtab; @@ -227,11 +227,11 @@ int fdt_property_placeholder(void *fdt, const char *name, int len, void **valp) FDT_SW_CHECK_HEADER(fdt); - nameoff = _fdt_find_add_string(fdt, name); + nameoff = fdt_find_add_string_(fdt, name); if (nameoff == 0) return -FDT_ERR_NOSPACE; - prop = _fdt_grab_space(fdt, sizeof(*prop) + FDT_TAGALIGN(len)); + prop = fdt_grab_space_(fdt, sizeof(*prop) + FDT_TAGALIGN(len)); if (! prop) return -FDT_ERR_NOSPACE; @@ -265,7 +265,7 @@ int fdt_finish(void *fdt) FDT_SW_CHECK_HEADER(fdt); /* Add terminator */ - end = _fdt_grab_space(fdt, sizeof(*end)); + end = fdt_grab_space_(fdt, sizeof(*end)); if (! end) return -FDT_ERR_NOSPACE; *end = cpu_to_fdt32(FDT_END); @@ -281,7 +281,7 @@ int fdt_finish(void *fdt) while ((tag = fdt_next_tag(fdt, offset, &nextoffset)) != FDT_END) { if (tag == FDT_PROP) { struct fdt_property *prop = - _fdt_offset_ptr_w(fdt, offset); + fdt_offset_ptr_w_(fdt, offset); int nameoff; nameoff = fdt32_to_cpu(prop->nameoff); diff --git a/scripts/dtc/libfdt/fdt_wip.c b/scripts/dtc/libfdt/fdt_wip.c index 5e859198622..534c1cbbb2f 100644 --- a/scripts/dtc/libfdt/fdt_wip.c +++ b/scripts/dtc/libfdt/fdt_wip.c @@ -93,7 +93,7 @@ int fdt_setprop_inplace(void *fdt, int nodeoffset, const char *name, val, len); } -static void _fdt_nop_region(void *start, int len) +static void fdt_nop_region_(void *start, int len) { fdt32_t *p; @@ -110,12 +110,12 @@ int fdt_nop_property(void *fdt, int nodeoffset, const char *name) if (!prop) return len; - _fdt_nop_region(prop, len + sizeof(*prop)); + fdt_nop_region_(prop, len + sizeof(*prop)); return 0; } -int _fdt_node_end_offset(void *fdt, int offset) +int fdt_node_end_offset_(void *fdt, int offset) { int depth = 0; @@ -129,11 +129,11 @@ int fdt_nop_node(void *fdt, int nodeoffset) { int endoffset; - endoffset = _fdt_node_end_offset(fdt, nodeoffset); + endoffset = fdt_node_end_offset_(fdt, nodeoffset); if (endoffset < 0) return endoffset; - _fdt_nop_region(fdt_offset_ptr_w(fdt, nodeoffset, 0), + fdt_nop_region_(fdt_offset_ptr_w(fdt, nodeoffset, 0), endoffset - nodeoffset); return 0; } diff --git a/scripts/dtc/libfdt/libfdt.h b/scripts/dtc/libfdt/libfdt.h index 7f83023ee10..1e27780e118 100644 --- a/scripts/dtc/libfdt/libfdt.h +++ b/scripts/dtc/libfdt/libfdt.h @@ -1,5 +1,5 @@ -#ifndef _LIBFDT_H -#define _LIBFDT_H +#ifndef LIBFDT_H +#define LIBFDT_H /* * libfdt - Flat Device Tree manipulation * Copyright (C) 2006 David Gibson, IBM Corporation. @@ -54,7 +54,7 @@ #include "libfdt_env.h" #include "fdt.h" -#define FDT_FIRST_SUPPORTED_VERSION 0x10 +#define FDT_FIRST_SUPPORTED_VERSION 0x02 #define FDT_LAST_SUPPORTED_VERSION 0x11 /* Error codes: informative error codes */ @@ -225,23 +225,23 @@ int fdt_next_subnode(const void *fdt, int offset); #define fdt_size_dt_strings(fdt) (fdt_get_header(fdt, size_dt_strings)) #define fdt_size_dt_struct(fdt) (fdt_get_header(fdt, size_dt_struct)) -#define __fdt_set_hdr(name) \ +#define fdt_set_hdr_(name) \ static inline void fdt_set_##name(void *fdt, uint32_t val) \ { \ struct fdt_header *fdth = (struct fdt_header *)fdt; \ fdth->name = cpu_to_fdt32(val); \ } -__fdt_set_hdr(magic); -__fdt_set_hdr(totalsize); -__fdt_set_hdr(off_dt_struct); -__fdt_set_hdr(off_dt_strings); -__fdt_set_hdr(off_mem_rsvmap); -__fdt_set_hdr(version); -__fdt_set_hdr(last_comp_version); -__fdt_set_hdr(boot_cpuid_phys); -__fdt_set_hdr(size_dt_strings); -__fdt_set_hdr(size_dt_struct); -#undef __fdt_set_hdr +fdt_set_hdr_(magic); +fdt_set_hdr_(totalsize); +fdt_set_hdr_(off_dt_struct); +fdt_set_hdr_(off_dt_strings); +fdt_set_hdr_(off_mem_rsvmap); +fdt_set_hdr_(version); +fdt_set_hdr_(last_comp_version); +fdt_set_hdr_(boot_cpuid_phys); +fdt_set_hdr_(size_dt_strings); +fdt_set_hdr_(size_dt_struct); +#undef fdt_set_hdr_ /** * fdt_check_header - sanity check a device tree or possible device tree @@ -527,6 +527,9 @@ int fdt_next_property_offset(const void *fdt, int offset); * offset. If lenp is non-NULL, the length of the property value is * also returned, in the integer pointed to by lenp. * + * Note that this code only works on device tree versions >= 16. fdt_getprop() + * works on all versions. + * * returns: * pointer to the structure representing the property * if lenp is non-NULL, *lenp contains the length of the property @@ -1449,7 +1452,7 @@ int fdt_setprop(void *fdt, int nodeoffset, const char *name, const void *val, int len); /** - * fdt_setprop _placeholder - allocate space for a property + * fdt_setprop_placeholder - allocate space for a property * @fdt: pointer to the device tree blob * @nodeoffset: offset of the node whose property to change * @name: name of the property to change @@ -1896,4 +1899,4 @@ int fdt_overlay_apply(void *fdt, void *fdto); const char *fdt_strerror(int errval); -#endif /* _LIBFDT_H */ +#endif /* LIBFDT_H */ diff --git a/scripts/dtc/libfdt/libfdt_env.h b/scripts/dtc/libfdt/libfdt_env.h index 952056cddf0..bd247462877 100644 --- a/scripts/dtc/libfdt/libfdt_env.h +++ b/scripts/dtc/libfdt/libfdt_env.h @@ -1,5 +1,5 @@ -#ifndef _LIBFDT_ENV_H -#define _LIBFDT_ENV_H +#ifndef LIBFDT_ENV_H +#define LIBFDT_ENV_H /* * libfdt - Flat Device Tree manipulation * Copyright (C) 2006 David Gibson, IBM Corporation. @@ -109,4 +109,31 @@ static inline fdt64_t cpu_to_fdt64(uint64_t x) #undef CPU_TO_FDT16 #undef EXTRACT_BYTE -#endif /* _LIBFDT_ENV_H */ +#ifdef __APPLE__ +#include <AvailabilityMacros.h> + +/* strnlen() is not available on Mac OS < 10.7 */ +# if !defined(MAC_OS_X_VERSION_10_7) || (MAC_OS_X_VERSION_MAX_ALLOWED < \ + MAC_OS_X_VERSION_10_7) + +#define strnlen fdt_strnlen + +/* + * fdt_strnlen: returns the length of a string or max_count - which ever is + * smallest. + * Input 1 string: the string whose size is to be determined + * Input 2 max_count: the maximum value returned by this function + * Output: length of the string or max_count (the smallest of the two) + */ +static inline size_t fdt_strnlen(const char *string, size_t max_count) +{ + const char *p = memchr(string, 0, max_count); + return p ? p - string : max_count; +} + +#endif /* !defined(MAC_OS_X_VERSION_10_7) || (MAC_OS_X_VERSION_MAX_ALLOWED < + MAC_OS_X_VERSION_10_7) */ + +#endif /* __APPLE__ */ + +#endif /* LIBFDT_ENV_H */ diff --git a/scripts/dtc/libfdt/libfdt_internal.h b/scripts/dtc/libfdt/libfdt_internal.h index 02cfa6fb612..7681e192295 100644 --- a/scripts/dtc/libfdt/libfdt_internal.h +++ b/scripts/dtc/libfdt/libfdt_internal.h @@ -1,5 +1,5 @@ -#ifndef _LIBFDT_INTERNAL_H -#define _LIBFDT_INTERNAL_H +#ifndef LIBFDT_INTERNAL_H +#define LIBFDT_INTERNAL_H /* * libfdt - Flat Device Tree manipulation * Copyright (C) 2006 David Gibson, IBM Corporation. @@ -57,27 +57,27 @@ #define FDT_CHECK_HEADER(fdt) \ { \ - int __err; \ - if ((__err = fdt_check_header(fdt)) != 0) \ - return __err; \ + int err_; \ + if ((err_ = fdt_check_header(fdt)) != 0) \ + return err_; \ } -int _fdt_check_node_offset(const void *fdt, int offset); -int _fdt_check_prop_offset(const void *fdt, int offset); -const char *_fdt_find_string(const char *strtab, int tabsize, const char *s); -int _fdt_node_end_offset(void *fdt, int nodeoffset); +int fdt_check_node_offset_(const void *fdt, int offset); +int fdt_check_prop_offset_(const void *fdt, int offset); +const char *fdt_find_string_(const char *strtab, int tabsize, const char *s); +int fdt_node_end_offset_(void *fdt, int nodeoffset); -static inline const void *_fdt_offset_ptr(const void *fdt, int offset) +static inline const void *fdt_offset_ptr_(const void *fdt, int offset) { return (const char *)fdt + fdt_off_dt_struct(fdt) + offset; } -static inline void *_fdt_offset_ptr_w(void *fdt, int offset) +static inline void *fdt_offset_ptr_w_(void *fdt, int offset) { - return (void *)(uintptr_t)_fdt_offset_ptr(fdt, offset); + return (void *)(uintptr_t)fdt_offset_ptr_(fdt, offset); } -static inline const struct fdt_reserve_entry *_fdt_mem_rsv(const void *fdt, int n) +static inline const struct fdt_reserve_entry *fdt_mem_rsv_(const void *fdt, int n) { const struct fdt_reserve_entry *rsv_table = (const struct fdt_reserve_entry *) @@ -85,11 +85,11 @@ static inline const struct fdt_reserve_entry *_fdt_mem_rsv(const void *fdt, int return rsv_table + n; } -static inline struct fdt_reserve_entry *_fdt_mem_rsv_w(void *fdt, int n) +static inline struct fdt_reserve_entry *fdt_mem_rsv_w_(void *fdt, int n) { - return (void *)(uintptr_t)_fdt_mem_rsv(fdt, n); + return (void *)(uintptr_t)fdt_mem_rsv_(fdt, n); } #define FDT_SW_MAGIC (~FDT_MAGIC) -#endif /* _LIBFDT_INTERNAL_H */ +#endif /* LIBFDT_INTERNAL_H */ diff --git a/scripts/dtc/livetree.c b/scripts/dtc/livetree.c index 6846ad2fd6d..57b7db2ed15 100644 --- a/scripts/dtc/livetree.c +++ b/scripts/dtc/livetree.c @@ -216,7 +216,7 @@ struct node *merge_nodes(struct node *old_node, struct node *new_node) return old_node; } -void add_orphan_node(struct node *dt, struct node *new_node, char *ref) +struct node * add_orphan_node(struct node *dt, struct node *new_node, char *ref) { static unsigned int next_orphan_fragment = 0; struct node *node; @@ -236,6 +236,7 @@ void add_orphan_node(struct node *dt, struct node *new_node, char *ref) name_node(node, name); add_child(dt, node); + return dt; } struct node *chain_node(struct node *first, struct node *list) @@ -507,7 +508,7 @@ struct node *get_node_by_path(struct node *tree, const char *path) for_each_child(tree, child) { if (p && (strlen(child->name) == p-path) && - strneq(path, child->name, p-path)) + strprefixeq(path, p - path, child->name)) return get_node_by_path(child, p+1); else if (!p && streq(path, child->name)) return child; @@ -540,7 +541,10 @@ struct node *get_node_by_phandle(struct node *tree, cell_t phandle) { struct node *child, *node; - assert((phandle != 0) && (phandle != -1)); + if ((phandle == 0) || (phandle == -1)) { + assert(generate_fixups); + return NULL; + } if (tree->phandle == phandle) { if (tree->deleted) diff --git a/scripts/dtc/pylibfdt/Makefile b/scripts/dtc/pylibfdt/Makefile index 01d5e0ffe30..c769d7db062 100644 --- a/scripts/dtc/pylibfdt/Makefile +++ b/scripts/dtc/pylibfdt/Makefile @@ -14,7 +14,8 @@ PYLIBFDT_srcs = $(addprefix $(LIBFDT_srcdir)/,$(LIBFDT_SRCS)) \ $(obj)/libfdt.i quiet_cmd_pymod = PYMOD $@ - cmd_pymod = unset CC; unset CROSS_COMPILE; unset CFLAGS;\ + cmd_pymod = unset CROSS_COMPILE; unset CFLAGS; \ + CC="$(HOSTCC)" LDSHARED="$(HOSTCC) -shared " \ LDFLAGS="$(HOSTLDFLAGS)" \ VERSION="u-boot-$(UBOOTVERSION)" \ CPPFLAGS="$(HOSTCFLAGS) -I$(LIBFDT_srcdir)" OBJDIR=$(obj) \ diff --git a/scripts/dtc/srcpos.c b/scripts/dtc/srcpos.c index 9d38459902f..cb6ed0e3e5e 100644 --- a/scripts/dtc/srcpos.c +++ b/scripts/dtc/srcpos.c @@ -209,8 +209,6 @@ struct srcpos srcpos_empty = { .file = NULL, }; -#define TAB_SIZE 8 - void srcpos_update(struct srcpos *pos, const char *text, int len) { int i; @@ -224,9 +222,6 @@ void srcpos_update(struct srcpos *pos, const char *text, int len) if (text[i] == '\n') { current_srcfile->lineno++; current_srcfile->colno = 1; - } else if (text[i] == '\t') { - current_srcfile->colno = - ALIGN(current_srcfile->colno, TAB_SIZE); } else { current_srcfile->colno++; } diff --git a/scripts/dtc/srcpos.h b/scripts/dtc/srcpos.h index 7caca8257c6..9ded12a3830 100644 --- a/scripts/dtc/srcpos.h +++ b/scripts/dtc/srcpos.h @@ -17,8 +17,8 @@ * USA */ -#ifndef _SRCPOS_H_ -#define _SRCPOS_H_ +#ifndef SRCPOS_H +#define SRCPOS_H #include <stdio.h> #include <stdbool.h> @@ -114,4 +114,4 @@ extern void PRINTF(3, 4) srcpos_error(struct srcpos *pos, const char *prefix, extern void srcpos_set_line(char *f, int l); -#endif /* _SRCPOS_H_ */ +#endif /* SRCPOS_H */ diff --git a/scripts/dtc/update-dtc-source.sh b/scripts/dtc/update-dtc-source.sh index f3e5c596050..1a009fd195d 100755 --- a/scripts/dtc/update-dtc-source.sh +++ b/scripts/dtc/update-dtc-source.sh @@ -1,9 +1,10 @@ #!/bin/sh +# SPDX-License-Identifier: GPL-2.0 # Simple script to update the version of DTC carried by the Linux kernel # # This script assumes that the dtc and the linux git trees are in the # same directory. After building dtc in the dtc directory, it copies the -# source files and generated source files into the scripts/dtc directory +# source files and generated source file(s) into the scripts/dtc directory # in the kernel and creates a git commit updating them to the new # version. # @@ -33,7 +34,6 @@ DTC_LINUX_PATH=`pwd`/scripts/dtc DTC_SOURCE="checks.c data.c dtc.c dtc.h flattree.c fstree.c livetree.c srcpos.c \ srcpos.h treesource.c util.c util.h version_gen.h Makefile.dtc \ dtc-lexer.l dtc-parser.y" -DTC_GENERATED="dtc-lexer.lex.c dtc-parser.tab.c dtc-parser.tab.h" LIBFDT_SOURCE="Makefile.libfdt fdt.c fdt.h fdt_addresses.c fdt_empty_tree.c \ fdt_overlay.c fdt_ro.c fdt_rw.c fdt_strerror.c fdt_sw.c \ fdt_wip.c libfdt.h libfdt_env.h libfdt_internal.h" @@ -58,10 +58,6 @@ for f in $DTC_SOURCE; do cp ${DTC_UPSTREAM_PATH}/${f} ${f} git add ${f} done -for f in $DTC_GENERATED; do - cp ${DTC_UPSTREAM_PATH}/$f ${f}_shipped - git add ${f}_shipped -done for f in $LIBFDT_SOURCE; do cp ${DTC_UPSTREAM_PATH}/libfdt/${f} libfdt/${f} git add libfdt/${f} diff --git a/scripts/dtc/util.h b/scripts/dtc/util.h index ad5f41199ed..66fba8ea709 100644 --- a/scripts/dtc/util.h +++ b/scripts/dtc/util.h @@ -1,5 +1,5 @@ -#ifndef _UTIL_H -#define _UTIL_H +#ifndef UTIL_H +#define UTIL_H #include <stdarg.h> #include <stdbool.h> @@ -35,6 +35,9 @@ #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) +#define stringify(s) stringify_(s) +#define stringify_(s) #s + static inline void NORETURN PRINTF(1, 2) die(const char *str, ...) { va_list ap; @@ -260,4 +263,4 @@ void NORETURN util_usage(const char *errmsg, const char *synopsis, case 'V': util_version(); \ case '?': usage("unknown option"); -#endif /* _UTIL_H */ +#endif /* UTIL_H */ diff --git a/scripts/dtc/version_gen.h b/scripts/dtc/version_gen.h index d88393cab14..ad87849e333 100644 --- a/scripts/dtc/version_gen.h +++ b/scripts/dtc/version_gen.h @@ -1 +1 @@ -#define DTC_VERSION "DTC 1.4.5-gb1a60033" +#define DTC_VERSION "DTC 1.4.6-gaadd0b65" diff --git a/scripts/kconfig/.gitignore b/scripts/kconfig/.gitignore index be603c4fef6..2da579edcba 100644 --- a/scripts/kconfig/.gitignore +++ b/scripts/kconfig/.gitignore @@ -1,11 +1,6 @@ # # Generated files # -config* -*.lex.c -*.tab.c -*.tab.h -zconf.hash.c *.moc gconf.glade.h *.pot diff --git a/scripts/kconfig/Makefile b/scripts/kconfig/Makefile index 2542b38af36..8b7b3497580 100644 --- a/scripts/kconfig/Makefile +++ b/scripts/kconfig/Makefile @@ -3,7 +3,7 @@ # Kernel configuration targets # These targets are used from top-level makefile -PHONY += xconfig gconfig menuconfig config silentoldconfig update-po-config \ +PHONY += xconfig gconfig menuconfig config syncconfig update-po-config \ localmodconfig localyesconfig # Added for U-Boot @@ -40,24 +40,24 @@ config: $(obj)/conf nconfig: $(obj)/nconf $< $(silent) $(Kconfig) -silentoldconfig: $(obj)/conf +# This has become an internal implementation detail and is now deprecated +# for external use. +syncconfig: $(obj)/conf $(Q)mkdir -p include/config include/generated - $(Q)test -e include/generated/autoksyms.h || \ - touch include/generated/autoksyms.h $< $(silent) --$@ $(Kconfig) -localyesconfig localmodconfig: $(obj)/streamline_config.pl $(obj)/conf +localyesconfig localmodconfig: $(obj)/conf $(Q)mkdir -p include/config include/generated - $(Q)perl $< --$@ $(srctree) $(Kconfig) > .tmp.config + $(Q)perl $(srctree)/$(src)/streamline_config.pl --$@ $(srctree) $(Kconfig) > .tmp.config $(Q)if [ -f .config ]; then \ cmp -s .tmp.config .config || \ (mv -f .config .config.old.1; \ mv -f .tmp.config .config; \ - $(obj)/conf $(silent) --silentoldconfig $(Kconfig); \ + $< $(silent) --oldconfig $(Kconfig); \ mv -f .config.old.1 .config.old) \ else \ mv -f .tmp.config .config; \ - $(obj)/conf $(silent) --silentoldconfig $(Kconfig); \ + $< $(silent) --oldconfig $(Kconfig); \ fi $(Q)rm -f .tmp.config @@ -92,12 +92,21 @@ PHONY += $(simple-targets) $(simple-targets): $(obj)/conf $< $(silent) --$@ $(Kconfig) -PHONY += oldnoconfig savedefconfig defconfig +PHONY += oldnoconfig silentoldconfig savedefconfig defconfig # oldnoconfig is an alias of olddefconfig, because people already are dependent # on its behavior (sets new symbols to their default value but not 'n') with the # counter-intuitive name. oldnoconfig: olddefconfig + @echo " WARNING: \"oldnoconfig\" target will be removed after Linux 4.19" + @echo " Please use \"olddefconfig\" instead, which is an alias." + +# We do not expect manual invokcation of "silentoldcofig" (or "syncconfig"). +silentoldconfig: syncconfig + @echo " WARNING: \"silentoldconfig\" has been renamed to \"syncconfig\"" + @echo " and is now an internal implementation detail." + @echo " What you want is probably \"oldconfig\"." + @echo " \"silentoldconfig\" will be removed after Linux 4.19" savedefconfig: $(obj)/conf $< $(silent) --$@=defconfig $(Kconfig) @@ -141,6 +150,14 @@ PHONY += tinyconfig tinyconfig: $(Q)$(MAKE) -f $(srctree)/Makefile allnoconfig tiny.config +# CHECK: -o cache_dir=<path> working? +PHONY += testconfig +testconfig: $(obj)/conf + $(PYTHON3) -B -m pytest $(srctree)/$(src)/tests \ + -o cache_dir=$(abspath $(obj)/tests/.cache) \ + $(if $(findstring 1,$(KBUILD_VERBOSE)),--capture=no) +clean-dirs += tests/.cache + # Help text used by make help help: @echo ' config - Update current config utilising a line-oriented program' @@ -152,7 +169,6 @@ help: @echo ' oldconfig - Update current config utilising a provided .config as base' @echo ' localmodconfig - Update current config disabling modules not loaded' @echo ' localyesconfig - Update current config converting local mods to core' - @echo ' silentoldconfig - Same as oldconfig, but quietly, additionally update deps' @echo ' defconfig - New config with default from ARCH supplied defconfig' @echo ' savedefconfig - Save current config as ./defconfig (minimal config)' @echo ' allnoconfig - New config where all options are answered with no' @@ -161,8 +177,8 @@ help: @echo ' alldefconfig - New config with all symbols set to default' @echo ' randconfig - New config with random answer to all options' @echo ' listnewconfig - List new options' - @echo ' olddefconfig - Same as silentoldconfig but sets new symbols to their' - @echo ' default value' + @echo ' olddefconfig - Same as oldconfig but sets new symbols to their' + @echo ' default value without prompting' # @echo ' kvmconfig - Enable additional options for kvm guest kernel support' # @echo ' xenconfig - Enable additional options for xen dom0 and guest kernel support' # @echo ' tinyconfig - Configure the tiniest possible kernel' @@ -201,13 +217,14 @@ gconf-objs := gconf.o zconf.tab.o hostprogs-y := conf nconf mconf kxgettext qconf gconf +targets += zconf.lex.c clean-files := qconf.moc .tmp_qtcheck .tmp_gtkcheck -clean-files += zconf.tab.c zconf.lex.c zconf.hash.c gconf.glade.h +clean-files += gconf.glade.h clean-files += config.pot linux.pot # Check that we have the required ncurses stuff installed for lxdialog (menuconfig) PHONY += $(obj)/dochecklxdialog -$(addprefix $(obj)/,$(lxdialog)): $(obj)/dochecklxdialog +$(addprefix $(obj)/, mconf.o $(lxdialog)): $(obj)/dochecklxdialog $(obj)/dochecklxdialog: $(Q)$(CONFIG_SHELL) $(check-lxdialog) -check $(HOSTCC) $(HOST_EXTRACFLAGS) $(HOSTLOADLIBES_mconf) @@ -215,14 +232,12 @@ always := dochecklxdialog # Add environment specific flags HOST_EXTRACFLAGS += $(shell $(CONFIG_SHELL) $(srctree)/$(src)/check.sh $(HOSTCC) $(HOSTCFLAGS)) +HOST_EXTRACXXFLAGS += $(shell $(CONFIG_SHELL) $(srctree)/$(src)/check.sh $(HOSTCXX) $(HOSTCXXFLAGS)) # generated files seem to need this to find local include files HOSTCFLAGS_zconf.lex.o := -I$(src) HOSTCFLAGS_zconf.tab.o := -I$(src) -LEX_PREFIX_zconf := zconf -YACC_PREFIX_zconf := zconf - HOSTLOADLIBES_qconf = $(KC_QT_LIBS) HOSTCXXFLAGS_qconf.o = $(KC_QT_CFLAGS) @@ -291,7 +306,7 @@ $(obj)/.tmp_gtkcheck: fi endif -$(obj)/zconf.tab.o: $(obj)/zconf.lex.c $(obj)/zconf.hash.c +$(obj)/zconf.tab.o: $(obj)/zconf.lex.c $(obj)/qconf.o: $(obj)/qconf.moc diff --git a/scripts/kconfig/check.sh b/scripts/kconfig/check.sh index 55b79ba1ba2..97f0fee7d17 100755 --- a/scripts/kconfig/check.sh +++ b/scripts/kconfig/check.sh @@ -1,4 +1,5 @@ #!/bin/sh +# SPDX-License-Identifier: GPL-2.0 # Needed for systems without gettext $* -x c -o /dev/null - > /dev/null 2>&1 << EOF #include <libintl.h> diff --git a/scripts/kconfig/conf.c b/scripts/kconfig/conf.c index 866369f10ff..283eeedaa4f 100644 --- a/scripts/kconfig/conf.c +++ b/scripts/kconfig/conf.c @@ -20,11 +20,10 @@ static void conf(struct menu *menu); static void check_conf(struct menu *menu); -static void xfgets(char *str, int size, FILE *in); enum input_mode { oldaskconfig, - silentoldconfig, + syncconfig, oldconfig, allnoconfig, allyesconfig, @@ -35,11 +34,11 @@ enum input_mode { savedefconfig, listnewconfig, olddefconfig, -} input_mode = oldaskconfig; +}; +static enum input_mode input_mode = oldaskconfig; static int indent = 1; static int tty_stdio; -static int valid_stdin = 1; static int sync_kconfig; static int conf_cnt; static char line[PATH_MAX]; @@ -72,14 +71,14 @@ static void strip(char *str) *p-- = 0; } -static void check_stdin(void) +/* Helper function to facilitate fgets() by Jean Sacren. */ +static void xfgets(char *str, int size, FILE *in) { - if (!valid_stdin) { - printf(_("aborted!\n\n")); - printf(_("Console input/output is redirected. ")); - printf(_("Run 'make oldconfig' to update configuration.\n\n")); - exit(1); - } + if (!fgets(str, size, in)) + fprintf(stderr, "\nError in reading or end of file.\n"); + + if (!tty_stdio) + printf("%s", str); } static int conf_askvalue(struct symbol *sym, const char *def) @@ -101,18 +100,15 @@ static int conf_askvalue(struct symbol *sym, const char *def) switch (input_mode) { case oldconfig: - case silentoldconfig: + case syncconfig: if (sym_has_value(sym)) { printf("%s\n", def); return 0; } - check_stdin(); /* fall through */ case oldaskconfig: fflush(stdout); xfgets(line, sizeof(line), stdin); - if (!tty_stdio) - printf("\n"); return 1; default: break; @@ -192,9 +188,7 @@ static int conf_sym(struct menu *menu) printf("/m"); if (oldval != yes && sym_tristate_within_range(sym, yes)) printf("/y"); - if (menu_has_help(menu)) - printf("/?"); - printf("] "); + printf("/?] "); if (!conf_askvalue(sym, sym_get_string_value(sym))) return 0; strip(line); @@ -296,19 +290,15 @@ static int conf_choice(struct menu *menu) printf("[1]: 1\n"); goto conf_childs; } - printf("[1-%d", cnt); - if (menu_has_help(menu)) - printf("?"); - printf("]: "); + printf("[1-%d?]: ", cnt); switch (input_mode) { case oldconfig: - case silentoldconfig: + case syncconfig: if (!is_new) { cnt = def; printf("%d\n", cnt); break; } - check_stdin(); /* fall through */ case oldaskconfig: fflush(stdout); @@ -368,10 +358,11 @@ static void conf(struct menu *menu) switch (prop->type) { case P_MENU: - if ((input_mode == silentoldconfig || - input_mode == listnewconfig || - input_mode == olddefconfig) && - rootEntry != menu) { + /* + * Except in oldaskconfig mode, we show only menus that + * contain new symbols. + */ + if (input_mode != oldaskconfig && rootEntry != menu) { check_conf(menu); return; } @@ -431,10 +422,20 @@ static void check_conf(struct menu *menu) if (sym_is_changable(sym) || (sym_is_choice(sym) && sym_get_tristate_value(sym) == yes)) { if (input_mode == listnewconfig) { - if (sym->name && !sym_is_choice_value(sym)) { - printf("%s%s\n", CONFIG_, sym->name); + if (sym->name) { + const char *str; + + if (sym->type == S_STRING) { + str = sym_get_string_value(sym); + str = sym_escape_string_value(str); + printf("%s%s=%s\n", CONFIG_, sym->name, str); + free((void *)str); + } else { + str = sym_get_string_value(sym); + printf("%s%s=%s\n", CONFIG_, sym->name, str); + } } - } else if (input_mode != olddefconfig) { + } else { if (!conf_cnt++) printf(_("*\n* Restart config...\n*\n")); rootEntry = menu_get_parent_menu(menu); @@ -450,7 +451,7 @@ static void check_conf(struct menu *menu) static struct option long_opts[] = { {"oldaskconfig", no_argument, NULL, oldaskconfig}, {"oldconfig", no_argument, NULL, oldconfig}, - {"silentoldconfig", no_argument, NULL, silentoldconfig}, + {"syncconfig", no_argument, NULL, syncconfig}, {"defconfig", optional_argument, NULL, defconfig}, {"savedefconfig", required_argument, NULL, savedefconfig}, {"allnoconfig", no_argument, NULL, allnoconfig}, @@ -477,8 +478,9 @@ static void conf_usage(const char *progname) printf(" --listnewconfig List new options\n"); printf(" --oldaskconfig Start a new configuration using a line-oriented program\n"); printf(" --oldconfig Update a configuration using a provided .config as base\n"); - printf(" --silentoldconfig Same as oldconfig, but quietly, additionally update deps\n"); - printf(" --olddefconfig Same as silentoldconfig but sets new symbols to their default value\n"); + printf(" --syncconfig Similar to oldconfig but generates configuration in\n" + " include/{generated/,config/}\n"); + printf(" --olddefconfig Same as oldconfig but sets new symbols to their default value\n"); printf(" --oldnoconfig An alias of olddefconfig\n"); printf(" --defconfig <file> New config with default defined in <file>\n"); printf(" --savedefconfig <file> Save the minimal current configuration to <file>\n"); @@ -500,7 +502,7 @@ int main(int ac, char **av) bindtextdomain(PACKAGE, LOCALEDIR); textdomain(PACKAGE); - tty_stdio = isatty(0) && isatty(1) && isatty(2); + tty_stdio = isatty(0) && isatty(1); while ((opt = getopt_long(ac, av, "s", long_opts, NULL)) != -1) { if (opt == 's') { @@ -509,7 +511,7 @@ int main(int ac, char **av) } input_mode = (enum input_mode)opt; switch (opt) { - case silentoldconfig: + case syncconfig: sync_kconfig = 1; break; case defconfig: @@ -557,7 +559,7 @@ int main(int ac, char **av) } } if (ac == optind) { - printf(_("%s: Kconfig file missing\n"), av[0]); + fprintf(stderr, _("%s: Kconfig file missing\n"), av[0]); conf_usage(progname); exit(1); } @@ -582,14 +584,16 @@ int main(int ac, char **av) if (!defconfig_file) defconfig_file = conf_get_default_confname(); if (conf_read(defconfig_file)) { - printf(_("***\n" - "*** Can't find default configuration \"%s\"!\n" - "***\n"), defconfig_file); + fprintf(stderr, + _("***\n" + "*** Can't find default configuration \"%s\"!\n" + "***\n"), + defconfig_file); exit(1); } break; case savedefconfig: - case silentoldconfig: + case syncconfig: case oldaskconfig: case oldconfig: case listnewconfig: @@ -642,7 +646,6 @@ int main(int ac, char **av) return 1; } } - valid_stdin = tty_stdio; } switch (input_mode) { @@ -670,24 +673,24 @@ int main(int ac, char **av) case oldaskconfig: rootEntry = &rootmenu; conf(&rootmenu); - input_mode = silentoldconfig; + input_mode = oldconfig; /* fall through */ case oldconfig: case listnewconfig: - case olddefconfig: - case silentoldconfig: + case syncconfig: /* Update until a loop caused no more changes */ do { conf_cnt = 0; check_conf(&rootmenu); - } while (conf_cnt && - (input_mode != listnewconfig && - input_mode != olddefconfig)); + } while (conf_cnt); + break; + case olddefconfig: + default: break; } if (sync_kconfig) { - /* silentoldconfig is used during the build so we shall update autoconf. + /* syncconfig is used during the build so we shall update autoconf. * All other commands are only used to generate a config. */ if (conf_get_changed() && conf_write(NULL)) { @@ -712,12 +715,3 @@ int main(int ac, char **av) } return 0; } - -/* - * Helper function to facilitate fgets() by Jean Sacren. - */ -void xfgets(char *str, int size, FILE *in) -{ - if (fgets(str, size, in) == NULL) - fprintf(stderr, "\nError in reading or end of file.\n"); -} diff --git a/scripts/kconfig/confdata.c b/scripts/kconfig/confdata.c index 745cb93050e..e4cbb87d760 100644 --- a/scripts/kconfig/confdata.c +++ b/scripts/kconfig/confdata.c @@ -28,7 +28,7 @@ static void conf_message(const char *fmt, ...) __attribute__ ((format (printf, 1, 2))); static const char *conf_filename; -static int conf_lineno, conf_warnings, conf_unsaved; +static int conf_lineno, conf_warnings; const char conf_defname[] = "arch/$ARCH/defconfig"; @@ -174,7 +174,7 @@ static int conf_set_sym_val(struct symbol *sym, int def, int def_flags, char *p) case S_HEX: done: if (sym_string_valid(sym, p)) { - sym->def[def].val = strdup(p); + sym->def[def].val = xstrdup(p); sym->flags |= def_flags; } else { if (def != S_DEF_AUTO) @@ -197,7 +197,7 @@ static int add_byte(int c, char **lineptr, size_t slen, size_t *n) if (new_size > *n) { new_size += LINE_GROWTH - 1; new_size *= 2; - nline = realloc(*lineptr, new_size); + nline = xrealloc(*lineptr, new_size); if (!nline) return -1; @@ -286,7 +286,6 @@ load: conf_filename = name; conf_lineno = 0; conf_warnings = 0; - conf_unsaved = 0; def_flags = SYMBOL_DEF << def; for_all_symbols(i, sym) { @@ -405,6 +404,7 @@ setsym: int conf_read(const char *name) { struct symbol *sym; + int conf_unsaved = 0; int i; sym_set_change_count(0); @@ -1121,7 +1121,7 @@ void set_all_choice_values(struct symbol *csym) bool conf_set_all_new_symbols(enum conf_def_mode mode) { struct symbol *sym, *csym; - int i, cnt, pby, pty, ptm; /* pby: probability of boolean = y + int i, cnt, pby, pty, ptm; /* pby: probability of bool = y * pty: probability of tristate = y * ptm: probability of tristate = m */ diff --git a/scripts/kconfig/expr.c b/scripts/kconfig/expr.c index cbf4996dd9c..e1a39e90841 100644 --- a/scripts/kconfig/expr.c +++ b/scripts/kconfig/expr.c @@ -94,7 +94,7 @@ struct expr *expr_copy(const struct expr *org) e->right.expr = expr_copy(org->right.expr); break; default: - printf("can't copy type %d\n", e->type); + fprintf(stderr, "can't copy type %d\n", e->type); free(e); e = NULL; break; @@ -113,7 +113,7 @@ void expr_free(struct expr *e) break; case E_NOT: expr_free(e->left.expr); - return; + break; case E_EQUAL: case E_GEQ: case E_GTH: @@ -127,7 +127,7 @@ void expr_free(struct expr *e) expr_free(e->right.expr); break; default: - printf("how to free type %d?\n", e->type); + fprintf(stderr, "how to free type %d?\n", e->type); break; } free(e); @@ -138,8 +138,18 @@ static int trans_count; #define e1 (*ep1) #define e2 (*ep2) +/* + * expr_eliminate_eq() helper. + * + * Walks the two expression trees given in 'ep1' and 'ep2'. Any node that does + * not have type 'type' (E_OR/E_AND) is considered a leaf, and is compared + * against all other leaves. Two equal leaves are both replaced with either 'y' + * or 'n' as appropriate for 'type', to be eliminated later. + */ static void __expr_eliminate_eq(enum expr_type type, struct expr **ep1, struct expr **ep2) { + /* Recurse down to leaves */ + if (e1->type == type) { __expr_eliminate_eq(type, &e1->left.expr, &e2); __expr_eliminate_eq(type, &e1->right.expr, &e2); @@ -150,12 +160,18 @@ static void __expr_eliminate_eq(enum expr_type type, struct expr **ep1, struct e __expr_eliminate_eq(type, &e1, &e2->right.expr); return; } + + /* e1 and e2 are leaves. Compare them. */ + if (e1->type == E_SYMBOL && e2->type == E_SYMBOL && e1->left.sym == e2->left.sym && (e1->left.sym == &symbol_yes || e1->left.sym == &symbol_no)) return; if (!expr_eq(e1, e2)) return; + + /* e1 and e2 are equal leaves. Prepare them for elimination. */ + trans_count++; expr_free(e1); expr_free(e2); switch (type) { @@ -172,6 +188,35 @@ static void __expr_eliminate_eq(enum expr_type type, struct expr **ep1, struct e } } +/* + * Rewrites the expressions 'ep1' and 'ep2' to remove operands common to both. + * Example reductions: + * + * ep1: A && B -> ep1: y + * ep2: A && B && C -> ep2: C + * + * ep1: A || B -> ep1: n + * ep2: A || B || C -> ep2: C + * + * ep1: A && (B && FOO) -> ep1: FOO + * ep2: (BAR && B) && A -> ep2: BAR + * + * ep1: A && (B || C) -> ep1: y + * ep2: (C || B) && A -> ep2: y + * + * Comparisons are done between all operands at the same "level" of && or ||. + * For example, in the expression 'e1 && (e2 || e3) && (e4 || e5)', the + * following operands will be compared: + * + * - 'e1', 'e2 || e3', and 'e4 || e5', against each other + * - e2 against e3 + * - e4 against e5 + * + * Parentheses are irrelevant within a single level. 'e1 && (e2 && e3)' and + * '(e1 && e2) && e3' are both a single level. + * + * See __expr_eliminate_eq() as well. + */ void expr_eliminate_eq(struct expr **ep1, struct expr **ep2) { if (!e1 || !e2) @@ -197,6 +242,12 @@ void expr_eliminate_eq(struct expr **ep1, struct expr **ep2) #undef e1 #undef e2 +/* + * Returns true if 'e1' and 'e2' are equal, after minor simplification. Two + * &&/|| expressions are considered equal if every operand in one expression + * equals some operand in the other (operands do not need to appear in the same + * order), recursively. + */ static int expr_eq(struct expr *e1, struct expr *e2) { int res, old_count; @@ -243,6 +294,17 @@ static int expr_eq(struct expr *e1, struct expr *e2) return 0; } +/* + * Recursively performs the following simplifications in-place (as well as the + * corresponding simplifications with swapped operands): + * + * expr && n -> n + * expr && y -> expr + * expr || n -> expr + * expr || y -> y + * + * Returns the optimized expression. + */ static struct expr *expr_eliminate_yn(struct expr *e) { struct expr *tmp; @@ -516,12 +578,21 @@ static struct expr *expr_join_and(struct expr *e1, struct expr *e2) return NULL; } +/* + * expr_eliminate_dups() helper. + * + * Walks the two expression trees given in 'ep1' and 'ep2'. Any node that does + * not have type 'type' (E_OR/E_AND) is considered a leaf, and is compared + * against all other leaves to look for simplifications. + */ static void expr_eliminate_dups1(enum expr_type type, struct expr **ep1, struct expr **ep2) { #define e1 (*ep1) #define e2 (*ep2) struct expr *tmp; + /* Recurse down to leaves */ + if (e1->type == type) { expr_eliminate_dups1(type, &e1->left.expr, &e2); expr_eliminate_dups1(type, &e1->right.expr, &e2); @@ -532,6 +603,9 @@ static void expr_eliminate_dups1(enum expr_type type, struct expr **ep1, struct expr_eliminate_dups1(type, &e1, &e2->right.expr); return; } + + /* e1 and e2 are leaves. Compare and process them. */ + if (e1 == e2) return; @@ -568,6 +642,17 @@ static void expr_eliminate_dups1(enum expr_type type, struct expr **ep1, struct #undef e2 } +/* + * Rewrites 'e' in-place to remove ("join") duplicate and other redundant + * operands. + * + * Example simplifications: + * + * A || B || A -> A || B + * A && B && A=y -> A=y && B + * + * Returns the deduplicated expression. + */ struct expr *expr_eliminate_dups(struct expr *e) { int oldcount; @@ -584,6 +669,7 @@ struct expr *expr_eliminate_dups(struct expr *e) ; } if (!trans_count) + /* No simplifications done in this pass. We're done */ break; e = expr_eliminate_yn(e); } @@ -591,6 +677,12 @@ struct expr *expr_eliminate_dups(struct expr *e) return e; } +/* + * Performs various simplifications involving logical operators and + * comparisons. + * + * Allocates and returns a new expression. + */ struct expr *expr_transform(struct expr *e) { struct expr *tmp; @@ -805,6 +897,20 @@ bool expr_depends_symbol(struct expr *dep, struct symbol *sym) return false; } +/* + * Inserts explicit comparisons of type 'type' to symbol 'sym' into the + * expression 'e'. + * + * Examples transformations for type == E_UNEQUAL, sym == &symbol_no: + * + * A -> A!=n + * !A -> A=n + * A && B -> !(A=n || B=n) + * A || B -> !(A=n && B=n) + * A && (B || C) -> !(A=n || (B=n && C=n)) + * + * Allocates and returns a new expression. + */ struct expr *expr_trans_compare(struct expr *e, enum expr_type type, struct symbol *sym) { struct expr *e1, *e2; @@ -893,7 +999,10 @@ static enum string_value_kind expr_parse_string(const char *str, switch (type) { case S_BOOLEAN: case S_TRISTATE: - return k_string; + val->s = !strcmp(str, "n") ? 0 : + !strcmp(str, "m") ? 1 : + !strcmp(str, "y") ? 2 : -1; + return k_signed; case S_INT: val->s = strtoll(str, &tail, 10); kind = k_signed; @@ -1028,49 +1137,9 @@ static int expr_compare_type(enum expr_type t1, enum expr_type t2) return 0; } -static inline struct expr * -expr_get_leftmost_symbol(const struct expr *e) -{ - - if (e == NULL) - return NULL; - - while (e->type != E_SYMBOL) - e = e->left.expr; - - return expr_copy(e); -} - -/* - * Given expression `e1' and `e2', returns the leaf of the longest - * sub-expression of `e1' not containing 'e2. - */ -struct expr *expr_simplify_unmet_dep(struct expr *e1, struct expr *e2) -{ - struct expr *ret; - - switch (e1->type) { - case E_OR: - return expr_alloc_and( - expr_simplify_unmet_dep(e1->left.expr, e2), - expr_simplify_unmet_dep(e1->right.expr, e2)); - case E_AND: { - struct expr *e; - e = expr_alloc_and(expr_copy(e1), expr_copy(e2)); - e = expr_eliminate_dups(e); - ret = (!expr_eq(e, e1)) ? e1 : NULL; - expr_free(e); - break; - } - default: - ret = e1; - break; - } - - return expr_get_leftmost_symbol(ret); -} - -void expr_print(struct expr *e, void (*fn)(void *, struct symbol *, const char *), void *data, int prevtoken) +void expr_print(struct expr *e, + void (*fn)(void *, struct symbol *, const char *), + void *data, int prevtoken) { if (!e) { fn(data, NULL, "y"); @@ -1204,3 +1273,33 @@ void expr_gstr_print(struct expr *e, struct gstr *gs) { expr_print(e, expr_print_gstr_helper, gs, E_NONE); } + +/* + * Transform the top level "||" tokens into newlines and prepend each + * line with a minus. This makes expressions much easier to read. + * Suitable for reverse dependency expressions. + */ +static void expr_print_revdep(struct expr *e, + void (*fn)(void *, struct symbol *, const char *), + void *data, tristate pr_type, const char **title) +{ + if (e->type == E_OR) { + expr_print_revdep(e->left.expr, fn, data, pr_type, title); + expr_print_revdep(e->right.expr, fn, data, pr_type, title); + } else if (expr_calc_value(e) == pr_type) { + if (*title) { + fn(data, NULL, *title); + *title = NULL; + } + + fn(data, NULL, " - "); + expr_print(e, fn, data, E_NONE); + fn(data, NULL, "\n"); + } +} + +void expr_gstr_print_revdep(struct expr *e, struct gstr *gs, + tristate pr_type, const char *title) +{ + expr_print_revdep(e, expr_print_gstr_helper, gs, pr_type, &title); +} diff --git a/scripts/kconfig/expr.h b/scripts/kconfig/expr.h index a73f762c48d..94a383b21df 100644 --- a/scripts/kconfig/expr.h +++ b/scripts/kconfig/expr.h @@ -74,17 +74,60 @@ enum { S_DEF_COUNT }; +/* + * Represents a configuration symbol. + * + * Choices are represented as a special kind of symbol and have the + * SYMBOL_CHOICE bit set in 'flags'. + */ struct symbol { + /* The next symbol in the same bucket in the symbol hash table */ struct symbol *next; + + /* The name of the symbol, e.g. "FOO" for 'config FOO' */ char *name; + + /* S_BOOLEAN, S_TRISTATE, ... */ enum symbol_type type; + + /* + * The calculated value of the symbol. The SYMBOL_VALID bit is set in + * 'flags' when this is up to date. Note that this value might differ + * from the user value set in e.g. a .config file, due to visibility. + */ struct symbol_value curr; + + /* + * Values for the symbol provided from outside. def[S_DEF_USER] holds + * the .config value. + */ struct symbol_value def[S_DEF_COUNT]; + + /* + * An upper bound on the tristate value the user can set for the symbol + * if it is a boolean or tristate. Calculated from prompt dependencies, + * which also inherit dependencies from enclosing menus, choices, and + * ifs. If 'n', the user value will be ignored. + * + * Symbols lacking prompts always have visibility 'n'. + */ tristate visible; + + /* SYMBOL_* flags */ int flags; + + /* List of properties. See prop_type. */ struct property *prop; + + /* Dependencies from enclosing menus, choices, and ifs */ struct expr_value dir_dep; + + /* Reverse dependencies through being selected by other symbols */ struct expr_value rev_dep; + + /* + * "Weak" reverse dependencies through being implied by other symbols + */ struct expr_value implied; }; @@ -133,7 +176,7 @@ enum prop_type { P_UNKNOWN, P_PROMPT, /* prompt "foo prompt" or "BAZ Value" */ P_COMMENT, /* text associated with a comment */ - P_MENU, /* prompt associated with a menuconfig option */ + P_MENU, /* prompt associated with a menu or menuconfig symbol */ P_DEFAULT, /* default y */ P_CHOICE, /* choice value */ P_SELECT, /* select BAR */ @@ -166,22 +209,67 @@ struct property { for (st = sym->prop; st; st = st->next) \ if (st->text) +/* + * Represents a node in the menu tree, as seen in e.g. menuconfig (though used + * for all front ends). Each symbol, menu, etc. defined in the Kconfig files + * gets a node. A symbol defined in multiple locations gets one node at each + * location. + */ struct menu { + /* The next menu node at the same level */ struct menu *next; + + /* The parent menu node, corresponding to e.g. a menu or choice */ struct menu *parent; + + /* The first child menu node, for e.g. menus and choices */ struct menu *list; + + /* + * The symbol associated with the menu node. Choices are implemented as + * a special kind of symbol. NULL for menus, comments, and ifs. + */ struct symbol *sym; + + /* + * The prompt associated with the node. This holds the prompt for a + * symbol as well as the text for a menu or comment, along with the + * type (P_PROMPT, P_MENU, etc.) + */ struct property *prompt; + + /* + * 'visible if' dependencies. If more than one is given, they will be + * ANDed together. + */ struct expr *visibility; + + /* + * Ordinary dependencies from e.g. 'depends on' and 'if', ANDed + * together + */ struct expr *dep; + + /* MENU_* flags */ unsigned int flags; + + /* Any help text associated with the node */ char *help; + + /* The location where the menu node appears in the Kconfig files */ struct file *file; int lineno; + + /* For use by front ends that need to store auxiliary data */ void *data; }; +/* + * Set on a menu node when the corresponding symbol changes state in some way. + * Can be checked by front ends. + */ #define MENU_CHANGED 0x0001 + #define MENU_ROOT 0x0002 struct jump_key { @@ -217,11 +305,12 @@ struct expr *expr_transform(struct expr *e); int expr_contains_symbol(struct expr *dep, struct symbol *sym); bool expr_depends_symbol(struct expr *dep, struct symbol *sym); struct expr *expr_trans_compare(struct expr *e, enum expr_type type, struct symbol *sym); -struct expr *expr_simplify_unmet_dep(struct expr *e1, struct expr *e2); void expr_fprint(struct expr *e, FILE *out); struct gstr; /* forward */ void expr_gstr_print(struct expr *e, struct gstr *gs); +void expr_gstr_print_revdep(struct expr *e, struct gstr *gs, + tristate pr_type, const char *title); static inline int expr_is_yes(struct expr *e) { diff --git a/scripts/kconfig/gconf.c b/scripts/kconfig/gconf.c index 26d208b435a..cfddddb9c9d 100644 --- a/scripts/kconfig/gconf.c +++ b/scripts/kconfig/gconf.c @@ -914,7 +914,7 @@ on_treeview2_button_press_event(GtkWidget * widget, current = menu; display_tree_part(); gtk_widget_set_sensitive(back_btn, TRUE); - } else if ((col == COL_OPTION)) { + } else if (col == COL_OPTION) { toggle_sym_value(menu); gtk_tree_view_expand_row(view, path, TRUE); } diff --git a/scripts/kconfig/kconf_id.c b/scripts/kconfig/kconf_id.c new file mode 100644 index 00000000000..3ea9c5f9f73 --- /dev/null +++ b/scripts/kconfig/kconf_id.c @@ -0,0 +1,53 @@ + +static struct kconf_id kconf_id_array[] = { + { "mainmenu", T_MAINMENU, TF_COMMAND }, + { "menu", T_MENU, TF_COMMAND }, + { "endmenu", T_ENDMENU, TF_COMMAND }, + { "source", T_SOURCE, TF_COMMAND }, + { "choice", T_CHOICE, TF_COMMAND }, + { "endchoice", T_ENDCHOICE, TF_COMMAND }, + { "comment", T_COMMENT, TF_COMMAND }, + { "config", T_CONFIG, TF_COMMAND }, + { "menuconfig", T_MENUCONFIG, TF_COMMAND }, + { "help", T_HELP, TF_COMMAND }, + { "---help---", T_HELP, TF_COMMAND }, + { "if", T_IF, TF_COMMAND|TF_PARAM }, + { "endif", T_ENDIF, TF_COMMAND }, + { "depends", T_DEPENDS, TF_COMMAND }, + { "optional", T_OPTIONAL, TF_COMMAND }, + { "default", T_DEFAULT, TF_COMMAND, S_UNKNOWN }, + { "prompt", T_PROMPT, TF_COMMAND }, + { "tristate", T_TYPE, TF_COMMAND, S_TRISTATE }, + { "def_tristate", T_DEFAULT, TF_COMMAND, S_TRISTATE }, + { "bool", T_TYPE, TF_COMMAND, S_BOOLEAN }, + { "def_bool", T_DEFAULT, TF_COMMAND, S_BOOLEAN }, + { "int", T_TYPE, TF_COMMAND, S_INT }, + { "hex", T_TYPE, TF_COMMAND, S_HEX }, + { "string", T_TYPE, TF_COMMAND, S_STRING }, + { "select", T_SELECT, TF_COMMAND }, + { "imply", T_IMPLY, TF_COMMAND }, + { "range", T_RANGE, TF_COMMAND }, + { "visible", T_VISIBLE, TF_COMMAND }, + { "option", T_OPTION, TF_COMMAND }, + { "on", T_ON, TF_PARAM }, + { "modules", T_OPT_MODULES, TF_OPTION }, + { "defconfig_list", T_OPT_DEFCONFIG_LIST, TF_OPTION }, + { "env", T_OPT_ENV, TF_OPTION }, + { "allnoconfig_y", T_OPT_ALLNOCONFIG_Y, TF_OPTION }, +}; + +#define KCONF_ID_ARRAY_SIZE (sizeof(kconf_id_array)/sizeof(struct kconf_id)) + +static const struct kconf_id *kconf_id_lookup(register const char *str, register unsigned int len) +{ + int i; + + for (i = 0; i < KCONF_ID_ARRAY_SIZE; i++) { + struct kconf_id *id = kconf_id_array+i; + int l = strlen(id->name); + + if (len == l && !memcmp(str, id->name, len)) + return id; + } + return NULL; +} diff --git a/scripts/kconfig/kxgettext.c b/scripts/kconfig/kxgettext.c index 2858738b22d..240880a8911 100644 --- a/scripts/kconfig/kxgettext.c +++ b/scripts/kconfig/kxgettext.c @@ -101,7 +101,7 @@ static struct message *message__new(const char *msg, char *option, if (self->files == NULL) goto out_fail; - self->msg = strdup(msg); + self->msg = xstrdup(msg); if (self->msg == NULL) goto out_fail_msg; diff --git a/scripts/kconfig/list.h b/scripts/kconfig/list.h index 2cf23f002d3..45cb237ab7e 100644 --- a/scripts/kconfig/list.h +++ b/scripts/kconfig/list.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 */ #ifndef LIST_H #define LIST_H diff --git a/scripts/kconfig/lkc.h b/scripts/kconfig/lkc.h index 91ca126ea08..f4394af6e4b 100644 --- a/scripts/kconfig/lkc.h +++ b/scripts/kconfig/lkc.h @@ -62,12 +62,13 @@ enum conf_def_mode { #define T_OPT_ALLNOCONFIG_Y 4 struct kconf_id { - int name; + const char *name; int token; unsigned int flags; enum symbol_type stype; }; +extern int yylineno; void zconfdump(FILE *out); void zconf_starthelp(void); FILE *zconf_fopen(const char *name); @@ -100,7 +101,6 @@ void menu_warn(struct menu *menu, const char *fmt, ...); struct menu *menu_add_menu(void); void menu_end_menu(void); void menu_add_entry(struct symbol *sym); -void menu_end_entry(void); void menu_add_dep(struct expr *dep); void menu_add_visibility(struct expr *dep); struct property *menu_add_prompt(enum prop_type type, char *prompt, struct expr *dep); @@ -115,6 +115,8 @@ struct file *file_lookup(const char *name); int file_write_dep(const char *name); void *xmalloc(size_t size); void *xcalloc(size_t nmemb, size_t size); +void *xrealloc(void *p, size_t size); +char *xstrdup(const char *s); struct gstr { size_t len; diff --git a/scripts/kconfig/lkc_proto.h b/scripts/kconfig/lkc_proto.h index d5398718ec2..9dc8abfb1dc 100644 --- a/scripts/kconfig/lkc_proto.h +++ b/scripts/kconfig/lkc_proto.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 */ #include <stdarg.h> /* confdata.c */ @@ -30,7 +31,7 @@ extern struct symbol * symbol_hash[SYMBOL_HASHSIZE]; struct symbol * sym_lookup(const char *name, int flags); struct symbol * sym_find(const char *name); -const char * sym_expand_string_value(const char *in); +char *sym_expand_string_value(const char *in); const char * sym_escape_string_value(const char *in); struct symbol ** sym_re_search(const char *pattern); const char * sym_type_name(enum symbol_type type); diff --git a/scripts/kconfig/lxdialog/check-lxdialog.sh b/scripts/kconfig/lxdialog/check-lxdialog.sh index 5075ebf2d3b..6c0bcd9c472 100755 --- a/scripts/kconfig/lxdialog/check-lxdialog.sh +++ b/scripts/kconfig/lxdialog/check-lxdialog.sh @@ -1,4 +1,5 @@ #!/bin/sh +# SPDX-License-Identifier: GPL-2.0 # Check ncurses compatibility # What library to link @@ -54,7 +55,8 @@ EOF echo " *** required header files." 1>&2 echo " *** 'make menuconfig' requires the ncurses libraries." 1>&2 echo " *** " 1>&2 - echo " *** Install ncurses (ncurses-devel) and try again." 1>&2 + echo " *** Install ncurses (ncurses-devel or libncurses-dev " 1>&2 + echo " *** depending on your distribution) and try again." 1>&2 echo " *** " 1>&2 exit 1 fi diff --git a/scripts/kconfig/mconf.c b/scripts/kconfig/mconf.c index 315ce2c7cb9..c829be8bb19 100644 --- a/scripts/kconfig/mconf.c +++ b/scripts/kconfig/mconf.c @@ -246,7 +246,7 @@ search_help[] = N_( " Selected by: BAR [=n]\n" "-----------------------------------------------------------------\n" "o The line 'Type:' shows the type of the configuration option for\n" - " this symbol (boolean, tristate, string, ...)\n" + " this symbol (bool, tristate, string, ...)\n" "o The line 'Prompt:' shows the text used in the menu structure for\n" " this symbol\n" "o The 'Defined at' line tells at what file / line number the symbol\n" diff --git a/scripts/kconfig/menu.c b/scripts/kconfig/menu.c index e9357931b47..5c5c1374b15 100644 --- a/scripts/kconfig/menu.c +++ b/scripts/kconfig/menu.c @@ -62,13 +62,8 @@ void menu_add_entry(struct symbol *sym) menu_add_symbol(P_SYMBOL, sym, NULL); } -void menu_end_entry(void) -{ -} - struct menu *menu_add_menu(void) { - menu_end_entry(); last_entry_ptr = ¤t_entry->list; return current_menu = current_entry; } @@ -79,19 +74,23 @@ void menu_end_menu(void) current_menu = current_menu->parent; } -static struct expr *menu_check_dep(struct expr *e) +/* + * Rewrites 'm' to 'm' && MODULES, so that it evaluates to 'n' when running + * without modules + */ +static struct expr *rewrite_m(struct expr *e) { if (!e) return e; switch (e->type) { case E_NOT: - e->left.expr = menu_check_dep(e->left.expr); + e->left.expr = rewrite_m(e->left.expr); break; case E_OR: case E_AND: - e->left.expr = menu_check_dep(e->left.expr); - e->right.expr = menu_check_dep(e->right.expr); + e->left.expr = rewrite_m(e->left.expr); + e->right.expr = rewrite_m(e->right.expr); break; case E_SYMBOL: /* change 'm' into 'm' && MODULES */ @@ -106,7 +105,7 @@ static struct expr *menu_check_dep(struct expr *e) void menu_add_dep(struct expr *dep) { - current_entry->dep = expr_alloc_and(current_entry->dep, menu_check_dep(dep)); + current_entry->dep = expr_alloc_and(current_entry->dep, dep); } void menu_set_type(int type) @@ -131,7 +130,7 @@ static struct property *menu_add_prop(enum prop_type type, char *prompt, struct prop->menu = current_entry; prop->expr = expr; - prop->visible.expr = menu_check_dep(dep); + prop->visible.expr = dep; if (prompt) { if (isspace(*prompt)) { @@ -213,6 +212,7 @@ void menu_add_option(int token, char *arg) sym_defconfig_list = current_entry->sym; else if (sym_defconfig_list != current_entry->sym) zconf_error("trying to redefine defconfig symbol"); + sym_defconfig_list->flags |= SYMBOL_AUTO; break; case T_OPT_ENV: prop_add_env(arg); @@ -252,6 +252,16 @@ static void sym_check_prop(struct symbol *sym) "'%s': number is invalid", sym->name); } + if (sym_is_choice(sym)) { + struct property *choice_prop = + sym_get_choice_prop(sym2); + + if (!choice_prop || + prop_get_symbol(choice_prop) != sym) + prop_warn(prop, + "choice default symbol '%s' is not contained in the choice", + sym2->name); + } break; case P_SELECT: case P_IMPLY: @@ -260,13 +270,13 @@ static void sym_check_prop(struct symbol *sym) if (sym->type != S_BOOLEAN && sym->type != S_TRISTATE) prop_warn(prop, "config symbol '%s' uses %s, but is " - "not boolean or tristate", sym->name, use); + "not bool or tristate", sym->name, use); else if (sym2->type != S_UNKNOWN && sym2->type != S_BOOLEAN && sym2->type != S_TRISTATE) prop_warn(prop, "'%s' has wrong type. '%s' only " - "accept arguments of boolean and " + "accept arguments of bool and " "tristate type", sym2->name, use); break; case P_RANGE: @@ -292,6 +302,11 @@ void menu_finalize(struct menu *parent) sym = parent->sym; if (parent->list) { + /* + * This menu node has children. We (recursively) process them + * and propagate parent dependencies before moving on. + */ + if (sym && sym_is_choice(sym)) { if (sym->type == S_UNKNOWN) { /* find the first choice value to find out choice type */ @@ -309,30 +324,83 @@ void menu_finalize(struct menu *parent) if (menu->sym && menu->sym->type == S_UNKNOWN) menu_set_type(sym->type); } + + /* + * Use the choice itself as the parent dependency of + * the contained items. This turns the mode of the + * choice into an upper bound on the visibility of the + * choice value symbols. + */ parentdep = expr_alloc_symbol(sym); } else if (parent->prompt) + /* Menu node for 'menu' */ parentdep = parent->prompt->visible.expr; else + /* Menu node for 'if' */ parentdep = parent->dep; + /* For each child menu node... */ for (menu = parent->list; menu; menu = menu->next) { - basedep = expr_transform(menu->dep); + /* + * Propagate parent dependencies to the child menu + * node, also rewriting and simplifying expressions + */ + basedep = rewrite_m(menu->dep); + basedep = expr_transform(basedep); basedep = expr_alloc_and(expr_copy(parentdep), basedep); basedep = expr_eliminate_dups(basedep); menu->dep = basedep; + if (menu->sym) + /* + * Note: For symbols, all prompts are included + * too in the symbol's own property list + */ prop = menu->sym->prop; else + /* + * For non-symbol menu nodes, we just need to + * handle the prompt + */ prop = menu->prompt; + + /* For each property... */ for (; prop; prop = prop->next) { if (prop->menu != menu) + /* + * Two possibilities: + * + * 1. The property lacks dependencies + * and so isn't location-specific, + * e.g. an 'option' + * + * 2. The property belongs to a symbol + * defined in multiple locations and + * is from some other location. It + * will be handled there in that + * case. + * + * Skip the property. + */ continue; - dep = expr_transform(prop->visible.expr); + + /* + * Propagate parent dependencies to the + * property's condition, rewriting and + * simplifying expressions at the same time + */ + dep = rewrite_m(prop->visible.expr); + dep = expr_transform(dep); dep = expr_alloc_and(expr_copy(basedep), dep); dep = expr_eliminate_dups(dep); if (menu->sym && menu->sym->type != S_TRISTATE) dep = expr_trans_bool(dep); prop->visible.expr = dep; + + /* + * Handle selects and implies, which modify the + * dependencies of the selected/implied symbol + */ if (prop->type == P_SELECT) { struct symbol *es = prop_get_symbol(prop); es->rev_dep.expr = expr_alloc_or(es->rev_dep.expr, @@ -344,34 +412,81 @@ void menu_finalize(struct menu *parent) } } } + + if (sym && sym_is_choice(sym)) + expr_free(parentdep); + + /* + * Recursively process children in the same fashion before + * moving on + */ for (menu = parent->list; menu; menu = menu->next) menu_finalize(menu); } else if (sym) { + /* + * Automatic submenu creation. If sym is a symbol and A, B, C, + * ... are consecutive items (symbols, menus, ifs, etc.) that + * all depend on sym, then the following menu structure is + * created: + * + * sym + * +-A + * +-B + * +-C + * ... + * + * This also works recursively, giving the following structure + * if A is a symbol and B depends on A: + * + * sym + * +-A + * | +-B + * +-C + * ... + */ + basedep = parent->prompt ? parent->prompt->visible.expr : NULL; basedep = expr_trans_compare(basedep, E_UNEQUAL, &symbol_no); basedep = expr_eliminate_dups(expr_transform(basedep)); + + /* Examine consecutive elements after sym */ last_menu = NULL; for (menu = parent->next; menu; menu = menu->next) { dep = menu->prompt ? menu->prompt->visible.expr : menu->dep; if (!expr_contains_symbol(dep, sym)) + /* No dependency, quit */ break; if (expr_depends_symbol(dep, sym)) + /* Absolute dependency, put in submenu */ goto next; + + /* + * Also consider it a dependency on sym if our + * dependencies contain sym and are a "superset" of + * sym's dependencies, e.g. '(sym || Q) && R' when sym + * depends on R. + * + * Note that 'R' might be from an enclosing menu or if, + * making this a more common case than it might seem. + */ dep = expr_trans_compare(dep, E_UNEQUAL, &symbol_no); dep = expr_eliminate_dups(expr_transform(dep)); dep2 = expr_copy(basedep); expr_eliminate_eq(&dep, &dep2); expr_free(dep); if (!expr_is_yes(dep2)) { + /* Not superset, quit */ expr_free(dep2); break; } + /* Superset, put in submenu */ expr_free(dep2); next: menu_finalize(menu); menu->parent = parent; last_menu = menu; } + expr_free(basedep); if (last_menu) { parent->list = parent->next; parent->next = last_menu->next; @@ -420,6 +535,35 @@ void menu_finalize(struct menu *parent) *ep = expr_alloc_one(E_LIST, NULL); (*ep)->right.sym = menu->sym; } + + /* + * This code serves two purposes: + * + * (1) Flattening 'if' blocks, which do not specify a submenu + * and only add dependencies. + * + * (Automatic submenu creation might still create a submenu + * from an 'if' before this code runs.) + * + * (2) "Undoing" any automatic submenus created earlier below + * promptless symbols. + * + * Before: + * + * A + * if ... (or promptless symbol) + * +-B + * +-C + * D + * + * After: + * + * A + * if ... (or promptless symbol) + * B + * C + * D + */ if (menu->list && (!menu->prompt || !menu->prompt->text)) { for (last_menu = menu->list; ; last_menu = last_menu->next) { last_menu->parent = parent; @@ -444,6 +588,15 @@ void menu_finalize(struct menu *parent) sym->flags |= SYMBOL_WARNED; } + /* + * For non-optional choices, add a reverse dependency (corresponding to + * a select) of '<visibility> && m'. This prevents the user from + * setting the choice mode to 'n' when the choice is visible. + * + * This would also work for non-choice symbols, but only non-optional + * choices clear SYMBOL_OPTIONAL as of writing. Choices are implemented + * as a type of symbol. + */ if (sym && !sym_is_optional(sym) && parent->prompt) { sym->rev_dep.expr = expr_alloc_or(sym->rev_dep.expr, expr_alloc_and(parent->prompt->visible.expr, @@ -675,16 +828,16 @@ static void get_symbol_str(struct gstr *r, struct symbol *sym, get_symbol_props_str(r, sym, P_SELECT, _(" Selects: ")); if (sym->rev_dep.expr) { - str_append(r, _(" Selected by: ")); - expr_gstr_print(sym->rev_dep.expr, r); - str_append(r, "\n"); + expr_gstr_print_revdep(sym->rev_dep.expr, r, yes, " Selected by [y]:\n"); + expr_gstr_print_revdep(sym->rev_dep.expr, r, mod, " Selected by [m]:\n"); + expr_gstr_print_revdep(sym->rev_dep.expr, r, no, " Selected by [n]:\n"); } get_symbol_props_str(r, sym, P_IMPLY, _(" Implies: ")); if (sym->implied.expr) { - str_append(r, _(" Implied by: ")); - expr_gstr_print(sym->implied.expr, r); - str_append(r, "\n"); + expr_gstr_print_revdep(sym->implied.expr, r, yes, " Implied by [y]:\n"); + expr_gstr_print_revdep(sym->implied.expr, r, mod, " Implied by [m]:\n"); + expr_gstr_print_revdep(sym->implied.expr, r, no, " Implied by [n]:\n"); } str_append(r, "\n\n"); diff --git a/scripts/kconfig/nconf.c b/scripts/kconfig/nconf.c index a9bc5334a47..00311477981 100644 --- a/scripts/kconfig/nconf.c +++ b/scripts/kconfig/nconf.c @@ -271,7 +271,7 @@ static struct mitem k_menu_items[MAX_MENU_ITEMS]; static int items_num; static int global_exit; /* the currently selected button */ -const char *current_instructions = menu_instructions; +static const char *current_instructions = menu_instructions; static char *dialog_input_result; static int dialog_input_result_len; @@ -305,7 +305,7 @@ struct function_keys { }; static const int function_keys_num = 9; -struct function_keys function_keys[] = { +static struct function_keys function_keys[] = { { .key_str = "F1", .func = "Help", @@ -508,7 +508,7 @@ static int get_mext_match(const char *match_str, match_f flag) index = (index + items_num) % items_num; while (true) { char *str = k_menu_items[index].str; - if (strcasestr(str, match_str) != 0) + if (strcasestr(str, match_str) != NULL) return index; if (flag == FIND_NEXT_MATCH_UP || flag == MATCH_TINKER_PATTERN_UP) @@ -1067,7 +1067,7 @@ static int do_match(int key, struct match_state *state, int *ans) static void conf(struct menu *menu) { - struct menu *submenu = 0; + struct menu *submenu = NULL; const char *prompt = menu_get_prompt(menu); struct symbol *sym; int res; @@ -1234,7 +1234,7 @@ static void show_help(struct menu *menu) static void conf_choice(struct menu *menu) { const char *prompt = _(menu_get_prompt(menu)); - struct menu *child = 0; + struct menu *child = NULL; struct symbol *active; int selected_index = 0; int last_top_row = 0; @@ -1456,7 +1456,7 @@ static void conf_save(void) } } -void setup_windows(void) +static void setup_windows(void) { int lines, columns; diff --git a/scripts/kconfig/nconf.gui.c b/scripts/kconfig/nconf.gui.c index 4b2f44c20ca..88874acfda3 100644 --- a/scripts/kconfig/nconf.gui.c +++ b/scripts/kconfig/nconf.gui.c @@ -6,6 +6,7 @@ * */ #include "nconf.h" +#include "lkc.h" /* a list of all the different widgets we use */ attributes_t attributes[ATTR_MAX+1] = {0}; @@ -129,7 +130,7 @@ static void no_colors_theme(void) mkattrn(FUNCTION_TEXT, A_REVERSE); } -void set_colors() +void set_colors(void) { start_color(); use_default_colors(); @@ -192,7 +193,7 @@ const char *get_line(const char *text, int line_no) int lines = 0; if (!text) - return 0; + return NULL; for (i = 0; text[i] != '\0' && lines < line_no; i++) if (text[i] == '\n') @@ -374,7 +375,7 @@ int dialog_inputbox(WINDOW *main_window, if (strlen(init)+1 > *result_len) { *result_len = strlen(init)+1; - *resultp = result = realloc(result, *result_len); + *resultp = result = xrealloc(result, *result_len); } /* find the widest line of msg: */ diff --git a/scripts/kconfig/nconf.h b/scripts/kconfig/nconf.h index 0d5261705ef..9f6f21d3b0d 100644 --- a/scripts/kconfig/nconf.h +++ b/scripts/kconfig/nconf.h @@ -15,7 +15,7 @@ #include <string.h> #include <unistd.h> #include <locale.h> -#include <curses.h> +#include <ncurses.h> #include <menu.h> #include <panel.h> #include <form.h> @@ -24,8 +24,6 @@ #include <time.h> #include <sys/time.h> -#include "ncurses.h" - #define max(a, b) ({\ typeof(a) _a = a;\ typeof(b) _b = b;\ diff --git a/scripts/kconfig/streamline_config.pl b/scripts/kconfig/streamline_config.pl index b8c7b29affc..a2e83ab17de 100755 --- a/scripts/kconfig/streamline_config.pl +++ b/scripts/kconfig/streamline_config.pl @@ -1,4 +1,4 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # # Copyright 2005-2009 - Steven Rostedt # Licensed under the terms of the GNU GPL License version 2 @@ -42,6 +42,7 @@ # mv config_strip .config # make oldconfig # +use warnings; use strict; use Getopt::Long; diff --git a/scripts/kconfig/symbol.c b/scripts/kconfig/symbol.c index 3c8bd9bb426..f0b2e3b3102 100644 --- a/scripts/kconfig/symbol.c +++ b/scripts/kconfig/symbol.c @@ -77,7 +77,7 @@ const char *sym_type_name(enum symbol_type type) { switch (type) { case S_BOOLEAN: - return "boolean"; + return "bool"; case S_TRISTATE: return "tristate"; case S_INT: @@ -183,7 +183,7 @@ static void sym_validate_range(struct symbol *sym) sprintf(str, "%lld", val2); else sprintf(str, "0x%llx", val2); - sym->curr.val = strdup(str); + sym->curr.val = xstrdup(str); } static void sym_set_changed(struct symbol *sym) @@ -243,7 +243,7 @@ static void sym_calc_visibility(struct symbol *sym) tri = yes; if (sym->dir_dep.expr) tri = expr_calc_value(sym->dir_dep.expr); - if (tri == mod) + if (tri == mod && sym_get_type(sym) == S_BOOLEAN) tri = yes; if (sym->dir_dep.tri != tri) { sym->dir_dep.tri = tri; @@ -333,6 +333,27 @@ static struct symbol *sym_calc_choice(struct symbol *sym) return def_sym; } +static void sym_warn_unmet_dep(struct symbol *sym) +{ + struct gstr gs = str_new(); + + str_printf(&gs, + "\nWARNING: unmet direct dependencies detected for %s\n", + sym->name); + str_printf(&gs, + " Depends on [%c]: ", + sym->dir_dep.tri == mod ? 'm' : 'n'); + expr_gstr_print(sym->dir_dep.expr, &gs); + str_printf(&gs, "\n"); + + expr_gstr_print_revdep(sym->rev_dep.expr, &gs, yes, + " Selected by [y]:\n"); + expr_gstr_print_revdep(sym->rev_dep.expr, &gs, mod, + " Selected by [m]:\n"); + + fputs(str_get(&gs), stderr); +} + void sym_calc_value(struct symbol *sym) { struct symbol_value newval, oldval; @@ -371,11 +392,13 @@ void sym_calc_value(struct symbol *sym) sym->curr.tri = no; return; } - if (!sym_is_choice_value(sym)) - sym->flags &= ~SYMBOL_WRITE; + sym->flags &= ~SYMBOL_WRITE; sym_calc_visibility(sym); + if (sym->visible != no) + sym->flags |= SYMBOL_WRITE; + /* set default if recursively called */ sym->curr = newval; @@ -390,7 +413,6 @@ void sym_calc_value(struct symbol *sym) /* if the symbol is visible use the user value * if available, otherwise try the default value */ - sym->flags |= SYMBOL_WRITE; if (sym_has_value(sym)) { newval.tri = EXPR_AND(sym->def[S_DEF_USER].tri, sym->visible); @@ -402,9 +424,10 @@ void sym_calc_value(struct symbol *sym) if (!sym_is_choice(sym)) { prop = sym_get_default_prop(sym); if (prop) { - sym->flags |= SYMBOL_WRITE; newval.tri = EXPR_AND(expr_calc_value(prop->expr), prop->visible.tri); + if (newval.tri != no) + sym->flags |= SYMBOL_WRITE; } if (sym->implied.tri != no) { sym->flags |= SYMBOL_WRITE; @@ -412,18 +435,8 @@ void sym_calc_value(struct symbol *sym) } } calc_newval: - if (sym->dir_dep.tri == no && sym->rev_dep.tri != no) { - struct expr *e; - e = expr_simplify_unmet_dep(sym->rev_dep.expr, - sym->dir_dep.expr); - fprintf(stderr, "warning: ("); - expr_fprint(e, stderr); - fprintf(stderr, ") selects %s which has unmet direct dependencies (", - sym->name); - expr_fprint(sym->dir_dep.expr, stderr); - fprintf(stderr, ")\n"); - expr_free(e); - } + if (sym->dir_dep.tri < sym->rev_dep.tri) + sym_warn_unmet_dep(sym); newval.tri = EXPR_OR(newval.tri, sym->rev_dep.tri); } if (newval.tri == mod && @@ -433,12 +446,9 @@ void sym_calc_value(struct symbol *sym) case S_STRING: case S_HEX: case S_INT: - if (sym->visible != no) { - sym->flags |= SYMBOL_WRITE; - if (sym_has_value(sym)) { - newval.val = sym->def[S_DEF_USER].val; - break; - } + if (sym->visible != no && sym_has_value(sym)) { + newval.val = sym->def[S_DEF_USER].val; + break; } prop = sym_get_default_prop(sym); if (prop) { @@ -851,7 +861,7 @@ struct symbol *sym_lookup(const char *name, int flags) : !(symbol->flags & (SYMBOL_CONST|SYMBOL_CHOICE)))) return symbol; } - new_name = strdup(name); + new_name = xstrdup(name); } else { new_name = NULL; hash = 0; @@ -901,12 +911,16 @@ struct symbol *sym_find(const char *name) * name to be expanded shall be prefixed by a '$'. Unknown symbol expands to * the empty string. */ -const char *sym_expand_string_value(const char *in) +char *sym_expand_string_value(const char *in) { const char *src; char *res; size_t reslen; + /* + * Note: 'in' might come from a token that's about to be + * freed, so make sure to always allocate a new string + */ reslen = strlen(in) + 1; res = xmalloc(reslen); res[0] = '\0'; @@ -934,7 +948,7 @@ const char *sym_expand_string_value(const char *in) newlen = strlen(res) + strlen(symval) + strlen(src) + 1; if (newlen > reslen) { reslen = newlen; - res = realloc(res, reslen); + res = xrealloc(res, reslen); } strcat(res, symval); @@ -1150,8 +1164,7 @@ static void sym_check_print_recursive(struct symbol *last_sym) if (stack->sym == last_sym) fprintf(stderr, "%s:%d:error: recursive dependency detected!\n", prop->file->name, prop->lineno); - fprintf(stderr, "For a resolution refer to Documentation/kbuild/kconfig-language.txt\n"); - fprintf(stderr, "subsection \"Kconfig recursive dependency limitations\"\n"); + if (stack->expr) { fprintf(stderr, "%s:%d:\tsymbol %s %s value contains %s\n", prop->file->name, prop->lineno, @@ -1181,6 +1194,11 @@ static void sym_check_print_recursive(struct symbol *last_sym) } } + fprintf(stderr, + "For a resolution refer to Documentation/kbuild/kconfig-language.txt\n" + "subsection \"Kconfig recursive dependency limitations\"\n" + "\n"); + if (check_top == &cv_stack) dep_stack_remove(); } @@ -1215,7 +1233,7 @@ static struct symbol *sym_check_expr_deps(struct expr *e) default: break; } - printf("Oops! How to check %d?\n", e->type); + fprintf(stderr, "Oops! How to check %d?\n", e->type); return NULL; } diff --git a/scripts/kconfig/tests/auto_submenu/Kconfig b/scripts/kconfig/tests/auto_submenu/Kconfig new file mode 100644 index 00000000000..c17bf2caa7e --- /dev/null +++ b/scripts/kconfig/tests/auto_submenu/Kconfig @@ -0,0 +1,50 @@ +config A + bool "A" + default y + +config A0 + bool "A0" + depends on A + default y + help + This depends on A, so should be a submenu of A. + +config A0_0 + bool "A1_0" + depends on A0 + help + Submenus are created recursively. + This should be a submenu of A0. + +config A1 + bool "A1" + depends on A + default y + help + This should line up with A0. + +choice + prompt "choice" + depends on A1 + help + Choice should become a submenu as well. + +config A1_0 + bool "A1_0" + +config A1_1 + bool "A1_1" + +endchoice + +config B + bool "B" + help + This is independent of A. + +config C + bool "C" + depends on A + help + This depends on A, but not a consecutive item, so can/should not + be a submenu. diff --git a/scripts/kconfig/tests/auto_submenu/__init__.py b/scripts/kconfig/tests/auto_submenu/__init__.py new file mode 100644 index 00000000000..32e79b85fae --- /dev/null +++ b/scripts/kconfig/tests/auto_submenu/__init__.py @@ -0,0 +1,12 @@ +""" +Create submenu for symbols that depend on the preceding one. + +If a symbols has dependency on the preceding symbol, the menu entry +should become the submenu of the preceding one, and displayed with +deeper indentation. +""" + + +def test(conf): + assert conf.oldaskconfig() == 0 + assert conf.stdout_contains('expected_stdout') diff --git a/scripts/kconfig/tests/auto_submenu/expected_stdout b/scripts/kconfig/tests/auto_submenu/expected_stdout new file mode 100644 index 00000000000..bf5236f39a5 --- /dev/null +++ b/scripts/kconfig/tests/auto_submenu/expected_stdout @@ -0,0 +1,10 @@ +A (A) [Y/n/?] (NEW) + A0 (A0) [Y/n/?] (NEW) + A1_0 (A0_0) [N/y/?] (NEW) + A1 (A1) [Y/n/?] (NEW) + choice + > 1. A1_0 (A1_0) (NEW) + 2. A1_1 (A1_1) (NEW) + choice[1-2?]: +B (B) [N/y/?] (NEW) +C (C) [N/y/?] (NEW) diff --git a/scripts/kconfig/tests/choice/Kconfig b/scripts/kconfig/tests/choice/Kconfig new file mode 100644 index 00000000000..cc60e9ce2c0 --- /dev/null +++ b/scripts/kconfig/tests/choice/Kconfig @@ -0,0 +1,54 @@ +config MODULES + bool "Enable loadable module support" + option modules + default y + +choice + prompt "boolean choice" + default BOOL_CHOICE1 + +config BOOL_CHOICE0 + bool "choice 0" + +config BOOL_CHOICE1 + bool "choice 1" + +endchoice + +choice + prompt "optional boolean choice" + optional + default OPT_BOOL_CHOICE1 + +config OPT_BOOL_CHOICE0 + bool "choice 0" + +config OPT_BOOL_CHOICE1 + bool "choice 1" + +endchoice + +choice + prompt "tristate choice" + default TRI_CHOICE1 + +config TRI_CHOICE0 + tristate "choice 0" + +config TRI_CHOICE1 + tristate "choice 1" + +endchoice + +choice + prompt "optional tristate choice" + optional + default OPT_TRI_CHOICE1 + +config OPT_TRI_CHOICE0 + tristate "choice 0" + +config OPT_TRI_CHOICE1 + tristate "choice 1" + +endchoice diff --git a/scripts/kconfig/tests/choice/__init__.py b/scripts/kconfig/tests/choice/__init__.py new file mode 100644 index 00000000000..9edcc526213 --- /dev/null +++ b/scripts/kconfig/tests/choice/__init__.py @@ -0,0 +1,40 @@ +""" +Basic choice tests. + +The handling of 'choice' is a bit complicated part in Kconfig. + +The behavior of 'y' choice is intuitive. If choice values are tristate, +the choice can be 'm' where each value can be enabled independently. +Also, if a choice is marked as 'optional', the whole choice can be +invisible. +""" + + +def test_oldask0(conf): + assert conf.oldaskconfig() == 0 + assert conf.stdout_contains('oldask0_expected_stdout') + + +def test_oldask1(conf): + assert conf.oldaskconfig('oldask1_config') == 0 + assert conf.stdout_contains('oldask1_expected_stdout') + + +def test_allyes(conf): + assert conf.allyesconfig() == 0 + assert conf.config_contains('allyes_expected_config') + + +def test_allmod(conf): + assert conf.allmodconfig() == 0 + assert conf.config_contains('allmod_expected_config') + + +def test_allno(conf): + assert conf.allnoconfig() == 0 + assert conf.config_contains('allno_expected_config') + + +def test_alldef(conf): + assert conf.alldefconfig() == 0 + assert conf.config_contains('alldef_expected_config') diff --git a/scripts/kconfig/tests/choice/alldef_expected_config b/scripts/kconfig/tests/choice/alldef_expected_config new file mode 100644 index 00000000000..7a754bf4be9 --- /dev/null +++ b/scripts/kconfig/tests/choice/alldef_expected_config @@ -0,0 +1,5 @@ +CONFIG_MODULES=y +# CONFIG_BOOL_CHOICE0 is not set +CONFIG_BOOL_CHOICE1=y +# CONFIG_TRI_CHOICE0 is not set +# CONFIG_TRI_CHOICE1 is not set diff --git a/scripts/kconfig/tests/choice/allmod_expected_config b/scripts/kconfig/tests/choice/allmod_expected_config new file mode 100644 index 00000000000..f1f5dcdb792 --- /dev/null +++ b/scripts/kconfig/tests/choice/allmod_expected_config @@ -0,0 +1,9 @@ +CONFIG_MODULES=y +# CONFIG_BOOL_CHOICE0 is not set +CONFIG_BOOL_CHOICE1=y +# CONFIG_OPT_BOOL_CHOICE0 is not set +CONFIG_OPT_BOOL_CHOICE1=y +CONFIG_TRI_CHOICE0=m +CONFIG_TRI_CHOICE1=m +CONFIG_OPT_TRI_CHOICE0=m +CONFIG_OPT_TRI_CHOICE1=m diff --git a/scripts/kconfig/tests/choice/allno_expected_config b/scripts/kconfig/tests/choice/allno_expected_config new file mode 100644 index 00000000000..b88ee7a4313 --- /dev/null +++ b/scripts/kconfig/tests/choice/allno_expected_config @@ -0,0 +1,5 @@ +# CONFIG_MODULES is not set +# CONFIG_BOOL_CHOICE0 is not set +CONFIG_BOOL_CHOICE1=y +# CONFIG_TRI_CHOICE0 is not set +CONFIG_TRI_CHOICE1=y diff --git a/scripts/kconfig/tests/choice/allyes_expected_config b/scripts/kconfig/tests/choice/allyes_expected_config new file mode 100644 index 00000000000..e5a062a1157 --- /dev/null +++ b/scripts/kconfig/tests/choice/allyes_expected_config @@ -0,0 +1,9 @@ +CONFIG_MODULES=y +# CONFIG_BOOL_CHOICE0 is not set +CONFIG_BOOL_CHOICE1=y +# CONFIG_OPT_BOOL_CHOICE0 is not set +CONFIG_OPT_BOOL_CHOICE1=y +# CONFIG_TRI_CHOICE0 is not set +CONFIG_TRI_CHOICE1=y +# CONFIG_OPT_TRI_CHOICE0 is not set +CONFIG_OPT_TRI_CHOICE1=y diff --git a/scripts/kconfig/tests/choice/oldask0_expected_stdout b/scripts/kconfig/tests/choice/oldask0_expected_stdout new file mode 100644 index 00000000000..b251bba9698 --- /dev/null +++ b/scripts/kconfig/tests/choice/oldask0_expected_stdout @@ -0,0 +1,10 @@ +Enable loadable module support (MODULES) [Y/n/?] (NEW) +boolean choice + 1. choice 0 (BOOL_CHOICE0) (NEW) +> 2. choice 1 (BOOL_CHOICE1) (NEW) +choice[1-2?]: +optional boolean choice [N/y/?] (NEW) +tristate choice [M/y/?] (NEW) + choice 0 (TRI_CHOICE0) [N/m/?] (NEW) + choice 1 (TRI_CHOICE1) [N/m/?] (NEW) +optional tristate choice [N/m/y/?] (NEW) diff --git a/scripts/kconfig/tests/choice/oldask1_config b/scripts/kconfig/tests/choice/oldask1_config new file mode 100644 index 00000000000..b67bfe3c641 --- /dev/null +++ b/scripts/kconfig/tests/choice/oldask1_config @@ -0,0 +1,2 @@ +# CONFIG_MODULES is not set +CONFIG_OPT_BOOL_CHOICE0=y diff --git a/scripts/kconfig/tests/choice/oldask1_expected_stdout b/scripts/kconfig/tests/choice/oldask1_expected_stdout new file mode 100644 index 00000000000..c2125e9bf96 --- /dev/null +++ b/scripts/kconfig/tests/choice/oldask1_expected_stdout @@ -0,0 +1,15 @@ +Enable loadable module support (MODULES) [N/y/?] +boolean choice + 1. choice 0 (BOOL_CHOICE0) (NEW) +> 2. choice 1 (BOOL_CHOICE1) (NEW) +choice[1-2?]: +optional boolean choice [Y/n/?] (NEW) +optional boolean choice +> 1. choice 0 (OPT_BOOL_CHOICE0) + 2. choice 1 (OPT_BOOL_CHOICE1) (NEW) +choice[1-2?]: +tristate choice + 1. choice 0 (TRI_CHOICE0) (NEW) +> 2. choice 1 (TRI_CHOICE1) (NEW) +choice[1-2?]: +optional tristate choice [N/y/?] diff --git a/scripts/kconfig/tests/choice_value_with_m_dep/Kconfig b/scripts/kconfig/tests/choice_value_with_m_dep/Kconfig new file mode 100644 index 00000000000..11ac25c2604 --- /dev/null +++ b/scripts/kconfig/tests/choice_value_with_m_dep/Kconfig @@ -0,0 +1,19 @@ +config MODULES + def_bool y + option modules + +config DEP + tristate + default m + +choice + prompt "Tristate Choice" + +config CHOICE0 + tristate "Choice 0" + +config CHOICE1 + tristate "Choice 1" + depends on DEP + +endchoice diff --git a/scripts/kconfig/tests/choice_value_with_m_dep/__init__.py b/scripts/kconfig/tests/choice_value_with_m_dep/__init__.py new file mode 100644 index 00000000000..f8d728c7b10 --- /dev/null +++ b/scripts/kconfig/tests/choice_value_with_m_dep/__init__.py @@ -0,0 +1,15 @@ +""" +Hide tristate choice values with mod dependency in y choice. + +If tristate choice values depend on symbols set to 'm', they should be +hidden when the choice containing them is changed from 'm' to 'y' +(i.e. exclusive choice). + +Related Linux commit: fa64e5f6a35efd5e77d639125d973077ca506074 +""" + + +def test(conf): + assert conf.oldaskconfig('config', 'y') == 0 + assert conf.config_contains('expected_config') + assert conf.stdout_contains('expected_stdout') diff --git a/scripts/kconfig/tests/choice_value_with_m_dep/config b/scripts/kconfig/tests/choice_value_with_m_dep/config new file mode 100644 index 00000000000..3a126b7a254 --- /dev/null +++ b/scripts/kconfig/tests/choice_value_with_m_dep/config @@ -0,0 +1,2 @@ +CONFIG_CHOICE0=m +CONFIG_CHOICE1=m diff --git a/scripts/kconfig/tests/choice_value_with_m_dep/expected_config b/scripts/kconfig/tests/choice_value_with_m_dep/expected_config new file mode 100644 index 00000000000..4d07b449540 --- /dev/null +++ b/scripts/kconfig/tests/choice_value_with_m_dep/expected_config @@ -0,0 +1,3 @@ +CONFIG_MODULES=y +CONFIG_DEP=m +CONFIG_CHOICE0=y diff --git a/scripts/kconfig/tests/choice_value_with_m_dep/expected_stdout b/scripts/kconfig/tests/choice_value_with_m_dep/expected_stdout new file mode 100644 index 00000000000..2b50ab65c86 --- /dev/null +++ b/scripts/kconfig/tests/choice_value_with_m_dep/expected_stdout @@ -0,0 +1,4 @@ +Tristate Choice [M/y/?] y +Tristate Choice +> 1. Choice 0 (CHOICE0) +choice[1]: 1 diff --git a/scripts/kconfig/tests/conftest.py b/scripts/kconfig/tests/conftest.py new file mode 100644 index 00000000000..0345ef6e327 --- /dev/null +++ b/scripts/kconfig/tests/conftest.py @@ -0,0 +1,291 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Copyright (C) 2018 Masahiro Yamada <yamada.masahiro@socionext.com> +# + +""" +Kconfig unit testing framework. + +This provides fixture functions commonly used from test files. +""" + +import os +import pytest +import shutil +import subprocess +import tempfile + +CONF_PATH = os.path.abspath(os.path.join('scripts', 'kconfig', 'conf')) + + +class Conf: + """Kconfig runner and result checker. + + This class provides methods to run text-based interface of Kconfig + (scripts/kconfig/conf) and retrieve the resulted configuration, + stdout, and stderr. It also provides methods to compare those + results with expectations. + """ + + def __init__(self, request): + """Create a new Conf instance. + + request: object to introspect the requesting test module + """ + # the directory of the test being run + self._test_dir = os.path.dirname(str(request.fspath)) + + # runners + def _run_conf(self, mode, dot_config=None, out_file='.config', + interactive=False, in_keys=None, extra_env={}): + """Run text-based Kconfig executable and save the result. + + mode: input mode option (--oldaskconfig, --defconfig=<file> etc.) + dot_config: .config file to use for configuration base + out_file: file name to contain the output config data + interactive: flag to specify the interactive mode + in_keys: key inputs for interactive modes + extra_env: additional environments + returncode: exit status of the Kconfig executable + """ + command = [CONF_PATH, mode, 'Kconfig'] + + # Override 'srctree' environment to make the test as the top directory + extra_env['srctree'] = self._test_dir + + # Run Kconfig in a temporary directory. + # This directory is automatically removed when done. + with tempfile.TemporaryDirectory() as temp_dir: + + # if .config is given, copy it to the working directory + if dot_config: + shutil.copyfile(os.path.join(self._test_dir, dot_config), + os.path.join(temp_dir, '.config')) + + ps = subprocess.Popen(command, + stdin=subprocess.PIPE, + stdout=subprocess.PIPE, + stderr=subprocess.PIPE, + cwd=temp_dir, + env=dict(os.environ, **extra_env)) + + # If input key sequence is given, feed it to stdin. + if in_keys: + ps.stdin.write(in_keys.encode('utf-8')) + + while ps.poll() is None: + # For interactive modes such as oldaskconfig, oldconfig, + # send 'Enter' key until the program finishes. + if interactive: + ps.stdin.write(b'\n') + + self.retcode = ps.returncode + self.stdout = ps.stdout.read().decode() + self.stderr = ps.stderr.read().decode() + + # Retrieve the resulted config data only when .config is supposed + # to exist. If the command fails, the .config does not exist. + # 'listnewconfig' does not produce .config in the first place. + if self.retcode == 0 and out_file: + with open(os.path.join(temp_dir, out_file)) as f: + self.config = f.read() + else: + self.config = None + + # Logging: + # Pytest captures the following information by default. In failure + # of tests, the captured log will be displayed. This will be useful to + # figure out what has happened. + + print("[command]\n{}\n".format(' '.join(command))) + + print("[retcode]\n{}\n".format(self.retcode)) + + print("[stdout]") + print(self.stdout) + + print("[stderr]") + print(self.stderr) + + if self.config is not None: + print("[output for '{}']".format(out_file)) + print(self.config) + + return self.retcode + + def oldaskconfig(self, dot_config=None, in_keys=None): + """Run oldaskconfig. + + dot_config: .config file to use for configuration base (optional) + in_key: key inputs (optional) + returncode: exit status of the Kconfig executable + """ + return self._run_conf('--oldaskconfig', dot_config=dot_config, + interactive=True, in_keys=in_keys) + + def oldconfig(self, dot_config=None, in_keys=None): + """Run oldconfig. + + dot_config: .config file to use for configuration base (optional) + in_key: key inputs (optional) + returncode: exit status of the Kconfig executable + """ + return self._run_conf('--oldconfig', dot_config=dot_config, + interactive=True, in_keys=in_keys) + + def olddefconfig(self, dot_config=None): + """Run olddefconfig. + + dot_config: .config file to use for configuration base (optional) + returncode: exit status of the Kconfig executable + """ + return self._run_conf('--olddefconfig', dot_config=dot_config) + + def defconfig(self, defconfig): + """Run defconfig. + + defconfig: defconfig file for input + returncode: exit status of the Kconfig executable + """ + defconfig_path = os.path.join(self._test_dir, defconfig) + return self._run_conf('--defconfig={}'.format(defconfig_path)) + + def _allconfig(self, mode, all_config): + if all_config: + all_config_path = os.path.join(self._test_dir, all_config) + extra_env = {'KCONFIG_ALLCONFIG': all_config_path} + else: + extra_env = {} + + return self._run_conf('--{}config'.format(mode), extra_env=extra_env) + + def allyesconfig(self, all_config=None): + """Run allyesconfig. + + all_config: fragment config file for KCONFIG_ALLCONFIG (optional) + returncode: exit status of the Kconfig executable + """ + return self._allconfig('allyes', all_config) + + def allmodconfig(self, all_config=None): + """Run allmodconfig. + + all_config: fragment config file for KCONFIG_ALLCONFIG (optional) + returncode: exit status of the Kconfig executable + """ + return self._allconfig('allmod', all_config) + + def allnoconfig(self, all_config=None): + """Run allnoconfig. + + all_config: fragment config file for KCONFIG_ALLCONFIG (optional) + returncode: exit status of the Kconfig executable + """ + return self._allconfig('allno', all_config) + + def alldefconfig(self, all_config=None): + """Run alldefconfig. + + all_config: fragment config file for KCONFIG_ALLCONFIG (optional) + returncode: exit status of the Kconfig executable + """ + return self._allconfig('alldef', all_config) + + def randconfig(self, all_config=None): + """Run randconfig. + + all_config: fragment config file for KCONFIG_ALLCONFIG (optional) + returncode: exit status of the Kconfig executable + """ + return self._allconfig('rand', all_config) + + def savedefconfig(self, dot_config): + """Run savedefconfig. + + dot_config: .config file for input + returncode: exit status of the Kconfig executable + """ + return self._run_conf('--savedefconfig', out_file='defconfig') + + def listnewconfig(self, dot_config=None): + """Run listnewconfig. + + dot_config: .config file to use for configuration base (optional) + returncode: exit status of the Kconfig executable + """ + return self._run_conf('--listnewconfig', dot_config=dot_config, + out_file=None) + + # checkers + def _read_and_compare(self, compare, expected): + """Compare the result with expectation. + + compare: function to compare the result with expectation + expected: file that contains the expected data + """ + with open(os.path.join(self._test_dir, expected)) as f: + expected_data = f.read() + return compare(self, expected_data) + + def _contains(self, attr, expected): + return self._read_and_compare( + lambda s, e: getattr(s, attr).find(e) >= 0, + expected) + + def _matches(self, attr, expected): + return self._read_and_compare(lambda s, e: getattr(s, attr) == e, + expected) + + def config_contains(self, expected): + """Check if resulted configuration contains expected data. + + expected: file that contains the expected data + returncode: True if result contains the expected data, False otherwise + """ + return self._contains('config', expected) + + def config_matches(self, expected): + """Check if resulted configuration exactly matches expected data. + + expected: file that contains the expected data + returncode: True if result matches the expected data, False otherwise + """ + return self._matches('config', expected) + + def stdout_contains(self, expected): + """Check if resulted stdout contains expected data. + + expected: file that contains the expected data + returncode: True if result contains the expected data, False otherwise + """ + return self._contains('stdout', expected) + + def stdout_matches(self, expected): + """Check if resulted stdout exactly matches expected data. + + expected: file that contains the expected data + returncode: True if result matches the expected data, False otherwise + """ + return self._matches('stdout', expected) + + def stderr_contains(self, expected): + """Check if resulted stderr contains expected data. + + expected: file that contains the expected data + returncode: True if result contains the expected data, False otherwise + """ + return self._contains('stderr', expected) + + def stderr_matches(self, expected): + """Check if resulted stderr exactly matches expected data. + + expected: file that contains the expected data + returncode: True if result matches the expected data, False otherwise + """ + return self._matches('stderr', expected) + + +@pytest.fixture(scope="module") +def conf(request): + """Create a Conf instance and provide it to test functions.""" + return Conf(request) diff --git a/scripts/kconfig/tests/err_recursive_inc/Kconfig b/scripts/kconfig/tests/err_recursive_inc/Kconfig new file mode 100644 index 00000000000..0e4c8750ab6 --- /dev/null +++ b/scripts/kconfig/tests/err_recursive_inc/Kconfig @@ -0,0 +1 @@ +source "Kconfig.inc1" diff --git a/scripts/kconfig/tests/err_recursive_inc/Kconfig.inc1 b/scripts/kconfig/tests/err_recursive_inc/Kconfig.inc1 new file mode 100644 index 00000000000..00e408d653f --- /dev/null +++ b/scripts/kconfig/tests/err_recursive_inc/Kconfig.inc1 @@ -0,0 +1,4 @@ + + + +source "Kconfig.inc2" diff --git a/scripts/kconfig/tests/err_recursive_inc/Kconfig.inc2 b/scripts/kconfig/tests/err_recursive_inc/Kconfig.inc2 new file mode 100644 index 00000000000..349ea2db15d --- /dev/null +++ b/scripts/kconfig/tests/err_recursive_inc/Kconfig.inc2 @@ -0,0 +1,3 @@ + + +source "Kconfig.inc3" diff --git a/scripts/kconfig/tests/err_recursive_inc/Kconfig.inc3 b/scripts/kconfig/tests/err_recursive_inc/Kconfig.inc3 new file mode 100644 index 00000000000..0e4c8750ab6 --- /dev/null +++ b/scripts/kconfig/tests/err_recursive_inc/Kconfig.inc3 @@ -0,0 +1 @@ +source "Kconfig.inc1" diff --git a/scripts/kconfig/tests/err_recursive_inc/__init__.py b/scripts/kconfig/tests/err_recursive_inc/__init__.py new file mode 100644 index 00000000000..0e4c839c54a --- /dev/null +++ b/scripts/kconfig/tests/err_recursive_inc/__init__.py @@ -0,0 +1,10 @@ +""" +Detect recursive inclusion error. + +If recursive inclusion is detected, it should fail with error messages. +""" + + +def test(conf): + assert conf.oldaskconfig() != 0 + assert conf.stderr_contains('expected_stderr') diff --git a/scripts/kconfig/tests/err_recursive_inc/expected_stderr b/scripts/kconfig/tests/err_recursive_inc/expected_stderr new file mode 100644 index 00000000000..6b582eee217 --- /dev/null +++ b/scripts/kconfig/tests/err_recursive_inc/expected_stderr @@ -0,0 +1,6 @@ +Recursive inclusion detected. +Inclusion path: + current file : Kconfig.inc1 + included from: Kconfig.inc3:1 + included from: Kconfig.inc2:3 + included from: Kconfig.inc1:4 diff --git a/scripts/kconfig/tests/inter_choice/Kconfig b/scripts/kconfig/tests/inter_choice/Kconfig new file mode 100644 index 00000000000..e44449f075d --- /dev/null +++ b/scripts/kconfig/tests/inter_choice/Kconfig @@ -0,0 +1,23 @@ +config MODULES + def_bool y + option modules + +choice + prompt "Choice" + +config CHOICE_VAL0 + tristate "Choice 0" + +config CHOIVE_VAL1 + tristate "Choice 1" + +endchoice + +choice + prompt "Another choice" + depends on CHOICE_VAL0 + +config DUMMY + bool "dummy" + +endchoice diff --git a/scripts/kconfig/tests/inter_choice/__init__.py b/scripts/kconfig/tests/inter_choice/__init__.py new file mode 100644 index 00000000000..5c7fc365ed4 --- /dev/null +++ b/scripts/kconfig/tests/inter_choice/__init__.py @@ -0,0 +1,14 @@ +""" +Do not affect user-assigned choice value by another choice. + +Handling of state flags for choices is complecated. In old days, +the defconfig result of a choice could be affected by another choice +if those choices interact by 'depends on', 'select', etc. + +Related Linux commit: fbe98bb9ed3dae23e320c6b113e35f129538d14a +""" + + +def test(conf): + assert conf.defconfig('defconfig') == 0 + assert conf.config_contains('expected_config') diff --git a/scripts/kconfig/tests/inter_choice/defconfig b/scripts/kconfig/tests/inter_choice/defconfig new file mode 100644 index 00000000000..162c4148e2a --- /dev/null +++ b/scripts/kconfig/tests/inter_choice/defconfig @@ -0,0 +1 @@ +CONFIG_CHOICE_VAL0=y diff --git a/scripts/kconfig/tests/inter_choice/expected_config b/scripts/kconfig/tests/inter_choice/expected_config new file mode 100644 index 00000000000..5dceefb054e --- /dev/null +++ b/scripts/kconfig/tests/inter_choice/expected_config @@ -0,0 +1,4 @@ +CONFIG_MODULES=y +CONFIG_CHOICE_VAL0=y +# CONFIG_CHOIVE_VAL1 is not set +CONFIG_DUMMY=y diff --git a/scripts/kconfig/tests/new_choice_with_dep/Kconfig b/scripts/kconfig/tests/new_choice_with_dep/Kconfig new file mode 100644 index 00000000000..53ef1b86e7b --- /dev/null +++ b/scripts/kconfig/tests/new_choice_with_dep/Kconfig @@ -0,0 +1,37 @@ +config A + bool "A" + help + This is a new symbol. + +choice + prompt "Choice ?" + depends on A + help + "depends on A" has been newly added. + +config CHOICE_B + bool "Choice B" + +config CHOICE_C + bool "Choice C" + help + This is a new symbol, so should be asked. + +endchoice + +choice + prompt "Choice2 ?" + +config CHOICE_D + bool "Choice D" + +config CHOICE_E + bool "Choice E" + +config CHOICE_F + bool "Choice F" + depends on A + help + This is a new symbol, so should be asked. + +endchoice diff --git a/scripts/kconfig/tests/new_choice_with_dep/__init__.py b/scripts/kconfig/tests/new_choice_with_dep/__init__.py new file mode 100644 index 00000000000..f0e0ead0f32 --- /dev/null +++ b/scripts/kconfig/tests/new_choice_with_dep/__init__.py @@ -0,0 +1,14 @@ +""" +Ask new choice values when they become visible. + +If new choice values are added with new dependency, and they become +visible during user configuration, oldconfig should recognize them +as (NEW), and ask the user for choice. + +Related Linux commit: 5d09598d488f081e3be23f885ed65cbbe2d073b5 +""" + + +def test(conf): + assert conf.oldconfig('config', 'y') == 0 + assert conf.stdout_contains('expected_stdout') diff --git a/scripts/kconfig/tests/new_choice_with_dep/config b/scripts/kconfig/tests/new_choice_with_dep/config new file mode 100644 index 00000000000..47ef95d567f --- /dev/null +++ b/scripts/kconfig/tests/new_choice_with_dep/config @@ -0,0 +1,3 @@ +CONFIG_CHOICE_B=y +# CONFIG_CHOICE_D is not set +CONFIG_CHOICE_E=y diff --git a/scripts/kconfig/tests/new_choice_with_dep/expected_stdout b/scripts/kconfig/tests/new_choice_with_dep/expected_stdout new file mode 100644 index 00000000000..74dc0bcb22b --- /dev/null +++ b/scripts/kconfig/tests/new_choice_with_dep/expected_stdout @@ -0,0 +1,10 @@ +A (A) [N/y/?] (NEW) y + Choice ? + > 1. Choice B (CHOICE_B) + 2. Choice C (CHOICE_C) (NEW) + choice[1-2?]: +Choice2 ? + 1. Choice D (CHOICE_D) +> 2. Choice E (CHOICE_E) + 3. Choice F (CHOICE_F) (NEW) +choice[1-3?]: diff --git a/scripts/kconfig/tests/no_write_if_dep_unmet/Kconfig b/scripts/kconfig/tests/no_write_if_dep_unmet/Kconfig new file mode 100644 index 00000000000..c00b8fe54f4 --- /dev/null +++ b/scripts/kconfig/tests/no_write_if_dep_unmet/Kconfig @@ -0,0 +1,14 @@ +config A + bool "A" + +choice + prompt "Choice ?" + depends on A + +config CHOICE_B + bool "Choice B" + +config CHOICE_C + bool "Choice C" + +endchoice diff --git a/scripts/kconfig/tests/no_write_if_dep_unmet/__init__.py b/scripts/kconfig/tests/no_write_if_dep_unmet/__init__.py new file mode 100644 index 00000000000..207261b0fe0 --- /dev/null +++ b/scripts/kconfig/tests/no_write_if_dep_unmet/__init__.py @@ -0,0 +1,19 @@ +""" +Do not write choice values to .config if the dependency is unmet. + +"# CONFIG_... is not set" should not be written into the .config file +for symbols with unmet dependency. + +This was not working correctly for choice values because choice needs +a bit different symbol computation. + +This checks that no unneeded "# COFIG_... is not set" is contained in +the .config file. + +Related Linux commit: cb67ab2cd2b8abd9650292c986c79901e3073a59 +""" + + +def test(conf): + assert conf.oldaskconfig('config', 'n') == 0 + assert conf.config_matches('expected_config') diff --git a/scripts/kconfig/tests/no_write_if_dep_unmet/config b/scripts/kconfig/tests/no_write_if_dep_unmet/config new file mode 100644 index 00000000000..abd280e2f61 --- /dev/null +++ b/scripts/kconfig/tests/no_write_if_dep_unmet/config @@ -0,0 +1 @@ +CONFIG_A=y diff --git a/scripts/kconfig/tests/no_write_if_dep_unmet/expected_config b/scripts/kconfig/tests/no_write_if_dep_unmet/expected_config new file mode 100644 index 00000000000..0d15e41da47 --- /dev/null +++ b/scripts/kconfig/tests/no_write_if_dep_unmet/expected_config @@ -0,0 +1,5 @@ +# +# Automatically generated file; DO NOT EDIT. +# Linux Kernel Configuration +# +# CONFIG_A is not set diff --git a/scripts/kconfig/tests/pytest.ini b/scripts/kconfig/tests/pytest.ini new file mode 100644 index 00000000000..85d7ce8e448 --- /dev/null +++ b/scripts/kconfig/tests/pytest.ini @@ -0,0 +1,7 @@ +[pytest] +addopts = --verbose + +# Pytest requires that test files have unique names, because pytest imports +# them as top-level modules. It is silly to prefix or suffix a test file with +# the directory name that contains it. Use __init__.py for all test files. +python_files = __init__.py diff --git a/scripts/kconfig/tests/rand_nested_choice/Kconfig b/scripts/kconfig/tests/rand_nested_choice/Kconfig new file mode 100644 index 00000000000..c591d512929 --- /dev/null +++ b/scripts/kconfig/tests/rand_nested_choice/Kconfig @@ -0,0 +1,33 @@ +choice + prompt "choice" + +config A + bool "A" + +config B + bool "B" + +if B +choice + prompt "sub choice" + +config C + bool "C" + +config D + bool "D" + +if D +choice + prompt "subsub choice" + +config E + bool "E" + +endchoice +endif # D + +endchoice +endif # B + +endchoice diff --git a/scripts/kconfig/tests/rand_nested_choice/__init__.py b/scripts/kconfig/tests/rand_nested_choice/__init__.py new file mode 100644 index 00000000000..e729a4e8521 --- /dev/null +++ b/scripts/kconfig/tests/rand_nested_choice/__init__.py @@ -0,0 +1,16 @@ +""" +Set random values recursively in nested choices. + +Kconfig can create a choice-in-choice structure by using 'if' statement. +randconfig should correctly set random choice values. + +Related Linux commit: 3b9a19e08960e5cdad5253998637653e592a3c29 +""" + + +def test(conf): + for i in range(20): + assert conf.randconfig() == 0 + assert (conf.config_contains('expected_stdout0') or + conf.config_contains('expected_stdout1') or + conf.config_contains('expected_stdout2')) diff --git a/scripts/kconfig/tests/rand_nested_choice/expected_stdout0 b/scripts/kconfig/tests/rand_nested_choice/expected_stdout0 new file mode 100644 index 00000000000..05450f3d4eb --- /dev/null +++ b/scripts/kconfig/tests/rand_nested_choice/expected_stdout0 @@ -0,0 +1,2 @@ +CONFIG_A=y +# CONFIG_B is not set diff --git a/scripts/kconfig/tests/rand_nested_choice/expected_stdout1 b/scripts/kconfig/tests/rand_nested_choice/expected_stdout1 new file mode 100644 index 00000000000..37ab2958415 --- /dev/null +++ b/scripts/kconfig/tests/rand_nested_choice/expected_stdout1 @@ -0,0 +1,4 @@ +# CONFIG_A is not set +CONFIG_B=y +CONFIG_C=y +# CONFIG_D is not set diff --git a/scripts/kconfig/tests/rand_nested_choice/expected_stdout2 b/scripts/kconfig/tests/rand_nested_choice/expected_stdout2 new file mode 100644 index 00000000000..849ff47e984 --- /dev/null +++ b/scripts/kconfig/tests/rand_nested_choice/expected_stdout2 @@ -0,0 +1,5 @@ +# CONFIG_A is not set +CONFIG_B=y +# CONFIG_C is not set +CONFIG_D=y +CONFIG_E=y diff --git a/scripts/kconfig/tests/warn_recursive_dep/Kconfig b/scripts/kconfig/tests/warn_recursive_dep/Kconfig new file mode 100644 index 00000000000..a65bfcb7137 --- /dev/null +++ b/scripts/kconfig/tests/warn_recursive_dep/Kconfig @@ -0,0 +1,62 @@ +# depends on itself + +config A + bool "A" + depends on A + +# select itself + +config B + bool + select B + +# depends on each other + +config C1 + bool "C1" + depends on C2 + +config C2 + bool "C2" + depends on C1 + +# depends on and select + +config D1 + bool "D1" + depends on D2 + select D2 + +config D2 + bool + +# depends on and imply +# This is not recursive dependency + +config E1 + bool "E1" + depends on E2 + imply E2 + +config E2 + bool "E2" + +# property + +config F1 + bool "F1" + default F2 + +config F2 + bool "F2" + depends on F1 + +# menu + +menu "menu depending on its content" + depends on G + +config G + bool "G" + +endmenu diff --git a/scripts/kconfig/tests/warn_recursive_dep/__init__.py b/scripts/kconfig/tests/warn_recursive_dep/__init__.py new file mode 100644 index 00000000000..adb21951ba4 --- /dev/null +++ b/scripts/kconfig/tests/warn_recursive_dep/__init__.py @@ -0,0 +1,9 @@ +""" +Warn recursive inclusion. + +Recursive dependency should be warned. +""" + +def test(conf): + assert conf.oldaskconfig() == 0 + assert conf.stderr_contains('expected_stderr') diff --git a/scripts/kconfig/tests/warn_recursive_dep/expected_stderr b/scripts/kconfig/tests/warn_recursive_dep/expected_stderr new file mode 100644 index 00000000000..3de807dd9cb --- /dev/null +++ b/scripts/kconfig/tests/warn_recursive_dep/expected_stderr @@ -0,0 +1,30 @@ +Kconfig:9:error: recursive dependency detected! +Kconfig:9: symbol B is selected by B +For a resolution refer to Documentation/kbuild/kconfig-language.txt +subsection "Kconfig recursive dependency limitations" + +Kconfig:3:error: recursive dependency detected! +Kconfig:3: symbol A depends on A +For a resolution refer to Documentation/kbuild/kconfig-language.txt +subsection "Kconfig recursive dependency limitations" + +Kconfig:15:error: recursive dependency detected! +Kconfig:15: symbol C1 depends on C2 +Kconfig:19: symbol C2 depends on C1 +For a resolution refer to Documentation/kbuild/kconfig-language.txt +subsection "Kconfig recursive dependency limitations" + +Kconfig:30:error: recursive dependency detected! +Kconfig:30: symbol D2 is selected by D1 +Kconfig:25: symbol D1 depends on D2 +For a resolution refer to Documentation/kbuild/kconfig-language.txt +subsection "Kconfig recursive dependency limitations" + +Kconfig:59:error: recursive dependency detected! +Kconfig:59: symbol G depends on G +For a resolution refer to Documentation/kbuild/kconfig-language.txt +subsection "Kconfig recursive dependency limitations" + +Kconfig:50:error: recursive dependency detected! +Kconfig:50: symbol F2 depends on F1 +Kconfig:48: symbol F1 default value contains F2 diff --git a/scripts/kconfig/util.c b/scripts/kconfig/util.c index 0e76042473c..c6f6e21b809 100644 --- a/scripts/kconfig/util.c +++ b/scripts/kconfig/util.c @@ -14,11 +14,11 @@ struct file *file_lookup(const char *name) { struct file *file; - const char *file_name = sym_expand_string_value(name); + char *file_name = sym_expand_string_value(name); for (file = file_list; file; file = file->next) { if (!strcmp(name, file->name)) { - free((void *)file_name); + free(file_name); return file; } } @@ -104,7 +104,7 @@ void str_append(struct gstr *gs, const char *s) if (s) { l = strlen(gs->s) + strlen(s) + 1; if (l > gs->len) { - gs->s = realloc(gs->s, l); + gs->s = xrealloc(gs->s, l); gs->len = l; } strcat(gs->s, s); @@ -145,3 +145,23 @@ void *xcalloc(size_t nmemb, size_t size) fprintf(stderr, "Out of memory.\n"); exit(1); } + +void *xrealloc(void *p, size_t size) +{ + p = realloc(p, size); + if (p) + return p; + fprintf(stderr, "Out of memory.\n"); + exit(1); +} + +char *xstrdup(const char *s) +{ + char *p; + + p = strdup(s); + if (p) + return p; + fprintf(stderr, "Out of memory.\n"); + exit(1); +} diff --git a/scripts/kconfig/zconf.gperf b/scripts/kconfig/zconf.gperf deleted file mode 100644 index ead02edec93..00000000000 --- a/scripts/kconfig/zconf.gperf +++ /dev/null @@ -1,50 +0,0 @@ -%language=ANSI-C -%define hash-function-name kconf_id_hash -%define lookup-function-name kconf_id_lookup -%define string-pool-name kconf_id_strings -%compare-strncmp -%enum -%pic -%struct-type - -struct kconf_id; - -static const struct kconf_id *kconf_id_lookup(register const char *str, register unsigned int len); - -%% -mainmenu, T_MAINMENU, TF_COMMAND -menu, T_MENU, TF_COMMAND -endmenu, T_ENDMENU, TF_COMMAND -source, T_SOURCE, TF_COMMAND -choice, T_CHOICE, TF_COMMAND -endchoice, T_ENDCHOICE, TF_COMMAND -comment, T_COMMENT, TF_COMMAND -config, T_CONFIG, TF_COMMAND -menuconfig, T_MENUCONFIG, TF_COMMAND -help, T_HELP, TF_COMMAND ----help---, T_HELP, TF_COMMAND -if, T_IF, TF_COMMAND|TF_PARAM -endif, T_ENDIF, TF_COMMAND -depends, T_DEPENDS, TF_COMMAND -optional, T_OPTIONAL, TF_COMMAND -default, T_DEFAULT, TF_COMMAND, S_UNKNOWN -prompt, T_PROMPT, TF_COMMAND -tristate, T_TYPE, TF_COMMAND, S_TRISTATE -def_tristate, T_DEFAULT, TF_COMMAND, S_TRISTATE -bool, T_TYPE, TF_COMMAND, S_BOOLEAN -boolean, T_TYPE, TF_COMMAND, S_BOOLEAN -def_bool, T_DEFAULT, TF_COMMAND, S_BOOLEAN -int, T_TYPE, TF_COMMAND, S_INT -hex, T_TYPE, TF_COMMAND, S_HEX -string, T_TYPE, TF_COMMAND, S_STRING -select, T_SELECT, TF_COMMAND -imply, T_IMPLY, TF_COMMAND -range, T_RANGE, TF_COMMAND -visible, T_VISIBLE, TF_COMMAND -option, T_OPTION, TF_COMMAND -on, T_ON, TF_PARAM -modules, T_OPT_MODULES, TF_OPTION -defconfig_list, T_OPT_DEFCONFIG_LIST,TF_OPTION -env, T_OPT_ENV, TF_OPTION -allnoconfig_y, T_OPT_ALLNOCONFIG_Y,TF_OPTION -%% diff --git a/scripts/kconfig/zconf.hash.c_shipped b/scripts/kconfig/zconf.hash.c_shipped deleted file mode 100644 index d51b15de074..00000000000 --- a/scripts/kconfig/zconf.hash.c_shipped +++ /dev/null @@ -1,297 +0,0 @@ -/* ANSI-C code produced by gperf version 3.0.4 */ -/* Command-line: gperf -t --output-file scripts/kconfig/zconf.hash.c_shipped -a -C -E -g -k '1,3,$' -p -t scripts/kconfig/zconf.gperf */ - -#if !((' ' == 32) && ('!' == 33) && ('"' == 34) && ('#' == 35) \ - && ('%' == 37) && ('&' == 38) && ('\'' == 39) && ('(' == 40) \ - && (')' == 41) && ('*' == 42) && ('+' == 43) && (',' == 44) \ - && ('-' == 45) && ('.' == 46) && ('/' == 47) && ('0' == 48) \ - && ('1' == 49) && ('2' == 50) && ('3' == 51) && ('4' == 52) \ - && ('5' == 53) && ('6' == 54) && ('7' == 55) && ('8' == 56) \ - && ('9' == 57) && (':' == 58) && (';' == 59) && ('<' == 60) \ - && ('=' == 61) && ('>' == 62) && ('?' == 63) && ('A' == 65) \ - && ('B' == 66) && ('C' == 67) && ('D' == 68) && ('E' == 69) \ - && ('F' == 70) && ('G' == 71) && ('H' == 72) && ('I' == 73) \ - && ('J' == 74) && ('K' == 75) && ('L' == 76) && ('M' == 77) \ - && ('N' == 78) && ('O' == 79) && ('P' == 80) && ('Q' == 81) \ - && ('R' == 82) && ('S' == 83) && ('T' == 84) && ('U' == 85) \ - && ('V' == 86) && ('W' == 87) && ('X' == 88) && ('Y' == 89) \ - && ('Z' == 90) && ('[' == 91) && ('\\' == 92) && (']' == 93) \ - && ('^' == 94) && ('_' == 95) && ('a' == 97) && ('b' == 98) \ - && ('c' == 99) && ('d' == 100) && ('e' == 101) && ('f' == 102) \ - && ('g' == 103) && ('h' == 104) && ('i' == 105) && ('j' == 106) \ - && ('k' == 107) && ('l' == 108) && ('m' == 109) && ('n' == 110) \ - && ('o' == 111) && ('p' == 112) && ('q' == 113) && ('r' == 114) \ - && ('s' == 115) && ('t' == 116) && ('u' == 117) && ('v' == 118) \ - && ('w' == 119) && ('x' == 120) && ('y' == 121) && ('z' == 122) \ - && ('{' == 123) && ('|' == 124) && ('}' == 125) && ('~' == 126)) -/* The character set is not based on ISO-646. */ -#error "gperf generated tables don't work with this execution character set. Please report a bug to <bug-gnu-gperf@gnu.org>." -#endif - -#line 10 "scripts/kconfig/zconf.gperf" -struct kconf_id; - -static const struct kconf_id *kconf_id_lookup(register const char *str, register unsigned int len); -/* maximum key range = 71, duplicates = 0 */ - -#ifdef __GNUC__ -__inline -#else -#ifdef __cplusplus -inline -#endif -#endif -static unsigned int -kconf_id_hash (register const char *str, register unsigned int len) -{ - static const unsigned char asso_values[] = - { - 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, - 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, - 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, - 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, - 73, 73, 73, 73, 73, 0, 73, 73, 73, 73, - 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, - 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, - 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, - 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, - 73, 73, 73, 73, 73, 73, 73, 10, 25, 25, - 0, 0, 0, 5, 0, 0, 73, 73, 5, 0, - 10, 5, 45, 73, 20, 20, 0, 15, 15, 73, - 20, 0, 73, 73, 73, 73, 73, 73, 73, 73, - 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, - 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, - 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, - 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, - 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, - 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, - 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, - 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, - 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, - 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, - 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, - 73, 73, 73, 73, 73, 73, 73, 73, 73, 73, - 73, 73, 73, 73, 73, 73 - }; - register int hval = len; - - switch (hval) - { - default: - hval += asso_values[(unsigned char)str[2]]; - /*FALLTHROUGH*/ - case 2: - case 1: - hval += asso_values[(unsigned char)str[0]]; - break; - } - return hval + asso_values[(unsigned char)str[len - 1]]; -} - -struct kconf_id_strings_t - { - char kconf_id_strings_str2[sizeof("if")]; - char kconf_id_strings_str3[sizeof("int")]; - char kconf_id_strings_str5[sizeof("endif")]; - char kconf_id_strings_str7[sizeof("default")]; - char kconf_id_strings_str8[sizeof("tristate")]; - char kconf_id_strings_str9[sizeof("endchoice")]; - char kconf_id_strings_str10[sizeof("---help---")]; - char kconf_id_strings_str12[sizeof("def_tristate")]; - char kconf_id_strings_str13[sizeof("def_bool")]; - char kconf_id_strings_str14[sizeof("defconfig_list")]; - char kconf_id_strings_str17[sizeof("on")]; - char kconf_id_strings_str18[sizeof("optional")]; - char kconf_id_strings_str21[sizeof("option")]; - char kconf_id_strings_str22[sizeof("endmenu")]; - char kconf_id_strings_str23[sizeof("mainmenu")]; - char kconf_id_strings_str25[sizeof("menuconfig")]; - char kconf_id_strings_str27[sizeof("modules")]; - char kconf_id_strings_str28[sizeof("allnoconfig_y")]; - char kconf_id_strings_str29[sizeof("menu")]; - char kconf_id_strings_str31[sizeof("select")]; - char kconf_id_strings_str32[sizeof("comment")]; - char kconf_id_strings_str33[sizeof("env")]; - char kconf_id_strings_str35[sizeof("range")]; - char kconf_id_strings_str36[sizeof("choice")]; - char kconf_id_strings_str39[sizeof("bool")]; - char kconf_id_strings_str41[sizeof("source")]; - char kconf_id_strings_str42[sizeof("visible")]; - char kconf_id_strings_str43[sizeof("hex")]; - char kconf_id_strings_str46[sizeof("config")]; - char kconf_id_strings_str47[sizeof("boolean")]; - char kconf_id_strings_str50[sizeof("imply")]; - char kconf_id_strings_str51[sizeof("string")]; - char kconf_id_strings_str54[sizeof("help")]; - char kconf_id_strings_str56[sizeof("prompt")]; - char kconf_id_strings_str72[sizeof("depends")]; - }; -static const struct kconf_id_strings_t kconf_id_strings_contents = - { - "if", - "int", - "endif", - "default", - "tristate", - "endchoice", - "---help---", - "def_tristate", - "def_bool", - "defconfig_list", - "on", - "optional", - "option", - "endmenu", - "mainmenu", - "menuconfig", - "modules", - "allnoconfig_y", - "menu", - "select", - "comment", - "env", - "range", - "choice", - "bool", - "source", - "visible", - "hex", - "config", - "boolean", - "imply", - "string", - "help", - "prompt", - "depends" - }; -#define kconf_id_strings ((const char *) &kconf_id_strings_contents) -#ifdef __GNUC__ -__inline -#if defined __GNUC_STDC_INLINE__ || defined __GNUC_GNU_INLINE__ -__attribute__ ((__gnu_inline__)) -#endif -#endif -const struct kconf_id * -kconf_id_lookup (register const char *str, register unsigned int len) -{ - enum - { - TOTAL_KEYWORDS = 35, - MIN_WORD_LENGTH = 2, - MAX_WORD_LENGTH = 14, - MIN_HASH_VALUE = 2, - MAX_HASH_VALUE = 72 - }; - - static const struct kconf_id wordlist[] = - { - {-1}, {-1}, -#line 26 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str2, T_IF, TF_COMMAND|TF_PARAM}, -#line 37 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str3, T_TYPE, TF_COMMAND, S_INT}, - {-1}, -#line 27 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str5, T_ENDIF, TF_COMMAND}, - {-1}, -#line 30 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str7, T_DEFAULT, TF_COMMAND, S_UNKNOWN}, -#line 32 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str8, T_TYPE, TF_COMMAND, S_TRISTATE}, -#line 20 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str9, T_ENDCHOICE, TF_COMMAND}, -#line 25 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str10, T_HELP, TF_COMMAND}, - {-1}, -#line 33 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str12, T_DEFAULT, TF_COMMAND, S_TRISTATE}, -#line 36 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str13, T_DEFAULT, TF_COMMAND, S_BOOLEAN}, -#line 47 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str14, T_OPT_DEFCONFIG_LIST,TF_OPTION}, - {-1}, {-1}, -#line 45 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str17, T_ON, TF_PARAM}, -#line 29 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str18, T_OPTIONAL, TF_COMMAND}, - {-1}, {-1}, -#line 44 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str21, T_OPTION, TF_COMMAND}, -#line 17 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str22, T_ENDMENU, TF_COMMAND}, -#line 15 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str23, T_MAINMENU, TF_COMMAND}, - {-1}, -#line 23 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str25, T_MENUCONFIG, TF_COMMAND}, - {-1}, -#line 46 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str27, T_OPT_MODULES, TF_OPTION}, -#line 49 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str28, T_OPT_ALLNOCONFIG_Y,TF_OPTION}, -#line 16 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str29, T_MENU, TF_COMMAND}, - {-1}, -#line 40 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str31, T_SELECT, TF_COMMAND}, -#line 21 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str32, T_COMMENT, TF_COMMAND}, -#line 48 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str33, T_OPT_ENV, TF_OPTION}, - {-1}, -#line 42 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str35, T_RANGE, TF_COMMAND}, -#line 19 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str36, T_CHOICE, TF_COMMAND}, - {-1}, {-1}, -#line 34 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str39, T_TYPE, TF_COMMAND, S_BOOLEAN}, - {-1}, -#line 18 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str41, T_SOURCE, TF_COMMAND}, -#line 43 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str42, T_VISIBLE, TF_COMMAND}, -#line 38 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str43, T_TYPE, TF_COMMAND, S_HEX}, - {-1}, {-1}, -#line 22 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str46, T_CONFIG, TF_COMMAND}, -#line 35 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str47, T_TYPE, TF_COMMAND, S_BOOLEAN}, - {-1}, {-1}, -#line 41 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str50, T_IMPLY, TF_COMMAND}, -#line 39 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str51, T_TYPE, TF_COMMAND, S_STRING}, - {-1}, {-1}, -#line 24 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str54, T_HELP, TF_COMMAND}, - {-1}, -#line 31 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str56, T_PROMPT, TF_COMMAND}, - {-1}, {-1}, {-1}, {-1}, {-1}, {-1}, {-1}, {-1}, {-1}, - {-1}, {-1}, {-1}, {-1}, {-1}, {-1}, -#line 28 "scripts/kconfig/zconf.gperf" - {(int)(long)&((struct kconf_id_strings_t *)0)->kconf_id_strings_str72, T_DEPENDS, TF_COMMAND} - }; - - if (len <= MAX_WORD_LENGTH && len >= MIN_WORD_LENGTH) - { - register int key = kconf_id_hash (str, len); - - if (key <= MAX_HASH_VALUE && key >= 0) - { - register int o = wordlist[key].name; - if (o >= 0) - { - register const char *s = o + kconf_id_strings; - - if (*str == *s && !strncmp (str + 1, s + 1, len - 1) && s[len] == '\0') - return &wordlist[key]; - } - } - } - return 0; -} -#line 50 "scripts/kconfig/zconf.gperf" - diff --git a/scripts/kconfig/zconf.l b/scripts/kconfig/zconf.l index c410d257da0..045093d827e 100644 --- a/scripts/kconfig/zconf.l +++ b/scripts/kconfig/zconf.l @@ -1,5 +1,5 @@ %option nostdinit noyywrap never-interactive full ecs -%option 8bit nodefault perf-report perf-report +%option 8bit nodefault yylineno %option noinput %x COMMAND HELP STRING PARAM %{ @@ -52,7 +52,7 @@ static void append_string(const char *str, int size) if (new_size > text_asize) { new_size += START_STRSIZE - 1; new_size &= -START_STRSIZE; - text = realloc(text, new_size); + text = xrealloc(text, new_size); text_asize = new_size; } memcpy(text + text_size, str, size); @@ -83,7 +83,6 @@ n [A-Za-z0-9_-] [ \t]*#.*\n | [ \t]*\n { - current_file->lineno++; return T_EOL; } [ \t]*#.* @@ -104,19 +103,18 @@ n [A-Za-z0-9_-] const struct kconf_id *id = kconf_id_lookup(yytext, yyleng); BEGIN(PARAM); current_pos.file = current_file; - current_pos.lineno = current_file->lineno; + current_pos.lineno = yylineno; if (id && id->flags & TF_COMMAND) { - zconflval.id = id; + yylval.id = id; return id->token; } alloc_string(yytext, yyleng); - zconflval.string = text; + yylval.string = text; return T_WORD; } . warn_ignored_character(*yytext); \n { BEGIN(INITIAL); - current_file->lineno++; return T_EOL; } } @@ -138,19 +136,19 @@ n [A-Za-z0-9_-] new_string(); BEGIN(STRING); } - \n BEGIN(INITIAL); current_file->lineno++; return T_EOL; + \n BEGIN(INITIAL); return T_EOL; ({n}|[/.])+ { const struct kconf_id *id = kconf_id_lookup(yytext, yyleng); if (id && id->flags & TF_PARAM) { - zconflval.id = id; + yylval.id = id; return id->token; } alloc_string(yytext, yyleng); - zconflval.string = text; + yylval.string = text; return T_WORD; } #.* /* comment */ - \\\n current_file->lineno++; + \\\n ; [[:blank:]]+ . warn_ignored_character(*yytext); <<EOF>> { @@ -161,7 +159,7 @@ n [A-Za-z0-9_-] <STRING>{ [^'"\\\n]+/\n { append_string(yytext, yyleng); - zconflval.string = text; + yylval.string = text; return T_WORD_QUOTE; } [^'"\\\n]+ { @@ -169,7 +167,7 @@ n [A-Za-z0-9_-] } \\.?/\n { append_string(yytext + 1, yyleng - 1); - zconflval.string = text; + yylval.string = text; return T_WORD_QUOTE; } \\.? { @@ -178,14 +176,15 @@ n [A-Za-z0-9_-] \'|\" { if (str == yytext[0]) { BEGIN(PARAM); - zconflval.string = text; + yylval.string = text; return T_WORD_QUOTE; } else append_string(yytext, 1); } \n { - printf("%s:%d:warning: multi-line strings not supported\n", zconf_curname(), zconf_lineno()); - current_file->lineno++; + fprintf(stderr, + "%s:%d:warning: multi-line strings not supported\n", + zconf_curname(), zconf_lineno()); BEGIN(INITIAL); return T_EOL; } @@ -218,12 +217,10 @@ n [A-Za-z0-9_-] } } [ \t]*\n/[^ \t\n] { - current_file->lineno++; zconf_endhelp(); return T_HELPTEXT; } [ \t]*\n { - current_file->lineno++; append_string("\n", 1); } [^ \t\n].* { @@ -261,7 +258,7 @@ void zconf_starthelp(void) static void zconf_endhelp(void) { - zconflval.string = text; + yylval.string = text; BEGIN(INITIAL); } @@ -294,7 +291,7 @@ void zconf_initscan(const char *name) { yyin = zconf_fopen(name); if (!yyin) { - printf("can't find file %s\n", name); + fprintf(stderr, "can't find file %s\n", name); exit(1); } @@ -302,7 +299,7 @@ void zconf_initscan(const char *name) memset(current_buf, 0, sizeof(*current_buf)); current_file = file_lookup(name); - current_file->lineno = 1; + yylineno = 1; } void zconf_nextfile(const char *name) @@ -315,35 +312,34 @@ void zconf_nextfile(const char *name) current_buf->state = YY_CURRENT_BUFFER; yyin = zconf_fopen(file->name); if (!yyin) { - printf("%s:%d: can't open file \"%s\"\n", - zconf_curname(), zconf_lineno(), file->name); + fprintf(stderr, "%s:%d: can't open file \"%s\"\n", + zconf_curname(), zconf_lineno(), file->name); exit(1); } yy_switch_to_buffer(yy_create_buffer(yyin, YY_BUF_SIZE)); buf->parent = current_buf; current_buf = buf; - for (iter = current_file->parent; iter; iter = iter->parent ) { - if (!strcmp(current_file->name,iter->name) ) { - printf("%s:%d: recursive inclusion detected. " - "Inclusion path:\n current file : '%s'\n", - zconf_curname(), zconf_lineno(), - zconf_curname()); - iter = current_file->parent; - while (iter && \ - strcmp(iter->name,current_file->name)) { - printf(" included from: '%s:%d'\n", - iter->name, iter->lineno-1); + current_file->lineno = yylineno; + file->parent = current_file; + + for (iter = current_file; iter; iter = iter->parent) { + if (!strcmp(iter->name, file->name)) { + fprintf(stderr, + "Recursive inclusion detected.\n" + "Inclusion path:\n" + " current file : %s\n", file->name); + iter = file; + do { iter = iter->parent; - } - if (iter) - printf(" included from: '%s:%d'\n", - iter->name, iter->lineno+1); + fprintf(stderr, " included from: %s:%d\n", + iter->name, iter->lineno - 1); + } while (strcmp(iter->name, file->name)); exit(1); } } - file->lineno = 1; - file->parent = current_file; + + yylineno = 1; current_file = file; } @@ -352,6 +348,8 @@ static void zconf_endfile(void) struct buffer *parent; current_file = current_file->parent; + if (current_file) + yylineno = current_file->lineno; parent = current_buf->parent; if (parent) { diff --git a/scripts/kconfig/zconf.lex.c_shipped b/scripts/kconfig/zconf.lex.c_shipped deleted file mode 100644 index 37fdf612350..00000000000 --- a/scripts/kconfig/zconf.lex.c_shipped +++ /dev/null @@ -1,2473 +0,0 @@ - -#line 3 "scripts/kconfig/zconf.lex.c_shipped" - -#define YY_INT_ALIGNED short int - -/* A lexical scanner generated by flex */ - -#define yy_create_buffer zconf_create_buffer -#define yy_delete_buffer zconf_delete_buffer -#define yy_flex_debug zconf_flex_debug -#define yy_init_buffer zconf_init_buffer -#define yy_flush_buffer zconf_flush_buffer -#define yy_load_buffer_state zconf_load_buffer_state -#define yy_switch_to_buffer zconf_switch_to_buffer -#define yyin zconfin -#define yyleng zconfleng -#define yylex zconflex -#define yylineno zconflineno -#define yyout zconfout -#define yyrestart zconfrestart -#define yytext zconftext -#define yywrap zconfwrap -#define yyalloc zconfalloc -#define yyrealloc zconfrealloc -#define yyfree zconffree - -#define FLEX_SCANNER -#define YY_FLEX_MAJOR_VERSION 2 -#define YY_FLEX_MINOR_VERSION 5 -#define YY_FLEX_SUBMINOR_VERSION 35 -#if YY_FLEX_SUBMINOR_VERSION > 0 -#define FLEX_BETA -#endif - -/* First, we deal with platform-specific or compiler-specific issues. */ - -/* begin standard C headers. */ -#include <stdio.h> -#include <string.h> -#include <errno.h> -#include <stdlib.h> - -/* end standard C headers. */ - -/* flex integer type definitions */ - -#ifndef FLEXINT_H -#define FLEXINT_H - -/* C99 systems have <inttypes.h>. Non-C99 systems may or may not. */ - -#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L - -/* C99 says to define __STDC_LIMIT_MACROS before including stdint.h, - * if you want the limit (max/min) macros for int types. - */ -#ifndef __STDC_LIMIT_MACROS -#define __STDC_LIMIT_MACROS 1 -#endif - -#include <inttypes.h> -typedef int8_t flex_int8_t; -typedef uint8_t flex_uint8_t; -typedef int16_t flex_int16_t; -typedef uint16_t flex_uint16_t; -typedef int32_t flex_int32_t; -typedef uint32_t flex_uint32_t; -#else -typedef signed char flex_int8_t; -typedef short int flex_int16_t; -typedef int flex_int32_t; -typedef unsigned char flex_uint8_t; -typedef unsigned short int flex_uint16_t; -typedef unsigned int flex_uint32_t; - -/* Limits of integral types. */ -#ifndef INT8_MIN -#define INT8_MIN (-128) -#endif -#ifndef INT16_MIN -#define INT16_MIN (-32767-1) -#endif -#ifndef INT32_MIN -#define INT32_MIN (-2147483647-1) -#endif -#ifndef INT8_MAX -#define INT8_MAX (127) -#endif -#ifndef INT16_MAX -#define INT16_MAX (32767) -#endif -#ifndef INT32_MAX -#define INT32_MAX (2147483647) -#endif -#ifndef UINT8_MAX -#define UINT8_MAX (255U) -#endif -#ifndef UINT16_MAX -#define UINT16_MAX (65535U) -#endif -#ifndef UINT32_MAX -#define UINT32_MAX (4294967295U) -#endif - -#endif /* ! C99 */ - -#endif /* ! FLEXINT_H */ - -#ifdef __cplusplus - -/* The "const" storage-class-modifier is valid. */ -#define YY_USE_CONST - -#else /* ! __cplusplus */ - -/* C99 requires __STDC__ to be defined as 1. */ -#if defined (__STDC__) - -#define YY_USE_CONST - -#endif /* defined (__STDC__) */ -#endif /* ! __cplusplus */ - -#ifdef YY_USE_CONST -#define yyconst const -#else -#define yyconst -#endif - -/* Returned upon end-of-file. */ -#define YY_NULL 0 - -/* Promotes a possibly negative, possibly signed char to an unsigned - * integer for use as an array index. If the signed char is negative, - * we want to instead treat it as an 8-bit unsigned char, hence the - * double cast. - */ -#define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c) - -/* Enter a start condition. This macro really ought to take a parameter, - * but we do it the disgusting crufty way forced on us by the ()-less - * definition of BEGIN. - */ -#define BEGIN (yy_start) = 1 + 2 * - -/* Translate the current start state into a value that can be later handed - * to BEGIN to return to the state. The YYSTATE alias is for lex - * compatibility. - */ -#define YY_START (((yy_start) - 1) / 2) -#define YYSTATE YY_START - -/* Action number for EOF rule of a given start state. */ -#define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1) - -/* Special action meaning "start processing a new file". */ -#define YY_NEW_FILE zconfrestart(zconfin ) - -#define YY_END_OF_BUFFER_CHAR 0 - -/* Size of default input buffer. */ -#ifndef YY_BUF_SIZE -#ifdef __ia64__ -/* On IA-64, the buffer size is 16k, not 8k. - * Moreover, YY_BUF_SIZE is 2*YY_READ_BUF_SIZE in the general case. - * Ditto for the __ia64__ case accordingly. - */ -#define YY_BUF_SIZE 32768 -#else -#define YY_BUF_SIZE 16384 -#endif /* __ia64__ */ -#endif - -/* The state buf must be large enough to hold one state per character in the main buffer. - */ -#define YY_STATE_BUF_SIZE ((YY_BUF_SIZE + 2) * sizeof(yy_state_type)) - -#ifndef YY_TYPEDEF_YY_BUFFER_STATE -#define YY_TYPEDEF_YY_BUFFER_STATE -typedef struct yy_buffer_state *YY_BUFFER_STATE; -#endif - -extern int zconfleng; - -extern FILE *zconfin, *zconfout; - -#define EOB_ACT_CONTINUE_SCAN 0 -#define EOB_ACT_END_OF_FILE 1 -#define EOB_ACT_LAST_MATCH 2 - - #define YY_LESS_LINENO(n) - -/* Return all but the first "n" matched characters back to the input stream. */ -#define yyless(n) \ - do \ - { \ - /* Undo effects of setting up zconftext. */ \ - int yyless_macro_arg = (n); \ - YY_LESS_LINENO(yyless_macro_arg);\ - *yy_cp = (yy_hold_char); \ - YY_RESTORE_YY_MORE_OFFSET \ - (yy_c_buf_p) = yy_cp = yy_bp + yyless_macro_arg - YY_MORE_ADJ; \ - YY_DO_BEFORE_ACTION; /* set up zconftext again */ \ - } \ - while ( 0 ) - -#define unput(c) yyunput( c, (yytext_ptr) ) - -#ifndef YY_TYPEDEF_YY_SIZE_T -#define YY_TYPEDEF_YY_SIZE_T -typedef size_t yy_size_t; -#endif - -#ifndef YY_STRUCT_YY_BUFFER_STATE -#define YY_STRUCT_YY_BUFFER_STATE -struct yy_buffer_state - { - FILE *yy_input_file; - - char *yy_ch_buf; /* input buffer */ - char *yy_buf_pos; /* current position in input buffer */ - - /* Size of input buffer in bytes, not including room for EOB - * characters. - */ - yy_size_t yy_buf_size; - - /* Number of characters read into yy_ch_buf, not including EOB - * characters. - */ - int yy_n_chars; - - /* Whether we "own" the buffer - i.e., we know we created it, - * and can realloc() it to grow it, and should free() it to - * delete it. - */ - int yy_is_our_buffer; - - /* Whether this is an "interactive" input source; if so, and - * if we're using stdio for input, then we want to use getc() - * instead of fread(), to make sure we stop fetching input after - * each newline. - */ - int yy_is_interactive; - - /* Whether we're considered to be at the beginning of a line. - * If so, '^' rules will be active on the next match, otherwise - * not. - */ - int yy_at_bol; - - int yy_bs_lineno; /**< The line count. */ - int yy_bs_column; /**< The column count. */ - - /* Whether to try to fill the input buffer when we reach the - * end of it. - */ - int yy_fill_buffer; - - int yy_buffer_status; - -#define YY_BUFFER_NEW 0 -#define YY_BUFFER_NORMAL 1 - /* When an EOF's been seen but there's still some text to process - * then we mark the buffer as YY_EOF_PENDING, to indicate that we - * shouldn't try reading from the input source any more. We might - * still have a bunch of tokens to match, though, because of - * possible backing-up. - * - * When we actually see the EOF, we change the status to "new" - * (via zconfrestart()), so that the user can continue scanning by - * just pointing zconfin at a new input file. - */ -#define YY_BUFFER_EOF_PENDING 2 - - }; -#endif /* !YY_STRUCT_YY_BUFFER_STATE */ - -/* Stack of input buffers. */ -static size_t yy_buffer_stack_top = 0; /**< index of top of stack. */ -static size_t yy_buffer_stack_max = 0; /**< capacity of stack. */ -static YY_BUFFER_STATE * yy_buffer_stack = 0; /**< Stack as an array. */ - -/* We provide macros for accessing buffer states in case in the - * future we want to put the buffer states in a more general - * "scanner state". - * - * Returns the top of the stack, or NULL. - */ -#define YY_CURRENT_BUFFER ( (yy_buffer_stack) \ - ? (yy_buffer_stack)[(yy_buffer_stack_top)] \ - : NULL) - -/* Same as previous macro, but useful when we know that the buffer stack is not - * NULL or when we need an lvalue. For internal use only. - */ -#define YY_CURRENT_BUFFER_LVALUE (yy_buffer_stack)[(yy_buffer_stack_top)] - -/* yy_hold_char holds the character lost when zconftext is formed. */ -static char yy_hold_char; -static int yy_n_chars; /* number of characters read into yy_ch_buf */ -int zconfleng; - -/* Points to current character in buffer. */ -static char *yy_c_buf_p = (char *) 0; -static int yy_init = 0; /* whether we need to initialize */ -static int yy_start = 0; /* start state number */ - -/* Flag which is used to allow zconfwrap()'s to do buffer switches - * instead of setting up a fresh zconfin. A bit of a hack ... - */ -static int yy_did_buffer_switch_on_eof; - -void zconfrestart (FILE *input_file ); -void zconf_switch_to_buffer (YY_BUFFER_STATE new_buffer ); -YY_BUFFER_STATE zconf_create_buffer (FILE *file,int size ); -void zconf_delete_buffer (YY_BUFFER_STATE b ); -void zconf_flush_buffer (YY_BUFFER_STATE b ); -void zconfpush_buffer_state (YY_BUFFER_STATE new_buffer ); -void zconfpop_buffer_state (void ); - -static void zconfensure_buffer_stack (void ); -static void zconf_load_buffer_state (void ); -static void zconf_init_buffer (YY_BUFFER_STATE b,FILE *file ); - -#define YY_FLUSH_BUFFER zconf_flush_buffer(YY_CURRENT_BUFFER ) - -YY_BUFFER_STATE zconf_scan_buffer (char *base,yy_size_t size ); -YY_BUFFER_STATE zconf_scan_string (yyconst char *yy_str ); -YY_BUFFER_STATE zconf_scan_bytes (yyconst char *bytes,int len ); - -void *zconfalloc (yy_size_t ); -void *zconfrealloc (void *,yy_size_t ); -void zconffree (void * ); - -#define yy_new_buffer zconf_create_buffer - -#define yy_set_interactive(is_interactive) \ - { \ - if ( ! YY_CURRENT_BUFFER ){ \ - zconfensure_buffer_stack (); \ - YY_CURRENT_BUFFER_LVALUE = \ - zconf_create_buffer(zconfin,YY_BUF_SIZE ); \ - } \ - YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \ - } - -#define yy_set_bol(at_bol) \ - { \ - if ( ! YY_CURRENT_BUFFER ){\ - zconfensure_buffer_stack (); \ - YY_CURRENT_BUFFER_LVALUE = \ - zconf_create_buffer(zconfin,YY_BUF_SIZE ); \ - } \ - YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \ - } - -#define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol) - -/* Begin user sect3 */ - -#define zconfwrap(n) 1 -#define YY_SKIP_YYWRAP - -typedef unsigned char YY_CHAR; - -FILE *zconfin = (FILE *) 0, *zconfout = (FILE *) 0; - -typedef int yy_state_type; - -extern int zconflineno; - -int zconflineno = 1; - -extern char *zconftext; -#define yytext_ptr zconftext -static yyconst flex_int16_t yy_nxt[][18] = - { - { - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 - }, - - { - 11, 12, 13, 14, 12, 12, 15, 12, 12, 12, - 12, 12, 12, 12, 12, 12, 12, 12 - }, - - { - 11, 12, 13, 14, 12, 12, 15, 12, 12, 12, - 12, 12, 12, 12, 12, 12, 12, 12 - }, - - { - 11, 16, 16, 17, 16, 16, 16, 16, 16, 16, - 16, 18, 16, 16, 16, 16, 16, 16 - }, - - { - 11, 16, 16, 17, 16, 16, 16, 16, 16, 16, - 16, 18, 16, 16, 16, 16, 16, 16 - - }, - - { - 11, 19, 20, 21, 19, 19, 19, 19, 19, 19, - 19, 19, 19, 19, 19, 19, 19, 19 - }, - - { - 11, 19, 20, 21, 19, 19, 19, 19, 19, 19, - 19, 19, 19, 19, 19, 19, 19, 19 - }, - - { - 11, 22, 22, 23, 22, 24, 22, 22, 24, 22, - 22, 22, 22, 22, 22, 22, 25, 22 - }, - - { - 11, 22, 22, 23, 22, 24, 22, 22, 24, 22, - 22, 22, 22, 22, 22, 22, 25, 22 - }, - - { - 11, 26, 27, 28, 29, 30, 31, 32, 30, 33, - 34, 35, 35, 36, 37, 38, 39, 40 - - }, - - { - 11, 26, 27, 28, 29, 30, 31, 32, 30, 33, - 34, 35, 35, 36, 37, 38, 39, 40 - }, - - { - -11, -11, -11, -11, -11, -11, -11, -11, -11, -11, - -11, -11, -11, -11, -11, -11, -11, -11 - }, - - { - 11, -12, -12, -12, -12, -12, -12, -12, -12, -12, - -12, -12, -12, -12, -12, -12, -12, -12 - }, - - { - 11, -13, 41, 42, -13, -13, 43, -13, -13, -13, - -13, -13, -13, -13, -13, -13, -13, -13 - }, - - { - 11, -14, -14, -14, -14, -14, -14, -14, -14, -14, - -14, -14, -14, -14, -14, -14, -14, -14 - - }, - - { - 11, 44, 44, 45, 44, 44, 44, 44, 44, 44, - 44, 44, 44, 44, 44, 44, 44, 44 - }, - - { - 11, -16, -16, -16, -16, -16, -16, -16, -16, -16, - -16, -16, -16, -16, -16, -16, -16, -16 - }, - - { - 11, -17, -17, -17, -17, -17, -17, -17, -17, -17, - -17, -17, -17, -17, -17, -17, -17, -17 - }, - - { - 11, -18, -18, -18, -18, -18, -18, -18, -18, -18, - -18, 46, -18, -18, -18, -18, -18, -18 - }, - - { - 11, 47, 47, -19, 47, 47, 47, 47, 47, 47, - 47, 47, 47, 47, 47, 47, 47, 47 - - }, - - { - 11, -20, 48, 49, -20, -20, -20, -20, -20, -20, - -20, -20, -20, -20, -20, -20, -20, -20 - }, - - { - 11, 50, -21, -21, 50, 50, 50, 50, 50, 50, - 50, 50, 50, 50, 50, 50, 50, 50 - }, - - { - 11, 51, 51, 52, 51, -22, 51, 51, -22, 51, - 51, 51, 51, 51, 51, 51, -22, 51 - }, - - { - 11, -23, -23, -23, -23, -23, -23, -23, -23, -23, - -23, -23, -23, -23, -23, -23, -23, -23 - }, - - { - 11, -24, -24, -24, -24, -24, -24, -24, -24, -24, - -24, -24, -24, -24, -24, -24, -24, -24 - - }, - - { - 11, 53, 53, 54, 53, 53, 53, 53, 53, 53, - 53, 53, 53, 53, 53, 53, 53, 53 - }, - - { - 11, -26, -26, -26, -26, -26, -26, -26, -26, -26, - -26, -26, -26, -26, -26, -26, -26, -26 - }, - - { - 11, -27, 55, -27, -27, -27, -27, -27, -27, -27, - -27, -27, -27, -27, -27, -27, -27, -27 - }, - - { - 11, -28, -28, -28, -28, -28, -28, -28, -28, -28, - -28, -28, -28, -28, -28, -28, -28, -28 - }, - - { - 11, -29, -29, -29, -29, -29, -29, -29, -29, -29, - -29, -29, -29, -29, 56, -29, -29, -29 - - }, - - { - 11, -30, -30, -30, -30, -30, -30, -30, -30, -30, - -30, -30, -30, -30, -30, -30, -30, -30 - }, - - { - 11, 57, 57, -31, 57, 57, 57, 57, 57, 57, - 57, 57, 57, 57, 57, 57, 57, 57 - }, - - { - 11, -32, -32, -32, -32, -32, -32, 58, -32, -32, - -32, -32, -32, -32, -32, -32, -32, -32 - }, - - { - 11, -33, -33, -33, -33, -33, -33, -33, -33, -33, - -33, -33, -33, -33, -33, -33, -33, -33 - }, - - { - 11, -34, -34, -34, -34, -34, -34, -34, -34, -34, - -34, -34, -34, -34, -34, -34, -34, -34 - - }, - - { - 11, -35, -35, -35, -35, -35, -35, -35, -35, -35, - -35, 59, 59, -35, -35, -35, -35, -35 - }, - - { - 11, -36, -36, -36, -36, -36, -36, -36, -36, -36, - -36, -36, -36, -36, 60, -36, -36, -36 - }, - - { - 11, -37, -37, -37, -37, -37, -37, -37, -37, -37, - -37, -37, -37, -37, -37, -37, -37, -37 - }, - - { - 11, -38, -38, -38, -38, -38, -38, -38, -38, -38, - -38, -38, -38, -38, 61, -38, -38, -38 - }, - - { - 11, -39, -39, 62, -39, -39, -39, -39, -39, -39, - -39, -39, -39, -39, -39, -39, -39, -39 - - }, - - { - 11, -40, -40, -40, -40, -40, -40, -40, -40, -40, - -40, -40, -40, -40, -40, -40, -40, 63 - }, - - { - 11, -41, 41, 42, -41, -41, 43, -41, -41, -41, - -41, -41, -41, -41, -41, -41, -41, -41 - }, - - { - 11, -42, -42, -42, -42, -42, -42, -42, -42, -42, - -42, -42, -42, -42, -42, -42, -42, -42 - }, - - { - 11, 44, 44, 45, 44, 44, 44, 44, 44, 44, - 44, 44, 44, 44, 44, 44, 44, 44 - }, - - { - 11, 44, 44, 45, 44, 44, 44, 44, 44, 44, - 44, 44, 44, 44, 44, 44, 44, 44 - - }, - - { - 11, -45, -45, -45, -45, -45, -45, -45, -45, -45, - -45, -45, -45, -45, -45, -45, -45, -45 - }, - - { - 11, -46, -46, -46, -46, -46, -46, -46, -46, -46, - -46, 46, -46, -46, -46, -46, -46, -46 - }, - - { - 11, 47, 47, -47, 47, 47, 47, 47, 47, 47, - 47, 47, 47, 47, 47, 47, 47, 47 - }, - - { - 11, -48, 48, 49, -48, -48, -48, -48, -48, -48, - -48, -48, -48, -48, -48, -48, -48, -48 - }, - - { - 11, 50, -49, -49, 50, 50, 50, 50, 50, 50, - 50, 50, 50, 50, 50, 50, 50, 50 - - }, - - { - 11, -50, -50, -50, -50, -50, -50, -50, -50, -50, - -50, -50, -50, -50, -50, -50, -50, -50 - }, - - { - 11, 51, 51, 52, 51, -51, 51, 51, -51, 51, - 51, 51, 51, 51, 51, 51, -51, 51 - }, - - { - 11, -52, -52, -52, -52, -52, -52, -52, -52, -52, - -52, -52, -52, -52, -52, -52, -52, -52 - }, - - { - 11, -53, -53, 54, -53, -53, -53, -53, -53, -53, - -53, -53, -53, -53, -53, -53, -53, -53 - }, - - { - 11, -54, -54, -54, -54, -54, -54, -54, -54, -54, - -54, -54, -54, -54, -54, -54, -54, -54 - - }, - - { - 11, -55, 55, -55, -55, -55, -55, -55, -55, -55, - -55, -55, -55, -55, -55, -55, -55, -55 - }, - - { - 11, -56, -56, -56, -56, -56, -56, -56, -56, -56, - -56, -56, -56, -56, -56, -56, -56, -56 - }, - - { - 11, 57, 57, -57, 57, 57, 57, 57, 57, 57, - 57, 57, 57, 57, 57, 57, 57, 57 - }, - - { - 11, -58, -58, -58, -58, -58, -58, -58, -58, -58, - -58, -58, -58, -58, -58, -58, -58, -58 - }, - - { - 11, -59, -59, -59, -59, -59, -59, -59, -59, -59, - -59, 59, 59, -59, -59, -59, -59, -59 - - }, - - { - 11, -60, -60, -60, -60, -60, -60, -60, -60, -60, - -60, -60, -60, -60, -60, -60, -60, -60 - }, - - { - 11, -61, -61, -61, -61, -61, -61, -61, -61, -61, - -61, -61, -61, -61, -61, -61, -61, -61 - }, - - { - 11, -62, -62, -62, -62, -62, -62, -62, -62, -62, - -62, -62, -62, -62, -62, -62, -62, -62 - }, - - { - 11, -63, -63, -63, -63, -63, -63, -63, -63, -63, - -63, -63, -63, -63, -63, -63, -63, -63 - }, - - } ; - -static yy_state_type yy_get_previous_state (void ); -static yy_state_type yy_try_NUL_trans (yy_state_type current_state ); -static int yy_get_next_buffer (void ); -static void yy_fatal_error (yyconst char msg[] ); - -/* Done after the current pattern has been matched and before the - * corresponding action - sets up zconftext. - */ -#define YY_DO_BEFORE_ACTION \ - (yytext_ptr) = yy_bp; \ - zconfleng = (size_t) (yy_cp - yy_bp); \ - (yy_hold_char) = *yy_cp; \ - *yy_cp = '\0'; \ - (yy_c_buf_p) = yy_cp; - -#define YY_NUM_RULES 37 -#define YY_END_OF_BUFFER 38 -/* This struct is not used in this scanner, - but its presence is necessary. */ -struct yy_trans_info - { - flex_int32_t yy_verify; - flex_int32_t yy_nxt; - }; -static yyconst flex_int16_t yy_accept[64] = - { 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 38, 5, 4, 2, 3, 7, 8, 6, 36, 33, - 35, 28, 32, 31, 30, 26, 25, 21, 13, 20, - 23, 26, 11, 12, 22, 18, 14, 19, 26, 26, - 4, 2, 3, 3, 1, 6, 36, 33, 35, 34, - 28, 27, 30, 29, 25, 15, 23, 9, 22, 16, - 17, 24, 10 - } ; - -static yyconst flex_int32_t yy_ec[256] = - { 0, - 1, 1, 1, 1, 1, 1, 1, 1, 2, 3, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 2, 4, 5, 6, 1, 1, 7, 8, 9, - 10, 1, 1, 1, 11, 12, 12, 11, 11, 11, - 11, 11, 11, 11, 11, 11, 11, 1, 1, 13, - 14, 15, 1, 1, 11, 11, 11, 11, 11, 11, - 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, - 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, - 1, 16, 1, 1, 11, 1, 11, 11, 11, 11, - - 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, - 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, - 11, 11, 1, 17, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1 - } ; - -extern int zconf_flex_debug; -int zconf_flex_debug = 0; - -/* The intent behind this definition is that it'll catch - * any uses of REJECT which flex missed. - */ -#define REJECT reject_used_but_not_detected -#define yymore() yymore_used_but_not_detected -#define YY_MORE_ADJ 0 -#define YY_RESTORE_YY_MORE_OFFSET -char *zconftext; -#define YY_NO_INPUT 1 - -/* - * Copyright (C) 2002 Roman Zippel <zippel@linux-m68k.org> - * Released under the terms of the GNU GPL v2.0. - */ - -#include <limits.h> -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <unistd.h> - -#include "lkc.h" - -#define START_STRSIZE 16 - -static struct { - struct file *file; - int lineno; -} current_pos; - -static char *text; -static int text_size, text_asize; - -struct buffer { - struct buffer *parent; - YY_BUFFER_STATE state; -}; - -struct buffer *current_buf; - -static int last_ts, first_ts; - -static void zconf_endhelp(void); -static void zconf_endfile(void); - -static void new_string(void) -{ - text = xmalloc(START_STRSIZE); - text_asize = START_STRSIZE; - text_size = 0; - *text = 0; -} - -static void append_string(const char *str, int size) -{ - int new_size = text_size + size + 1; - if (new_size > text_asize) { - new_size += START_STRSIZE - 1; - new_size &= -START_STRSIZE; - text = realloc(text, new_size); - text_asize = new_size; - } - memcpy(text + text_size, str, size); - text_size += size; - text[text_size] = 0; -} - -static void alloc_string(const char *str, int size) -{ - text = xmalloc(size + 1); - memcpy(text, str, size); - text[size] = 0; -} - -static void warn_ignored_character(char chr) -{ - fprintf(stderr, - "%s:%d:warning: ignoring unsupported character '%c'\n", - zconf_curname(), zconf_lineno(), chr); -} - -#define INITIAL 0 -#define COMMAND 1 -#define HELP 2 -#define STRING 3 -#define PARAM 4 - -#ifndef YY_NO_UNISTD_H -/* Special case for "unistd.h", since it is non-ANSI. We include it way - * down here because we want the user's section 1 to have been scanned first. - * The user has a chance to override it with an option. - */ -#include <unistd.h> -#endif - -#ifndef YY_EXTRA_TYPE -#define YY_EXTRA_TYPE void * -#endif - -static int yy_init_globals (void ); - -/* Accessor methods to globals. - These are made visible to non-reentrant scanners for convenience. */ - -int zconflex_destroy (void ); - -int zconfget_debug (void ); - -void zconfset_debug (int debug_flag ); - -YY_EXTRA_TYPE zconfget_extra (void ); - -void zconfset_extra (YY_EXTRA_TYPE user_defined ); - -FILE *zconfget_in (void ); - -void zconfset_in (FILE * in_str ); - -FILE *zconfget_out (void ); - -void zconfset_out (FILE * out_str ); - -int zconfget_leng (void ); - -char *zconfget_text (void ); - -int zconfget_lineno (void ); - -void zconfset_lineno (int line_number ); - -/* Macros after this point can all be overridden by user definitions in - * section 1. - */ - -#ifndef YY_SKIP_YYWRAP -#ifdef __cplusplus -extern "C" int zconfwrap (void ); -#else -extern int zconfwrap (void ); -#endif -#endif - - static void yyunput (int c,char *buf_ptr ); - -#ifndef yytext_ptr -static void yy_flex_strncpy (char *,yyconst char *,int ); -#endif - -#ifdef YY_NEED_STRLEN -static int yy_flex_strlen (yyconst char * ); -#endif - -#ifndef YY_NO_INPUT - -#ifdef __cplusplus -static int yyinput (void ); -#else -static int input (void ); -#endif - -#endif - -/* Amount of stuff to slurp up with each read. */ -#ifndef YY_READ_BUF_SIZE -#ifdef __ia64__ -/* On IA-64, the buffer size is 16k, not 8k */ -#define YY_READ_BUF_SIZE 16384 -#else -#define YY_READ_BUF_SIZE 8192 -#endif /* __ia64__ */ -#endif - -/* Copy whatever the last rule matched to the standard output. */ -#ifndef ECHO -/* This used to be an fputs(), but since the string might contain NUL's, - * we now use fwrite(). - */ -#define ECHO do { if (fwrite( zconftext, zconfleng, 1, zconfout )) {} } while (0) -#endif - -/* Gets input and stuffs it into "buf". number of characters read, or YY_NULL, - * is returned in "result". - */ -#ifndef YY_INPUT -#define YY_INPUT(buf,result,max_size) \ - errno=0; \ - while ( (result = read( fileno(zconfin), (char *) buf, max_size )) < 0 ) \ - { \ - if( errno != EINTR) \ - { \ - YY_FATAL_ERROR( "input in flex scanner failed" ); \ - break; \ - } \ - errno=0; \ - clearerr(zconfin); \ - }\ -\ - -#endif - -/* No semi-colon after return; correct usage is to write "yyterminate();" - - * we don't want an extra ';' after the "return" because that will cause - * some compilers to complain about unreachable statements. - */ -#ifndef yyterminate -#define yyterminate() return YY_NULL -#endif - -/* Number of entries by which start-condition stack grows. */ -#ifndef YY_START_STACK_INCR -#define YY_START_STACK_INCR 25 -#endif - -/* Report a fatal error. */ -#ifndef YY_FATAL_ERROR -#define YY_FATAL_ERROR(msg) yy_fatal_error( msg ) -#endif - -/* end tables serialization structures and prototypes */ - -/* Default declaration of generated scanner - a define so the user can - * easily add parameters. - */ -#ifndef YY_DECL -#define YY_DECL_IS_OURS 1 - -extern int zconflex (void); - -#define YY_DECL int zconflex (void) -#endif /* !YY_DECL */ - -/* Code executed at the beginning of each rule, after zconftext and zconfleng - * have been set up. - */ -#ifndef YY_USER_ACTION -#define YY_USER_ACTION -#endif - -/* Code executed at the end of each rule. */ -#ifndef YY_BREAK -#define YY_BREAK break; -#endif - -#define YY_RULE_SETUP \ - YY_USER_ACTION - -/** The main scanner function which does all the work. - */ -YY_DECL -{ - register yy_state_type yy_current_state; - register char *yy_cp, *yy_bp; - register int yy_act; - - int str = 0; - int ts, i; - - if ( !(yy_init) ) - { - (yy_init) = 1; - -#ifdef YY_USER_INIT - YY_USER_INIT; -#endif - - if ( ! (yy_start) ) - (yy_start) = 1; /* first start state */ - - if ( ! zconfin ) - zconfin = stdin; - - if ( ! zconfout ) - zconfout = stdout; - - if ( ! YY_CURRENT_BUFFER ) { - zconfensure_buffer_stack (); - YY_CURRENT_BUFFER_LVALUE = - zconf_create_buffer(zconfin,YY_BUF_SIZE ); - } - - zconf_load_buffer_state( ); - } - - while ( 1 ) /* loops until end-of-file is reached */ - { - yy_cp = (yy_c_buf_p); - - /* Support of zconftext. */ - *yy_cp = (yy_hold_char); - - /* yy_bp points to the position in yy_ch_buf of the start of - * the current run. - */ - yy_bp = yy_cp; - - yy_current_state = (yy_start); -yy_match: - while ( (yy_current_state = yy_nxt[yy_current_state][ yy_ec[YY_SC_TO_UI(*yy_cp)] ]) > 0 ) - ++yy_cp; - - yy_current_state = -yy_current_state; - -yy_find_action: - yy_act = yy_accept[yy_current_state]; - - YY_DO_BEFORE_ACTION; - -do_action: /* This label is used only to access EOF actions. */ - - switch ( yy_act ) - { /* beginning of action switch */ -case 1: -/* rule 1 can match eol */ -case 2: -/* rule 2 can match eol */ -YY_RULE_SETUP -{ - current_file->lineno++; - return T_EOL; -} - YY_BREAK -case 3: -YY_RULE_SETUP - - YY_BREAK -case 4: -YY_RULE_SETUP -{ - BEGIN(COMMAND); -} - YY_BREAK -case 5: -YY_RULE_SETUP -{ - unput(zconftext[0]); - BEGIN(COMMAND); -} - YY_BREAK - -case 6: -YY_RULE_SETUP -{ - const struct kconf_id *id = kconf_id_lookup(zconftext, zconfleng); - BEGIN(PARAM); - current_pos.file = current_file; - current_pos.lineno = current_file->lineno; - if (id && id->flags & TF_COMMAND) { - zconflval.id = id; - return id->token; - } - alloc_string(zconftext, zconfleng); - zconflval.string = text; - return T_WORD; - } - YY_BREAK -case 7: -YY_RULE_SETUP -warn_ignored_character(*zconftext); - YY_BREAK -case 8: -/* rule 8 can match eol */ -YY_RULE_SETUP -{ - BEGIN(INITIAL); - current_file->lineno++; - return T_EOL; - } - YY_BREAK - -case 9: -YY_RULE_SETUP -return T_AND; - YY_BREAK -case 10: -YY_RULE_SETUP -return T_OR; - YY_BREAK -case 11: -YY_RULE_SETUP -return T_OPEN_PAREN; - YY_BREAK -case 12: -YY_RULE_SETUP -return T_CLOSE_PAREN; - YY_BREAK -case 13: -YY_RULE_SETUP -return T_NOT; - YY_BREAK -case 14: -YY_RULE_SETUP -return T_EQUAL; - YY_BREAK -case 15: -YY_RULE_SETUP -return T_UNEQUAL; - YY_BREAK -case 16: -YY_RULE_SETUP -return T_LESS_EQUAL; - YY_BREAK -case 17: -YY_RULE_SETUP -return T_GREATER_EQUAL; - YY_BREAK -case 18: -YY_RULE_SETUP -return T_LESS; - YY_BREAK -case 19: -YY_RULE_SETUP -return T_GREATER; - YY_BREAK -case 20: -YY_RULE_SETUP -{ - str = zconftext[0]; - new_string(); - BEGIN(STRING); - } - YY_BREAK -case 21: -/* rule 21 can match eol */ -YY_RULE_SETUP -BEGIN(INITIAL); current_file->lineno++; return T_EOL; - YY_BREAK -case 22: -YY_RULE_SETUP -{ - const struct kconf_id *id = kconf_id_lookup(zconftext, zconfleng); - if (id && id->flags & TF_PARAM) { - zconflval.id = id; - return id->token; - } - alloc_string(zconftext, zconfleng); - zconflval.string = text; - return T_WORD; - } - YY_BREAK -case 23: -YY_RULE_SETUP -/* comment */ - YY_BREAK -case 24: -/* rule 24 can match eol */ -YY_RULE_SETUP -current_file->lineno++; - YY_BREAK -case 25: -YY_RULE_SETUP - - YY_BREAK -case 26: -YY_RULE_SETUP -warn_ignored_character(*zconftext); - YY_BREAK -case YY_STATE_EOF(PARAM): -{ - BEGIN(INITIAL); - } - YY_BREAK - -case 27: -/* rule 27 can match eol */ -*yy_cp = (yy_hold_char); /* undo effects of setting up zconftext */ -(yy_c_buf_p) = yy_cp -= 1; -YY_DO_BEFORE_ACTION; /* set up zconftext again */ -YY_RULE_SETUP -{ - append_string(zconftext, zconfleng); - zconflval.string = text; - return T_WORD_QUOTE; - } - YY_BREAK -case 28: -YY_RULE_SETUP -{ - append_string(zconftext, zconfleng); - } - YY_BREAK -case 29: -/* rule 29 can match eol */ -*yy_cp = (yy_hold_char); /* undo effects of setting up zconftext */ -(yy_c_buf_p) = yy_cp -= 1; -YY_DO_BEFORE_ACTION; /* set up zconftext again */ -YY_RULE_SETUP -{ - append_string(zconftext + 1, zconfleng - 1); - zconflval.string = text; - return T_WORD_QUOTE; - } - YY_BREAK -case 30: -YY_RULE_SETUP -{ - append_string(zconftext + 1, zconfleng - 1); - } - YY_BREAK -case 31: -YY_RULE_SETUP -{ - if (str == zconftext[0]) { - BEGIN(PARAM); - zconflval.string = text; - return T_WORD_QUOTE; - } else - append_string(zconftext, 1); - } - YY_BREAK -case 32: -/* rule 32 can match eol */ -YY_RULE_SETUP -{ - printf("%s:%d:warning: multi-line strings not supported\n", zconf_curname(), zconf_lineno()); - current_file->lineno++; - BEGIN(INITIAL); - return T_EOL; - } - YY_BREAK -case YY_STATE_EOF(STRING): -{ - BEGIN(INITIAL); - } - YY_BREAK - -case 33: -YY_RULE_SETUP -{ - ts = 0; - for (i = 0; i < zconfleng; i++) { - if (zconftext[i] == '\t') - ts = (ts & ~7) + 8; - else - ts++; - } - last_ts = ts; - if (first_ts) { - if (ts < first_ts) { - zconf_endhelp(); - return T_HELPTEXT; - } - ts -= first_ts; - while (ts > 8) { - append_string(" ", 8); - ts -= 8; - } - append_string(" ", ts); - } - } - YY_BREAK -case 34: -/* rule 34 can match eol */ -*yy_cp = (yy_hold_char); /* undo effects of setting up zconftext */ -(yy_c_buf_p) = yy_cp -= 1; -YY_DO_BEFORE_ACTION; /* set up zconftext again */ -YY_RULE_SETUP -{ - current_file->lineno++; - zconf_endhelp(); - return T_HELPTEXT; - } - YY_BREAK -case 35: -/* rule 35 can match eol */ -YY_RULE_SETUP -{ - current_file->lineno++; - append_string("\n", 1); - } - YY_BREAK -case 36: -YY_RULE_SETUP -{ - while (zconfleng) { - if ((zconftext[zconfleng-1] != ' ') && (zconftext[zconfleng-1] != '\t')) - break; - zconfleng--; - } - append_string(zconftext, zconfleng); - if (!first_ts) - first_ts = last_ts; - } - YY_BREAK -case YY_STATE_EOF(HELP): -{ - zconf_endhelp(); - return T_HELPTEXT; - } - YY_BREAK - -case YY_STATE_EOF(INITIAL): -case YY_STATE_EOF(COMMAND): -{ - if (current_file) { - zconf_endfile(); - return T_EOL; - } - fclose(zconfin); - yyterminate(); -} - YY_BREAK -case 37: -YY_RULE_SETUP -YY_FATAL_ERROR( "flex scanner jammed" ); - YY_BREAK - - case YY_END_OF_BUFFER: - { - /* Amount of text matched not including the EOB char. */ - int yy_amount_of_matched_text = (int) (yy_cp - (yytext_ptr)) - 1; - - /* Undo the effects of YY_DO_BEFORE_ACTION. */ - *yy_cp = (yy_hold_char); - YY_RESTORE_YY_MORE_OFFSET - - if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_NEW ) - { - /* We're scanning a new file or input source. It's - * possible that this happened because the user - * just pointed zconfin at a new source and called - * zconflex(). If so, then we have to assure - * consistency between YY_CURRENT_BUFFER and our - * globals. Here is the right place to do so, because - * this is the first action (other than possibly a - * back-up) that will match for the new input source. - */ - (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; - YY_CURRENT_BUFFER_LVALUE->yy_input_file = zconfin; - YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = YY_BUFFER_NORMAL; - } - - /* Note that here we test for yy_c_buf_p "<=" to the position - * of the first EOB in the buffer, since yy_c_buf_p will - * already have been incremented past the NUL character - * (since all states make transitions on EOB to the - * end-of-buffer state). Contrast this with the test - * in input(). - */ - if ( (yy_c_buf_p) <= &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) - { /* This was really a NUL. */ - yy_state_type yy_next_state; - - (yy_c_buf_p) = (yytext_ptr) + yy_amount_of_matched_text; - - yy_current_state = yy_get_previous_state( ); - - /* Okay, we're now positioned to make the NUL - * transition. We couldn't have - * yy_get_previous_state() go ahead and do it - * for us because it doesn't know how to deal - * with the possibility of jamming (and we don't - * want to build jamming into it because then it - * will run more slowly). - */ - - yy_next_state = yy_try_NUL_trans( yy_current_state ); - - yy_bp = (yytext_ptr) + YY_MORE_ADJ; - - if ( yy_next_state ) - { - /* Consume the NUL. */ - yy_cp = ++(yy_c_buf_p); - yy_current_state = yy_next_state; - goto yy_match; - } - - else - { - yy_cp = (yy_c_buf_p); - goto yy_find_action; - } - } - - else switch ( yy_get_next_buffer( ) ) - { - case EOB_ACT_END_OF_FILE: - { - (yy_did_buffer_switch_on_eof) = 0; - - if ( zconfwrap( ) ) - { - /* Note: because we've taken care in - * yy_get_next_buffer() to have set up - * zconftext, we can now set up - * yy_c_buf_p so that if some total - * hoser (like flex itself) wants to - * call the scanner after we return the - * YY_NULL, it'll still work - another - * YY_NULL will get returned. - */ - (yy_c_buf_p) = (yytext_ptr) + YY_MORE_ADJ; - - yy_act = YY_STATE_EOF(YY_START); - goto do_action; - } - - else - { - if ( ! (yy_did_buffer_switch_on_eof) ) - YY_NEW_FILE; - } - break; - } - - case EOB_ACT_CONTINUE_SCAN: - (yy_c_buf_p) = - (yytext_ptr) + yy_amount_of_matched_text; - - yy_current_state = yy_get_previous_state( ); - - yy_cp = (yy_c_buf_p); - yy_bp = (yytext_ptr) + YY_MORE_ADJ; - goto yy_match; - - case EOB_ACT_LAST_MATCH: - (yy_c_buf_p) = - &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)]; - - yy_current_state = yy_get_previous_state( ); - - yy_cp = (yy_c_buf_p); - yy_bp = (yytext_ptr) + YY_MORE_ADJ; - goto yy_find_action; - } - break; - } - - default: - YY_FATAL_ERROR( - "fatal flex scanner internal error--no action found" ); - } /* end of action switch */ - } /* end of scanning one token */ -} /* end of zconflex */ - -/* yy_get_next_buffer - try to read in a new buffer - * - * Returns a code representing an action: - * EOB_ACT_LAST_MATCH - - * EOB_ACT_CONTINUE_SCAN - continue scanning from current position - * EOB_ACT_END_OF_FILE - end of file - */ -static int yy_get_next_buffer (void) -{ - register char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf; - register char *source = (yytext_ptr); - register int number_to_move, i; - int ret_val; - - if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] ) - YY_FATAL_ERROR( - "fatal flex scanner internal error--end of buffer missed" ); - - if ( YY_CURRENT_BUFFER_LVALUE->yy_fill_buffer == 0 ) - { /* Don't try to fill the buffer, so this is an EOF. */ - if ( (yy_c_buf_p) - (yytext_ptr) - YY_MORE_ADJ == 1 ) - { - /* We matched a single character, the EOB, so - * treat this as a final EOF. - */ - return EOB_ACT_END_OF_FILE; - } - - else - { - /* We matched some text prior to the EOB, first - * process it. - */ - return EOB_ACT_LAST_MATCH; - } - } - - /* Try to read more data. */ - - /* First move last chars to start of buffer. */ - number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr)) - 1; - - for ( i = 0; i < number_to_move; ++i ) - *(dest++) = *(source++); - - if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_EOF_PENDING ) - /* don't do the read, it's not guaranteed to return an EOF, - * just force an EOF - */ - YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars) = 0; - - else - { - int num_to_read = - YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1; - - while ( num_to_read <= 0 ) - { /* Not enough room in the buffer - grow it. */ - - /* just a shorter name for the current buffer */ - YY_BUFFER_STATE b = YY_CURRENT_BUFFER; - - int yy_c_buf_p_offset = - (int) ((yy_c_buf_p) - b->yy_ch_buf); - - if ( b->yy_is_our_buffer ) - { - int new_size = b->yy_buf_size * 2; - - if ( new_size <= 0 ) - b->yy_buf_size += b->yy_buf_size / 8; - else - b->yy_buf_size *= 2; - - b->yy_ch_buf = (char *) - /* Include room in for 2 EOB chars. */ - zconfrealloc((void *) b->yy_ch_buf,b->yy_buf_size + 2 ); - } - else - /* Can't grow it, we don't own it. */ - b->yy_ch_buf = 0; - - if ( ! b->yy_ch_buf ) - YY_FATAL_ERROR( - "fatal error - scanner input buffer overflow" ); - - (yy_c_buf_p) = &b->yy_ch_buf[yy_c_buf_p_offset]; - - num_to_read = YY_CURRENT_BUFFER_LVALUE->yy_buf_size - - number_to_move - 1; - - } - - if ( num_to_read > YY_READ_BUF_SIZE ) - num_to_read = YY_READ_BUF_SIZE; - - /* Read in more data. */ - YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]), - (yy_n_chars), (size_t) num_to_read ); - - YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); - } - - if ( (yy_n_chars) == 0 ) - { - if ( number_to_move == YY_MORE_ADJ ) - { - ret_val = EOB_ACT_END_OF_FILE; - zconfrestart(zconfin ); - } - - else - { - ret_val = EOB_ACT_LAST_MATCH; - YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = - YY_BUFFER_EOF_PENDING; - } - } - - else - ret_val = EOB_ACT_CONTINUE_SCAN; - - if ((yy_size_t) ((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) { - /* Extend the array by 50%, plus the number we really need. */ - yy_size_t new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1); - YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) zconfrealloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size ); - if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf ) - YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" ); - } - - (yy_n_chars) += number_to_move; - YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] = YY_END_OF_BUFFER_CHAR; - YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] = YY_END_OF_BUFFER_CHAR; - - (yytext_ptr) = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[0]; - - return ret_val; -} - -/* yy_get_previous_state - get the state just before the EOB char was reached */ - - static yy_state_type yy_get_previous_state (void) -{ - register yy_state_type yy_current_state; - register char *yy_cp; - - yy_current_state = (yy_start); - - for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp ) - { - yy_current_state = yy_nxt[yy_current_state][(*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1)]; - } - - return yy_current_state; -} - -/* yy_try_NUL_trans - try to make a transition on the NUL character - * - * synopsis - * next_state = yy_try_NUL_trans( current_state ); - */ - static yy_state_type yy_try_NUL_trans (yy_state_type yy_current_state ) -{ - register int yy_is_jam; - - yy_current_state = yy_nxt[yy_current_state][1]; - yy_is_jam = (yy_current_state <= 0); - - return yy_is_jam ? 0 : yy_current_state; -} - - static void yyunput (int c, register char * yy_bp ) -{ - register char *yy_cp; - - yy_cp = (yy_c_buf_p); - - /* undo effects of setting up zconftext */ - *yy_cp = (yy_hold_char); - - if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 ) - { /* need to shift things up to make room */ - /* +2 for EOB chars. */ - register int number_to_move = (yy_n_chars) + 2; - register char *dest = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[ - YY_CURRENT_BUFFER_LVALUE->yy_buf_size + 2]; - register char *source = - &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]; - - while ( source > YY_CURRENT_BUFFER_LVALUE->yy_ch_buf ) - *--dest = *--source; - - yy_cp += (int) (dest - source); - yy_bp += (int) (dest - source); - YY_CURRENT_BUFFER_LVALUE->yy_n_chars = - (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_buf_size; - - if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 ) - YY_FATAL_ERROR( "flex scanner push-back overflow" ); - } - - *--yy_cp = (char) c; - - (yytext_ptr) = yy_bp; - (yy_hold_char) = *yy_cp; - (yy_c_buf_p) = yy_cp; -} - -#ifndef YY_NO_INPUT -#ifdef __cplusplus - static int yyinput (void) -#else - static int input (void) -#endif - -{ - int c; - - *(yy_c_buf_p) = (yy_hold_char); - - if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR ) - { - /* yy_c_buf_p now points to the character we want to return. - * If this occurs *before* the EOB characters, then it's a - * valid NUL; if not, then we've hit the end of the buffer. - */ - if ( (yy_c_buf_p) < &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) - /* This was really a NUL. */ - *(yy_c_buf_p) = '\0'; - - else - { /* need more input */ - int offset = (yy_c_buf_p) - (yytext_ptr); - ++(yy_c_buf_p); - - switch ( yy_get_next_buffer( ) ) - { - case EOB_ACT_LAST_MATCH: - /* This happens because yy_g_n_b() - * sees that we've accumulated a - * token and flags that we need to - * try matching the token before - * proceeding. But for input(), - * there's no matching to consider. - * So convert the EOB_ACT_LAST_MATCH - * to EOB_ACT_END_OF_FILE. - */ - - /* Reset buffer status. */ - zconfrestart(zconfin ); - - /*FALLTHROUGH*/ - - case EOB_ACT_END_OF_FILE: - { - if ( zconfwrap( ) ) - return EOF; - - if ( ! (yy_did_buffer_switch_on_eof) ) - YY_NEW_FILE; -#ifdef __cplusplus - return yyinput(); -#else - return input(); -#endif - } - - case EOB_ACT_CONTINUE_SCAN: - (yy_c_buf_p) = (yytext_ptr) + offset; - break; - } - } - } - - c = *(unsigned char *) (yy_c_buf_p); /* cast for 8-bit char's */ - *(yy_c_buf_p) = '\0'; /* preserve zconftext */ - (yy_hold_char) = *++(yy_c_buf_p); - - return c; -} -#endif /* ifndef YY_NO_INPUT */ - -/** Immediately switch to a different input stream. - * @param input_file A readable stream. - * - * @note This function does not reset the start condition to @c INITIAL . - */ - void zconfrestart (FILE * input_file ) -{ - - if ( ! YY_CURRENT_BUFFER ){ - zconfensure_buffer_stack (); - YY_CURRENT_BUFFER_LVALUE = - zconf_create_buffer(zconfin,YY_BUF_SIZE ); - } - - zconf_init_buffer(YY_CURRENT_BUFFER,input_file ); - zconf_load_buffer_state( ); -} - -/** Switch to a different input buffer. - * @param new_buffer The new input buffer. - * - */ - void zconf_switch_to_buffer (YY_BUFFER_STATE new_buffer ) -{ - - /* TODO. We should be able to replace this entire function body - * with - * zconfpop_buffer_state(); - * zconfpush_buffer_state(new_buffer); - */ - zconfensure_buffer_stack (); - if ( YY_CURRENT_BUFFER == new_buffer ) - return; - - if ( YY_CURRENT_BUFFER ) - { - /* Flush out information for old buffer. */ - *(yy_c_buf_p) = (yy_hold_char); - YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); - YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); - } - - YY_CURRENT_BUFFER_LVALUE = new_buffer; - zconf_load_buffer_state( ); - - /* We don't actually know whether we did this switch during - * EOF (zconfwrap()) processing, but the only time this flag - * is looked at is after zconfwrap() is called, so it's safe - * to go ahead and always set it. - */ - (yy_did_buffer_switch_on_eof) = 1; -} - -static void zconf_load_buffer_state (void) -{ - (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; - (yytext_ptr) = (yy_c_buf_p) = YY_CURRENT_BUFFER_LVALUE->yy_buf_pos; - zconfin = YY_CURRENT_BUFFER_LVALUE->yy_input_file; - (yy_hold_char) = *(yy_c_buf_p); -} - -/** Allocate and initialize an input buffer state. - * @param file A readable stream. - * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE. - * - * @return the allocated buffer state. - */ - YY_BUFFER_STATE zconf_create_buffer (FILE * file, int size ) -{ - YY_BUFFER_STATE b; - - b = (YY_BUFFER_STATE) zconfalloc(sizeof( struct yy_buffer_state ) ); - if ( ! b ) - YY_FATAL_ERROR( "out of dynamic memory in zconf_create_buffer()" ); - - b->yy_buf_size = size; - - /* yy_ch_buf has to be 2 characters longer than the size given because - * we need to put in 2 end-of-buffer characters. - */ - b->yy_ch_buf = (char *) zconfalloc(b->yy_buf_size + 2 ); - if ( ! b->yy_ch_buf ) - YY_FATAL_ERROR( "out of dynamic memory in zconf_create_buffer()" ); - - b->yy_is_our_buffer = 1; - - zconf_init_buffer(b,file ); - - return b; -} - -/** Destroy the buffer. - * @param b a buffer created with zconf_create_buffer() - * - */ - void zconf_delete_buffer (YY_BUFFER_STATE b ) -{ - - if ( ! b ) - return; - - if ( b == YY_CURRENT_BUFFER ) /* Not sure if we should pop here. */ - YY_CURRENT_BUFFER_LVALUE = (YY_BUFFER_STATE) 0; - - if ( b->yy_is_our_buffer ) - zconffree((void *) b->yy_ch_buf ); - - zconffree((void *) b ); -} - -/* Initializes or reinitializes a buffer. - * This function is sometimes called more than once on the same buffer, - * such as during a zconfrestart() or at EOF. - */ - static void zconf_init_buffer (YY_BUFFER_STATE b, FILE * file ) - -{ - int oerrno = errno; - - zconf_flush_buffer(b ); - - b->yy_input_file = file; - b->yy_fill_buffer = 1; - - /* If b is the current buffer, then zconf_init_buffer was _probably_ - * called from zconfrestart() or through yy_get_next_buffer. - * In that case, we don't want to reset the lineno or column. - */ - if (b != YY_CURRENT_BUFFER){ - b->yy_bs_lineno = 1; - b->yy_bs_column = 0; - } - - b->yy_is_interactive = 0; - - errno = oerrno; -} - -/** Discard all buffered characters. On the next scan, YY_INPUT will be called. - * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER. - * - */ - void zconf_flush_buffer (YY_BUFFER_STATE b ) -{ - if ( ! b ) - return; - - b->yy_n_chars = 0; - - /* We always need two end-of-buffer characters. The first causes - * a transition to the end-of-buffer state. The second causes - * a jam in that state. - */ - b->yy_ch_buf[0] = YY_END_OF_BUFFER_CHAR; - b->yy_ch_buf[1] = YY_END_OF_BUFFER_CHAR; - - b->yy_buf_pos = &b->yy_ch_buf[0]; - - b->yy_at_bol = 1; - b->yy_buffer_status = YY_BUFFER_NEW; - - if ( b == YY_CURRENT_BUFFER ) - zconf_load_buffer_state( ); -} - -/** Pushes the new state onto the stack. The new state becomes - * the current state. This function will allocate the stack - * if necessary. - * @param new_buffer The new state. - * - */ -void zconfpush_buffer_state (YY_BUFFER_STATE new_buffer ) -{ - if (new_buffer == NULL) - return; - - zconfensure_buffer_stack(); - - /* This block is copied from zconf_switch_to_buffer. */ - if ( YY_CURRENT_BUFFER ) - { - /* Flush out information for old buffer. */ - *(yy_c_buf_p) = (yy_hold_char); - YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); - YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); - } - - /* Only push if top exists. Otherwise, replace top. */ - if (YY_CURRENT_BUFFER) - (yy_buffer_stack_top)++; - YY_CURRENT_BUFFER_LVALUE = new_buffer; - - /* copied from zconf_switch_to_buffer. */ - zconf_load_buffer_state( ); - (yy_did_buffer_switch_on_eof) = 1; -} - -/** Removes and deletes the top of the stack, if present. - * The next element becomes the new top. - * - */ -void zconfpop_buffer_state (void) -{ - if (!YY_CURRENT_BUFFER) - return; - - zconf_delete_buffer(YY_CURRENT_BUFFER ); - YY_CURRENT_BUFFER_LVALUE = NULL; - if ((yy_buffer_stack_top) > 0) - --(yy_buffer_stack_top); - - if (YY_CURRENT_BUFFER) { - zconf_load_buffer_state( ); - (yy_did_buffer_switch_on_eof) = 1; - } -} - -/* Allocates the stack if it does not exist. - * Guarantees space for at least one push. - */ -static void zconfensure_buffer_stack (void) -{ - int num_to_alloc; - - if (!(yy_buffer_stack)) { - - /* First allocation is just for 2 elements, since we don't know if this - * scanner will even need a stack. We use 2 instead of 1 to avoid an - * immediate realloc on the next call. - */ - num_to_alloc = 1; - (yy_buffer_stack) = (struct yy_buffer_state**)zconfalloc - (num_to_alloc * sizeof(struct yy_buffer_state*) - ); - if ( ! (yy_buffer_stack) ) - YY_FATAL_ERROR( "out of dynamic memory in zconfensure_buffer_stack()" ); - - memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*)); - - (yy_buffer_stack_max) = num_to_alloc; - (yy_buffer_stack_top) = 0; - return; - } - - if ((yy_buffer_stack_top) >= ((yy_buffer_stack_max)) - 1){ - - /* Increase the buffer to prepare for a possible push. */ - int grow_size = 8 /* arbitrary grow size */; - - num_to_alloc = (yy_buffer_stack_max) + grow_size; - (yy_buffer_stack) = (struct yy_buffer_state**)zconfrealloc - ((yy_buffer_stack), - num_to_alloc * sizeof(struct yy_buffer_state*) - ); - if ( ! (yy_buffer_stack) ) - YY_FATAL_ERROR( "out of dynamic memory in zconfensure_buffer_stack()" ); - - /* zero only the new slots.*/ - memset((yy_buffer_stack) + (yy_buffer_stack_max), 0, grow_size * sizeof(struct yy_buffer_state*)); - (yy_buffer_stack_max) = num_to_alloc; - } -} - -/** Setup the input buffer state to scan directly from a user-specified character buffer. - * @param base the character buffer - * @param size the size in bytes of the character buffer - * - * @return the newly allocated buffer state object. - */ -YY_BUFFER_STATE zconf_scan_buffer (char * base, yy_size_t size ) -{ - YY_BUFFER_STATE b; - - if ( size < 2 || - base[size-2] != YY_END_OF_BUFFER_CHAR || - base[size-1] != YY_END_OF_BUFFER_CHAR ) - /* They forgot to leave room for the EOB's. */ - return 0; - - b = (YY_BUFFER_STATE) zconfalloc(sizeof( struct yy_buffer_state ) ); - if ( ! b ) - YY_FATAL_ERROR( "out of dynamic memory in zconf_scan_buffer()" ); - - b->yy_buf_size = size - 2; /* "- 2" to take care of EOB's */ - b->yy_buf_pos = b->yy_ch_buf = base; - b->yy_is_our_buffer = 0; - b->yy_input_file = 0; - b->yy_n_chars = b->yy_buf_size; - b->yy_is_interactive = 0; - b->yy_at_bol = 1; - b->yy_fill_buffer = 0; - b->yy_buffer_status = YY_BUFFER_NEW; - - zconf_switch_to_buffer(b ); - - return b; -} - -/** Setup the input buffer state to scan a string. The next call to zconflex() will - * scan from a @e copy of @a str. - * @param yystr a NUL-terminated string to scan - * - * @return the newly allocated buffer state object. - * @note If you want to scan bytes that may contain NUL values, then use - * zconf_scan_bytes() instead. - */ -YY_BUFFER_STATE zconf_scan_string (yyconst char * yystr ) -{ - - return zconf_scan_bytes(yystr,strlen(yystr) ); -} - -/** Setup the input buffer state to scan the given bytes. The next call to zconflex() will - * scan from a @e copy of @a bytes. - * @param yybytes the byte buffer to scan - * @param _yybytes_len the number of bytes in the buffer pointed to by @a bytes. - * - * @return the newly allocated buffer state object. - */ -YY_BUFFER_STATE zconf_scan_bytes (yyconst char * yybytes, int _yybytes_len ) -{ - YY_BUFFER_STATE b; - char *buf; - yy_size_t n; - int i; - - /* Get memory for full buffer, including space for trailing EOB's. */ - n = _yybytes_len + 2; - buf = (char *) zconfalloc(n ); - if ( ! buf ) - YY_FATAL_ERROR( "out of dynamic memory in zconf_scan_bytes()" ); - - for ( i = 0; i < _yybytes_len; ++i ) - buf[i] = yybytes[i]; - - buf[_yybytes_len] = buf[_yybytes_len+1] = YY_END_OF_BUFFER_CHAR; - - b = zconf_scan_buffer(buf,n ); - if ( ! b ) - YY_FATAL_ERROR( "bad buffer in zconf_scan_bytes()" ); - - /* It's okay to grow etc. this buffer, and we should throw it - * away when we're done. - */ - b->yy_is_our_buffer = 1; - - return b; -} - -#ifndef YY_EXIT_FAILURE -#define YY_EXIT_FAILURE 2 -#endif - -static void yy_fatal_error (yyconst char* msg ) -{ - (void) fprintf( stderr, "%s\n", msg ); - exit( YY_EXIT_FAILURE ); -} - -/* Redefine yyless() so it works in section 3 code. */ - -#undef yyless -#define yyless(n) \ - do \ - { \ - /* Undo effects of setting up zconftext. */ \ - int yyless_macro_arg = (n); \ - YY_LESS_LINENO(yyless_macro_arg);\ - zconftext[zconfleng] = (yy_hold_char); \ - (yy_c_buf_p) = zconftext + yyless_macro_arg; \ - (yy_hold_char) = *(yy_c_buf_p); \ - *(yy_c_buf_p) = '\0'; \ - zconfleng = yyless_macro_arg; \ - } \ - while ( 0 ) - -/* Accessor methods (get/set functions) to struct members. */ - -/** Get the current line number. - * - */ -int zconfget_lineno (void) -{ - - return zconflineno; -} - -/** Get the input stream. - * - */ -FILE *zconfget_in (void) -{ - return zconfin; -} - -/** Get the output stream. - * - */ -FILE *zconfget_out (void) -{ - return zconfout; -} - -/** Get the length of the current token. - * - */ -int zconfget_leng (void) -{ - return zconfleng; -} - -/** Get the current token. - * - */ - -char *zconfget_text (void) -{ - return zconftext; -} - -/** Set the current line number. - * @param line_number - * - */ -void zconfset_lineno (int line_number ) -{ - - zconflineno = line_number; -} - -/** Set the input stream. This does not discard the current - * input buffer. - * @param in_str A readable stream. - * - * @see zconf_switch_to_buffer - */ -void zconfset_in (FILE * in_str ) -{ - zconfin = in_str ; -} - -void zconfset_out (FILE * out_str ) -{ - zconfout = out_str ; -} - -int zconfget_debug (void) -{ - return zconf_flex_debug; -} - -void zconfset_debug (int bdebug ) -{ - zconf_flex_debug = bdebug ; -} - -static int yy_init_globals (void) -{ - /* Initialization is the same as for the non-reentrant scanner. - * This function is called from zconflex_destroy(), so don't allocate here. - */ - - (yy_buffer_stack) = 0; - (yy_buffer_stack_top) = 0; - (yy_buffer_stack_max) = 0; - (yy_c_buf_p) = (char *) 0; - (yy_init) = 0; - (yy_start) = 0; - -/* Defined in main.c */ -#ifdef YY_STDINIT - zconfin = stdin; - zconfout = stdout; -#else - zconfin = (FILE *) 0; - zconfout = (FILE *) 0; -#endif - - /* For future reference: Set errno on error, since we are called by - * zconflex_init() - */ - return 0; -} - -/* zconflex_destroy is for both reentrant and non-reentrant scanners. */ -int zconflex_destroy (void) -{ - - /* Pop the buffer stack, destroying each element. */ - while(YY_CURRENT_BUFFER){ - zconf_delete_buffer(YY_CURRENT_BUFFER ); - YY_CURRENT_BUFFER_LVALUE = NULL; - zconfpop_buffer_state(); - } - - /* Destroy the stack itself. */ - zconffree((yy_buffer_stack) ); - (yy_buffer_stack) = NULL; - - /* Reset the globals. This is important in a non-reentrant scanner so the next time - * zconflex() is called, initialization will occur. */ - yy_init_globals( ); - - return 0; -} - -/* - * Internal utility routines. - */ - -#ifndef yytext_ptr -static void yy_flex_strncpy (char* s1, yyconst char * s2, int n ) -{ - register int i; - for ( i = 0; i < n; ++i ) - s1[i] = s2[i]; -} -#endif - -#ifdef YY_NEED_STRLEN -static int yy_flex_strlen (yyconst char * s ) -{ - register int n; - for ( n = 0; s[n]; ++n ) - ; - - return n; -} -#endif - -void *zconfalloc (yy_size_t size ) -{ - return (void *) malloc( size ); -} - -void *zconfrealloc (void * ptr, yy_size_t size ) -{ - /* The cast to (char *) in the following accommodates both - * implementations that use char* generic pointers, and those - * that use void* generic pointers. It works with the latter - * because both ANSI C and C++ allow castless assignment from - * any pointer type to void*, and deal with argument conversions - * as though doing an assignment. - */ - return (void *) realloc( (char *) ptr, size ); -} - -void zconffree (void * ptr ) -{ - free( (char *) ptr ); /* see zconfrealloc() for (char *) cast */ -} - -#define YYTABLES_NAME "yytables" - -void zconf_starthelp(void) -{ - new_string(); - last_ts = first_ts = 0; - BEGIN(HELP); -} - -static void zconf_endhelp(void) -{ - zconflval.string = text; - BEGIN(INITIAL); -} - -/* - * Try to open specified file with following names: - * ./name - * $(srctree)/name - * The latter is used when srctree is separate from objtree - * when compiling the kernel. - * Return NULL if file is not found. - */ -FILE *zconf_fopen(const char *name) -{ - char *env, fullname[PATH_MAX+1]; - FILE *f; - - f = fopen(name, "r"); - if (!f && name != NULL && name[0] != '/') { - env = getenv(SRCTREE); - if (env) { - sprintf(fullname, "%s/%s", env, name); - f = fopen(fullname, "r"); - } - } - return f; -} - -void zconf_initscan(const char *name) -{ - zconfin = zconf_fopen(name); - if (!zconfin) { - printf("can't find file %s\n", name); - exit(1); - } - - current_buf = xmalloc(sizeof(*current_buf)); - memset(current_buf, 0, sizeof(*current_buf)); - - current_file = file_lookup(name); - current_file->lineno = 1; -} - -void zconf_nextfile(const char *name) -{ - struct file *iter; - struct file *file = file_lookup(name); - struct buffer *buf = xmalloc(sizeof(*buf)); - memset(buf, 0, sizeof(*buf)); - - current_buf->state = YY_CURRENT_BUFFER; - zconfin = zconf_fopen(file->name); - if (!zconfin) { - printf("%s:%d: can't open file \"%s\"\n", - zconf_curname(), zconf_lineno(), file->name); - exit(1); - } - zconf_switch_to_buffer(zconf_create_buffer(zconfin,YY_BUF_SIZE)); - buf->parent = current_buf; - current_buf = buf; - - for (iter = current_file->parent; iter; iter = iter->parent ) { - if (!strcmp(current_file->name,iter->name) ) { - printf("%s:%d: recursive inclusion detected. " - "Inclusion path:\n current file : '%s'\n", - zconf_curname(), zconf_lineno(), - zconf_curname()); - iter = current_file->parent; - while (iter && \ - strcmp(iter->name,current_file->name)) { - printf(" included from: '%s:%d'\n", - iter->name, iter->lineno-1); - iter = iter->parent; - } - if (iter) - printf(" included from: '%s:%d'\n", - iter->name, iter->lineno+1); - exit(1); - } - } - file->lineno = 1; - file->parent = current_file; - current_file = file; -} - -static void zconf_endfile(void) -{ - struct buffer *parent; - - current_file = current_file->parent; - - parent = current_buf->parent; - if (parent) { - fclose(zconfin); - zconf_delete_buffer(YY_CURRENT_BUFFER); - zconf_switch_to_buffer(parent->state); - } - free(current_buf); - current_buf = parent; -} - -int zconf_lineno(void) -{ - return current_pos.lineno; -} - -const char *zconf_curname(void) -{ - return current_pos.file ? current_pos.file->name : "<none>"; -} - diff --git a/scripts/kconfig/zconf.tab.c_shipped b/scripts/kconfig/zconf.tab.c_shipped deleted file mode 100644 index 65b7515a577..00000000000 --- a/scripts/kconfig/zconf.tab.c_shipped +++ /dev/null @@ -1,2471 +0,0 @@ -/* A Bison parser, made by GNU Bison 3.0.4. */ - -/* Bison implementation for Yacc-like parsers in C - - Copyright (C) 1984, 1989-1990, 2000-2015 Free Software Foundation, Inc. - - This program is free software: you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation, either version 3 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see <http://www.gnu.org/licenses/>. */ - -/* As a special exception, you may create a larger work that contains - part or all of the Bison parser skeleton and distribute that work - under terms of your choice, so long as that work isn't itself a - parser generator using the skeleton or a modified version thereof - as a parser skeleton. Alternatively, if you modify or redistribute - the parser skeleton itself, you may (at your option) remove this - special exception, which will cause the skeleton and the resulting - Bison output files to be licensed under the GNU General Public - License without this special exception. - - This special exception was added by the Free Software Foundation in - version 2.2 of Bison. */ - -/* C LALR(1) parser skeleton written by Richard Stallman, by - simplifying the original so-called "semantic" parser. */ - -/* All symbols defined below should begin with yy or YY, to avoid - infringing on user name space. This should be done even for local - variables, as they might otherwise be expanded by user macros. - There are some unavoidable exceptions within include files to - define necessary library symbols; they are noted "INFRINGES ON - USER NAME SPACE" below. */ - -/* Identify Bison output. */ -#define YYBISON 1 - -/* Bison version. */ -#define YYBISON_VERSION "3.0.4" - -/* Skeleton name. */ -#define YYSKELETON_NAME "yacc.c" - -/* Pure parsers. */ -#define YYPURE 0 - -/* Push parsers. */ -#define YYPUSH 0 - -/* Pull parsers. */ -#define YYPULL 1 - - -/* Substitute the variable and function names. */ -#define yyparse zconfparse -#define yylex zconflex -#define yyerror zconferror -#define yydebug zconfdebug -#define yynerrs zconfnerrs - -#define yylval zconflval -#define yychar zconfchar - -/* Copy the first part of user declarations. */ - - -/* - * Copyright (C) 2002 Roman Zippel <zippel@linux-m68k.org> - * Released under the terms of the GNU GPL v2.0. - */ - -#include <ctype.h> -#include <stdarg.h> -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <stdbool.h> - -#include "lkc.h" - -#define printd(mask, fmt...) if (cdebug & (mask)) printf(fmt) - -#define PRINTD 0x0001 -#define DEBUG_PARSE 0x0002 - -int cdebug = PRINTD; - -extern int zconflex(void); -static void zconfprint(const char *err, ...); -static void zconf_error(const char *err, ...); -static void zconferror(const char *err); -static bool zconf_endtoken(const struct kconf_id *id, int starttoken, int endtoken); - -struct symbol *symbol_hash[SYMBOL_HASHSIZE]; - -static struct menu *current_menu, *current_entry; - - - - -# ifndef YY_NULLPTR -# if defined __cplusplus && 201103L <= __cplusplus -# define YY_NULLPTR nullptr -# else -# define YY_NULLPTR 0 -# endif -# endif - -/* Enabling verbose error messages. */ -#ifdef YYERROR_VERBOSE -# undef YYERROR_VERBOSE -# define YYERROR_VERBOSE 1 -#else -# define YYERROR_VERBOSE 0 -#endif - - -/* Debug traces. */ -#ifndef YYDEBUG -# define YYDEBUG 1 -#endif -#if YYDEBUG -extern int zconfdebug; -#endif - -/* Token type. */ -#ifndef YYTOKENTYPE -# define YYTOKENTYPE - enum yytokentype - { - T_MAINMENU = 258, - T_MENU = 259, - T_ENDMENU = 260, - T_SOURCE = 261, - T_CHOICE = 262, - T_ENDCHOICE = 263, - T_COMMENT = 264, - T_CONFIG = 265, - T_MENUCONFIG = 266, - T_HELP = 267, - T_HELPTEXT = 268, - T_IF = 269, - T_ENDIF = 270, - T_DEPENDS = 271, - T_OPTIONAL = 272, - T_PROMPT = 273, - T_TYPE = 274, - T_DEFAULT = 275, - T_SELECT = 276, - T_IMPLY = 277, - T_RANGE = 278, - T_VISIBLE = 279, - T_OPTION = 280, - T_ON = 281, - T_WORD = 282, - T_WORD_QUOTE = 283, - T_UNEQUAL = 284, - T_LESS = 285, - T_LESS_EQUAL = 286, - T_GREATER = 287, - T_GREATER_EQUAL = 288, - T_CLOSE_PAREN = 289, - T_OPEN_PAREN = 290, - T_EOL = 291, - T_OR = 292, - T_AND = 293, - T_EQUAL = 294, - T_NOT = 295 - }; -#endif - -/* Value type. */ -#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED - -union YYSTYPE -{ - - - char *string; - struct file *file; - struct symbol *symbol; - struct expr *expr; - struct menu *menu; - const struct kconf_id *id; - - -}; - -typedef union YYSTYPE YYSTYPE; -# define YYSTYPE_IS_TRIVIAL 1 -# define YYSTYPE_IS_DECLARED 1 -#endif - - -extern YYSTYPE zconflval; - -int zconfparse (void); - - - -/* Copy the second part of user declarations. */ - - -/* Include zconf.hash.c here so it can see the token constants. */ -#include "zconf.hash.c" - - - -#ifdef short -# undef short -#endif - -#ifdef YYTYPE_UINT8 -typedef YYTYPE_UINT8 yytype_uint8; -#else -typedef unsigned char yytype_uint8; -#endif - -#ifdef YYTYPE_INT8 -typedef YYTYPE_INT8 yytype_int8; -#else -typedef signed char yytype_int8; -#endif - -#ifdef YYTYPE_UINT16 -typedef YYTYPE_UINT16 yytype_uint16; -#else -typedef unsigned short int yytype_uint16; -#endif - -#ifdef YYTYPE_INT16 -typedef YYTYPE_INT16 yytype_int16; -#else -typedef short int yytype_int16; -#endif - -#ifndef YYSIZE_T -# ifdef __SIZE_TYPE__ -# define YYSIZE_T __SIZE_TYPE__ -# elif defined size_t -# define YYSIZE_T size_t -# elif ! defined YYSIZE_T -# include <stddef.h> /* INFRINGES ON USER NAME SPACE */ -# define YYSIZE_T size_t -# else -# define YYSIZE_T unsigned int -# endif -#endif - -#define YYSIZE_MAXIMUM ((YYSIZE_T) -1) - -#ifndef YY_ -# if defined YYENABLE_NLS && YYENABLE_NLS -# if ENABLE_NLS -# include <libintl.h> /* INFRINGES ON USER NAME SPACE */ -# define YY_(Msgid) dgettext ("bison-runtime", Msgid) -# endif -# endif -# ifndef YY_ -# define YY_(Msgid) Msgid -# endif -#endif - -#ifndef YY_ATTRIBUTE -# if (defined __GNUC__ \ - && (2 < __GNUC__ || (__GNUC__ == 2 && 96 <= __GNUC_MINOR__))) \ - || defined __SUNPRO_C && 0x5110 <= __SUNPRO_C -# define YY_ATTRIBUTE(Spec) __attribute__(Spec) -# else -# define YY_ATTRIBUTE(Spec) /* empty */ -# endif -#endif - -#ifndef YY_ATTRIBUTE_PURE -# define YY_ATTRIBUTE_PURE YY_ATTRIBUTE ((__pure__)) -#endif - -#ifndef YY_ATTRIBUTE_UNUSED -# define YY_ATTRIBUTE_UNUSED YY_ATTRIBUTE ((__unused__)) -#endif - -#if !defined _Noreturn \ - && (!defined __STDC_VERSION__ || __STDC_VERSION__ < 201112) -# if defined _MSC_VER && 1200 <= _MSC_VER -# define _Noreturn __declspec (noreturn) -# else -# define _Noreturn YY_ATTRIBUTE ((__noreturn__)) -# endif -#endif - -/* Suppress unused-variable warnings by "using" E. */ -#if ! defined lint || defined __GNUC__ -# define YYUSE(E) ((void) (E)) -#else -# define YYUSE(E) /* empty */ -#endif - -#if defined __GNUC__ && 407 <= __GNUC__ * 100 + __GNUC_MINOR__ -/* Suppress an incorrect diagnostic about yylval being uninitialized. */ -# define YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN \ - _Pragma ("GCC diagnostic push") \ - _Pragma ("GCC diagnostic ignored \"-Wuninitialized\"")\ - _Pragma ("GCC diagnostic ignored \"-Wmaybe-uninitialized\"") -# define YY_IGNORE_MAYBE_UNINITIALIZED_END \ - _Pragma ("GCC diagnostic pop") -#else -# define YY_INITIAL_VALUE(Value) Value -#endif -#ifndef YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN -# define YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN -# define YY_IGNORE_MAYBE_UNINITIALIZED_END -#endif -#ifndef YY_INITIAL_VALUE -# define YY_INITIAL_VALUE(Value) /* Nothing. */ -#endif - - -#if ! defined yyoverflow || YYERROR_VERBOSE - -/* The parser invokes alloca or malloc; define the necessary symbols. */ - -# ifdef YYSTACK_USE_ALLOCA -# if YYSTACK_USE_ALLOCA -# ifdef __GNUC__ -# define YYSTACK_ALLOC __builtin_alloca -# elif defined __BUILTIN_VA_ARG_INCR -# include <alloca.h> /* INFRINGES ON USER NAME SPACE */ -# elif defined _AIX -# define YYSTACK_ALLOC __alloca -# elif defined _MSC_VER -# include <malloc.h> /* INFRINGES ON USER NAME SPACE */ -# define alloca _alloca -# else -# define YYSTACK_ALLOC alloca -# if ! defined _ALLOCA_H && ! defined EXIT_SUCCESS -# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */ - /* Use EXIT_SUCCESS as a witness for stdlib.h. */ -# ifndef EXIT_SUCCESS -# define EXIT_SUCCESS 0 -# endif -# endif -# endif -# endif -# endif - -# ifdef YYSTACK_ALLOC - /* Pacify GCC's 'empty if-body' warning. */ -# define YYSTACK_FREE(Ptr) do { /* empty */; } while (0) -# ifndef YYSTACK_ALLOC_MAXIMUM - /* The OS might guarantee only one guard page at the bottom of the stack, - and a page size can be as small as 4096 bytes. So we cannot safely - invoke alloca (N) if N exceeds 4096. Use a slightly smaller number - to allow for a few compiler-allocated temporary stack slots. */ -# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */ -# endif -# else -# define YYSTACK_ALLOC YYMALLOC -# define YYSTACK_FREE YYFREE -# ifndef YYSTACK_ALLOC_MAXIMUM -# define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM -# endif -# if (defined __cplusplus && ! defined EXIT_SUCCESS \ - && ! ((defined YYMALLOC || defined malloc) \ - && (defined YYFREE || defined free))) -# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */ -# ifndef EXIT_SUCCESS -# define EXIT_SUCCESS 0 -# endif -# endif -# ifndef YYMALLOC -# define YYMALLOC malloc -# if ! defined malloc && ! defined EXIT_SUCCESS -void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */ -# endif -# endif -# ifndef YYFREE -# define YYFREE free -# if ! defined free && ! defined EXIT_SUCCESS -void free (void *); /* INFRINGES ON USER NAME SPACE */ -# endif -# endif -# endif -#endif /* ! defined yyoverflow || YYERROR_VERBOSE */ - - -#if (! defined yyoverflow \ - && (! defined __cplusplus \ - || (defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL))) - -/* A type that is properly aligned for any stack member. */ -union yyalloc -{ - yytype_int16 yyss_alloc; - YYSTYPE yyvs_alloc; -}; - -/* The size of the maximum gap between one aligned stack and the next. */ -# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1) - -/* The size of an array large to enough to hold all stacks, each with - N elements. */ -# define YYSTACK_BYTES(N) \ - ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE)) \ - + YYSTACK_GAP_MAXIMUM) - -# define YYCOPY_NEEDED 1 - -/* Relocate STACK from its old location to the new one. The - local variables YYSIZE and YYSTACKSIZE give the old and new number of - elements in the stack, and YYPTR gives the new location of the - stack. Advance YYPTR to a properly aligned location for the next - stack. */ -# define YYSTACK_RELOCATE(Stack_alloc, Stack) \ - do \ - { \ - YYSIZE_T yynewbytes; \ - YYCOPY (&yyptr->Stack_alloc, Stack, yysize); \ - Stack = &yyptr->Stack_alloc; \ - yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \ - yyptr += yynewbytes / sizeof (*yyptr); \ - } \ - while (0) - -#endif - -#if defined YYCOPY_NEEDED && YYCOPY_NEEDED -/* Copy COUNT objects from SRC to DST. The source and destination do - not overlap. */ -# ifndef YYCOPY -# if defined __GNUC__ && 1 < __GNUC__ -# define YYCOPY(Dst, Src, Count) \ - __builtin_memcpy (Dst, Src, (Count) * sizeof (*(Src))) -# else -# define YYCOPY(Dst, Src, Count) \ - do \ - { \ - YYSIZE_T yyi; \ - for (yyi = 0; yyi < (Count); yyi++) \ - (Dst)[yyi] = (Src)[yyi]; \ - } \ - while (0) -# endif -# endif -#endif /* !YYCOPY_NEEDED */ - -/* YYFINAL -- State number of the termination state. */ -#define YYFINAL 11 -/* YYLAST -- Last index in YYTABLE. */ -#define YYLAST 301 - -/* YYNTOKENS -- Number of terminals. */ -#define YYNTOKENS 41 -/* YYNNTS -- Number of nonterminals. */ -#define YYNNTS 50 -/* YYNRULES -- Number of rules. */ -#define YYNRULES 124 -/* YYNSTATES -- Number of states. */ -#define YYNSTATES 204 - -/* YYTRANSLATE[YYX] -- Symbol number corresponding to YYX as returned - by yylex, with out-of-bounds checking. */ -#define YYUNDEFTOK 2 -#define YYMAXUTOK 295 - -#define YYTRANSLATE(YYX) \ - ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK) - -/* YYTRANSLATE[TOKEN-NUM] -- Symbol number corresponding to TOKEN-NUM - as returned by yylex, without out-of-bounds checking. */ -static const yytype_uint8 yytranslate[] = -{ - 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, - 2, 2, 2, 2, 2, 2, 1, 2, 3, 4, - 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, - 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, - 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, - 35, 36, 37, 38, 39, 40 -}; - -#if YYDEBUG - /* YYRLINE[YYN] -- Source line where rule number YYN was defined. */ -static const yytype_uint16 yyrline[] = -{ - 0, 109, 109, 109, 111, 111, 113, 115, 116, 117, - 118, 119, 120, 124, 128, 128, 128, 128, 128, 128, - 128, 128, 128, 132, 133, 134, 135, 136, 137, 141, - 142, 148, 156, 162, 170, 180, 182, 183, 184, 185, - 186, 187, 190, 198, 204, 214, 220, 226, 232, 235, - 237, 248, 249, 254, 263, 268, 276, 279, 281, 282, - 283, 284, 285, 288, 294, 305, 311, 321, 323, 328, - 336, 344, 347, 349, 350, 351, 356, 363, 370, 375, - 383, 386, 388, 389, 390, 393, 401, 408, 415, 421, - 428, 430, 431, 432, 435, 443, 445, 446, 449, 456, - 458, 463, 464, 467, 468, 469, 473, 474, 477, 478, - 481, 482, 483, 484, 485, 486, 487, 488, 489, 490, - 491, 494, 495, 498, 499 -}; -#endif - -#if YYDEBUG || YYERROR_VERBOSE || 0 -/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM. - First, the terminals, then, starting at YYNTOKENS, nonterminals. */ -static const char *const yytname[] = -{ - "$end", "error", "$undefined", "T_MAINMENU", "T_MENU", "T_ENDMENU", - "T_SOURCE", "T_CHOICE", "T_ENDCHOICE", "T_COMMENT", "T_CONFIG", - "T_MENUCONFIG", "T_HELP", "T_HELPTEXT", "T_IF", "T_ENDIF", "T_DEPENDS", - "T_OPTIONAL", "T_PROMPT", "T_TYPE", "T_DEFAULT", "T_SELECT", "T_IMPLY", - "T_RANGE", "T_VISIBLE", "T_OPTION", "T_ON", "T_WORD", "T_WORD_QUOTE", - "T_UNEQUAL", "T_LESS", "T_LESS_EQUAL", "T_GREATER", "T_GREATER_EQUAL", - "T_CLOSE_PAREN", "T_OPEN_PAREN", "T_EOL", "T_OR", "T_AND", "T_EQUAL", - "T_NOT", "$accept", "input", "start", "stmt_list", "option_name", - "common_stmt", "option_error", "config_entry_start", "config_stmt", - "menuconfig_entry_start", "menuconfig_stmt", "config_option_list", - "config_option", "symbol_option", "symbol_option_list", - "symbol_option_arg", "choice", "choice_entry", "choice_end", - "choice_stmt", "choice_option_list", "choice_option", "choice_block", - "if_entry", "if_end", "if_stmt", "if_block", "mainmenu_stmt", "menu", - "menu_entry", "menu_end", "menu_stmt", "menu_block", "source_stmt", - "comment", "comment_stmt", "help_start", "help", "depends_list", - "depends", "visibility_list", "visible", "prompt_stmt_opt", "prompt", - "end", "nl", "if_expr", "expr", "symbol", "word_opt", YY_NULLPTR -}; -#endif - -# ifdef YYPRINT -/* YYTOKNUM[NUM] -- (External) token number corresponding to the - (internal) symbol number NUM (which must be that of a token). */ -static const yytype_uint16 yytoknum[] = -{ - 0, 256, 257, 258, 259, 260, 261, 262, 263, 264, - 265, 266, 267, 268, 269, 270, 271, 272, 273, 274, - 275, 276, 277, 278, 279, 280, 281, 282, 283, 284, - 285, 286, 287, 288, 289, 290, 291, 292, 293, 294, - 295 -}; -# endif - -#define YYPACT_NINF -92 - -#define yypact_value_is_default(Yystate) \ - (!!((Yystate) == (-92))) - -#define YYTABLE_NINF -88 - -#define yytable_value_is_error(Yytable_value) \ - 0 - - /* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing - STATE-NUM. */ -static const yytype_int16 yypact[] = -{ - 17, 41, -92, 15, -92, 150, -92, 19, -92, -92, - -13, -92, 28, 41, 38, 41, 50, 47, 41, 79, - 82, 44, 76, -92, -92, -92, -92, -92, -92, -92, - -92, -92, 118, -92, 129, -92, -92, -92, -92, -92, - -92, -92, -92, -92, -92, -92, -92, -92, -92, -92, - -92, -92, 184, -92, -92, 107, -92, 111, -92, 113, - -92, 116, -92, 139, 140, 151, -92, -92, 44, 44, - 142, 256, -92, 160, 173, 27, 117, 80, 51, 255, - -15, 255, 217, -92, -92, -92, -92, -92, -92, -8, - -92, 44, 44, 107, 87, 87, 87, 87, 87, 87, - -92, -92, 174, 176, 187, 41, 41, 44, 188, 189, - 87, -92, 213, -92, -92, -92, -92, 206, -92, -92, - 193, 41, 41, 203, -92, -92, -92, -92, -92, -92, - -92, -92, -92, -92, -92, -92, -92, 229, -92, 241, - -92, -92, -92, -92, -92, -92, -92, -92, -92, -92, - 216, -92, -92, -92, -92, -92, -92, -92, -92, -92, - 44, 229, 222, 229, 64, 229, 229, 87, 31, 231, - -92, -92, 229, 236, 229, 44, -92, 145, 242, -92, - -92, 243, 244, 245, 229, 251, -92, -92, 247, -92, - 257, 125, -92, -92, -92, -92, -92, 260, 41, -92, - -92, -92, -92, -92 -}; - - /* YYDEFACT[STATE-NUM] -- Default reduction number in state STATE-NUM. - Performed when YYTABLE does not specify something else to do. Zero - means the default is an error. */ -static const yytype_uint8 yydefact[] = -{ - 6, 0, 106, 0, 3, 0, 6, 6, 101, 102, - 0, 1, 0, 0, 0, 0, 123, 0, 0, 0, - 0, 0, 0, 14, 19, 15, 16, 21, 17, 18, - 20, 22, 0, 23, 0, 7, 35, 26, 35, 27, - 57, 67, 8, 72, 24, 95, 81, 9, 28, 90, - 25, 10, 0, 107, 2, 76, 13, 0, 103, 0, - 124, 0, 104, 0, 0, 0, 121, 122, 0, 0, - 0, 110, 105, 0, 0, 0, 0, 0, 0, 0, - 90, 0, 0, 77, 85, 53, 86, 31, 33, 0, - 118, 0, 0, 69, 0, 0, 0, 0, 0, 0, - 11, 12, 0, 0, 0, 0, 99, 0, 0, 0, - 0, 49, 0, 41, 40, 36, 37, 0, 39, 38, - 0, 0, 99, 0, 61, 62, 58, 60, 59, 68, - 56, 55, 73, 75, 71, 74, 70, 108, 97, 0, - 96, 82, 84, 80, 83, 79, 92, 93, 91, 117, - 119, 120, 116, 111, 112, 113, 114, 115, 30, 88, - 0, 108, 0, 108, 108, 108, 108, 0, 0, 0, - 89, 65, 108, 0, 108, 0, 98, 0, 0, 42, - 100, 0, 0, 0, 108, 51, 48, 29, 0, 64, - 0, 109, 94, 43, 44, 45, 46, 0, 0, 50, - 63, 66, 47, 52 -}; - - /* YYPGOTO[NTERM-NUM]. */ -static const yytype_int16 yypgoto[] = -{ - -92, -92, 285, 291, -92, 32, -66, -92, -92, -92, - -92, 261, -92, -92, -92, -92, -92, -92, -92, 1, - -92, -92, -92, -92, -92, -92, -92, -92, -92, -92, - -92, 24, -92, -92, -92, -92, -92, 221, 220, -64, - -92, -92, 179, -1, 67, 0, 110, -67, -91, -92 -}; - - /* YYDEFGOTO[NTERM-NUM]. */ -static const yytype_int16 yydefgoto[] = -{ - -1, 3, 4, 5, 34, 35, 114, 36, 37, 38, - 39, 75, 115, 116, 168, 199, 40, 41, 130, 42, - 77, 126, 78, 43, 134, 44, 79, 6, 45, 46, - 143, 47, 81, 48, 49, 50, 117, 118, 82, 119, - 80, 140, 162, 163, 51, 7, 176, 70, 71, 61 -}; - - /* YYTABLE[YYPACT[STATE-NUM]] -- What to do in state STATE-NUM. If - positive, shift that token. If negative, reduce the rule whose - number is the opposite. If YYTABLE_NINF, syntax error. */ -static const yytype_int16 yytable[] = -{ - 10, 89, 90, 152, 153, 154, 155, 156, 157, 137, - 55, 125, 57, 128, 59, 11, 147, 63, 148, 167, - 1, 138, 1, 2, 150, 151, 149, -32, 102, 91, - 92, -32, -32, -32, -32, -32, -32, -32, -32, 103, - 164, -32, -32, 104, -32, 105, 106, 107, 108, 109, - 110, -32, 111, 2, 112, 53, 14, 15, 185, 17, - 18, 19, 20, 113, 56, 21, 22, 186, 8, 9, - 93, 66, 67, 147, 58, 148, 184, 60, 175, 68, - 133, 102, 142, 62, 69, -54, -54, 33, -54, -54, - -54, -54, 103, 177, -54, -54, 104, 120, 121, 122, - 123, 91, 92, 135, 161, 144, 64, 112, 191, 65, - 129, 132, 72, 141, 66, 67, 124, -34, 102, 73, - 172, -34, -34, -34, -34, -34, -34, -34, -34, 103, - 74, -34, -34, 104, -34, 105, 106, 107, 108, 109, - 110, -34, 111, 53, 112, 131, 136, 83, 145, 84, - -5, 12, 85, 113, 13, 14, 15, 16, 17, 18, - 19, 20, 91, 92, 21, 22, 23, 24, 25, 26, - 27, 28, 29, 30, 31, 86, 87, 32, 2, 91, - 92, 192, 91, 92, -4, 12, 33, 88, 13, 14, - 15, 16, 17, 18, 19, 20, 100, 203, 21, 22, - 23, 24, 25, 26, 27, 28, 29, 30, 31, 101, - 158, 32, 159, 160, 169, 165, 166, -87, 102, 170, - 33, -87, -87, -87, -87, -87, -87, -87, -87, 171, - 174, -87, -87, 104, -87, -87, -87, -87, -87, -87, - -87, -87, 102, 175, 112, -78, -78, -78, -78, -78, - -78, -78, -78, 146, 92, -78, -78, 104, 179, 13, - 14, 15, 16, 17, 18, 19, 20, 187, 112, 21, - 22, 178, 189, 180, 181, 182, 183, 146, 193, 194, - 195, 196, 188, 200, 190, 94, 95, 96, 97, 98, - 198, 33, 54, 201, 197, 99, 202, 52, 127, 76, - 139, 173 -}; - -static const yytype_uint8 yycheck[] = -{ - 1, 68, 69, 94, 95, 96, 97, 98, 99, 24, - 10, 77, 13, 77, 15, 0, 82, 18, 82, 110, - 3, 36, 3, 36, 91, 92, 34, 0, 1, 37, - 38, 4, 5, 6, 7, 8, 9, 10, 11, 12, - 107, 14, 15, 16, 17, 18, 19, 20, 21, 22, - 23, 24, 25, 36, 27, 36, 5, 6, 27, 8, - 9, 10, 11, 36, 36, 14, 15, 36, 27, 28, - 70, 27, 28, 139, 36, 139, 167, 27, 14, 35, - 79, 1, 81, 36, 40, 5, 6, 36, 8, 9, - 10, 11, 12, 160, 14, 15, 16, 17, 18, 19, - 20, 37, 38, 79, 105, 81, 27, 27, 175, 27, - 78, 79, 36, 81, 27, 28, 36, 0, 1, 1, - 121, 4, 5, 6, 7, 8, 9, 10, 11, 12, - 1, 14, 15, 16, 17, 18, 19, 20, 21, 22, - 23, 24, 25, 36, 27, 78, 79, 36, 81, 36, - 0, 1, 36, 36, 4, 5, 6, 7, 8, 9, - 10, 11, 37, 38, 14, 15, 16, 17, 18, 19, - 20, 21, 22, 23, 24, 36, 36, 27, 36, 37, - 38, 36, 37, 38, 0, 1, 36, 36, 4, 5, - 6, 7, 8, 9, 10, 11, 36, 198, 14, 15, - 16, 17, 18, 19, 20, 21, 22, 23, 24, 36, - 36, 27, 36, 26, 1, 27, 27, 0, 1, 13, - 36, 4, 5, 6, 7, 8, 9, 10, 11, 36, - 27, 14, 15, 16, 17, 18, 19, 20, 21, 22, - 23, 24, 1, 14, 27, 4, 5, 6, 7, 8, - 9, 10, 11, 36, 38, 14, 15, 16, 36, 4, - 5, 6, 7, 8, 9, 10, 11, 36, 27, 14, - 15, 161, 36, 163, 164, 165, 166, 36, 36, 36, - 36, 36, 172, 36, 174, 29, 30, 31, 32, 33, - 39, 36, 7, 36, 184, 39, 36, 6, 77, 38, - 80, 122 -}; - - /* YYSTOS[STATE-NUM] -- The (internal number of the) accessing - symbol of state STATE-NUM. */ -static const yytype_uint8 yystos[] = -{ - 0, 3, 36, 42, 43, 44, 68, 86, 27, 28, - 84, 0, 1, 4, 5, 6, 7, 8, 9, 10, - 11, 14, 15, 16, 17, 18, 19, 20, 21, 22, - 23, 24, 27, 36, 45, 46, 48, 49, 50, 51, - 57, 58, 60, 64, 66, 69, 70, 72, 74, 75, - 76, 85, 44, 36, 43, 86, 36, 84, 36, 84, - 27, 90, 36, 84, 27, 27, 27, 28, 35, 40, - 88, 89, 36, 1, 1, 52, 52, 61, 63, 67, - 81, 73, 79, 36, 36, 36, 36, 36, 36, 88, - 88, 37, 38, 86, 29, 30, 31, 32, 33, 39, - 36, 36, 1, 12, 16, 18, 19, 20, 21, 22, - 23, 25, 27, 36, 47, 53, 54, 77, 78, 80, - 17, 18, 19, 20, 36, 47, 62, 78, 80, 46, - 59, 85, 46, 60, 65, 72, 85, 24, 36, 79, - 82, 46, 60, 71, 72, 85, 36, 47, 80, 34, - 88, 88, 89, 89, 89, 89, 89, 89, 36, 36, - 26, 84, 83, 84, 88, 27, 27, 89, 55, 1, - 13, 36, 84, 83, 27, 14, 87, 88, 87, 36, - 87, 87, 87, 87, 89, 27, 36, 36, 87, 36, - 87, 88, 36, 36, 36, 36, 36, 87, 39, 56, - 36, 36, 36, 84 -}; - - /* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */ -static const yytype_uint8 yyr1[] = -{ - 0, 41, 42, 42, 43, 43, 44, 44, 44, 44, - 44, 44, 44, 44, 45, 45, 45, 45, 45, 45, - 45, 45, 45, 46, 46, 46, 46, 46, 46, 47, - 47, 48, 49, 50, 51, 52, 52, 52, 52, 52, - 52, 52, 53, 53, 53, 53, 53, 53, 54, 55, - 55, 56, 56, 57, 58, 59, 60, 61, 61, 61, - 61, 61, 61, 62, 62, 62, 62, 63, 63, 64, - 65, 66, 67, 67, 67, 67, 68, 69, 70, 71, - 72, 73, 73, 73, 73, 74, 75, 76, 77, 78, - 79, 79, 79, 79, 80, 81, 81, 81, 82, 83, - 83, 84, 84, 85, 85, 85, 86, 86, 87, 87, - 88, 88, 88, 88, 88, 88, 88, 88, 88, 88, - 88, 89, 89, 90, 90 -}; - - /* YYR2[YYN] -- Number of symbols on the right hand side of rule YYN. */ -static const yytype_uint8 yyr2[] = -{ - 0, 2, 2, 1, 2, 1, 0, 2, 2, 2, - 2, 4, 4, 3, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 3, - 2, 3, 2, 3, 2, 0, 2, 2, 2, 2, - 2, 2, 3, 4, 4, 4, 4, 5, 3, 0, - 3, 0, 2, 3, 2, 1, 3, 0, 2, 2, - 2, 2, 2, 4, 3, 2, 4, 0, 2, 3, - 1, 3, 0, 2, 2, 2, 3, 3, 3, 1, - 3, 0, 2, 2, 2, 3, 3, 2, 2, 2, - 0, 2, 2, 2, 4, 0, 2, 2, 2, 0, - 2, 1, 1, 2, 2, 2, 1, 2, 0, 2, - 1, 3, 3, 3, 3, 3, 3, 3, 2, 3, - 3, 1, 1, 0, 1 -}; - - -#define yyerrok (yyerrstatus = 0) -#define yyclearin (yychar = YYEMPTY) -#define YYEMPTY (-2) -#define YYEOF 0 - -#define YYACCEPT goto yyacceptlab -#define YYABORT goto yyabortlab -#define YYERROR goto yyerrorlab - - -#define YYRECOVERING() (!!yyerrstatus) - -#define YYBACKUP(Token, Value) \ -do \ - if (yychar == YYEMPTY) \ - { \ - yychar = (Token); \ - yylval = (Value); \ - YYPOPSTACK (yylen); \ - yystate = *yyssp; \ - goto yybackup; \ - } \ - else \ - { \ - yyerror (YY_("syntax error: cannot back up")); \ - YYERROR; \ - } \ -while (0) - -/* Error token number */ -#define YYTERROR 1 -#define YYERRCODE 256 - - - -/* Enable debugging if requested. */ -#if YYDEBUG - -# ifndef YYFPRINTF -# include <stdio.h> /* INFRINGES ON USER NAME SPACE */ -# define YYFPRINTF fprintf -# endif - -# define YYDPRINTF(Args) \ -do { \ - if (yydebug) \ - YYFPRINTF Args; \ -} while (0) - -/* This macro is provided for backward compatibility. */ -#ifndef YY_LOCATION_PRINT -# define YY_LOCATION_PRINT(File, Loc) ((void) 0) -#endif - - -# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \ -do { \ - if (yydebug) \ - { \ - YYFPRINTF (stderr, "%s ", Title); \ - yy_symbol_print (stderr, \ - Type, Value); \ - YYFPRINTF (stderr, "\n"); \ - } \ -} while (0) - - -/*----------------------------------------. -| Print this symbol's value on YYOUTPUT. | -`----------------------------------------*/ - -static void -yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep) -{ - FILE *yyo = yyoutput; - YYUSE (yyo); - if (!yyvaluep) - return; -# ifdef YYPRINT - if (yytype < YYNTOKENS) - YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep); -# endif - YYUSE (yytype); -} - - -/*--------------------------------. -| Print this symbol on YYOUTPUT. | -`--------------------------------*/ - -static void -yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep) -{ - YYFPRINTF (yyoutput, "%s %s (", - yytype < YYNTOKENS ? "token" : "nterm", yytname[yytype]); - - yy_symbol_value_print (yyoutput, yytype, yyvaluep); - YYFPRINTF (yyoutput, ")"); -} - -/*------------------------------------------------------------------. -| yy_stack_print -- Print the state stack from its BOTTOM up to its | -| TOP (included). | -`------------------------------------------------------------------*/ - -static void -yy_stack_print (yytype_int16 *yybottom, yytype_int16 *yytop) -{ - YYFPRINTF (stderr, "Stack now"); - for (; yybottom <= yytop; yybottom++) - { - int yybot = *yybottom; - YYFPRINTF (stderr, " %d", yybot); - } - YYFPRINTF (stderr, "\n"); -} - -# define YY_STACK_PRINT(Bottom, Top) \ -do { \ - if (yydebug) \ - yy_stack_print ((Bottom), (Top)); \ -} while (0) - - -/*------------------------------------------------. -| Report that the YYRULE is going to be reduced. | -`------------------------------------------------*/ - -static void -yy_reduce_print (yytype_int16 *yyssp, YYSTYPE *yyvsp, int yyrule) -{ - unsigned long int yylno = yyrline[yyrule]; - int yynrhs = yyr2[yyrule]; - int yyi; - YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n", - yyrule - 1, yylno); - /* The symbols being reduced. */ - for (yyi = 0; yyi < yynrhs; yyi++) - { - YYFPRINTF (stderr, " $%d = ", yyi + 1); - yy_symbol_print (stderr, - yystos[yyssp[yyi + 1 - yynrhs]], - &(yyvsp[(yyi + 1) - (yynrhs)]) - ); - YYFPRINTF (stderr, "\n"); - } -} - -# define YY_REDUCE_PRINT(Rule) \ -do { \ - if (yydebug) \ - yy_reduce_print (yyssp, yyvsp, Rule); \ -} while (0) - -/* Nonzero means print parse trace. It is left uninitialized so that - multiple parsers can coexist. */ -int yydebug; -#else /* !YYDEBUG */ -# define YYDPRINTF(Args) -# define YY_SYMBOL_PRINT(Title, Type, Value, Location) -# define YY_STACK_PRINT(Bottom, Top) -# define YY_REDUCE_PRINT(Rule) -#endif /* !YYDEBUG */ - - -/* YYINITDEPTH -- initial size of the parser's stacks. */ -#ifndef YYINITDEPTH -# define YYINITDEPTH 200 -#endif - -/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only - if the built-in stack extension method is used). - - Do not make this value too large; the results are undefined if - YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH) - evaluated with infinite-precision integer arithmetic. */ - -#ifndef YYMAXDEPTH -# define YYMAXDEPTH 10000 -#endif - - -#if YYERROR_VERBOSE - -# ifndef yystrlen -# if defined __GLIBC__ && defined _STRING_H -# define yystrlen strlen -# else -/* Return the length of YYSTR. */ -static YYSIZE_T -yystrlen (const char *yystr) -{ - YYSIZE_T yylen; - for (yylen = 0; yystr[yylen]; yylen++) - continue; - return yylen; -} -# endif -# endif - -# ifndef yystpcpy -# if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE -# define yystpcpy stpcpy -# else -/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in - YYDEST. */ -static char * -yystpcpy (char *yydest, const char *yysrc) -{ - char *yyd = yydest; - const char *yys = yysrc; - - while ((*yyd++ = *yys++) != '\0') - continue; - - return yyd - 1; -} -# endif -# endif - -# ifndef yytnamerr -/* Copy to YYRES the contents of YYSTR after stripping away unnecessary - quotes and backslashes, so that it's suitable for yyerror. The - heuristic is that double-quoting is unnecessary unless the string - contains an apostrophe, a comma, or backslash (other than - backslash-backslash). YYSTR is taken from yytname. If YYRES is - null, do not copy; instead, return the length of what the result - would have been. */ -static YYSIZE_T -yytnamerr (char *yyres, const char *yystr) -{ - if (*yystr == '"') - { - YYSIZE_T yyn = 0; - char const *yyp = yystr; - - for (;;) - switch (*++yyp) - { - case '\'': - case ',': - goto do_not_strip_quotes; - - case '\\': - if (*++yyp != '\\') - goto do_not_strip_quotes; - /* Fall through. */ - default: - if (yyres) - yyres[yyn] = *yyp; - yyn++; - break; - - case '"': - if (yyres) - yyres[yyn] = '\0'; - return yyn; - } - do_not_strip_quotes: ; - } - - if (! yyres) - return yystrlen (yystr); - - return yystpcpy (yyres, yystr) - yyres; -} -# endif - -/* Copy into *YYMSG, which is of size *YYMSG_ALLOC, an error message - about the unexpected token YYTOKEN for the state stack whose top is - YYSSP. - - Return 0 if *YYMSG was successfully written. Return 1 if *YYMSG is - not large enough to hold the message. In that case, also set - *YYMSG_ALLOC to the required number of bytes. Return 2 if the - required number of bytes is too large to store. */ -static int -yysyntax_error (YYSIZE_T *yymsg_alloc, char **yymsg, - yytype_int16 *yyssp, int yytoken) -{ - YYSIZE_T yysize0 = yytnamerr (YY_NULLPTR, yytname[yytoken]); - YYSIZE_T yysize = yysize0; - enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 }; - /* Internationalized format string. */ - const char *yyformat = YY_NULLPTR; - /* Arguments of yyformat. */ - char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM]; - /* Number of reported tokens (one for the "unexpected", one per - "expected"). */ - int yycount = 0; - - /* There are many possibilities here to consider: - - If this state is a consistent state with a default action, then - the only way this function was invoked is if the default action - is an error action. In that case, don't check for expected - tokens because there are none. - - The only way there can be no lookahead present (in yychar) is if - this state is a consistent state with a default action. Thus, - detecting the absence of a lookahead is sufficient to determine - that there is no unexpected or expected token to report. In that - case, just report a simple "syntax error". - - Don't assume there isn't a lookahead just because this state is a - consistent state with a default action. There might have been a - previous inconsistent state, consistent state with a non-default - action, or user semantic action that manipulated yychar. - - Of course, the expected token list depends on states to have - correct lookahead information, and it depends on the parser not - to perform extra reductions after fetching a lookahead from the - scanner and before detecting a syntax error. Thus, state merging - (from LALR or IELR) and default reductions corrupt the expected - token list. However, the list is correct for canonical LR with - one exception: it will still contain any token that will not be - accepted due to an error action in a later state. - */ - if (yytoken != YYEMPTY) - { - int yyn = yypact[*yyssp]; - yyarg[yycount++] = yytname[yytoken]; - if (!yypact_value_is_default (yyn)) - { - /* Start YYX at -YYN if negative to avoid negative indexes in - YYCHECK. In other words, skip the first -YYN actions for - this state because they are default actions. */ - int yyxbegin = yyn < 0 ? -yyn : 0; - /* Stay within bounds of both yycheck and yytname. */ - int yychecklim = YYLAST - yyn + 1; - int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS; - int yyx; - - for (yyx = yyxbegin; yyx < yyxend; ++yyx) - if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR - && !yytable_value_is_error (yytable[yyx + yyn])) - { - if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM) - { - yycount = 1; - yysize = yysize0; - break; - } - yyarg[yycount++] = yytname[yyx]; - { - YYSIZE_T yysize1 = yysize + yytnamerr (YY_NULLPTR, yytname[yyx]); - if (! (yysize <= yysize1 - && yysize1 <= YYSTACK_ALLOC_MAXIMUM)) - return 2; - yysize = yysize1; - } - } - } - } - - switch (yycount) - { -# define YYCASE_(N, S) \ - case N: \ - yyformat = S; \ - break - YYCASE_(0, YY_("syntax error")); - YYCASE_(1, YY_("syntax error, unexpected %s")); - YYCASE_(2, YY_("syntax error, unexpected %s, expecting %s")); - YYCASE_(3, YY_("syntax error, unexpected %s, expecting %s or %s")); - YYCASE_(4, YY_("syntax error, unexpected %s, expecting %s or %s or %s")); - YYCASE_(5, YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s")); -# undef YYCASE_ - } - - { - YYSIZE_T yysize1 = yysize + yystrlen (yyformat); - if (! (yysize <= yysize1 && yysize1 <= YYSTACK_ALLOC_MAXIMUM)) - return 2; - yysize = yysize1; - } - - if (*yymsg_alloc < yysize) - { - *yymsg_alloc = 2 * yysize; - if (! (yysize <= *yymsg_alloc - && *yymsg_alloc <= YYSTACK_ALLOC_MAXIMUM)) - *yymsg_alloc = YYSTACK_ALLOC_MAXIMUM; - return 1; - } - - /* Avoid sprintf, as that infringes on the user's name space. - Don't have undefined behavior even if the translation - produced a string with the wrong number of "%s"s. */ - { - char *yyp = *yymsg; - int yyi = 0; - while ((*yyp = *yyformat) != '\0') - if (*yyp == '%' && yyformat[1] == 's' && yyi < yycount) - { - yyp += yytnamerr (yyp, yyarg[yyi++]); - yyformat += 2; - } - else - { - yyp++; - yyformat++; - } - } - return 0; -} -#endif /* YYERROR_VERBOSE */ - -/*-----------------------------------------------. -| Release the memory associated to this symbol. | -`-----------------------------------------------*/ - -static void -yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep) -{ - YYUSE (yyvaluep); - if (!yymsg) - yymsg = "Deleting"; - YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp); - - YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN - switch (yytype) - { - case 58: /* choice_entry */ - - { - fprintf(stderr, "%s:%d: missing end statement for this entry\n", - ((*yyvaluep).menu)->file->name, ((*yyvaluep).menu)->lineno); - if (current_menu == ((*yyvaluep).menu)) - menu_end_menu(); -} - - break; - - case 64: /* if_entry */ - - { - fprintf(stderr, "%s:%d: missing end statement for this entry\n", - ((*yyvaluep).menu)->file->name, ((*yyvaluep).menu)->lineno); - if (current_menu == ((*yyvaluep).menu)) - menu_end_menu(); -} - - break; - - case 70: /* menu_entry */ - - { - fprintf(stderr, "%s:%d: missing end statement for this entry\n", - ((*yyvaluep).menu)->file->name, ((*yyvaluep).menu)->lineno); - if (current_menu == ((*yyvaluep).menu)) - menu_end_menu(); -} - - break; - - - default: - break; - } - YY_IGNORE_MAYBE_UNINITIALIZED_END -} - - - - -/* The lookahead symbol. */ -int yychar; - -/* The semantic value of the lookahead symbol. */ -YYSTYPE yylval; -/* Number of syntax errors so far. */ -int yynerrs; - - -/*----------. -| yyparse. | -`----------*/ - -int -yyparse (void) -{ - int yystate; - /* Number of tokens to shift before error messages enabled. */ - int yyerrstatus; - - /* The stacks and their tools: - 'yyss': related to states. - 'yyvs': related to semantic values. - - Refer to the stacks through separate pointers, to allow yyoverflow - to reallocate them elsewhere. */ - - /* The state stack. */ - yytype_int16 yyssa[YYINITDEPTH]; - yytype_int16 *yyss; - yytype_int16 *yyssp; - - /* The semantic value stack. */ - YYSTYPE yyvsa[YYINITDEPTH]; - YYSTYPE *yyvs; - YYSTYPE *yyvsp; - - YYSIZE_T yystacksize; - - int yyn; - int yyresult; - /* Lookahead token as an internal (translated) token number. */ - int yytoken = 0; - /* The variables used to return semantic value and location from the - action routines. */ - YYSTYPE yyval; - -#if YYERROR_VERBOSE - /* Buffer for error messages, and its allocated size. */ - char yymsgbuf[128]; - char *yymsg = yymsgbuf; - YYSIZE_T yymsg_alloc = sizeof yymsgbuf; -#endif - -#define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N)) - - /* The number of symbols on the RHS of the reduced rule. - Keep to zero when no symbol should be popped. */ - int yylen = 0; - - yyssp = yyss = yyssa; - yyvsp = yyvs = yyvsa; - yystacksize = YYINITDEPTH; - - YYDPRINTF ((stderr, "Starting parse\n")); - - yystate = 0; - yyerrstatus = 0; - yynerrs = 0; - yychar = YYEMPTY; /* Cause a token to be read. */ - goto yysetstate; - -/*------------------------------------------------------------. -| yynewstate -- Push a new state, which is found in yystate. | -`------------------------------------------------------------*/ - yynewstate: - /* In all cases, when you get here, the value and location stacks - have just been pushed. So pushing a state here evens the stacks. */ - yyssp++; - - yysetstate: - *yyssp = yystate; - - if (yyss + yystacksize - 1 <= yyssp) - { - /* Get the current used size of the three stacks, in elements. */ - YYSIZE_T yysize = yyssp - yyss + 1; - -#ifdef yyoverflow - { - /* Give user a chance to reallocate the stack. Use copies of - these so that the &'s don't force the real ones into - memory. */ - YYSTYPE *yyvs1 = yyvs; - yytype_int16 *yyss1 = yyss; - - /* Each stack pointer address is followed by the size of the - data in use in that stack, in bytes. This used to be a - conditional around just the two extra args, but that might - be undefined if yyoverflow is a macro. */ - yyoverflow (YY_("memory exhausted"), - &yyss1, yysize * sizeof (*yyssp), - &yyvs1, yysize * sizeof (*yyvsp), - &yystacksize); - - yyss = yyss1; - yyvs = yyvs1; - } -#else /* no yyoverflow */ -# ifndef YYSTACK_RELOCATE - goto yyexhaustedlab; -# else - /* Extend the stack our own way. */ - if (YYMAXDEPTH <= yystacksize) - goto yyexhaustedlab; - yystacksize *= 2; - if (YYMAXDEPTH < yystacksize) - yystacksize = YYMAXDEPTH; - - { - yytype_int16 *yyss1 = yyss; - union yyalloc *yyptr = - (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize)); - if (! yyptr) - goto yyexhaustedlab; - YYSTACK_RELOCATE (yyss_alloc, yyss); - YYSTACK_RELOCATE (yyvs_alloc, yyvs); -# undef YYSTACK_RELOCATE - if (yyss1 != yyssa) - YYSTACK_FREE (yyss1); - } -# endif -#endif /* no yyoverflow */ - - yyssp = yyss + yysize - 1; - yyvsp = yyvs + yysize - 1; - - YYDPRINTF ((stderr, "Stack size increased to %lu\n", - (unsigned long int) yystacksize)); - - if (yyss + yystacksize - 1 <= yyssp) - YYABORT; - } - - YYDPRINTF ((stderr, "Entering state %d\n", yystate)); - - if (yystate == YYFINAL) - YYACCEPT; - - goto yybackup; - -/*-----------. -| yybackup. | -`-----------*/ -yybackup: - - /* Do appropriate processing given the current state. Read a - lookahead token if we need one and don't already have one. */ - - /* First try to decide what to do without reference to lookahead token. */ - yyn = yypact[yystate]; - if (yypact_value_is_default (yyn)) - goto yydefault; - - /* Not known => get a lookahead token if don't already have one. */ - - /* YYCHAR is either YYEMPTY or YYEOF or a valid lookahead symbol. */ - if (yychar == YYEMPTY) - { - YYDPRINTF ((stderr, "Reading a token: ")); - yychar = yylex (); - } - - if (yychar <= YYEOF) - { - yychar = yytoken = YYEOF; - YYDPRINTF ((stderr, "Now at end of input.\n")); - } - else - { - yytoken = YYTRANSLATE (yychar); - YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc); - } - - /* If the proper action on seeing token YYTOKEN is to reduce or to - detect an error, take that action. */ - yyn += yytoken; - if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken) - goto yydefault; - yyn = yytable[yyn]; - if (yyn <= 0) - { - if (yytable_value_is_error (yyn)) - goto yyerrlab; - yyn = -yyn; - goto yyreduce; - } - - /* Count tokens shifted since error; after three, turn off error - status. */ - if (yyerrstatus) - yyerrstatus--; - - /* Shift the lookahead token. */ - YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc); - - /* Discard the shifted token. */ - yychar = YYEMPTY; - - yystate = yyn; - YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN - *++yyvsp = yylval; - YY_IGNORE_MAYBE_UNINITIALIZED_END - - goto yynewstate; - - -/*-----------------------------------------------------------. -| yydefault -- do the default action for the current state. | -`-----------------------------------------------------------*/ -yydefault: - yyn = yydefact[yystate]; - if (yyn == 0) - goto yyerrlab; - goto yyreduce; - - -/*-----------------------------. -| yyreduce -- Do a reduction. | -`-----------------------------*/ -yyreduce: - /* yyn is the number of a rule to reduce with. */ - yylen = yyr2[yyn]; - - /* If YYLEN is nonzero, implement the default value of the action: - '$$ = $1'. - - Otherwise, the following line sets YYVAL to garbage. - This behavior is undocumented and Bison - users should not rely upon it. Assigning to YYVAL - unconditionally makes the parser a bit smaller, and it avoids a - GCC warning that YYVAL may be used uninitialized. */ - yyval = yyvsp[1-yylen]; - - - YY_REDUCE_PRINT (yyn); - switch (yyn) - { - case 10: - - { zconf_error("unexpected end statement"); } - - break; - - case 11: - - { zconf_error("unknown statement \"%s\"", (yyvsp[-2].string)); } - - break; - - case 12: - - { - zconf_error("unexpected option \"%s\"", kconf_id_strings + (yyvsp[-2].id)->name); -} - - break; - - case 13: - - { zconf_error("invalid statement"); } - - break; - - case 29: - - { zconf_error("unknown option \"%s\"", (yyvsp[-2].string)); } - - break; - - case 30: - - { zconf_error("invalid option"); } - - break; - - case 31: - - { - struct symbol *sym = sym_lookup((yyvsp[-1].string), 0); - sym->flags |= SYMBOL_OPTIONAL; - menu_add_entry(sym); - printd(DEBUG_PARSE, "%s:%d:config %s\n", zconf_curname(), zconf_lineno(), (yyvsp[-1].string)); -} - - break; - - case 32: - - { - menu_end_entry(); - printd(DEBUG_PARSE, "%s:%d:endconfig\n", zconf_curname(), zconf_lineno()); -} - - break; - - case 33: - - { - struct symbol *sym = sym_lookup((yyvsp[-1].string), 0); - sym->flags |= SYMBOL_OPTIONAL; - menu_add_entry(sym); - printd(DEBUG_PARSE, "%s:%d:menuconfig %s\n", zconf_curname(), zconf_lineno(), (yyvsp[-1].string)); -} - - break; - - case 34: - - { - if (current_entry->prompt) - current_entry->prompt->type = P_MENU; - else - zconfprint("warning: menuconfig statement without prompt"); - menu_end_entry(); - printd(DEBUG_PARSE, "%s:%d:endconfig\n", zconf_curname(), zconf_lineno()); -} - - break; - - case 42: - - { - menu_set_type((yyvsp[-2].id)->stype); - printd(DEBUG_PARSE, "%s:%d:type(%u)\n", - zconf_curname(), zconf_lineno(), - (yyvsp[-2].id)->stype); -} - - break; - - case 43: - - { - menu_add_prompt(P_PROMPT, (yyvsp[-2].string), (yyvsp[-1].expr)); - printd(DEBUG_PARSE, "%s:%d:prompt\n", zconf_curname(), zconf_lineno()); -} - - break; - - case 44: - - { - menu_add_expr(P_DEFAULT, (yyvsp[-2].expr), (yyvsp[-1].expr)); - if ((yyvsp[-3].id)->stype != S_UNKNOWN) - menu_set_type((yyvsp[-3].id)->stype); - printd(DEBUG_PARSE, "%s:%d:default(%u)\n", - zconf_curname(), zconf_lineno(), - (yyvsp[-3].id)->stype); -} - - break; - - case 45: - - { - menu_add_symbol(P_SELECT, sym_lookup((yyvsp[-2].string), 0), (yyvsp[-1].expr)); - printd(DEBUG_PARSE, "%s:%d:select\n", zconf_curname(), zconf_lineno()); -} - - break; - - case 46: - - { - menu_add_symbol(P_IMPLY, sym_lookup((yyvsp[-2].string), 0), (yyvsp[-1].expr)); - printd(DEBUG_PARSE, "%s:%d:imply\n", zconf_curname(), zconf_lineno()); -} - - break; - - case 47: - - { - menu_add_expr(P_RANGE, expr_alloc_comp(E_RANGE,(yyvsp[-3].symbol), (yyvsp[-2].symbol)), (yyvsp[-1].expr)); - printd(DEBUG_PARSE, "%s:%d:range\n", zconf_curname(), zconf_lineno()); -} - - break; - - case 50: - - { - const struct kconf_id *id = kconf_id_lookup((yyvsp[-1].string), strlen((yyvsp[-1].string))); - if (id && id->flags & TF_OPTION) - menu_add_option(id->token, (yyvsp[0].string)); - else - zconfprint("warning: ignoring unknown option %s", (yyvsp[-1].string)); - free((yyvsp[-1].string)); -} - - break; - - case 51: - - { (yyval.string) = NULL; } - - break; - - case 52: - - { (yyval.string) = (yyvsp[0].string); } - - break; - - case 53: - - { - struct symbol *sym = sym_lookup((yyvsp[-1].string), SYMBOL_CHOICE); - sym->flags |= SYMBOL_AUTO; - menu_add_entry(sym); - menu_add_expr(P_CHOICE, NULL, NULL); - printd(DEBUG_PARSE, "%s:%d:choice\n", zconf_curname(), zconf_lineno()); -} - - break; - - case 54: - - { - (yyval.menu) = menu_add_menu(); -} - - break; - - case 55: - - { - if (zconf_endtoken((yyvsp[0].id), T_CHOICE, T_ENDCHOICE)) { - menu_end_menu(); - printd(DEBUG_PARSE, "%s:%d:endchoice\n", zconf_curname(), zconf_lineno()); - } -} - - break; - - case 63: - - { - menu_add_prompt(P_PROMPT, (yyvsp[-2].string), (yyvsp[-1].expr)); - printd(DEBUG_PARSE, "%s:%d:prompt\n", zconf_curname(), zconf_lineno()); -} - - break; - - case 64: - - { - if ((yyvsp[-2].id)->stype == S_BOOLEAN || (yyvsp[-2].id)->stype == S_TRISTATE) { - menu_set_type((yyvsp[-2].id)->stype); - printd(DEBUG_PARSE, "%s:%d:type(%u)\n", - zconf_curname(), zconf_lineno(), - (yyvsp[-2].id)->stype); - } else - YYERROR; -} - - break; - - case 65: - - { - current_entry->sym->flags |= SYMBOL_OPTIONAL; - printd(DEBUG_PARSE, "%s:%d:optional\n", zconf_curname(), zconf_lineno()); -} - - break; - - case 66: - - { - if ((yyvsp[-3].id)->stype == S_UNKNOWN) { - menu_add_symbol(P_DEFAULT, sym_lookup((yyvsp[-2].string), 0), (yyvsp[-1].expr)); - printd(DEBUG_PARSE, "%s:%d:default\n", - zconf_curname(), zconf_lineno()); - } else - YYERROR; -} - - break; - - case 69: - - { - printd(DEBUG_PARSE, "%s:%d:if\n", zconf_curname(), zconf_lineno()); - menu_add_entry(NULL); - menu_add_dep((yyvsp[-1].expr)); - (yyval.menu) = menu_add_menu(); -} - - break; - - case 70: - - { - if (zconf_endtoken((yyvsp[0].id), T_IF, T_ENDIF)) { - menu_end_menu(); - printd(DEBUG_PARSE, "%s:%d:endif\n", zconf_curname(), zconf_lineno()); - } -} - - break; - - case 76: - - { - menu_add_prompt(P_MENU, (yyvsp[-1].string), NULL); -} - - break; - - case 77: - - { - menu_add_entry(NULL); - menu_add_prompt(P_MENU, (yyvsp[-1].string), NULL); - printd(DEBUG_PARSE, "%s:%d:menu\n", zconf_curname(), zconf_lineno()); -} - - break; - - case 78: - - { - (yyval.menu) = menu_add_menu(); -} - - break; - - case 79: - - { - if (zconf_endtoken((yyvsp[0].id), T_MENU, T_ENDMENU)) { - menu_end_menu(); - printd(DEBUG_PARSE, "%s:%d:endmenu\n", zconf_curname(), zconf_lineno()); - } -} - - break; - - case 85: - - { - printd(DEBUG_PARSE, "%s:%d:source %s\n", zconf_curname(), zconf_lineno(), (yyvsp[-1].string)); - zconf_nextfile((yyvsp[-1].string)); -} - - break; - - case 86: - - { - menu_add_entry(NULL); - menu_add_prompt(P_COMMENT, (yyvsp[-1].string), NULL); - printd(DEBUG_PARSE, "%s:%d:comment\n", zconf_curname(), zconf_lineno()); -} - - break; - - case 87: - - { - menu_end_entry(); -} - - break; - - case 88: - - { - printd(DEBUG_PARSE, "%s:%d:help\n", zconf_curname(), zconf_lineno()); - zconf_starthelp(); -} - - break; - - case 89: - - { - current_entry->help = (yyvsp[0].string); -} - - break; - - case 94: - - { - menu_add_dep((yyvsp[-1].expr)); - printd(DEBUG_PARSE, "%s:%d:depends on\n", zconf_curname(), zconf_lineno()); -} - - break; - - case 98: - - { - menu_add_visibility((yyvsp[0].expr)); -} - - break; - - case 100: - - { - menu_add_prompt(P_PROMPT, (yyvsp[-1].string), (yyvsp[0].expr)); -} - - break; - - case 103: - - { (yyval.id) = (yyvsp[-1].id); } - - break; - - case 104: - - { (yyval.id) = (yyvsp[-1].id); } - - break; - - case 105: - - { (yyval.id) = (yyvsp[-1].id); } - - break; - - case 108: - - { (yyval.expr) = NULL; } - - break; - - case 109: - - { (yyval.expr) = (yyvsp[0].expr); } - - break; - - case 110: - - { (yyval.expr) = expr_alloc_symbol((yyvsp[0].symbol)); } - - break; - - case 111: - - { (yyval.expr) = expr_alloc_comp(E_LTH, (yyvsp[-2].symbol), (yyvsp[0].symbol)); } - - break; - - case 112: - - { (yyval.expr) = expr_alloc_comp(E_LEQ, (yyvsp[-2].symbol), (yyvsp[0].symbol)); } - - break; - - case 113: - - { (yyval.expr) = expr_alloc_comp(E_GTH, (yyvsp[-2].symbol), (yyvsp[0].symbol)); } - - break; - - case 114: - - { (yyval.expr) = expr_alloc_comp(E_GEQ, (yyvsp[-2].symbol), (yyvsp[0].symbol)); } - - break; - - case 115: - - { (yyval.expr) = expr_alloc_comp(E_EQUAL, (yyvsp[-2].symbol), (yyvsp[0].symbol)); } - - break; - - case 116: - - { (yyval.expr) = expr_alloc_comp(E_UNEQUAL, (yyvsp[-2].symbol), (yyvsp[0].symbol)); } - - break; - - case 117: - - { (yyval.expr) = (yyvsp[-1].expr); } - - break; - - case 118: - - { (yyval.expr) = expr_alloc_one(E_NOT, (yyvsp[0].expr)); } - - break; - - case 119: - - { (yyval.expr) = expr_alloc_two(E_OR, (yyvsp[-2].expr), (yyvsp[0].expr)); } - - break; - - case 120: - - { (yyval.expr) = expr_alloc_two(E_AND, (yyvsp[-2].expr), (yyvsp[0].expr)); } - - break; - - case 121: - - { (yyval.symbol) = sym_lookup((yyvsp[0].string), 0); free((yyvsp[0].string)); } - - break; - - case 122: - - { (yyval.symbol) = sym_lookup((yyvsp[0].string), SYMBOL_CONST); free((yyvsp[0].string)); } - - break; - - case 123: - - { (yyval.string) = NULL; } - - break; - - - - default: break; - } - /* User semantic actions sometimes alter yychar, and that requires - that yytoken be updated with the new translation. We take the - approach of translating immediately before every use of yytoken. - One alternative is translating here after every semantic action, - but that translation would be missed if the semantic action invokes - YYABORT, YYACCEPT, or YYERROR immediately after altering yychar or - if it invokes YYBACKUP. In the case of YYABORT or YYACCEPT, an - incorrect destructor might then be invoked immediately. In the - case of YYERROR or YYBACKUP, subsequent parser actions might lead - to an incorrect destructor call or verbose syntax error message - before the lookahead is translated. */ - YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc); - - YYPOPSTACK (yylen); - yylen = 0; - YY_STACK_PRINT (yyss, yyssp); - - *++yyvsp = yyval; - - /* Now 'shift' the result of the reduction. Determine what state - that goes to, based on the state we popped back to and the rule - number reduced by. */ - - yyn = yyr1[yyn]; - - yystate = yypgoto[yyn - YYNTOKENS] + *yyssp; - if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp) - yystate = yytable[yystate]; - else - yystate = yydefgoto[yyn - YYNTOKENS]; - - goto yynewstate; - - -/*--------------------------------------. -| yyerrlab -- here on detecting error. | -`--------------------------------------*/ -yyerrlab: - /* Make sure we have latest lookahead translation. See comments at - user semantic actions for why this is necessary. */ - yytoken = yychar == YYEMPTY ? YYEMPTY : YYTRANSLATE (yychar); - - /* If not already recovering from an error, report this error. */ - if (!yyerrstatus) - { - ++yynerrs; -#if ! YYERROR_VERBOSE - yyerror (YY_("syntax error")); -#else -# define YYSYNTAX_ERROR yysyntax_error (&yymsg_alloc, &yymsg, \ - yyssp, yytoken) - { - char const *yymsgp = YY_("syntax error"); - int yysyntax_error_status; - yysyntax_error_status = YYSYNTAX_ERROR; - if (yysyntax_error_status == 0) - yymsgp = yymsg; - else if (yysyntax_error_status == 1) - { - if (yymsg != yymsgbuf) - YYSTACK_FREE (yymsg); - yymsg = (char *) YYSTACK_ALLOC (yymsg_alloc); - if (!yymsg) - { - yymsg = yymsgbuf; - yymsg_alloc = sizeof yymsgbuf; - yysyntax_error_status = 2; - } - else - { - yysyntax_error_status = YYSYNTAX_ERROR; - yymsgp = yymsg; - } - } - yyerror (yymsgp); - if (yysyntax_error_status == 2) - goto yyexhaustedlab; - } -# undef YYSYNTAX_ERROR -#endif - } - - - - if (yyerrstatus == 3) - { - /* If just tried and failed to reuse lookahead token after an - error, discard it. */ - - if (yychar <= YYEOF) - { - /* Return failure if at end of input. */ - if (yychar == YYEOF) - YYABORT; - } - else - { - yydestruct ("Error: discarding", - yytoken, &yylval); - yychar = YYEMPTY; - } - } - - /* Else will try to reuse lookahead token after shifting the error - token. */ - goto yyerrlab1; - - -/*---------------------------------------------------. -| yyerrorlab -- error raised explicitly by YYERROR. | -`---------------------------------------------------*/ -yyerrorlab: - - /* Pacify compilers like GCC when the user code never invokes - YYERROR and the label yyerrorlab therefore never appears in user - code. */ - if (/*CONSTCOND*/ 0) - goto yyerrorlab; - - /* Do not reclaim the symbols of the rule whose action triggered - this YYERROR. */ - YYPOPSTACK (yylen); - yylen = 0; - YY_STACK_PRINT (yyss, yyssp); - yystate = *yyssp; - goto yyerrlab1; - - -/*-------------------------------------------------------------. -| yyerrlab1 -- common code for both syntax error and YYERROR. | -`-------------------------------------------------------------*/ -yyerrlab1: - yyerrstatus = 3; /* Each real token shifted decrements this. */ - - for (;;) - { - yyn = yypact[yystate]; - if (!yypact_value_is_default (yyn)) - { - yyn += YYTERROR; - if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR) - { - yyn = yytable[yyn]; - if (0 < yyn) - break; - } - } - - /* Pop the current state because it cannot handle the error token. */ - if (yyssp == yyss) - YYABORT; - - - yydestruct ("Error: popping", - yystos[yystate], yyvsp); - YYPOPSTACK (1); - yystate = *yyssp; - YY_STACK_PRINT (yyss, yyssp); - } - - YY_IGNORE_MAYBE_UNINITIALIZED_BEGIN - *++yyvsp = yylval; - YY_IGNORE_MAYBE_UNINITIALIZED_END - - - /* Shift the error token. */ - YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp); - - yystate = yyn; - goto yynewstate; - - -/*-------------------------------------. -| yyacceptlab -- YYACCEPT comes here. | -`-------------------------------------*/ -yyacceptlab: - yyresult = 0; - goto yyreturn; - -/*-----------------------------------. -| yyabortlab -- YYABORT comes here. | -`-----------------------------------*/ -yyabortlab: - yyresult = 1; - goto yyreturn; - -#if !defined yyoverflow || YYERROR_VERBOSE -/*-------------------------------------------------. -| yyexhaustedlab -- memory exhaustion comes here. | -`-------------------------------------------------*/ -yyexhaustedlab: - yyerror (YY_("memory exhausted")); - yyresult = 2; - /* Fall through. */ -#endif - -yyreturn: - if (yychar != YYEMPTY) - { - /* Make sure we have latest lookahead translation. See comments at - user semantic actions for why this is necessary. */ - yytoken = YYTRANSLATE (yychar); - yydestruct ("Cleanup: discarding lookahead", - yytoken, &yylval); - } - /* Do not reclaim the symbols of the rule whose action triggered - this YYABORT or YYACCEPT. */ - YYPOPSTACK (yylen); - YY_STACK_PRINT (yyss, yyssp); - while (yyssp != yyss) - { - yydestruct ("Cleanup: popping", - yystos[*yyssp], yyvsp); - YYPOPSTACK (1); - } -#ifndef yyoverflow - if (yyss != yyssa) - YYSTACK_FREE (yyss); -#endif -#if YYERROR_VERBOSE - if (yymsg != yymsgbuf) - YYSTACK_FREE (yymsg); -#endif - return yyresult; -} - - - -void conf_parse(const char *name) -{ - struct symbol *sym; - int i; - - zconf_initscan(name); - - sym_init(); - _menu_init(); - rootmenu.prompt = menu_add_prompt(P_MENU, "Linux Kernel Configuration", NULL); - - if (getenv("ZCONF_DEBUG")) - zconfdebug = 1; - zconfparse(); - if (zconfnerrs) - exit(1); - if (!modules_sym) - modules_sym = sym_find( "n" ); - - rootmenu.prompt->text = _(rootmenu.prompt->text); - rootmenu.prompt->text = sym_expand_string_value(rootmenu.prompt->text); - - menu_finalize(&rootmenu); - for_all_symbols(i, sym) { - if (sym_check_deps(sym)) - zconfnerrs++; - } - if (zconfnerrs) - exit(1); - sym_set_change_count(1); -} - -static const char *zconf_tokenname(int token) -{ - switch (token) { - case T_MENU: return "menu"; - case T_ENDMENU: return "endmenu"; - case T_CHOICE: return "choice"; - case T_ENDCHOICE: return "endchoice"; - case T_IF: return "if"; - case T_ENDIF: return "endif"; - case T_DEPENDS: return "depends"; - case T_VISIBLE: return "visible"; - } - return "<token>"; -} - -static bool zconf_endtoken(const struct kconf_id *id, int starttoken, int endtoken) -{ - if (id->token != endtoken) { - zconf_error("unexpected '%s' within %s block", - kconf_id_strings + id->name, zconf_tokenname(starttoken)); - zconfnerrs++; - return false; - } - if (current_menu->file != current_file) { - zconf_error("'%s' in different file than '%s'", - kconf_id_strings + id->name, zconf_tokenname(starttoken)); - fprintf(stderr, "%s:%d: location of the '%s'\n", - current_menu->file->name, current_menu->lineno, - zconf_tokenname(starttoken)); - zconfnerrs++; - return false; - } - return true; -} - -static void zconfprint(const char *err, ...) -{ - va_list ap; - - fprintf(stderr, "%s:%d: ", zconf_curname(), zconf_lineno()); - va_start(ap, err); - vfprintf(stderr, err, ap); - va_end(ap); - fprintf(stderr, "\n"); -} - -static void zconf_error(const char *err, ...) -{ - va_list ap; - - zconfnerrs++; - fprintf(stderr, "%s:%d: ", zconf_curname(), zconf_lineno()); - va_start(ap, err); - vfprintf(stderr, err, ap); - va_end(ap); - fprintf(stderr, "\n"); -} - -static void zconferror(const char *err) -{ - fprintf(stderr, "%s:%d: %s\n", zconf_curname(), zconf_lineno() + 1, err); -} - -static void print_quoted_string(FILE *out, const char *str) -{ - const char *p; - int len; - - putc('"', out); - while ((p = strchr(str, '"'))) { - len = p - str; - if (len) - fprintf(out, "%.*s", len, str); - fputs("\\\"", out); - str = p + 1; - } - fputs(str, out); - putc('"', out); -} - -static void print_symbol(FILE *out, struct menu *menu) -{ - struct symbol *sym = menu->sym; - struct property *prop; - - if (sym_is_choice(sym)) - fprintf(out, "\nchoice\n"); - else - fprintf(out, "\nconfig %s\n", sym->name); - switch (sym->type) { - case S_BOOLEAN: - fputs(" boolean\n", out); - break; - case S_TRISTATE: - fputs(" tristate\n", out); - break; - case S_STRING: - fputs(" string\n", out); - break; - case S_INT: - fputs(" integer\n", out); - break; - case S_HEX: - fputs(" hex\n", out); - break; - default: - fputs(" ???\n", out); - break; - } - for (prop = sym->prop; prop; prop = prop->next) { - if (prop->menu != menu) - continue; - switch (prop->type) { - case P_PROMPT: - fputs(" prompt ", out); - print_quoted_string(out, prop->text); - if (!expr_is_yes(prop->visible.expr)) { - fputs(" if ", out); - expr_fprint(prop->visible.expr, out); - } - fputc('\n', out); - break; - case P_DEFAULT: - fputs( " default ", out); - expr_fprint(prop->expr, out); - if (!expr_is_yes(prop->visible.expr)) { - fputs(" if ", out); - expr_fprint(prop->visible.expr, out); - } - fputc('\n', out); - break; - case P_CHOICE: - fputs(" #choice value\n", out); - break; - case P_SELECT: - fputs( " select ", out); - expr_fprint(prop->expr, out); - fputc('\n', out); - break; - case P_IMPLY: - fputs( " imply ", out); - expr_fprint(prop->expr, out); - fputc('\n', out); - break; - case P_RANGE: - fputs( " range ", out); - expr_fprint(prop->expr, out); - fputc('\n', out); - break; - case P_MENU: - fputs( " menu ", out); - print_quoted_string(out, prop->text); - fputc('\n', out); - break; - default: - fprintf(out, " unknown prop %d!\n", prop->type); - break; - } - } - if (menu->help) { - int len = strlen(menu->help); - while (menu->help[--len] == '\n') - menu->help[len] = 0; - fprintf(out, " help\n%s\n", menu->help); - } -} - -void zconfdump(FILE *out) -{ - struct property *prop; - struct symbol *sym; - struct menu *menu; - - menu = rootmenu.list; - while (menu) { - if ((sym = menu->sym)) - print_symbol(out, menu); - else if ((prop = menu->prompt)) { - switch (prop->type) { - case P_COMMENT: - fputs("\ncomment ", out); - print_quoted_string(out, prop->text); - fputs("\n", out); - break; - case P_MENU: - fputs("\nmenu ", out); - print_quoted_string(out, prop->text); - fputs("\n", out); - break; - default: - ; - } - if (!expr_is_yes(prop->visible.expr)) { - fputs(" depends ", out); - expr_fprint(prop->visible.expr, out); - fputc('\n', out); - } - } - - if (menu->list) - menu = menu->list; - else if (menu->next) - menu = menu->next; - else while ((menu = menu->parent)) { - if (menu->prompt && menu->prompt->type == P_MENU) - fputs("\nendmenu\n", out); - if (menu->next) { - menu = menu->next; - break; - } - } - } -} - -#include "zconf.lex.c" -#include "util.c" -#include "confdata.c" -#include "expr.c" -#include "symbol.c" -#include "menu.c" diff --git a/scripts/kconfig/zconf.y b/scripts/kconfig/zconf.y index 001305fa080..ad6305b0f40 100644 --- a/scripts/kconfig/zconf.y +++ b/scripts/kconfig/zconf.y @@ -20,10 +20,10 @@ int cdebug = PRINTD; -extern int zconflex(void); +int yylex(void); +static void yyerror(const char *err); static void zconfprint(const char *err, ...); static void zconf_error(const char *err, ...); -static void zconferror(const char *err); static bool zconf_endtoken(const struct kconf_id *id, int starttoken, int endtoken); struct symbol *symbol_hash[SYMBOL_HASHSIZE]; @@ -85,6 +85,7 @@ static struct menu *current_menu, *current_entry; %nonassoc T_NOT %type <string> prompt +%type <symbol> nonconst_symbol %type <symbol> symbol %type <expr> expr %type <expr> if_expr @@ -101,14 +102,34 @@ static struct menu *current_menu, *current_entry; } if_entry menu_entry choice_entry %{ -/* Include zconf.hash.c here so it can see the token constants. */ -#include "zconf.hash.c" +/* Include kconf_id.c here so it can see the token constants. */ +#include "kconf_id.c" %} %% input: nl start | start; -start: mainmenu_stmt stmt_list | stmt_list; +start: mainmenu_stmt stmt_list | no_mainmenu_stmt stmt_list; + +/* mainmenu entry */ + +mainmenu_stmt: T_MAINMENU prompt nl +{ + menu_add_prompt(P_MENU, $2, NULL); +}; + +/* Default main menu, if there's no mainmenu entry */ + +no_mainmenu_stmt: /* empty */ +{ + /* + * Hack: Keep the main menu title on the heap so we can safely free it + * later regardless of whether it comes from the 'prompt' in + * mainmenu_stmt or here + */ + menu_add_prompt(P_MENU, xstrdup("Linux Kernel Configuration"), NULL); +}; + stmt_list: /* empty */ @@ -119,7 +140,7 @@ stmt_list: | stmt_list T_WORD error T_EOL { zconf_error("unknown statement \"%s\"", $2); } | stmt_list option_name error T_EOL { - zconf_error("unexpected option \"%s\"", kconf_id_strings + $2->name); + zconf_error("unexpected option \"%s\"", $2->name); } | stmt_list error T_EOL { zconf_error("invalid statement"); } ; @@ -145,26 +166,23 @@ option_error: /* config/menuconfig entry */ -config_entry_start: T_CONFIG T_WORD T_EOL +config_entry_start: T_CONFIG nonconst_symbol T_EOL { - struct symbol *sym = sym_lookup($2, 0); - sym->flags |= SYMBOL_OPTIONAL; - menu_add_entry(sym); - printd(DEBUG_PARSE, "%s:%d:config %s\n", zconf_curname(), zconf_lineno(), $2); + $2->flags |= SYMBOL_OPTIONAL; + menu_add_entry($2); + printd(DEBUG_PARSE, "%s:%d:config %s\n", zconf_curname(), zconf_lineno(), $2->name); }; config_stmt: config_entry_start config_option_list { - menu_end_entry(); printd(DEBUG_PARSE, "%s:%d:endconfig\n", zconf_curname(), zconf_lineno()); }; -menuconfig_entry_start: T_MENUCONFIG T_WORD T_EOL +menuconfig_entry_start: T_MENUCONFIG nonconst_symbol T_EOL { - struct symbol *sym = sym_lookup($2, 0); - sym->flags |= SYMBOL_OPTIONAL; - menu_add_entry(sym); - printd(DEBUG_PARSE, "%s:%d:menuconfig %s\n", zconf_curname(), zconf_lineno(), $2); + $2->flags |= SYMBOL_OPTIONAL; + menu_add_entry($2); + printd(DEBUG_PARSE, "%s:%d:menuconfig %s\n", zconf_curname(), zconf_lineno(), $2->name); }; menuconfig_stmt: menuconfig_entry_start config_option_list @@ -173,7 +191,6 @@ menuconfig_stmt: menuconfig_entry_start config_option_list current_entry->prompt->type = P_MENU; else zconfprint("warning: menuconfig statement without prompt"); - menu_end_entry(); printd(DEBUG_PARSE, "%s:%d:endconfig\n", zconf_curname(), zconf_lineno()); }; @@ -211,15 +228,15 @@ config_option: T_DEFAULT expr if_expr T_EOL $1->stype); }; -config_option: T_SELECT T_WORD if_expr T_EOL +config_option: T_SELECT nonconst_symbol if_expr T_EOL { - menu_add_symbol(P_SELECT, sym_lookup($2, 0), $3); + menu_add_symbol(P_SELECT, $2, $3); printd(DEBUG_PARSE, "%s:%d:select\n", zconf_curname(), zconf_lineno()); }; -config_option: T_IMPLY T_WORD if_expr T_EOL +config_option: T_IMPLY nonconst_symbol if_expr T_EOL { - menu_add_symbol(P_IMPLY, sym_lookup($2, 0), $3); + menu_add_symbol(P_IMPLY, $2, $3); printd(DEBUG_PARSE, "%s:%d:imply\n", zconf_curname(), zconf_lineno()); }; @@ -237,8 +254,10 @@ symbol_option_list: | symbol_option_list T_WORD symbol_option_arg { const struct kconf_id *id = kconf_id_lookup($2, strlen($2)); - if (id && id->flags & TF_OPTION) + if (id && id->flags & TF_OPTION) { menu_add_option(id->token, $3); + free($3); + } else zconfprint("warning: ignoring unknown option %s", $2); free($2); @@ -257,6 +276,7 @@ choice: T_CHOICE word_opt T_EOL sym->flags |= SYMBOL_AUTO; menu_add_entry(sym); menu_add_expr(P_CHOICE, NULL, NULL); + free($2); printd(DEBUG_PARSE, "%s:%d:choice\n", zconf_curname(), zconf_lineno()); }; @@ -308,10 +328,10 @@ choice_option: T_OPTIONAL T_EOL printd(DEBUG_PARSE, "%s:%d:optional\n", zconf_curname(), zconf_lineno()); }; -choice_option: T_DEFAULT T_WORD if_expr T_EOL +choice_option: T_DEFAULT nonconst_symbol if_expr T_EOL { if ($1->stype == S_UNKNOWN) { - menu_add_symbol(P_DEFAULT, sym_lookup($2, 0), $3); + menu_add_symbol(P_DEFAULT, $2, $3); printd(DEBUG_PARSE, "%s:%d:default\n", zconf_curname(), zconf_lineno()); } else @@ -351,13 +371,6 @@ if_block: | if_block choice_stmt ; -/* mainmenu entry */ - -mainmenu_stmt: T_MAINMENU prompt nl -{ - menu_add_prompt(P_MENU, $2, NULL); -}; - /* menu entry */ menu: T_MENU prompt T_EOL @@ -394,6 +407,7 @@ source_stmt: T_SOURCE prompt T_EOL { printd(DEBUG_PARSE, "%s:%d:source %s\n", zconf_curname(), zconf_lineno(), $2); zconf_nextfile($2); + free($2); }; /* comment entry */ @@ -406,9 +420,7 @@ comment: T_COMMENT prompt T_EOL }; comment_stmt: comment depends_list -{ - menu_end_entry(); -}; +; /* help option */ @@ -420,6 +432,17 @@ help_start: T_HELP T_EOL help: help_start T_HELPTEXT { + if (current_entry->help) { + free(current_entry->help); + zconfprint("warning: '%s' defined with more than one help text -- only the last one will be used", + current_entry->sym->name ?: "<choice>"); + } + + /* Is the help text empty or all whitespace? */ + if ($2[strspn($2, " \f\n\r\t\v")] == '\0') + zconfprint("warning: '%s' defined with blank help text", + current_entry->sym->name ?: "<choice>"); + current_entry->help = $2; }; @@ -491,7 +514,10 @@ expr: symbol { $$ = expr_alloc_symbol($1); } | expr T_AND expr { $$ = expr_alloc_two(E_AND, $1, $3); } ; -symbol: T_WORD { $$ = sym_lookup($1, 0); free($1); } +/* For symbol definitions, selects, etc., where quotes are not accepted */ +nonconst_symbol: T_WORD { $$ = sym_lookup($1, 0); free($1); }; + +symbol: nonconst_symbol | T_WORD_QUOTE { $$ = sym_lookup($1, SYMBOL_CONST); free($1); } ; @@ -502,6 +528,7 @@ word_opt: /* empty */ { $$ = NULL; } void conf_parse(const char *name) { + const char *tmp; struct symbol *sym; int i; @@ -509,25 +536,26 @@ void conf_parse(const char *name) sym_init(); _menu_init(); - rootmenu.prompt = menu_add_prompt(P_MENU, "Linux Kernel Configuration", NULL); if (getenv("ZCONF_DEBUG")) - zconfdebug = 1; - zconfparse(); - if (zconfnerrs) + yydebug = 1; + yyparse(); + if (yynerrs) exit(1); if (!modules_sym) modules_sym = sym_find( "n" ); + tmp = rootmenu.prompt->text; rootmenu.prompt->text = _(rootmenu.prompt->text); rootmenu.prompt->text = sym_expand_string_value(rootmenu.prompt->text); + free((char*)tmp); menu_finalize(&rootmenu); for_all_symbols(i, sym) { if (sym_check_deps(sym)) - zconfnerrs++; + yynerrs++; } - if (zconfnerrs) + if (yynerrs) exit(1); sym_set_change_count(1); } @@ -551,17 +579,17 @@ static bool zconf_endtoken(const struct kconf_id *id, int starttoken, int endtok { if (id->token != endtoken) { zconf_error("unexpected '%s' within %s block", - kconf_id_strings + id->name, zconf_tokenname(starttoken)); - zconfnerrs++; + id->name, zconf_tokenname(starttoken)); + yynerrs++; return false; } if (current_menu->file != current_file) { zconf_error("'%s' in different file than '%s'", - kconf_id_strings + id->name, zconf_tokenname(starttoken)); + id->name, zconf_tokenname(starttoken)); fprintf(stderr, "%s:%d: location of the '%s'\n", current_menu->file->name, current_menu->lineno, zconf_tokenname(starttoken)); - zconfnerrs++; + yynerrs++; return false; } return true; @@ -582,7 +610,7 @@ static void zconf_error(const char *err, ...) { va_list ap; - zconfnerrs++; + yynerrs++; fprintf(stderr, "%s:%d: ", zconf_curname(), zconf_lineno()); va_start(ap, err); vfprintf(stderr, err, ap); @@ -590,7 +618,7 @@ static void zconf_error(const char *err, ...) fprintf(stderr, "\n"); } -static void zconferror(const char *err) +static void yyerror(const char *err) { fprintf(stderr, "%s:%d: %s\n", zconf_curname(), zconf_lineno() + 1, err); } @@ -623,7 +651,7 @@ static void print_symbol(FILE *out, struct menu *menu) fprintf(out, "\nconfig %s\n", sym->name); switch (sym->type) { case S_BOOLEAN: - fputs(" boolean\n", out); + fputs(" bool\n", out); break; case S_TRISTATE: fputs(" tristate\n", out); diff --git a/scripts/mailmapper b/scripts/mailmapper index f73f3dc1787..2e2d7faff57 100755 --- a/scripts/mailmapper +++ b/scripts/mailmapper @@ -1,5 +1,5 @@ -# SPDX-License-Identifier: GPL-2.0+ #!/usr/bin/env python2 +# SPDX-License-Identifier: GPL-2.0+ # # Copyright (C) 2014, Masahiro Yamada <yamada.m@jp.panasonic.com> diff --git a/snapshot.commit b/snapshot.commit deleted file mode 100644 index 8d263096dd0..00000000000 --- a/snapshot.commit +++ /dev/null @@ -1 +0,0 @@ -$Format:%H %cD$ diff --git a/test/dm/pmic.c b/test/dm/pmic.c index b2061178fca..b582329a9c5 100644 --- a/test/dm/pmic.c +++ b/test/dm/pmic.c @@ -19,11 +19,12 @@ #include <power/pmic.h> #include <power/sandbox_pmic.h> #include <test/ut.h> +#include <fsl_pmic.h> /* Test PMIC get method */ -static int dm_test_power_pmic_get(struct unit_test_state *uts) + +static inline int power_pmic_get(struct unit_test_state *uts, char *name) { - const char *name = "sandbox_pmic"; struct udevice *dev; ut_assertok(pmic_get(name, &dev)); @@ -34,8 +35,26 @@ static int dm_test_power_pmic_get(struct unit_test_state *uts) return 0; } + +/* Test PMIC get method */ +static int dm_test_power_pmic_get(struct unit_test_state *uts) +{ + power_pmic_get(uts, "sandbox_pmic"); + + return 0; +} DM_TEST(dm_test_power_pmic_get, DM_TESTF_SCAN_FDT); +/* PMIC get method - MC34708 - for 3 bytes transmission */ +static int dm_test_power_pmic_mc34708_get(struct unit_test_state *uts) +{ + power_pmic_get(uts, "pmic@41"); + + return 0; +} + +DM_TEST(dm_test_power_pmic_mc34708_get, DM_TESTF_SCAN_FDT); + /* Test PMIC I/O */ static int dm_test_power_pmic_io(struct unit_test_state *uts) { @@ -64,3 +83,48 @@ static int dm_test_power_pmic_io(struct unit_test_state *uts) return 0; } DM_TEST(dm_test_power_pmic_io, DM_TESTF_SCAN_FDT); + +#define MC34708_PMIC_REG_COUNT 64 +#define MC34708_PMIC_TEST_VAL 0x125534 +static int dm_test_power_pmic_mc34708_regs_check(struct unit_test_state *uts) +{ + struct udevice *dev; + int reg_count; + + ut_assertok(pmic_get("pmic@41", &dev)); + + /* Check number of PMIC registers */ + reg_count = pmic_reg_count(dev); + ut_asserteq(reg_count, MC34708_PMIC_REG_COUNT); + + return 0; +} + +DM_TEST(dm_test_power_pmic_mc34708_regs_check, DM_TESTF_SCAN_FDT); + +static int dm_test_power_pmic_mc34708_rw_val(struct unit_test_state *uts) +{ + struct udevice *dev; + int val; + + ut_assertok(pmic_get("pmic@41", &dev)); + + /* Check if single 3 byte read is successful */ + val = pmic_reg_read(dev, REG_POWER_CTL2); + ut_asserteq(val, 0x422100); + + /* Check if RW works */ + val = 0; + ut_assertok(pmic_reg_write(dev, REG_RTC_TIME, val)); + ut_assertok(pmic_reg_write(dev, REG_RTC_TIME, MC34708_PMIC_TEST_VAL)); + val = pmic_reg_read(dev, REG_RTC_TIME); + ut_asserteq(val, MC34708_PMIC_TEST_VAL); + + pmic_clrsetbits(dev, REG_POWER_CTL2, 0x3 << 8, 1 << 9); + val = pmic_reg_read(dev, REG_POWER_CTL2); + ut_asserteq(val, (0x422100 & ~(0x3 << 8)) | (1 << 9)); + + return 0; +} + +DM_TEST(dm_test_power_pmic_mc34708_rw_val, DM_TESTF_SCAN_FDT); diff --git a/test/dm/test-fdt.c b/test/dm/test-fdt.c index 8196844e89a..8b72fe42edc 100644 --- a/test/dm/test-fdt.c +++ b/test/dm/test-fdt.c @@ -425,7 +425,7 @@ static const struct udevice_id fdt_dummy_ids[] = { }; UCLASS_DRIVER(fdt_dummy) = { - .name = "fdt_dummy", + .name = "fdt-dummy", .id = UCLASS_TEST_DUMMY, .flags = DM_UC_FLAG_SEQ_ALIAS, }; @@ -461,3 +461,45 @@ static int dm_test_fdt_translation(struct unit_test_state *uts) return 0; } DM_TEST(dm_test_fdt_translation, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); + +/* Test devfdt_remap_addr_index() */ +static int dm_test_fdt_remap_addr_flat(struct unit_test_state *uts) +{ + struct udevice *dev; + fdt_addr_t addr; + void *paddr; + + ut_assertok(uclass_find_device_by_seq(UCLASS_TEST_DUMMY, 0, true, &dev)); + + addr = devfdt_get_addr(dev); + ut_asserteq(0x8000, addr); + + paddr = map_physmem(addr, 0, MAP_NOCACHE); + ut_assertnonnull(paddr); + ut_asserteq_ptr(paddr, devfdt_remap_addr(dev)); + + return 0; +} +DM_TEST(dm_test_fdt_remap_addr_flat, + DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT | DM_TESTF_FLAT_TREE); + +/* Test dev_remap_addr_index() */ +static int dm_test_fdt_remap_addr_live(struct unit_test_state *uts) +{ + struct udevice *dev; + fdt_addr_t addr; + void *paddr; + + ut_assertok(uclass_find_device_by_seq(UCLASS_TEST_DUMMY, 0, true, &dev)); + + addr = dev_read_addr(dev); + ut_asserteq(0x8000, addr); + + paddr = map_physmem(addr, 0, MAP_NOCACHE); + ut_assertnonnull(paddr); + ut_asserteq_ptr(paddr, dev_remap_addr(dev)); + + return 0; +} +DM_TEST(dm_test_fdt_remap_addr_live, + DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); diff --git a/test/fs/fs-test.sh b/test/fs/fs-test.sh index b6b9461a107..2e8d5ee4df9 100755 --- a/test/fs/fs-test.sh +++ b/test/fs/fs-test.sh @@ -223,6 +223,8 @@ setenv bind 'if test "\$sb" != sb; then sb bind 0 "$1"; fi' run bind # Test Case 1 - ls ${PREFIX}ls host${SUFFIX} $6 +# In addition, test with a nonexistent directory to see if we crash. +${PREFIX}ls host${SUFFIX} invalid_d # # We want ${PREFIX}size host 0:0 $3 for host commands and # sb size hostfs - $3 for hostfs commands. diff --git a/test/py/tests/test_log.py b/test/py/tests/test_log.py index d1c2a36d8f2..605275b0399 100644 --- a/test/py/tests/test_log.py +++ b/test/py/tests/test_log.py @@ -12,7 +12,7 @@ import pytest LOGL_FIRST, LOGL_WARNING, LOGL_INFO = (0, 4, 6) -@pytest.mark.buildconfigspec('log') +@pytest.mark.buildconfigspec('cmd_log') def test_log(u_boot_console): """Test that U-Boot logging works correctly.""" def check_log_entries(lines, mask, max_level=LOGL_INFO): @@ -98,7 +98,7 @@ def test_log(u_boot_console): test8() test9() -@pytest.mark.buildconfigspec('log') +@pytest.mark.buildconfigspec('cmd_log') def test_log_format(u_boot_console): """Test the 'log format' and 'log rec' commands""" def run_with_format(fmt, expected_output): diff --git a/test/py/tests/test_tpm2.py b/test/py/tests/test_tpm2.py new file mode 100644 index 00000000000..01ffb3178db --- /dev/null +++ b/test/py/tests/test_tpm2.py @@ -0,0 +1,233 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (c) 2018, Bootlin +# Author: Miquel Raynal <miquel.raynal@bootlin.com> + +import os.path +import pytest +import u_boot_utils +import re +import time + +""" +Test the TPMv2.x related commands. You must have a working hardware setup in +order to do these tests. + +Notes: +* These tests will prove the password mechanism. The TPM chip must be cleared of +any password. +* Commands like pcr_setauthpolicy and pcr_resetauthpolicy are not implemented +here because they would fail the tests in most cases (TPMs do not implement them +and return an error). +""" + +updates = 0 + +def force_init(u_boot_console, force=False): + """When a test fails, U-Boot is reset. Because TPM stack must be initialized + after each reboot, we must ensure these lines are always executed before + trying any command or they will fail with no reason. Executing 'tpm init' + twice will spawn an error used to detect that the TPM was not reset and no + initialization code should be run. + """ + output = u_boot_console.run_command('tpm init') + if force or not 'Error' in output: + u_boot_console.run_command('echo --- start of init ---') + u_boot_console.run_command('tpm startup TPM2_SU_CLEAR') + u_boot_console.run_command('tpm self_test full') + u_boot_console.run_command('tpm clear TPM2_RH_LOCKOUT') + output = u_boot_console.run_command('echo $?') + if not output.endswith('0'): + u_boot_console.run_command('tpm clear TPM2_RH_PLATFORM') + u_boot_console.run_command('echo --- end of init ---') + +@pytest.mark.buildconfigspec('cmd_tpm_v2') +def test_tpm2_init(u_boot_console): + """Init the software stack to use TPMv2 commands.""" + + u_boot_console.run_command('tpm init') + output = u_boot_console.run_command('echo $?') + assert output.endswith('0') + +@pytest.mark.buildconfigspec('cmd_tpm_v2') +def test_tpm2_startup(u_boot_console): + """Execute a TPM2_Startup command. + + Initiate the TPM internal state machine. + """ + + u_boot_console.run_command('tpm startup TPM2_SU_CLEAR') + output = u_boot_console.run_command('echo $?') + assert output.endswith('0') + +@pytest.mark.buildconfigspec('cmd_tpm_v2') +def test_tpm2_self_test_full(u_boot_console): + """Execute a TPM2_SelfTest (full) command. + + Ask the TPM to perform all self tests to also enable full capabilities. + """ + + u_boot_console.run_command('tpm self_test full') + output = u_boot_console.run_command('echo $?') + assert output.endswith('0') + +@pytest.mark.buildconfigspec('cmd_tpm_v2') +def test_tpm2_continue_self_test(u_boot_console): + """Execute a TPM2_SelfTest (continued) command. + + Ask the TPM to finish its self tests (alternative to the full test) in order + to enter a fully operational state. + """ + + u_boot_console.run_command('tpm self_test continue') + output = u_boot_console.run_command('echo $?') + assert output.endswith('0') + +@pytest.mark.buildconfigspec('cmd_tpm_v2') +def test_tpm2_clear(u_boot_console): + """Execute a TPM2_Clear command. + + Ask the TPM to reset entirely its internal state (including internal + configuration, passwords, counters and DAM parameters). This is half of the + TAKE_OWNERSHIP command from TPMv1. + + Use the LOCKOUT hierarchy for this. The LOCKOUT/PLATFORM hierarchies must + not have a password set, otherwise this test will fail. ENDORSEMENT and + PLATFORM hierarchies are also available. + """ + + u_boot_console.run_command('tpm clear TPM2_RH_LOCKOUT') + output = u_boot_console.run_command('echo $?') + assert output.endswith('0') + + u_boot_console.run_command('tpm clear TPM2_RH_PLATFORM') + output = u_boot_console.run_command('echo $?') + assert output.endswith('0') + +@pytest.mark.buildconfigspec('cmd_tpm_v2') +def test_tpm2_change_auth(u_boot_console): + """Execute a TPM2_HierarchyChangeAuth command. + + Ask the TPM to change the owner, ie. set a new password: 'unicorn' + + Use the LOCKOUT hierarchy for this. ENDORSEMENT and PLATFORM hierarchies are + also available. + """ + + force_init(u_boot_console) + + u_boot_console.run_command('tpm change_auth TPM2_RH_LOCKOUT unicorn') + output = u_boot_console.run_command('echo $?') + assert output.endswith('0') + + u_boot_console.run_command('tpm clear TPM2_RH_LOCKOUT unicorn') + output = u_boot_console.run_command('echo $?') + u_boot_console.run_command('tpm clear TPM2_RH_PLATFORM') + assert output.endswith('0') + +@pytest.mark.buildconfigspec('cmd_tpm_v2') +def test_tpm2_get_capability(u_boot_console): + """Execute a TPM_GetCapability command. + + Display one capability. In our test case, let's display the default DAM + lockout counter that should be 0 since the CLEAR: + - TPM_CAP_TPM_PROPERTIES = 0x6 + - TPM_PT_LOCKOUT_COUNTER (1st parameter) = PTR_VAR + 14 + + There is no expected default values because it would depend on the chip + used. We can still save them in order to check they have changed later. + """ + + force_init(u_boot_console) + ram = u_boot_utils.find_ram_base(u_boot_console) + + read_cap = u_boot_console.run_command('tpm get_capability 0x6 0x20e 0x200 1') #0x%x 1' % ram) + output = u_boot_console.run_command('echo $?') + assert output.endswith('0') + assert 'Property 0x0000020e: 0x00000000' in read_cap + +@pytest.mark.buildconfigspec('cmd_tpm_v2') +def test_tpm2_dam_parameters(u_boot_console): + """Execute a TPM2_DictionaryAttackParameters command. + + Change Dictionary Attack Mitigation (DAM) parameters. Ask the TPM to change: + - Max number of failed authentication before lockout: 3 + - Time before the failure counter is automatically decremented: 10 sec + - Time after a lockout failure before it can be attempted again: 0 sec + + For an unknown reason, the DAM parameters must be changed before changing + the authentication, otherwise the lockout will be engaged after the first + failed authentication attempt. + """ + + force_init(u_boot_console) + ram = u_boot_utils.find_ram_base(u_boot_console) + + # Set the DAM parameters to known values + u_boot_console.run_command('tpm dam_parameters 3 10 0') + output = u_boot_console.run_command('echo $?') + assert output.endswith('0') + + # Check the values have been saved + read_cap = u_boot_console.run_command('tpm get_capability 0x6 0x20f 0x%x 3' % ram) + output = u_boot_console.run_command('echo $?') + assert output.endswith('0') + assert 'Property 0x0000020f: 0x00000003' in read_cap + assert 'Property 0x00000210: 0x0000000a' in read_cap + assert 'Property 0x00000211: 0x00000000' in read_cap + +@pytest.mark.buildconfigspec('cmd_tpm_v2') +def test_tpm2_pcr_read(u_boot_console): + """Execute a TPM2_PCR_Read command. + + Perform a PCR read of the 0th PCR. Must be zero. + """ + + force_init(u_boot_console) + ram = u_boot_utils.find_ram_base(u_boot_console) + 1024 + + read_pcr = u_boot_console.run_command('tpm pcr_read 0 0x%x' % ram) + output = u_boot_console.run_command('echo $?') + assert output.endswith('0') + + # Save the number of PCR updates + str = re.findall(r'\d+ known updates', read_pcr)[0] + global updates + updates = int(re.findall(r'\d+', str)[0]) + + # Check the output value + assert 'PCR #0 content' in read_pcr + assert '00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00' in read_pcr + +@pytest.mark.buildconfigspec('cmd_tpm_v2') +def test_tpm2_pcr_extend(u_boot_console): + """Execute a TPM2_PCR_Extend command. + + Perform a PCR extension with a known hash in memory (zeroed since the board + must have been rebooted). + + No authentication mechanism is used here, not protecting against packet + replay, yet. + """ + + force_init(u_boot_console) + ram = u_boot_utils.find_ram_base(u_boot_console) + 1024 + + u_boot_console.run_command('tpm pcr_extend 0 0x%x' % ram) + output = u_boot_console.run_command('echo $?') + assert output.endswith('0') + + read_pcr = u_boot_console.run_command('tpm pcr_read 0 0x%x' % ram) + output = u_boot_console.run_command('echo $?') + assert output.endswith('0') + assert 'f5 a5 fd 42 d1 6a 20 30 27 98 ef 6e d3 09 97 9b' in read_pcr + assert '43 00 3d 23 20 d9 f0 e8 ea 98 31 a9 27 59 fb 4b' in read_pcr + + str = re.findall(r'\d+ known updates', read_pcr)[0] + new_updates = int(re.findall(r'\d+', str)[0]) + assert (updates + 1) == new_updates + +@pytest.mark.buildconfigspec('cmd_tpm_v2') +def test_tpm2_cleanup(u_boot_console): + """Ensure the TPM is cleared from password or test related configuration.""" + + force_init(u_boot_console, True) diff --git a/tools/buildman/builderthread.py b/tools/buildman/builderthread.py index fa9dec043a3..0efe80d9457 100644 --- a/tools/buildman/builderthread.py +++ b/tools/buildman/builderthread.py @@ -6,6 +6,7 @@ import errno import glob import os import shutil +import sys import threading import command @@ -26,6 +27,9 @@ def Mkdir(dirname, parents = False): os.mkdir(dirname) except OSError as err: if err.errno == errno.EEXIST: + if os.path.realpath('.') == os.path.realpath(dirname): + print "Cannot create the current working directory '%s'!" % dirname + sys.exit(1) pass else: raise diff --git a/tools/buildman/control.py b/tools/buildman/control.py index c14b87842da..4ac4386db62 100644 --- a/tools/buildman/control.py +++ b/tools/buildman/control.py @@ -80,6 +80,28 @@ def ShowActions(series, why_selected, boards_selected, builder, options): print ('Total boards to build for each commit: %d\n' % len(why_selected['all'])) +def CheckOutputDir(output_dir): + """Make sure that the output directory is not within the current directory + + If we try to use an output directory which is within the current directory + (which is assumed to hold the U-Boot source) we may end up deleting the + U-Boot source code. Detect this and print an error in this case. + + Args: + output_dir: Output directory path to check + """ + path = os.path.realpath(output_dir) + cwd_path = os.path.realpath('.') + while True: + if os.path.realpath(path) == cwd_path: + Print("Cannot use output directory '%s' since it is within the current directtory '%s'" % + (path, cwd_path)) + sys.exit(1) + parent = os.path.dirname(path) + if parent == path: + break + path = parent + def DoBuildman(options, args, toolchains=None, make_func=None, boards=None, clean_dir=False): """The main control code for buildman @@ -251,9 +273,9 @@ def DoBuildman(options, args, toolchains=None, make_func=None, boards=None, # output directory itself rather than any subdirectory. if not options.no_subdirs: output_dir = os.path.join(options.output_dir, dirname) - if (clean_dir and output_dir != options.output_dir and - os.path.exists(output_dir)): - shutil.rmtree(output_dir) + if clean_dir and os.path.exists(output_dir): + shutil.rmtree(output_dir) + CheckOutputDir(output_dir) builder = Builder(toolchains, output_dir, options.git_dir, options.threads, options.jobs, gnu_make=gnu_make, checkout=True, show_unknown=options.show_unknown, step=options.step, diff --git a/tools/buildman/func_test.py b/tools/buildman/func_test.py index 8d96c1a94da..9206fb299d4 100644 --- a/tools/buildman/func_test.py +++ b/tools/buildman/func_test.py @@ -519,3 +519,12 @@ class TestFunctional(unittest.TestCase): self._RunControl('-b', self._test_branch, clean_dir=False) self.assertEqual(self._builder.count, self._total_builds) self.assertEqual(self._builder.fail, 0) + + def testBadOutputDir(self): + """Test building with an output dir the same as out current dir""" + self._test_branch = '/__dev/__testbranch' + with self.assertRaises(SystemExit): + self._RunControl('-b', self._test_branch, '-o', os.getcwd()) + with self.assertRaises(SystemExit): + self._RunControl('-b', self._test_branch, '-o', + os.path.join(os.getcwd(), 'test')) diff --git a/tools/buildman/toolchain.py b/tools/buildman/toolchain.py index fb3157b2ea8..4b35f400e97 100644 --- a/tools/buildman/toolchain.py +++ b/tools/buildman/toolchain.py @@ -32,7 +32,7 @@ class MyHTMLParser(HTMLParser): HTMLParser.__init__(self) self.arch_link = None self.links = [] - self._match = '_%s-' % arch + self.re_arch = re.compile('[-_]%s-' % arch) def handle_starttag(self, tag, attrs): if tag == 'a': @@ -40,7 +40,7 @@ class MyHTMLParser(HTMLParser): if tag == 'href': if value and value.endswith('.xz'): self.links.append(value) - if self._match in value: + if self.re_arch.search(value): self.arch_link = value @@ -430,7 +430,7 @@ class Toolchains: """ arch = command.OutputOneLine('uname', '-m') base = 'https://www.kernel.org/pub/tools/crosstool/files/bin' - versions = ['4.9.0', '4.6.3', '4.6.2', '4.5.1', '4.2.4'] + versions = ['7.3.0', '6.4.0', '4.9.4'] links = [] for version in versions: url = '%s/%s/%s/' % (base, arch, version) diff --git a/tools/libfdt/fdt_rw.c b/tools/libfdt/fdt_rw.c index e475084faec..68fc7c8c887 100644 --- a/tools/libfdt/fdt_rw.c +++ b/tools/libfdt/fdt_rw.c @@ -25,7 +25,7 @@ int fdt_remove_unused_strings(const void *old, void *new) new_prop = (struct fdt_property *)(unsigned long) fdt_get_property_by_offset(new, offset, NULL); str = fdt_string(old, fdt32_to_cpu(old_prop->nameoff)); - ret = _fdt_find_add_string(new, str); + ret = fdt_find_add_string_(new, str); if (ret < 0) return ret; new_prop->nameoff = cpu_to_fdt32(ret); diff --git a/tools/logos/u-boot_logo.bmp b/tools/logos/u-boot_logo.bmp Binary files differnew file mode 100644 index 00000000000..40245dd40db --- /dev/null +++ b/tools/logos/u-boot_logo.bmp diff --git a/tools/logos/u-boot_logo.svg b/tools/logos/u-boot_logo.svg new file mode 100644 index 00000000000..e45ef2ef773 --- /dev/null +++ b/tools/logos/u-boot_logo.svg @@ -0,0 +1,248 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<!-- SPDX-License-Identifier: CC-BY-SA-4.0 --> + +<!-- Copyright (c) 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