diff options
| -rw-r--r-- | arch/x86/dts/bayleybay.dts | 1 | ||||
| -rw-r--r-- | arch/x86/dts/chromebook_link.dts | 1 | ||||
| -rw-r--r-- | arch/x86/dts/chromebook_samus.dts | 1 | ||||
| -rw-r--r-- | arch/x86/dts/chromebox_panther.dts | 1 | ||||
| -rw-r--r-- | arch/x86/dts/coreboot_fb.dtsi | 5 | ||||
| -rw-r--r-- | arch/x86/dts/minnowmax.dts | 1 | ||||
| -rw-r--r-- | doc/README.x86 | 7 |
7 files changed, 0 insertions, 17 deletions
diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts index 9683c525a7f..291dc07ff60 100644 --- a/arch/x86/dts/bayleybay.dts +++ b/arch/x86/dts/bayleybay.dts @@ -15,7 +15,6 @@ /include/ "reset.dtsi" /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" -/include/ "coreboot_fb.dtsi" / { model = "Intel Bayley Bay"; diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts index 115a088a7af..f9f09797302 100644 --- a/arch/x86/dts/chromebook_link.dts +++ b/arch/x86/dts/chromebook_link.dts @@ -8,7 +8,6 @@ /include/ "reset.dtsi" /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" -/include/ "coreboot_fb.dtsi" / { model = "Google Link"; diff --git a/arch/x86/dts/chromebook_samus.dts b/arch/x86/dts/chromebook_samus.dts index 9c48c9a3fa7..b58936b4ac9 100644 --- a/arch/x86/dts/chromebook_samus.dts +++ b/arch/x86/dts/chromebook_samus.dts @@ -8,7 +8,6 @@ /include/ "reset.dtsi" /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" -/include/ "coreboot_fb.dtsi" / { model = "Google Samus"; diff --git a/arch/x86/dts/chromebox_panther.dts b/arch/x86/dts/chromebox_panther.dts index a72a85ef9c4..f56e482944b 100644 --- a/arch/x86/dts/chromebox_panther.dts +++ b/arch/x86/dts/chromebox_panther.dts @@ -5,7 +5,6 @@ /include/ "reset.dtsi" /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" -/include/ "coreboot_fb.dtsi" / { model = "Google Panther"; diff --git a/arch/x86/dts/coreboot_fb.dtsi b/arch/x86/dts/coreboot_fb.dtsi deleted file mode 100644 index 7d72f185373..00000000000 --- a/arch/x86/dts/coreboot_fb.dtsi +++ /dev/null @@ -1,5 +0,0 @@ -/ { - coreboot-fb { - compatible = "coreboot-fb"; - }; -}; diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts index 02ab4c160ae..6c65fb9611c 100644 --- a/arch/x86/dts/minnowmax.dts +++ b/arch/x86/dts/minnowmax.dts @@ -14,7 +14,6 @@ /include/ "reset.dtsi" /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" -/include/ "coreboot_fb.dtsi" / { model = "Intel Minnowboard Max"; diff --git a/doc/README.x86 b/doc/README.x86 index 6015ca40115..8cc46725f2a 100644 --- a/doc/README.x86 +++ b/doc/README.x86 @@ -412,17 +412,10 @@ To enable video you must enable these options in coreboot: - Set framebuffer graphics resolution (1280x1024 32k-color (1:5:5)) - Keep VESA framebuffer -And include coreboot_fb.dtsi in your board's device tree source file, like: - - /include/ "coreboot_fb.dtsi" - At present it seems that for Minnowboard Max, coreboot does not pass through the video information correctly (it always says the resolution is 0x0). This works correctly for link though. -Note: coreboot framebuffer driver does not work on QEMU. The reason is unknown -at this point. Patches are welcome if you figure out anything wrong. - Test with QEMU for bare mode ---------------------------- QEMU is a fancy emulator that can enable us to test U-Boot without access to |