diff options
| -rw-r--r-- | arch/arm/cpu/armv7/tegra-common/ap20.c | 14 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-tegra/tegra.h | 3 |
2 files changed, 15 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/tegra-common/ap20.c b/arch/arm/cpu/armv7/tegra-common/ap20.c index a3e7858e63..fb836963c8 100644 --- a/arch/arm/cpu/armv7/tegra-common/ap20.c +++ b/arch/arm/cpu/armv7/tegra-common/ap20.c @@ -78,6 +78,13 @@ static struct clk_pll_table tegra_pll_x_table[TEGRA_SOC_COUNT] { 0x198, 12, 0, 8}, { 0x198, 26, 0, 8}, }, + + /* TEGRA_SOC2_SLOW: 312 MHz */ + {{ 312, 13, 0, 12}, /* OSC 13M */ + { 260, 16, 0, 8}, /* OSC 19.2M */ + { 312, 12, 0, 12}, /* OSC 12M */ + { 312, 26, 0, 12}, /* OSC 26M */ + }, }; enum tegra_family_t { @@ -147,9 +154,14 @@ void ap20_init_pllx(int slow) /* get chip type. If unknown, assign to T20 */ chip_type = tegra_get_chip_type(); - if (slow || chip_type == TEGRA_SOC_UNKNOWN) + if (chip_type == TEGRA_SOC_UNKNOWN) chip_type = TEGRA_SOC_T20; + /* slow mode only works on T2x now */ + if (slow && ((chip_type == TEGRA_SOC_T20) || + (chip_type == TEGRA_SOC_T25))) + chip_type = TEGRA_SOC2_SLOW; + /* get osc freq */ osc = clock_get_osc_freq(); diff --git a/arch/arm/include/asm/arch-tegra/tegra.h b/arch/arm/include/asm/arch-tegra/tegra.h index e9a5edb216..317b24f02d 100644 --- a/arch/arm/include/asm/arch-tegra/tegra.h +++ b/arch/arm/include/asm/arch-tegra/tegra.h @@ -83,7 +83,8 @@ enum { TEGRA_SOC_T20, TEGRA_SOC_T25, TEGRA_SOC_T30, - TEGRA_SOC_T30_408MHZ, /* A T30 with faster PLLP */ + TEGRA_SOC_T30_408MHZ, /* A T30 with faster PLLP */ + TEGRA_SOC2_SLOW, /* T2x needs to run at slow clock initially */ TEGRA_SOC_COUNT, TEGRA_SOC_UNKNOWN = -1, |