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-rw-r--r--arch/arm/dts/imx6ul-opos6ul-u-boot.dtsi28
-rw-r--r--arch/arm/dts/imx6ul-opos6ul.dtsi2
-rw-r--r--arch/arm/dts/imx6ul-opos6uldev-u-boot.dtsi24
-rw-r--r--arch/arm/dts/imx6ul-opos6uldev.dts2
4 files changed, 52 insertions, 4 deletions
diff --git a/arch/arm/dts/imx6ul-opos6ul-u-boot.dtsi b/arch/arm/dts/imx6ul-opos6ul-u-boot.dtsi
new file mode 100644
index 0000000000..4918de388e
--- /dev/null
+++ b/arch/arm/dts/imx6ul-opos6ul-u-boot.dtsi
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source extras for U-Boot for the OPOS6UL SoM
+ *
+ * Copyright (C) 2018 Armadeus Systems <support@armadeus.com>
+ */
+
+/ {
+ soc {
+ u-boot,dm-spl;
+ };
+};
+
+&aips2 {
+ u-boot,dm-spl;
+};
+
+&iomuxc {
+ u-boot,dm-spl;
+};
+
+&pinctrl_usdhc1 {
+ u-boot,dm-spl;
+};
+
+&usdhc1 {
+ u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/imx6ul-opos6ul.dtsi b/arch/arm/dts/imx6ul-opos6ul.dtsi
index d51ad4de20..8f16a0a81c 100644
--- a/arch/arm/dts/imx6ul-opos6ul.dtsi
+++ b/arch/arm/dts/imx6ul-opos6ul.dtsi
@@ -99,7 +99,6 @@
/* eMMC */
&usdhc1 {
- u-boot,dm-spl;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;
bus-width = <8>;
@@ -162,7 +161,6 @@
};
pinctrl_usdhc1: usdhc1grp {
- u-boot,dm-spl;
fsl,pins = <
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
diff --git a/arch/arm/dts/imx6ul-opos6uldev-u-boot.dtsi b/arch/arm/dts/imx6ul-opos6uldev-u-boot.dtsi
new file mode 100644
index 0000000000..da8b0392ef
--- /dev/null
+++ b/arch/arm/dts/imx6ul-opos6uldev-u-boot.dtsi
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source extras for U-Boot for the OPOS6ULDev board
+ *
+ * Copyright (C) 2018 Armadeus Systems <support@armadeus.com>
+ */
+
+#include "imx6ul-opos6ul-u-boot.dtsi"
+
+&aips1 {
+ u-boot,dm-spl;
+
+ spba-bus@02000000 {
+ u-boot,dm-spl;
+ };
+};
+
+&pinctrl_uart1 {
+ u-boot,dm-spl;
+};
+
+&uart1 {
+ u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/imx6ul-opos6uldev.dts b/arch/arm/dts/imx6ul-opos6uldev.dts
index 9a51d1e54f..0e59ee57fd 100644
--- a/arch/arm/dts/imx6ul-opos6uldev.dts
+++ b/arch/arm/dts/imx6ul-opos6uldev.dts
@@ -228,7 +228,6 @@
};
&uart1 {
- u-boot,dm-spl;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
@@ -374,7 +373,6 @@
};
pinctrl_uart1: uart1grp {
- u-boot,dm-spl;
fsl,pins = <
MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1