diff options
30 files changed, 186 insertions, 74 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f95ed71b246..3f68d0988b7 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1302,7 +1302,7 @@ config ARCH_ZYNQMP select DM select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART select DM_ETH if NET - select DM_MAILBOX + imply DM_MAILBOX select DM_MMC if MMC select DM_SERIAL select DM_SPI if SPI @@ -1319,7 +1319,7 @@ config ARCH_ZYNQMP imply SPL_FIRMWARE if SPL select SPL_SEPARATE_BSS if SPL select SUPPORT_SPL - select ZYNQMP_IPI + imply ZYNQMP_IPI if DM_MAILBOX select SOC_DEVICE imply BOARD_LATE_INIT imply CMD_DM diff --git a/arch/arm/dts/zynq-cse-nand.dts b/arch/arm/dts/zynq-cse-nand.dts index 32cb3bffcb9..27adfb92162 100644 --- a/arch/arm/dts/zynq-cse-nand.dts +++ b/arch/arm/dts/zynq-cse-nand.dts @@ -86,6 +86,13 @@ reg = <0x100 0x100>; }; }; + + scutimer: timer@f8f00600 { + u-boot,dm-pre-reloc; + compatible = "arm,cortex-a9-twd-timer"; + reg = <0xf8f00600 0x20>; + clock-frequency = <333333333>; + }; }; }; diff --git a/arch/arm/dts/zynq-cse-nor.dts b/arch/arm/dts/zynq-cse-nor.dts index 197fbd717aa..f22a149f792 100644 --- a/arch/arm/dts/zynq-cse-nor.dts +++ b/arch/arm/dts/zynq-cse-nor.dts @@ -85,6 +85,13 @@ #address-cells = <1>; #size-cells = <1>; }; + + scutimer: timer@f8f00600 { + u-boot,dm-pre-reloc; + compatible = "arm,cortex-a9-twd-timer"; + reg = <0xf8f00600 0x20>; + clock-frequency = <333333333>; + }; }; }; diff --git a/arch/arm/dts/zynq-cse-qspi.dtsi b/arch/arm/dts/zynq-cse-qspi.dtsi index 38410eeca88..f7ac92b8026 100644 --- a/arch/arm/dts/zynq-cse-qspi.dtsi +++ b/arch/arm/dts/zynq-cse-qspi.dtsi @@ -116,6 +116,13 @@ reg = <0x100 0x100>; }; }; + + scutimer: timer@f8f00600 { + u-boot,dm-pre-reloc; + compatible = "arm,cortex-a9-twd-timer"; + reg = <0xf8f00600 0x20>; + clock-frequency = <333333333>; + }; }; }; diff --git a/arch/arm/mach-zynqmp/Kconfig b/arch/arm/mach-zynqmp/Kconfig index 66045067d2f..fd6f07715a8 100644 --- a/arch/arm/mach-zynqmp/Kconfig +++ b/arch/arm/mach-zynqmp/Kconfig @@ -142,7 +142,14 @@ config ZYNQMP_PSU_INIT_ENABLED bool "Include psu_init" select BOARD_EARLY_INIT_F help - Include psu_init to full u-boot. SPL include psu_init by default. + Include psu_init to full u-boot. + +config SPL_ZYNQMP_PSU_INIT_ENABLED + bool "Include psu_init in SPL" + default y if SPL + select BOARD_EARLY_INIT_F + help + Include psu_init by default in SPL. config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED bool "Overwrite SPL bootmode" diff --git a/arch/arm/mach-zynqmp/Makefile b/arch/arm/mach-zynqmp/Makefile index 4f9f6b56a98..bb1830c8462 100644 --- a/arch/arm/mach-zynqmp/Makefile +++ b/arch/arm/mach-zynqmp/Makefile @@ -8,4 +8,4 @@ obj-y += cpu.o obj-$(CONFIG_MP) += mp.o obj-$(CONFIG_SPL_BUILD) += spl.o handoff.o psu_spl_init.o obj-$(CONFIG_SPL_ZYNQMP_DRAM_ECC_INIT) += ecc_spl_init.o -obj-$(CONFIG_ZYNQMP_PSU_INIT_ENABLED) += psu_spl_init.o +obj-$(CONFIG_$(SPL_)ZYNQMP_PSU_INIT_ENABLED) += psu_spl_init.o diff --git a/arch/arm/mach-zynqmp/include/mach/hardware.h b/arch/arm/mach-zynqmp/include/mach/hardware.h index a70d6d611b8..70221e03057 100644 --- a/arch/arm/mach-zynqmp/include/mach/hardware.h +++ b/arch/arm/mach-zynqmp/include/mach/hardware.h @@ -175,7 +175,9 @@ struct csu_regs { #define ZYNQMP_PMU_BASEADDR 0xFFD80000 struct pmu_regs { - u32 reserved[18]; + u32 reserved0[16]; + u32 gen_storage4; /* 0x40 */ + u32 reserved1[1]; u32 gen_storage6; /* 0x48 */ }; diff --git a/arch/arm/mach-zynqmp/mp.c b/arch/arm/mach-zynqmp/mp.c index 949456d5309..2891878973e 100644 --- a/arch/arm/mach-zynqmp/mp.c +++ b/arch/arm/mach-zynqmp/mp.c @@ -42,6 +42,9 @@ #define ZYNQMP_MAX_CORES 6 +#define ZYNQMP_RPU0_USE_MASK BIT(1) +#define ZYNQMP_RPU1_USE_MASK BIT(2) + int is_core_valid(unsigned int core) { if (core < ZYNQMP_MAX_CORES) @@ -250,6 +253,27 @@ void initialize_tcm(bool mode) } } +static void mark_r5_used(u32 nr, u8 mode) +{ + u32 mask = 0; + + if (mode == LOCK) { + mask = ZYNQMP_RPU0_USE_MASK | ZYNQMP_RPU1_USE_MASK; + } else { + switch (nr) { + case ZYNQMP_CORE_RPU0: + mask = ZYNQMP_RPU0_USE_MASK; + break; + case ZYNQMP_CORE_RPU1: + mask = ZYNQMP_RPU1_USE_MASK; + break; + default: + return; + } + } + zynqmp_mmio_write((ulong)&pmu_base->gen_storage4, mask, mask); +} + int cpu_release(u32 nr, int argc, char *const argv[]) { if (nr <= ZYNQMP_CORE_APU3) { @@ -305,6 +329,7 @@ int cpu_release(u32 nr, int argc, char *const argv[]) write_tcm_boot_trampoline(boot_addr_uniq); dcache_enable(); set_r5_halt_mode(nr, RELEASE, LOCK); + mark_r5_used(nr, LOCK); } else if (!strncmp(argv[1], "split", 5)) { printf("R5 split mode\n"); set_r5_reset(nr, SPLIT); @@ -317,6 +342,7 @@ int cpu_release(u32 nr, int argc, char *const argv[]) write_tcm_boot_trampoline(boot_addr_uniq); dcache_enable(); set_r5_halt_mode(nr, RELEASE, SPLIT); + mark_r5_used(nr, SPLIT); } else { printf("Unsupported mode\n"); return 1; diff --git a/board/xilinx/Kconfig b/board/xilinx/Kconfig index 746a2332ad5..4f0776e8bd9 100644 --- a/board/xilinx/Kconfig +++ b/board/xilinx/Kconfig @@ -58,23 +58,6 @@ config BOOT_SCRIPT_OFFSET help Specifies distro boot script offset in NAND/QSPI/NOR flash. -config ZYNQ_MAC_IN_EEPROM - bool "Reading MAC address from EEPROM" - help - Enable this option if your MAC address is saved in eeprom and - xlnx,eeprom DT property in chosen node points to it. - -if ZYNQ_MAC_IN_EEPROM - -config ZYNQ_GEM_I2C_MAC_OFFSET - hex "Set the I2C MAC offset" - default 0x0 - depends on DM_I2C - help - Set the MAC offset for i2C. - -endif - config CMD_FRU bool "FRU information for product" help @@ -82,3 +65,12 @@ config CMD_FRU information present in the device. The FRU Information is used to primarily to provide "inventory" information about the boards that the FRU Information Device is located on. + +config FRU_SC + bool "FRU system controller decoding" + help + Xilinx System Controller (SC) FRU format is describing boards from two + angles. One from DUT and then from SC. DUT is default option for + the main CPU. SC behaves more or less as slave and have different ID. + If you build U-Boot for SC you should enable this option to get proper + MAC address. diff --git a/board/xilinx/common/fru.h b/board/xilinx/common/fru.h index 59f6b722cf1..586c41b66ef 100644 --- a/board/xilinx/common/fru.h +++ b/board/xilinx/common/fru.h @@ -90,6 +90,7 @@ struct fru_table { #define FRU_MULTIREC_MAC_OFFSET 4 #define FRU_LAST_REC BIT(7) #define FRU_DUT_MACID 0x31 +#define FRU_SC_MACID 0x11 /* This should be minimum of fields */ #define FRU_BOARD_AREA_TOTAL_FIELDS 5 diff --git a/board/xilinx/common/fru_ops.c b/board/xilinx/common/fru_ops.c index 49846ae3d66..c4f009affc5 100644 --- a/board/xilinx/common/fru_ops.c +++ b/board/xilinx/common/fru_ops.c @@ -239,8 +239,12 @@ static int fru_parse_multirec(unsigned long addr) if (mrc.rec_type == FRU_MULTIREC_TYPE_OEM) { struct fru_multirec_mac *mac = (void *)addr + hdr_len; + u32 type = FRU_DUT_MACID; - if (mac->ver == FRU_DUT_MACID) { + if (CONFIG_IS_ENABLED(FRU_SC)) + type = FRU_SC_MACID; + + if (mac->ver == type) { mac_len = mrc.len - FRU_MULTIREC_MAC_OFFSET; memcpy(&fru_data.mac.macid, mac->macid, mac_len); } diff --git a/board/xilinx/zynqmp/MAINTAINERS b/board/xilinx/zynqmp/MAINTAINERS index 17a2766413c..07b91b81c95 100644 --- a/board/xilinx/zynqmp/MAINTAINERS +++ b/board/xilinx/zynqmp/MAINTAINERS @@ -11,7 +11,7 @@ F: configs/xilinx_zynqmp* F: configs/avnet_ultra96_rev1_defconfig ARM ZYNQMP AVNET ULTRAZED EV BOARD -M: Luca Ceresoli <luca@lucaceresoli.net> +M: Luca Ceresoli <luca.ceresoli@bootlin.com> S: Maintained F: arch/arm/dts/avnet-ultrazedev-* F: configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig diff --git a/board/xilinx/zynqmp/Makefile b/board/xilinx/zynqmp/Makefile index a9140287533..732f909fc21 100644 --- a/board/xilinx/zynqmp/Makefile +++ b/board/xilinx/zynqmp/Makefile @@ -31,11 +31,7 @@ $(warning Put custom psu_init_gpl.c/h to board/xilinx/zynqmp/custom_hw_platform/ endif endif -ifdef_any_of = $(filter-out undefined,$(foreach v,$(1),$(origin $(v)))) - -ifneq ($(call ifdef_any_of, CONFIG_ZYNQMP_PSU_INIT_ENABLED CONFIG_SPL_BUILD),) -obj-y += $(init-objs) -endif +obj-$(CONFIG_$(SPL_)ZYNQMP_PSU_INIT_ENABLED) += $(init-objs) ifdef CONFIG_SPL_BUILD ifneq ($(CONFIG_ZYNQMP_SPL_PM_CFG_OBJ_FILE),"") diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 5fe0873fe22..579708d2e0c 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -611,8 +611,7 @@ enum env_location env_get_location(enum env_operation op, int prio) void set_dfu_alt_info(char *interface, char *devstr) { - int multiboot; - int bootseq = 0; + int multiboot, bootseq = 0, len = 0; ALLOC_CACHE_ALIGN_BUFFER(char, buf, DFU_ALT_BUF_LEN); @@ -634,29 +633,33 @@ void set_dfu_alt_info(char *interface, char *devstr) case SD1_LSHFT_MODE: case SD_MODE1: bootseq = mmc_get_env_dev(); - if (!multiboot) - snprintf(buf, DFU_ALT_BUF_LEN, - "mmc %d=boot.bin fat %d 1;" - "%s fat %d 1", - bootseq, bootseq, - CONFIG_SPL_FS_LOAD_PAYLOAD_NAME, bootseq); - else - snprintf(buf, DFU_ALT_BUF_LEN, - "mmc %d=boot%04d.bin fat %d 1;" - "%s fat %d 1", - bootseq, multiboot, bootseq, - CONFIG_SPL_FS_LOAD_PAYLOAD_NAME, bootseq); + + len += snprintf(buf + len, DFU_ALT_BUF_LEN, "mmc %d=boot", + bootseq); + + if (multiboot) + len += snprintf(buf + len, DFU_ALT_BUF_LEN, + "%04d", multiboot); + + len += snprintf(buf + len, DFU_ALT_BUF_LEN, ".bin fat %d 1", + bootseq); +#if defined(CONFIG_SPL_FS_LOAD_PAYLOAD_NAME) + len += snprintf(buf + len, DFU_ALT_BUF_LEN, ";%s fat %d 1", + CONFIG_SPL_FS_LOAD_PAYLOAD_NAME, bootseq); +#endif break; -#if defined(CONFIG_SYS_SPI_U_BOOT_OFFS) case QSPI_MODE_24BIT: case QSPI_MODE_32BIT: - snprintf(buf, DFU_ALT_BUF_LEN, - "sf 0:0=boot.bin raw %x 0x1500000;" - "%s raw 0x%x 0x500000", - multiboot * SZ_32K, CONFIG_SPL_FS_LOAD_PAYLOAD_NAME, - CONFIG_SYS_SPI_U_BOOT_OFFS); - break; + len += snprintf(buf + len, DFU_ALT_BUF_LEN, + "sf 0:0=boot.bin raw %x 0x1500000", + multiboot * SZ_32K); +#if defined(CONFIG_SPL_FS_LOAD_PAYLOAD_NAME) && defined(CONFIG_SYS_SPI_U_BOOT_OFFS) + len += snprintf(buf + len, DFU_ALT_BUF_LEN, + ";%s raw 0x%x 0x500000", + CONFIG_SPL_FS_LOAD_PAYLOAD_NAME, + CONFIG_SYS_SPI_U_BOOT_OFFS); #endif + break; default: return; } diff --git a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig index 943b4da21d1..0a3d710a8b1 100644 --- a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig +++ b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig @@ -8,9 +8,6 @@ CONFIG_DEFAULT_DEVICE_TREE="avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0" CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y -CONFIG_ZYNQ_MAC_IN_EEPROM=y -CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0xfa -CONFIG_ZYNQMP_PSU_INIT_ENABLED=y CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_DEBUG_UART=y CONFIG_SYS_MEMTEST_START=0x00000000 diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig index acce95ec026..179cb522125 100644 --- a/configs/syzygy_hub_defconfig +++ b/configs/syzygy_hub_defconfig @@ -9,8 +9,6 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="zynq-syzygy-hub" CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y -CONFIG_ZYNQ_MAC_IN_EEPROM=y -CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0xFA CONFIG_SYS_LOAD_ADDR=0x0 CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/xilinx_versal_mini_ospi_defconfig b/configs/xilinx_versal_mini_ospi_defconfig index 2c4e21028df..abcd20ba857 100644 --- a/configs/xilinx_versal_mini_ospi_defconfig +++ b/configs/xilinx_versal_mini_ospi_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xFFFE0000 # CONFIG_EXPERT is not set +CONFIG_REMAKE_ELF=y # CONFIG_AUTOBOOT is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/xilinx_versal_mini_qspi_defconfig b/configs/xilinx_versal_mini_qspi_defconfig index 0062f6a69f8..9ca9b7e68ad 100644 --- a/configs/xilinx_versal_mini_qspi_defconfig +++ b/configs/xilinx_versal_mini_qspi_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xFFFE0000 # CONFIG_EXPERT is not set +CONFIG_REMAKE_ELF=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set # CONFIG_AUTOBOOT is not set CONFIG_LOGLEVEL=0 diff --git a/configs/xilinx_versal_net_virt_defconfig b/configs/xilinx_versal_net_virt_defconfig index 431a8de9fcf..2fdf99f7cbb 100644 --- a/configs/xilinx_versal_net_virt_defconfig +++ b/configs/xilinx_versal_net_virt_defconfig @@ -87,6 +87,7 @@ CONFIG_SPI_FLASH_ISSI=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_MT35XU=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set diff --git a/configs/xilinx_zynqmp_mini_defconfig b/configs/xilinx_zynqmp_mini_defconfig index 245b6a42b93..d8b3aab94f1 100644 --- a/configs/xilinx_zynqmp_mini_defconfig +++ b/configs/xilinx_zynqmp_mini_defconfig @@ -7,7 +7,6 @@ CONFIG_SYS_MALLOC_LEN=0x1a00 CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini" CONFIG_SYS_MEM_RSVD_FOR_MMU=y -CONFIG_ZYNQMP_PSU_INIT_ENABLED=y # CONFIG_CMD_ZYNQMP is not set CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_SYS_MEMTEST_START=0x00000000 @@ -59,6 +58,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set # CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set +# CONFIG_DM_MAILBOX is not set # CONFIG_MMC is not set CONFIG_ARM_DCC=y CONFIG_PANIC_HANG=y diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig index adf1dae66ed..a1ee98dfc25 100644 --- a/configs/xilinx_zynqmp_mini_emmc0_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig @@ -10,7 +10,6 @@ CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc0" CONFIG_SPL_SYS_MALLOC_F_LEN=0x600 CONFIG_SPL=y -CONFIG_ZYNQMP_PSU_INIT_ENABLED=y # CONFIG_CMD_ZYNQMP is not set CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y @@ -71,6 +70,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_SPL_DM_SEQ_ALIAS=y +# CONFIG_DM_MAILBOX is not set CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig index 9d799ad0e3d..88c95d4ce2a 100644 --- a/configs/xilinx_zynqmp_mini_emmc1_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig @@ -10,7 +10,6 @@ CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc1" CONFIG_SPL_SYS_MALLOC_F_LEN=0x600 CONFIG_SPL=y -CONFIG_ZYNQMP_PSU_INIT_ENABLED=y # CONFIG_CMD_ZYNQMP is not set CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y @@ -71,6 +70,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_SPL_DM_SEQ_ALIAS=y +# CONFIG_DM_MAILBOX is not set CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y diff --git a/configs/xilinx_zynqmp_mini_nand_defconfig b/configs/xilinx_zynqmp_mini_nand_defconfig index 29040a39e97..0e035348db0 100644 --- a/configs/xilinx_zynqmp_mini_nand_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_defconfig @@ -7,7 +7,6 @@ CONFIG_SYS_MALLOC_LEN=0x800000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-nand" -CONFIG_ZYNQMP_PSU_INIT_ENABLED=y # CONFIG_CMD_ZYNQMP is not set CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y @@ -55,6 +54,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set # CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set +# CONFIG_DM_MAILBOX is not set # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_DM_MTD=y diff --git a/configs/xilinx_zynqmp_mini_nand_single_defconfig b/configs/xilinx_zynqmp_mini_nand_single_defconfig index 7c17c061d42..5255419c75b 100644 --- a/configs/xilinx_zynqmp_mini_nand_single_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_single_defconfig @@ -7,7 +7,6 @@ CONFIG_SYS_MALLOC_LEN=0x800000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-nand" -CONFIG_ZYNQMP_PSU_INIT_ENABLED=y # CONFIG_CMD_ZYNQMP is not set CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y @@ -55,6 +54,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_NET is not set # CONFIG_DM_WARN is not set # CONFIG_DM_DEVICE_REMOVE is not set +# CONFIG_DM_MAILBOX is not set # CONFIG_MMC is not set CONFIG_MTD=y CONFIG_DM_MTD=y diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index 513b51998d2..6861f739808 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -10,7 +10,6 @@ CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-qspi" CONFIG_SPL=y CONFIG_SYS_MEM_RSVD_FOR_MMU=y CONFIG_ZYNQMP_NO_DDR=y -CONFIG_ZYNQMP_PSU_INIT_ENABLED=y # CONFIG_CMD_ZYNQMP is not set # CONFIG_PSCI_RESET is not set CONFIG_SYS_LOAD_ADDR=0x8000000 @@ -76,6 +75,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y # CONFIG_GPIO is not set # CONFIG_I2C is not set # CONFIG_INPUT is not set +# CONFIG_DM_MAILBOX is not set # CONFIG_MMC is not set # CONFIG_SPI_FLASH_SMART_HWCAPS is not set # CONFIG_SPI_FLASH_UNLOCK_ALL is not set diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 9696e418daf..4732c39bdbe 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -13,8 +13,6 @@ CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x1E80000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y -CONFIG_ZYNQ_MAC_IN_EEPROM=y -CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20 CONFIG_CMD_FRU=y CONFIG_ZYNQMP_USB=y CONFIG_SYS_LOAD_ADDR=0x8000000 diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 78de3c52816..1ea8363d9f8 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -1600,7 +1600,7 @@ static int sst26_is_unlocked(struct spi_nor *nor, loff_t ofs, uint64_t len) ofs -= ofs & (SZ_64K - 1); len = len & (SZ_64K - 1) ? (len & ~(SZ_64K - 1)) + SZ_64K : len; - return sst26_lock_ctl(nor, ofs, len, SST26_CTL_CHECK); + return !sst26_lock_ctl(nor, ofs, len, SST26_CTL_CHECK); } static int sst_write_byteprogram(struct spi_nor *nor, loff_t to, size_t len, diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c index 5f5bc650bef..3e9919993d0 100644 --- a/drivers/net/xilinx_axi_emac.c +++ b/drivers/net/xilinx_axi_emac.c @@ -109,6 +109,7 @@ struct axidma_plat { struct eth_pdata eth_pdata; struct axidma_reg *dmatx; struct axidma_reg *dmarx; + int pcsaddr; int phyaddr; u8 eth_hasnobuf; int phy_of_handle; @@ -119,6 +120,7 @@ struct axidma_plat { struct axidma_priv { struct axidma_reg *dmatx; struct axidma_reg *dmarx; + int pcsaddr; int phyaddr; struct axi_regs *iobase; phy_interface_t interface; @@ -301,6 +303,13 @@ static int axiemac_phy_init(struct udevice *dev) if (IS_ENABLED(CONFIG_DM_ETH_PHY)) priv->phyaddr = eth_phy_get_addr(dev); + /* + * Set address of PCS/PMA PHY to the one pointed by phy-handle for + * backward compatibility. + */ + if (priv->phyaddr != -1 && priv->pcsaddr == 0) + priv->pcsaddr = priv->phyaddr; + if (priv->phyaddr == -1) { /* Detect the PHY address */ for (i = 31; i >= 0; i--) { @@ -333,6 +342,45 @@ static int axiemac_phy_init(struct udevice *dev) return 0; } +static int pcs_pma_startup(struct axidma_priv *priv) +{ + u32 rc, retry_cnt = 0; + u16 mii_reg; + + rc = phyread(priv, priv->pcsaddr, MII_BMCR, &mii_reg); + if (rc) + goto failed_mdio; + + if (!(mii_reg & BMCR_ANENABLE)) { + mii_reg |= BMCR_ANENABLE; + if (phywrite(priv, priv->pcsaddr, MII_BMCR, mii_reg)) + goto failed_mdio; + } + + /* + * Check the internal PHY status and warn user if the link between it + * and the external PHY is not obtained. + */ + debug("axiemac: waiting for link status of the PCS/PMA PHY"); + while (retry_cnt * 10 < PHY_ANEG_TIMEOUT) { + rc = phyread(priv, priv->pcsaddr, MII_BMSR, &mii_reg); + if ((mii_reg & BMSR_LSTATUS) && mii_reg != 0xffff && !rc) { + debug(".Done\n"); + return 0; + } + if ((retry_cnt++ % 10) == 0) + debug("."); + mdelay(10); + } + debug("\n"); + printf("axiemac: Warning, PCS/PMA PHY@%d is not ready, link is down\n", + priv->pcsaddr); + return 1; +failed_mdio: + printf("axiemac: MDIO to the PCS/PMA PHY has failed\n"); + return 1; +} + /* Setting axi emac and phy to proper setting */ static int setup_phy(struct udevice *dev) { @@ -348,12 +396,12 @@ static int setup_phy(struct udevice *dev) * after DMA and ethernet resets and hence * check and clear if set. */ - ret = phyread(priv, priv->phyaddr, MII_BMCR, &temp); + ret = phyread(priv, priv->pcsaddr, MII_BMCR, &temp); if (ret) return 0; if (temp & BMCR_ISOLATE) { temp &= ~BMCR_ISOLATE; - ret = phywrite(priv, priv->phyaddr, MII_BMCR, temp); + ret = phywrite(priv, priv->pcsaddr, MII_BMCR, temp); if (ret) return 0; } @@ -364,6 +412,11 @@ static int setup_phy(struct udevice *dev) phydev->dev->name); return 0; } + if (priv->interface == PHY_INTERFACE_MODE_SGMII || + priv->interface == PHY_INTERFACE_MODE_1000BASEX) { + if (pcs_pma_startup(priv)) + return 0; + } if (!phydev->link) { printf("%s: No link.\n", phydev->dev->name); return 0; @@ -784,6 +837,7 @@ static int axi_emac_probe(struct udevice *dev) if (priv->mactype == EMAC_1G) { priv->eth_hasnobuf = plat->eth_hasnobuf; + priv->pcsaddr = plat->pcsaddr; priv->phyaddr = plat->phyaddr; priv->phy_of_handle = plat->phy_of_handle; priv->interface = pdata->phy_interface; @@ -861,6 +915,8 @@ static int axi_emac_of_to_plat(struct udevice *dev) if (plat->mactype == EMAC_1G) { plat->phyaddr = -1; + /* PHYAD 0 always redirects to the PCS/PMA PHY */ + plat->pcsaddr = 0; offset = fdtdec_lookup_phandle(gd->fdt_blob, node, "phy-handle"); @@ -878,6 +934,16 @@ static int axi_emac_of_to_plat(struct udevice *dev) plat->eth_hasnobuf = fdtdec_get_bool(gd->fdt_blob, node, "xlnx,eth-hasnobuf"); + + if (pdata->phy_interface == PHY_INTERFACE_MODE_SGMII || + pdata->phy_interface == PHY_INTERFACE_MODE_1000BASEX) { + offset = fdtdec_lookup_phandle(gd->fdt_blob, node, + "pcs-handle"); + if (offset > 0) { + plat->pcsaddr = fdtdec_get_int(gd->fdt_blob, + offset, "reg", -1); + } + } } return 0; diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index cfae5dcbda0..d1f89138ef1 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -735,8 +735,7 @@ int cadence_qspi_apb_read_execute(struct cadence_spi_priv *priv, void *buf = op->data.buf.in; size_t len = op->data.nbytes; - if (CONFIG_IS_ENABLED(ARCH_VERSAL)) - cadence_qspi_apb_enable_linear_mode(true); + cadence_qspi_apb_enable_linear_mode(true); if (priv->use_dac_mode && (from + len < priv->ahbsize)) { if (len < 256 || @@ -905,9 +904,6 @@ int cadence_qspi_apb_write_execute(struct cadence_spi_priv *priv, const void *buf = op->data.buf.out; size_t len = op->data.nbytes; - if (CONFIG_IS_ENABLED(ARCH_VERSAL)) - cadence_qspi_apb_enable_linear_mode(true); - /* * Some flashes like the Cypress Semper flash expect a dummy 4-byte * address (all 0s) with the read status register command in DTR mode. diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c index 48eff777dfb..335b458cb90 100644 --- a/drivers/spi/zynqmp_gqspi.c +++ b/drivers/spi/zynqmp_gqspi.c @@ -94,7 +94,7 @@ #define GQSPI_BAUD_DIV_SHIFT 2 #define GQSPI_LPBK_DLY_ADJ_LPBK_SHIFT 5 -#define GQSPI_LPBK_DLY_ADJ_DLY_1 0x2 +#define GQSPI_LPBK_DLY_ADJ_DLY_1 0x1 #define GQSPI_LPBK_DLY_ADJ_DLY_1_SHIFT 3 #define GQSPI_LPBK_DLY_ADJ_DLY_0 0x3 #define GQSPI_USE_DATA_DLY 0x1 @@ -662,7 +662,7 @@ static int zynqmp_qspi_start_io(struct zynqmp_qspi_priv *priv, static int zynqmp_qspi_start_dma(struct zynqmp_qspi_priv *priv, u32 gen_fifo_cmd, u32 *buf) { - u32 addr; + unsigned long addr; u32 size; u32 actuallen = priv->len; u32 totallen = priv->len; @@ -678,7 +678,9 @@ static int zynqmp_qspi_start_dma(struct zynqmp_qspi_priv *priv, totallen -= priv->len; /* Save remaining bytes length to read */ actuallen = priv->len; /* Actual number of bytes reading */ - writel((unsigned long)buf, &dma_regs->dmadst); + writel(lower_32_bits((unsigned long)buf), &dma_regs->dmadst); + writel(upper_32_bits((unsigned long)buf) & GENMASK(11, 0), + &dma_regs->dmadstmsb); writel(roundup(priv->len, GQSPI_DMA_ALIGN), &dma_regs->dmasize); writel(GQSPI_DMA_DST_I_STS_MASK, &dma_regs->dmaier); addr = (unsigned long)buf; |