diff options
-rw-r--r-- | arch/arm/include/asm/arch-mvebu/spi.h | 17 | ||||
-rw-r--r-- | drivers/mtd/nand/kirkwood_nand.c | 19 | ||||
-rw-r--r-- | drivers/spi/kirkwood_spi.c | 14 |
3 files changed, 45 insertions, 5 deletions
diff --git a/arch/arm/include/asm/arch-mvebu/spi.h b/arch/arm/include/asm/arch-mvebu/spi.h index 526fea68e6..78869a253d 100644 --- a/arch/arm/include/asm/arch-mvebu/spi.h +++ b/arch/arm/include/asm/arch-mvebu/spi.h @@ -35,13 +35,15 @@ struct kwspi_registers { #define SCK_MPP10 (1 << 1) #define MISO_MPP11 (1 << 2) +/* Control Register */ +#define KWSPI_CSN_ACT (1 << 0) /* Activates serial memory interface */ +#define KWSPI_SMEMRDY (1 << 1) /* SerMem Data xfer ready */ +#define KWSPI_CS_SHIFT 2 /* chip select shift */ +#define KWSPI_CS_MASK 0x7 /* chip select mask */ + +/* Configuration Register */ #define KWSPI_CLKPRESCL_MASK 0x1f #define KWSPI_CLKPRESCL_MIN 0x12 -#define KWSPI_CSN_ACT 1 /* Activates serial memory interface */ -#define KWSPI_SMEMRDY (1 << 1) /* SerMem Data xfer ready */ -#define KWSPI_IRQUNMASK 1 /* unmask SPI interrupt */ -#define KWSPI_IRQMASK 0 /* mask SPI interrupt */ -#define KWSPI_SMEMRDIRQ 1 /* SerMem data xfer ready irq */ #define KWSPI_XFERLEN_1BYTE 0 #define KWSPI_XFERLEN_2BYTE (1 << 5) #define KWSPI_XFERLEN_MASK (1 << 5) @@ -50,6 +52,11 @@ struct kwspi_registers { #define KWSPI_ADRLEN_3BYTE (2 << 8) #define KWSPI_ADRLEN_4BYTE (3 << 8) #define KWSPI_ADRLEN_MASK (3 << 8) + +#define KWSPI_IRQUNMASK 1 /* unmask SPI interrupt */ +#define KWSPI_IRQMASK 0 /* mask SPI interrupt */ +#define KWSPI_SMEMRDIRQ 1 /* SerMem data xfer ready irq */ + #define KWSPI_TIMEOUT 10000 #endif /* __KW_SPI_H__ */ diff --git a/drivers/mtd/nand/kirkwood_nand.c b/drivers/mtd/nand/kirkwood_nand.c index 4fc34d6b9f..d734113f64 100644 --- a/drivers/mtd/nand/kirkwood_nand.c +++ b/drivers/mtd/nand/kirkwood_nand.c @@ -9,6 +9,7 @@ #include <common.h> #include <asm/io.h> #include <asm/arch/soc.h> +#include <asm/arch/mpp.h> #include <nand.h> /* NAND Flash Soc registers */ @@ -22,6 +23,8 @@ struct kwnandf_registers { static struct kwnandf_registers *nf_reg = (struct kwnandf_registers *)KW_NANDF_BASE; +static u32 nand_mpp_backup[9] = { 0 }; + /* * hardware specific access to control-lines/bits */ @@ -49,6 +52,22 @@ static void kw_nand_hwcontrol(struct mtd_info *mtd, int cmd, void kw_nand_select_chip(struct mtd_info *mtd, int chip) { u32 data; + static const u32 nand_config[] = { + MPP0_NF_IO2, + MPP1_NF_IO3, + MPP2_NF_IO4, + MPP3_NF_IO5, + MPP4_NF_IO6, + MPP5_NF_IO7, + MPP18_NF_IO0, + MPP19_NF_IO1, + 0 + }; + + if (chip >= 0) + kirkwood_mpp_conf(nand_config, nand_mpp_backup); + else + kirkwood_mpp_conf(nand_mpp_backup, NULL); data = readl(&nf_reg->ctrl); data |= NAND_ACTCEBOOT_BIT; diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c index 80cdbd08fc..6851ba942f 100644 --- a/drivers/spi/kirkwood_spi.c +++ b/drivers/spi/kirkwood_spi.c @@ -283,6 +283,19 @@ static int mvebu_spi_xfer(struct udevice *dev, unsigned int bitlen, return _spi_xfer(plat->spireg, bitlen, dout, din, flags); } +static int mvebu_spi_claim_bus(struct udevice *dev) +{ + struct udevice *bus = dev->parent; + struct mvebu_spi_platdata *plat = dev_get_platdata(bus); + + /* Configure the chip-select in the CTRL register */ + clrsetbits_le32(&plat->spireg->ctrl, + KWSPI_CS_MASK << KWSPI_CS_SHIFT, + spi_chip_select(dev) << KWSPI_CS_SHIFT); + + return 0; +} + static int mvebu_spi_probe(struct udevice *bus) { struct mvebu_spi_platdata *plat = dev_get_platdata(bus); @@ -305,6 +318,7 @@ static int mvebu_spi_ofdata_to_platdata(struct udevice *bus) } static const struct dm_spi_ops mvebu_spi_ops = { + .claim_bus = mvebu_spi_claim_bus, .xfer = mvebu_spi_xfer, .set_speed = mvebu_spi_set_speed, .set_mode = mvebu_spi_set_mode, |