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authorPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2017-03-15 12:08:43 +0100
committerSimon Glass <sjg@chromium.org>2017-04-04 20:01:57 -0600
commit111bcc4fb6cb4a519daabf4812f3ce77f002352f (patch)
tree66a11d6c62990546b22be1bebfe8e526046eb7e2 /tools/rkspi.c
parentf3edf8b18ff6a6f5bf9893da5460449bae028430 (diff)
rockchip: mkimage: pad the header to 8-bytes (using a 'nop') for RK3399
The RK3399 boot code (running as AArch64) poses a bit of a challenge for SPL image generation: * The BootROM will start execution right after the 4-byte header (at the odd instruction word loaded into SRAM at 0xff8c2004, with the 'RK33' boot magic residing at 0xff8c2000). * The default padding (during ELF generation) for AArch64 is 0x0, which is an illegal instruction and the .text section needs to be naturally aligned (someone might locate a 64bit constant relative to the section start and unaligned loads trigger a fault for all privileged modes of an ARMv8)... so we can't simply define the CONFIG_SPL_TEXT_BASE option to the odd address (0xff8c2004). * Finally, we don't want to change the values used for padding of the SPL .text section for all ARMv8 targets to the instruction word encoding 'nop', as this would affect all padding in this section and might hide errors that would otherwise quickly trigger an illegal insn exception. To deal with this situation, we modify the rkimage generation to - understand the fact that the RK3399 needs to pad the header to an 8 byte boundary using an AArch64 'nop' - the necessary logic to adjust the header_size (which controls the location where the payload is copied into the image) and to insert this padding (AArch64 insn words are always little-endian) into the image following the 4-byte header magic. X-AffectedPlatforms: RK3399-Q7 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Diffstat (limited to 'tools/rkspi.c')
-rw-r--r--tools/rkspi.c17
1 files changed, 5 insertions, 12 deletions
diff --git a/tools/rkspi.c b/tools/rkspi.c
index 9fa43e8303..d2d3fdda42 100644
--- a/tools/rkspi.c
+++ b/tools/rkspi.c
@@ -17,8 +17,6 @@ enum {
RKSPI_SECT_LEN = RK_BLK_SIZE * 4,
};
-static char dummy_hdr[RK_IMAGE_HEADER_LEN];
-
static int rkspi_verify_header(unsigned char *buf, int size,
struct image_tool_params *params)
{
@@ -45,13 +43,6 @@ static void rkspi_set_header(void *buf, struct stat *sbuf, int ifd,
size);
}
- memcpy(buf + RK_SPL_HDR_START, rkcommon_get_spl_hdr(params),
- RK_SPL_HDR_SIZE);
-
- if (rkcommon_need_rc4_spl(params))
- rkcommon_rc4_encode_spl(buf, RK_SPL_HDR_START,
- params->file_size - RK_SPL_HDR_START);
-
/*
* Spread the image out so we only use the first 2KB of each 4KB
* region. This is a feature of the SPI format required by the Rockchip
@@ -86,6 +77,8 @@ static int rkspi_vrec_header(struct image_tool_params *params,
{
int pad_size;
+ rkcommon_vrec_header(params, tparams);
+
pad_size = (rkcommon_get_spl_size(params) + 0x7ff) / 0x800 * 0x800;
params->orig_file_size = pad_size;
@@ -94,7 +87,7 @@ static int rkspi_vrec_header(struct image_tool_params *params,
pad_size += RK_SPL_HDR_START;
debug("pad_size %x\n", pad_size);
- return pad_size - params->file_size;
+ return pad_size - params->file_size - tparams->header_size;
}
/*
@@ -103,8 +96,8 @@ static int rkspi_vrec_header(struct image_tool_params *params,
U_BOOT_IMAGE_TYPE(
rkspi,
"Rockchip SPI Boot Image support",
- RK_IMAGE_HEADER_LEN,
- dummy_hdr,
+ 0,
+ NULL,
rkcommon_check_params,
rkspi_verify_header,
rkspi_print_header,