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authorRobert Beckett <bob.beckett@collabora.com>2019-10-28 17:44:59 +0000
committerHeiko Schocher <hs@denx.de>2019-12-17 06:57:31 +0100
commit951674ac7e3db23eb3b2b87c27387364a9e38ca2 (patch)
tree354d2a83d5ec40ee6d281206228b367b7e328aec /test
parent22e93511be2e012d3f807641b07e09b649a71ef6 (diff)
dm: i2c: EEPROM simulator add tests for addr offset mask
Add support for setting the chip address offset mask to EEPROM sumulator and add tests to test it. Signed-off-by: Robert Beckett <bob.beckett@collabora.com> Reviewed-by: Heiko Schocher <hs@denx.de>
Diffstat (limited to 'test')
-rw-r--r--test/dm/i2c.c65
1 files changed, 65 insertions, 0 deletions
diff --git a/test/dm/i2c.c b/test/dm/i2c.c
index bf5597b7a6..cadbb43b9e 100644
--- a/test/dm/i2c.c
+++ b/test/dm/i2c.c
@@ -241,3 +241,68 @@ static int dm_test_i2c_offset(struct unit_test_state *uts)
return 0;
}
DM_TEST(dm_test_i2c_offset, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+static int dm_test_i2c_addr_offset(struct unit_test_state *uts)
+{
+ struct udevice *eeprom;
+ struct udevice *dev;
+ u8 buf[5];
+
+ ut_assertok(i2c_get_chip_for_busnum(busnum, chip, 1, &dev));
+
+ /* Do a transfer so we can find the emulator */
+ ut_assertok(dm_i2c_read(dev, 0, buf, 5));
+ ut_assertok(uclass_first_device(UCLASS_I2C_EMUL, &eeprom));
+
+ /* Offset length 0 */
+ sandbox_i2c_eeprom_set_offset_len(eeprom, 0);
+ sandbox_i2c_eeprom_set_chip_addr_offset_mask(eeprom, 0x3);
+ ut_assertok(i2c_set_chip_offset_len(dev, 0));
+ ut_assertok(i2c_set_chip_addr_offset_mask(dev, 0x3));
+ ut_assertok(dm_i2c_write(dev, 0x3, (uint8_t *)"AB", 2));
+ ut_assertok(dm_i2c_read(dev, 0x3, buf, 5));
+ ut_asserteq_mem("AB\0\0\0\0", buf, sizeof(buf));
+ ut_asserteq(0x3, sanbox_i2c_eeprom_get_prev_offset(eeprom));
+ ut_asserteq(chip | 0x3, sanbox_i2c_eeprom_get_prev_addr(eeprom));
+
+ /* Offset length 1 */
+ sandbox_i2c_eeprom_set_offset_len(eeprom, 1);
+ sandbox_i2c_eeprom_set_chip_addr_offset_mask(eeprom, 0x3);
+ ut_assertok(i2c_set_chip_offset_len(dev, 1));
+ ut_assertok(i2c_set_chip_addr_offset_mask(dev, 0x3));
+ ut_assertok(dm_i2c_write(dev, 0x310, (uint8_t *)"AB", 2));
+ ut_assertok(dm_i2c_read(dev, 0x310, buf, 5));
+ ut_asserteq_mem("AB\0\0\0\0", buf, sizeof(buf));
+ ut_asserteq(0x310, sanbox_i2c_eeprom_get_prev_offset(eeprom));
+ ut_asserteq(chip | 0x3, sanbox_i2c_eeprom_get_prev_addr(eeprom));
+
+ /* Offset length 2 */
+ sandbox_i2c_eeprom_set_offset_len(eeprom, 2);
+ sandbox_i2c_eeprom_set_chip_addr_offset_mask(eeprom, 0x3);
+ ut_assertok(i2c_set_chip_offset_len(dev, 2));
+ ut_assertok(i2c_set_chip_addr_offset_mask(dev, 0x3));
+ ut_assertok(dm_i2c_write(dev, 0x32020, (uint8_t *)"AB", 2));
+ ut_assertok(dm_i2c_read(dev, 0x32020, buf, 5));
+ ut_asserteq_mem("AB\0\0\0\0", buf, sizeof(buf));
+ ut_asserteq(0x32020, sanbox_i2c_eeprom_get_prev_offset(eeprom));
+ ut_asserteq(chip | 0x3, sanbox_i2c_eeprom_get_prev_addr(eeprom));
+
+ /* Offset length 3 */
+ sandbox_i2c_eeprom_set_offset_len(eeprom, 3);
+ sandbox_i2c_eeprom_set_chip_addr_offset_mask(eeprom, 0x3);
+ ut_assertok(i2c_set_chip_offset_len(dev, 3));
+ ut_assertok(i2c_set_chip_addr_offset_mask(dev, 0x3));
+ ut_assertok(dm_i2c_write(dev, 0x3303030, (uint8_t *)"AB", 2));
+ ut_assertok(dm_i2c_read(dev, 0x3303030, buf, 5));
+ ut_asserteq_mem("AB\0\0\0\0", buf, sizeof(buf));
+ ut_asserteq(0x3303030, sanbox_i2c_eeprom_get_prev_offset(eeprom));
+ ut_asserteq(chip | 0x3, sanbox_i2c_eeprom_get_prev_addr(eeprom));
+
+ /* Restore defaults */
+ sandbox_i2c_eeprom_set_offset_len(eeprom, 1);
+ sandbox_i2c_eeprom_set_chip_addr_offset_mask(eeprom, 0);
+
+ return 0;
+}
+
+DM_TEST(dm_test_i2c_addr_offset, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);