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authorAndrew Scull <ascull@google.com>2022-04-21 16:11:09 +0000
committerTom Rini <trini@konsulko.com>2022-05-03 15:50:46 -0400
commit55e6adbd78fcfcbd5c2e291ae1f5da3b107cb388 (patch)
tree6d7f63d10c3273f40a57191c22fbabfd22346eac /test
parent398dc367c53dcff4f61116a3de66ba4e4e6b8586 (diff)
test: pci: Test PCI address conversion functions
Add tests for the functions dm_pci_bus_to_phys() and dm_pci_phys_to_bus() which convert between PCI bus addresses and physical addresses based on the ranges declared for the PCI controller. The ranges of bus#1 are used for the tests, adding a translation to one of the ranges to cover more cases. Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'test')
-rw-r--r--test/dm/pci.c102
1 files changed, 102 insertions, 0 deletions
diff --git a/test/dm/pci.c b/test/dm/pci.c
index 00e4440a9d..eff599ef32 100644
--- a/test/dm/pci.c
+++ b/test/dm/pci.c
@@ -376,3 +376,105 @@ static int dm_test_pci_region_multi(struct unit_test_state *uts)
return 0;
}
DM_TEST(dm_test_pci_region_multi, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+
+/*
+ * Test the translation of PCI bus addresses to physical addresses using the
+ * ranges from bus#1.
+ */
+static int dm_test_pci_bus_to_phys(struct unit_test_state *uts)
+{
+ struct udevice *dev;
+ phys_addr_t phys_addr;
+
+ ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x08, 0), &dev));
+
+ /* Before any of the ranges. */
+ phys_addr = dm_pci_bus_to_phys(dev, 0x20000000, 0x400, PCI_REGION_MEM);
+ ut_asserteq(0, phys_addr);
+
+ /* Identity range: whole, start, mid, end */
+ phys_addr = dm_pci_bus_to_phys(dev, 0x2ffff000, 0x2000, PCI_REGION_MEM);
+ ut_asserteq(0, phys_addr);
+ phys_addr = dm_pci_bus_to_phys(dev, 0x30000000, 0x2000, PCI_REGION_MEM);
+ ut_asserteq(0x30000000, phys_addr);
+ phys_addr = dm_pci_bus_to_phys(dev, 0x30000000, 0x1000, PCI_REGION_MEM);
+ ut_asserteq(0x30000000, phys_addr);
+ phys_addr = dm_pci_bus_to_phys(dev, 0x30000abc, 0x12, PCI_REGION_MEM);
+ ut_asserteq(0x30000abc, phys_addr);
+ phys_addr = dm_pci_bus_to_phys(dev, 0x30000800, 0x1800, PCI_REGION_MEM);
+ ut_asserteq(0x30000800, phys_addr);
+ phys_addr = dm_pci_bus_to_phys(dev, 0x30008000, 0x1801, PCI_REGION_MEM);
+ ut_asserteq(0, phys_addr);
+
+ /* Translated range: whole, start, mid, end */
+ phys_addr = dm_pci_bus_to_phys(dev, 0x30fff000, 0x2000, PCI_REGION_MEM);
+ ut_asserteq(0, phys_addr);
+ phys_addr = dm_pci_bus_to_phys(dev, 0x31000000, 0x2000, PCI_REGION_MEM);
+ ut_asserteq(0x3e000000, phys_addr);
+ phys_addr = dm_pci_bus_to_phys(dev, 0x31000000, 0x1000, PCI_REGION_MEM);
+ ut_asserteq(0x3e000000, phys_addr);
+ phys_addr = dm_pci_bus_to_phys(dev, 0x31000abc, 0x12, PCI_REGION_MEM);
+ ut_asserteq(0x3e000abc, phys_addr);
+ phys_addr = dm_pci_bus_to_phys(dev, 0x31000800, 0x1800, PCI_REGION_MEM);
+ ut_asserteq(0x3e000800, phys_addr);
+ phys_addr = dm_pci_bus_to_phys(dev, 0x31008000, 0x1801, PCI_REGION_MEM);
+ ut_asserteq(0, phys_addr);
+
+ /* Beyond all of the ranges. */
+ phys_addr = dm_pci_bus_to_phys(dev, 0x32000000, 0x400, PCI_REGION_MEM);
+ ut_asserteq(0, phys_addr);
+
+ return 0;
+}
+DM_TEST(dm_test_pci_bus_to_phys, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+
+/*
+ * Test the translation of physical addresses to PCI bus addresses using the
+ * ranges from bus#1.
+ */
+static int dm_test_pci_phys_to_bus(struct unit_test_state *uts)
+{
+ struct udevice *dev;
+ pci_addr_t pci_addr;
+
+ ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x08, 0), &dev));
+
+ /* Before any of the ranges. */
+ pci_addr = dm_pci_phys_to_bus(dev, 0x20000000, 0x400, PCI_REGION_MEM);
+ ut_asserteq(0, pci_addr);
+
+ /* Identity range: partial overlap, whole, start, mid, end */
+ pci_addr = dm_pci_phys_to_bus(dev, 0x2ffff000, 0x2000, PCI_REGION_MEM);
+ ut_asserteq(0, pci_addr);
+ pci_addr = dm_pci_phys_to_bus(dev, 0x30000000, 0x2000, PCI_REGION_MEM);
+ ut_asserteq(0x30000000, pci_addr);
+ pci_addr = dm_pci_phys_to_bus(dev, 0x30000000, 0x1000, PCI_REGION_MEM);
+ ut_asserteq(0x30000000, pci_addr);
+ pci_addr = dm_pci_phys_to_bus(dev, 0x30000abc, 0x12, PCI_REGION_MEM);
+ ut_asserteq(0x30000abc, pci_addr);
+ pci_addr = dm_pci_phys_to_bus(dev, 0x30000800, 0x1800, PCI_REGION_MEM);
+ ut_asserteq(0x30000800, pci_addr);
+ pci_addr = dm_pci_phys_to_bus(dev, 0x30008000, 0x1801, PCI_REGION_MEM);
+ ut_asserteq(0, pci_addr);
+
+ /* Translated range: partial overlap, whole, start, mid, end */
+ pci_addr = dm_pci_phys_to_bus(dev, 0x3dfff000, 0x2000, PCI_REGION_MEM);
+ ut_asserteq(0, pci_addr);
+ pci_addr = dm_pci_phys_to_bus(dev, 0x3e000000, 0x2000, PCI_REGION_MEM);
+ ut_asserteq(0x31000000, pci_addr);
+ pci_addr = dm_pci_phys_to_bus(dev, 0x3e000000, 0x1000, PCI_REGION_MEM);
+ ut_asserteq(0x31000000, pci_addr);
+ pci_addr = dm_pci_phys_to_bus(dev, 0x3e000abc, 0x12, PCI_REGION_MEM);
+ ut_asserteq(0x31000abc, pci_addr);
+ pci_addr = dm_pci_phys_to_bus(dev, 0x3e000800, 0x1800, PCI_REGION_MEM);
+ ut_asserteq(0x31000800, pci_addr);
+ pci_addr = dm_pci_phys_to_bus(dev, 0x3e008000, 0x1801, PCI_REGION_MEM);
+ ut_asserteq(0, pci_addr);
+
+ /* Beyond all of the ranges. */
+ pci_addr = dm_pci_phys_to_bus(dev, 0x3f000000, 0x400, PCI_REGION_MEM);
+ ut_asserteq(0, pci_addr);
+
+ return 0;
+}
+DM_TEST(dm_test_pci_phys_to_bus, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);