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authorClaudiu Beznea <claudiu.beznea@microchip.com>2020-09-07 17:46:34 +0300
committerEugen Hristev <eugen.hristev@microchip.com>2020-09-22 11:27:18 +0300
commit4d139f3838b4ee48d7df9ca9c37ccd1a57202a52 (patch)
treecfb9c112684b3421dbe7b396193f2eb1661fe5f8 /test/dm
parentcfecbaf4e768991056a88d3a7a3daf4b4baf8038 (diff)
clk: bind clk to new parent device
Clock re-parenting is not binding the clock's device to its new parent device, it only calls the clock's ops->set_parent() API. The changes in this commit re-parent the clock device to its new parent so that subsequent operations like clk_get_parent() to point to the proper parent. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'test/dm')
-rw-r--r--test/dm/clk_ccf.c27
1 files changed, 27 insertions, 0 deletions
diff --git a/test/dm/clk_ccf.c b/test/dm/clk_ccf.c
index 32bc4d2b8a..1ce28d747d 100644
--- a/test/dm/clk_ccf.c
+++ b/test/dm/clk_ccf.c
@@ -22,6 +22,10 @@ static int dm_test_clk_ccf(struct unit_test_state *uts)
struct udevice *dev;
long long rate;
int ret;
+#if CONFIG_IS_ENABLED(CLK_CCF)
+ const char *clkname;
+ int clkid;
+#endif
/* Get the device using the clk device */
ut_assertok(uclass_get_device_by_name(UCLASS_CLK, "clk-ccf", &dev));
@@ -130,6 +134,29 @@ static int dm_test_clk_ccf(struct unit_test_state *uts)
ret = sandbox_clk_enable_count(pclk);
ut_asserteq(ret, 0);
+
+ /* Test clock re-parenting. */
+ ret = clk_get_by_id(SANDBOX_CLK_USDHC1_SEL, &clk);
+ ut_assertok(ret);
+ ut_asserteq_str("usdhc1_sel", clk->dev->name);
+
+ pclk = clk_get_parent(clk);
+ ut_assertok_ptr(pclk);
+ if (!strcmp(pclk->dev->name, "pll3_60m")) {
+ clkname = "pll3_80m";
+ clkid = SANDBOX_CLK_PLL3_80M;
+ } else {
+ clkname = "pll3_60m";
+ clkid = SANDBOX_CLK_PLL3_60M;
+ }
+
+ ret = clk_get_by_id(clkid, &pclk);
+ ut_assertok(ret);
+ ret = clk_set_parent(clk, pclk);
+ ut_assertok(ret);
+ pclk = clk_get_parent(clk);
+ ut_assertok_ptr(pclk);
+ ut_asserteq_str(clkname, pclk->dev->name);
#endif
return 1;