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author | Michael Heimpold <mhei@heimpold.de> | 2015-11-15 22:47:12 +0100 |
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committer | Stefano Babic <sbabic@denx.de> | 2015-12-01 16:05:24 +0100 |
commit | a6b1e25fc6f9ad3a392526414acb1c3c36eccd0f (patch) | |
tree | b16844dc7c582b5a7a0a598288b5e23ead251f68 /net/eth.c | |
parent | 90447ef03cc7c2b59e9c1e0e8b5afba969c30f99 (diff) |
ARM: mxs: fix VDDD brownout setting
At the moment, the desired brownout is at 1.0V. However,
this setting cannot be realized by hardware since we have
only 3 bits to represent the voltage difference from the
target value.
Target value is 1500 mV, brownout target is 1000 mV,
voltage steps are 25 mV.
Register content calculation:
(1500 [mV] - 1000 [mV]) / 25 [mV] = 20 (decimal) = 0x14
Register takes only 3 bits, that is 0x4.
But 0x4 * 25 [mV] = 100 [mV], that means that actual
brownout level is 1500 [mV] - 100 [mV] = 1.4 V.
Minimum possible BO level is
1500 [mV] - 0x7 * 25 [mV] = 1315 [mV].
So lets use this value as desired BO value (which is
also the same as FSL bootlets use).
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'net/eth.c')
0 files changed, 0 insertions, 0 deletions