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| author | Mike Frysinger <vapier@gentoo.org> | 2009-04-04 08:10:22 -0400 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2009-04-06 17:37:48 -0400 |
| commit | 48ab1509254a4c175e4f65c478a978928ffe09ec (patch) | |
| tree | 16a43aec668305a3dce6e08be4fc5f1387574cfe /lib_blackfin | |
| parent | ce1fe4ba6bb9df7c57351436fa17d1af8bbe7916 (diff) | |
Blackfin: add workaround for anomaly 05000242
DESCRIPTION:
If the DF bit is set prior to a hardware reset, the PLL will continue to
divide CLKIN by 2 after the hardware reset, but the DF bit itself will be
cleared in the PLL_CTL register.
WORKAROUND:
Reprogram the PLL with DF cleared if the desire is to not divide CLKIN by
2 after reset.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'lib_blackfin')
0 files changed, 0 insertions, 0 deletions