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| author | Mattijs Korpershoek <mkorpershoek@baylibre.com> | 2023-06-22 10:34:18 +0200 |
|---|---|---|
| committer | Praneeth Bajjuri <praneeth@ti.com> | 2023-06-28 18:58:19 -0500 |
| commit | 9cb70fef623bb403185bb93859e83476f66d7308 (patch) | |
| tree | 2b4b436560b58d199358c92255ee19e3671f1e76 /lib | |
| parent | 3ed007668299e088c8c8d59115fc449822d81c1c (diff) | |
lib: sparse: allocate blkcnt instead of arbitrary small number
Commit 62649165cb02 ("lib: sparse: Make CHUNK_TYPE_RAW buffer aligned")
fixed cache alignment for systems with a D-CACHE.
However it introduced some performance regressions [1] on system
flashing huge images, such as Android.
On AM62x SK EVM, we also observe such performance penalty:
Sending sparse 'super' 1/2 (768793 KB) OKAY [ 23.954s]
Writing 'super' OKAY [ 75.926s]
Sending sparse 'super' 2/2 (629819 KB) OKAY [ 19.641s]
Writing 'super' OKAY [ 62.849s]
Finished. Total time: 182.474s
The reason for this is that we use an arbitrary small buffer
(info->blksz * 100) for transferring.
Fix it by using a bigger buffer (info->blksz * blkcnt) as suggested in
the original's patch review [2].
With this patch, performance impact is mitigated:
Sending sparse 'super' 1/2 (768793 KB) OKAY [ 24.006s]
Writing 'super' OKAY [ 15.920s]
Sending sparse 'super' 2/2 (629819 KB) OKAY [ 19.651s]
Writing 'super' OKAY [ 14.665s]
Finished. Total time: 74.346s
[1] https://lore.kernel.org/r/20221118121323.4009193-1-gary.bisson@boundarydevices.com
[2] https://lore.kernel.org/r/all/43e4c17c-4483-ec8e-f843-9b4c5569bd18@seco.com/
Fixes: 62649165cb02 ("lib: sparse: Make CHUNK_TYPE_RAW buffer aligned")
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/image-sparse.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/image-sparse.c b/lib/image-sparse.c index 5ec0f94ab3e..25aed060419 100644 --- a/lib/image-sparse.c +++ b/lib/image-sparse.c @@ -55,7 +55,7 @@ static lbaint_t write_sparse_chunk_raw(struct sparse_storage *info, void *data, char *response) { - lbaint_t n = blkcnt, write_blks, blks = 0, aligned_buf_blks = 100; + lbaint_t n = blkcnt, write_blks, blks = 0, aligned_buf_blks = blkcnt; uint32_t *aligned_buf = NULL; if (CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) { |