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authorPrabhakar Kushwaha <prabhakar@freescale.com>2013-05-17 13:40:52 +0530
committerAndy Fleming <afleming@freescale.com>2013-06-20 17:08:50 -0500
commit4d0e6e0d73daca57a9dc4abfb42d7e3cffe52985 (patch)
tree8079c4ad401a2c8aca19467f050eba79bdc3dbc8 /include
parent8212519254bc3ea94d959f56f10061849aa07b26 (diff)
board/b4860qds: Relax NOR flash teadc timing parameter
Relax parameters to give address latching more time to setup. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/B4860QDS.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index b45001a589..a823f9f3a7 100644
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -236,7 +236,7 @@ unsigned long get_board_ddr_clk(void);
/* NOR Flash Timing Params */
#define CONFIG_SYS_NOR_CSOR CSOR_NOR_ADM_SHIFT(4)
#define CONFIG_SYS_NOR_FTIM0 (FTIM0_NOR_TACSE(0x01) | \
- FTIM0_NOR_TEADC(0x01) | \
+ FTIM0_NOR_TEADC(0x04) | \
FTIM0_NOR_TEAHC(0x20))
#define CONFIG_SYS_NOR_FTIM1 (FTIM1_NOR_TACO(0x35) | \
FTIM1_NOR_TRAD_NOR(0x1A) |\