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authorKumar Gala <galak@kernel.crashing.org>2008-01-17 01:56:32 -0600
committerKumar Gala <galak@kernel.crashing.org>2008-01-17 02:11:17 -0600
commit74121b470c14f7eaf284ee838bffca6f9521069e (patch)
tree55351d6300952f88cc0f0fa191617fae8255b606 /include
parent143b518d9125b54f96f1d7f1afc640b8aae81ff0 (diff)
85xx: Convert STXGP3 & STXSSA to new TLB setup
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include')
-rw-r--r--include/configs/stxgp3.h1
-rw-r--r--include/configs/stxssa.h1
2 files changed, 2 insertions, 0 deletions
diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h
index 047e1cf99a3..d6d4c464d52 100644
--- a/include/configs/stxgp3.h
+++ b/include/configs/stxgp3.h
@@ -52,6 +52,7 @@
#define CONFIG_DDR_2T_TIMING /* Sets the 2T timing bit */
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
+#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
/* sysclk for MPC85xx
*/
diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h
index e09dd7163f7..21fb6f644cf 100644
--- a/include/configs/stxssa.h
+++ b/include/configs/stxssa.h
@@ -52,6 +52,7 @@
#define CONFIG_DDR_2T_TIMING /* Sets the 2T timing bit */
#define CONFIG_FSL_LAW 1 /* Use common FSL init code */
+#define CONFIG_FSL_INIT_TLBS 1 /* Use common FSL init code */
/* sysclk for MPC85xx
*/