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authorWolfgang Denk <wd@denx.de>2008-05-10 00:34:05 +0200
committerWolfgang Denk <wd@denx.de>2008-05-10 00:34:05 +0200
commitcfd60441d8360cb9ffa315ecf3a2aef9bc134905 (patch)
treef1478b2140c8524677f98c3236c6f8964d36788f /include
parentcce9cfdabcf416ecd2aacc3681c91e5378c75a3d (diff)
parenta5fe514e8ace564300d2c1d73846ddff49654243 (diff)
Merge branch 'master' of git://www.denx.de/git/u-boot-mpc83xx
Diffstat (limited to 'include')
-rw-r--r--include/configs/MPC8349EMDS.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 364ffac5ea1..cf552c2487a 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -602,6 +602,16 @@
HRCWH_TSEC2M_IN_GMII )
#endif
+/*
+ * System performance
+ */
+#define CFG_ACR_PIPE_DEP 3 /* Arbiter pipeline depth (0-3) */
+#define CFG_ACR_RPTCNT 3 /* Arbiter repeat count (0-7) */
+#define CFG_SPCR_TSEC1EP 3 /* TSEC1 emergency priority (0-3) */
+#define CFG_SPCR_TSEC2EP 3 /* TSEC2 emergency priority (0-3) */
+#define CFG_SCCR_TSEC1CM 1 /* TSEC1 clock mode (0-3) */
+#define CFG_SCCR_TSEC2CM 1 /* TSEC2 & I2C0 clock mode (0-3) */
+
/* System IO Config */
#define CFG_SICRH SICRH_TSOBI1
#define CFG_SICRL SICRL_LDP_A