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authorNick Thompson <nick.thompson@ge.com>2010-02-08 11:34:58 -0500
committerTom Rix <Tom.Rix@windriver.com>2010-02-12 12:31:54 -0600
commit6228e6389e5ef472d5f43cc5ec4f309323305638 (patch)
treedf2ab09e193eaf5bb9a560f35314262bdb3f73c5 /include
parentb74064a0e2984a166e3575852f3697ef5595a97b (diff)
Davinci: Add EMIF-A macros for setting chip select parameters
The patch adds EMIF-A macros for setting chip select parameters Signed-off-by: Nick Thompson <nick.thompson@ge.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/arch-davinci/emif_defs.h18
1 files changed, 17 insertions, 1 deletions
diff --git a/include/asm-arm/arch-davinci/emif_defs.h b/include/asm-arm/arch-davinci/emif_defs.h
index 8fd4e01b8e1..aa57703c686 100644
--- a/include/asm-arm/arch-davinci/emif_defs.h
+++ b/include/asm-arm/arch-davinci/emif_defs.h
@@ -24,7 +24,7 @@
#include <asm/arch/hardware.h>
-typedef struct {
+typedef struct davinci_emif_regs {
dv_reg ERCSR;
dv_reg AWCCR;
dv_reg SDBCR;
@@ -66,6 +66,9 @@ typedef struct {
typedef emif_registers *emifregs;
+#define davinci_emif_regs \
+ ((struct davinci_emif_regs *)DAVINCI_ASYNC_EMIF_CNTRL_BASE)
+
#define DAVINCI_NANDFCR_NAND_ENABLE(n) (1 << (n-2))
#define DAVINCI_NANDFCR_4BIT_ECC_SEL_MASK (3 << 4)
#define DAVINCI_NANDFCR_4BIT_ECC_SEL(n) ((n-2) << 4)
@@ -73,4 +76,17 @@ typedef emif_registers *emifregs;
#define DAVINCI_NANDFCR_4BIT_ECC_START (1 << 12)
#define DAVINCI_NANDFCR_4BIT_CALC_START (1 << 13)
+/* Chip Select setup */
+#define DAVINCI_ABCR_STROBE_SELECT (1 << 31)
+#define DAVINCI_ABCR_EXT_WAIT (1 << 30)
+#define DAVINCI_ABCR_WSETUP(n) (n << 26)
+#define DAVINCI_ABCR_WSTROBE(n) (n << 20)
+#define DAVINCI_ABCR_WHOLD(n) (n << 17)
+#define DAVINCI_ABCR_RSETUP(n) (n << 13)
+#define DAVINCI_ABCR_RSTROBE(n) (n << 7)
+#define DAVINCI_ABCR_RHOLD(n) (n << 4)
+#define DAVINCI_ABCR_TA(n) (n << 2)
+#define DAVINCI_ABCR_ASIZE_16BIT 1
+#define DAVINCI_ABCR_ASIZE_8BIT 0
+
#endif