diff options
| author | Sudhakar Rajashekhara <sudhakar.raj@ti.com> | 2009-04-16 04:44:48 -0400 |
|---|---|---|
| committer | Justin Waters <justin.waters@timesys.com> | 2009-09-09 14:03:25 -0400 |
| commit | 9ed1a2bf98dfd435d37bdb8f619b3425ad79b4d8 (patch) | |
| tree | a22d97653297658c19250df6e73dbea84a63b30e /include | |
| parent | e34a3f59ece4780f683fcac9a8a64c73374fd896 (diff) | |
Change the da850 configuration file to use SPI1 and UART2 instead of SPI0 and UART0. Also modify the SPI1 base address and SPI clock source. Change the UART and SPI related pinmux and LPSC in the board file.
These changes are as per the latest da850 schematics.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-arm/arch-da8xx/hardware.h | 3 | ||||
| -rw-r--r-- | include/configs/da850_evm.h | 8 |
2 files changed, 6 insertions, 5 deletions
diff --git a/include/asm-arm/arch-da8xx/hardware.h b/include/asm-arm/arch-da8xx/hardware.h index ec47ff49d4..3574971a50 100644 --- a/include/asm-arm/arch-da8xx/hardware.h +++ b/include/asm-arm/arch-da8xx/hardware.h @@ -58,7 +58,7 @@ #define DAVINCI_BOOTCFG_BASE (0x01c14000) #define DAVINCI_PSC1_BASE (0x01e27000) #define DAVINCI_SPI0_BASE (0x01c41000) -#define DAVINCI_SPI1_BASE (0x01e12000) +#define DAVINCI_SPI1_BASE (cpu_is_da830() ? 0x01e12000 : 0x01f0e000) #define DAVINCI_GPIO_BASE (0x01e26000) #define DAVINCI_EMAC_CNTRL_REGS_BASE (0x01e23000) #define DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE (0x01e22000) @@ -95,6 +95,7 @@ #define DAVINCI_AUXCLK_CLKID AUXCLK #define DAVINCI_MDIO_CLKID PLL0_SYSCLK4 #define DAVINCI_SPI0_CLKID PLL0_SYSCLK2 +#define DAVINCI_SPI1_CLKID (cpu_is_da830() ? PLL0_SYSCLK2 : ASYNC3) #define DAVINCI_UART0_CLKID PLL0_SYSCLK2 #define DAVINCI_UART2_CLKID (cpu_is_da830() ? PLL0_SYSCLK2 : ASYNC3) #define DAVINCI_ARM_CLKID PLL0_SYSCLK6 diff --git a/include/configs/da850_evm.h b/include/configs/da850_evm.h index ba0676d087..80046fb8a9 100644 --- a/include/configs/da850_evm.h +++ b/include/configs/da850_evm.h @@ -79,9 +79,9 @@ /* use first UART for console */ #define CONFIG_CONS_INDEX 1 /* Base address of console UART */ -#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART0_BASE +#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Input clock to NS16550 */ -#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART0_CLKID) +#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) /* Default baud rate */ #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } @@ -94,8 +94,8 @@ #define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_WINBOND #define CONFIG_DAVINCI_SPI -#define CFG_SPI_BASE DAVINCI_SPI0_BASE -#define CFG_SPI_CLK clk_get(DAVINCI_SPI0_CLKID) +#define CFG_SPI_BASE DAVINCI_SPI1_BASE +#define CFG_SPI_CLK clk_get(DAVINCI_SPI1_CLKID) #define CONFIG_SF_DEFAULT_SPEED 50000000 /*==================================*/ |