diff options
| author | Marek Vasut <marex@denx.de> | 2021-01-07 11:12:16 +0100 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-01-19 09:15:02 -0500 |
| commit | 6f1e668d964ebd3244a99288ea4bda7b7b8627c3 (patch) | |
| tree | 82bbff29e16835b84f4b089a4681c7a992915b30 /include | |
| parent | dd70ff481526a87f69bec732fcc402c60441560c (diff) | |
net: dwc_eth_qos: Pad descriptors to cacheline size
The DWMAC4 IP has the possibility to skip up to 7 AXI bus width size words
after the descriptor. Use this to pad the descriptors to cacheline size and
remove the need for noncached memory altogether. Moreover, this lets Tegra
use the generic cache flush / invalidate operations.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/stm32mp1.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp1.h index 1aa7514ac79..863b652ca4f 100644 --- a/include/configs/stm32mp1.h +++ b/include/configs/stm32mp1.h @@ -69,7 +69,6 @@ /* Ethernet need */ #ifdef CONFIG_DWC_ETH_QOS -#define CONFIG_SYS_NONCACHED_MEMORY (1 * SZ_1M) /* 1M */ #define CONFIG_SERVERIP 192.168.1.1 #define CONFIG_BOOTP_SERVERIP #define CONFIG_SYS_AUTOLOAD "no" |