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authorRoger Quadros <rogerq@kernel.org>2022-02-02 13:21:36 +0200
committerPraneeth Bajjuri <praneeth@ti.com>2022-02-02 16:22:01 -0600
commita92af887be23d4935d6b05ccdc7a0b0d6a752485 (patch)
treeebcb5d4324540cd69f2f77363967b0768ddffe49 /include
parentcb5e0eb1512c49a54ec01c72efbd00b44d8e2bde (diff)
mtd: rawnand: Add quirk to avoid 8-bit and 16-bit reads
Some platforms (e.g. TI AM64) have a limitation that 8-bit and 16-bit reads do not behave correctly. We need to force 32-bit reads on such platforms. Try to use read_buf() ops as much as possible as platform driver can take care of the quirk. For other places where we cannot use read_buf() use the quirk flag to limit to 32-bit read. There are still 2 places where read_byte/read_word is still in use - nand_block_bad() - nand_status_op() A more proper fix will be to move to exec_op() like interface in the kernel. But for now that might be an overkill. Signed-off-by: Roger Quadros <rogerq@kernel.org>
Diffstat (limited to 'include')
-rw-r--r--include/linux/mtd/rawnand.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index 66febc6b72..d110f0109e 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -783,6 +783,10 @@ nand_get_sdr_timings(const struct nand_data_interface *conf)
return &conf->timings.sdr;
}
+/* NAND Controller Quirks */
+
+#define NAND_QUIRK_FORCE_32BIT_READS BIT(0)
+
/**
* struct nand_chip - NAND Private Flash Chip Data
* @mtd: MTD device registered to the MTD framework
@@ -884,6 +888,7 @@ nand_get_sdr_timings(const struct nand_data_interface *conf)
* devices.
* @priv: [OPTIONAL] pointer to private chip data
* @write_page: [REPLACEABLE] High-level page write function
+ * @quirks: Platform specific quirks
*/
struct nand_chip {
@@ -968,6 +973,7 @@ struct nand_chip {
struct nand_bbt_descr *badblock_pattern;
void *priv;
+ u32 quirks;
};
static inline void nand_set_flash_node(struct nand_chip *chip,