diff options
| author | York Sun <york.sun@nxp.com> | 2018-01-29 10:24:08 -0800 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2018-01-30 09:14:07 -0800 |
| commit | 564e9383e53b567114bd3403246c0759a6d69c50 (patch) | |
| tree | 2350bb47536eac77f3cd4c9f3f866abc345f5516 /include | |
| parent | c0c32af0b2f037e3e167c7ac82e7110ebae48fb5 (diff) | |
drivers/ddr/fsl: Add calculation of register control words
DDR4 RDIMM has some information in SPD to be used to calculate the
control words for register chip. The rest can be found from JEDEC
spec DDR4RCD02.
Signed-off-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/ddr_spd.h | 8 | ||||
| -rw-r--r-- | include/fsl_ddr_dimm_params.h | 2 |
2 files changed, 6 insertions, 4 deletions
diff --git a/include/ddr_spd.h b/include/ddr_spd.h index d71cd9ab3c..20dc9ea1a6 100644 --- a/include/ddr_spd.h +++ b/include/ddr_spd.h @@ -382,9 +382,11 @@ struct ddr4_spd_eeprom_s { /* 135 Register Revision Number */ uint8_t reg_rev; /* 136 Address mapping from register to DRAM */ - uint8_t reg_map; - /* 137~253 Reserved */ - uint8_t res_137[254-137]; + u8 reg_map; + u8 ca_stren; + u8 clk_stren; + /* 139~253 Reserved */ + u8 res_137[254 - 139]; /* 254~255 CRC */ uint8_t crc[2]; } registered; diff --git a/include/fsl_ddr_dimm_params.h b/include/fsl_ddr_dimm_params.h index c6c819ea0a..1f78ea2d86 100644 --- a/include/fsl_ddr_dimm_params.h +++ b/include/fsl_ddr_dimm_params.h @@ -106,7 +106,7 @@ typedef struct dimm_params_s { int tqhs_ps; /* byte 45, spd->tqhs */ #endif - /* DDR3 RDIMM */ + /* DDR3 & DDR4 RDIMM */ unsigned char rcw[16]; /* Register Control Word 0-15 */ #ifdef CONFIG_SYS_FSL_DDR4 unsigned int dq_mapping[18]; |