diff options
| author | Apurva Nandan <a-nandan@ti.com> | 2023-01-23 23:13:24 +0530 |
|---|---|---|
| committer | Praneeth Bajjuri <praneeth@ti.com> | 2023-01-25 14:10:19 -0600 |
| commit | 0fe571ec013cb4ed43057da05ff579f7254bd441 (patch) | |
| tree | f085359db887e039b82fa48112fe2e6681db2122 /include | |
| parent | da46b8df652c20387a1c11346af524987a4e8420 (diff) | |
mtd: spinand: Allow enabling Octal DTR mode in the core
Enable Octal DTR SPI mode, i.e. 8D-8D-8D mode, if the SPI NAND flash
device supports it. Mixed OSPI (1S-1S-8S & 1S-8S-8S), mixed DTR modes
(1S-1D-8D), etc. aren't supported yet.
The method to switch to Octal DTR SPI mode may vary across
manufacturers. For example, for Winbond, it is enabled by writing
values to the volatile configuration register. So, let the
manufacturer's code have their own implementation for switching to
Octal DTR SPI mode.
Check for the SPI NAND device's support for Octal DTR mode using
spinand flags, and if the data_ops and ctrl_ops are 8D-8D-8D, call
change_mode() manufacturer op. If the SPI controller doesn't
supports these modes, the selected data_ops and ctrl_ops will
prevent switching to the Octal DTR mode. And finally update the
spinand protocol and ctrl_ops on success.
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/mtd/spinand.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h index ff129d2a2e..fb75fda470 100644 --- a/include/linux/mtd/spinand.h +++ b/include/linux/mtd/spinand.h @@ -358,6 +358,7 @@ struct spinand_ecc_info { #define SPINAND_HAS_QE_BIT BIT(0) #define SPINAND_HAS_CR_FEAT_BIT BIT(1) +#define SPINAND_HAS_OCTAL_DTR_BIT BIT(2) /** * struct spinand_info - Structure used to describe SPI NAND chips |