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authorWenyou.Yang@microchip.com <Wenyou.Yang@microchip.com>2017-07-21 14:04:47 +0800
committerTom Rini <trini@konsulko.com>2017-08-04 20:38:36 -0400
commit0dfe3ffe0b734ce0bea82d2a3a62cdd734333fd3 (patch)
treef542a44ca212f718e34ebb337e7bceea8b3d9bb3 /include
parentf166af88a898601f24c490aa8e2b555cfc2dfc91 (diff)
board: pm9263: Update to support DT and DM
Update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include')
-rw-r--r--include/configs/pm9263.h30
1 files changed, 6 insertions, 24 deletions
diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h
index d24280cf8d..f7a5551072 100644
--- a/include/configs/pm9263.h
+++ b/include/configs/pm9263.h
@@ -154,11 +154,6 @@
/*
* Hardware drivers
*/
-#define CONFIG_AT91_GPIO 1
-#define CONFIG_ATMEL_USART 1
-#define CONFIG_USART_BASE ATMEL_BASE_DBGU
-#define CONFIG_USART_ID ATMEL_ID_SYS
-
/* LCD */
#define LCD_BPP LCD_COLOR8
#define CONFIG_LCD_LOGO 1
@@ -170,12 +165,6 @@
#define CONFIG_LCD_IN_PSRAM 1
-/* LED */
-#define CONFIG_AT91_LED
-#define CONFIG_RED_LED GPIO_PIN_PB(7) /* this is the power led */
-#define CONFIG_GREEN_LED GPIO_PIN_PB(8) /* this is the user1 led */
-
-
/*
* BOOTP options
*/
@@ -189,15 +178,6 @@
#define PHYS_SDRAM 0x20000000
#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
-/* DataFlash */
-#define CONFIG_ATMEL_DATAFLASH_SPI
-#define CONFIG_HAS_DATAFLASH 1
-#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
-#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
-#define AT91_SPI_CLK 15000000
-#define DATAFLASH_TCSS (0x1a << 16)
-#define DATAFLASH_TCHS (0x1 << 24)
-
/* NOR flash, if populated */
#define CONFIG_SYS_FLASH_CFI 1
#define CONFIG_FLASH_CFI_DRIVER 1
@@ -263,11 +243,13 @@
#ifdef CONFIG_SYS_USE_DATAFLASH
/* bootstrap + u-boot + env + linux in dataflash on CS0 */
-#define CFG_MONITOR_BASE (CFG_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
#define CONFIG_ENV_OFFSET 0x4200
-#define CONFIG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
#define CONFIG_ENV_SIZE 0x4200
-#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm"
+#define CONFIG_ENV_SECT_SIZE 0x210
+#define CONFIG_ENV_SPI_MAX_HZ 15000000
+#define CONFIG_BOOTCOMMAND "sf probe 0; " \
+ "sf read 0x22000000 0x84000 0x294000; " \
+ "bootm 0x22000000"
#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
"root=/dev/mtdblock0 " \
"mtdparts=atmel_nand:-(root) "\
@@ -356,7 +338,7 @@
#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - \
GENERATED_GBL_DATA_SIZE)
#endif