Merge git://git.denx.de/u-boot-fsl-qoriq

18 files changed, 129 insertions, 21 deletions

diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index b1b672547b..25e6c1f6ad 100644
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -571,7 +571,6 @@ unsigned long get_board_ddr_clk(void);
 
 /* Qman/Bman */
 #ifndef CONFIG_NOBQFMAN
-#define CONFIG_SYS_DPAA_QBMAN		/* Support Q/Bman */
 #define CONFIG_SYS_BMAN_NUM_PORTALS	25
 #define CONFIG_SYS_BMAN_MEM_BASE	0xf4000000
 #ifdef CONFIG_PHYS_64BIT
diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h
index 17ae6cfd40..1863bec33c 100644
--- a/include/configs/P1023RDB.h
+++ b/include/configs/P1023RDB.h
@@ -270,7 +270,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_LOADADDR		1000000
 
 /* Qman/Bman */
-#define CONFIG_SYS_DPAA_QBMAN		/* support Q/Bman */
 #define CONFIG_SYS_QMAN_MEM_BASE	0xff000000
 #define CONFIG_SYS_QMAN_MEM_PHYS	CONFIG_SYS_QMAN_MEM_BASE
 #define CONFIG_SYS_QMAN_MEM_SIZE	0x00200000
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 8e71fdfecd..6b9f366502 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -437,7 +437,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_PCIE3_IO_SIZE	0x00010000	/* 64k */
 
 /* Qman/Bman */
-#define CONFIG_SYS_DPAA_QBMAN		/* Support Q/Bman */
 #define CONFIG_SYS_BMAN_NUM_PORTALS	10
 #define CONFIG_SYS_BMAN_MEM_BASE	0xf4000000
 #ifdef CONFIG_PHYS_64BIT
diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h
index dd3cd6ecc6..2354dc8527 100644
--- a/include/configs/T102xQDS.h
+++ b/include/configs/T102xQDS.h
@@ -641,7 +641,6 @@ unsigned long get_board_ddr_clk(void);
 
 /* Qman/Bman */
 #ifndef CONFIG_NOBQFMAN
-#define CONFIG_SYS_DPAA_QBMAN		/* Support Q/Bman */
 #define CONFIG_SYS_BMAN_NUM_PORTALS	10
 #define CONFIG_SYS_BMAN_MEM_BASE	0xf4000000
 #ifdef CONFIG_PHYS_64BIT
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index 791c6ef1b3..733e44f75c 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -648,7 +648,6 @@ unsigned long get_board_ddr_clk(void);
 
 /* Qman/Bman */
 #ifndef CONFIG_NOBQFMAN
-#define CONFIG_SYS_DPAA_QBMAN		/* Support Q/Bman */
 #define CONFIG_SYS_BMAN_NUM_PORTALS	10
 #define CONFIG_SYS_BMAN_MEM_BASE	0xf4000000
 #ifdef CONFIG_PHYS_64BIT
diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index fb79b6a559..e96d3a0d92 100644
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -531,7 +531,6 @@ unsigned long get_board_ddr_clk(void);
 
 /* Qman/Bman */
 #ifndef CONFIG_NOBQFMAN
-#define CONFIG_SYS_DPAA_QBMAN		/* Support Q/Bman */
 #define CONFIG_SYS_BMAN_NUM_PORTALS	10
 #define CONFIG_SYS_BMAN_MEM_BASE	0xf4000000
 #define CONFIG_SYS_BMAN_MEM_PHYS	0xff4000000ull
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index ceb9daaac2..1231c1a6a5 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -641,7 +641,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
 
 /* Qman/Bman */
 #ifndef CONFIG_NOBQFMAN
-#define CONFIG_SYS_DPAA_QBMAN		/* Support Q/Bman */
 #define CONFIG_SYS_BMAN_NUM_PORTALS	10
 #define CONFIG_SYS_BMAN_MEM_BASE	0xf4000000
 #define CONFIG_SYS_BMAN_MEM_PHYS	0xff4000000ull
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index 43fcc6f5dd..6fbac5f9f6 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -534,7 +534,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_PCIE2		/* PCIE controller 2 */
 #define CONFIG_PCIE3		/* PCIE controller 3 */
 #define CONFIG_PCIE4		/* PCIE controller 4 */
-#define CONFIG_FSL_PCIE_RESET
+#define CONFIG_FSL_PCIE_RESET   /* pcie reset fix link width 2x-4x*/
 #define CONFIG_FSL_PCI_INIT	/* Use common FSL init code */
 #define CONFIG_SYS_PCI_64BIT	/* enable 64-bit PCI resources */
 /* controller 1, direct to uli, tgtid 3, Base address 20000 */
@@ -578,13 +578,11 @@ unsigned long get_board_ddr_clk(void);
 
 #ifdef CONFIG_PCI
 #define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_FSL_PCIE_RESET	   /* need PCIe reset errata */
 #define CONFIG_PCI_SCAN_SHOW	/* show pci devices on startup */
 #endif
 
 /* Qman/Bman */
 #ifndef CONFIG_NOBQFMAN
-#define CONFIG_SYS_DPAA_QBMAN		/* Support Q/Bman */
 #define CONFIG_SYS_BMAN_NUM_PORTALS	18
 #define CONFIG_SYS_BMAN_MEM_BASE	0xf4000000
 #define CONFIG_SYS_BMAN_MEM_PHYS	0xff4000000ull
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index e1c57de2af..85bda94b57 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -522,7 +522,6 @@ unsigned long get_board_ddr_clk(void);
 
 /* Qman/Bman */
 #ifndef CONFIG_NOBQFMAN
-#define CONFIG_SYS_DPAA_QBMAN		/* Support Q/Bman */
 #define CONFIG_SYS_BMAN_NUM_PORTALS	18
 #define CONFIG_SYS_BMAN_MEM_BASE	0xf4000000
 #define CONFIG_SYS_BMAN_MEM_PHYS	0xff4000000ull
diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h
index 099e9e1d94..73e91bc9fa 100644
--- a/include/configs/T4240QDS.h
+++ b/include/configs/T4240QDS.h
@@ -381,7 +381,6 @@ unsigned long get_board_ddr_clk(void);
 
 /* Qman/Bman */
 #ifndef CONFIG_NOBQFMAN
-#define CONFIG_SYS_DPAA_QBMAN		/* Support Q/Bman */
 #define CONFIG_SYS_BMAN_NUM_PORTALS	50
 #define CONFIG_SYS_BMAN_MEM_BASE	0xf4000000
 #define CONFIG_SYS_BMAN_MEM_PHYS	0xff4000000ull
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index ecf7f64659..b63c38c8b5 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -542,7 +542,6 @@ unsigned long get_board_ddr_clk(void);
 
 /* Qman/Bman */
 #ifndef CONFIG_NOBQFMAN
-#define CONFIG_SYS_DPAA_QBMAN		/* Support Q/Bman */
 #define CONFIG_SYS_BMAN_NUM_PORTALS	50
 #define CONFIG_SYS_BMAN_MEM_BASE	0xf4000000
 #define CONFIG_SYS_BMAN_MEM_PHYS	0xff4000000ull
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index de9bc532fe..0e9dae63c7 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -453,7 +453,6 @@
 #define CONFIG_SYS_PCIE4_IO_SIZE	0x00010000	/* 64k */
 
 /* Qman/Bman */
-#define CONFIG_SYS_DPAA_QBMAN		/* Support Q/Bman */
 #define CONFIG_SYS_BMAN_NUM_PORTALS	10
 #define CONFIG_SYS_BMAN_MEM_BASE	0xf4000000
 #ifdef CONFIG_PHYS_64BIT
diff --git a/include/configs/cyrus.h b/include/configs/cyrus.h
index 942fbe2849..e413b5158c 100644
--- a/include/configs/cyrus.h
+++ b/include/configs/cyrus.h
@@ -316,7 +316,6 @@
 #define CONFIG_SYS_PCIE4_IO_SIZE	0x00010000	/* 64k */
 
 /* Qman/Bman */
-#define CONFIG_SYS_DPAA_QBMAN		/* Support Q/Bman */
 #define CONFIG_SYS_BMAN_NUM_PORTALS	10
 #define CONFIG_SYS_BMAN_MEM_BASE	0xf4000000
 #ifdef CONFIG_PHYS_64BIT
diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h
index 6aa2b9d3cc..a0c932a2fa 100644
--- a/include/configs/km/kmp204x-common.h
+++ b/include/configs/km/kmp204x-common.h
@@ -296,7 +296,6 @@ int get_scl(void);
 #define CONFIG_SYS_PCIE3_IO_SIZE	0x00010000	/* 64k */
 
 /* Qman/Bman */
-#define CONFIG_SYS_DPAA_QBMAN		/* Support Q/Bman */
 #define CONFIG_SYS_BMAN_NUM_PORTALS	10
 #define CONFIG_SYS_BMAN_MEM_BASE	0xf4000000
 #define CONFIG_SYS_BMAN_MEM_PHYS	0xff4000000ull
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index e208f7d2de..5c2ad696b6 100644
--- a/include/configs/ls1046a_common.h
+++ b/include/configs/ls1046a_common.h
@@ -155,10 +155,6 @@
 #endif
 #endif
 
-#ifndef SPL_NO_QBMAN
-#define CONFIG_SYS_DPAA_QBMAN		/* Support Q/Bman */
-#endif
-
 /* FMan ucode */
 #ifndef SPL_NO_FMAN
 #define CONFIG_SYS_DPAA_FMAN
diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h
index 6587296237..e68488416c 100644
--- a/include/configs/ls1088a_common.h
+++ b/include/configs/ls1088a_common.h
@@ -7,6 +7,19 @@
 #ifndef __LS1088_COMMON_H
 #define __LS1088_COMMON_H
 
+/* SPL build */
+#ifdef CONFIG_SPL_BUILD
+#define SPL_NO_BOARDINFO
+#define SPL_NO_QIXIS
+#define SPL_NO_PCI
+#define SPL_NO_ENV
+#define SPL_NO_RTC
+#define SPL_NO_USB
+#define SPL_NO_SATA
+#define SPL_NO_QSPI
+#define SPL_NO_IFC
+#undef CONFIG_DISPLAY_CPUINFO
+#endif
 
 #define CONFIG_REMAKE_ELF
 #define CONFIG_FSL_LAYERSCAPE
@@ -74,8 +87,10 @@
 #define CONFIG_BAUDRATE			115200
 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
 
+#if !defined(SPL_NO_IFC) || defined(CONFIG_TARGET_LS1088AQDS)
 /* IFC */
 #define CONFIG_FSL_IFC
+#endif
 
 /*
  * During booting, IFC is mapped at the region of 0x30000000.
@@ -172,6 +187,7 @@ unsigned long long get_qixis_addr(void);
 
 /* #define CONFIG_DISPLAY_CPUINFO */
 
+#ifndef SPL_NO_ENV
 /* Allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
 
@@ -211,6 +227,7 @@ unsigned long long get_qixis_addr(void);
 				" cp.b $kernel_start $kernel_load" \
 				" $kernel_size && bootm $kernel_load"
 #endif
+#endif
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
@@ -219,7 +236,9 @@ unsigned long long get_qixis_addr(void);
 #define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE /* Boot args buffer */
 #define CONFIG_SYS_LONGHELP
+#ifndef SPL_NO_ENV
 #define CONFIG_CMDLINE_EDITING		1
+#endif
 #define CONFIG_AUTO_COMPLETE
 #define CONFIG_SYS_MAXARGS		64	/* max command args */
 
@@ -235,7 +254,20 @@ unsigned long long get_qixis_addr(void);
 
 #define CONFIG_SYS_SPL_MALLOC_SIZE     0x00100000
 #define CONFIG_SYS_SPL_MALLOC_START    0x80200000
-#define CONFIG_SYS_MONITOR_LEN         (512 * 1024)
+
+#ifdef CONFIG_SECURE_BOOT
+#define CONFIG_U_BOOT_HDR_SIZE		(16 << 10)
+/*
+ * HDR would be appended at end of image and copied to DDR along
+ * with U-Boot image. Here u-boot max. size is 512K. So if binary
+ * size increases then increase this size in case of secure boot as
+ * it uses raw u-boot image instead of fit image.
+ */
+#define CONFIG_SYS_MONITOR_LEN         (0x100000 + CONFIG_U_BOOT_HDR_SIZE)
+#else
+#define CONFIG_SYS_MONITOR_LEN         0x100000
+#endif /* ifdef CONFIG_SECURE_BOOT */
+
 #endif
 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
 
diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h
index 1438bec1af..3c6c66624e 100644
--- a/include/configs/ls1088ardb.h
+++ b/include/configs/ls1088ardb.h
@@ -9,7 +9,9 @@
 
 #include "ls1088a_common.h"
 
+#ifndef SPL_NO_BOARDINFO
 #define CONFIG_DISPLAY_BOARDINFO_LATE
+#endif
 
 #define CONFIG_MISC_INIT_R
 
@@ -29,7 +31,9 @@
 #endif
 
 #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
+#ifndef CONFIG_SPL_BUILD
 #define CONFIG_QIXIS_I2C_ACCESS
+#endif
 #define SYS_NO_FLASH
 #undef CONFIG_CMD_IMLS
 #endif
@@ -97,7 +101,11 @@
 #define CONFIG_SYS_FLASH_BANKS_LIST	{ CONFIG_SYS_FLASH_BASE }
 #endif
 #endif
+
+#ifndef SPL_NO_IFC
 #define CONFIG_NAND_FSL_IFC
+#endif
+
 #define CONFIG_SYS_NAND_MAX_ECCPOS	256
 #define CONFIG_SYS_NAND_MAX_OOBFREE	2
 
@@ -139,7 +147,10 @@
 
 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
 
+#ifndef SPL_NO_QIXIS
 #define CONFIG_FSL_QIXIS
+#endif
+
 #define CONFIG_SYS_I2C_FPGA_ADDR	0x66
 #define QIXIS_LBMAP_SWITCH		2
 #define QIXIS_QMAP_MASK			0xe0
@@ -223,6 +234,8 @@
 #define I2C_RETIMER_ADDR		0x18
 #define I2C_MUX_CH_DEFAULT		0x8
 #define I2C_MUX_CH5			0xD
+
+#ifndef SPL_NO_RTC
 /*
 * RTC configuration
 */
@@ -230,6 +243,7 @@
 #define CONFIG_RTC_PCF8563 1
 #define CONFIG_SYS_I2C_RTC_ADDR         0x51  /* Channel 3*/
 #define CONFIG_CMD_DATE
+#endif
 
 /* EEPROM */
 #define CONFIG_ID_EEPROM
@@ -240,12 +254,14 @@
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	3
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
 
+#ifndef SPL_NO_QSPI
 /* QSPI device */
 #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
 #define CONFIG_FSL_QSPI
 #define FSL_QSPI_FLASH_SIZE		(1 << 26)
 #define FSL_QSPI_FLASH_NUM		2
 #endif
+#endif
 
 #define CONFIG_CMD_MEMINFO
 #define CONFIG_CMD_MEMTEST
@@ -260,6 +276,7 @@
 
 #define CONFIG_FSL_MEMAC
 
+#ifndef SPL_NO_ENV
 /* Initial environment variables */
 #if defined(CONFIG_QSPI_BOOT)
 #define MC_INIT_CMD				\
@@ -408,6 +425,7 @@
 #define CONFIG_ETHPRIME		"DPMAC1@xgmii"
 #define CONFIG_PHY_GIGE
 #endif
+#endif
 
 /*  MMC  */
 #ifdef CONFIG_MMC
@@ -415,6 +433,7 @@
 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
 #endif
 
+#ifndef SPL_NO_ENV
 #undef CONFIG_CMDLINE_EDITING
 #include <config_distro_defaults.h>
 
@@ -423,6 +442,7 @@
 	func(SCSI, scsi, 0) \
 	func(DHCP, dhcp, na)
 #include <config_distro_bootcmd.h>
+#endif
 
 #include <asm/fsl_secure_boot.h>
 
diff --git a/include/fsl_qbman.h b/include/fsl_qbman.h
new file mode 100644
index 0000000000..06262ec00f
--- /dev/null
+++ b/include/fsl_qbman.h
@@ -0,0 +1,75 @@
+/*
+ * Copyright 2017 NXP
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __FSL_QBMAN_H__
+#define __FSL_QBMAN_H__
+void fdt_fixup_qportals(void *blob);
+void fdt_fixup_bportals(void *blob);
+void inhibit_portals(void __iomem *addr, int max_portals,
+		     int arch_max_portals, int portal_cinh_size);
+void setup_qbman_portals(void);
+
+struct ccsr_qman {
+#ifdef CONFIG_SYS_FSL_QMAN_V3
+	u8	res0[0x200];
+#else
+	struct {
+		u32	qcsp_lio_cfg;	/* 0x0 - SW Portal n LIO cfg */
+		u32	qcsp_io_cfg;	/* 0x4 - SW Portal n IO cfg */
+		u32	res;
+		u32	qcsp_dd_cfg;	/* 0xc - SW Portal Dynamic Debug cfg */
+	} qcsp[32];
+#endif
+	/* Not actually reserved, but irrelevant to u-boot */
+	u8	res[0xbf8 - 0x200];
+	u32	ip_rev_1;
+	u32	ip_rev_2;
+	u32	fqd_bare;	/* FQD Extended Base Addr Register */
+	u32	fqd_bar;	/* FQD Base Addr Register */
+	u8	res1[0x8];
+	u32	fqd_ar;		/* FQD Attributes Register */
+	u8	res2[0xc];
+	u32	pfdr_bare;	/* PFDR Extended Base Addr Register */
+	u32	pfdr_bar;	/* PFDR Base Addr Register */
+	u8	res3[0x8];
+	u32	pfdr_ar;	/* PFDR Attributes Register */
+	u8	res4[0x4c];
+	u32	qcsp_bare;	/* QCSP Extended Base Addr Register */
+	u32	qcsp_bar;	/* QCSP Base Addr Register */
+	u8	res5[0x78];
+	u32	ci_sched_cfg;	/* Initiator Scheduling Configuration */
+	u32	srcidr;		/* Source ID Register */
+	u32	liodnr;		/* LIODN Register */
+	u8	res6[4];
+	u32	ci_rlm_cfg;	/* Initiator Read Latency Monitor Cfg */
+	u32	ci_rlm_avg;	/* Initiator Read Latency Monitor Avg */
+	u8	res7[0x2e8];
+#ifdef CONFIG_SYS_FSL_QMAN_V3
+	struct {
+		u32	qcsp_lio_cfg;	/* 0x0 - SW Portal n LIO cfg */
+		u32	qcsp_io_cfg;	/* 0x4 - SW Portal n IO cfg */
+		u32	res;
+		u32	qcsp_dd_cfg;	/* 0xc - SW Portal n Dynamic Debug cfg*/
+	} qcsp[50];
+#endif
+};
+
+struct ccsr_bman {
+	/* Not actually reserved, but irrelevant to u-boot */
+	u8	res[0xbf8];
+	u32	ip_rev_1;
+	u32	ip_rev_2;
+	u32	fbpr_bare;	/* FBPR Extended Base Addr Register */
+	u32	fbpr_bar;	/* FBPR Base Addr Register */
+	u8	res1[0x8];
+	u32	fbpr_ar;	/* FBPR Attributes Register */
+	u8	res2[0xf0];
+	u32	srcidr;		/* Source ID Register */
+	u32	liodnr;		/* LIODN Register */
+	u8	res7[0x2f4];
+};
+
+#endif /* __FSL_QBMAN_H__ */