diff options
| author | Stefan Agner <stefan.agner@toradex.com> | 2017-12-28 14:07:09 +0100 |
|---|---|---|
| committer | Stefan Agner <stefan.agner@toradex.com> | 2018-02-05 14:33:17 +0100 |
| commit | f0a1ceb6f5e2ab3b3618190541b1e7a9fd4c1e4a (patch) | |
| tree | 7c29ac54cc687a73fefc7d756b0acebf49b5b7cd /include | |
| parent | c80b3bfbe693d5a8851129f4878d0cd3a7325d13 (diff) | |
apalis-imx8: fix Ethernet
Make sure that all pins connected to the Micrel KSZ9031 PHY
are muxed. Properly reset the PHY after all muxing has been
applied. This makes sure that strapping is not overwritten by
the SoC default mux (particularly it makes sure that CLK125_NDO
is not driven low during reset).
Make sure to not use CONFIG_DM_ETH as it seems to break ETH
support as is.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/apalis-imx8.h | 26 |
1 files changed, 4 insertions, 22 deletions
diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index cae44d8d54..15e0d13f26 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -71,30 +71,12 @@ #define CONFIG_PHY_GIGE /* Support for 1000BASE-X */ #define CONFIG_PHYLIB -#define CONFIG_PHY_ATHEROS +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9031 -/* ENET0 connects AR8031 on CPU board, ENET1 connects to base board */ -#define CONFIG_FEC_ENET_DEV 0 - -#if (CONFIG_FEC_ENET_DEV == 0) #define IMX_FEC_BASE 0x5B040000 -#define CONFIG_FEC_MXC_PHYADDR 0x0 -#define CONFIG_ETHPRIME "eth0" -#elif (CONFIG_FEC_ENET_DEV == 1) -#define IMX_FEC_BASE 0x5B050000 -#define CONFIG_FEC_MXC_PHYADDR 0x1 -#define CONFIG_FEC_ENABLE_MAX7322 -#define CONFIG_ETHPRIME "eth1" -#endif - -/* ENET0 MDIO are shared */ -#define CONFIG_FEC_MXC_MDIO_BASE 0x5B040000 - -/* MAX7322 */ -#ifdef CONFIG_FEC_ENABLE_MAX7322 -#define CONFIG_MAX7322_I2C_ADDR 0x68 -#define CONFIG_MAX7322_I2C_BUS 2 /* I2C2 */ -#endif +#define CONFIG_FEC_MXC_PHYADDR 7 +#define CONFIG_ETHPRIME "FEC" /* Boot M4 */ #define M4_BOOT_ENV \ |