* Added support for both PCMCIA slots (at the same time!) on MPC8xxLABEL_2002_11_22_0015

* Patch by Rod Boyce, 21 Nov 2002:
  fix PCMCIA on MBX8xx board

* Patch by Pierre Aubert , 21 Nov 2002
  Add CFG_CPM_POST_WORD_ADDR to make the offset of the
  bootmode word in DPRAM configurable

6 files changed, 33 insertions, 118 deletions

diff --git a/include/asm-ppc/cpm_8260.h b/include/asm-ppc/cpm_8260.h
index 21451809b43..bf2e2a2cb62 100644
--- a/include/asm-ppc/cpm_8260.h
+++ b/include/asm-ppc/cpm_8260.h
@@ -136,7 +136,11 @@ typedef struct cpm_buf_desc {
 
 /* Parameter RAM offsets from the base.
 */
+#ifndef CFG_CPM_POST_WORD_ADDR
 #define CPM_POST_WORD_ADDR      0x80FC	/* steal a long at the end of SCC1 */
+#else
+#define CPM_POST_WORD_ADDR	CFG_CPM_POST_WORD_ADDR
+#endif
 #define PROFF_SCC1		((uint)0x8000)
 #define PROFF_SCC2		((uint)0x8100)
 #define PROFF_SCC3		((uint)0x8200)
diff --git a/include/commproc.h b/include/commproc.h
index 6357fe3b664..9608c4687d1 100644
--- a/include/commproc.h
+++ b/include/commproc.h
@@ -77,7 +77,11 @@
 
 #endif
 
+#ifndef CFG_CPM_POST_WORD_ADDR
 #define CPM_POST_WORD_ADDR	0x07FC
+#else
+#define CPM_POST_WORD_ADDR	CFG_CPM_POST_WORD_ADDR
+#endif
 
 #define BD_IIC_START	((uint) 0x0400) /* <- please use CPM_I2C_BASE !! */
 
diff --git a/include/configs/KUP4K.h b/include/configs/KUP4K.h
index 7c512ccd66c..6de004f79d7 100644
--- a/include/configs/KUP4K.h
+++ b/include/configs/KUP4K.h
@@ -270,7 +270,8 @@
  *
  */
 
-#define	CONFIG_PCMCIA_SLOT_B 1	/* KUP4K use SLOT_B	*/
+/* KUP4K use both slots, SLOT_A as "primary". */
+#define	CONFIG_PCMCIA_SLOT_A 1	
 
 #define CFG_PCMCIA_MEM_ADDR	(0xE0000000)
 #define CFG_PCMCIA_MEM_SIZE	( 64 << 20 )
@@ -281,6 +282,8 @@
 #define CFG_PCMCIA_IO_ADDR	(0xEC000000)
 #define CFG_PCMCIA_IO_SIZE	( 64 << 20 )
 
+#define PCMCIA_SOCKETS_NO 2
+#define PCMCIA_MEM_WIN_NO 8
 /*-----------------------------------------------------------------------
  * IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter)
  *-----------------------------------------------------------------------
@@ -292,11 +295,13 @@
 #undef	CONFIG_IDE_LED			/* LED   for ide not supported	*/
 #undef	CONFIG_IDE_RESET		/* reset for ide not supported	*/
 
-#define CFG_IDE_MAXBUS		1	/* max. 1 IDE bus		*/
-#define CFG_IDE_MAXDEVICE	1	/* max. 1 drive per IDE bus	*/
+#define CFG_IDE_MAXBUS		2
+#define CFG_IDE_MAXDEVICE	4
 
 #define CFG_ATA_IDE0_OFFSET	0x0000
 
+#define CFG_ATA_IDE1_OFFSET	(4 * CFG_PCMCIA_MEM_SIZE)
+
 #define CFG_ATA_BASE_ADDR	CFG_PCMCIA_MEM_ADDR
 
 /* Offset for data I/O			*/
diff --git a/include/configs/lwmon.h b/include/configs/lwmon.h
index a89633abb0d..53667c049c6 100644
--- a/include/configs/lwmon.h
+++ b/include/configs/lwmon.h
@@ -67,15 +67,16 @@
 #undef	CONFIG_BOOTARGS
 
 /* POST support */
-#define CONFIG_POST		(CFG_POST_CACHE | \
+#define CONFIG_POST		(CFG_POST_CACHE	   | \
 				 CFG_POST_WATCHDOG | \
-				 CFG_POST_RTC | \
-				 CFG_POST_MEMORY | \
-				 CFG_POST_CPU | \
-				 CFG_POST_UART | \
-				 CFG_POST_ETHER | \
-				 CFG_POST_SPI | \
-				 CFG_POST_USB | \
+				 CFG_POST_RTC	   | \
+				 CFG_POST_MEMORY   | \
+				 CFG_POST_CPU	   | \
+				 CFG_POST_UART	   | \
+				 CFG_POST_ETHER    | \
+				 CFG_POST_I2C	   | \
+				 CFG_POST_SPI	   | \
+				 CFG_POST_USB	   | \
 				 CFG_POST_SPR)
 
 #define CONFIG_BOOTCOMMAND	"run flash_self"
@@ -116,16 +117,11 @@
 #undef	CONFIG_STATUS_LED		/* Status LED disabled		*/
 
 /* enable I2C and select the hardware/software driver */
-#define CONFIG_HARD_I2C		1	/* I2C with hardware support	*/
-#undef	CONFIG_SOFT_I2C         	/* I2C bit-banged		*/
+#undef	CONFIG_HARD_I2C			/* I2C with hardware support	*/
+#define	CONFIG_SOFT_I2C         1	/* I2C bit-banged		*/
 
-#ifdef CONFIG_HARD_I2C
-/*
- * Hardware (CPM) I2C driver configuration
- */
-# define CFG_I2C_SPEED		93000	/* 93 kHz is supposed to work	*/
-# define CFG_I2C_SLAVE		0xFE
-#endif	/* CONFIG_HARD_I2C */
+#define CFG_I2C_SPEED		93000	/* 93 kHz is supposed to work	*/
+#define CFG_I2C_SLAVE		0xFE
 
 #ifdef CONFIG_SOFT_I2C
 /*
diff --git a/include/mpc75x.h b/include/mpc75x.h
deleted file mode 100644
index ddac6e44fd1..00000000000
--- a/include/mpc75x.h
+++ /dev/null
@@ -1,98 +0,0 @@
-/*
- * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Andreas Heppel <aheppel@sysgo.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * mpc75x.h
- *
- * MPC75x/MPC74xx specific definitions
- */
-
-#ifndef __MPC75X_H__
-#define __MPC75X_H__
-
-/*----------------------------------------------------------------
- * Exception offsets (PowerPC standard)
- */
-#define EXC_OFF_SYS_RESET        0x0100      /* default system reset offset */
-
-/*----------------------------------------------------------------
- * l2cr values
- */
-#define l2cr 1017
-
-#define L2CR_L2E         0x80000000 /* bit 0 - enable */
-#define L2CR_L2PE        0x40000000 /* bit 1 - data parity */
-#define L2CR_L2SIZ_2M    0x00000000 /* bits 2-3 - 2MB, MPC7400 only! */
-#define L2CR_L2SIZ_1M    0x30000000 /* ... 1MB */
-#define L2CR_L2SIZ_HM    0x20000000 /* ... 512K */
-#define L2CR_L2SIZ_QM    0x10000000 /* ... 256k */
-#define L2CR_L2CLK_1     0x02000000 /* bits 4-6 clock ratio div 1 */
-#define L2CR_L2CLK_1_5   0x04000000 /* bits 4-6 clock ratio div 1.5 */
-#define L2CR_L2CLK_2     0x08000000 /* bits 4-6 clock ratio div 2 */
-#define L2CR_L2CLK_2_5   0x0a000000 /* bits 4-6 clock ratio div 2.5 */
-#define L2CR_L2CLK_3     0x0c000000 /* bits 4-6 clock ratio div 3 */
-#define L2CR_L2CLK_3_5   0x06000000 /* bits 4-6 clock ratio div 3.5 */
-#define L2CR_L2CLK_4     0x0e000000 /* bits 4-6 clock ratio div 4 */
-#define L2CR_L2RAM_BURST 0x01000000 /* bits 7-8 - burst SRAM */
-#define L2CR_DO          0x00400000 /* bit 9 - enable caching of instr. in L2 */
-#define L2CR_L2I         0x00200000 /* bit 10 - global invalidate bit */
-#define L2CR_L2CTL       0x00100000 /* bit 11 - l2 ram control */
-#define L2CR_L2WT        0x00080000 /* bit 12 - l2 write-through */
-#define L2CR_TS          0x00040000 /* bit 13 - test support on */
-#define L2CR_TS_OFF      -L2CR_TS   /* bit 13 - test support off */
-#define L2CR_L2OH_5      0x00000000 /* bits 14-15 - output hold time = short */
-#define L2CR_L2OH_1      0x00010000 /* bits 14-15 - output hold time = medium */
-#define L2CR_L2OH_INV    0x00020000 /* bits 14-15 - output hold time = long */
-#define L2CR_L2IP        0x00000001 /* global invalidate in progress */
-
-/*----------------------------------------------------------------
- * BAT settings.  Look in config_<BOARD>.h for the actual setup
- */
-
-#define BATU_BL_128K             0x00000000
-#define BATU_BL_256K             0x00000004
-#define BATU_BL_512K             0x0000000c
-#define BATU_BL_1M               0x0000001c
-#define BATU_BL_2M               0x0000003c
-#define BATU_BL_4M               0x0000007c
-#define BATU_BL_8M               0x000000fc
-#define BATU_BL_16M              0x000001fc
-#define BATU_BL_32M              0x000003fc
-#define BATU_BL_64M              0x000007fc
-#define BATU_BL_128M             0x00000ffc
-#define BATU_BL_256M             0x00001ffc
-
-#define BATU_VS                  0x00000002
-#define BATU_VP                  0x00000001
-#define BATU_INVALID             0x00000000
-
-#define BATL_WRITETHROUGH        0x00000080
-#define BATL_CACHEINHIBIT        0x00000040
-#define BATL_COHERENT            0x00000020
-#define BATL_GUARDED             0x00000010
-
-#define BATL_NO_ACCESS           0x00000000
-#define BATL_RO                  0x00000001
-#define BATL_RW                  0x00000002
-
-#endif  /* __MPC75X_H__ */
diff --git a/include/pcmcia.h b/include/pcmcia.h
index ee2c63c978f..beb1c16e468 100644
--- a/include/pcmcia.h
+++ b/include/pcmcia.h
@@ -76,8 +76,12 @@
 #error Both CONFIG_PCMCIA_SLOT_A and CONFIG_PCMCIA_SLOT_B configured
 #endif
 
+#ifndef PCMCIA_SOCKETS_NO
 #define PCMCIA_SOCKETS_NO	1
+#endif
+#ifndef PCMCIA_MEM_WIN_NO
 #define PCMCIA_MEM_WIN_NO	4
+#endif
 #define PCMCIA_IO_WIN_NO	2
 
 /* define _slot_ to be able to optimize macros */