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authorMichal Simek <michal.simek@xilinx.com>2016-02-08 09:34:53 +0100
committerMichal Simek <michal.simek@xilinx.com>2016-04-04 20:28:38 +0200
commit8d59d7f63bf46dd26fd11039e63e3ba9e2673c95 (patch)
tree2308f63ded4965446db82cc1fe7fd2a6350cd3dd /include
parenta3afb4a4bfbe4318ca8398ce7b0e01d8748a111c (diff)
ARM64: zynqmp: Read RAM information from DT
Read information about memory from DT. This patch simplify life with synchronization between DT and board files. dram_init() only needs maximum RAM size below 4GB that's why please sort banks in memory node. dram_init_banksize() copies memory setup to bi_dram[]. This will avoid reading information from DT twice. Memory test start/end were changed to DDR location to let memtest still compiled. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/xilinx_zynqmp.h9
-rw-r--r--include/configs/xilinx_zynqmp_ep.h5
2 files changed, 6 insertions, 8 deletions
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index ed47283c17..4062e01824 100644
--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@@ -26,8 +26,11 @@
#define CONFIG_SYS_ALT_MEMTEST
#define CONFIG_SYS_MEMTEST_SCRATCH 0xfffc0000
-#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_SDRAM_SIZE
+#ifndef CONFIG_NR_DRAM_BANKS
+# define CONFIG_NR_DRAM_BANKS 2
+#endif
+#define CONFIG_SYS_MEMTEST_START 0
+#define CONFIG_SYS_MEMTEST_END 1000
/* Have release address at the end of 256MB for now */
#define CPU_RELEASE_ADDR 0xFFFFFF0
@@ -39,7 +42,7 @@
# define CONFIG_IDENT_STRING " Xilinx ZynqMP"
#endif
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
+#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
/* Flat Device Tree Definitions */
diff --git a/include/configs/xilinx_zynqmp_ep.h b/include/configs/xilinx_zynqmp_ep.h
index 337312e58c..aa58b62531 100644
--- a/include/configs/xilinx_zynqmp_ep.h
+++ b/include/configs/xilinx_zynqmp_ep.h
@@ -22,11 +22,6 @@
#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \
ZYNQMP_USB1_XHCI_BASEADDR}
-/* Physical Memory Map */
-#define CONFIG_NR_DRAM_BANKS 1
-#define CONFIG_SYS_SDRAM_BASE 0
-#define CONFIG_SYS_SDRAM_SIZE 0x40000000
-
#define COUNTER_FREQUENCY 4000000
#include <configs/xilinx_zynqmp.h>