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authorTom Rini <trini@konsulko.com>2019-10-12 10:10:59 -0400
committerTom Rini <trini@konsulko.com>2019-10-12 10:10:59 -0400
commit0c9cc5155cb5027ae17ace986f349e2f0d1fb9a3 (patch)
tree49c59081ca15147dcc311880648732a5d4fc019a /include
parent36317705cb5ab43db25fede2446d2352de527630 (diff)
parent7d2dc6af540fad77bff2a3ff16cdc2f9d9df72eb (diff)
Merge branch '2019-10-11-master-imports'
- Assorted cleanups - FAT bugfixes - mediatek platform updates
Diffstat (limited to 'include')
-rw-r--r--include/dt-bindings/reset/mt7623-reset.h (renamed from include/dt-bindings/reset/mtk-reset.h)4
-rw-r--r--include/dt-bindings/reset/mt7629-reset.h36
-rw-r--r--include/wait_bit.h2
3 files changed, 39 insertions, 3 deletions
diff --git a/include/dt-bindings/reset/mtk-reset.h b/include/dt-bindings/reset/mt7623-reset.h
index 78fcdab009d..a859a5b26a4 100644
--- a/include/dt-bindings/reset/mtk-reset.h
+++ b/include/dt-bindings/reset/mt7623-reset.h
@@ -6,11 +6,9 @@
#ifndef _DT_BINDINGS_MTK_RESET_H_
#define _DT_BINDINGS_MTK_RESET_H_
-/* ETHSYS */
+/* ETHSYS resets */
#define ETHSYS_PPE_RST 31
-#define ETHSYS_EPHY_RST 24
#define ETHSYS_GMAC_RST 23
-#define ETHSYS_ESW_RST 16
#define ETHSYS_FE_RST 6
#define ETHSYS_MCM_RST 2
#define ETHSYS_SYS_RST 0
diff --git a/include/dt-bindings/reset/mt7629-reset.h b/include/dt-bindings/reset/mt7629-reset.h
new file mode 100644
index 00000000000..8f1634f7a65
--- /dev/null
+++ b/include/dt-bindings/reset/mt7629-reset.h
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2019 MediaTek Inc.
+ */
+
+#ifndef _DT_BINDINGS_MTK_RESET_H_
+#define _DT_BINDINGS_MTK_RESET_H_
+
+/* PCIe Subsystem resets */
+#define PCIE1_CORE_RST 19
+#define PCIE1_MMIO_RST 20
+#define PCIE1_HRST 21
+#define PCIE1_USER_RST 22
+#define PCIE1_PIPE_RST 23
+#define PCIE0_CORE_RST 27
+#define PCIE0_MMIO_RST 28
+#define PCIE0_HRST 29
+#define PCIE0_USER_RST 30
+#define PCIE0_PIPE_RST 31
+
+/* SSUSB Subsystem resets */
+#define SSUSB_PHY_PWR_RST 3
+#define SSUSB_MAC_PWR_RST 4
+
+/* ETH Subsystem resets */
+#define ETHSYS_SYS_RST 0
+#define ETHSYS_MCM_RST 2
+#define ETHSYS_HSDMA_RST 5
+#define ETHSYS_FE_RST 6
+#define ETHSYS_ESW_RST 16
+#define ETHSYS_GMAC_RST 23
+#define ETHSYS_EPHY_RST 24
+#define ETHSYS_CRYPTO_RST 29
+#define ETHSYS_PPE_RST 31
+
+#endif /* _DT_BINDINGS_MTK_RESET_H_ */
diff --git a/include/wait_bit.h b/include/wait_bit.h
index 82e09da5ca3..79da0811fe2 100644
--- a/include/wait_bit.h
+++ b/include/wait_bit.h
@@ -72,10 +72,12 @@ static inline int wait_for_bit_##sfx(const void *reg, \
BUILD_WAIT_FOR_BIT(8, u8, readb)
BUILD_WAIT_FOR_BIT(le16, u16, readw)
+BUILD_WAIT_FOR_BIT(16, u16, readw)
#ifdef readw_be
BUILD_WAIT_FOR_BIT(be16, u16, readw_be)
#endif
BUILD_WAIT_FOR_BIT(le32, u32, readl)
+BUILD_WAIT_FOR_BIT(32, u32, readl)
#ifdef readl_be
BUILD_WAIT_FOR_BIT(be32, u32, readl_be)
#endif