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authorSiva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>2016-01-13 16:25:37 +0530
committerMichal Simek <michal.simek@xilinx.com>2016-09-22 07:33:21 +0200
commit6b2450143882987f4287ea78783866c5f9ac4aff (patch)
treed9b34e4e26cd9269e33da98c50161f4c7f714c26 /include/zynqmppl.h
parent5242772c5113850c0c35d6271fd281dfc669c707 (diff)
fpga: xilinx: zynqmp: Add PL bitstream download support for ZynqMP
Add PL bitstream dowload support for ZynqMP Bitstream will be validated by uboot and loaded to PL by invoking an smc instruction to ATF which route this request to PMU FW which will take care of loading it to PL Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'include/zynqmppl.h')
-rw-r--r--include/zynqmppl.h23
1 files changed, 23 insertions, 0 deletions
diff --git a/include/zynqmppl.h b/include/zynqmppl.h
new file mode 100644
index 00000000000..002ee2aabbb
--- /dev/null
+++ b/include/zynqmppl.h
@@ -0,0 +1,23 @@
+/*
+ * (C) Copyright 2015 Xilinx, Inc,
+ * Michal Simek <michal.simek@xilinx.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#ifndef _ZYNQMPPL_H_
+#define _ZYNQMPPL_H_
+
+#include <xilinx.h>
+
+#define ZYNQMP_SIP_SVC_PM_FPGA_LOAD 0xC2000016
+#define ZYNQMP_FPGA_OP_INIT (1 << 0)
+#define ZYNQMP_FPGA_OP_LOAD (1 << 1)
+#define ZYNQMP_FPGA_OP_DONE (1 << 2)
+
+extern struct xilinx_fpga_op zynqmp_op;
+
+#define XILINX_ZYNQMP_DESC \
+{ xilinx_zynqmp, csu_dma, 1, &zynqmp_op, 0, &zynqmp_op }
+
+#endif /* _ZYNQMPPL_H_ */