diff options
author | Jagannadha Sutradharudu Teki <jaganna@xilinx.com> | 2013-06-21 15:56:30 +0530 |
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committer | Jagannadha Sutradharudu Teki <jaganna@xilinx.com> | 2013-06-23 22:02:51 +0530 |
commit | 615a1561673a9a1b863f905d40f084f36edb9022 (patch) | |
tree | 76c2bd6819b12b69877c25ef8aaa34f26dba0f30 /include/spi_flash.h | |
parent | ba549de6c53663e534a20741f9ec917fb6526830 (diff) |
sf: Add flag status register polling support
Flag status register polling is required for micron 512Mb flash
devices onwards, for performing erase/program operations.
Like polling for WIP(Write-In-Progress) bit in read status register,
spi_flash_cmd_wait_ready will poll for PEC(Program-Erase-Control)
bit in flag status register.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include/spi_flash.h')
-rw-r--r-- | include/spi_flash.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/spi_flash.h b/include/spi_flash.h index e22d698af42..e80785f55ef 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -46,6 +46,9 @@ struct spi_flash { /* Current flash bank */ u8 bank_curr; #endif + /* Poll cmd - for flash erase/program */ + u8 poll_cmd; + void *memory_map; /* Address of read-only SPI flash access */ int (*read)(struct spi_flash *flash, u32 offset, size_t len, void *buf); |