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authorNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>2012-08-21 13:14:46 +0900
committerNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>2012-08-21 15:00:33 +0900
commit73f35e0b156c771333d449ca86b99600d094d37f (patch)
treec6a12e577144fc1d888684730774910147346e7e /include/sh_tmu.h
parente66443fdb5355e68cfdbbdd37248c4b7eb4968f5 (diff)
sh: tmu: Changed TMU driver using array of structures
This changed into access using array of structure from access to the register using the definition of the register by macro. And removed white space. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'include/sh_tmu.h')
-rw-r--r--include/sh_tmu.h75
1 files changed, 75 insertions, 0 deletions
diff --git a/include/sh_tmu.h b/include/sh_tmu.h
new file mode 100644
index 00000000000..a55d14181d0
--- /dev/null
+++ b/include/sh_tmu.h
@@ -0,0 +1,75 @@
+/*
+ * Copyright (C) 2012 Renesas Solutions Corp.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __SH_TMU_H
+#define __SH_TMU_H
+
+#include <asm/types.h>
+
+#if defined(CONFIG_SH3)
+struct tmu_regs {
+ u8 tocr;
+ u8 reserved0;
+ u8 tstr;
+ u8 reserved1;
+ u32 tcor0;
+ u32 tcnt0;
+ u16 tcr0;
+ u16 reserved2;
+ u32 tcor1;
+ u32 tcnt1;
+ u16 tcr1;
+ u16 reserved3;
+ u32 tcor2;
+ u32 tcnt2;
+ u16 tcr2;
+ u16 reserved4;
+ u32 tcpr2;
+};
+#endif /* CONFIG_SH3 */
+
+#if defined(CONFIG_SH4) || defined(CONFIG_SH4A)
+struct tmu_regs {
+ u32 reserved;
+ u8 tstr;
+ u8 reserved2[3];
+ u32 tcor0;
+ u32 tcnt0;
+ u16 tcr0;
+ u16 reserved3;
+ u32 tcor1;
+ u32 tcnt1;
+ u16 tcr1;
+ u16 reserved4;
+ u32 tcor2;
+ u32 tcnt2;
+ u16 tcr2;
+ u16 reserved5;
+};
+#endif /* CONFIG_SH4 */
+
+static inline unsigned long get_tmu0_clk_rate(void)
+{
+ return CONFIG_SYS_CLK_FREQ;
+}
+
+#endif /* __SH_TMU_H */