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authorStefan Roese <sr@denx.de>2010-05-19 11:13:24 +0200
committerStefan Roese <sr@denx.de>2010-07-01 10:25:56 +0200
commitfe7cca715c69f66efdc9c64462b0fd0a445331a5 (patch)
tree641e17159f6308088ecc74c7598cef9502addf4b /include/ppc440.h
parent39ddd10b046fb791f47281ffb2100be01909ad72 (diff)
ppc4xx: Enable booting with Option E on 460EX/EXr/GT
This patch enables booting with option E on the PPC460EX/EXr/GT. When booting with Option E, the PLL is in bypass, CPR0_PLLC[ENG]=0. The Software Boot Configuration Procedure is needed to engage the PLL and perform a chip reset. Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/ppc440.h')
-rw-r--r--include/ppc440.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/include/ppc440.h b/include/ppc440.h
index 5f87d2c600..c807dda2ae 100644
--- a/include/ppc440.h
+++ b/include/ppc440.h
@@ -1719,6 +1719,13 @@
#define CPR0_PERD_PERDV0_MASK 0x07000000
#endif
+#if defined(CONFIG_460EX) || defined(CONFIG_460GT)
+#define CPR0_ICFG_RLI_MASK 0x80000000
+
+#define CPR0_PLLC_RST 0x80000000
+#define CPR0_PLLC_ENG 0x40000000
+#endif
+
/*-----------------------------------------------------------------------------
| PCI Internal Registers et. al. (accessed via plb)
+----------------------------------------------------------------------------*/