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authorGrzegorz Bernacki <gjb@semihalf.com>2007-06-15 11:19:28 +0200
committerStefan Roese <sr@denx.de>2007-06-15 11:19:28 +0200
commitefa35cf12d914d4caba942acd5a6c45f217de302 (patch)
tree00db80c8d208b90bd4e6530559416d5bf43ec51e /include/ppc405.h
parent725671ccd2cd04c9ebc50c9e5a94dd8cbade66b7 (diff)
ppc4xx: Clean up 440 exceptions handling
- Introduced dedicated switches for building 440 and 405 images required for 440-specific machine instructions like 'rfmci' etc. - Exception vectors moved to the proper location (_start moved away from the critical exception handler space, which it occupied) - CriticalInput now serviced (with default handler) - MachineCheck properly serviced (added a dedicated handler and return subroutine) - Overall cleanup of exceptions declared with STD_EXCEPTION macro (unused, unhandled and those not relevant for 4xx were eliminated) - Eliminated Linux leftovers, removed dead code Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com> Signed-off-by: Rafal Jaworowski <raj@semihalf.com> Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/ppc405.h')
-rw-r--r--include/ppc405.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/include/ppc405.h b/include/ppc405.h
index 71ad12e5159..6be2a50db75 100644
--- a/include/ppc405.h
+++ b/include/ppc405.h
@@ -27,6 +27,15 @@
/*--------------------------------------------------------------------- */
#define srr2 0x3de /* save/restore register 2 */
#define srr3 0x3df /* save/restore register 3 */
+
+ /*
+ * 405 does not really have CSRR0/1 but SRR2/3 are used during critical
+ * exception for the exact same purposes - let's alias them and have a
+ * common handling in crit_return() and CRIT_EXCEPTION
+ */
+ #define csrr0 srr2
+ #define csrr1 srr3
+
#define dbsr 0x3f0 /* debug status register */
#define dbcr0 0x3f2 /* debug control register 0 */
#define dbcr1 0x3bd /* debug control register 1 */