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| author | Patrick Delaunay <patrick.delaunay@st.com> | 2018-03-12 10:46:12 +0100 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-03-19 16:14:21 -0400 |
| commit | 5d0c74e62472ec623f1b2ad9a12cb8308a0e3a03 (patch) | |
| tree | 0009cdb45833850c4443f2566c2099c64cbed9a1 /include/power/power_chrg.h | |
| parent | e70f70aa6504bd6387c0a6d117e48383c5048b6b (diff) | |
pmic: add stpmu1 support
This driver implements register read/write operations for STPMU1.
The STPMU1 PMIC provides 4 BUCKs, 6 LDOs, 1 VREF
and 2 power switches. It is accessed via an I2C interface.
This device is used with STM32MP1 SoCs.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Diffstat (limited to 'include/power/power_chrg.h')
0 files changed, 0 insertions, 0 deletions