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authorTimur Tabi <timur@freescale.com>2011-10-18 18:44:34 -0500
committerKumar Gala <galak@kernel.crashing.org>2011-10-20 16:01:37 -0500
commita836626cc4ddae53bfa46195a39194f21ad157af (patch)
tree9fbd99ccbe888bbcaf557d354a31da9ba9d9be25 /include/phy.h
parent3b001ad26d6e03ebe2510ec8506a8425392adcf8 (diff)
powerpc/85xx: wait for alignment before resetting SERDES RX lanes (SERDES9)
The work-around for P4080 erratum SERDES9 says that the SERDES receiver lanes should be reset after the XAUI starts tranmitting alignment signals. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/phy.h')
-rw-r--r--include/phy.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/include/phy.h b/include/phy.h
index d5817bf19f4..095f41c43b2 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -226,4 +226,8 @@ int phy_natsemi_init(void);
int phy_realtek_init(void);
int phy_teranetics_init(void);
int phy_vitesse_init(void);
+
+/* PHY UIDs for various PHYs that are referenced in external code */
+#define PHY_UID_TN2020 0x00a19410
+
#endif