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authorAlex Marginean <alexm.osslist@gmail.com>2019-06-07 11:24:25 +0300
committerSimon Glass <sjg@chromium.org>2019-07-10 16:52:58 -0600
commitb8e1f8270ca9667e84eaa4049e006c27e37f3cca (patch)
treeb6bea726c8ef35ef6624f359fe8f3ce05e16f441 /include/pci.h
parent21ebbafde8dbbc5903a302ba0c126ff2ac1423c8 (diff)
drivers: pci: add API to issue FLR on a PCI function if supported
Adds dm_pci_flr API that issues a Function Level reset on a PCI-e function, if FLR is supported. Signed-off-by: Alex Marginean <alexm.osslist@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'include/pci.h')
-rw-r--r--include/pci.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/include/pci.h b/include/pci.h
index 0aab438159..298d0d4355 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -466,6 +466,12 @@
#define PCI_EA_IS_64 0x00000002 /* 64-bit field flag */
#define PCI_EA_FIELD_MASK 0xfffffffc /* For Base & Max Offset */
+/* PCI Express capabilities */
+#define PCI_EXP_DEVCAP 4 /* Device capabilities */
+#define PCI_EXP_DEVCAP_FLR 0x10000000 /* Function Level Reset */
+#define PCI_EXP_DEVCTL 8 /* Device Control */
+#define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */
+
/* Include the ID list */
#include <pci_ids.h>
@@ -1426,6 +1432,14 @@ int dm_pci_find_next_ext_capability(struct udevice *dev, int start, int cap);
*/
int dm_pci_find_ext_capability(struct udevice *dev, int cap);
+/**
+ * dm_pci_flr() - Perform FLR if the device suppoorts it
+ *
+ * @dev: PCI device to reset
+ * @return: 0 if OK, -ENOENT if FLR is not supported by dev
+ */
+int dm_pci_flr(struct udevice *dev);
+
#define dm_pci_virt_to_bus(dev, addr, flags) \
dm_pci_phys_to_bus(dev, (virt_to_phys(addr)), (flags))
#define dm_pci_bus_to_virt(dev, addr, flags, len, map_flags) \