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authorStefan Roese <sr@denx.de>2016-07-19 07:45:46 +0200
committerBin Meng <bmeng.cn@gmail.com>2016-08-16 11:44:09 +0800
commit4cf9e464f78e58117b9a57e1e4e092e609d96b59 (patch)
tree7ab70fbffa0469833b1a39eb8ea8dc6d4d5b9cc3 /include/nuvoton_nct6102d.h
parentd7b935bf62bafdf5fbe4734c7536754948958890 (diff)
misc: Add simple driver for some Nuvoton NCT6102D devices
This simple driver provides some functions to control some of the integrated devices. The watchdog is enabled per default. This driver adds a function to disable the watchdog. Also the internal legacy UART (io address 0x3f8/0x2f8) is enabled per default. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include/nuvoton_nct6102d.h')
-rw-r--r--include/nuvoton_nct6102d.h34
1 files changed, 34 insertions, 0 deletions
diff --git a/include/nuvoton_nct6102d.h b/include/nuvoton_nct6102d.h
new file mode 100644
index 0000000000..a122550a2c
--- /dev/null
+++ b/include/nuvoton_nct6102d.h
@@ -0,0 +1,34 @@
+/*
+ * Copyright (C) 2016 Stefan Roese <sr@denx.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _NUVOTON_NCT6102D_H_
+#define _NUVOTON_NCT6102D_H_
+
+/* I/O address of Nuvoton Super IO chip */
+#define NCT6102D_IO_PORT 0x4e
+
+/* Extended Function Enable Registers */
+#define NCT_EFER (NCT6102D_IO_PORT + 0)
+/* Extended Function Index Register (same as EFER) */
+#define NCT_EFIR (NCT6102D_IO_PORT + 0)
+/* Extended Function Data Register */
+#define NCT_EFDR (NCT_EFIR + 1)
+
+#define NCT_LD_SELECT_REG 0x07
+
+/* Logical device number */
+#define NCT6102D_LD_UARTA 0x02
+#define NCT6102D_LD_WDT 0x08
+
+#define NCT6102D_UARTA_ENABLE 0x30
+#define NCT6102D_WDT_TIMEOUT 0xf1
+
+#define NCT_ENTRY_KEY 0x87
+#define NCT_EXIT_KEY 0xaa
+
+int nct6102d_wdt_disable(void);
+
+#endif /* _NUVOTON_NCT6102D_H_ */