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authorDave Liu <r63238@freescale.com>2008-01-17 18:23:19 +0800
committerKim Phillips <kim.phillips@freescale.com>2008-01-17 11:01:52 -0600
commita8cb43a89be6cfd283257a603dd9841503ccce0f (patch)
tree3480bb902c877d92ce4eeeb1f9e5fd062cbc0ada /include/mpc83xx.h
parentf188896c2f1594fe749fdb99bbc8c54023cfab3a (diff)
mpc83xx: Fix the fatal conflict of merge
The commit 9e89647889cd4b5ada5b5e7cad6cbe55737a08d7 will cause the mpc8315erdb board can't boot up. The patch fix that bug, and remove the duplicated #ifdef CFG_SPCR_TSECEP code and clean the SCCR_TSEC2 for MPC8313E processor. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'include/mpc83xx.h')
-rw-r--r--include/mpc83xx.h10
1 files changed, 3 insertions, 7 deletions
diff --git a/include/mpc83xx.h b/include/mpc83xx.h
index 39cecf21c2b..df052e3d4c7 100644
--- a/include/mpc83xx.h
+++ b/include/mpc83xx.h
@@ -725,6 +725,7 @@
#define SCCR_USBCM_3 0x00F00000
#elif defined(CONFIG_MPC8313)
+/* TSEC1 bits are for TSEC2 as well */
#define SCCR_TSEC1CM 0xc0000000
#define SCCR_TSEC1CM_SHIFT 30
#define SCCR_TSEC1CM_0 0x00000000
@@ -732,13 +733,6 @@
#define SCCR_TSEC1CM_2 0x80000000
#define SCCR_TSEC1CM_3 0xC0000000
-#define SCCR_TSEC2CM 0x30000000
-#define SCCR_TSEC2CM_SHIFT 28
-#define SCCR_TSEC2CM_0 0x00000000
-#define SCCR_TSEC2CM_1 0x10000000
-#define SCCR_TSEC2CM_2 0x20000000
-#define SCCR_TSEC2CM_3 0x30000000
-
#define SCCR_TSEC1ON 0x20000000
#define SCCR_TSEC1ON_SHIFT 29
#define SCCR_TSEC2ON 0x10000000
@@ -838,6 +832,8 @@
#define SCCR_PCIEXP2CM_3 0x000c0000
/* All of the four SATA controllers must have the same clock ratio */
+#define SCCR_SATA1CM 0x000000c0
+#define SCCR_SATA1CM_SHIFT 6
#define SCCR_SATACM 0x000000ff
#define SCCR_SATACM_SHIFT 0
#define SCCR_SATACM_0 0x00000000