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authorAndre Schwarz <andre.schwarz@matrix-vision.de>2008-07-09 18:30:44 +0200
committerGrant Likely <grant.likely@secretlab.ca>2008-07-15 10:12:58 -0600
commit5e0de0e216b8fb27634afb11c60a2fa24c23349e (patch)
tree9658cd67b59fa936cfc535eb7e093d3d0f97a008 /include/mpc5xxx.h
parent348753d416cd2c9e7ec6520a544c8f33cf02a560 (diff)
mpc5xxx: Add MVBC_P board support
The MVBC_P is a MPC5200B based camera system with Intel Gigabit ethernet controller (using e1000) and custom Altera Cyclone-II FPGA on PCI. Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'include/mpc5xxx.h')
-rw-r--r--include/mpc5xxx.h29
1 files changed, 29 insertions, 0 deletions
diff --git a/include/mpc5xxx.h b/include/mpc5xxx.h
index a4581a3e6bb..5d11ef0f480 100644
--- a/include/mpc5xxx.h
+++ b/include/mpc5xxx.h
@@ -198,6 +198,35 @@
#define GPIO_PSC3_9 0x04000000UL
#define GPIO_PSC1_4 0x01000000UL
+#define MPC5XXX_GPIO_SIMPLE_PSC6_3 0x20000000UL
+#define MPC5XXX_GPIO_SIMPLE_PSC6_2 0x10000000UL
+#define MPC5XXX_GPIO_SIMPLE_PSC3_7 0x00002000UL
+#define MPC5XXX_GPIO_SIMPLE_PSC3_6 0x00001000UL
+#define MPC5XXX_GPIO_SIMPLE_PSC3_3 0x00000800UL
+#define MPC5XXX_GPIO_SIMPLE_PSC3_2 0x00000400UL
+#define MPC5XXX_GPIO_SIMPLE_PSC3_1 0x00000200UL
+#define MPC5XXX_GPIO_SIMPLE_PSC3_0 0x00000100UL
+#define MPC5XXX_GPIO_SIMPLE_PSC2_3 0x00000080UL
+#define MPC5XXX_GPIO_SIMPLE_PSC2_2 0x00000040UL
+#define MPC5XXX_GPIO_SIMPLE_PSC2_1 0x00000020UL
+#define MPC5XXX_GPIO_SIMPLE_PSC2_0 0x00000010UL
+#define MPC5XXX_GPIO_SIMPLE_PSC1_3 0x00000008UL
+#define MPC5XXX_GPIO_SIMPLE_PSC1_2 0x00000004UL
+#define MPC5XXX_GPIO_SIMPLE_PSC1_1 0x00000002UL
+#define MPC5XXX_GPIO_SIMPLE_PSC1_0 0x00000001UL
+
+#define MPC5XXX_GPIO_SINT_PSC3_5 0x02
+#define MPC5XXX_GPIO_SINT_PSC3_4 0x01
+
+#define MPC5XXX_GPIO_WKUP_7 0x80
+#define MPC5XXX_GPIO_WKUP_6 0x40
+#define MPC5XXX_GPIO_WKUP_PSC6_1 0x20
+#define MPC5XXX_GPIO_WKUP_PSC6_0 0x10
+#define MPC5XXX_GPIO_WKUP_ETH17 0x08
+#define MPC5XXX_GPIO_WKUP_PSC3_9 0x04
+#define MPC5XXX_GPIO_WKUP_PSC2_4 0x02
+#define MPC5XXX_GPIO_WKUP_PSC1_4 0x01
+
/* PCI registers */
#define MPC5XXX_PCI_CMD (MPC5XXX_PCI + 0x04)
#define MPC5XXX_PCI_CFG (MPC5XXX_PCI + 0x0c)