diff options
| author | Aymen Sghaier <aymen.sghaier@nxp.com> | 2021-03-25 17:30:25 +0800 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2021-04-08 09:18:29 +0200 |
| commit | 940d36d5d1d2dc2697b0b379712a3bf40a34e57a (patch) | |
| tree | e794021c940d6f51ea6751e2be1085b05dfadf68 /include/fsl_sec.h | |
| parent | 88e7f5be3871a9002d4fa0fe7c9aabaab7edb0dc (diff) | |
crypto: caam: Add CAAM support to i.MX8M platforms
This patch enable CAAM support for i.MX8M platforms.
Signed-off-by: Aymen Sghaier <aymen.sghaier@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'include/fsl_sec.h')
| -rw-r--r-- | include/fsl_sec.h | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/include/fsl_sec.h b/include/fsl_sec.h index a98f6cb12a..c531a14477 100644 --- a/include/fsl_sec.h +++ b/include/fsl_sec.h @@ -3,6 +3,7 @@ * Common internal memory map for some Freescale SoCs * * Copyright 2014 Freescale Semiconductor, Inc. + * Copyright 2018 NXP */ #ifndef __FSL_SEC_H @@ -195,7 +196,8 @@ typedef struct ccsr_sec { struct jr_regs { #if defined(CONFIG_SYS_FSL_SEC_LE) && \ - !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP)) + !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || \ + defined(CONFIG_MX7ULP) || defined(CONFIG_IMX8M)) u32 irba_l; u32 irba_h; #else @@ -209,7 +211,8 @@ struct jr_regs { u32 rsvd3; u32 irja; #if defined(CONFIG_SYS_FSL_SEC_LE) && \ - !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP)) + !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || \ + defined(CONFIG_MX7ULP) || defined(CONFIG_IMX8M)) u32 orba_l; u32 orba_h; #else @@ -242,7 +245,8 @@ struct jr_regs { */ struct sg_entry { #if defined(CONFIG_SYS_FSL_SEC_LE) && \ - !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP)) + !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || \ + defined(CONFIG_MX7ULP) || defined(CONFIG_IMX8M)) uint32_t addr_lo; /* Memory Address - lo */ uint32_t addr_hi; /* Memory Address of start of buffer - hi */ #else @@ -263,7 +267,8 @@ struct sg_entry { #define BLOB_SIZE(x) ((x) + 32 + 16) /* Blob buffer size */ -#if defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP) +#if defined(CONFIG_MX6) || defined(CONFIG_MX7) || \ + defined(CONFIG_MX7ULP) || defined(CONFIG_IMX8M) /* Job Ring Base Address */ #define JR_BASE_ADDR(x) (CONFIG_SYS_FSL_SEC_ADDR + 0x1000 * (x + 1)) /* Secure Memory Offset varies accross versions */ |