diff options
| author | Jagan Teki <jagan@amarulasolutions.com> | 2020-05-26 11:33:48 +0800 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2020-05-29 18:13:19 +0800 |
| commit | dc18413adbf188ffdfb0706023249e7c03b29545 (patch) | |
| tree | 93efaf736c6411c2350dac0af8f1fdb992069d42 /include/dwc3-uboot.h | |
| parent | b34f8b5de0fea945c2683e9e64d941c121aa02ad (diff) | |
usb: dwc3: Add disable u2mac linestate check quirk
This patch adds a quirk to disable USB 2.0 MAC linestate check
during HS transmit. Refer the dwc3 databook, we can use it for
some special platforms if the linestate not reflect the expected
line state(J) during transmission.
When use this quirk, the controller implements a fixed 40-bit
TxEndDelay after the packet is given on UTMI and ignores the
linestate during the transmit of a token (during token-to-token
and token-to-data IPGAP).
On some rockchip platforms (e.g. rk3399), it requires to disable
the u2mac linestate check to decrease the SSPLIT token to SETUP
token inter-packet delay from 566ns to 466ns, and fix the issue
that FS/LS devices not recognized if inserted through USB 3.0 HUB.
Reference from below Linux commit,
commit <65db7a0c9816> ("usb: dwc3: add disable u2mac linestate
check quirk")
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'include/dwc3-uboot.h')
| -rw-r--r-- | include/dwc3-uboot.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/dwc3-uboot.h b/include/dwc3-uboot.h index 193d225d31..e08530ec4e 100644 --- a/include/dwc3-uboot.h +++ b/include/dwc3-uboot.h @@ -34,6 +34,7 @@ struct dwc3_device { unsigned dis_u3_susphy_quirk; unsigned dis_u2_susphy_quirk; unsigned dis_del_phy_power_chg_quirk; + unsigned dis_tx_ipgap_linecheck_quirk; unsigned dis_enblslpm_quirk; unsigned dis_u2_freeclk_exists_quirk; unsigned tx_de_emphasis_quirk; |