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authorPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2018-11-25 19:38:54 +0100
committerSimon Glass <sjg@chromium.org>2018-12-05 06:06:44 -0700
commit759a99c24201eac0a9ade628021cd49d208f0fbb (patch)
tree7c17fd2a03540d45d7a83a9e262302a7d8150cc5 /include/dm
parenta4b33c5aba8cd155d5cf49eeaf7fce38a1965fc1 (diff)
dm: (re)sort uclass ids alphabetically
The comment in uclass-id.h states that "U-Boot uclasses start here - in alphabetical order" but the subsequent list is not sorted alphabetically. This reestablishes order. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Diffstat (limited to 'include/dm')
-rw-r--r--include/dm/uclass-id.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index a5fcb69dbad..62d9e2f404a 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -29,6 +29,7 @@ enum uclass_id {
/* U-Boot uclasses start here - in alphabetical order */
UCLASS_ADC, /* Analog-to-digital converter */
UCLASS_AHCI, /* SATA disk controller */
+ UCLASS_AXI, /* AXI bus */
UCLASS_BLK, /* Block device */
UCLASS_BOARD, /* Device information from hardware */
UCLASS_CLK, /* Clock source, e.g. used by peripherals */
@@ -38,15 +39,14 @@ enum uclass_id {
UCLASS_DMA, /* Direct Memory Access */
UCLASS_EFI, /* EFI managed devices */
UCLASS_ETH, /* Ethernet device */
+ UCLASS_FIRMWARE, /* Firmware */
UCLASS_FS_FIRMWARE_LOADER, /* Generic loader */
UCLASS_GPIO, /* Bank of general-purpose I/O pins */
- UCLASS_FIRMWARE, /* Firmware */
UCLASS_I2C, /* I2C bus */
UCLASS_I2C_EEPROM, /* I2C EEPROM device */
UCLASS_I2C_GENERIC, /* Generic I2C device */
UCLASS_I2C_MUX, /* I2C multiplexer */
UCLASS_IDE, /* IDE device */
- UCLASS_AXI, /* AXI bus */
UCLASS_IRQ, /* Interrupt controller */
UCLASS_KEYBOARD, /* Keyboard input device */
UCLASS_LED, /* Light-emitting diode (LED) */
@@ -68,8 +68,8 @@ enum uclass_id {
UCLASS_PINCONFIG, /* Pin configuration node device */
UCLASS_PINCTRL, /* Pinctrl (pin muxing/configuration) device */
UCLASS_PMIC, /* PMIC I/O device */
- UCLASS_PWM, /* Pulse-width modulator */
UCLASS_POWER_DOMAIN, /* (SoC) Power domains */
+ UCLASS_PWM, /* Pulse-width modulator */
UCLASS_PWRSEQ, /* Power sequence device */
UCLASS_RAM, /* RAM controller */
UCLASS_REGULATOR, /* Regulator device */
@@ -81,9 +81,9 @@ enum uclass_id {
UCLASS_SIMPLE_BUS, /* Bus with child devices */
UCLASS_SMEM, /* Shared memory interface */
UCLASS_SPI, /* SPI bus */
- UCLASS_SPMI, /* System Power Management Interface bus */
UCLASS_SPI_FLASH, /* SPI flash */
UCLASS_SPI_GENERIC, /* Generic SPI flash target */
+ UCLASS_SPMI, /* System Power Management Interface bus */
UCLASS_SYSCON, /* System configuration device */
UCLASS_SYSRESET, /* System reset device */
UCLASS_TEE, /* Trusted Execution Environment device */