diff options
| author | Stephen Warren <swarren@nvidia.com> | 2016-07-13 13:45:31 -0600 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2016-07-27 16:29:56 -0600 |
| commit | 61f5ddcb7a997f7b7bca3680cd6f67e60e616841 (patch) | |
| tree | ca5dcfb1d2335fa819cc7e36ea6295a6d12a4898 /include/dm | |
| parent | 1e2b3ef8653417f296ee23f32c28abfc086529dd (diff) | |
Add a power domain framework/uclass
Many SoCs allow power to be applied to or removed from portions of the SoC
(power domains). This may be used to save power. This API provides the
means to control such power management hardware.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include/dm')
| -rw-r--r-- | include/dm/uclass-id.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index c5cdfc79d1..eb78c4dac4 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -59,6 +59,7 @@ enum uclass_id { UCLASS_PINCTRL, /* Pinctrl (pin muxing/configuration) device */ UCLASS_PMIC, /* PMIC I/O device */ UCLASS_PWM, /* Pulse-width modulator */ + UCLASS_POWER_DOMAIN, /* (SoC) Power domains */ UCLASS_PWRSEQ, /* Power sequence device */ UCLASS_RAM, /* RAM controller */ UCLASS_REGULATOR, /* Regulator device */ |