diff options
| author | Rajesh Bhagat <rajesh.bhagat@nxp.com> | 2018-11-05 18:01:19 +0000 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2018-12-06 14:37:07 -0800 |
| commit | 088d52cfa8ec515316e20a6168dc2dd163c799b9 (patch) | |
| tree | 3dbee60f1868458e8d86ccf72f5acfc6f5cfe00a /include/configs | |
| parent | 119c01c2a571bb901dd0170b85924f74e362b75c (diff) | |
driver/ifc: replace __ilog2 with LOG2 macro
Replaces __ilog2 function call with LOG2 macro, required to
use macros in global variables.
Also, corrects the value passed in LOG2 for some PowerPC
platforms. Minimum value that can be configured is is 64K
for IFC IP.
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
[YS: fix white space around operator]
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/B4860QDS.h | 2 | ||||
| -rw-r--r-- | include/configs/T102xQDS.h | 2 | ||||
| -rw-r--r-- | include/configs/T1040QDS.h | 2 | ||||
| -rw-r--r-- | include/configs/T208xQDS.h | 2 | ||||
| -rw-r--r-- | include/configs/T4240QDS.h | 2 | ||||
| -rw-r--r-- | include/configs/T4240RDB.h | 2 |
6 files changed, 6 insertions, 6 deletions
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index f758ea7dbe..252e1272c3 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -276,7 +276,7 @@ unsigned long get_board_ddr_clk(void); | CSPR_PORT_SIZE_8 \ | CSPR_MSEL_GPCM \ | CSPR_V) -#define CONFIG_SYS_AMASK3 IFC_AMASK(4 * 1024) +#define CONFIG_SYS_AMASK3 IFC_AMASK(64 * 1024) #define CONFIG_SYS_CSOR3 0x0 /* QIXIS Timing parameters for IFC CS3 */ #define CONFIG_SYS_CS3_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \ diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index 42bfd07f58..f3b0fe0144 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -290,7 +290,7 @@ unsigned long get_board_ddr_clk(void); | CSPR_PORT_SIZE_8 \ | CSPR_MSEL_GPCM \ | CSPR_V) -#define CONFIG_SYS_AMASK3 IFC_AMASK(4*1024) +#define CONFIG_SYS_AMASK3 IFC_AMASK(64 * 1024) #define CONFIG_SYS_CSOR3 0x0 /* QIXIS Timing parameters for IFC CS3 */ #define CONFIG_SYS_CS3_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \ diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 7d90797b08..2d5c96f335 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -215,7 +215,7 @@ unsigned long get_board_ddr_clk(void); | CSPR_PORT_SIZE_8 \ | CSPR_MSEL_GPCM \ | CSPR_V) -#define CONFIG_SYS_AMASK3 IFC_AMASK(4*1024) +#define CONFIG_SYS_AMASK3 IFC_AMASK(64 * 1024) #define CONFIG_SYS_CSOR3 0x0 /* QIXIS Timing parameters for IFC CS3 */ #define CONFIG_SYS_CS3_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 833a0608bf..1dcf2779d7 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -266,7 +266,7 @@ unsigned long get_board_ddr_clk(void); | CSPR_PORT_SIZE_8 \ | CSPR_MSEL_GPCM \ | CSPR_V) -#define CONFIG_SYS_AMASK3 IFC_AMASK(4*1024) +#define CONFIG_SYS_AMASK3 IFC_AMASK(64 * 1024) #define CONFIG_SYS_CSOR3 0x0 /* QIXIS Timing parameters for IFC CS3 */ #define CONFIG_SYS_CS3_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \ diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index 34b3b056ec..06939015d0 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -191,7 +191,7 @@ unsigned long get_board_ddr_clk(void); | CSPR_PORT_SIZE_8 \ | CSPR_MSEL_GPCM \ | CSPR_V) -#define CONFIG_SYS_AMASK3 IFC_AMASK(4*1024) +#define CONFIG_SYS_AMASK3 IFC_AMASK(64 * 1024) #define CONFIG_SYS_CSOR3 0x0 /* QIXIS Timing parameters for IFC CS3 */ #define CONFIG_SYS_CS3_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \ diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index f5eed0923f..42252c7c42 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -460,7 +460,7 @@ unsigned long get_board_ddr_clk(void); | CSPR_MSEL_GPCM \ | CSPR_V) -#define CONFIG_SYS_AMASK3 IFC_AMASK(4*1024) +#define CONFIG_SYS_AMASK3 IFC_AMASK(64 * 1024) #define CONFIG_SYS_CSOR3 0x0 /* CPLD Timing parameters for IFC CS3 */ |