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authorYork Sun <york.sun@nxp.com>2016-12-28 08:43:44 -0800
committerTom Rini <trini@konsulko.com>2017-01-04 19:40:49 -0500
commit66e399b68d20d96a90ba391d75c2290bd63bf4a5 (patch)
tree1e9388e6e6fec3d3e0adf9ee0e14fb0149bb0a80 /include/configs
parent63659ff317c72ff6d74a3147ad758c5904b034bc (diff)
ddr: fsl: Move macro CONFIG_NUM_DDR_CONTROLLERS to Kconfig
Use option NUM_DDR_CONTROLLERS in ddr Kconfig and clean up existing usage in ls102xa and fsl-layerscape. Remove all powerpc macros in config header and board header files. Signed-off-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/B4860QDS.h1
-rw-r--r--include/configs/BSC9131RDB.h1
-rw-r--r--include/configs/MPC8349EMDS.h1
-rw-r--r--include/configs/MPC8536DS.h1
-rw-r--r--include/configs/MPC8540ADS.h1
-rw-r--r--include/configs/MPC8541CDS.h1
-rw-r--r--include/configs/MPC8544DS.h1
-rw-r--r--include/configs/MPC8548CDS.h1
-rw-r--r--include/configs/MPC8555CDS.h1
-rw-r--r--include/configs/MPC8560ADS.h1
-rw-r--r--include/configs/MPC8568MDS.h1
-rw-r--r--include/configs/MPC8569MDS.h1
-rw-r--r--include/configs/MPC8572DS.h1
-rw-r--r--include/configs/MPC8610HPCD.h1
-rw-r--r--include/configs/MPC8641HPCN.h1
-rw-r--r--include/configs/P1022DS.h1
-rw-r--r--include/configs/T1040QDS.h1
-rw-r--r--include/configs/T104xRDB.h1
-rw-r--r--include/configs/T4240RDB.h1
-rw-r--r--include/configs/UCP1020.h1
-rw-r--r--include/configs/controlcenterd.h1
-rw-r--r--include/configs/p1_p2_rdb_pc.h1
-rw-r--r--include/configs/p1_twr.h1
-rw-r--r--include/configs/sbc8548.h1
-rw-r--r--include/configs/sbc8641d.h2
-rw-r--r--include/configs/socrates.h1
-rw-r--r--include/configs/t4qds.h1
-rw-r--r--include/configs/xpedite517x.h1
-rw-r--r--include/configs/xpedite520x.h1
-rw-r--r--include/configs/xpedite537x.h1
-rw-r--r--include/configs/xpedite550x.h1
31 files changed, 0 insertions, 32 deletions
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index 101a398472..e5c220e4d9 100644
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -222,7 +222,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-/* CONFIG_NUM_DDR_CONTROLLERS is defined in include/asm/config_mpc85xx.h */
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h
index 7864936962..a6f73f2df3 100644
--- a/include/configs/BSC9131RDB.h
+++ b/include/configs/BSC9131RDB.h
@@ -84,7 +84,6 @@ extern unsigned long get_sdram_size(void);
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL 1
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index d289bf4d6f..3d3eeb5f46 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -66,7 +66,6 @@
#define CONFIG_SYS_SPD_BUS_NUM 0
#define SPD_EEPROM_ADDRESS1 0x52
#define SPD_EEPROM_ADDRESS2 0x51
-#define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_DIMM_SLOTS_PER_CTLR 2
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index b9dfd76227..ce3340584c 100644
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -105,7 +105,6 @@
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL 2
diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h
index c0d74fa25f..3389a77bc1 100644
--- a/include/configs/MPC8540ADS.h
+++ b/include/configs/MPC8540ADS.h
@@ -77,7 +77,6 @@
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h
index f2618a0e3b..00a18b534a 100644
--- a/include/configs/MPC8541CDS.h
+++ b/include/configs/MPC8541CDS.h
@@ -52,7 +52,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index 406ac5a624..b9c62e1e94 100644
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -63,7 +63,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_VERY_BIG_RAM
-#define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL 2
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index 84292b441e..c241b51487 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -73,7 +73,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h
index 7058b855b7..6faa2304c9 100644
--- a/include/configs/MPC8555CDS.h
+++ b/include/configs/MPC8555CDS.h
@@ -52,7 +52,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h
index 218d77d1bd..e0d010a618 100644
--- a/include/configs/MPC8560ADS.h
+++ b/include/configs/MPC8560ADS.h
@@ -76,7 +76,6 @@
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h
index 3573ef4df0..0d3707f82b 100644
--- a/include/configs/MPC8568MDS.h
+++ b/include/configs/MPC8568MDS.h
@@ -60,7 +60,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h
index 22fe36ad7a..3e00f691ad 100644
--- a/include/configs/MPC8569MDS.h
+++ b/include/configs/MPC8569MDS.h
@@ -88,7 +88,6 @@ extern unsigned long get_clock_freq(void);
/* DDR is system memory*/
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index c91e0324f5..5ca01e8470 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -93,7 +93,6 @@
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_NUM_DDR_CONTROLLERS 2
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL 2
diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h
index 48eada5fbb..c5f3634979 100644
--- a/include/configs/MPC8610HPCD.h
+++ b/include/configs/MPC8610HPCD.h
@@ -91,7 +91,6 @@
#define CONFIG_SYS_MAX_DDR_BAT_SIZE 0x80000000 /* BAT mapping size */
#define CONFIG_VERY_BIG_RAM
-#define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h
index d413f215f3..fb66bb6897 100644
--- a/include/configs/MPC8641HPCN.h
+++ b/include/configs/MPC8641HPCN.h
@@ -113,7 +113,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_SYS_MAX_DDR_BAT_SIZE 0x80000000 /* BAT mapping size */
#define CONFIG_VERY_BIG_RAM
-#define CONFIG_NUM_DDR_CONTROLLERS 2
#define CONFIG_DIMM_SLOTS_PER_CTLR 2
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index d2cc61c6a9..505b4178a4 100644
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -145,7 +145,6 @@
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index ad8e9c0e90..dcdba5fb65 100644
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -163,7 +163,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-/* CONFIG_NUM_DDR_CONTROLLERS is defined in include/asm/config_mpc85xx.h */
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 78be32fd9e..331d4259eb 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -268,7 +268,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-/* CONFIG_NUM_DDR_CONTROLLERS is defined in include/asm/config_mpc85xx.h */
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index 8c891cb08e..52f0d47535 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -127,7 +127,6 @@
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-/* CONFIG_NUM_DDR_CONTROLLERS is defined in include/asm/config_mpc85xx.h */
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL 4
#define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h
index 3d220c2109..f32fb4d041 100644
--- a/include/configs/UCP1020.h
+++ b/include/configs/UCP1020.h
@@ -189,7 +189,6 @@
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
/* Default settings for DDR3 */
diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h
index 7347b68eb4..17360978fc 100644
--- a/include/configs/controlcenterd.h
+++ b/include/configs/controlcenterd.h
@@ -122,7 +122,6 @@
#define CONFIG_SYS_SDRAM_SIZE 1024
#define CONFIG_VERY_BIG_RAM
-#define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index a3afa6b7eb..f91a7628d8 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -331,7 +331,6 @@
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
/* Default settings for DDR3 */
diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h
index f1492979dd..63825b0bde 100644
--- a/include/configs/p1_twr.h
+++ b/include/configs/p1_twr.h
@@ -89,7 +89,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
/* Default settings for DDR3 */
diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h
index 7c5961a670..281a9938c4 100644
--- a/include/configs/sbc8548.h
+++ b/include/configs/sbc8548.h
@@ -116,7 +116,6 @@
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_VERY_BIG_RAM
-#define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL 2
diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h
index 87056dbcac..f02634b1a2 100644
--- a/include/configs/sbc8641d.h
+++ b/include/configs/sbc8641d.h
@@ -57,7 +57,6 @@
#undef CONFIG_DDR_ECC /* only for ECC DDR module */
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
-#define CONFIG_NUM_DDR_CONTROLLERS 2
#define CACHE_LINE_INTERLEAVING 0x20000000
#define PAGE_INTERLEAVING 0x21000000
#define BANK_INTERLEAVING 0x22000000
@@ -103,7 +102,6 @@
#define CONFIG_SYS_MAX_DDR_BAT_SIZE 0x80000000 /* BAT mapping size */
#define CONFIG_VERY_BIG_RAM
-#define CONFIG_NUM_DDR_CONTROLLERS 2
#define CONFIG_DIMM_SLOTS_PER_CTLR 2
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index 806fc2749b..6480116699 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -79,7 +79,6 @@
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_VERY_BIG_RAM
-#define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL 2
diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h
index 4fd6f4def6..e82df3393c 100644
--- a/include/configs/t4qds.h
+++ b/include/configs/t4qds.h
@@ -83,7 +83,6 @@
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-/* CONFIG_NUM_DDR_CONTROLLERS is defined in include/asm/config_mpc85xx.h */
#define CONFIG_DIMM_SLOTS_PER_CTLR 2
#define CONFIG_CHIP_SELECTS_PER_CTRL 4
#define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h
index 49c485ee7f..0d5b1ff41d 100644
--- a/include/configs/xpedite517x.h
+++ b/include/configs/xpedite517x.h
@@ -41,7 +41,6 @@
#define SPD_EEPROM_ADDRESS1 0x54 /* Both channels use the */
#define SPD_EEPROM_ADDRESS2 0x54 /* same SPD data */
#define SPD_EEPROM_OFFSET 0x200 /* OFFSET of SPD in EEPROM */
-#define CONFIG_NUM_DDR_CONTROLLERS 2
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL 1
#define CONFIG_DDR_ECC
diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h
index cc8b794d3d..b88aeb472a 100644
--- a/include/configs/xpedite520x.h
+++ b/include/configs/xpedite520x.h
@@ -37,7 +37,6 @@
#define CONFIG_DDR_SPD
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#define SPD_EEPROM_ADDRESS 0x54
-#define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL 2
#define CONFIG_DDR_ECC
diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h
index f37cf88171..5d78560f3e 100644
--- a/include/configs/xpedite537x.h
+++ b/include/configs/xpedite537x.h
@@ -48,7 +48,6 @@
#define SPD_EEPROM_ADDRESS1 0x54 /* Both channels use the */
#define SPD_EEPROM_ADDRESS2 0x54 /* same SPD data */
#define SPD_EEPROM_OFFSET 0x200 /* OFFSET of SPD in EEPROM */
-#define CONFIG_NUM_DDR_CONTROLLERS 2
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL 1
#define CONFIG_DDR_ECC
diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h
index 6203142202..35e6350810 100644
--- a/include/configs/xpedite550x.h
+++ b/include/configs/xpedite550x.h
@@ -47,7 +47,6 @@
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#define SPD_EEPROM_ADDRESS 0x54
#define SPD_EEPROM_OFFSET 0x200 /* OFFSET of SPD in EEPROM */
-#define CONFIG_NUM_DDR_CONTROLLERS 1
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL 2
#define CONFIG_DDR_ECC