mpc83xx: Get rid of CONFIG_83XX_CLKIN

MPC83xx uses CONFIG_83XX_CLKIN instead of CONFIG_SYS_CLK_FREQ to set the
system clock. To migrate the architecture, we can replace
CONFIG_83XX_CLKIN with CONFIG_SYS_CLK_FREQ.

To do this
* replace all occurrences of CONFIG_83XX_CLKIN with CONFIG_SYS_CLK_FREQ
* set CONFIG_SYS_CLK_FREQ to the old value of CONFIG_83XX_CLKIN in all
  MPC83xx config files

Signed-off-by: Mario Six <mario.six@gdsys.cc>

21 files changed, 6 insertions, 203 deletions

diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h
index 7bf91524c8..77c30093bf 100644
--- a/include/configs/MPC8308RDB.h
+++ b/include/configs/MPC8308RDB.h
@@ -28,12 +28,6 @@
 #define CONFIG_VSC7385_ENET
 
 /*
- * System Clock Setup
- */
-#define CONFIG_83XX_CLKIN	33333333 /* in Hz */
-#define CONFIG_SYS_CLK_FREQ	CONFIG_83XX_CLKIN
-
-/*
  * Hardware Reset Configuration Word
  * if CLKIN is 66.66MHz, then
  * CSB = 133MHz, DDRC = 266MHz, LBC = 133MHz
diff --git a/include/configs/MPC8313ERDB_NAND.h b/include/configs/MPC8313ERDB_NAND.h
index 31c2900180..103ace2d3a 100644
--- a/include/configs/MPC8313ERDB_NAND.h
+++ b/include/configs/MPC8313ERDB_NAND.h
@@ -54,16 +54,6 @@
 #define CONFIG_VSC7385_ENET
 #define CONFIG_TSEC2
 
-#ifdef CONFIG_SYS_66MHZ
-#define CONFIG_83XX_CLKIN	66666667	/* in Hz */
-#elif defined(CONFIG_SYS_33MHZ)
-#define CONFIG_83XX_CLKIN	33333333	/* in Hz */
-#else
-#error Unknown oscillator frequency.
-#endif
-
-#define CONFIG_SYS_CLK_FREQ	CONFIG_83XX_CLKIN
-
 #define CONFIG_SYS_IMMR		0xE0000000
 
 #if !defined(CONFIG_SPL_BUILD)
@@ -445,9 +435,6 @@
 	HRCWL_DDR_TO_SCB_CLK_2X1 |\
 	HRCWL_CSB_TO_CLKIN_2X1 |\
 	HRCWL_CORE_TO_CSB_2X1)
-
-#define CONFIG_SYS_NS16550_CLK (CONFIG_83XX_CLKIN * 2)
-
 #elif defined(CONFIG_SYS_33MHZ)
 
 /* 33MHz IN, 165MHz CSB, 330 DDR, 330 CORE */
@@ -459,9 +446,6 @@
 	HRCWL_DDR_TO_SCB_CLK_2X1 |\
 	HRCWL_CSB_TO_CLKIN_5X1 |\
 	HRCWL_CORE_TO_CSB_2X1)
-
-#define CONFIG_SYS_NS16550_CLK (CONFIG_83XX_CLKIN * 5)
-
 #endif
 
 #define CONFIG_SYS_HRCW_HIGH_BASE (\
@@ -478,6 +462,7 @@
 		       HRCWH_FROM_0XFFF00100 |\
 		       HRCWH_ROM_LOC_NAND_SP_8BIT |\
 		       HRCWH_RL_EXT_NAND)
+#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0))
 
 /* System IO Config */
 #define CONFIG_SYS_SICRH	(SICRH_TSOBI1 | SICRH_TSOBI2)	/* RGMII */
diff --git a/include/configs/MPC8313ERDB_NOR.h b/include/configs/MPC8313ERDB_NOR.h
index afb0586c4b..64b289adce 100644
--- a/include/configs/MPC8313ERDB_NOR.h
+++ b/include/configs/MPC8313ERDB_NOR.h
@@ -30,16 +30,6 @@
 #define CONFIG_VSC7385_ENET
 #define CONFIG_TSEC2
 
-#ifdef CONFIG_SYS_66MHZ
-#define CONFIG_83XX_CLKIN	66666667	/* in Hz */
-#elif defined(CONFIG_SYS_33MHZ)
-#define CONFIG_83XX_CLKIN	33333333	/* in Hz */
-#else
-#error Unknown oscillator frequency.
-#endif
-
-#define CONFIG_SYS_CLK_FREQ	CONFIG_83XX_CLKIN
-
 #define CONFIG_SYS_IMMR		0xE0000000
 
 #define CONFIG_SYS_MEMTEST_START	0x00001000
@@ -420,8 +410,6 @@
 	HRCWL_CSB_TO_CLKIN_2X1 |\
 	HRCWL_CORE_TO_CSB_2X1)
 
-#define CONFIG_SYS_NS16550_CLK (CONFIG_83XX_CLKIN * 2)
-
 #elif defined(CONFIG_SYS_33MHZ)
 
 /* 33MHz IN, 165MHz CSB, 330 DDR, 330 CORE */
@@ -434,8 +422,6 @@
 	HRCWL_CSB_TO_CLKIN_5X1 |\
 	HRCWL_CORE_TO_CSB_2X1)
 
-#define CONFIG_SYS_NS16550_CLK (CONFIG_83XX_CLKIN * 5)
-
 #endif
 
 #define CONFIG_SYS_HRCW_HIGH_BASE (\
@@ -452,6 +438,7 @@
 		       HRCWH_FROM_0X00000100 |\
 		       HRCWH_ROM_LOC_LOCAL_16BIT |\
 		       HRCWH_RL_EXT_LEGACY)
+#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0))
 
 /* System IO Config */
 #define CONFIG_SYS_SICRH	(SICRH_TSOBI1 | SICRH_TSOBI2)	/* RGMII */
diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h
index adb2bb6c2d..53a02f415f 100644
--- a/include/configs/MPC8315ERDB.h
+++ b/include/configs/MPC8315ERDB.h
@@ -24,12 +24,6 @@
 #define CONFIG_E300		1 /* E300 family */
 
 /*
- * System Clock Setup
- */
-#define CONFIG_83XX_CLKIN	66666667 /* in Hz */
-#define CONFIG_SYS_CLK_FREQ	CONFIG_83XX_CLKIN
-
-/*
  * Hardware Reset Configuration Word
  * if CLKIN is 66.66MHz, then
  * CSB = 133MHz, CORE = 400MHz, DDRC = 266MHz, LBC = 133MHz
diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h
index bd1b1bb0a7..ee4eeec885 100644
--- a/include/configs/MPC8323ERDB.h
+++ b/include/configs/MPC8323ERDB.h
@@ -16,15 +16,6 @@
 #define CONFIG_QE		1	/* Has QE */
 
 /*
- * System Clock Setup
- */
-#define CONFIG_83XX_CLKIN	66666667	/* in Hz */
-
-#ifndef CONFIG_SYS_CLK_FREQ
-#define CONFIG_SYS_CLK_FREQ	CONFIG_83XX_CLKIN
-#endif
-
-/*
  * Hardware Reset Configuration Word
  */
 #define CONFIG_SYS_HRCW_LOW (\
diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h
index 4cb595bb8e..0ba6477254 100644
--- a/include/configs/MPC832XEMDS.h
+++ b/include/configs/MPC832XEMDS.h
@@ -13,19 +13,6 @@
 #define CONFIG_QE		1	/* Has QE */
 
 /*
- * System Clock Setup
- */
-#ifdef CONFIG_PCISLAVE
-#define CONFIG_83XX_PCICLK	66000000	/* in HZ */
-#else
-#define CONFIG_83XX_CLKIN	66000000	/* in Hz */
-#endif
-
-#ifndef CONFIG_SYS_CLK_FREQ
-#define CONFIG_SYS_CLK_FREQ	66000000
-#endif
-
-/*
  * Hardware Reset Configuration Word
  */
 #define CONFIG_SYS_HRCW_LOW (\
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 40e5c1997d..4c9ee76815 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -17,26 +17,11 @@
  */
 #define CONFIG_E300		1	/* E300 Family */
 
-#define CONFIG_PCI_66M
-#ifdef CONFIG_PCI_66M
-#define CONFIG_83XX_CLKIN	66000000	/* in Hz */
-#else
-#define CONFIG_83XX_CLKIN	33000000	/* in Hz */
-#endif
-
-#ifdef CONFIG_PCISLAVE
-#define CONFIG_83XX_PCICLK	66666666	/* in Hz */
-#endif /* CONFIG_PCISLAVE */
-
-#ifndef CONFIG_SYS_CLK_FREQ
-#ifdef CONFIG_PCI_66M
-#define CONFIG_SYS_CLK_FREQ	66000000
+#if CONFIG_SYS_CLK_FREQ == 66000000 || CONFIG_SYS_CLK_FREQ == 66666666
 #define HRCWL_CSB_TO_CLKIN	HRCWL_CSB_TO_CLKIN_4X1
-#else
-#define CONFIG_SYS_CLK_FREQ	33000000
+#elif CONFIG_SYS_CLK_FREQ == 33000000
 #define HRCWL_CSB_TO_CLKIN	HRCWL_CSB_TO_CLKIN_8X1
 #endif
-#endif
 
 #define CONFIG_SYS_IMMR		0xE0000000
 
diff --git a/include/configs/MPC8349EMDS_SDRAM.h b/include/configs/MPC8349EMDS_SDRAM.h
index 15f10492a5..b9710b6588 100644
--- a/include/configs/MPC8349EMDS_SDRAM.h
+++ b/include/configs/MPC8349EMDS_SDRAM.h
@@ -17,26 +17,11 @@
  */
 #define CONFIG_E300		1	/* E300 Family */
 
-#define CONFIG_PCI_66M
-#ifdef CONFIG_PCI_66M
-#define CONFIG_83XX_CLKIN	66000000	/* in Hz */
-#else
-#define CONFIG_83XX_CLKIN	33000000	/* in Hz */
-#endif
-
-#ifdef CONFIG_PCISLAVE
-#define CONFIG_83XX_PCICLK	66666666	/* in Hz */
-#endif /* CONFIG_PCISLAVE */
-
-#ifndef CONFIG_SYS_CLK_FREQ
-#ifdef CONFIG_PCI_66M
-#define CONFIG_SYS_CLK_FREQ	66000000
+#if CONFIG_SYS_CLK_FREQ == 66000000 || CONFIG_SYS_CLK_FREQ == 66666666
 #define HRCWL_CSB_TO_CLKIN	HRCWL_CSB_TO_CLKIN_4X1
-#else
-#define CONFIG_SYS_CLK_FREQ	33000000
+#elif CONFIG_SYS_CLK_FREQ == 33000000
 #define HRCWL_CSB_TO_CLKIN	HRCWL_CSB_TO_CLKIN_8X1
 #endif
-#endif
 
 #define CONFIG_SYS_IMMR		0xE0000000
 
diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index 5877279ada..e170271c40 100644
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -391,13 +391,6 @@ boards, we say we have two, but don't display a message if we find only one. */
 
 #endif
 
-#define CONFIG_PCI_66M
-#ifdef CONFIG_PCI_66M
-#define CONFIG_83XX_CLKIN	66666666	/* in Hz */
-#else
-#define CONFIG_83XX_CLKIN	33333333	/* in Hz */
-#endif
-
 /* TSEC */
 
 #ifdef CONFIG_TSEC_ENET
diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h
index 577f7ec0b2..33c485aab7 100644
--- a/include/configs/MPC837XEMDS.h
+++ b/include/configs/MPC837XEMDS.h
@@ -13,19 +13,6 @@
 #define CONFIG_E300		1 /* E300 family */
 
 /*
- * System Clock Setup
- */
-#ifdef CONFIG_PCISLAVE
-#define CONFIG_83XX_PCICLK	66000000 /* in HZ */
-#else
-#define CONFIG_83XX_CLKIN	66000000 /* in Hz */
-#endif
-
-#ifndef CONFIG_SYS_CLK_FREQ
-#define CONFIG_SYS_CLK_FREQ	66000000
-#endif
-
-/*
  * Hardware Reset Configuration Word
  * if CLKIN is 66MHz, then
  * CSB = 396MHz, CORE = 594MHz, DDRC = 396MHz, LBC = 396MHz
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index a8f5b013b2..806b0f32e5 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -21,20 +21,6 @@
 #define CONFIG_VSC7385_ENET
 
 /*
- * System Clock Setup
- */
-#ifdef CONFIG_PCISLAVE
-#define CONFIG_83XX_PCICLK	66666667 /* in HZ */
-#else
-#define CONFIG_83XX_CLKIN	66666667 /* in Hz */
-#define CONFIG_PCIE
-#endif
-
-#ifndef CONFIG_SYS_CLK_FREQ
-#define CONFIG_SYS_CLK_FREQ	CONFIG_83XX_CLKIN
-#endif
-
-/*
  * Hardware Reset Configuration Word
  */
 #define CONFIG_SYS_HRCW_LOW (\
diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h
index 949e370150..58c301553e 100644
--- a/include/configs/TQM834x.h
+++ b/include/configs/TQM834x.h
@@ -19,9 +19,6 @@
 /* IMMR Base Address Register, use Freescale default: 0xff400000 */
 #define CONFIG_SYS_IMMR		0xff400000
 
-/* System clock. Primary input clock when in PCI host mode */
-#define CONFIG_83XX_CLKIN	66666000	/* 66,666 MHz */
-
 /*
  * Local Bus LCRR
  *    LCRR:  DLL bypass, Clock divider is 8
diff --git a/include/configs/caddy2.h b/include/configs/caddy2.h
index a8f692d5ea..68fb989856 100644
--- a/include/configs/caddy2.h
+++ b/include/configs/caddy2.h
@@ -25,22 +25,11 @@
 /* Don't enable PCI2 on vme834x - it doesn't exist physically. */
 #undef CONFIG_MPC83XX_PCI2		/* support for 2nd PCI controller */
 
-#define CONFIG_PCI_66M
 #ifdef CONFIG_PCI_66M
-#define CONFIG_83XX_CLKIN	66000000	/* in Hz */
-#else
-#define CONFIG_83XX_CLKIN	33000000	/* in Hz */
-#endif
-
-#ifndef CONFIG_SYS_CLK_FREQ
-#ifdef CONFIG_PCI_66M
-#define CONFIG_SYS_CLK_FREQ	66000000
 #define HRCWL_CSB_TO_CLKIN	HRCWL_CSB_TO_CLKIN_4X1
 #else
-#define CONFIG_SYS_CLK_FREQ	33000000
 #define HRCWL_CSB_TO_CLKIN	HRCWL_CSB_TO_CLKIN_8X1
 #endif
-#endif
 
 #define CONFIG_SYS_IMMR		0xE0000000
 
diff --git a/include/configs/hrcon.h b/include/configs/hrcon.h
index cd5e883b7a..8eb12b7670 100644
--- a/include/configs/hrcon.h
+++ b/include/configs/hrcon.h
@@ -17,12 +17,6 @@
 #define CONFIG_SYS_FSL_ESDHC_ADDR	CONFIG_SYS_MPC83xx_ESDHC_ADDR
 
 /*
- * System Clock Setup
- */
-#define CONFIG_83XX_CLKIN	33333333 /* in Hz */
-#define CONFIG_SYS_CLK_FREQ	CONFIG_83XX_CLKIN
-
-/*
  * Hardware Reset Configuration Word
  * if CLKIN is 66.66MHz, then
  * CSB = 133MHz, DDRC = 266MHz, LBC = 133MHz
diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h
index 4b0ec273fb..eff0addd51 100644
--- a/include/configs/ids8313.h
+++ b/include/configs/ids8313.h
@@ -20,9 +20,6 @@
 #define CONFIG_BOOT_RETRY_MIN		30
 #define CONFIG_RESET_TO_RETRY
 
-#define CONFIG_83XX_CLKIN		66000000	/* in Hz */
-#define CONFIG_SYS_CLK_FREQ		CONFIG_83XX_CLKIN
-
 #define CONFIG_SYS_IMMR		0xF0000000
 
 #define CONFIG_SYS_ACR_PIPE_DEP	3	/* Arbiter pipeline depth (0-3) */
diff --git a/include/configs/kmeter1.h b/include/configs/kmeter1.h
index 976255f578..2280f007f2 100644
--- a/include/configs/kmeter1.h
+++ b/include/configs/kmeter1.h
@@ -26,13 +26,6 @@
 #include "km/km-powerpc.h"
 
 /*
- * System Clock Setup
- */
-#define CONFIG_83XX_CLKIN		66000000
-#define CONFIG_SYS_CLK_FREQ		66000000
-#define CONFIG_83XX_PCICLK		66000000
-
-/*
  * IMMR new address
  */
 #define CONFIG_SYS_IMMR		0xE0000000
diff --git a/include/configs/mpc8308_p1m.h b/include/configs/mpc8308_p1m.h
index c007877276..fd59471370 100644
--- a/include/configs/mpc8308_p1m.h
+++ b/include/configs/mpc8308_p1m.h
@@ -22,12 +22,6 @@
 #define CONFIG_TSEC2
 
 /*
- * System Clock Setup
- */
-#define CONFIG_83XX_CLKIN	33333333 /* in Hz */
-#define CONFIG_SYS_CLK_FREQ	CONFIG_83XX_CLKIN
-
-/*
  * Hardware Reset Configuration Word
  * if CLKIN is 66.66MHz, then
  * CSB = 133MHz, DDRC = 266MHz, LBC = 133MHz
diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h
index 60eb2cf831..2520a77dd3 100644
--- a/include/configs/sbc8349.h
+++ b/include/configs/sbc8349.h
@@ -22,27 +22,11 @@
 /* Don't enable PCI2 on sbc834x - it doesn't exist physically. */
 #undef CONFIG_MPC83XX_PCI2		/* support for 2nd PCI controller */
 
-/*
- * The default if PCI isn't enabled, or if no PCI clk setting is given
- * is 66MHz; this is what the board defaults to when the PCI slot is
- * physically empty.  The board will automatically (i.e w/o jumpers)
- * clock down to 33MHz if you insert a 33MHz PCI card.
- */
 #ifdef CONFIG_PCI_33M
-#define CONFIG_83XX_CLKIN	33000000	/* in Hz */
-#else	/* 66M */
-#define CONFIG_83XX_CLKIN	66000000	/* in Hz */
-#endif
-
-#ifndef CONFIG_SYS_CLK_FREQ
-#ifdef CONFIG_PCI_33M
-#define CONFIG_SYS_CLK_FREQ	33000000
 #define HRCWL_CSB_TO_CLKIN	HRCWL_CSB_TO_CLKIN_8X1
 #else	/* 66M */
-#define CONFIG_SYS_CLK_FREQ	66000000
 #define HRCWL_CSB_TO_CLKIN	HRCWL_CSB_TO_CLKIN_4X1
 #endif
-#endif
 
 #define CONFIG_SYS_IMMR		0xE0000000
 
diff --git a/include/configs/strider.h b/include/configs/strider.h
index c42fe8c3ec..8c9acfba8d 100644
--- a/include/configs/strider.h
+++ b/include/configs/strider.h
@@ -17,12 +17,6 @@
 #define CONFIG_SYS_FSL_ESDHC_ADDR	CONFIG_SYS_MPC83xx_ESDHC_ADDR
 
 /*
- * System Clock Setup
- */
-#define CONFIG_83XX_CLKIN	33333333 /* in Hz */
-#define CONFIG_SYS_CLK_FREQ	CONFIG_83XX_CLKIN
-
-/*
  * Hardware Reset Configuration Word
  * if CLKIN is 66.66MHz, then
  * CSB = 133MHz, DDRC = 266MHz, LBC = 133MHz
diff --git a/include/configs/ve8313.h b/include/configs/ve8313.h
index 87fbe36640..2ef6f88bdf 100644
--- a/include/configs/ve8313.h
+++ b/include/configs/ve8313.h
@@ -24,10 +24,6 @@
  * On-board devices
  *
  */
-#define CONFIG_83XX_CLKIN	32000000	/* in Hz */
-
-#define CONFIG_SYS_CLK_FREQ	CONFIG_83XX_CLKIN
-
 #define CONFIG_SYS_IMMR		0xE0000000
 
 #define CONFIG_SYS_MEMTEST_START	0x00001000
diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h
index ea08058752..c5086958ff 100644
--- a/include/configs/vme8349.h
+++ b/include/configs/vme8349.h
@@ -26,21 +26,12 @@
 #undef CONFIG_MPC83XX_PCI2		/* support for 2nd PCI controller */
 
 #define CONFIG_PCI_66M
-#ifdef CONFIG_PCI_66M
-#define CONFIG_83XX_CLKIN	66000000	/* in Hz */
-#else
-#define CONFIG_83XX_CLKIN	33000000	/* in Hz */
-#endif
 
-#ifndef CONFIG_SYS_CLK_FREQ
 #ifdef CONFIG_PCI_66M
-#define CONFIG_SYS_CLK_FREQ	66000000
 #define HRCWL_CSB_TO_CLKIN	HRCWL_CSB_TO_CLKIN_4X1
 #else
-#define CONFIG_SYS_CLK_FREQ	33000000
 #define HRCWL_CSB_TO_CLKIN	HRCWL_CSB_TO_CLKIN_8X1
 #endif
-#endif
 
 #define CONFIG_SYS_IMMR		0xE0000000