diff options
| author | Tom Rini <trini@konsulko.com> | 2022-06-08 08:24:31 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-06-28 17:03:31 -0400 |
| commit | d4ae15260bbd0f9962b71ad2af53e4c450abd530 (patch) | |
| tree | 3c490b52544a3a7b0aa7c66504cf5202517f430b /include/configs | |
| parent | 093044735fd7db1616b1c4920c21ea6c0e0b0cc3 (diff) | |
Convert CONFIG_USB_EHCI_TXFIFO_THRESH to Kconfig
This converts the following to Kconfig:
CONFIG_USB_EHCI_TXFIFO_THRESH
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/tegra114-common.h | 3 | ||||
| -rw-r--r-- | include/configs/tegra124-common.h | 3 | ||||
| -rw-r--r-- | include/configs/tegra20-common.h | 8 | ||||
| -rw-r--r-- | include/configs/tegra210-common.h | 3 | ||||
| -rw-r--r-- | include/configs/tegra30-common.h | 3 |
5 files changed, 0 insertions, 20 deletions
diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h index 74208315894..87ec1f5a99d 100644 --- a/include/configs/tegra114-common.h +++ b/include/configs/tegra114-common.h @@ -55,7 +55,4 @@ /* Defines for SPL */ -/* For USB EHCI controller */ -#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 - #endif /* _TEGRA114_COMMON_H_ */ diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h index 314486a1bcb..f509784a868 100644 --- a/include/configs/tegra124-common.h +++ b/include/configs/tegra124-common.h @@ -57,9 +57,6 @@ /* Defines for SPL */ -/* For USB EHCI controller */ -#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 - /* GPU needs setup */ #define CONFIG_TEGRA_GPU diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index a2b14d8ead8..71867bb6baa 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -69,12 +69,4 @@ #define TEGRA_LP0_VEC #endif -/* - * This parameter affects a TXFILLTUNING field that controls how much data is - * sent to the latency fifo before it is sent to the wire. Without this - * parameter, the default (2) causes occasional Data Buffer Errors in OUT - * packets depending on the buffer address and size. - */ -#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 - #endif /* _TEGRA20_COMMON_H_ */ diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h index 3ba12bec0ee..e510820786e 100644 --- a/include/configs/tegra210-common.h +++ b/include/configs/tegra210-common.h @@ -46,9 +46,6 @@ "fdt_addr_r=0x83000000\0" \ "ramdisk_addr_r=0x83420000\0" -/* For USB EHCI controller */ -#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 - /* GPU needs setup */ #define CONFIG_TEGRA_GPU diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h index a68da5ddfc8..04fcf11ed82 100644 --- a/include/configs/tegra30-common.h +++ b/include/configs/tegra30-common.h @@ -52,7 +52,4 @@ /* Defines for SPL */ -/* For USB EHCI controller */ -#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 - #endif /* _TEGRA30_COMMON_H_ */ |